diff options
Diffstat (limited to 'arch/mips/nxp/pnx8550/common/setup.c')
-rw-r--r-- | arch/mips/nxp/pnx8550/common/setup.c | 143 |
1 files changed, 0 insertions, 143 deletions
diff --git a/arch/mips/nxp/pnx8550/common/setup.c b/arch/mips/nxp/pnx8550/common/setup.c deleted file mode 100644 index 71adac32332..00000000000 --- a/arch/mips/nxp/pnx8550/common/setup.c +++ /dev/null | |||
@@ -1,143 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * 2.6 port, Embedded Alley Solutions, Inc | ||
4 | * | ||
5 | * Based on Per Hallsmark, per.hallsmark@mvista.com | ||
6 | * | ||
7 | * This program is free software; you can distribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License (Version 2) as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
14 | * for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along | ||
17 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
19 | */ | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/sched.h> | ||
22 | #include <linux/ioport.h> | ||
23 | #include <linux/irq.h> | ||
24 | #include <linux/mm.h> | ||
25 | #include <linux/delay.h> | ||
26 | #include <linux/interrupt.h> | ||
27 | #include <linux/serial_pnx8xxx.h> | ||
28 | #include <linux/pm.h> | ||
29 | |||
30 | #include <asm/cpu.h> | ||
31 | #include <asm/bootinfo.h> | ||
32 | #include <asm/irq.h> | ||
33 | #include <asm/mipsregs.h> | ||
34 | #include <asm/reboot.h> | ||
35 | #include <asm/pgtable.h> | ||
36 | #include <asm/time.h> | ||
37 | |||
38 | #include <glb.h> | ||
39 | #include <int.h> | ||
40 | #include <pci.h> | ||
41 | #include <uart.h> | ||
42 | #include <nand.h> | ||
43 | |||
44 | extern void __init board_setup(void); | ||
45 | extern void pnx8550_machine_restart(char *); | ||
46 | extern void pnx8550_machine_halt(void); | ||
47 | extern void pnx8550_machine_power_off(void); | ||
48 | extern struct resource ioport_resource; | ||
49 | extern struct resource iomem_resource; | ||
50 | extern char *prom_getcmdline(void); | ||
51 | |||
52 | struct resource standard_io_resources[] = { | ||
53 | { | ||
54 | .start = 0x00, | ||
55 | .end = 0x1f, | ||
56 | .name = "dma1", | ||
57 | .flags = IORESOURCE_BUSY | ||
58 | }, { | ||
59 | .start = 0x40, | ||
60 | .end = 0x5f, | ||
61 | .name = "timer", | ||
62 | .flags = IORESOURCE_BUSY | ||
63 | }, { | ||
64 | .start = 0x80, | ||
65 | .end = 0x8f, | ||
66 | .name = "dma page reg", | ||
67 | .flags = IORESOURCE_BUSY | ||
68 | }, { | ||
69 | .start = 0xc0, | ||
70 | .end = 0xdf, | ||
71 | .name = "dma2", | ||
72 | .flags = IORESOURCE_BUSY | ||
73 | }, | ||
74 | }; | ||
75 | |||
76 | #define STANDARD_IO_RESOURCES ARRAY_SIZE(standard_io_resources) | ||
77 | |||
78 | extern struct resource pci_io_resource; | ||
79 | extern struct resource pci_mem_resource; | ||
80 | |||
81 | /* Return the total size of DRAM-memory, (RANK0 + RANK1) */ | ||
82 | unsigned long get_system_mem_size(void) | ||
83 | { | ||
84 | /* Read IP2031_RANK0_ADDR_LO */ | ||
85 | unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010); | ||
86 | /* Read IP2031_RANK1_ADDR_HI */ | ||
87 | unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018); | ||
88 | |||
89 | return dram_r1_hi - dram_r0_lo + 1; | ||
90 | } | ||
91 | |||
92 | int pnx8550_console_port = -1; | ||
93 | |||
94 | void __init plat_mem_setup(void) | ||
95 | { | ||
96 | int i; | ||
97 | char* argptr; | ||
98 | |||
99 | board_setup(); /* board specific setup */ | ||
100 | |||
101 | _machine_restart = pnx8550_machine_restart; | ||
102 | _machine_halt = pnx8550_machine_halt; | ||
103 | pm_power_off = pnx8550_machine_power_off; | ||
104 | |||
105 | /* Clear the Global 2 Register, PCI Inta Output Enable Registers | ||
106 | Bit 1:Enable DAC Powerdown | ||
107 | -> 0:DACs are enabled and are working normally | ||
108 | 1:DACs are powerdown | ||
109 | Bit 0:Enable of PCI inta output | ||
110 | -> 0 = Disable PCI inta output | ||
111 | 1 = Enable PCI inta output | ||
112 | */ | ||
113 | PNX8550_GLB2_ENAB_INTA_O = 0; | ||
114 | |||
115 | /* IO/MEM resources. */ | ||
116 | set_io_port_base(PNX8550_PORT_BASE); | ||
117 | ioport_resource.start = 0; | ||
118 | ioport_resource.end = ~0; | ||
119 | iomem_resource.start = 0; | ||
120 | iomem_resource.end = ~0; | ||
121 | |||
122 | /* Request I/O space for devices on this board */ | ||
123 | for (i = 0; i < STANDARD_IO_RESOURCES; i++) | ||
124 | request_resource(&ioport_resource, standard_io_resources + i); | ||
125 | |||
126 | /* Place the Mode Control bit for GPIO pin 16 in primary function */ | ||
127 | /* Pin 16 is used by UART1, UA1_TX */ | ||
128 | outl((PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_16_BIT) | | ||
129 | (PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_17_BIT), | ||
130 | PNX8550_GPIO_MC1); | ||
131 | |||
132 | argptr = prom_getcmdline(); | ||
133 | if ((argptr = strstr(argptr, "console=ttyS")) != NULL) { | ||
134 | argptr += strlen("console=ttyS"); | ||
135 | pnx8550_console_port = *argptr == '0' ? 0 : 1; | ||
136 | |||
137 | /* We must initialize the UART (console) before early printk */ | ||
138 | /* Set LCR to 8-bit and BAUD to 38400 (no 5) */ | ||
139 | ip3106_lcr(UART_BASE, pnx8550_console_port) = | ||
140 | PNX8XXX_UART_LCR_8BIT; | ||
141 | ip3106_baud(UART_BASE, pnx8550_console_port) = 5; | ||
142 | } | ||
143 | } | ||