1 files changed, 85 insertions, 0 deletions

diff --git a/arch/mips/include/asm/switch_to.h b/arch/mips/include/asm/switch_to.h
new file mode 100644
index 00000000000..5d33621b565
--- /dev/null
+++ b/arch/mips/include/asm/switch_to.h
@@ -0,0 +1,85 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003, 06 by Ralf Baechle
+ * Copyright (C) 1996 by Paul M. Antoine
+ * Copyright (C) 1999 Silicon Graphics
+ * Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.
+ */
+#ifndef _ASM_SWITCH_TO_H
+#define _ASM_SWITCH_TO_H
+
+#include <asm/cpu-features.h>
+#include <asm/watch.h>
+#include <asm/dsp.h>
+
+struct task_struct;
+
+/*
+ * switch_to(n) should switch tasks to task nr n, first
+ * checking that n isn't the current task, in which case it does nothing.
+ */
+extern asmlinkage void *resume(void *last, void *next, void *next_ti);
+
+extern unsigned int ll_bit;
+extern struct task_struct *ll_task;
+
+#ifdef CONFIG_MIPS_MT_FPAFF
+
+/*
+ * Handle the scheduler resume end of FPU affinity management.  We do this
+ * inline to try to keep the overhead down. If we have been forced to run on
+ * a "CPU" with an FPU because of a previous high level of FP computation,
+ * but did not actually use the FPU during the most recent time-slice (CU1
+ * isn't set), we undo the restriction on cpus_allowed.
+ *
+ * We're not calling set_cpus_allowed() here, because we have no need to
+ * force prompt migration - we're already switching the current CPU to a
+ * different thread.
+ */
+
+#define __mips_mt_fpaff_switch_to(prev)                                 \
+do {                                                                    \
+        struct thread_info *__prev_ti = task_thread_info(prev);         \
+                                                                        \
+        if (cpu_has_fpu &&                                              \
+            test_ti_thread_flag(__prev_ti, TIF_FPUBOUND) &&             \
+            (!(KSTK_STATUS(prev) & ST0_CU1))) {                         \
+                clear_ti_thread_flag(__prev_ti, TIF_FPUBOUND);          \
+                prev->cpus_allowed = prev->thread.user_cpus_allowed;    \
+        }                                                               \
+        next->thread.emulated_fp = 0;                                   \
+} while(0)
+
+#else
+#define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0)
+#endif
+
+#define __clear_software_ll_bit()                                       \
+do {                                                                    \
+        if (!__builtin_constant_p(cpu_has_llsc) || !cpu_has_llsc)       \
+                ll_bit = 0;                                             \
+} while (0)
+
+#define switch_to(prev, next, last)                                     \
+do {                                                                    \
+        __mips_mt_fpaff_switch_to(prev);                                \
+        if (cpu_has_dsp)                                                \
+                __save_dsp(prev);                                       \
+        __clear_software_ll_bit();                                      \
+        (last) = resume(prev, next, task_thread_info(next));            \
+} while (0)
+
+#define finish_arch_switch(prev)                                        \
+do {                                                                    \
+        if (cpu_has_dsp)                                                \
+                __restore_dsp(current);                                 \
+        if (cpu_has_userlocal)                                          \
+                write_c0_userlocal(current_thread_info()->tp_value);    \
+        __restore_watch();                                              \
+} while (0)
+
+#endif /* _ASM_SWITCH_TO_H */