4 files changed, 19 insertions, 16 deletions

diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c
index 3b2c18b1434..f72c48d4804 100644
--- a/arch/mips/alchemy/common/platform.c
+++ b/arch/mips/alchemy/common/platform.c
@@ -492,7 +492,7 @@ static void __init alchemy_setup_macs(int ctype)
                 memcpy(au1xxx_eth0_platform_data.mac, ethaddr, 6);
 
         ret = platform_device_register(&au1xxx_eth0_device);
-        if (!ret)
+        if (ret)
                 printk(KERN_INFO "Alchemy: failed to register MAC0\n");
 
 
diff --git a/arch/mips/alchemy/common/power.c b/arch/mips/alchemy/common/power.c
index 647e518c90b..b86324a4260 100644
--- a/arch/mips/alchemy/common/power.c
+++ b/arch/mips/alchemy/common/power.c
@@ -158,15 +158,21 @@ static void restore_core_regs(void)
 
 void au_sleep(void)
 {
-        int cpuid = alchemy_get_cputype();
-        if (cpuid != ALCHEMY_CPU_UNKNOWN) {
-                save_core_regs();
-                if (cpuid <= ALCHEMY_CPU_AU1500)
-                        alchemy_sleep_au1000();
-                else if (cpuid <= ALCHEMY_CPU_AU1200)
-                        alchemy_sleep_au1550();
-                restore_core_regs();
+        save_core_regs();
+
+        switch (alchemy_get_cputype()) {
+        case ALCHEMY_CPU_AU1000:
+        case ALCHEMY_CPU_AU1500:
+        case ALCHEMY_CPU_AU1100:
+                alchemy_sleep_au1000();
+                break;
+        case ALCHEMY_CPU_AU1550:
+        case ALCHEMY_CPU_AU1200:
+                alchemy_sleep_au1550();
+                break;
         }
+
+        restore_core_regs();
 }
 
 #endif  /* CONFIG_PM */
diff --git a/arch/mips/alchemy/devboards/bcsr.c b/arch/mips/alchemy/devboards/bcsr.c
index 596ad00e7f0..463d2c4d944 100644
--- a/arch/mips/alchemy/devboards/bcsr.c
+++ b/arch/mips/alchemy/devboards/bcsr.c
@@ -89,8 +89,12 @@ static void bcsr_csc_handler(unsigned int irq, struct irq_desc *d)
 {
         unsigned short bisr = __raw_readw(bcsr_virt + BCSR_REG_INTSTAT);
 
+        disable_irq_nosync(irq);
+
         for ( ; bisr; bisr &= bisr - 1)
                 generic_handle_irq(bcsr_csc_base + __ffs(bisr));
+
+        enable_irq(irq);
 }
 
 /* NOTE: both the enable and mask bits must be cleared, otherwise the
diff --git a/arch/mips/alchemy/devboards/db1200/setup.c b/arch/mips/alchemy/devboards/db1200/setup.c
index 1dac4f27d33..4a8980027ec 100644
--- a/arch/mips/alchemy/devboards/db1200/setup.c
+++ b/arch/mips/alchemy/devboards/db1200/setup.c
@@ -23,13 +23,6 @@ void __init board_setup(void)
         unsigned long freq0, clksrc, div, pfc;
         unsigned short whoami;
 
-        /* Set Config[OD] (disable overlapping bus transaction):
-         * This gets rid of a _lot_ of spurious interrupts (especially
-         * wrt. IDE); but incurs ~10% performance hit in some
-         * cpu-bound applications.
-         */
-        set_c0_config(1 << 19);
-
         bcsr_init(DB1200_BCSR_PHYS_ADDR,
                   DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS);