19 files changed, 184 insertions, 128 deletions

diff --git a/arch/microblaze/include/asm/byteorder.h b/arch/microblaze/include/asm/byteorder.h
index ce9c58732ff..31902762a42 100644
--- a/arch/microblaze/include/asm/byteorder.h
+++ b/arch/microblaze/include/asm/byteorder.h
@@ -1,6 +1,10 @@
 #ifndef _ASM_MICROBLAZE_BYTEORDER_H
 #define _ASM_MICROBLAZE_BYTEORDER_H
 
+#ifdef __MICROBLAZEEL__
+#include <linux/byteorder/little_endian.h>
+#else
 #include <linux/byteorder/big_endian.h>
+#endif
 
 #endif /* _ASM_MICROBLAZE_BYTEORDER_H */
diff --git a/arch/microblaze/include/asm/checksum.h b/arch/microblaze/include/asm/checksum.h
index 128bf03b54b..0185cbefdda 100644
--- a/arch/microblaze/include/asm/checksum.h
+++ b/arch/microblaze/include/asm/checksum.h
@@ -24,8 +24,13 @@ csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
                 "addc %0, %0, %3\n\t"
                 "addc %0, %0, r0\n\t"
                 : "+&d" (sum)
-                : "d" (saddr), "d" (daddr), "d" (len + proto));
-
+                : "d" (saddr), "d" (daddr),
+#ifdef __MICROBLAZEEL__
+        "d" ((len + proto) << 8)
+#else
+        "d" (len + proto)
+#endif
+);
         return sum;
 }
 
diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h
index b4f5ca33aeb..cd257537ae5 100644
--- a/arch/microblaze/include/asm/cpuinfo.h
+++ b/arch/microblaze/include/asm/cpuinfo.h
@@ -38,6 +38,7 @@ struct cpuinfo {
         u32 use_exc;
         u32 ver_code;
         u32 mmu;
+        u32 endian;
 
         /* CPU caches */
         u32 use_icache;
@@ -76,7 +77,6 @@ struct cpuinfo {
         u32 num_rd_brk;
         u32 num_wr_brk;
         u32 cpu_clock_freq; /* store real freq of cpu */
-        u32 freq_div_hz; /* store freq/HZ */
 
         /* FPGA family */
         u32 fpga_family_code;
@@ -97,7 +97,8 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu);
 static inline unsigned int fcpu(struct device_node *cpu, char *n)
 {
         int *val;
-        return (val = (int *) of_get_property(cpu, n, NULL)) ? *val : 0;
+        return (val = (int *) of_get_property(cpu, n, NULL)) ?
+                                                        be32_to_cpup(val) : 0;
 }
 
 #endif /* _ASM_MICROBLAZE_CPUINFO_H */
diff --git a/arch/microblaze/include/asm/elf.h b/arch/microblaze/include/asm/elf.h
index 732caf1be74..098dfdde4b0 100644
--- a/arch/microblaze/include/asm/elf.h
+++ b/arch/microblaze/include/asm/elf.h
@@ -71,7 +71,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
 
 #define ELF_ET_DYN_BASE         (0x08000000)
 
-#ifdef __LITTLE_ENDIAN__
+#ifdef __MICROBLAZEEL__
 #define ELF_DATA        ELFDATA2LSB
 #else
 #define ELF_DATA        ELFDATA2MSB
diff --git a/arch/microblaze/include/asm/gpio.h b/arch/microblaze/include/asm/gpio.h
index 2345ac354d9..2b2c18be71c 100644
--- a/arch/microblaze/include/asm/gpio.h
+++ b/arch/microblaze/include/asm/gpio.h
@@ -38,12 +38,9 @@ static inline int gpio_cansleep(unsigned int gpio)
         return __gpio_cansleep(gpio);
 }
 
-/*
- * Not implemented, yet.
- */
 static inline int gpio_to_irq(unsigned int gpio)
 {
-        return -ENOSYS;
+        return __gpio_to_irq(gpio);
 }
 
 static inline int irq_to_gpio(unsigned int irq)
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index 00b5398d08c..eae32220f44 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -243,6 +243,8 @@ static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
 #define out_8(a, v) __raw_writeb((v), (a))
 #define in_8(a) __raw_readb(a)
 
+#define mmiowb()
+
 #define ioport_map(port, nr)    ((void __iomem *)(port))
 #define ioport_unmap(addr)
 
diff --git a/arch/microblaze/include/asm/irqflags.h b/arch/microblaze/include/asm/irqflags.h
index 2c38c6d8017..5fd31905775 100644
--- a/arch/microblaze/include/asm/irqflags.h
+++ b/arch/microblaze/include/asm/irqflags.h
@@ -9,103 +9,114 @@
 #ifndef _ASM_MICROBLAZE_IRQFLAGS_H
 #define _ASM_MICROBLAZE_IRQFLAGS_H
 
-#include <linux/irqflags.h>
+#include <linux/types.h>
 #include <asm/registers.h>
 
-# if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
-
-# define raw_local_irq_save(flags)                      \
-        do {                                            \
-                asm volatile (" msrclr %0, %1;          \
-                                nop;"                   \
-                                : "=r"(flags)           \
-                                : "i"(MSR_IE)           \
-                                : "memory");            \
-        } while (0)
-
-# define raw_local_irq_disable()                        \
-        do {                                            \
-                asm volatile (" msrclr r0, %0;          \
-                                nop;"                   \
-                                :                       \
-                                : "i"(MSR_IE)           \
-                                : "memory");            \
-        } while (0)
-
-# define raw_local_irq_enable()                         \
-        do {                                            \
-                asm volatile (" msrset  r0, %0;         \
-                                nop;"                   \
-                                :                       \
-                                : "i"(MSR_IE)           \
-                                : "memory");            \
-        } while (0)
-
-# else /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR == 0 */
-
-# define raw_local_irq_save(flags)                              \
-        do {                                                    \
-                register unsigned tmp;                          \
-                asm volatile (" mfs     %0, rmsr;               \
-                                nop;                            \
-                                andi    %1, %0, %2;             \
-                                mts     rmsr, %1;               \
-                                nop;"                           \
-                                : "=r"(flags), "=r" (tmp)       \
-                                : "i"(~MSR_IE)                  \
-                                : "memory");                    \
-        } while (0)
-
-# define raw_local_irq_disable()                                \
-        do {                                                    \
-                register unsigned tmp;                          \
-                asm volatile (" mfs     %0, rmsr;               \
-                                nop;                            \
-                                andi    %0, %0, %1;             \
-                                mts     rmsr, %0;               \
-                                nop;"                   \
-                                : "=r"(tmp)                     \
-                                : "i"(~MSR_IE)                  \
-                                : "memory");                    \
-        } while (0)
-
-# define raw_local_irq_enable()                                 \
-        do {                                                    \
-                register unsigned tmp;                          \
-                asm volatile (" mfs     %0, rmsr;               \
-                                nop;                            \
-                                ori     %0, %0, %1;             \
-                                mts     rmsr, %0;               \
-                                nop;"                           \
-                                : "=r"(tmp)                     \
-                                : "i"(MSR_IE)                   \
-                                : "memory");                    \
-        } while (0)
-
-# endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
-
-#define raw_local_irq_restore(flags)                            \
-        do {                                                    \
-                asm volatile (" mts     rmsr, %0;               \
-                                nop;"                           \
-                                :                               \
-                                : "r"(flags)                    \
-                                : "memory");                    \
-        } while (0)
-
-static inline unsigned long get_msr(void)
+#ifdef CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
+
+static inline unsigned long arch_local_irq_save(void)
+{
+        unsigned long flags;
+        asm volatile("  msrclr %0, %1   \n"
+                     "  nop             \n"
+                     : "=r"(flags)
+                     : "i"(MSR_IE)
+                     : "memory");
+        return flags;
+}
+
+static inline void arch_local_irq_disable(void)
+{
+        /* this uses r0 without declaring it - is that correct? */
+        asm volatile("  msrclr r0, %0   \n"
+                     "  nop             \n"
+                     :
+                     : "i"(MSR_IE)
+                     : "memory");
+}
+
+static inline void arch_local_irq_enable(void)
+{
+        /* this uses r0 without declaring it - is that correct? */
+        asm volatile("  msrset  r0, %0  \n"
+                     "  nop             \n"
+                     :
+                     : "i"(MSR_IE)
+                     : "memory");
+}
+
+#else /* !CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
+
+static inline unsigned long arch_local_irq_save(void)
+{
+        unsigned long flags, tmp;
+        asm volatile (" mfs     %0, rmsr        \n"
+                      " nop                     \n"
+                      " andi    %1, %0, %2      \n"
+                      " mts     rmsr, %1        \n"
+                      " nop                     \n"
+                      : "=r"(flags), "=r"(tmp)
+                      : "i"(~MSR_IE)
+                      : "memory");
+        return flags;
+}
+
+static inline void arch_local_irq_disable(void)
+{
+        unsigned long tmp;
+        asm volatile("  mfs     %0, rmsr        \n"
+                     "  nop                     \n"
+                     "  andi    %0, %0, %1      \n"
+                     "  mts     rmsr, %0        \n"
+                     "  nop                     \n"
+                     : "=r"(tmp)
+                     : "i"(~MSR_IE)
+                     : "memory");
+}
+
+static inline void arch_local_irq_enable(void)
+{
+        unsigned long tmp;
+        asm volatile("  mfs     %0, rmsr        \n"
+                     "  nop                     \n"
+                     "  ori     %0, %0, %1      \n"
+                     "  mts     rmsr, %0        \n"
+                     "  nop                     \n"
+                     : "=r"(tmp)
+                     : "i"(MSR_IE)
+                     : "memory");
+}
+
+#endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
+
+static inline unsigned long arch_local_save_flags(void)
 {
         unsigned long flags;
-        asm volatile (" mfs     %0, rmsr;       \
-                        nop;"                   \
-                        : "=r"(flags)           \
-                        :                       \
-                        : "memory");            \
+        asm volatile("  mfs     %0, rmsr        \n"
+                     "  nop                     \n"
+                     : "=r"(flags)
+                     :
+                     : "memory");
         return flags;
 }
 
-#define raw_local_save_flags(flags)     ((flags) = get_msr())
-#define raw_irqs_disabled()             ((get_msr() & MSR_IE) == 0)
-#define raw_irqs_disabled_flags(flags)  ((flags & MSR_IE) == 0)
+static inline void arch_local_irq_restore(unsigned long flags)
+{
+        asm volatile("  mts     rmsr, %0        \n"
+                     "  nop                     \n"
+                     :
+                     : "r"(flags)
+                     : "memory");
+}
+
+static inline bool arch_irqs_disabled_flags(unsigned long flags)
+{
+        return (flags & MSR_IE) == 0;
+}
+
+static inline bool arch_irqs_disabled(void)
+{
+        return arch_irqs_disabled_flags(arch_local_save_flags());
+}
 
 #endif /* _ASM_MICROBLAZE_IRQFLAGS_H */
diff --git a/arch/microblaze/include/asm/memblock.h b/arch/microblaze/include/asm/memblock.h
index f9c2fa331d2..20a8e257c77 100644
--- a/arch/microblaze/include/asm/memblock.h
+++ b/arch/microblaze/include/asm/memblock.h
@@ -9,9 +9,6 @@
 #ifndef _ASM_MICROBLAZE_MEMBLOCK_H
 #define _ASM_MICROBLAZE_MEMBLOCK_H
 
-/* MEMBLOCK limit is OFF */
-#define MEMBLOCK_REAL_LIMIT     0xFFFFFFFF
-
 #endif /* _ASM_MICROBLAZE_MEMBLOCK_H */
 
 
diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h
index cf377d91da7..ed9d0f6e2cd 100644
--- a/arch/microblaze/include/asm/page.h
+++ b/arch/microblaze/include/asm/page.h
@@ -205,9 +205,6 @@ extern int page_is_ram(unsigned long pfn);
 #define TOPHYS(addr)  __virt_to_phys(addr)
 
 #ifdef CONFIG_MMU
-#ifdef CONFIG_CONTIGUOUS_PAGE_ALLOC
-#define WANT_PAGE_VIRTUAL 1 /* page alloc 2 relies on this */
-#endif
 
 #define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
                                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index 5a388eeeb28..2232ff942ba 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -165,5 +165,7 @@ extern void __init xilinx_pci_init(void);
 static inline void __init xilinx_pci_init(void) { return; }
 #endif
 
+#include <asm-generic/pci-dma-compat.h>
+
 #endif  /* __KERNEL__ */
 #endif /* __ASM_MICROBLAZE_PCI_H */
diff --git a/arch/microblaze/include/asm/pgalloc.h b/arch/microblaze/include/asm/pgalloc.h
index c614a893f8a..ebd35792482 100644
--- a/arch/microblaze/include/asm/pgalloc.h
+++ b/arch/microblaze/include/asm/pgalloc.h
@@ -165,7 +165,8 @@ extern inline void pte_free(struct mm_struct *mm, struct page *ptepage)
 
 #define __pte_free_tlb(tlb, pte, addr)  pte_free((tlb)->mm, (pte))
 
-#define pmd_populate(mm, pmd, pte)      (pmd_val(*(pmd)) = page_address(pte))
+#define pmd_populate(mm, pmd, pte) \
+                        (pmd_val(*(pmd)) = (unsigned long)page_address(pte))
 
 #define pmd_populate_kernel(mm, pmd, pte) \
                 (pmd_val(*(pmd)) = (unsigned long) (pte))
diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h
index ca2d9287154..d4f421672d3 100644
--- a/arch/microblaze/include/asm/pgtable.h
+++ b/arch/microblaze/include/asm/pgtable.h
@@ -57,6 +57,13 @@ static inline int pte_file(pte_t pte) { return 0; }
 
 #define pgprot_noncached_wc(prot)       prot
 
+/*
+ * All 32bit addresses are effectively valid for vmalloc...
+ * Sort of meaningless for non-VM targets.
+ */
+#define VMALLOC_START   0
+#define VMALLOC_END     0xffffffff
+
 #else /* CONFIG_MMU */
 
 #include <asm-generic/4level-fixup.h>
diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h
index 101fa098f62..bdc38312ae4 100644
--- a/arch/microblaze/include/asm/prom.h
+++ b/arch/microblaze/include/asm/prom.h
@@ -27,6 +27,7 @@
 
 /* Other Prototypes */
 extern int early_uartlite_console(void);
+extern int early_uart16550_console(void);
 
 #ifdef CONFIG_PCI
 /*
diff --git a/arch/microblaze/include/asm/pvr.h b/arch/microblaze/include/asm/pvr.h
index 9578666e98b..37db96a15b4 100644
--- a/arch/microblaze/include/asm/pvr.h
+++ b/arch/microblaze/include/asm/pvr.h
@@ -30,7 +30,9 @@ struct pvr_s {
 #define PVR0_USE_EXC_MASK               0x04000000
 #define PVR0_USE_ICACHE_MASK            0x02000000
 #define PVR0_USE_DCACHE_MASK            0x01000000
-#define PVR0_USE_MMU                    0x00800000      /* new */
+#define PVR0_USE_MMU                    0x00800000
+#define PVR0_USE_BTC                    0x00400000
+#define PVR0_ENDI                       0x00200000
 #define PVR0_VERSION_MASK               0x0000FF00
 #define PVR0_USER1_MASK                 0x000000FF
 
@@ -38,9 +40,9 @@ struct pvr_s {
 #define PVR1_USER2_MASK                 0xFFFFFFFF
 
 /* Configuration PVR masks */
-#define PVR2_D_OPB_MASK                 0x80000000
+#define PVR2_D_OPB_MASK                 0x80000000 /* or AXI */
 #define PVR2_D_LMB_MASK                 0x40000000
-#define PVR2_I_OPB_MASK                 0x20000000
+#define PVR2_I_OPB_MASK                 0x20000000 /* or AXI */
 #define PVR2_I_LMB_MASK                 0x10000000
 #define PVR2_INTERRUPT_IS_EDGE_MASK     0x08000000
 #define PVR2_EDGE_IS_POSITIVE_MASK      0x04000000
@@ -63,8 +65,8 @@ struct pvr_s {
 #define PVR2_OPCODE_0x0_ILL_MASK        0x00000040
 #define PVR2_UNALIGNED_EXC_MASK         0x00000020
 #define PVR2_ILL_OPCODE_EXC_MASK        0x00000010
-#define PVR2_IOPB_BUS_EXC_MASK          0x00000008
-#define PVR2_DOPB_BUS_EXC_MASK          0x00000004
+#define PVR2_IOPB_BUS_EXC_MASK          0x00000008 /* or AXI */
+#define PVR2_DOPB_BUS_EXC_MASK          0x00000004 /* or AXI */
 #define PVR2_DIV_ZERO_EXC_MASK          0x00000002
 #define PVR2_FPU_EXC_MASK               0x00000001
 
@@ -208,6 +210,8 @@ struct pvr_s {
 #define PVR_MMU_TLB_ACCESS(pvr) (pvr.pvr[11] & PVR11_MMU_TLB_ACCESS)
 #define PVR_MMU_ZONES(pvr)      (pvr.pvr[11] & PVR11_MMU_ZONES)
 
+/* endian */
+#define PVR_ENDIAN(pvr) (pvr.pvr[0] & PVR0_ENDI)
 
 int cpu_has_pvr(void);
 void get_pvr(struct pvr_s *pvr);
diff --git a/arch/microblaze/include/asm/seccomp.h b/arch/microblaze/include/asm/seccomp.h
new file mode 100644
index 00000000000..0d912758a0d
--- /dev/null
+++ b/arch/microblaze/include/asm/seccomp.h
@@ -0,0 +1,16 @@
+#ifndef _ASM_MICROBLAZE_SECCOMP_H
+#define _ASM_MICROBLAZE_SECCOMP_H
+
+#include <linux/unistd.h>
+
+#define __NR_seccomp_read               __NR_read
+#define __NR_seccomp_write              __NR_write
+#define __NR_seccomp_exit               __NR_exit
+#define __NR_seccomp_sigreturn          __NR_sigreturn
+
+#define __NR_seccomp_read_32            __NR_read
+#define __NR_seccomp_write_32           __NR_write
+#define __NR_seccomp_exit_32            __NR_exit
+#define __NR_seccomp_sigreturn_32       __NR_sigreturn
+
+#endif  /* _ASM_MICROBLAZE_SECCOMP_H */
diff --git a/arch/microblaze/include/asm/setup.h b/arch/microblaze/include/asm/setup.h
index 782b5c89248..8f3968971e4 100644
--- a/arch/microblaze/include/asm/setup.h
+++ b/arch/microblaze/include/asm/setup.h
@@ -25,6 +25,12 @@ void early_printk(const char *fmt, ...);
 int setup_early_printk(char *opt);
 void disable_early_printk(void);
 
+#if defined(CONFIG_EARLY_PRINTK)
+#define eprintk early_printk
+#else
+#define eprintk printk
+#endif
+
 void heartbeat(void);
 void setup_heartbeat(void);
 
diff --git a/arch/microblaze/include/asm/thread_info.h b/arch/microblaze/include/asm/thread_info.h
index 8a8e9fc6e0c..b73da2ac21b 100644
--- a/arch/microblaze/include/asm/thread_info.h
+++ b/arch/microblaze/include/asm/thread_info.h
@@ -127,23 +127,19 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_SECCOMP             10      /* secure computing */
 #define TIF_FREEZE              14      /* Freezing for suspend */
 
-/* FIXME change in entry.S */
-#define TIF_KERNEL_TRACE        8       /* kernel trace active */
-
 /* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_POLLING_NRFLAG      16
 
-#define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
-#define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
-#define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
-#define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
-#define _TIF_SINGLESTEP         (1<<TIF_SINGLESTEP)
-#define _TIF_IRET               (1<<TIF_IRET)
-#define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
-#define _TIF_FREEZE             (1<<TIF_FREEZE)
+#define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
+#define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
+#define _TIF_SIGPENDING         (1 << TIF_SIGPENDING)
+#define _TIF_NEED_RESCHED       (1 << TIF_NEED_RESCHED)
+#define _TIF_SINGLESTEP         (1 << TIF_SINGLESTEP)
+#define _TIF_IRET               (1 << TIF_IRET)
+#define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
+#define _TIF_FREEZE             (1 << TIF_FREEZE)
 #define _TIF_SYSCALL_AUDIT      (1 << TIF_SYSCALL_AUDIT)
 #define _TIF_SECCOMP            (1 << TIF_SECCOMP)
-#define _TIF_KERNEL_TRACE       (1 << TIF_KERNEL_TRACE)
 
 /* work to do in syscall trace */
 #define _TIF_WORK_SYSCALL_MASK  (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \
diff --git a/arch/microblaze/include/asm/unaligned.h b/arch/microblaze/include/asm/unaligned.h
index 3658d91ac0f..2b97cbe500e 100644
--- a/arch/microblaze/include/asm/unaligned.h
+++ b/arch/microblaze/include/asm/unaligned.h
@@ -12,12 +12,18 @@
 
 # ifdef __KERNEL__
 
-# include <linux/unaligned/be_struct.h>
+# include <linux/unaligned/be_byteshift.h>
 # include <linux/unaligned/le_byteshift.h>
 # include <linux/unaligned/generic.h>
 
-# define get_unaligned  __get_unaligned_be
-# define put_unaligned  __put_unaligned_be
+
+#  ifdef __MICROBLAZEEL__
+#   define get_unaligned        __get_unaligned_le
+#   define put_unaligned        __put_unaligned_le
+#  else
+#   define get_unaligned        __get_unaligned_be
+#   define put_unaligned        __put_unaligned_be
+#  endif
 
 # endif /* __KERNEL__ */
 #endif /* _ASM_MICROBLAZE_UNALIGNED_H */
diff --git a/arch/microblaze/include/asm/unistd.h b/arch/microblaze/include/asm/unistd.h
index 2b67e92a773..d770b00ec6b 100644
--- a/arch/microblaze/include/asm/unistd.h
+++ b/arch/microblaze/include/asm/unistd.h
@@ -383,8 +383,11 @@
 #define __NR_rt_tgsigqueueinfo  365 /* new */
 #define __NR_perf_event_open    366 /* new */
 #define __NR_recvmmsg           367 /* new */
+#define __NR_fanotify_init      368
+#define __NR_fanotify_mark      369
+#define __NR_prlimit64          370
 
-#define __NR_syscalls           368
+#define __NR_syscalls           371
 
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__