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-rw-r--r--arch/blackfin/include/asm/bfin_serial.h2
-rw-r--r--arch/blackfin/kernel/time.c6
-rw-r--r--arch/blackfin/lib/outs.S16
-rw-r--r--arch/blackfin/mach-common/cache.S2
4 files changed, 18 insertions, 8 deletions
diff --git a/arch/blackfin/include/asm/bfin_serial.h b/arch/blackfin/include/asm/bfin_serial.h
index 1ff9f1468c0..7dbc664eab1 100644
--- a/arch/blackfin/include/asm/bfin_serial.h
+++ b/arch/blackfin/include/asm/bfin_serial.h
@@ -10,6 +10,7 @@
10#define __BFIN_ASM_SERIAL_H__ 10#define __BFIN_ASM_SERIAL_H__
11 11
12#include <linux/serial_core.h> 12#include <linux/serial_core.h>
13#include <linux/spinlock.h>
13#include <mach/anomaly.h> 14#include <mach/anomaly.h>
14#include <mach/bfin_serial.h> 15#include <mach/bfin_serial.h>
15 16
@@ -41,6 +42,7 @@ struct bfin_serial_port {
41 struct circ_buf rx_dma_buf; 42 struct circ_buf rx_dma_buf;
42 struct timer_list rx_dma_timer; 43 struct timer_list rx_dma_timer;
43 int rx_dma_nrows; 44 int rx_dma_nrows;
45 spinlock_t rx_lock;
44 unsigned int tx_dma_channel; 46 unsigned int tx_dma_channel;
45 unsigned int rx_dma_channel; 47 unsigned int rx_dma_channel;
46 struct work_struct tx_dma_workqueue; 48 struct work_struct tx_dma_workqueue;
diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c
index c9113619029..8d73724c009 100644
--- a/arch/blackfin/kernel/time.c
+++ b/arch/blackfin/kernel/time.c
@@ -114,16 +114,14 @@ u32 arch_gettimeoffset(void)
114 114
115/* 115/*
116 * timer_interrupt() needs to keep up the real-time clock, 116 * timer_interrupt() needs to keep up the real-time clock,
117 * as well as call the "do_timer()" routine every clocktick 117 * as well as call the "xtime_update()" routine every clocktick
118 */ 118 */
119#ifdef CONFIG_CORE_TIMER_IRQ_L1 119#ifdef CONFIG_CORE_TIMER_IRQ_L1
120__attribute__((l1_text)) 120__attribute__((l1_text))
121#endif 121#endif
122irqreturn_t timer_interrupt(int irq, void *dummy) 122irqreturn_t timer_interrupt(int irq, void *dummy)
123{ 123{
124 write_seqlock(&xtime_lock); 124 xtime_update(1);
125 do_timer(1);
126 write_sequnlock(&xtime_lock);
127 125
128#ifdef CONFIG_IPIPE 126#ifdef CONFIG_IPIPE
129 update_root_process_times(get_irq_regs()); 127 update_root_process_times(get_irq_regs());
diff --git a/arch/blackfin/lib/outs.S b/arch/blackfin/lib/outs.S
index 250f4d4b943..06a5e674401 100644
--- a/arch/blackfin/lib/outs.S
+++ b/arch/blackfin/lib/outs.S
@@ -13,6 +13,8 @@
13.align 2 13.align 2
14 14
15ENTRY(_outsl) 15ENTRY(_outsl)
16 CC = R2 == 0;
17 IF CC JUMP 1f;
16 P0 = R0; /* P0 = port */ 18 P0 = R0; /* P0 = port */
17 P1 = R1; /* P1 = address */ 19 P1 = R1; /* P1 = address */
18 P2 = R2; /* P2 = count */ 20 P2 = R2; /* P2 = count */
@@ -20,10 +22,12 @@ ENTRY(_outsl)
20 LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2; 22 LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2;
21.Llong_loop_s: R0 = [P1++]; 23.Llong_loop_s: R0 = [P1++];
22.Llong_loop_e: [P0] = R0; 24.Llong_loop_e: [P0] = R0;
23 RTS; 251: RTS;
24ENDPROC(_outsl) 26ENDPROC(_outsl)
25 27
26ENTRY(_outsw) 28ENTRY(_outsw)
29 CC = R2 == 0;
30 IF CC JUMP 1f;
27 P0 = R0; /* P0 = port */ 31 P0 = R0; /* P0 = port */
28 P1 = R1; /* P1 = address */ 32 P1 = R1; /* P1 = address */
29 P2 = R2; /* P2 = count */ 33 P2 = R2; /* P2 = count */
@@ -31,10 +35,12 @@ ENTRY(_outsw)
31 LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2; 35 LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2;
32.Lword_loop_s: R0 = W[P1++]; 36.Lword_loop_s: R0 = W[P1++];
33.Lword_loop_e: W[P0] = R0; 37.Lword_loop_e: W[P0] = R0;
34 RTS; 381: RTS;
35ENDPROC(_outsw) 39ENDPROC(_outsw)
36 40
37ENTRY(_outsb) 41ENTRY(_outsb)
42 CC = R2 == 0;
43 IF CC JUMP 1f;
38 P0 = R0; /* P0 = port */ 44 P0 = R0; /* P0 = port */
39 P1 = R1; /* P1 = address */ 45 P1 = R1; /* P1 = address */
40 P2 = R2; /* P2 = count */ 46 P2 = R2; /* P2 = count */
@@ -42,10 +48,12 @@ ENTRY(_outsb)
42 LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2; 48 LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2;
43.Lbyte_loop_s: R0 = B[P1++]; 49.Lbyte_loop_s: R0 = B[P1++];
44.Lbyte_loop_e: B[P0] = R0; 50.Lbyte_loop_e: B[P0] = R0;
45 RTS; 511: RTS;
46ENDPROC(_outsb) 52ENDPROC(_outsb)
47 53
48ENTRY(_outsw_8) 54ENTRY(_outsw_8)
55 CC = R2 == 0;
56 IF CC JUMP 1f;
49 P0 = R0; /* P0 = port */ 57 P0 = R0; /* P0 = port */
50 P1 = R1; /* P1 = address */ 58 P1 = R1; /* P1 = address */
51 P2 = R2; /* P2 = count */ 59 P2 = R2; /* P2 = count */
@@ -56,5 +64,5 @@ ENTRY(_outsw_8)
56 R0 = R0 << 8; 64 R0 = R0 << 8;
57 R0 = R0 + R1; 65 R0 = R0 + R1;
58.Lword8_loop_e: W[P0] = R0; 66.Lword8_loop_e: W[P0] = R0;
59 RTS; 671: RTS;
60ENDPROC(_outsw_8) 68ENDPROC(_outsw_8)
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index 790c767ca95..ab4a925a443 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -58,6 +58,8 @@
581: 581:
59.ifeqs "\flushins", BROK_FLUSH_INST 59.ifeqs "\flushins", BROK_FLUSH_INST
60 \flushins [P0++]; 60 \flushins [P0++];
61 nop;
62 nop;
612: nop; 632: nop;
62.else 64.else
632: \flushins [P0++]; 652: \flushins [P0++];