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-rw-r--r--arch/blackfin/mach-common/cpufreq.c4
-rw-r--r--arch/blackfin/mach-common/ints-priority.c24
-rw-r--r--arch/blackfin/mach-common/pm.c10
3 files changed, 19 insertions, 19 deletions
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index 4391d03dc84..f4cf11d362e 100644
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -134,7 +134,7 @@ static int bfin_target(struct cpufreq_policy *poli,
134 134
135 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 135 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
136 if (cpu == CPUFREQ_CPU) { 136 if (cpu == CPUFREQ_CPU) {
137 local_irq_save_hw(flags); 137 flags = hard_local_irq_save();
138 plldiv = (bfin_read_PLL_DIV() & SSEL) | 138 plldiv = (bfin_read_PLL_DIV() & SSEL) |
139 dpm_state_table[index].csel; 139 dpm_state_table[index].csel;
140 bfin_write_PLL_DIV(plldiv); 140 bfin_write_PLL_DIV(plldiv);
@@ -155,7 +155,7 @@ static int bfin_target(struct cpufreq_policy *poli,
155 loops_per_jiffy = cpufreq_scale(lpj_ref, 155 loops_per_jiffy = cpufreq_scale(lpj_ref,
156 lpj_ref_freq, freqs.new); 156 lpj_ref_freq, freqs.new);
157 } 157 }
158 local_irq_restore_hw(flags); 158 hard_local_irq_restore(flags);
159 } 159 }
160 /* TODO: just test case for cycles clock source, remove later */ 160 /* TODO: just test case for cycles clock source, remove later */
161 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 161 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 1c8c4c7245c..eaece5f84e4 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -132,8 +132,8 @@ static void bfin_ack_noop(unsigned int irq)
132static void bfin_core_mask_irq(unsigned int irq) 132static void bfin_core_mask_irq(unsigned int irq)
133{ 133{
134 bfin_irq_flags &= ~(1 << irq); 134 bfin_irq_flags &= ~(1 << irq);
135 if (!irqs_disabled_hw()) 135 if (!hard_irqs_disabled())
136 local_irq_enable_hw(); 136 hard_local_irq_enable();
137} 137}
138 138
139static void bfin_core_unmask_irq(unsigned int irq) 139static void bfin_core_unmask_irq(unsigned int irq)
@@ -148,8 +148,8 @@ static void bfin_core_unmask_irq(unsigned int irq)
148 * local_irq_enable just does "STI bfin_irq_flags", so it's exactly 148 * local_irq_enable just does "STI bfin_irq_flags", so it's exactly
149 * what we need. 149 * what we need.
150 */ 150 */
151 if (!irqs_disabled_hw()) 151 if (!hard_irqs_disabled())
152 local_irq_enable_hw(); 152 hard_local_irq_enable();
153 return; 153 return;
154} 154}
155 155
@@ -158,12 +158,12 @@ static void bfin_internal_mask_irq(unsigned int irq)
158 unsigned long flags; 158 unsigned long flags;
159 159
160#ifdef CONFIG_BF53x 160#ifdef CONFIG_BF53x
161 local_irq_save_hw(flags); 161 flags = hard_local_irq_save();
162 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() & 162 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &
163 ~(1 << SIC_SYSIRQ(irq))); 163 ~(1 << SIC_SYSIRQ(irq)));
164#else 164#else
165 unsigned mask_bank, mask_bit; 165 unsigned mask_bank, mask_bit;
166 local_irq_save_hw(flags); 166 flags = hard_local_irq_save();
167 mask_bank = SIC_SYSIRQ(irq) / 32; 167 mask_bank = SIC_SYSIRQ(irq) / 32;
168 mask_bit = SIC_SYSIRQ(irq) % 32; 168 mask_bit = SIC_SYSIRQ(irq) % 32;
169 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) & 169 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) &
@@ -173,7 +173,7 @@ static void bfin_internal_mask_irq(unsigned int irq)
173 ~(1 << mask_bit)); 173 ~(1 << mask_bit));
174#endif 174#endif
175#endif 175#endif
176 local_irq_restore_hw(flags); 176 hard_local_irq_restore(flags);
177} 177}
178 178
179#ifdef CONFIG_SMP 179#ifdef CONFIG_SMP
@@ -186,12 +186,12 @@ static void bfin_internal_unmask_irq(unsigned int irq)
186 unsigned long flags; 186 unsigned long flags;
187 187
188#ifdef CONFIG_BF53x 188#ifdef CONFIG_BF53x
189 local_irq_save_hw(flags); 189 flags = hard_local_irq_save();
190 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() | 190 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() |
191 (1 << SIC_SYSIRQ(irq))); 191 (1 << SIC_SYSIRQ(irq)));
192#else 192#else
193 unsigned mask_bank, mask_bit; 193 unsigned mask_bank, mask_bit;
194 local_irq_save_hw(flags); 194 flags = hard_local_irq_save();
195 mask_bank = SIC_SYSIRQ(irq) / 32; 195 mask_bank = SIC_SYSIRQ(irq) / 32;
196 mask_bit = SIC_SYSIRQ(irq) % 32; 196 mask_bit = SIC_SYSIRQ(irq) % 32;
197#ifdef CONFIG_SMP 197#ifdef CONFIG_SMP
@@ -207,7 +207,7 @@ static void bfin_internal_unmask_irq(unsigned int irq)
207 (1 << mask_bit)); 207 (1 << mask_bit));
208#endif 208#endif
209#endif 209#endif
210 local_irq_restore_hw(flags); 210 hard_local_irq_restore(flags);
211} 211}
212 212
213#ifdef CONFIG_SMP 213#ifdef CONFIG_SMP
@@ -264,7 +264,7 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state)
264 break; 264 break;
265 } 265 }
266 266
267 local_irq_save_hw(flags); 267 flags = hard_local_irq_save();
268 268
269 if (state) { 269 if (state) {
270 bfin_sic_iwr[bank] |= (1 << bit); 270 bfin_sic_iwr[bank] |= (1 << bit);
@@ -275,7 +275,7 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state)
275 vr_wakeup &= ~wakeup; 275 vr_wakeup &= ~wakeup;
276 } 276 }
277 277
278 local_irq_restore_hw(flags); 278 hard_local_irq_restore(flags);
279 279
280 return 0; 280 return 0;
281} 281}
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index 09c1fb41074..80884b136a0 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
@@ -25,7 +25,7 @@ void bfin_pm_suspend_standby_enter(void)
25{ 25{
26 unsigned long flags; 26 unsigned long flags;
27 27
28 local_irq_save_hw(flags); 28 flags = hard_local_irq_save();
29 bfin_pm_standby_setup(); 29 bfin_pm_standby_setup();
30 30
31#ifdef CONFIG_PM_BFIN_SLEEP_DEEPER 31#ifdef CONFIG_PM_BFIN_SLEEP_DEEPER
@@ -56,7 +56,7 @@ void bfin_pm_suspend_standby_enter(void)
56 bfin_write_SIC_IWR(IWR_DISABLE_ALL); 56 bfin_write_SIC_IWR(IWR_DISABLE_ALL);
57#endif 57#endif
58 58
59 local_irq_restore_hw(flags); 59 hard_local_irq_restore(flags);
60} 60}
61 61
62int bf53x_suspend_l1_mem(unsigned char *memptr) 62int bf53x_suspend_l1_mem(unsigned char *memptr)
@@ -149,12 +149,12 @@ int bfin_pm_suspend_mem_enter(void)
149 wakeup |= GPWE; 149 wakeup |= GPWE;
150#endif 150#endif
151 151
152 local_irq_save_hw(flags); 152 flags = hard_local_irq_save();
153 153
154 ret = blackfin_dma_suspend(); 154 ret = blackfin_dma_suspend();
155 155
156 if (ret) { 156 if (ret) {
157 local_irq_restore_hw(flags); 157 hard_local_irq_restore(flags);
158 kfree(memptr); 158 kfree(memptr);
159 return ret; 159 return ret;
160 } 160 }
@@ -178,7 +178,7 @@ int bfin_pm_suspend_mem_enter(void)
178 bfin_gpio_pm_hibernate_restore(); 178 bfin_gpio_pm_hibernate_restore();
179 blackfin_dma_resume(); 179 blackfin_dma_resume();
180 180
181 local_irq_restore_hw(flags); 181 hard_local_irq_restore(flags);
182 kfree(memptr); 182 kfree(memptr);
183 183
184 return 0; 184 return 0;