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-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537e.c51
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537u.c63
-rw-r--r--arch/blackfin/mach-bf537/boards/dnp5370.c2
-rw-r--r--arch/blackfin/mach-bf537/boards/minotaur.c2
-rw-r--r--arch/blackfin/mach-bf537/boards/pnav10.c38
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c176
-rw-r--r--arch/blackfin/mach-bf537/boards/tcm_bf537.c51
-rw-r--r--arch/blackfin/mach-bf537/include/mach/anomaly.h34
8 files changed, 153 insertions, 264 deletions
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537e.c b/arch/blackfin/mach-bf537/boards/cm_bf537e.c
index d582b810e7a..44fd8409db1 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537e.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537e.c
@@ -61,29 +61,12 @@ static struct flash_platform_data bfin_spi_flash_data = {
61/* SPI flash chip (m25p64) */ 61/* SPI flash chip (m25p64) */
62static struct bfin5xx_spi_chip spi_flash_chip_info = { 62static struct bfin5xx_spi_chip spi_flash_chip_info = {
63 .enable_dma = 0, /* use dma transfer with this chip*/ 63 .enable_dma = 0, /* use dma transfer with this chip*/
64 .bits_per_word = 8,
65};
66#endif
67
68#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
69/* SPI ADC chip */
70static struct bfin5xx_spi_chip spi_adc_chip_info = {
71 .enable_dma = 1, /* use dma transfer with this chip*/
72 .bits_per_word = 16,
73};
74#endif
75
76#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
77static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
78 .enable_dma = 0,
79 .bits_per_word = 16,
80}; 64};
81#endif 65#endif
82 66
83#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 67#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
84static struct bfin5xx_spi_chip mmc_spi_chip_info = { 68static struct bfin5xx_spi_chip mmc_spi_chip_info = {
85 .enable_dma = 0, 69 .enable_dma = 0,
86 .bits_per_word = 8,
87}; 70};
88#endif 71#endif
89 72
@@ -101,24 +84,12 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
101 }, 84 },
102#endif 85#endif
103 86
104#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
105 {
106 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
107 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
108 .bus_num = 0, /* Framework bus number */
109 .chip_select = 1, /* Framework chip select. */
110 .platform_data = NULL, /* No spi_driver specific config */
111 .controller_data = &spi_adc_chip_info,
112 },
113#endif
114
115#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) 87#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
116 { 88 {
117 .modalias = "ad183x", 89 .modalias = "ad183x",
118 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 90 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
119 .bus_num = 0, 91 .bus_num = 0,
120 .chip_select = 4, 92 .chip_select = 4,
121 .controller_data = &ad1836_spi_chip_info,
122 }, 93 },
123#endif 94#endif
124 95
@@ -766,6 +737,24 @@ static struct platform_device *cm_bf537e_devices[] __initdata = {
766#endif 737#endif
767}; 738};
768 739
740static int __init net2272_init(void)
741{
742#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
743 int ret;
744
745 ret = gpio_request(GPIO_PG14, "net2272");
746 if (ret)
747 return ret;
748
749 /* Reset USB Chip, PG14 */
750 gpio_direction_output(GPIO_PG14, 0);
751 mdelay(2);
752 gpio_set_value(GPIO_PG14, 1);
753#endif
754
755 return 0;
756}
757
769static int __init cm_bf537e_init(void) 758static int __init cm_bf537e_init(void)
770{ 759{
771 printk(KERN_INFO "%s(): registering device resources\n", __func__); 760 printk(KERN_INFO "%s(): registering device resources\n", __func__);
@@ -777,6 +766,10 @@ static int __init cm_bf537e_init(void)
777#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 766#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
778 irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN); 767 irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
779#endif 768#endif
769
770 if (net2272_init())
771 pr_warning("unable to configure net2272; it probably won't work\n");
772
780 return 0; 773 return 0;
781} 774}
782 775
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537u.c b/arch/blackfin/mach-bf537/boards/cm_bf537u.c
index cbb8098604c..1b4ac5c64aa 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537u.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537u.c
@@ -62,29 +62,12 @@ static struct flash_platform_data bfin_spi_flash_data = {
62/* SPI flash chip (m25p64) */ 62/* SPI flash chip (m25p64) */
63static struct bfin5xx_spi_chip spi_flash_chip_info = { 63static struct bfin5xx_spi_chip spi_flash_chip_info = {
64 .enable_dma = 0, /* use dma transfer with this chip*/ 64 .enable_dma = 0, /* use dma transfer with this chip*/
65 .bits_per_word = 8,
66};
67#endif
68
69#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
70/* SPI ADC chip */
71static struct bfin5xx_spi_chip spi_adc_chip_info = {
72 .enable_dma = 1, /* use dma transfer with this chip*/
73 .bits_per_word = 16,
74};
75#endif
76
77#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
78static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
79 .enable_dma = 0,
80 .bits_per_word = 16,
81}; 65};
82#endif 66#endif
83 67
84#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 68#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
85static struct bfin5xx_spi_chip mmc_spi_chip_info = { 69static struct bfin5xx_spi_chip mmc_spi_chip_info = {
86 .enable_dma = 0, 70 .enable_dma = 0,
87 .bits_per_word = 8,
88}; 71};
89#endif 72#endif
90 73
@@ -102,24 +85,12 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
102 }, 85 },
103#endif 86#endif
104 87
105#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
106 {
107 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
108 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
109 .bus_num = 0, /* Framework bus number */
110 .chip_select = 1, /* Framework chip select. */
111 .platform_data = NULL, /* No spi_driver specific config */
112 .controller_data = &spi_adc_chip_info,
113 },
114#endif
115
116#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) 88#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
117 { 89 {
118 .modalias = "ad183x", 90 .modalias = "ad183x",
119 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 91 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
120 .bus_num = 0, 92 .bus_num = 0,
121 .chip_select = 4, 93 .chip_select = 4,
122 .controller_data = &ad1836_spi_chip_info,
123 }, 94 },
124#endif 95#endif
125 96
@@ -731,6 +702,36 @@ static struct platform_device *cm_bf537u_devices[] __initdata = {
731#endif 702#endif
732}; 703};
733 704
705static int __init net2272_init(void)
706{
707#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
708 int ret;
709
710 ret = gpio_request(GPIO_PH15, driver_name);
711 if (ret)
712 return ret;
713
714 ret = gpio_request(GPIO_PH13, "net2272");
715 if (ret) {
716 gpio_free(GPIO_PH15);
717 return ret;
718 }
719
720 /* Set PH15 Low make /AMS2 work properly */
721 gpio_direction_output(GPIO_PH15, 0);
722
723 /* enable CLKBUF output */
724 bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
725
726 /* Reset the USB chip */
727 gpio_direction_output(GPIO_PH13, 0);
728 mdelay(2);
729 gpio_set_value(GPIO_PH13, 1);
730#endif
731
732 return 0;
733}
734
734static int __init cm_bf537u_init(void) 735static int __init cm_bf537u_init(void)
735{ 736{
736 printk(KERN_INFO "%s(): registering device resources\n", __func__); 737 printk(KERN_INFO "%s(): registering device resources\n", __func__);
@@ -742,6 +743,10 @@ static int __init cm_bf537u_init(void)
742#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 743#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
743 irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN); 744 irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
744#endif 745#endif
746
747 if (net2272_init())
748 pr_warning("unable to configure net2272; it probably won't work\n");
749
745 return 0; 750 return 0;
746} 751}
747 752
diff --git a/arch/blackfin/mach-bf537/boards/dnp5370.c b/arch/blackfin/mach-bf537/boards/dnp5370.c
index 6b4ff4605bf..8bc951de979 100644
--- a/arch/blackfin/mach-bf537/boards/dnp5370.c
+++ b/arch/blackfin/mach-bf537/boards/dnp5370.c
@@ -130,7 +130,6 @@ static struct platform_device asmb_flash_device = {
130 130
131static struct bfin5xx_spi_chip mmc_spi_chip_info = { 131static struct bfin5xx_spi_chip mmc_spi_chip_info = {
132 .enable_dma = 0, /* use no dma transfer with this chip*/ 132 .enable_dma = 0, /* use no dma transfer with this chip*/
133 .bits_per_word = 8,
134}; 133};
135 134
136#endif 135#endif
@@ -161,7 +160,6 @@ static struct flash_platform_data bfin_spi_dataflash_data = {
161 160
162static struct bfin5xx_spi_chip spi_dataflash_chip_info = { 161static struct bfin5xx_spi_chip spi_dataflash_chip_info = {
163 .enable_dma = 0, /* use no dma transfer with this chip*/ 162 .enable_dma = 0, /* use no dma transfer with this chip*/
164 .bits_per_word = 8,
165}; 163};
166#endif 164#endif
167 165
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c
index bfb3671a78d..c62f9dccd9f 100644
--- a/arch/blackfin/mach-bf537/boards/minotaur.c
+++ b/arch/blackfin/mach-bf537/boards/minotaur.c
@@ -159,14 +159,12 @@ static struct flash_platform_data bfin_spi_flash_data = {
159/* SPI flash chip (m25p64) */ 159/* SPI flash chip (m25p64) */
160static struct bfin5xx_spi_chip spi_flash_chip_info = { 160static struct bfin5xx_spi_chip spi_flash_chip_info = {
161 .enable_dma = 0, /* use dma transfer with this chip*/ 161 .enable_dma = 0, /* use dma transfer with this chip*/
162 .bits_per_word = 8,
163}; 162};
164#endif 163#endif
165 164
166#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 165#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
167static struct bfin5xx_spi_chip mmc_spi_chip_info = { 166static struct bfin5xx_spi_chip mmc_spi_chip_info = {
168 .enable_dma = 0, 167 .enable_dma = 0,
169 .bits_per_word = 8,
170}; 168};
171#endif 169#endif
172 170
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 9389f03e3b0..3b8151d99b9 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -184,40 +184,16 @@ static struct flash_platform_data bfin_spi_flash_data = {
184/* SPI flash chip (m25p64) */ 184/* SPI flash chip (m25p64) */
185static struct bfin5xx_spi_chip spi_flash_chip_info = { 185static struct bfin5xx_spi_chip spi_flash_chip_info = {
186 .enable_dma = 0, /* use dma transfer with this chip*/ 186 .enable_dma = 0, /* use dma transfer with this chip*/
187 .bits_per_word = 8,
188};
189#endif
190
191#if defined(CONFIG_BFIN_SPI_ADC) \
192 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
193/* SPI ADC chip */
194static struct bfin5xx_spi_chip spi_adc_chip_info = {
195 .enable_dma = 1, /* use dma transfer with this chip*/
196 .bits_per_word = 16,
197};
198#endif
199
200#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
201 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
202static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
203 .enable_dma = 0,
204 .bits_per_word = 16,
205}; 187};
206#endif 188#endif
207 189
208#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 190#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
209static struct bfin5xx_spi_chip mmc_spi_chip_info = { 191static struct bfin5xx_spi_chip mmc_spi_chip_info = {
210 .enable_dma = 0, 192 .enable_dma = 0,
211 .bits_per_word = 8,
212}; 193};
213#endif 194#endif
214 195
215#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 196#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
216static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
217 .enable_dma = 0,
218 .bits_per_word = 16,
219};
220
221static const struct ad7877_platform_data bfin_ad7877_ts_info = { 197static const struct ad7877_platform_data bfin_ad7877_ts_info = {
222 .model = 7877, 198 .model = 7877,
223 .vref_delay_usecs = 50, /* internal, no capacitor */ 199 .vref_delay_usecs = 50, /* internal, no capacitor */
@@ -248,18 +224,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
248 }, 224 },
249#endif 225#endif
250 226
251#if defined(CONFIG_BFIN_SPI_ADC) \
252 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
253 {
254 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
255 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
256 .bus_num = 0, /* Framework bus number */
257 .chip_select = 1, /* Framework chip select. */
258 .platform_data = NULL, /* No spi_driver specific config */
259 .controller_data = &spi_adc_chip_info,
260 },
261#endif
262
263#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ 227#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
264 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) 228 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
265 { 229 {
@@ -267,7 +231,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
267 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 231 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
268 .bus_num = 0, 232 .bus_num = 0,
269 .chip_select = 4, 233 .chip_select = 4,
270 .controller_data = &ad1836_spi_chip_info,
271 }, 234 },
272#endif 235#endif
273#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 236#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
@@ -288,7 +251,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
288 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 251 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
289 .bus_num = 0, 252 .bus_num = 0,
290 .chip_select = 5, 253 .chip_select = 5,
291 .controller_data = &spi_ad7877_chip_info,
292}, 254},
293#endif 255#endif
294 256
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index 76db1d48317..b52e6728f64 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -367,6 +367,9 @@ static struct resource net2272_bfin_resources[] = {
367 .end = 0x20300000 + 0x100, 367 .end = 0x20300000 + 0x100,
368 .flags = IORESOURCE_MEM, 368 .flags = IORESOURCE_MEM,
369 }, { 369 }, {
370 .start = 1,
371 .flags = IORESOURCE_BUS,
372 }, {
370 .start = IRQ_PF7, 373 .start = IRQ_PF7,
371 .end = IRQ_PF7, 374 .end = IRQ_PF7,
372 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 375 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -533,49 +536,11 @@ static struct flash_platform_data bfin_spi_flash_data = {
533/* SPI flash chip (m25p64) */ 536/* SPI flash chip (m25p64) */
534static struct bfin5xx_spi_chip spi_flash_chip_info = { 537static struct bfin5xx_spi_chip spi_flash_chip_info = {
535 .enable_dma = 0, /* use dma transfer with this chip*/ 538 .enable_dma = 0, /* use dma transfer with this chip*/
536 .bits_per_word = 8,
537};
538#endif
539
540#if defined(CONFIG_BFIN_SPI_ADC) \
541 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
542/* SPI ADC chip */
543static struct bfin5xx_spi_chip spi_adc_chip_info = {
544 .enable_dma = 1, /* use dma transfer with this chip*/
545 .bits_per_word = 16,
546};
547#endif
548
549#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
550 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
551static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
552 .enable_dma = 0,
553 .bits_per_word = 16,
554};
555#endif
556
557#if defined(CONFIG_SND_BF5XX_SOC_AD193X) \
558 || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
559static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
560 .enable_dma = 0,
561 .bits_per_word = 8,
562};
563#endif
564
565#if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) \
566 || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
567static struct bfin5xx_spi_chip adav801_spi_chip_info = {
568 .enable_dma = 0,
569 .bits_per_word = 8,
570}; 539};
571#endif 540#endif
572 541
573#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE) 542#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
574#include <linux/input/ad714x.h> 543#include <linux/input/ad714x.h>
575static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
576 .enable_dma = 0,
577 .bits_per_word = 16,
578};
579 544
580static struct ad714x_slider_plat ad7147_spi_slider_plat[] = { 545static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
581 { 546 {
@@ -685,7 +650,6 @@ static struct ad714x_platform_data ad7142_i2c_platform_data = {
685#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE) 650#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
686static struct bfin5xx_spi_chip ad2s90_spi_chip_info = { 651static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
687 .enable_dma = 0, 652 .enable_dma = 0,
688 .bits_per_word = 16,
689}; 653};
690#endif 654#endif
691 655
@@ -697,7 +661,6 @@ static unsigned short ad2s120x_platform_data[] = {
697 661
698static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = { 662static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
699 .enable_dma = 0, 663 .enable_dma = 0,
700 .bits_per_word = 16,
701}; 664};
702#endif 665#endif
703 666
@@ -714,14 +677,12 @@ static unsigned short ad2s1210_platform_data[] = {
714 677
715static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = { 678static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
716 .enable_dma = 0, 679 .enable_dma = 0,
717 .bits_per_word = 8,
718}; 680};
719#endif 681#endif
720 682
721#if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE) 683#if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
722static struct bfin5xx_spi_chip ad7314_spi_chip_info = { 684static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
723 .enable_dma = 0, 685 .enable_dma = 0,
724 .bits_per_word = 16,
725}; 686};
726#endif 687#endif
727 688
@@ -735,7 +696,6 @@ static unsigned short ad7816_platform_data[] = {
735 696
736static struct bfin5xx_spi_chip ad7816_spi_chip_info = { 697static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
737 .enable_dma = 0, 698 .enable_dma = 0,
738 .bits_per_word = 8,
739}; 699};
740#endif 700#endif
741 701
@@ -749,7 +709,6 @@ static unsigned long adt7310_platform_data[3] = {
749 709
750static struct bfin5xx_spi_chip adt7310_spi_chip_info = { 710static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
751 .enable_dma = 0, 711 .enable_dma = 0,
752 .bits_per_word = 8,
753}; 712};
754#endif 713#endif
755 714
@@ -758,11 +717,6 @@ static unsigned short ad7298_platform_data[] = {
758 GPIO_PF7, /* busy_pin */ 717 GPIO_PF7, /* busy_pin */
759 0, 718 0,
760}; 719};
761
762static struct bfin5xx_spi_chip ad7298_spi_chip_info = {
763 .enable_dma = 0,
764 .bits_per_word = 16,
765};
766#endif 720#endif
767 721
768#if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE) 722#if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
@@ -773,7 +727,6 @@ static unsigned long adt7316_spi_data[2] = {
773 727
774static struct bfin5xx_spi_chip adt7316_spi_chip_info = { 728static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
775 .enable_dma = 0, 729 .enable_dma = 0,
776 .bits_per_word = 8,
777}; 730};
778#endif 731#endif
779 732
@@ -800,18 +753,12 @@ static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
800 753
801static struct bfin5xx_spi_chip mmc_spi_chip_info = { 754static struct bfin5xx_spi_chip mmc_spi_chip_info = {
802 .enable_dma = 0, 755 .enable_dma = 0,
803 .bits_per_word = 8,
804 .pio_interrupt = 0, 756 .pio_interrupt = 0,
805}; 757};
806#endif 758#endif
807 759
808#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 760#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
809#include <linux/spi/ad7877.h> 761#include <linux/spi/ad7877.h>
810static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
811 .enable_dma = 0,
812 .bits_per_word = 16,
813};
814
815static const struct ad7877_platform_data bfin_ad7877_ts_info = { 762static const struct ad7877_platform_data bfin_ad7877_ts_info = {
816 .model = 7877, 763 .model = 7877,
817 .vref_delay_usecs = 50, /* internal, no capacitor */ 764 .vref_delay_usecs = 50, /* internal, no capacitor */
@@ -883,39 +830,13 @@ static const struct adxl34x_platform_data adxl34x_info = {
883}; 830};
884#endif 831#endif
885 832
886#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
887static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
888 .enable_dma = 0,
889 .bits_per_word = 16,
890};
891#endif
892
893#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
894static struct bfin5xx_spi_chip spidev_chip_info = {
895 .enable_dma = 0,
896 .bits_per_word = 8,
897};
898#endif
899
900#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
901static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
902 .enable_dma = 0,
903 .bits_per_word = 8,
904};
905#endif
906
907#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) 833#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
908static struct bfin5xx_spi_chip enc28j60_spi_chip_info = { 834static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
909 .enable_dma = 1, 835 .enable_dma = 1,
910 .bits_per_word = 8,
911}; 836};
912#endif 837#endif
913 838
914#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE) 839#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
915static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
916 .bits_per_word = 16,
917};
918
919#include <linux/spi/adf702x.h> 840#include <linux/spi/adf702x.h>
920#define TXREG 0x0160A470 841#define TXREG 0x0160A470
921static const u32 adf7021_regs[] = { 842static const u32 adf7021_regs[] = {
@@ -959,10 +880,6 @@ static inline void adf702x_mac_init(void) {}
959 880
960#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) 881#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
961#include <linux/spi/ads7846.h> 882#include <linux/spi/ads7846.h>
962static struct bfin5xx_spi_chip ad7873_spi_chip_info = {
963 .bits_per_word = 8,
964};
965
966static int ads7873_get_pendown_state(void) 883static int ads7873_get_pendown_state(void)
967{ 884{
968 return gpio_get_value(GPIO_PF6); 885 return gpio_get_value(GPIO_PF6);
@@ -1009,21 +926,12 @@ static struct flash_platform_data bfin_spi_dataflash_data = {
1009/* DataFlash chip */ 926/* DataFlash chip */
1010static struct bfin5xx_spi_chip data_flash_chip_info = { 927static struct bfin5xx_spi_chip data_flash_chip_info = {
1011 .enable_dma = 0, /* use dma transfer with this chip*/ 928 .enable_dma = 0, /* use dma transfer with this chip*/
1012 .bits_per_word = 8,
1013};
1014#endif
1015
1016#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1017static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
1018 .enable_dma = 0, /* use dma transfer with this chip*/
1019 .bits_per_word = 8,
1020}; 929};
1021#endif 930#endif
1022 931
1023#if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE) 932#if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
1024static struct bfin5xx_spi_chip spi_ad7476_chip_info = { 933static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
1025 .enable_dma = 0, /* use dma transfer with this chip*/ 934 .enable_dma = 0, /* use dma transfer with this chip*/
1026 .bits_per_word = 8,
1027}; 935};
1028#endif 936#endif
1029 937
@@ -1053,17 +961,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1053 .mode = SPI_MODE_3, 961 .mode = SPI_MODE_3,
1054 }, 962 },
1055#endif 963#endif
1056#if defined(CONFIG_BFIN_SPI_ADC) \
1057 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1058 {
1059 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
1060 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
1061 .bus_num = 0, /* Framework bus number */
1062 .chip_select = 1, /* Framework chip select. */
1063 .platform_data = NULL, /* No spi_driver specific config */
1064 .controller_data = &spi_adc_chip_info,
1065 },
1066#endif
1067 964
1068#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ 965#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
1069 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) 966 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
@@ -1073,7 +970,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1073 .bus_num = 0, 970 .bus_num = 0,
1074 .chip_select = 4, 971 .chip_select = 4,
1075 .platform_data = "ad1836", /* only includes chip name for the moment */ 972 .platform_data = "ad1836", /* only includes chip name for the moment */
1076 .controller_data = &ad1836_spi_chip_info,
1077 .mode = SPI_MODE_3, 973 .mode = SPI_MODE_3,
1078 }, 974 },
1079#endif 975#endif
@@ -1084,7 +980,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1084 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 980 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1085 .bus_num = 0, 981 .bus_num = 0,
1086 .chip_select = 5, 982 .chip_select = 5,
1087 .controller_data = &ad1938_spi_chip_info,
1088 .mode = SPI_MODE_3, 983 .mode = SPI_MODE_3,
1089 }, 984 },
1090#endif 985#endif
@@ -1095,7 +990,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1095 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 990 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1096 .bus_num = 0, 991 .bus_num = 0,
1097 .chip_select = 1, 992 .chip_select = 1,
1098 .controller_data = &adav801_spi_chip_info,
1099 .mode = SPI_MODE_3, 993 .mode = SPI_MODE_3,
1100 }, 994 },
1101#endif 995#endif
@@ -1109,7 +1003,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1109 .chip_select = 5, 1003 .chip_select = 5,
1110 .mode = SPI_MODE_3, 1004 .mode = SPI_MODE_3,
1111 .platform_data = &ad7147_spi_platform_data, 1005 .platform_data = &ad7147_spi_platform_data,
1112 .controller_data = &ad7147_spi_chip_info,
1113 }, 1006 },
1114#endif 1007#endif
1115 1008
@@ -1188,7 +1081,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1188 .bus_num = 0, 1081 .bus_num = 0,
1189 .chip_select = 4, /* CS, change it for your board */ 1082 .chip_select = 4, /* CS, change it for your board */
1190 .platform_data = ad7298_platform_data, 1083 .platform_data = ad7298_platform_data,
1191 .controller_data = &ad7298_spi_chip_info,
1192 .mode = SPI_MODE_3, 1084 .mode = SPI_MODE_3,
1193 }, 1085 },
1194#endif 1086#endif
@@ -1225,7 +1117,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1225 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 1117 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
1226 .bus_num = 0, 1118 .bus_num = 0,
1227 .chip_select = 1, 1119 .chip_select = 1,
1228 .controller_data = &spi_ad7877_chip_info,
1229 }, 1120 },
1230#endif 1121#endif
1231#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) 1122#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
@@ -1236,7 +1127,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1236 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ 1127 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1237 .bus_num = 0, 1128 .bus_num = 0,
1238 .chip_select = 1, 1129 .chip_select = 1,
1239 .controller_data = &spi_ad7879_chip_info,
1240 .mode = SPI_CPHA | SPI_CPOL, 1130 .mode = SPI_CPHA | SPI_CPOL,
1241 }, 1131 },
1242#endif 1132#endif
@@ -1246,7 +1136,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1246 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 1136 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1247 .bus_num = 0, 1137 .bus_num = 0,
1248 .chip_select = 1, 1138 .chip_select = 1,
1249 .controller_data = &spidev_chip_info,
1250 }, 1139 },
1251#endif 1140#endif
1252#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 1141#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
@@ -1255,7 +1144,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1255 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ 1144 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1256 .bus_num = 0, 1145 .bus_num = 0,
1257 .chip_select = 2, 1146 .chip_select = 2,
1258 .controller_data = &lq035q1_spi_chip_info,
1259 .mode = SPI_CPHA | SPI_CPOL, 1147 .mode = SPI_CPHA | SPI_CPOL,
1260 }, 1148 },
1261#endif 1149#endif
@@ -1278,7 +1166,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1278 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ 1166 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1279 .bus_num = 0, 1167 .bus_num = 0,
1280 .chip_select = 2, 1168 .chip_select = 2,
1281 .controller_data = &spi_adxl34x_chip_info,
1282 .mode = SPI_MODE_3, 1169 .mode = SPI_MODE_3,
1283 }, 1170 },
1284#endif 1171#endif
@@ -1288,7 +1175,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1288 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */ 1175 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1289 .bus_num = 0, 1176 .bus_num = 0,
1290 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */ 1177 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1291 .controller_data = &adf7021_spi_chip_info,
1292 .platform_data = &adf7021_platform_data, 1178 .platform_data = &adf7021_platform_data,
1293 .mode = SPI_MODE_0, 1179 .mode = SPI_MODE_0,
1294 }, 1180 },
@@ -1300,7 +1186,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1300 .bus_num = 0, 1186 .bus_num = 0,
1301 .irq = IRQ_PF6, 1187 .irq = IRQ_PF6,
1302 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */ 1188 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1303 .controller_data = &ad7873_spi_chip_info,
1304 .platform_data = &ad7873_pdata, 1189 .platform_data = &ad7873_pdata,
1305 .mode = SPI_MODE_0, 1190 .mode = SPI_MODE_0,
1306 }, 1191 },
@@ -2632,9 +2517,25 @@ static struct resource bfin_snd_resources[][4] = {
2632 BFIN_SND_RES(0), 2517 BFIN_SND_RES(0),
2633 BFIN_SND_RES(1), 2518 BFIN_SND_RES(1),
2634}; 2519};
2520#endif
2521
2522#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2523static struct platform_device bfin_i2s_pcm = {
2524 .name = "bfin-i2s-pcm-audio",
2525 .id = -1,
2526};
2527#endif
2635 2528
2636static struct platform_device bfin_pcm = { 2529#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2637 .name = "bfin-pcm-audio", 2530static struct platform_device bfin_tdm_pcm = {
2531 .name = "bfin-tdm-pcm-audio",
2532 .id = -1,
2533};
2534#endif
2535
2536#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2537static struct platform_device bfin_ac97_pcm = {
2538 .name = "bfin-ac97-pcm-audio",
2638 .id = -1, 2539 .id = -1,
2639}; 2540};
2640#endif 2541#endif
@@ -2869,10 +2770,16 @@ static struct platform_device *stamp_devices[] __initdata = {
2869 &stamp_flash_device, 2770 &stamp_flash_device,
2870#endif 2771#endif
2871 2772
2872#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \ 2773#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2873 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \ 2774 &bfin_i2s_pcm,
2874 defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE) 2775#endif
2875 &bfin_pcm, 2776
2777#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2778 &bfin_tdm_pcm,
2779#endif
2780
2781#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2782 &bfin_ac97_pcm,
2876#endif 2783#endif
2877 2784
2878#if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE) 2785#if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
@@ -2916,6 +2823,24 @@ static struct platform_device *stamp_devices[] __initdata = {
2916#endif 2823#endif
2917}; 2824};
2918 2825
2826static int __init net2272_init(void)
2827{
2828#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2829 int ret;
2830
2831 ret = gpio_request(GPIO_PF6, "net2272");
2832 if (ret)
2833 return ret;
2834
2835 /* Reset the USB chip */
2836 gpio_direction_output(GPIO_PF6, 0);
2837 mdelay(2);
2838 gpio_set_value(GPIO_PF6, 1);
2839#endif
2840
2841 return 0;
2842}
2843
2919static int __init stamp_init(void) 2844static int __init stamp_init(void)
2920{ 2845{
2921 printk(KERN_INFO "%s(): registering device resources\n", __func__); 2846 printk(KERN_INFO "%s(): registering device resources\n", __func__);
@@ -2926,6 +2851,9 @@ static int __init stamp_init(void)
2926 ARRAY_SIZE(bfin_i2c_board_info)); 2851 ARRAY_SIZE(bfin_i2c_board_info));
2927 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 2852 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
2928 2853
2854 if (net2272_init())
2855 pr_warning("unable to configure net2272; it probably won't work\n");
2856
2929 return 0; 2857 return 0;
2930} 2858}
2931 2859
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
index 164a7e02c02..9b7287abdfa 100644
--- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
@@ -62,29 +62,12 @@ static struct flash_platform_data bfin_spi_flash_data = {
62/* SPI flash chip (m25p64) */ 62/* SPI flash chip (m25p64) */
63static struct bfin5xx_spi_chip spi_flash_chip_info = { 63static struct bfin5xx_spi_chip spi_flash_chip_info = {
64 .enable_dma = 0, /* use dma transfer with this chip*/ 64 .enable_dma = 0, /* use dma transfer with this chip*/
65 .bits_per_word = 8,
66};
67#endif
68
69#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
70/* SPI ADC chip */
71static struct bfin5xx_spi_chip spi_adc_chip_info = {
72 .enable_dma = 1, /* use dma transfer with this chip*/
73 .bits_per_word = 16,
74};
75#endif
76
77#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
78static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
79 .enable_dma = 0,
80 .bits_per_word = 16,
81}; 65};
82#endif 66#endif
83 67
84#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 68#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
85static struct bfin5xx_spi_chip mmc_spi_chip_info = { 69static struct bfin5xx_spi_chip mmc_spi_chip_info = {
86 .enable_dma = 0, 70 .enable_dma = 0,
87 .bits_per_word = 8,
88}; 71};
89#endif 72#endif
90 73
@@ -102,24 +85,12 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
102 }, 85 },
103#endif 86#endif
104 87
105#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
106 {
107 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
108 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
109 .bus_num = 0, /* Framework bus number */
110 .chip_select = 1, /* Framework chip select. */
111 .platform_data = NULL, /* No spi_driver specific config */
112 .controller_data = &spi_adc_chip_info,
113 },
114#endif
115
116#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) 88#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
117 { 89 {
118 .modalias = "ad183x", 90 .modalias = "ad183x",
119 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 91 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
120 .bus_num = 0, 92 .bus_num = 0,
121 .chip_select = 4, 93 .chip_select = 4,
122 .controller_data = &ad1836_spi_chip_info,
123 }, 94 },
124#endif 95#endif
125 96
@@ -733,6 +704,24 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
733#endif 704#endif
734}; 705};
735 706
707static int __init net2272_init(void)
708{
709#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
710 int ret;
711
712 ret = gpio_request(GPIO_PG14, "net2272");
713 if (ret)
714 return ret;
715
716 /* Reset USB Chip, PG14 */
717 gpio_direction_output(GPIO_PG14, 0);
718 mdelay(2);
719 gpio_set_value(GPIO_PG14, 1);
720#endif
721
722 return 0;
723}
724
736static int __init tcm_bf537_init(void) 725static int __init tcm_bf537_init(void)
737{ 726{
738 printk(KERN_INFO "%s(): registering device resources\n", __func__); 727 printk(KERN_INFO "%s(): registering device resources\n", __func__);
@@ -744,6 +733,10 @@ static int __init tcm_bf537_init(void)
744#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 733#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
745 irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN); 734 irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
746#endif 735#endif
736
737 if (net2272_init())
738 pr_warning("unable to configure net2272; it probably won't work\n");
739
747 return 0; 740 return 0;
748} 741}
749 742
diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h
index 7f8e5a9f5db..543cd3fb305 100644
--- a/arch/blackfin/mach-bf537/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf537/include/mach/anomaly.h
@@ -11,7 +11,7 @@
11 */ 11 */
12 12
13/* This file should be up to date with: 13/* This file should be up to date with:
14 * - Revision E, 05/25/2010; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List 14 * - Revision F, 05/23/2011; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List
15 */ 15 */
16 16
17#ifndef _MACH_ANOMALY_H_ 17#ifndef _MACH_ANOMALY_H_
@@ -44,18 +44,12 @@
44#define ANOMALY_05000119 (1) 44#define ANOMALY_05000119 (1)
45/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ 45/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
46#define ANOMALY_05000122 (1) 46#define ANOMALY_05000122 (1)
47/* Killed 32-Bit MMR Write Leads to Next System MMR Access Thinking It Should Be 32-Bit */
48#define ANOMALY_05000157 (__SILICON_REVISION__ < 2)
49/* PPI_DELAY Not Functional in PPI Modes with 0 Frame Syncs */ 47/* PPI_DELAY Not Functional in PPI Modes with 0 Frame Syncs */
50#define ANOMALY_05000180 (1) 48#define ANOMALY_05000180 (1)
51/* Instruction Cache Is Not Functional */
52#define ANOMALY_05000237 (__SILICON_REVISION__ < 2)
53/* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */ 49/* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */
54#define ANOMALY_05000244 (__SILICON_REVISION__ < 3) 50#define ANOMALY_05000244 (__SILICON_REVISION__ < 3)
55/* False Hardware Error from an Access in the Shadow of a Conditional Branch */ 51/* False Hardware Error from an Access in the Shadow of a Conditional Branch */
56#define ANOMALY_05000245 (1) 52#define ANOMALY_05000245 (1)
57/* Buffered CLKIN Output Is Disabled by Default */
58#define ANOMALY_05000247 (1)
59/* Incorrect Bit Shift of Data Word in Multichannel (TDM) Mode in Certain Conditions */ 53/* Incorrect Bit Shift of Data Word in Multichannel (TDM) Mode in Certain Conditions */
60#define ANOMALY_05000250 (__SILICON_REVISION__ < 3) 54#define ANOMALY_05000250 (__SILICON_REVISION__ < 3)
61/* EMAC TX DMA Error After an Early Frame Abort */ 55/* EMAC TX DMA Error After an Early Frame Abort */
@@ -98,7 +92,7 @@
98#define ANOMALY_05000278 (((ANOMALY_BF536 || ANOMALY_BF537) && __SILICON_REVISION__ < 3) || (ANOMALY_BF534 && __SILICON_REVISION__ < 2)) 92#define ANOMALY_05000278 (((ANOMALY_BF536 || ANOMALY_BF537) && __SILICON_REVISION__ < 3) || (ANOMALY_BF534 && __SILICON_REVISION__ < 2))
99/* SPI Master Boot Mode Does Not Work Well with Atmel Data Flash Devices */ 93/* SPI Master Boot Mode Does Not Work Well with Atmel Data Flash Devices */
100#define ANOMALY_05000280 (1) 94#define ANOMALY_05000280 (1)
101/* False Hardware Error Exception when ISR Context Is Not Restored */ 95/* False Hardware Error when ISR Context Is Not Restored */
102#define ANOMALY_05000281 (__SILICON_REVISION__ < 3) 96#define ANOMALY_05000281 (__SILICON_REVISION__ < 3)
103/* Memory DMA Corruption with 32-Bit Data and Traffic Control */ 97/* Memory DMA Corruption with 32-Bit Data and Traffic Control */
104#define ANOMALY_05000282 (__SILICON_REVISION__ < 3) 98#define ANOMALY_05000282 (__SILICON_REVISION__ < 3)
@@ -162,9 +156,9 @@
162#define ANOMALY_05000461 (1) 156#define ANOMALY_05000461 (1)
163/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */ 157/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */
164#define ANOMALY_05000462 (1) 158#define ANOMALY_05000462 (1)
165/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */ 159/* Interrupted SPORT Receive Data Register Read Results In Underflow when SLEN > 15 */
166#define ANOMALY_05000473 (1) 160#define ANOMALY_05000473 (1)
167/* Possible Lockup Condition whem Modifying PLL from External Memory */ 161/* Possible Lockup Condition when Modifying PLL from External Memory */
168#define ANOMALY_05000475 (1) 162#define ANOMALY_05000475 (1)
169/* TESTSET Instruction Cannot Be Interrupted */ 163/* TESTSET Instruction Cannot Be Interrupted */
170#define ANOMALY_05000477 (1) 164#define ANOMALY_05000477 (1)
@@ -172,8 +166,26 @@
172#define ANOMALY_05000480 (__SILICON_REVISION__ < 3) 166#define ANOMALY_05000480 (__SILICON_REVISION__ < 3)
173/* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */ 167/* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */
174#define ANOMALY_05000481 (1) 168#define ANOMALY_05000481 (1)
175/* IFLUSH sucks at life */ 169/* PLL May Latch Incorrect Values Coming Out of Reset */
170#define ANOMALY_05000489 (1)
171/* Instruction Memory Stalls Can Cause IFLUSH to Fail */
176#define ANOMALY_05000491 (1) 172#define ANOMALY_05000491 (1)
173/* EXCPT Instruction May Be Lost If NMI Happens Simultaneously */
174#define ANOMALY_05000494 (1)
175/* RXS Bit in SPI_STAT May Become Stuck In RX DMA Modes */
176#define ANOMALY_05000501 (1)
177
178/*
179 * These anomalies have been "phased" out of analog.com anomaly sheets and are
180 * here to show running on older silicon just isn't feasible.
181 */
182
183/* Killed 32-Bit MMR Write Leads to Next System MMR Access Thinking It Should Be 32-Bit */
184#define ANOMALY_05000157 (__SILICON_REVISION__ < 2)
185/* Instruction Cache Is Not Functional */
186#define ANOMALY_05000237 (__SILICON_REVISION__ < 2)
187/* Buffered CLKIN Output Is Disabled by Default */
188#define ANOMALY_05000247 (__SILICON_REVISION__ < 2)
177 189
178/* Anomalies that don't exist on this proc */ 190/* Anomalies that don't exist on this proc */
179#define ANOMALY_05000099 (0) 191#define ANOMALY_05000099 (0)
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-07 20:15:15 -0400