diff options
Diffstat (limited to 'arch/arm')
414 files changed, 8735 insertions, 8474 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index fe6b0526b3a..44789eff983 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -595,6 +595,7 @@ config ARCH_MMP | |||
595 | select TICK_ONESHOT | 595 | select TICK_ONESHOT |
596 | select PLAT_PXA | 596 | select PLAT_PXA |
597 | select SPARSE_IRQ | 597 | select SPARSE_IRQ |
598 | select GENERIC_ALLOCATOR | ||
598 | help | 599 | help |
599 | Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. | 600 | Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. |
600 | 601 | ||
@@ -769,6 +770,7 @@ config ARCH_S3C64XX | |||
769 | select CPU_V6 | 770 | select CPU_V6 |
770 | select ARM_VIC | 771 | select ARM_VIC |
771 | select HAVE_CLK | 772 | select HAVE_CLK |
773 | select HAVE_TCM | ||
772 | select CLKDEV_LOOKUP | 774 | select CLKDEV_LOOKUP |
773 | select NO_IOPORT | 775 | select NO_IOPORT |
774 | select ARCH_USES_GETTIMEOFFSET | 776 | select ARCH_USES_GETTIMEOFFSET |
@@ -777,9 +779,6 @@ config ARCH_S3C64XX | |||
777 | select SAMSUNG_CLKSRC | 779 | select SAMSUNG_CLKSRC |
778 | select SAMSUNG_IRQ_VIC_TIMER | 780 | select SAMSUNG_IRQ_VIC_TIMER |
779 | select S3C_GPIO_TRACK | 781 | select S3C_GPIO_TRACK |
780 | select S3C_GPIO_PULL_UPDOWN | ||
781 | select S3C_GPIO_CFG_S3C24XX | ||
782 | select S3C_GPIO_CFG_S3C64XX | ||
783 | select S3C_DEV_NAND | 782 | select S3C_DEV_NAND |
784 | select USB_ARCH_HAS_OHCI | 783 | select USB_ARCH_HAS_OHCI |
785 | select SAMSUNG_GPIOLIB_4BIT | 784 | select SAMSUNG_GPIOLIB_4BIT |
@@ -838,8 +837,8 @@ config ARCH_S5PV210 | |||
838 | help | 837 | help |
839 | Samsung S5PV210/S5PC110 series based systems | 838 | Samsung S5PV210/S5PC110 series based systems |
840 | 839 | ||
841 | config ARCH_EXYNOS4 | 840 | config ARCH_EXYNOS |
842 | bool "Samsung EXYNOS4" | 841 | bool "SAMSUNG EXYNOS" |
843 | select CPU_V7 | 842 | select CPU_V7 |
844 | select ARCH_SPARSEMEM_ENABLE | 843 | select ARCH_SPARSEMEM_ENABLE |
845 | select ARCH_HAS_HOLES_MEMORYMODEL | 844 | select ARCH_HAS_HOLES_MEMORYMODEL |
@@ -853,7 +852,7 @@ config ARCH_EXYNOS4 | |||
853 | select HAVE_S3C2410_WATCHDOG if WATCHDOG | 852 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
854 | select NEED_MACH_MEMORY_H | 853 | select NEED_MACH_MEMORY_H |
855 | help | 854 | help |
856 | Samsung EXYNOS4 series based systems | 855 | Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5) |
857 | 856 | ||
858 | config ARCH_SHARK | 857 | config ARCH_SHARK |
859 | bool "Shark" | 858 | bool "Shark" |
@@ -1080,7 +1079,7 @@ source "arch/arm/mach-s5pc100/Kconfig" | |||
1080 | 1079 | ||
1081 | source "arch/arm/mach-s5pv210/Kconfig" | 1080 | source "arch/arm/mach-s5pv210/Kconfig" |
1082 | 1081 | ||
1083 | source "arch/arm/mach-exynos4/Kconfig" | 1082 | source "arch/arm/mach-exynos/Kconfig" |
1084 | 1083 | ||
1085 | source "arch/arm/mach-shmobile/Kconfig" | 1084 | source "arch/arm/mach-shmobile/Kconfig" |
1086 | 1085 | ||
@@ -2212,7 +2211,7 @@ menu "Power management options" | |||
2212 | source "kernel/power/Kconfig" | 2211 | source "kernel/power/Kconfig" |
2213 | 2212 | ||
2214 | config ARCH_SUSPEND_POSSIBLE | 2213 | config ARCH_SUSPEND_POSSIBLE |
2215 | depends on !ARCH_S5P64X0 && !ARCH_S5PC100 | 2214 | depends on !ARCH_S5PC100 |
2216 | depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ | 2215 | depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ |
2217 | CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE | 2216 | CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE |
2218 | def_bool y | 2217 | def_bool y |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index b7c2d377a6c..dfcf3b033e1 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -180,7 +180,7 @@ machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx | |||
180 | machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0 | 180 | machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0 |
181 | machine-$(CONFIG_ARCH_S5PC100) := s5pc100 | 181 | machine-$(CONFIG_ARCH_S5PC100) := s5pc100 |
182 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 | 182 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 |
183 | machine-$(CONFIG_ARCH_EXYNOS4) := exynos4 | 183 | machine-$(CONFIG_ARCH_EXYNOS4) := exynos |
184 | machine-$(CONFIG_ARCH_SA1100) := sa1100 | 184 | machine-$(CONFIG_ARCH_SA1100) := sa1100 |
185 | machine-$(CONFIG_ARCH_SHARK) := shark | 185 | machine-$(CONFIG_ARCH_SHARK) := shark |
186 | machine-$(CONFIG_ARCH_SHMOBILE) := shmobile | 186 | machine-$(CONFIG_ARCH_SHMOBILE) := shmobile |
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index a7934ba9e1d..b539ec855e1 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/ioport.h> | 25 | #include <linux/ioport.h> |
26 | #include <linux/irq.h> | 26 | #include <linux/irq.h> |
27 | #include <linux/io.h> | 27 | #include <linux/io.h> |
28 | #include <linux/export.h> | ||
28 | 29 | ||
29 | #include <asm/mach/pci.h> | 30 | #include <asm/mach/pci.h> |
30 | #include <asm/hardware/it8152.h> | 31 | #include <asm/hardware/it8152.h> |
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c index 1cde34a080d..0c616d5fcb0 100644 --- a/arch/arm/common/scoop.c +++ b/arch/arm/common/scoop.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/string.h> | 16 | #include <linux/string.h> |
17 | #include <linux/slab.h> | 17 | #include <linux/slab.h> |
18 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
19 | #include <linux/export.h> | ||
19 | #include <linux/io.h> | 20 | #include <linux/io.h> |
20 | #include <asm/hardware/scoop.h> | 21 | #include <asm/hardware/scoop.h> |
21 | 22 | ||
diff --git a/arch/arm/configs/exynos4_defconfig b/arch/arm/configs/exynos4_defconfig index cd40bb56e56..bffe68e190a 100644 --- a/arch/arm/configs/exynos4_defconfig +++ b/arch/arm/configs/exynos4_defconfig | |||
@@ -4,19 +4,18 @@ CONFIG_KALLSYMS_ALL=y | |||
4 | CONFIG_MODULES=y | 4 | CONFIG_MODULES=y |
5 | CONFIG_MODULE_UNLOAD=y | 5 | CONFIG_MODULE_UNLOAD=y |
6 | # CONFIG_BLK_DEV_BSG is not set | 6 | # CONFIG_BLK_DEV_BSG is not set |
7 | CONFIG_ARCH_EXYNOS4=y | 7 | CONFIG_ARCH_EXYNOS=y |
8 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 | 8 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 |
9 | CONFIG_MACH_SMDKC210=y | 9 | CONFIG_MACH_SMDKC210=y |
10 | CONFIG_MACH_SMDKV310=y | ||
11 | CONFIG_MACH_ARMLEX4210=y | 10 | CONFIG_MACH_ARMLEX4210=y |
12 | CONFIG_MACH_UNIVERSAL_C210=y | 11 | CONFIG_MACH_UNIVERSAL_C210=y |
13 | CONFIG_MACH_NURI=y | 12 | CONFIG_MACH_NURI=y |
14 | CONFIG_MACH_ORIGEN=y | 13 | CONFIG_MACH_ORIGEN=y |
14 | CONFIG_MACH_SMDK4412=y | ||
15 | CONFIG_NO_HZ=y | 15 | CONFIG_NO_HZ=y |
16 | CONFIG_HIGH_RES_TIMERS=y | 16 | CONFIG_HIGH_RES_TIMERS=y |
17 | CONFIG_SMP=y | 17 | CONFIG_SMP=y |
18 | CONFIG_NR_CPUS=2 | 18 | CONFIG_NR_CPUS=2 |
19 | CONFIG_HOTPLUG_CPU=y | ||
20 | CONFIG_PREEMPT=y | 19 | CONFIG_PREEMPT=y |
21 | CONFIG_AEABI=y | 20 | CONFIG_AEABI=y |
22 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc mem=256M" | 21 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc mem=256M" |
@@ -61,13 +60,9 @@ CONFIG_DETECT_HUNG_TASK=y | |||
61 | CONFIG_DEBUG_RT_MUTEXES=y | 60 | CONFIG_DEBUG_RT_MUTEXES=y |
62 | CONFIG_DEBUG_SPINLOCK=y | 61 | CONFIG_DEBUG_SPINLOCK=y |
63 | CONFIG_DEBUG_MUTEXES=y | 62 | CONFIG_DEBUG_MUTEXES=y |
64 | CONFIG_DEBUG_SPINLOCK_SLEEP=y | ||
65 | CONFIG_DEBUG_INFO=y | 63 | CONFIG_DEBUG_INFO=y |
66 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
67 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 64 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
68 | CONFIG_DEBUG_USER=y | 65 | CONFIG_DEBUG_USER=y |
69 | CONFIG_DEBUG_ERRORS=y | ||
70 | CONFIG_DEBUG_LL=y | 66 | CONFIG_DEBUG_LL=y |
71 | CONFIG_EARLY_PRINTK=y | 67 | CONFIG_EARLY_PRINTK=y |
72 | CONFIG_DEBUG_S3C_UART=1 | ||
73 | CONFIG_CRC_CCITT=y | 68 | CONFIG_CRC_CCITT=y |
diff --git a/arch/arm/include/asm/hardware/pl080.h b/arch/arm/include/asm/hardware/pl080.h index e4a04e4e562..33c78d7af2e 100644 --- a/arch/arm/include/asm/hardware/pl080.h +++ b/arch/arm/include/asm/hardware/pl080.h | |||
@@ -21,6 +21,9 @@ | |||
21 | * OneNAND features. | 21 | * OneNAND features. |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #ifndef ASM_PL080_H | ||
25 | #define ASM_PL080_H | ||
26 | |||
24 | #define PL080_INT_STATUS (0x00) | 27 | #define PL080_INT_STATUS (0x00) |
25 | #define PL080_TC_STATUS (0x04) | 28 | #define PL080_TC_STATUS (0x04) |
26 | #define PL080_TC_CLEAR (0x08) | 29 | #define PL080_TC_CLEAR (0x08) |
@@ -138,3 +141,4 @@ struct pl080s_lli { | |||
138 | u32 control1; | 141 | u32 control1; |
139 | }; | 142 | }; |
140 | 143 | ||
144 | #endif /* ASM_PL080_H */ | ||
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index 8e3c6f11b0a..5b0bce61eb6 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c | |||
@@ -7,7 +7,7 @@ | |||
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | #include <linux/module.h> | 10 | #include <linux/export.h> |
11 | #include <linux/sched.h> | 11 | #include <linux/sched.h> |
12 | #include <linux/string.h> | 12 | #include <linux/string.h> |
13 | #include <linux/cryptohash.h> | 13 | #include <linux/cryptohash.h> |
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index c0d9203fc75..b530e9116a0 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * Bits taken from various places. | 6 | * Bits taken from various places. |
7 | */ | 7 | */ |
8 | #include <linux/module.h> | 8 | #include <linux/export.h> |
9 | #include <linux/kernel.h> | 9 | #include <linux/kernel.h> |
10 | #include <linux/pci.h> | 10 | #include <linux/pci.h> |
11 | #include <linux/slab.h> | 11 | #include <linux/slab.h> |
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c index 1a33e9d6bb1..bee7f9d47f0 100644 --- a/arch/arm/kernel/devtree.c +++ b/arch/arm/kernel/devtree.c | |||
@@ -9,7 +9,7 @@ | |||
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <linux/module.h> | 12 | #include <linux/export.h> |
13 | #include <linux/errno.h> | 13 | #include <linux/errno.h> |
14 | #include <linux/types.h> | 14 | #include <linux/types.h> |
15 | #include <linux/bootmem.h> | 15 | #include <linux/bootmem.h> |
diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c index 9b05c6a0dce..ddba41d1fcf 100644 --- a/arch/arm/kernel/elf.c +++ b/arch/arm/kernel/elf.c | |||
@@ -1,4 +1,4 @@ | |||
1 | #include <linux/module.h> | 1 | #include <linux/export.h> |
2 | #include <linux/sched.h> | 2 | #include <linux/sched.h> |
3 | #include <linux/personality.h> | 3 | #include <linux/personality.h> |
4 | #include <linux/binfmts.h> | 4 | #include <linux/binfmts.h> |
diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c index 1bec8b5f22f..36d20bd5012 100644 --- a/arch/arm/kernel/etm.c +++ b/arch/arm/kernel/etm.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/miscdevice.h> | 24 | #include <linux/miscdevice.h> |
25 | #include <linux/vmalloc.h> | 25 | #include <linux/vmalloc.h> |
26 | #include <linux/mutex.h> | 26 | #include <linux/mutex.h> |
27 | #include <linux/module.h> | ||
27 | #include <asm/hardware/coresight.h> | 28 | #include <asm/hardware/coresight.h> |
28 | #include <asm/sections.h> | 29 | #include <asm/sections.h> |
29 | 30 | ||
diff --git a/arch/arm/kernel/io.c b/arch/arm/kernel/io.c index f4470307edb..dcd5b4d8614 100644 --- a/arch/arm/kernel/io.c +++ b/arch/arm/kernel/io.c | |||
@@ -1,4 +1,4 @@ | |||
1 | #include <linux/module.h> | 1 | #include <linux/export.h> |
2 | #include <linux/types.h> | 2 | #include <linux/types.h> |
3 | #include <linux/io.h> | 3 | #include <linux/io.h> |
4 | 4 | ||
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 7cb29261249..3efd82cc95f 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c | |||
@@ -22,7 +22,6 @@ | |||
22 | * Naturally it's not a 1:1 relation, but there are similarities. | 22 | * Naturally it's not a 1:1 relation, but there are similarities. |
23 | */ | 23 | */ |
24 | #include <linux/kernel_stat.h> | 24 | #include <linux/kernel_stat.h> |
25 | #include <linux/module.h> | ||
26 | #include <linux/signal.h> | 25 | #include <linux/signal.h> |
27 | #include <linux/ioport.h> | 26 | #include <linux/ioport.h> |
28 | #include <linux/interrupt.h> | 27 | #include <linux/interrupt.h> |
diff --git a/arch/arm/kernel/leds.c b/arch/arm/kernel/leds.c index 0f107dcb034..0bcd3834157 100644 --- a/arch/arm/kernel/leds.c +++ b/arch/arm/kernel/leds.c | |||
@@ -7,10 +7,11 @@ | |||
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | #include <linux/module.h> | 10 | #include <linux/export.h> |
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <linux/sysdev.h> | 12 | #include <linux/sysdev.h> |
13 | #include <linux/syscore_ops.h> | 13 | #include <linux/syscore_ops.h> |
14 | #include <linux/string.h> | ||
14 | 15 | ||
15 | #include <asm/leds.h> | 16 | #include <asm/leds.h> |
16 | 17 | ||
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index e6e5d7c84f1..24e2347be6b 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c | |||
@@ -15,7 +15,7 @@ | |||
15 | #include <linux/bitmap.h> | 15 | #include <linux/bitmap.h> |
16 | #include <linux/interrupt.h> | 16 | #include <linux/interrupt.h> |
17 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
18 | #include <linux/module.h> | 18 | #include <linux/export.h> |
19 | #include <linux/perf_event.h> | 19 | #include <linux/perf_event.h> |
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/spinlock.h> | 21 | #include <linux/spinlock.h> |
diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c index a4b1b0748fd..679cf4d18c0 100644 --- a/arch/arm/kernel/pj4-cp0.c +++ b/arch/arm/kernel/pj4-cp0.c | |||
@@ -10,7 +10,6 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | ||
14 | #include <linux/types.h> | 13 | #include <linux/types.h> |
15 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
16 | #include <linux/signal.h> | 15 | #include <linux/signal.h> |
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index fd0814076ff..75316f0dd02 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c | |||
@@ -10,7 +10,7 @@ | |||
10 | */ | 10 | */ |
11 | #include <stdarg.h> | 11 | #include <stdarg.h> |
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/export.h> |
14 | #include <linux/sched.h> | 14 | #include <linux/sched.h> |
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/mm.h> | 16 | #include <linux/mm.h> |
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index 2491f3b406b..483727ad689 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
13 | #include <linux/sched.h> | 13 | #include <linux/sched.h> |
14 | #include <linux/mm.h> | 14 | #include <linux/mm.h> |
15 | #include <linux/elf.h> | ||
15 | #include <linux/smp.h> | 16 | #include <linux/smp.h> |
16 | #include <linux/ptrace.h> | 17 | #include <linux/ptrace.h> |
17 | #include <linux/user.h> | 18 | #include <linux/user.h> |
diff --git a/arch/arm/kernel/return_address.c b/arch/arm/kernel/return_address.c index 0b13a72f855..8085417555d 100644 --- a/arch/arm/kernel/return_address.c +++ b/arch/arm/kernel/return_address.c | |||
@@ -8,7 +8,7 @@ | |||
8 | * under the terms of the GNU General Public License version 2 as published by | 8 | * under the terms of the GNU General Public License version 2 as published by |
9 | * the Free Software Foundation. | 9 | * the Free Software Foundation. |
10 | */ | 10 | */ |
11 | #include <linux/module.h> | 11 | #include <linux/export.h> |
12 | #include <linux/ftrace.h> | 12 | #include <linux/ftrace.h> |
13 | 13 | ||
14 | #if defined(CONFIG_FRAME_POINTER) && !defined(CONFIG_ARM_UNWIND) | 14 | #if defined(CONFIG_FRAME_POINTER) && !defined(CONFIG_ARM_UNWIND) |
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index bda0a218f4a..7e7977ab994 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -7,7 +7,7 @@ | |||
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | #include <linux/module.h> | 10 | #include <linux/export.h> |
11 | #include <linux/kernel.h> | 11 | #include <linux/kernel.h> |
12 | #include <linux/stddef.h> | 12 | #include <linux/stddef.h> |
13 | #include <linux/ioport.h> | 13 | #include <linux/ioport.h> |
diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c index 381d23a497c..00f79e59985 100644 --- a/arch/arm/kernel/stacktrace.c +++ b/arch/arm/kernel/stacktrace.c | |||
@@ -1,4 +1,4 @@ | |||
1 | #include <linux/module.h> | 1 | #include <linux/export.h> |
2 | #include <linux/sched.h> | 2 | #include <linux/sched.h> |
3 | #include <linux/stacktrace.h> | 3 | #include <linux/stacktrace.h> |
4 | 4 | ||
diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c index 62e7c61d034..d2b177905cd 100644 --- a/arch/arm/kernel/sys_arm.c +++ b/arch/arm/kernel/sys_arm.c | |||
@@ -12,7 +12,7 @@ | |||
12 | * have a non-standard calling sequence on the Linux/arm | 12 | * have a non-standard calling sequence on the Linux/arm |
13 | * platform. | 13 | * platform. |
14 | */ | 14 | */ |
15 | #include <linux/module.h> | 15 | #include <linux/export.h> |
16 | #include <linux/errno.h> | 16 | #include <linux/errno.h> |
17 | #include <linux/sched.h> | 17 | #include <linux/sched.h> |
18 | #include <linux/mm.h> | 18 | #include <linux/mm.h> |
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index 5a54b95d6bd..8c57dd3680e 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c | |||
@@ -11,7 +11,7 @@ | |||
11 | * This file contains the ARM-specific time handling details: | 11 | * This file contains the ARM-specific time handling details: |
12 | * reading the RTC at bootup, etc... | 12 | * reading the RTC at bootup, etc... |
13 | */ | 13 | */ |
14 | #include <linux/module.h> | 14 | #include <linux/export.h> |
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/interrupt.h> | 16 | #include <linux/interrupt.h> |
17 | #include <linux/time.h> | 17 | #include <linux/time.h> |
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c index d2cb0b3c987..e7e8365795c 100644 --- a/arch/arm/kernel/unwind.c +++ b/arch/arm/kernel/unwind.c | |||
@@ -39,7 +39,7 @@ | |||
39 | 39 | ||
40 | #include <linux/kernel.h> | 40 | #include <linux/kernel.h> |
41 | #include <linux/init.h> | 41 | #include <linux/init.h> |
42 | #include <linux/module.h> | 42 | #include <linux/export.h> |
43 | #include <linux/sched.h> | 43 | #include <linux/sched.h> |
44 | #include <linux/slab.h> | 44 | #include <linux/slab.h> |
45 | #include <linux/spinlock.h> | 45 | #include <linux/spinlock.h> |
diff --git a/arch/arm/kernel/xscale-cp0.c b/arch/arm/kernel/xscale-cp0.c index 1796157e3dd..e42adc6bcdb 100644 --- a/arch/arm/kernel/xscale-cp0.c +++ b/arch/arm/kernel/xscale-cp0.c | |||
@@ -8,7 +8,6 @@ | |||
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <linux/module.h> | ||
12 | #include <linux/types.h> | 11 | #include <linux/types.h> |
13 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
14 | #include <linux/signal.h> | 13 | #include <linux/signal.h> |
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index a6b7991d7fe..d111c3e9924 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig | |||
@@ -195,12 +195,6 @@ if ARCH_AT91SAM9260 | |||
195 | 195 | ||
196 | comment "AT91SAM9260 Variants" | 196 | comment "AT91SAM9260 Variants" |
197 | 197 | ||
198 | config ARCH_AT91SAM9260_SAM9XE | ||
199 | bool "AT91SAM9XE" | ||
200 | help | ||
201 | Select this if you are using Atmel's AT91SAM9XE System-on-Chip. | ||
202 | They are basically AT91SAM9260s with various sizes of embedded Flash. | ||
203 | |||
204 | comment "AT91SAM9260 / AT91SAM9XE Board Type" | 198 | comment "AT91SAM9260 / AT91SAM9XE Board Type" |
205 | 199 | ||
206 | config MACH_AT91SAM9260EK | 200 | config MACH_AT91SAM9260EK |
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c index 1cfeac1483d..f474272c0ea 100644 --- a/arch/arm/mach-at91/cpuidle.c +++ b/arch/arm/mach-at91/cpuidle.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/cpuidle.h> | 19 | #include <linux/cpuidle.h> |
20 | #include <asm/proc-fns.h> | 20 | #include <asm/proc-fns.h> |
21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
22 | #include <linux/export.h> | ||
22 | 23 | ||
23 | #include "pm.h" | 24 | #include "pm.h" |
24 | 25 | ||
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c index 0ca00050666..b52b8de91bd 100644 --- a/arch/arm/mach-bcmring/dma.c +++ b/arch/arm/mach-bcmring/dma.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/device.h> | 26 | #include <linux/device.h> |
27 | #include <linux/dma-mapping.h> | 27 | #include <linux/dma-mapping.h> |
28 | #include <linux/interrupt.h> | 28 | #include <linux/interrupt.h> |
29 | #include <linux/sched.h> | ||
29 | #include <linux/irqreturn.h> | 30 | #include <linux/irqreturn.h> |
30 | #include <linux/proc_fs.h> | 31 | #include <linux/proc_fs.h> |
31 | #include <linux/slab.h> | 32 | #include <linux/slab.h> |
diff --git a/arch/arm/mach-bcmring/mm.c b/arch/arm/mach-bcmring/mm.c index 8616876abb9..1adec78ec94 100644 --- a/arch/arm/mach-bcmring/mm.c +++ b/arch/arm/mach-bcmring/mm.c | |||
@@ -14,6 +14,7 @@ | |||
14 | 14 | ||
15 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
16 | #include <linux/dma-mapping.h> | 16 | #include <linux/dma-mapping.h> |
17 | #include <asm/page.h> | ||
17 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
18 | 19 | ||
19 | #include <mach/hardware.h> | 20 | #include <mach/hardware.h> |
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index a005e7691dd..28fafa7819b 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/phy.h> | 23 | #include <linux/phy.h> |
24 | #include <linux/clk.h> | 24 | #include <linux/clk.h> |
25 | #include <linux/videodev2.h> | 25 | #include <linux/videodev2.h> |
26 | #include <linux/export.h> | ||
26 | 27 | ||
27 | #include <media/tvp514x.h> | 28 | #include <media/tvp514x.h> |
28 | 29 | ||
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 337c45e3e44..e574d7f837a 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <linux/mtd/nand.h> | 31 | #include <linux/mtd/nand.h> |
32 | #include <linux/mtd/partitions.h> | 32 | #include <linux/mtd/partitions.h> |
33 | #include <linux/clk.h> | 33 | #include <linux/clk.h> |
34 | #include <linux/export.h> | ||
34 | 35 | ||
35 | #include <asm/mach-types.h> | 36 | #include <asm/mach-types.h> |
36 | #include <asm/mach/arch.h> | 37 | #include <asm/mach/arch.h> |
diff --git a/arch/arm/mach-davinci/cdce949.c b/arch/arm/mach-davinci/cdce949.c index ba8b12b2913..f2232ca6d07 100644 --- a/arch/arm/mach-davinci/cdce949.c +++ b/arch/arm/mach-davinci/cdce949.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/clk.h> | 17 | #include <linux/clk.h> |
18 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
19 | #include <linux/i2c.h> | 19 | #include <linux/i2c.h> |
20 | #include <linux/module.h> | ||
20 | 21 | ||
21 | #include <mach/clock.h> | 22 | #include <mach/clock.h> |
22 | #include <mach/cdce949.h> | 23 | #include <mach/cdce949.h> |
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c index 41669ecc1f9..5bba7070f27 100644 --- a/arch/arm/mach-davinci/cpufreq.c +++ b/arch/arm/mach-davinci/cpufreq.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/err.h> | 24 | #include <linux/err.h> |
25 | #include <linux/clk.h> | 25 | #include <linux/clk.h> |
26 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
27 | #include <linux/export.h> | ||
27 | 28 | ||
28 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
29 | #include <mach/cpufreq.h> | 30 | #include <mach/cpufreq.h> |
diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c index 0b314bf16f7..60d2f4871af 100644 --- a/arch/arm/mach-davinci/cpuidle.c +++ b/arch/arm/mach-davinci/cpuidle.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/cpuidle.h> | 17 | #include <linux/cpuidle.h> |
18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | #include <linux/export.h> | ||
19 | #include <asm/proc-fns.h> | 20 | #include <asm/proc-fns.h> |
20 | 21 | ||
21 | #include <mach/cpuidle.h> | 22 | #include <mach/cpuidle.h> |
diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h index fbaae4772b9..960e9de47e1 100644 --- a/arch/arm/mach-davinci/include/mach/gpio.h +++ b/arch/arm/mach-davinci/include/mach/gpio.h | |||
@@ -15,6 +15,8 @@ | |||
15 | 15 | ||
16 | #include <asm-generic/gpio.h> | 16 | #include <asm-generic/gpio.h> |
17 | 17 | ||
18 | #define __ARM_GPIOLIB_COMPLEX | ||
19 | |||
18 | /* The inline versions use the static inlines in the driver header */ | 20 | /* The inline versions use the static inlines in the driver header */ |
19 | #include "gpio-davinci.h" | 21 | #include "gpio-davinci.h" |
20 | 22 | ||
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 94c78bc6627..2432a6b7dca 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <linux/i2c.h> | 33 | #include <linux/i2c.h> |
34 | #include <linux/i2c-gpio.h> | 34 | #include <linux/i2c-gpio.h> |
35 | #include <linux/spi/spi.h> | 35 | #include <linux/spi/spi.h> |
36 | #include <linux/export.h> | ||
36 | 37 | ||
37 | #include <mach/hardware.h> | 38 | #include <mach/hardware.h> |
38 | #include <mach/fb.h> | 39 | #include <mach/fb.h> |
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos/Kconfig index a6527359803..724ec0f3560 100644 --- a/arch/arm/mach-exynos4/Kconfig +++ b/arch/arm/mach-exynos/Kconfig | |||
@@ -1,4 +1,4 @@ | |||
1 | # arch/arm/mach-exynos4/Kconfig | 1 | # arch/arm/mach-exynos/Kconfig |
2 | # | 2 | # |
3 | # Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | 3 | # Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | # http://www.samsung.com/ | 4 | # http://www.samsung.com/ |
@@ -7,22 +7,47 @@ | |||
7 | 7 | ||
8 | # Configuration options for the EXYNOS4 | 8 | # Configuration options for the EXYNOS4 |
9 | 9 | ||
10 | if ARCH_EXYNOS4 | 10 | if ARCH_EXYNOS |
11 | |||
12 | menu "SAMSUNG EXYNOS SoCs Support" | ||
13 | |||
14 | choice | ||
15 | prompt "EXYNOS System Type" | ||
16 | default ARCH_EXYNOS4 | ||
17 | |||
18 | config ARCH_EXYNOS4 | ||
19 | bool "SAMSUNG EXYNOS4" | ||
20 | help | ||
21 | Samsung EXYNOS4 SoCs based systems | ||
22 | |||
23 | endchoice | ||
24 | |||
25 | comment "EXYNOS SoCs" | ||
11 | 26 | ||
12 | config CPU_EXYNOS4210 | 27 | config CPU_EXYNOS4210 |
13 | bool | 28 | bool "SAMSUNG EXYNOS4210" |
14 | select S3C_PL330_DMA | 29 | default y |
30 | depends on ARCH_EXYNOS4 | ||
31 | select SAMSUNG_DMADEV | ||
15 | select ARM_CPU_SUSPEND if PM | 32 | select ARM_CPU_SUSPEND if PM |
33 | select S5P_PM if PM | ||
34 | select S5P_SLEEP if PM | ||
16 | help | 35 | help |
17 | Enable EXYNOS4210 CPU support | 36 | Enable EXYNOS4210 CPU support |
18 | 37 | ||
19 | config SOC_EXYNOS4212 | 38 | config SOC_EXYNOS4212 |
20 | bool | 39 | bool "SAMSUNG EXYNOS4212" |
40 | default y | ||
41 | depends on ARCH_EXYNOS4 | ||
42 | select S5P_PM if PM | ||
43 | select S5P_SLEEP if PM | ||
21 | help | 44 | help |
22 | Enable EXYNOS4212 SoC support | 45 | Enable EXYNOS4212 SoC support |
23 | 46 | ||
24 | config SOC_EXYNOS4412 | 47 | config SOC_EXYNOS4412 |
25 | bool | 48 | bool "SAMSUNG EXYNOS4412" |
49 | default y | ||
50 | depends on ARCH_EXYNOS4 | ||
26 | help | 51 | help |
27 | Enable EXYNOS4412 SoC support | 52 | Enable EXYNOS4412 SoC support |
28 | 53 | ||
@@ -120,7 +145,7 @@ config EXYNOS4_SETUP_USB_PHY | |||
120 | 145 | ||
121 | # machine support | 146 | # machine support |
122 | 147 | ||
123 | menu "EXYNOS4 Machines" | 148 | if ARCH_EXYNOS4 |
124 | 149 | ||
125 | comment "EXYNOS4210 Boards" | 150 | comment "EXYNOS4210 Boards" |
126 | 151 | ||
@@ -137,6 +162,14 @@ config MACH_SMDKV310 | |||
137 | select S3C_DEV_RTC | 162 | select S3C_DEV_RTC |
138 | select S3C_DEV_WDT | 163 | select S3C_DEV_WDT |
139 | select S3C_DEV_I2C1 | 164 | select S3C_DEV_I2C1 |
165 | select S5P_DEV_FIMC0 | ||
166 | select S5P_DEV_FIMC1 | ||
167 | select S5P_DEV_FIMC2 | ||
168 | select S5P_DEV_FIMC3 | ||
169 | select S5P_DEV_I2C_HDMIPHY | ||
170 | select S5P_DEV_MFC | ||
171 | select S5P_DEV_TV | ||
172 | select S5P_DEV_USB_EHCI | ||
140 | select S3C_DEV_HSMMC | 173 | select S3C_DEV_HSMMC |
141 | select S3C_DEV_HSMMC1 | 174 | select S3C_DEV_HSMMC1 |
142 | select S3C_DEV_HSMMC2 | 175 | select S3C_DEV_HSMMC2 |
@@ -151,6 +184,7 @@ config MACH_SMDKV310 | |||
151 | select EXYNOS4_SETUP_I2C1 | 184 | select EXYNOS4_SETUP_I2C1 |
152 | select EXYNOS4_SETUP_KEYPAD | 185 | select EXYNOS4_SETUP_KEYPAD |
153 | select EXYNOS4_SETUP_SDHCI | 186 | select EXYNOS4_SETUP_SDHCI |
187 | select EXYNOS4_SETUP_USB_PHY | ||
154 | help | 188 | help |
155 | Machine support for Samsung SMDKV310 | 189 | Machine support for Samsung SMDKV310 |
156 | 190 | ||
@@ -176,19 +210,26 @@ config MACH_UNIVERSAL_C210 | |||
176 | select S5P_DEV_FIMC1 | 210 | select S5P_DEV_FIMC1 |
177 | select S5P_DEV_FIMC2 | 211 | select S5P_DEV_FIMC2 |
178 | select S5P_DEV_FIMC3 | 212 | select S5P_DEV_FIMC3 |
213 | select S5P_DEV_CSIS0 | ||
214 | select S5P_DEV_FIMD0 | ||
179 | select S3C_DEV_HSMMC | 215 | select S3C_DEV_HSMMC |
180 | select S3C_DEV_HSMMC2 | 216 | select S3C_DEV_HSMMC2 |
181 | select S3C_DEV_HSMMC3 | 217 | select S3C_DEV_HSMMC3 |
182 | select S3C_DEV_I2C1 | 218 | select S3C_DEV_I2C1 |
183 | select S3C_DEV_I2C3 | 219 | select S3C_DEV_I2C3 |
184 | select S3C_DEV_I2C5 | 220 | select S3C_DEV_I2C5 |
221 | select S5P_DEV_I2C_HDMIPHY | ||
185 | select S5P_DEV_MFC | 222 | select S5P_DEV_MFC |
186 | select S5P_DEV_ONENAND | 223 | select S5P_DEV_ONENAND |
224 | select S5P_DEV_TV | ||
187 | select EXYNOS4_DEV_PD | 225 | select EXYNOS4_DEV_PD |
226 | select EXYNOS4_SETUP_FIMD0 | ||
188 | select EXYNOS4_SETUP_I2C1 | 227 | select EXYNOS4_SETUP_I2C1 |
189 | select EXYNOS4_SETUP_I2C3 | 228 | select EXYNOS4_SETUP_I2C3 |
190 | select EXYNOS4_SETUP_I2C5 | 229 | select EXYNOS4_SETUP_I2C5 |
191 | select EXYNOS4_SETUP_SDHCI | 230 | select EXYNOS4_SETUP_SDHCI |
231 | select EXYNOS4_SETUP_FIMC | ||
232 | select S5P_SETUP_MIPIPHY | ||
192 | help | 233 | help |
193 | Machine support for Samsung Mobile Universal S5PC210 Reference | 234 | Machine support for Samsung Mobile Universal S5PC210 Reference |
194 | Board. | 235 | Board. |
@@ -196,21 +237,33 @@ config MACH_UNIVERSAL_C210 | |||
196 | config MACH_NURI | 237 | config MACH_NURI |
197 | bool "Mobile NURI Board" | 238 | bool "Mobile NURI Board" |
198 | select CPU_EXYNOS4210 | 239 | select CPU_EXYNOS4210 |
240 | select S5P_GPIO_INT | ||
199 | select S3C_DEV_WDT | 241 | select S3C_DEV_WDT |
242 | select S3C_DEV_RTC | ||
243 | select S5P_DEV_FIMD0 | ||
200 | select S3C_DEV_HSMMC | 244 | select S3C_DEV_HSMMC |
201 | select S3C_DEV_HSMMC2 | 245 | select S3C_DEV_HSMMC2 |
202 | select S3C_DEV_HSMMC3 | 246 | select S3C_DEV_HSMMC3 |
203 | select S3C_DEV_I2C1 | 247 | select S3C_DEV_I2C1 |
204 | select S3C_DEV_I2C3 | 248 | select S3C_DEV_I2C3 |
205 | select S3C_DEV_I2C5 | 249 | select S3C_DEV_I2C5 |
250 | select S5P_DEV_CSIS0 | ||
251 | select S5P_DEV_FIMC0 | ||
252 | select S5P_DEV_FIMC1 | ||
253 | select S5P_DEV_FIMC2 | ||
254 | select S5P_DEV_FIMC3 | ||
206 | select S5P_DEV_MFC | 255 | select S5P_DEV_MFC |
207 | select S5P_DEV_USB_EHCI | 256 | select S5P_DEV_USB_EHCI |
257 | select S5P_SETUP_MIPIPHY | ||
208 | select EXYNOS4_DEV_PD | 258 | select EXYNOS4_DEV_PD |
259 | select EXYNOS4_SETUP_FIMC | ||
260 | select EXYNOS4_SETUP_FIMD0 | ||
209 | select EXYNOS4_SETUP_I2C1 | 261 | select EXYNOS4_SETUP_I2C1 |
210 | select EXYNOS4_SETUP_I2C3 | 262 | select EXYNOS4_SETUP_I2C3 |
211 | select EXYNOS4_SETUP_I2C5 | 263 | select EXYNOS4_SETUP_I2C5 |
212 | select EXYNOS4_SETUP_SDHCI | 264 | select EXYNOS4_SETUP_SDHCI |
213 | select EXYNOS4_SETUP_USB_PHY | 265 | select EXYNOS4_SETUP_USB_PHY |
266 | select S5P_SETUP_MIPIPHY | ||
214 | select SAMSUNG_DEV_PWM | 267 | select SAMSUNG_DEV_PWM |
215 | select SAMSUNG_DEV_ADC | 268 | select SAMSUNG_DEV_ADC |
216 | help | 269 | help |
@@ -221,8 +274,23 @@ config MACH_ORIGEN | |||
221 | select CPU_EXYNOS4210 | 274 | select CPU_EXYNOS4210 |
222 | select S3C_DEV_RTC | 275 | select S3C_DEV_RTC |
223 | select S3C_DEV_WDT | 276 | select S3C_DEV_WDT |
277 | select S3C_DEV_HSMMC | ||
224 | select S3C_DEV_HSMMC2 | 278 | select S3C_DEV_HSMMC2 |
279 | select S5P_DEV_FIMC0 | ||
280 | select S5P_DEV_FIMC1 | ||
281 | select S5P_DEV_FIMC2 | ||
282 | select S5P_DEV_FIMC3 | ||
283 | select S5P_DEV_FIMD0 | ||
284 | select S5P_DEV_I2C_HDMIPHY | ||
285 | select S5P_DEV_MFC | ||
286 | select S5P_DEV_TV | ||
287 | select S5P_DEV_USB_EHCI | ||
288 | select SAMSUNG_DEV_BACKLIGHT | ||
289 | select SAMSUNG_DEV_PWM | ||
290 | select EXYNOS4_DEV_PD | ||
291 | select EXYNOS4_SETUP_FIMD0 | ||
225 | select EXYNOS4_SETUP_SDHCI | 292 | select EXYNOS4_SETUP_SDHCI |
293 | select EXYNOS4_SETUP_USB_PHY | ||
226 | help | 294 | help |
227 | Machine support for ORIGEN based on Samsung EXYNOS4210 | 295 | Machine support for ORIGEN based on Samsung EXYNOS4210 |
228 | 296 | ||
@@ -257,12 +325,11 @@ config MACH_SMDK4412 | |||
257 | select MACH_SMDK4212 | 325 | select MACH_SMDK4212 |
258 | help | 326 | help |
259 | Machine support for Samsung SMDK4412 | 327 | Machine support for Samsung SMDK4412 |
328 | endif | ||
260 | 329 | ||
261 | endmenu | 330 | if ARCH_EXYNOS4 |
262 | |||
263 | comment "Configuration for HSMMC bus width" | ||
264 | 331 | ||
265 | menu "Use 8-bit bus width" | 332 | comment "Configuration for HSMMC 8-bit bus width" |
266 | 333 | ||
267 | config EXYNOS4_SDHCI_CH0_8BIT | 334 | config EXYNOS4_SDHCI_CH0_8BIT |
268 | bool "Channel 0 with 8-bit bus" | 335 | bool "Channel 0 with 8-bit bus" |
@@ -275,6 +342,7 @@ config EXYNOS4_SDHCI_CH2_8BIT | |||
275 | help | 342 | help |
276 | Support HSMMC Channel 2 8-bit bus. | 343 | Support HSMMC Channel 2 8-bit bus. |
277 | If selected, Channel 3 is disabled. | 344 | If selected, Channel 3 is disabled. |
345 | endif | ||
278 | 346 | ||
279 | endmenu | 347 | endmenu |
280 | 348 | ||
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos/Makefile index c9b2e1f97e4..59069a35e40 100644 --- a/arch/arm/mach-exynos4/Makefile +++ b/arch/arm/mach-exynos/Makefile | |||
@@ -1,4 +1,4 @@ | |||
1 | # arch/arm/mach-exynos4/Makefile | 1 | # arch/arm/mach-exynos/Makefile |
2 | # | 2 | # |
3 | # Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | 3 | # Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | # http://www.samsung.com/ | 4 | # http://www.samsung.com/ |
@@ -12,11 +12,11 @@ obj- := | |||
12 | 12 | ||
13 | # Core support for EXYNOS4 system | 13 | # Core support for EXYNOS4 system |
14 | 14 | ||
15 | obj-$(CONFIG_ARCH_EXYNOS4) += cpu.o init.o clock.o irq-combiner.o | 15 | obj-$(CONFIG_ARCH_EXYNOS4) += cpu.o init.o clock.o irq-combiner.o setup-i2c0.o |
16 | obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o irq-eint.o dma.o pmu.o | 16 | obj-$(CONFIG_ARCH_EXYNOS4) += irq-eint.o dma.o pmu.o |
17 | obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o | 17 | obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o |
18 | obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o | 18 | obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o |
19 | obj-$(CONFIG_PM) += pm.o sleep.o | 19 | obj-$(CONFIG_PM) += pm.o |
20 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | 20 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o |
21 | 21 | ||
22 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o | 22 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o |
@@ -39,11 +39,11 @@ obj-$(CONFIG_MACH_SMDK4412) += mach-smdk4x12.o | |||
39 | 39 | ||
40 | # device support | 40 | # device support |
41 | 41 | ||
42 | obj-y += dev-audio.o | 42 | obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o |
43 | obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o | 43 | obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o |
44 | obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o | 44 | obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o |
45 | obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o | 45 | obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o |
46 | obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o | 46 | obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o |
47 | 47 | ||
48 | obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o | 48 | obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o |
49 | obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o | 49 | obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o |
@@ -57,5 +57,4 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o | |||
57 | obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o | 57 | obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o |
58 | obj-$(CONFIG_EXYNOS4_SETUP_SDHCI) += setup-sdhci.o | 58 | obj-$(CONFIG_EXYNOS4_SETUP_SDHCI) += setup-sdhci.o |
59 | obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | 59 | obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o |
60 | |||
61 | obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o | 60 | obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o |
diff --git a/arch/arm/mach-exynos4/Makefile.boot b/arch/arm/mach-exynos/Makefile.boot index b9862e22bf1..b9862e22bf1 100644 --- a/arch/arm/mach-exynos4/Makefile.boot +++ b/arch/arm/mach-exynos/Makefile.boot | |||
diff --git a/arch/arm/mach-exynos4/clock-exynos4210.c b/arch/arm/mach-exynos/clock-exynos4210.c index b9d5ef670eb..b9d5ef670eb 100644 --- a/arch/arm/mach-exynos4/clock-exynos4210.c +++ b/arch/arm/mach-exynos/clock-exynos4210.c | |||
diff --git a/arch/arm/mach-exynos4/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c index 77d5decb34f..77d5decb34f 100644 --- a/arch/arm/mach-exynos4/clock-exynos4212.c +++ b/arch/arm/mach-exynos/clock-exynos4212.c | |||
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos/clock.c index 0d59be3fa1f..2894f0adef5 100644 --- a/arch/arm/mach-exynos4/clock.c +++ b/arch/arm/mach-exynos/clock.c | |||
@@ -111,6 +111,11 @@ struct clk clk_sclk_usbphy1 = { | |||
111 | .name = "sclk_usbphy1", | 111 | .name = "sclk_usbphy1", |
112 | }; | 112 | }; |
113 | 113 | ||
114 | static struct clk dummy_apb_pclk = { | ||
115 | .name = "apb_pclk", | ||
116 | .id = -1, | ||
117 | }; | ||
118 | |||
114 | static int exynos4_clksrc_mask_top_ctrl(struct clk *clk, int enable) | 119 | static int exynos4_clksrc_mask_top_ctrl(struct clk *clk, int enable) |
115 | { | 120 | { |
116 | return s5p_gatectrl(S5P_CLKSRC_MASK_TOP, clk, enable); | 121 | return s5p_gatectrl(S5P_CLKSRC_MASK_TOP, clk, enable); |
@@ -146,6 +151,11 @@ static int exynos4_clk_ip_mfc_ctrl(struct clk *clk, int enable) | |||
146 | return s5p_gatectrl(S5P_CLKGATE_IP_MFC, clk, enable); | 151 | return s5p_gatectrl(S5P_CLKGATE_IP_MFC, clk, enable); |
147 | } | 152 | } |
148 | 153 | ||
154 | static int exynos4_clksrc_mask_tv_ctrl(struct clk *clk, int enable) | ||
155 | { | ||
156 | return s5p_gatectrl(S5P_CLKSRC_MASK_TV, clk, enable); | ||
157 | } | ||
158 | |||
149 | static int exynos4_clk_ip_cam_ctrl(struct clk *clk, int enable) | 159 | static int exynos4_clk_ip_cam_ctrl(struct clk *clk, int enable) |
150 | { | 160 | { |
151 | return s5p_gatectrl(S5P_CLKGATE_IP_CAM, clk, enable); | 161 | return s5p_gatectrl(S5P_CLKGATE_IP_CAM, clk, enable); |
@@ -186,6 +196,16 @@ static int exynos4_clk_ip_perir_ctrl(struct clk *clk, int enable) | |||
186 | return s5p_gatectrl(S5P_CLKGATE_IP_PERIR, clk, enable); | 196 | return s5p_gatectrl(S5P_CLKGATE_IP_PERIR, clk, enable); |
187 | } | 197 | } |
188 | 198 | ||
199 | static int exynos4_clk_hdmiphy_ctrl(struct clk *clk, int enable) | ||
200 | { | ||
201 | return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable); | ||
202 | } | ||
203 | |||
204 | static int exynos4_clk_dac_ctrl(struct clk *clk, int enable) | ||
205 | { | ||
206 | return s5p_gatectrl(S5P_DAC_PHY_CONTROL, clk, enable); | ||
207 | } | ||
208 | |||
189 | /* Core list of CMU_CPU side */ | 209 | /* Core list of CMU_CPU side */ |
190 | 210 | ||
191 | static struct clksrc_clk clk_mout_apll = { | 211 | static struct clksrc_clk clk_mout_apll = { |
@@ -503,13 +523,43 @@ static struct clk init_clocks_off[] = { | |||
503 | .enable = exynos4_clk_ip_fsys_ctrl, | 523 | .enable = exynos4_clk_ip_fsys_ctrl, |
504 | .ctrlbit = (1 << 9), | 524 | .ctrlbit = (1 << 9), |
505 | }, { | 525 | }, { |
506 | .name = "pdma", | 526 | .name = "dac", |
507 | .devname = "s3c-pl330.0", | 527 | .devname = "s5p-sdo", |
528 | .enable = exynos4_clk_ip_tv_ctrl, | ||
529 | .ctrlbit = (1 << 2), | ||
530 | }, { | ||
531 | .name = "mixer", | ||
532 | .devname = "s5p-mixer", | ||
533 | .enable = exynos4_clk_ip_tv_ctrl, | ||
534 | .ctrlbit = (1 << 1), | ||
535 | }, { | ||
536 | .name = "vp", | ||
537 | .devname = "s5p-mixer", | ||
538 | .enable = exynos4_clk_ip_tv_ctrl, | ||
539 | .ctrlbit = (1 << 0), | ||
540 | }, { | ||
541 | .name = "hdmi", | ||
542 | .devname = "exynos4-hdmi", | ||
543 | .enable = exynos4_clk_ip_tv_ctrl, | ||
544 | .ctrlbit = (1 << 3), | ||
545 | }, { | ||
546 | .name = "hdmiphy", | ||
547 | .devname = "exynos4-hdmi", | ||
548 | .enable = exynos4_clk_hdmiphy_ctrl, | ||
549 | .ctrlbit = (1 << 0), | ||
550 | }, { | ||
551 | .name = "dacphy", | ||
552 | .devname = "s5p-sdo", | ||
553 | .enable = exynos4_clk_dac_ctrl, | ||
554 | .ctrlbit = (1 << 0), | ||
555 | }, { | ||
556 | .name = "dma", | ||
557 | .devname = "dma-pl330.0", | ||
508 | .enable = exynos4_clk_ip_fsys_ctrl, | 558 | .enable = exynos4_clk_ip_fsys_ctrl, |
509 | .ctrlbit = (1 << 0), | 559 | .ctrlbit = (1 << 0), |
510 | }, { | 560 | }, { |
511 | .name = "pdma", | 561 | .name = "dma", |
512 | .devname = "s3c-pl330.1", | 562 | .devname = "dma-pl330.1", |
513 | .enable = exynos4_clk_ip_fsys_ctrl, | 563 | .enable = exynos4_clk_ip_fsys_ctrl, |
514 | .ctrlbit = (1 << 1), | 564 | .ctrlbit = (1 << 1), |
515 | }, { | 565 | }, { |
@@ -630,6 +680,12 @@ static struct clk init_clocks_off[] = { | |||
630 | .enable = exynos4_clk_ip_peril_ctrl, | 680 | .enable = exynos4_clk_ip_peril_ctrl, |
631 | .ctrlbit = (1 << 13), | 681 | .ctrlbit = (1 << 13), |
632 | }, { | 682 | }, { |
683 | .name = "i2c", | ||
684 | .devname = "s3c2440-hdmiphy-i2c", | ||
685 | .parent = &clk_aclk_100.clk, | ||
686 | .enable = exynos4_clk_ip_peril_ctrl, | ||
687 | .ctrlbit = (1 << 14), | ||
688 | }, { | ||
633 | .name = "SYSMMU_MDMA", | 689 | .name = "SYSMMU_MDMA", |
634 | .enable = exynos4_clk_ip_image_ctrl, | 690 | .enable = exynos4_clk_ip_image_ctrl, |
635 | .ctrlbit = (1 << 5), | 691 | .ctrlbit = (1 << 5), |
@@ -831,6 +887,81 @@ static struct clksrc_sources clkset_mout_mfc = { | |||
831 | .nr_sources = ARRAY_SIZE(clkset_mout_mfc_list), | 887 | .nr_sources = ARRAY_SIZE(clkset_mout_mfc_list), |
832 | }; | 888 | }; |
833 | 889 | ||
890 | static struct clk *clkset_sclk_dac_list[] = { | ||
891 | [0] = &clk_sclk_vpll.clk, | ||
892 | [1] = &clk_sclk_hdmiphy, | ||
893 | }; | ||
894 | |||
895 | static struct clksrc_sources clkset_sclk_dac = { | ||
896 | .sources = clkset_sclk_dac_list, | ||
897 | .nr_sources = ARRAY_SIZE(clkset_sclk_dac_list), | ||
898 | }; | ||
899 | |||
900 | static struct clksrc_clk clk_sclk_dac = { | ||
901 | .clk = { | ||
902 | .name = "sclk_dac", | ||
903 | .enable = exynos4_clksrc_mask_tv_ctrl, | ||
904 | .ctrlbit = (1 << 8), | ||
905 | }, | ||
906 | .sources = &clkset_sclk_dac, | ||
907 | .reg_src = { .reg = S5P_CLKSRC_TV, .shift = 8, .size = 1 }, | ||
908 | }; | ||
909 | |||
910 | static struct clksrc_clk clk_sclk_pixel = { | ||
911 | .clk = { | ||
912 | .name = "sclk_pixel", | ||
913 | .parent = &clk_sclk_vpll.clk, | ||
914 | }, | ||
915 | .reg_div = { .reg = S5P_CLKDIV_TV, .shift = 0, .size = 4 }, | ||
916 | }; | ||
917 | |||
918 | static struct clk *clkset_sclk_hdmi_list[] = { | ||
919 | [0] = &clk_sclk_pixel.clk, | ||
920 | [1] = &clk_sclk_hdmiphy, | ||
921 | }; | ||
922 | |||
923 | static struct clksrc_sources clkset_sclk_hdmi = { | ||
924 | .sources = clkset_sclk_hdmi_list, | ||
925 | .nr_sources = ARRAY_SIZE(clkset_sclk_hdmi_list), | ||
926 | }; | ||
927 | |||
928 | static struct clksrc_clk clk_sclk_hdmi = { | ||
929 | .clk = { | ||
930 | .name = "sclk_hdmi", | ||
931 | .enable = exynos4_clksrc_mask_tv_ctrl, | ||
932 | .ctrlbit = (1 << 0), | ||
933 | }, | ||
934 | .sources = &clkset_sclk_hdmi, | ||
935 | .reg_src = { .reg = S5P_CLKSRC_TV, .shift = 0, .size = 1 }, | ||
936 | }; | ||
937 | |||
938 | static struct clk *clkset_sclk_mixer_list[] = { | ||
939 | [0] = &clk_sclk_dac.clk, | ||
940 | [1] = &clk_sclk_hdmi.clk, | ||
941 | }; | ||
942 | |||
943 | static struct clksrc_sources clkset_sclk_mixer = { | ||
944 | .sources = clkset_sclk_mixer_list, | ||
945 | .nr_sources = ARRAY_SIZE(clkset_sclk_mixer_list), | ||
946 | }; | ||
947 | |||
948 | static struct clksrc_clk clk_sclk_mixer = { | ||
949 | .clk = { | ||
950 | .name = "sclk_mixer", | ||
951 | .enable = exynos4_clksrc_mask_tv_ctrl, | ||
952 | .ctrlbit = (1 << 4), | ||
953 | }, | ||
954 | .sources = &clkset_sclk_mixer, | ||
955 | .reg_src = { .reg = S5P_CLKSRC_TV, .shift = 4, .size = 1 }, | ||
956 | }; | ||
957 | |||
958 | static struct clksrc_clk *sclk_tv[] = { | ||
959 | &clk_sclk_dac, | ||
960 | &clk_sclk_pixel, | ||
961 | &clk_sclk_hdmi, | ||
962 | &clk_sclk_mixer, | ||
963 | }; | ||
964 | |||
834 | static struct clksrc_clk clk_dout_mmc0 = { | 965 | static struct clksrc_clk clk_dout_mmc0 = { |
835 | .clk = { | 966 | .clk = { |
836 | .name = "dout_mmc0", | 967 | .name = "dout_mmc0", |
@@ -1157,6 +1288,71 @@ static struct clk_ops exynos4_fout_apll_ops = { | |||
1157 | .get_rate = exynos4_fout_apll_get_rate, | 1288 | .get_rate = exynos4_fout_apll_get_rate, |
1158 | }; | 1289 | }; |
1159 | 1290 | ||
1291 | static u32 vpll_div[][8] = { | ||
1292 | { 54000000, 3, 53, 3, 1024, 0, 17, 0 }, | ||
1293 | { 108000000, 3, 53, 2, 1024, 0, 17, 0 }, | ||
1294 | }; | ||
1295 | |||
1296 | static unsigned long exynos4_vpll_get_rate(struct clk *clk) | ||
1297 | { | ||
1298 | return clk->rate; | ||
1299 | } | ||
1300 | |||
1301 | static int exynos4_vpll_set_rate(struct clk *clk, unsigned long rate) | ||
1302 | { | ||
1303 | unsigned int vpll_con0, vpll_con1 = 0; | ||
1304 | unsigned int i; | ||
1305 | |||
1306 | /* Return if nothing changed */ | ||
1307 | if (clk->rate == rate) | ||
1308 | return 0; | ||
1309 | |||
1310 | vpll_con0 = __raw_readl(S5P_VPLL_CON0); | ||
1311 | vpll_con0 &= ~(0x1 << 27 | \ | ||
1312 | PLL90XX_MDIV_MASK << PLL46XX_MDIV_SHIFT | \ | ||
1313 | PLL90XX_PDIV_MASK << PLL46XX_PDIV_SHIFT | \ | ||
1314 | PLL90XX_SDIV_MASK << PLL46XX_SDIV_SHIFT); | ||
1315 | |||
1316 | vpll_con1 = __raw_readl(S5P_VPLL_CON1); | ||
1317 | vpll_con1 &= ~(PLL46XX_MRR_MASK << PLL46XX_MRR_SHIFT | \ | ||
1318 | PLL46XX_MFR_MASK << PLL46XX_MFR_SHIFT | \ | ||
1319 | PLL4650C_KDIV_MASK << PLL46XX_KDIV_SHIFT); | ||
1320 | |||
1321 | for (i = 0; i < ARRAY_SIZE(vpll_div); i++) { | ||
1322 | if (vpll_div[i][0] == rate) { | ||
1323 | vpll_con0 |= vpll_div[i][1] << PLL46XX_PDIV_SHIFT; | ||
1324 | vpll_con0 |= vpll_div[i][2] << PLL46XX_MDIV_SHIFT; | ||
1325 | vpll_con0 |= vpll_div[i][3] << PLL46XX_SDIV_SHIFT; | ||
1326 | vpll_con1 |= vpll_div[i][4] << PLL46XX_KDIV_SHIFT; | ||
1327 | vpll_con1 |= vpll_div[i][5] << PLL46XX_MFR_SHIFT; | ||
1328 | vpll_con1 |= vpll_div[i][6] << PLL46XX_MRR_SHIFT; | ||
1329 | vpll_con0 |= vpll_div[i][7] << 27; | ||
1330 | break; | ||
1331 | } | ||
1332 | } | ||
1333 | |||
1334 | if (i == ARRAY_SIZE(vpll_div)) { | ||
1335 | printk(KERN_ERR "%s: Invalid Clock VPLL Frequency\n", | ||
1336 | __func__); | ||
1337 | return -EINVAL; | ||
1338 | } | ||
1339 | |||
1340 | __raw_writel(vpll_con0, S5P_VPLL_CON0); | ||
1341 | __raw_writel(vpll_con1, S5P_VPLL_CON1); | ||
1342 | |||
1343 | /* Wait for VPLL lock */ | ||
1344 | while (!(__raw_readl(S5P_VPLL_CON0) & (1 << PLL46XX_LOCKED_SHIFT))) | ||
1345 | continue; | ||
1346 | |||
1347 | clk->rate = rate; | ||
1348 | return 0; | ||
1349 | } | ||
1350 | |||
1351 | static struct clk_ops exynos4_vpll_ops = { | ||
1352 | .get_rate = exynos4_vpll_get_rate, | ||
1353 | .set_rate = exynos4_vpll_set_rate, | ||
1354 | }; | ||
1355 | |||
1160 | void __init_or_cpufreq exynos4_setup_clocks(void) | 1356 | void __init_or_cpufreq exynos4_setup_clocks(void) |
1161 | { | 1357 | { |
1162 | struct clk *xtal_clk; | 1358 | struct clk *xtal_clk; |
@@ -1214,6 +1410,7 @@ void __init_or_cpufreq exynos4_setup_clocks(void) | |||
1214 | clk_fout_apll.ops = &exynos4_fout_apll_ops; | 1410 | clk_fout_apll.ops = &exynos4_fout_apll_ops; |
1215 | clk_fout_mpll.rate = mpll; | 1411 | clk_fout_mpll.rate = mpll; |
1216 | clk_fout_epll.rate = epll; | 1412 | clk_fout_epll.rate = epll; |
1413 | clk_fout_vpll.ops = &exynos4_vpll_ops; | ||
1217 | clk_fout_vpll.rate = vpll; | 1414 | clk_fout_vpll.rate = vpll; |
1218 | 1415 | ||
1219 | printk(KERN_INFO "EXYNOS4: PLL settings, A=%ld, M=%ld, E=%ld V=%ld", | 1416 | printk(KERN_INFO "EXYNOS4: PLL settings, A=%ld, M=%ld, E=%ld V=%ld", |
@@ -1241,7 +1438,10 @@ void __init_or_cpufreq exynos4_setup_clocks(void) | |||
1241 | } | 1438 | } |
1242 | 1439 | ||
1243 | static struct clk *clks[] __initdata = { | 1440 | static struct clk *clks[] __initdata = { |
1244 | /* Nothing here yet */ | 1441 | &clk_sclk_hdmi27m, |
1442 | &clk_sclk_hdmiphy, | ||
1443 | &clk_sclk_usbphy0, | ||
1444 | &clk_sclk_usbphy1, | ||
1245 | }; | 1445 | }; |
1246 | 1446 | ||
1247 | #ifdef CONFIG_PM_SLEEP | 1447 | #ifdef CONFIG_PM_SLEEP |
@@ -1275,6 +1475,9 @@ void __init exynos4_register_clocks(void) | |||
1275 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | 1475 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) |
1276 | s3c_register_clksrc(sysclks[ptr], 1); | 1476 | s3c_register_clksrc(sysclks[ptr], 1); |
1277 | 1477 | ||
1478 | for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++) | ||
1479 | s3c_register_clksrc(sclk_tv[ptr], 1); | ||
1480 | |||
1278 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 1481 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
1279 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 1482 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
1280 | 1483 | ||
@@ -1282,5 +1485,7 @@ void __init exynos4_register_clocks(void) | |||
1282 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1485 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1283 | 1486 | ||
1284 | register_syscore_ops(&exynos4_clock_syscore_ops); | 1487 | register_syscore_ops(&exynos4_clock_syscore_ops); |
1488 | s3c24xx_register_clock(&dummy_apb_pclk); | ||
1489 | |||
1285 | s3c_pwmclk_init(); | 1490 | s3c_pwmclk_init(); |
1286 | } | 1491 | } |
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos/cpu.c index a348434f17b..90ec247f3b3 100644 --- a/arch/arm/mach-exynos4/cpu.c +++ b/arch/arm/mach-exynos/cpu.c | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/cpu.c | 1 | /* linux/arch/arm/mach-exynos/cpu.c |
2 | * | 2 | * |
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
@@ -28,6 +28,7 @@ | |||
28 | #include <plat/fimc-core.h> | 28 | #include <plat/fimc-core.h> |
29 | #include <plat/iic-core.h> | 29 | #include <plat/iic-core.h> |
30 | #include <plat/reset.h> | 30 | #include <plat/reset.h> |
31 | #include <plat/tv-core.h> | ||
31 | 32 | ||
32 | #include <mach/regs-irq.h> | 33 | #include <mach/regs-irq.h> |
33 | #include <mach/regs-pmu.h> | 34 | #include <mach/regs-pmu.h> |
@@ -39,28 +40,47 @@ extern int combiner_init(unsigned int combiner_nr, void __iomem *base, | |||
39 | extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); | 40 | extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); |
40 | 41 | ||
41 | /* Initial IO mappings */ | 42 | /* Initial IO mappings */ |
42 | static struct map_desc exynos4_iodesc[] __initdata = { | 43 | static struct map_desc exynos_iodesc[] __initdata = { |
43 | { | 44 | { |
44 | .virtual = (unsigned long)S5P_VA_SYSTIMER, | 45 | .virtual = (unsigned long)S5P_VA_SYSTIMER, |
45 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER), | 46 | .pfn = __phys_to_pfn(EXYNOS_PA_SYSTIMER), |
46 | .length = SZ_4K, | 47 | .length = SZ_4K, |
47 | .type = MT_DEVICE, | ||
48 | }, { | ||
49 | .virtual = (unsigned long)S5P_VA_CMU, | ||
50 | .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), | ||
51 | .length = SZ_128K, | ||
52 | .type = MT_DEVICE, | 48 | .type = MT_DEVICE, |
53 | }, { | 49 | }, { |
54 | .virtual = (unsigned long)S5P_VA_PMU, | 50 | .virtual = (unsigned long)S5P_VA_PMU, |
55 | .pfn = __phys_to_pfn(EXYNOS4_PA_PMU), | 51 | .pfn = __phys_to_pfn(EXYNOS_PA_PMU), |
56 | .length = SZ_64K, | 52 | .length = SZ_64K, |
57 | .type = MT_DEVICE, | 53 | .type = MT_DEVICE, |
58 | }, { | 54 | }, { |
59 | .virtual = (unsigned long)S5P_VA_COMBINER_BASE, | 55 | .virtual = (unsigned long)S5P_VA_COMBINER_BASE, |
60 | .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER), | 56 | .pfn = __phys_to_pfn(EXYNOS_PA_COMBINER), |
61 | .length = SZ_4K, | 57 | .length = SZ_4K, |
62 | .type = MT_DEVICE, | 58 | .type = MT_DEVICE, |
63 | }, { | 59 | }, { |
60 | .virtual = (unsigned long)S5P_VA_GIC_CPU, | ||
61 | .pfn = __phys_to_pfn(EXYNOS_PA_GIC_CPU), | ||
62 | .length = SZ_64K, | ||
63 | .type = MT_DEVICE, | ||
64 | }, { | ||
65 | .virtual = (unsigned long)S5P_VA_GIC_DIST, | ||
66 | .pfn = __phys_to_pfn(EXYNOS_PA_GIC_DIST), | ||
67 | .length = SZ_64K, | ||
68 | .type = MT_DEVICE, | ||
69 | }, { | ||
70 | .virtual = (unsigned long)S3C_VA_UART, | ||
71 | .pfn = __phys_to_pfn(S3C_PA_UART), | ||
72 | .length = SZ_512K, | ||
73 | .type = MT_DEVICE, | ||
74 | }, | ||
75 | }; | ||
76 | |||
77 | static struct map_desc exynos4_iodesc[] __initdata = { | ||
78 | { | ||
79 | .virtual = (unsigned long)S5P_VA_CMU, | ||
80 | .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), | ||
81 | .length = SZ_128K, | ||
82 | .type = MT_DEVICE, | ||
83 | }, { | ||
64 | .virtual = (unsigned long)S5P_VA_COREPERI_BASE, | 84 | .virtual = (unsigned long)S5P_VA_COREPERI_BASE, |
65 | .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI), | 85 | .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI), |
66 | .length = SZ_8K, | 86 | .length = SZ_8K, |
@@ -91,11 +111,6 @@ static struct map_desc exynos4_iodesc[] __initdata = { | |||
91 | .length = SZ_4K, | 111 | .length = SZ_4K, |
92 | .type = MT_DEVICE, | 112 | .type = MT_DEVICE, |
93 | }, { | 113 | }, { |
94 | .virtual = (unsigned long)S3C_VA_UART, | ||
95 | .pfn = __phys_to_pfn(S3C_PA_UART), | ||
96 | .length = SZ_512K, | ||
97 | .type = MT_DEVICE, | ||
98 | }, { | ||
99 | .virtual = (unsigned long)S5P_VA_SROMC, | 114 | .virtual = (unsigned long)S5P_VA_SROMC, |
100 | .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), | 115 | .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), |
101 | .length = SZ_4K, | 116 | .length = SZ_4K, |
@@ -105,16 +120,6 @@ static struct map_desc exynos4_iodesc[] __initdata = { | |||
105 | .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY), | 120 | .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY), |
106 | .length = SZ_4K, | 121 | .length = SZ_4K, |
107 | .type = MT_DEVICE, | 122 | .type = MT_DEVICE, |
108 | }, { | ||
109 | .virtual = (unsigned long)S5P_VA_GIC_CPU, | ||
110 | .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_CPU), | ||
111 | .length = SZ_64K, | ||
112 | .type = MT_DEVICE, | ||
113 | }, { | ||
114 | .virtual = (unsigned long)S5P_VA_GIC_DIST, | ||
115 | .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST), | ||
116 | .length = SZ_64K, | ||
117 | .type = MT_DEVICE, | ||
118 | }, | 123 | }, |
119 | }; | 124 | }; |
120 | 125 | ||
@@ -136,7 +141,7 @@ static struct map_desc exynos4_iodesc1[] __initdata = { | |||
136 | }, | 141 | }, |
137 | }; | 142 | }; |
138 | 143 | ||
139 | static void exynos4_idle(void) | 144 | static void exynos_idle(void) |
140 | { | 145 | { |
141 | if (!need_resched()) | 146 | if (!need_resched()) |
142 | cpu_do_idle(); | 147 | cpu_do_idle(); |
@@ -150,12 +155,13 @@ static void exynos4_sw_reset(void) | |||
150 | } | 155 | } |
151 | 156 | ||
152 | /* | 157 | /* |
153 | * exynos4_map_io | 158 | * exynos_map_io |
154 | * | 159 | * |
155 | * register the standard cpu IO areas | 160 | * register the standard cpu IO areas |
156 | */ | 161 | */ |
157 | void __init exynos4_map_io(void) | 162 | void __init exynos4_map_io(void) |
158 | { | 163 | { |
164 | iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc)); | ||
159 | iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); | 165 | iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); |
160 | 166 | ||
161 | if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0) | 167 | if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0) |
@@ -182,6 +188,7 @@ void __init exynos4_map_io(void) | |||
182 | s3c_i2c2_setname("s3c2440-i2c"); | 188 | s3c_i2c2_setname("s3c2440-i2c"); |
183 | 189 | ||
184 | s5p_fb_setname(0, "exynos4-fb"); | 190 | s5p_fb_setname(0, "exynos4-fb"); |
191 | s5p_hdmi_setname("exynos4-hdmi"); | ||
185 | } | 192 | } |
186 | 193 | ||
187 | void __init exynos4_init_clocks(int xtal) | 194 | void __init exynos4_init_clocks(int xtal) |
@@ -248,7 +255,6 @@ static int __init exynos4_core_init(void) | |||
248 | { | 255 | { |
249 | return sysdev_class_register(&exynos4_sysclass); | 256 | return sysdev_class_register(&exynos4_sysclass); |
250 | } | 257 | } |
251 | |||
252 | core_initcall(exynos4_core_init); | 258 | core_initcall(exynos4_core_init); |
253 | 259 | ||
254 | #ifdef CONFIG_CACHE_L2X0 | 260 | #ifdef CONFIG_CACHE_L2X0 |
@@ -277,15 +283,16 @@ static int __init exynos4_l2x0_cache_init(void) | |||
277 | early_initcall(exynos4_l2x0_cache_init); | 283 | early_initcall(exynos4_l2x0_cache_init); |
278 | #endif | 284 | #endif |
279 | 285 | ||
280 | int __init exynos4_init(void) | 286 | int __init exynos_init(void) |
281 | { | 287 | { |
282 | printk(KERN_INFO "EXYNOS4: Initializing architecture\n"); | 288 | printk(KERN_INFO "EXYNOS: Initializing architecture\n"); |
283 | 289 | ||
284 | /* set idle function */ | 290 | /* set idle function */ |
285 | pm_idle = exynos4_idle; | 291 | pm_idle = exynos_idle; |
286 | 292 | ||
287 | /* set sw_reset function */ | 293 | /* set sw_reset function */ |
288 | s5p_reset_hook = exynos4_sw_reset; | 294 | if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412()) |
295 | s5p_reset_hook = exynos4_sw_reset; | ||
289 | 296 | ||
290 | return sysdev_register(&exynos4_sysdev); | 297 | return sysdev_register(&exynos4_sysdev); |
291 | } | 298 | } |
diff --git a/arch/arm/mach-exynos4/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c index bf7e96f2793..bf7e96f2793 100644 --- a/arch/arm/mach-exynos4/cpuidle.c +++ b/arch/arm/mach-exynos/cpuidle.c | |||
diff --git a/arch/arm/mach-exynos4/dev-ahci.c b/arch/arm/mach-exynos/dev-ahci.c index f57a3de8e1d..f57a3de8e1d 100644 --- a/arch/arm/mach-exynos4/dev-ahci.c +++ b/arch/arm/mach-exynos/dev-ahci.c | |||
diff --git a/arch/arm/mach-exynos4/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c index 5a9f9c2e53b..5a9f9c2e53b 100644 --- a/arch/arm/mach-exynos4/dev-audio.c +++ b/arch/arm/mach-exynos/dev-audio.c | |||
diff --git a/arch/arm/mach-exynos4/dev-dwmci.c b/arch/arm/mach-exynos/dev-dwmci.c index b025db4bf60..b025db4bf60 100644 --- a/arch/arm/mach-exynos4/dev-dwmci.c +++ b/arch/arm/mach-exynos/dev-dwmci.c | |||
diff --git a/arch/arm/mach-exynos4/dev-pd.c b/arch/arm/mach-exynos/dev-pd.c index 3273f25d6a7..3273f25d6a7 100644 --- a/arch/arm/mach-exynos4/dev-pd.c +++ b/arch/arm/mach-exynos/dev-pd.c | |||
diff --git a/arch/arm/mach-exynos4/dev-sysmmu.c b/arch/arm/mach-exynos/dev-sysmmu.c index 3b7cae0fe23..781563fcb15 100644 --- a/arch/arm/mach-exynos4/dev-sysmmu.c +++ b/arch/arm/mach-exynos/dev-sysmmu.c | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
14 | #include <linux/dma-mapping.h> | 14 | #include <linux/dma-mapping.h> |
15 | #include <linux/export.h> | ||
15 | 16 | ||
16 | #include <mach/map.h> | 17 | #include <mach/map.h> |
17 | #include <mach/irqs.h> | 18 | #include <mach/irqs.h> |
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c new file mode 100644 index 00000000000..9667c61e64f --- /dev/null +++ b/arch/arm/mach-exynos/dma.c | |||
@@ -0,0 +1,250 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/dma.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
7 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
22 | */ | ||
23 | |||
24 | #include <linux/dma-mapping.h> | ||
25 | #include <linux/amba/bus.h> | ||
26 | #include <linux/amba/pl330.h> | ||
27 | |||
28 | #include <asm/irq.h> | ||
29 | #include <plat/devs.h> | ||
30 | #include <plat/irqs.h> | ||
31 | |||
32 | #include <mach/map.h> | ||
33 | #include <mach/irqs.h> | ||
34 | #include <mach/dma.h> | ||
35 | |||
36 | static u64 dma_dmamask = DMA_BIT_MASK(32); | ||
37 | |||
38 | struct dma_pl330_peri pdma0_peri[28] = { | ||
39 | { | ||
40 | .peri_id = (u8)DMACH_PCM0_RX, | ||
41 | .rqtype = DEVTOMEM, | ||
42 | }, { | ||
43 | .peri_id = (u8)DMACH_PCM0_TX, | ||
44 | .rqtype = MEMTODEV, | ||
45 | }, { | ||
46 | .peri_id = (u8)DMACH_PCM2_RX, | ||
47 | .rqtype = DEVTOMEM, | ||
48 | }, { | ||
49 | .peri_id = (u8)DMACH_PCM2_TX, | ||
50 | .rqtype = MEMTODEV, | ||
51 | }, { | ||
52 | .peri_id = (u8)DMACH_MSM_REQ0, | ||
53 | }, { | ||
54 | .peri_id = (u8)DMACH_MSM_REQ2, | ||
55 | }, { | ||
56 | .peri_id = (u8)DMACH_SPI0_RX, | ||
57 | .rqtype = DEVTOMEM, | ||
58 | }, { | ||
59 | .peri_id = (u8)DMACH_SPI0_TX, | ||
60 | .rqtype = MEMTODEV, | ||
61 | }, { | ||
62 | .peri_id = (u8)DMACH_SPI2_RX, | ||
63 | .rqtype = DEVTOMEM, | ||
64 | }, { | ||
65 | .peri_id = (u8)DMACH_SPI2_TX, | ||
66 | .rqtype = MEMTODEV, | ||
67 | }, { | ||
68 | .peri_id = (u8)DMACH_I2S0S_TX, | ||
69 | .rqtype = MEMTODEV, | ||
70 | }, { | ||
71 | .peri_id = (u8)DMACH_I2S0_RX, | ||
72 | .rqtype = DEVTOMEM, | ||
73 | }, { | ||
74 | .peri_id = (u8)DMACH_I2S0_TX, | ||
75 | .rqtype = MEMTODEV, | ||
76 | }, { | ||
77 | .peri_id = (u8)DMACH_UART0_RX, | ||
78 | .rqtype = DEVTOMEM, | ||
79 | }, { | ||
80 | .peri_id = (u8)DMACH_UART0_TX, | ||
81 | .rqtype = MEMTODEV, | ||
82 | }, { | ||
83 | .peri_id = (u8)DMACH_UART2_RX, | ||
84 | .rqtype = DEVTOMEM, | ||
85 | }, { | ||
86 | .peri_id = (u8)DMACH_UART2_TX, | ||
87 | .rqtype = MEMTODEV, | ||
88 | }, { | ||
89 | .peri_id = (u8)DMACH_UART4_RX, | ||
90 | .rqtype = DEVTOMEM, | ||
91 | }, { | ||
92 | .peri_id = (u8)DMACH_UART4_TX, | ||
93 | .rqtype = MEMTODEV, | ||
94 | }, { | ||
95 | .peri_id = (u8)DMACH_SLIMBUS0_RX, | ||
96 | .rqtype = DEVTOMEM, | ||
97 | }, { | ||
98 | .peri_id = (u8)DMACH_SLIMBUS0_TX, | ||
99 | .rqtype = MEMTODEV, | ||
100 | }, { | ||
101 | .peri_id = (u8)DMACH_SLIMBUS2_RX, | ||
102 | .rqtype = DEVTOMEM, | ||
103 | }, { | ||
104 | .peri_id = (u8)DMACH_SLIMBUS2_TX, | ||
105 | .rqtype = MEMTODEV, | ||
106 | }, { | ||
107 | .peri_id = (u8)DMACH_SLIMBUS4_RX, | ||
108 | .rqtype = DEVTOMEM, | ||
109 | }, { | ||
110 | .peri_id = (u8)DMACH_SLIMBUS4_TX, | ||
111 | .rqtype = MEMTODEV, | ||
112 | }, { | ||
113 | .peri_id = (u8)DMACH_AC97_MICIN, | ||
114 | .rqtype = DEVTOMEM, | ||
115 | }, { | ||
116 | .peri_id = (u8)DMACH_AC97_PCMIN, | ||
117 | .rqtype = DEVTOMEM, | ||
118 | }, { | ||
119 | .peri_id = (u8)DMACH_AC97_PCMOUT, | ||
120 | .rqtype = MEMTODEV, | ||
121 | }, | ||
122 | }; | ||
123 | |||
124 | struct dma_pl330_platdata exynos4_pdma0_pdata = { | ||
125 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), | ||
126 | .peri = pdma0_peri, | ||
127 | }; | ||
128 | |||
129 | struct amba_device exynos4_device_pdma0 = { | ||
130 | .dev = { | ||
131 | .init_name = "dma-pl330.0", | ||
132 | .dma_mask = &dma_dmamask, | ||
133 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
134 | .platform_data = &exynos4_pdma0_pdata, | ||
135 | }, | ||
136 | .res = { | ||
137 | .start = EXYNOS4_PA_PDMA0, | ||
138 | .end = EXYNOS4_PA_PDMA0 + SZ_4K, | ||
139 | .flags = IORESOURCE_MEM, | ||
140 | }, | ||
141 | .irq = {IRQ_PDMA0, NO_IRQ}, | ||
142 | .periphid = 0x00041330, | ||
143 | }; | ||
144 | |||
145 | struct dma_pl330_peri pdma1_peri[25] = { | ||
146 | { | ||
147 | .peri_id = (u8)DMACH_PCM0_RX, | ||
148 | .rqtype = DEVTOMEM, | ||
149 | }, { | ||
150 | .peri_id = (u8)DMACH_PCM0_TX, | ||
151 | .rqtype = MEMTODEV, | ||
152 | }, { | ||
153 | .peri_id = (u8)DMACH_PCM1_RX, | ||
154 | .rqtype = DEVTOMEM, | ||
155 | }, { | ||
156 | .peri_id = (u8)DMACH_PCM1_TX, | ||
157 | .rqtype = MEMTODEV, | ||
158 | }, { | ||
159 | .peri_id = (u8)DMACH_MSM_REQ1, | ||
160 | }, { | ||
161 | .peri_id = (u8)DMACH_MSM_REQ3, | ||
162 | }, { | ||
163 | .peri_id = (u8)DMACH_SPI1_RX, | ||
164 | .rqtype = DEVTOMEM, | ||
165 | }, { | ||
166 | .peri_id = (u8)DMACH_SPI1_TX, | ||
167 | .rqtype = MEMTODEV, | ||
168 | }, { | ||
169 | .peri_id = (u8)DMACH_I2S0S_TX, | ||
170 | .rqtype = MEMTODEV, | ||
171 | }, { | ||
172 | .peri_id = (u8)DMACH_I2S0_RX, | ||
173 | .rqtype = DEVTOMEM, | ||
174 | }, { | ||
175 | .peri_id = (u8)DMACH_I2S0_TX, | ||
176 | .rqtype = MEMTODEV, | ||
177 | }, { | ||
178 | .peri_id = (u8)DMACH_I2S1_RX, | ||
179 | .rqtype = DEVTOMEM, | ||
180 | }, { | ||
181 | .peri_id = (u8)DMACH_I2S1_TX, | ||
182 | .rqtype = MEMTODEV, | ||
183 | }, { | ||
184 | .peri_id = (u8)DMACH_UART0_RX, | ||
185 | .rqtype = DEVTOMEM, | ||
186 | }, { | ||
187 | .peri_id = (u8)DMACH_UART0_TX, | ||
188 | .rqtype = MEMTODEV, | ||
189 | }, { | ||
190 | .peri_id = (u8)DMACH_UART1_RX, | ||
191 | .rqtype = DEVTOMEM, | ||
192 | }, { | ||
193 | .peri_id = (u8)DMACH_UART1_TX, | ||
194 | .rqtype = MEMTODEV, | ||
195 | }, { | ||
196 | .peri_id = (u8)DMACH_UART3_RX, | ||
197 | .rqtype = DEVTOMEM, | ||
198 | }, { | ||
199 | .peri_id = (u8)DMACH_UART3_TX, | ||
200 | .rqtype = MEMTODEV, | ||
201 | }, { | ||
202 | .peri_id = (u8)DMACH_SLIMBUS1_RX, | ||
203 | .rqtype = DEVTOMEM, | ||
204 | }, { | ||
205 | .peri_id = (u8)DMACH_SLIMBUS1_TX, | ||
206 | .rqtype = MEMTODEV, | ||
207 | }, { | ||
208 | .peri_id = (u8)DMACH_SLIMBUS3_RX, | ||
209 | .rqtype = DEVTOMEM, | ||
210 | }, { | ||
211 | .peri_id = (u8)DMACH_SLIMBUS3_TX, | ||
212 | .rqtype = MEMTODEV, | ||
213 | }, { | ||
214 | .peri_id = (u8)DMACH_SLIMBUS5_RX, | ||
215 | .rqtype = DEVTOMEM, | ||
216 | }, { | ||
217 | .peri_id = (u8)DMACH_SLIMBUS5_TX, | ||
218 | .rqtype = MEMTODEV, | ||
219 | }, | ||
220 | }; | ||
221 | |||
222 | struct dma_pl330_platdata exynos4_pdma1_pdata = { | ||
223 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), | ||
224 | .peri = pdma1_peri, | ||
225 | }; | ||
226 | |||
227 | struct amba_device exynos4_device_pdma1 = { | ||
228 | .dev = { | ||
229 | .init_name = "dma-pl330.1", | ||
230 | .dma_mask = &dma_dmamask, | ||
231 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
232 | .platform_data = &exynos4_pdma1_pdata, | ||
233 | }, | ||
234 | .res = { | ||
235 | .start = EXYNOS4_PA_PDMA1, | ||
236 | .end = EXYNOS4_PA_PDMA1 + SZ_4K, | ||
237 | .flags = IORESOURCE_MEM, | ||
238 | }, | ||
239 | .irq = {IRQ_PDMA1, NO_IRQ}, | ||
240 | .periphid = 0x00041330, | ||
241 | }; | ||
242 | |||
243 | static int __init exynos4_dma_init(void) | ||
244 | { | ||
245 | amba_device_register(&exynos4_device_pdma0, &iomem_resource); | ||
246 | amba_device_register(&exynos4_device_pdma1, &iomem_resource); | ||
247 | |||
248 | return 0; | ||
249 | } | ||
250 | arch_initcall(exynos4_dma_init); | ||
diff --git a/arch/arm/mach-exynos4/headsmp.S b/arch/arm/mach-exynos/headsmp.S index 3cdeb364754..3cdeb364754 100644 --- a/arch/arm/mach-exynos4/headsmp.S +++ b/arch/arm/mach-exynos/headsmp.S | |||
diff --git a/arch/arm/mach-exynos4/hotplug.c b/arch/arm/mach-exynos/hotplug.c index da70e7e3993..da70e7e3993 100644 --- a/arch/arm/mach-exynos4/hotplug.c +++ b/arch/arm/mach-exynos/hotplug.c | |||
diff --git a/arch/arm/mach-exynos4/include/mach/debug-macro.S b/arch/arm/mach-exynos/include/mach/debug-macro.S index 6cacf16a67a..6cacf16a67a 100644 --- a/arch/arm/mach-exynos4/include/mach/debug-macro.S +++ b/arch/arm/mach-exynos/include/mach/debug-macro.S | |||
diff --git a/arch/arm/mach-exynos4/include/mach/dma.h b/arch/arm/mach-exynos/include/mach/dma.h index 81209eb1409..201842a3769 100644 --- a/arch/arm/mach-exynos4/include/mach/dma.h +++ b/arch/arm/mach-exynos/include/mach/dma.h | |||
@@ -20,7 +20,7 @@ | |||
20 | #ifndef __MACH_DMA_H | 20 | #ifndef __MACH_DMA_H |
21 | #define __MACH_DMA_H | 21 | #define __MACH_DMA_H |
22 | 22 | ||
23 | /* This platform uses the common S3C DMA API driver for PL330 */ | 23 | /* This platform uses the common DMA API driver for PL330 */ |
24 | #include <plat/s3c-dma-pl330.h> | 24 | #include <plat/dma-pl330.h> |
25 | 25 | ||
26 | #endif /* __MACH_DMA_H */ | 26 | #endif /* __MACH_DMA_H */ |
diff --git a/arch/arm/mach-exynos4/include/mach/dwmci.h b/arch/arm/mach-exynos/include/mach/dwmci.h index 7ce657459cc..7ce657459cc 100644 --- a/arch/arm/mach-exynos4/include/mach/dwmci.h +++ b/arch/arm/mach-exynos/include/mach/dwmci.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-exynos/include/mach/entry-macro.S index f5e9fd8e37b..f5e9fd8e37b 100644 --- a/arch/arm/mach-exynos4/include/mach/entry-macro.S +++ b/arch/arm/mach-exynos/include/mach/entry-macro.S | |||
diff --git a/arch/arm/mach-exynos4/include/mach/exynos4-clock.h b/arch/arm/mach-exynos/include/mach/exynos4-clock.h index a07fcbf5525..a07fcbf5525 100644 --- a/arch/arm/mach-exynos4/include/mach/exynos4-clock.h +++ b/arch/arm/mach-exynos/include/mach/exynos4-clock.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/gpio.h b/arch/arm/mach-exynos/include/mach/gpio.h index 80523ca9bb4..80523ca9bb4 100644 --- a/arch/arm/mach-exynos4/include/mach/gpio.h +++ b/arch/arm/mach-exynos/include/mach/gpio.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/hardware.h b/arch/arm/mach-exynos/include/mach/hardware.h index 5109eb232f2..5109eb232f2 100644 --- a/arch/arm/mach-exynos4/include/mach/hardware.h +++ b/arch/arm/mach-exynos/include/mach/hardware.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/io.h b/arch/arm/mach-exynos/include/mach/io.h index d5478d24753..d5478d24753 100644 --- a/arch/arm/mach-exynos4/include/mach/io.h +++ b/arch/arm/mach-exynos/include/mach/io.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index 2d3f6bcd9bc..dfd4b7eecb9 100644 --- a/arch/arm/mach-exynos4/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h | |||
@@ -95,7 +95,11 @@ | |||
95 | #define IRQ_2D IRQ_SPI(89) | 95 | #define IRQ_2D IRQ_SPI(89) |
96 | #define IRQ_PCIE IRQ_SPI(90) | 96 | #define IRQ_PCIE IRQ_SPI(90) |
97 | 97 | ||
98 | #define IRQ_MIXER IRQ_SPI(91) | ||
99 | #define IRQ_HDMI IRQ_SPI(92) | ||
100 | #define IRQ_IIC_HDMIPHY IRQ_SPI(93) | ||
98 | #define IRQ_MFC IRQ_SPI(94) | 101 | #define IRQ_MFC IRQ_SPI(94) |
102 | #define IRQ_SDO IRQ_SPI(95) | ||
99 | 103 | ||
100 | #define IRQ_AUDIO_SS IRQ_SPI(96) | 104 | #define IRQ_AUDIO_SS IRQ_SPI(96) |
101 | #define IRQ_I2S0 IRQ_SPI(97) | 105 | #define IRQ_I2S0 IRQ_SPI(97) |
diff --git a/arch/arm/mach-exynos4/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 9f97eb8499e..058541d45af 100644 --- a/arch/arm/mach-exynos4/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/include/mach/map.h | 1 | /* linux/arch/arm/mach-exynos/include/mach/map.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
@@ -112,6 +112,12 @@ | |||
112 | 112 | ||
113 | #define EXYNOS4_PA_UART 0x13800000 | 113 | #define EXYNOS4_PA_UART 0x13800000 |
114 | 114 | ||
115 | #define EXYNOS4_PA_VP 0x12C00000 | ||
116 | #define EXYNOS4_PA_MIXER 0x12C10000 | ||
117 | #define EXYNOS4_PA_SDO 0x12C20000 | ||
118 | #define EXYNOS4_PA_HDMI 0x12D00000 | ||
119 | #define EXYNOS4_PA_IIC_HDMIPHY 0x138E0000 | ||
120 | |||
115 | #define EXYNOS4_PA_IIC(x) (0x13860000 + ((x) * 0x10000)) | 121 | #define EXYNOS4_PA_IIC(x) (0x13860000 + ((x) * 0x10000)) |
116 | 122 | ||
117 | #define EXYNOS4_PA_ADC 0x13910000 | 123 | #define EXYNOS4_PA_ADC 0x13910000 |
@@ -139,33 +145,45 @@ | |||
139 | #define S3C_PA_IIC5 EXYNOS4_PA_IIC(5) | 145 | #define S3C_PA_IIC5 EXYNOS4_PA_IIC(5) |
140 | #define S3C_PA_IIC6 EXYNOS4_PA_IIC(6) | 146 | #define S3C_PA_IIC6 EXYNOS4_PA_IIC(6) |
141 | #define S3C_PA_IIC7 EXYNOS4_PA_IIC(7) | 147 | #define S3C_PA_IIC7 EXYNOS4_PA_IIC(7) |
142 | #define SAMSUNG_PA_ADC EXYNOS4_PA_ADC | ||
143 | #define SAMSUNG_PA_ADC1 EXYNOS4_PA_ADC1 | ||
144 | #define S3C_PA_RTC EXYNOS4_PA_RTC | 148 | #define S3C_PA_RTC EXYNOS4_PA_RTC |
145 | #define S3C_PA_WDT EXYNOS4_PA_WATCHDOG | 149 | #define S3C_PA_WDT EXYNOS4_PA_WATCHDOG |
150 | #define S3C_PA_UART EXYNOS4_PA_UART | ||
146 | 151 | ||
147 | #define S5P_PA_CHIPID EXYNOS4_PA_CHIPID | 152 | #define S5P_PA_CHIPID EXYNOS4_PA_CHIPID |
153 | #define S5P_PA_EHCI EXYNOS4_PA_EHCI | ||
148 | #define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 | 154 | #define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 |
149 | #define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1 | 155 | #define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1 |
150 | #define S5P_PA_FIMC2 EXYNOS4_PA_FIMC2 | 156 | #define S5P_PA_FIMC2 EXYNOS4_PA_FIMC2 |
151 | #define S5P_PA_FIMC3 EXYNOS4_PA_FIMC3 | 157 | #define S5P_PA_FIMC3 EXYNOS4_PA_FIMC3 |
158 | #define S5P_PA_FIMD0 EXYNOS4_PA_FIMD0 | ||
159 | #define S5P_PA_HDMI EXYNOS4_PA_HDMI | ||
160 | #define S5P_PA_IIC_HDMIPHY EXYNOS4_PA_IIC_HDMIPHY | ||
161 | #define S5P_PA_MFC EXYNOS4_PA_MFC | ||
152 | #define S5P_PA_MIPI_CSIS0 EXYNOS4_PA_MIPI_CSIS0 | 162 | #define S5P_PA_MIPI_CSIS0 EXYNOS4_PA_MIPI_CSIS0 |
153 | #define S5P_PA_MIPI_CSIS1 EXYNOS4_PA_MIPI_CSIS1 | 163 | #define S5P_PA_MIPI_CSIS1 EXYNOS4_PA_MIPI_CSIS1 |
154 | #define S5P_PA_FIMD0 EXYNOS4_PA_FIMD0 | 164 | #define S5P_PA_MIXER EXYNOS4_PA_MIXER |
155 | #define S5P_PA_ONENAND EXYNOS4_PA_ONENAND | 165 | #define S5P_PA_ONENAND EXYNOS4_PA_ONENAND |
156 | #define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA | 166 | #define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA |
167 | #define S5P_PA_SDO EXYNOS4_PA_SDO | ||
157 | #define S5P_PA_SDRAM EXYNOS4_PA_SDRAM | 168 | #define S5P_PA_SDRAM EXYNOS4_PA_SDRAM |
158 | #define S5P_PA_SROMC EXYNOS4_PA_SROMC | 169 | #define S5P_PA_SROMC EXYNOS4_PA_SROMC |
159 | #define S5P_PA_MFC EXYNOS4_PA_MFC | ||
160 | #define S5P_PA_SYSCON EXYNOS4_PA_SYSCON | 170 | #define S5P_PA_SYSCON EXYNOS4_PA_SYSCON |
161 | #define S5P_PA_TIMER EXYNOS4_PA_TIMER | 171 | #define S5P_PA_TIMER EXYNOS4_PA_TIMER |
162 | #define S5P_PA_EHCI EXYNOS4_PA_EHCI | 172 | #define S5P_PA_VP EXYNOS4_PA_VP |
163 | 173 | ||
174 | #define SAMSUNG_PA_ADC EXYNOS4_PA_ADC | ||
175 | #define SAMSUNG_PA_ADC1 EXYNOS4_PA_ADC1 | ||
164 | #define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD | 176 | #define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD |
165 | 177 | ||
166 | /* UART */ | 178 | #define EXYNOS_PA_COMBINER EXYNOS4_PA_COMBINER |
179 | #define EXYNOS_PA_GIC_CPU EXYNOS4_PA_GIC_CPU | ||
180 | #define EXYNOS_PA_GIC_DIST EXYNOS4_PA_GIC_DIST | ||
181 | #define EXYNOS_PA_PMU EXYNOS4_PA_PMU | ||
182 | #define EXYNOS_PA_SYSTIMER EXYNOS4_PA_SYSTIMER | ||
167 | 183 | ||
168 | #define S3C_PA_UART EXYNOS4_PA_UART | 184 | /* Compatibility UART */ |
185 | |||
186 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) | ||
169 | 187 | ||
170 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) | 188 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) |
171 | #define S5P_PA_UART0 S5P_PA_UART(0) | 189 | #define S5P_PA_UART0 S5P_PA_UART(0) |
diff --git a/arch/arm/mach-exynos4/include/mach/memory.h b/arch/arm/mach-exynos/include/mach/memory.h index 374ef2cf715..374ef2cf715 100644 --- a/arch/arm/mach-exynos4/include/mach/memory.h +++ b/arch/arm/mach-exynos/include/mach/memory.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/pm-core.h b/arch/arm/mach-exynos/include/mach/pm-core.h index 1df3b81f96e..9d8da51e35c 100644 --- a/arch/arm/mach-exynos4/include/mach/pm-core.h +++ b/arch/arm/mach-exynos/include/mach/pm-core.h | |||
@@ -14,6 +14,10 @@ | |||
14 | * it under the terms of the GNU General Public License version 2 as | 14 | * it under the terms of the GNU General Public License version 2 as |
15 | * published by the Free Software Foundation. | 15 | * published by the Free Software Foundation. |
16 | */ | 16 | */ |
17 | |||
18 | #ifndef __ASM_ARCH_PM_CORE_H | ||
19 | #define __ASM_ARCH_PM_CORE_H __FILE__ | ||
20 | |||
17 | #include <mach/regs-pmu.h> | 21 | #include <mach/regs-pmu.h> |
18 | 22 | ||
19 | static inline void s3c_pm_debug_init_uart(void) | 23 | static inline void s3c_pm_debug_init_uart(void) |
@@ -53,7 +57,9 @@ static inline void s3c_pm_restored_gpios(void) | |||
53 | /* nothing here yet */ | 57 | /* nothing here yet */ |
54 | } | 58 | } |
55 | 59 | ||
56 | static inline void s3c_pm_saved_gpios(void) | 60 | static inline void samsung_pm_saved_gpios(void) |
57 | { | 61 | { |
58 | /* nothing here yet */ | 62 | /* nothing here yet */ |
59 | } | 63 | } |
64 | |||
65 | #endif /* __ASM_ARCH_PM_CORE_H */ | ||
diff --git a/arch/arm/mach-exynos4/include/mach/pmu.h b/arch/arm/mach-exynos/include/mach/pmu.h index a952904b010..632dd563013 100644 --- a/arch/arm/mach-exynos4/include/mach/pmu.h +++ b/arch/arm/mach-exynos/include/mach/pmu.h | |||
@@ -13,6 +13,8 @@ | |||
13 | #ifndef __ASM_ARCH_PMU_H | 13 | #ifndef __ASM_ARCH_PMU_H |
14 | #define __ASM_ARCH_PMU_H __FILE__ | 14 | #define __ASM_ARCH_PMU_H __FILE__ |
15 | 15 | ||
16 | #define PMU_TABLE_END NULL | ||
17 | |||
16 | enum sys_powerdown { | 18 | enum sys_powerdown { |
17 | SYS_AFTR, | 19 | SYS_AFTR, |
18 | SYS_LPA, | 20 | SYS_LPA, |
@@ -20,6 +22,11 @@ enum sys_powerdown { | |||
20 | NUM_SYS_POWERDOWN, | 22 | NUM_SYS_POWERDOWN, |
21 | }; | 23 | }; |
22 | 24 | ||
25 | struct exynos4_pmu_conf { | ||
26 | void __iomem *reg; | ||
27 | unsigned int val[NUM_SYS_POWERDOWN]; | ||
28 | }; | ||
29 | |||
23 | extern void exynos4_sys_powerdown_conf(enum sys_powerdown mode); | 30 | extern void exynos4_sys_powerdown_conf(enum sys_powerdown mode); |
24 | 31 | ||
25 | #endif /* __ASM_ARCH_PMU_H */ | 32 | #endif /* __ASM_ARCH_PMU_H */ |
diff --git a/arch/arm/mach-exynos4/include/mach/regs-audss.h b/arch/arm/mach-exynos/include/mach/regs-audss.h index ca5a8b64218..ca5a8b64218 100644 --- a/arch/arm/mach-exynos4/include/mach/regs-audss.h +++ b/arch/arm/mach-exynos/include/mach/regs-audss.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h index 6c37ebe9482..6c37ebe9482 100644 --- a/arch/arm/mach-exynos4/include/mach/regs-clock.h +++ b/arch/arm/mach-exynos/include/mach/regs-clock.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/regs-gpio.h b/arch/arm/mach-exynos/include/mach/regs-gpio.h index 1401b21663a..1401b21663a 100644 --- a/arch/arm/mach-exynos4/include/mach/regs-gpio.h +++ b/arch/arm/mach-exynos/include/mach/regs-gpio.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/regs-irq.h b/arch/arm/mach-exynos/include/mach/regs-irq.h index 9c7b4bfd546..9c7b4bfd546 100644 --- a/arch/arm/mach-exynos4/include/mach/regs-irq.h +++ b/arch/arm/mach-exynos/include/mach/regs-irq.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/regs-mct.h b/arch/arm/mach-exynos/include/mach/regs-mct.h index 80dd02ad6d6..80dd02ad6d6 100644 --- a/arch/arm/mach-exynos4/include/mach/regs-mct.h +++ b/arch/arm/mach-exynos/include/mach/regs-mct.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/regs-mem.h b/arch/arm/mach-exynos/include/mach/regs-mem.h index 0368b5a2725..0368b5a2725 100644 --- a/arch/arm/mach-exynos4/include/mach/regs-mem.h +++ b/arch/arm/mach-exynos/include/mach/regs-mem.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h index cdf9b47c303..4fff8e938fe 100644 --- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h +++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h | |||
@@ -25,9 +25,10 @@ | |||
25 | 25 | ||
26 | #define S5P_USE_STANDBY_WFI0 (1 << 16) | 26 | #define S5P_USE_STANDBY_WFI0 (1 << 16) |
27 | #define S5P_USE_STANDBY_WFI1 (1 << 17) | 27 | #define S5P_USE_STANDBY_WFI1 (1 << 17) |
28 | #define S5P_USE_STANDBYWFI_ISP_ARM (1 << 18) | ||
28 | #define S5P_USE_STANDBY_WFE0 (1 << 24) | 29 | #define S5P_USE_STANDBY_WFE0 (1 << 24) |
29 | #define S5P_USE_STANDBY_WFE1 (1 << 25) | 30 | #define S5P_USE_STANDBY_WFE1 (1 << 25) |
30 | #define S5P_USE_MASK ((0x3 << 16) | (0x3 << 24)) | 31 | #define S5P_USE_STANDBYWFE_ISP_ARM (1 << 26) |
31 | 32 | ||
32 | #define S5P_SWRESET S5P_PMUREG(0x0400) | 33 | #define S5P_SWRESET S5P_PMUREG(0x0400) |
33 | 34 | ||
@@ -35,15 +36,17 @@ | |||
35 | #define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604) | 36 | #define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604) |
36 | #define S5P_WAKEUP_MASK S5P_PMUREG(0x0608) | 37 | #define S5P_WAKEUP_MASK S5P_PMUREG(0x0608) |
37 | 38 | ||
38 | #define S5P_USBHOST_PHY_CONTROL S5P_PMUREG(0x0708) | 39 | #define S5P_HDMI_PHY_CONTROL S5P_PMUREG(0x0700) |
39 | #define S5P_USBHOST_PHY_ENABLE (1 << 0) | 40 | #define S5P_HDMI_PHY_ENABLE (1 << 0) |
41 | |||
42 | #define S5P_DAC_PHY_CONTROL S5P_PMUREG(0x070C) | ||
43 | #define S5P_DAC_PHY_ENABLE (1 << 0) | ||
40 | 44 | ||
41 | #define S5P_MIPI_DPHY_CONTROL(n) S5P_PMUREG(0x0710 + (n) * 4) | 45 | #define S5P_MIPI_DPHY_CONTROL(n) S5P_PMUREG(0x0710 + (n) * 4) |
42 | #define S5P_MIPI_DPHY_ENABLE (1 << 0) | 46 | #define S5P_MIPI_DPHY_ENABLE (1 << 0) |
43 | #define S5P_MIPI_DPHY_SRESETN (1 << 1) | 47 | #define S5P_MIPI_DPHY_SRESETN (1 << 1) |
44 | #define S5P_MIPI_DPHY_MRESETN (1 << 2) | 48 | #define S5P_MIPI_DPHY_MRESETN (1 << 2) |
45 | 49 | ||
46 | #define S5P_PMU_SATA_PHY_CONTROL S5P_PMUREG(0x0720) | ||
47 | #define S5P_INFORM0 S5P_PMUREG(0x0800) | 50 | #define S5P_INFORM0 S5P_PMUREG(0x0800) |
48 | #define S5P_INFORM1 S5P_PMUREG(0x0804) | 51 | #define S5P_INFORM1 S5P_PMUREG(0x0804) |
49 | #define S5P_INFORM2 S5P_PMUREG(0x0808) | 52 | #define S5P_INFORM2 S5P_PMUREG(0x0808) |
@@ -76,7 +79,6 @@ | |||
76 | #define S5P_CMU_CLKSTOP_MFC_LOWPWR S5P_PMUREG(0x1148) | 79 | #define S5P_CMU_CLKSTOP_MFC_LOWPWR S5P_PMUREG(0x1148) |
77 | #define S5P_CMU_CLKSTOP_G3D_LOWPWR S5P_PMUREG(0x114C) | 80 | #define S5P_CMU_CLKSTOP_G3D_LOWPWR S5P_PMUREG(0x114C) |
78 | #define S5P_CMU_CLKSTOP_LCD0_LOWPWR S5P_PMUREG(0x1150) | 81 | #define S5P_CMU_CLKSTOP_LCD0_LOWPWR S5P_PMUREG(0x1150) |
79 | #define S5P_CMU_CLKSTOP_LCD1_LOWPWR S5P_PMUREG(0x1154) | ||
80 | #define S5P_CMU_CLKSTOP_MAUDIO_LOWPWR S5P_PMUREG(0x1158) | 82 | #define S5P_CMU_CLKSTOP_MAUDIO_LOWPWR S5P_PMUREG(0x1158) |
81 | #define S5P_CMU_CLKSTOP_GPS_LOWPWR S5P_PMUREG(0x115C) | 83 | #define S5P_CMU_CLKSTOP_GPS_LOWPWR S5P_PMUREG(0x115C) |
82 | #define S5P_CMU_RESET_CAM_LOWPWR S5P_PMUREG(0x1160) | 84 | #define S5P_CMU_RESET_CAM_LOWPWR S5P_PMUREG(0x1160) |
@@ -84,7 +86,6 @@ | |||
84 | #define S5P_CMU_RESET_MFC_LOWPWR S5P_PMUREG(0x1168) | 86 | #define S5P_CMU_RESET_MFC_LOWPWR S5P_PMUREG(0x1168) |
85 | #define S5P_CMU_RESET_G3D_LOWPWR S5P_PMUREG(0x116C) | 87 | #define S5P_CMU_RESET_G3D_LOWPWR S5P_PMUREG(0x116C) |
86 | #define S5P_CMU_RESET_LCD0_LOWPWR S5P_PMUREG(0x1170) | 88 | #define S5P_CMU_RESET_LCD0_LOWPWR S5P_PMUREG(0x1170) |
87 | #define S5P_CMU_RESET_LCD1_LOWPWR S5P_PMUREG(0x1174) | ||
88 | #define S5P_CMU_RESET_MAUDIO_LOWPWR S5P_PMUREG(0x1178) | 89 | #define S5P_CMU_RESET_MAUDIO_LOWPWR S5P_PMUREG(0x1178) |
89 | #define S5P_CMU_RESET_GPS_LOWPWR S5P_PMUREG(0x117C) | 90 | #define S5P_CMU_RESET_GPS_LOWPWR S5P_PMUREG(0x117C) |
90 | #define S5P_TOP_BUS_LOWPWR S5P_PMUREG(0x1180) | 91 | #define S5P_TOP_BUS_LOWPWR S5P_PMUREG(0x1180) |
@@ -92,14 +93,11 @@ | |||
92 | #define S5P_TOP_PWR_LOWPWR S5P_PMUREG(0x1188) | 93 | #define S5P_TOP_PWR_LOWPWR S5P_PMUREG(0x1188) |
93 | #define S5P_LOGIC_RESET_LOWPWR S5P_PMUREG(0x11A0) | 94 | #define S5P_LOGIC_RESET_LOWPWR S5P_PMUREG(0x11A0) |
94 | #define S5P_ONENAND_MEM_LOWPWR S5P_PMUREG(0x11C0) | 95 | #define S5P_ONENAND_MEM_LOWPWR S5P_PMUREG(0x11C0) |
95 | #define S5P_MODIMIF_MEM_LOWPWR S5P_PMUREG(0x11C4) | ||
96 | #define S5P_G2D_ACP_MEM_LOWPWR S5P_PMUREG(0x11C8) | 96 | #define S5P_G2D_ACP_MEM_LOWPWR S5P_PMUREG(0x11C8) |
97 | #define S5P_USBOTG_MEM_LOWPWR S5P_PMUREG(0x11CC) | 97 | #define S5P_USBOTG_MEM_LOWPWR S5P_PMUREG(0x11CC) |
98 | #define S5P_HSMMC_MEM_LOWPWR S5P_PMUREG(0x11D0) | 98 | #define S5P_HSMMC_MEM_LOWPWR S5P_PMUREG(0x11D0) |
99 | #define S5P_CSSYS_MEM_LOWPWR S5P_PMUREG(0x11D4) | 99 | #define S5P_CSSYS_MEM_LOWPWR S5P_PMUREG(0x11D4) |
100 | #define S5P_SECSS_MEM_LOWPWR S5P_PMUREG(0x11D8) | 100 | #define S5P_SECSS_MEM_LOWPWR S5P_PMUREG(0x11D8) |
101 | #define S5P_PCIE_MEM_LOWPWR S5P_PMUREG(0x11E0) | ||
102 | #define S5P_SATA_MEM_LOWPWR S5P_PMUREG(0x11E4) | ||
103 | #define S5P_PAD_RETENTION_DRAM_LOWPWR S5P_PMUREG(0x1200) | 101 | #define S5P_PAD_RETENTION_DRAM_LOWPWR S5P_PMUREG(0x1200) |
104 | #define S5P_PAD_RETENTION_MAUDIO_LOWPWR S5P_PMUREG(0x1204) | 102 | #define S5P_PAD_RETENTION_MAUDIO_LOWPWR S5P_PMUREG(0x1204) |
105 | #define S5P_PAD_RETENTION_GPIO_LOWPWR S5P_PMUREG(0x1220) | 103 | #define S5P_PAD_RETENTION_GPIO_LOWPWR S5P_PMUREG(0x1220) |
@@ -120,7 +118,6 @@ | |||
120 | #define S5P_MFC_LOWPWR S5P_PMUREG(0x1388) | 118 | #define S5P_MFC_LOWPWR S5P_PMUREG(0x1388) |
121 | #define S5P_G3D_LOWPWR S5P_PMUREG(0x138C) | 119 | #define S5P_G3D_LOWPWR S5P_PMUREG(0x138C) |
122 | #define S5P_LCD0_LOWPWR S5P_PMUREG(0x1390) | 120 | #define S5P_LCD0_LOWPWR S5P_PMUREG(0x1390) |
123 | #define S5P_LCD1_LOWPWR S5P_PMUREG(0x1394) | ||
124 | #define S5P_MAUDIO_LOWPWR S5P_PMUREG(0x1398) | 121 | #define S5P_MAUDIO_LOWPWR S5P_PMUREG(0x1398) |
125 | #define S5P_GPS_LOWPWR S5P_PMUREG(0x139C) | 122 | #define S5P_GPS_LOWPWR S5P_PMUREG(0x139C) |
126 | #define S5P_GPS_ALIVE_LOWPWR S5P_PMUREG(0x13A0) | 123 | #define S5P_GPS_ALIVE_LOWPWR S5P_PMUREG(0x13A0) |
@@ -156,7 +153,6 @@ | |||
156 | #define S5P_PMU_MFC_CONF S5P_PMUREG(0x3C40) | 153 | #define S5P_PMU_MFC_CONF S5P_PMUREG(0x3C40) |
157 | #define S5P_PMU_G3D_CONF S5P_PMUREG(0x3C60) | 154 | #define S5P_PMU_G3D_CONF S5P_PMUREG(0x3C60) |
158 | #define S5P_PMU_LCD0_CONF S5P_PMUREG(0x3C80) | 155 | #define S5P_PMU_LCD0_CONF S5P_PMUREG(0x3C80) |
159 | #define S5P_PMU_LCD1_CONF S5P_PMUREG(0x3CA0) | ||
160 | #define S5P_PMU_GPS_CONF S5P_PMUREG(0x3CE0) | 156 | #define S5P_PMU_GPS_CONF S5P_PMUREG(0x3CE0) |
161 | 157 | ||
162 | #define S5P_PMU_SATA_PHY_CONTROL_EN 0x1 | 158 | #define S5P_PMU_SATA_PHY_CONTROL_EN 0x1 |
@@ -165,4 +161,60 @@ | |||
165 | 161 | ||
166 | #define S5P_CHECK_SLEEP 0x00000BAD | 162 | #define S5P_CHECK_SLEEP 0x00000BAD |
167 | 163 | ||
164 | /* Only for EXYNOS4210 */ | ||
165 | #define S5P_USBHOST_PHY_CONTROL S5P_PMUREG(0x0708) | ||
166 | #define S5P_USBHOST_PHY_ENABLE (1 << 0) | ||
167 | |||
168 | #define S5P_PMU_SATA_PHY_CONTROL S5P_PMUREG(0x0720) | ||
169 | |||
170 | #define S5P_CMU_CLKSTOP_LCD1_LOWPWR S5P_PMUREG(0x1154) | ||
171 | #define S5P_CMU_RESET_LCD1_LOWPWR S5P_PMUREG(0x1174) | ||
172 | #define S5P_MODIMIF_MEM_LOWPWR S5P_PMUREG(0x11C4) | ||
173 | #define S5P_PCIE_MEM_LOWPWR S5P_PMUREG(0x11E0) | ||
174 | #define S5P_SATA_MEM_LOWPWR S5P_PMUREG(0x11E4) | ||
175 | #define S5P_LCD1_LOWPWR S5P_PMUREG(0x1394) | ||
176 | |||
177 | #define S5P_PMU_LCD1_CONF S5P_PMUREG(0x3CA0) | ||
178 | |||
179 | /* Only for EXYNOS4212 */ | ||
180 | #define S5P_ISP_ARM_LOWPWR S5P_PMUREG(0x1050) | ||
181 | #define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR S5P_PMUREG(0x1054) | ||
182 | #define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR S5P_PMUREG(0x1058) | ||
183 | #define S5P_CMU_ACLKSTOP_COREBLK_LOWPWR S5P_PMUREG(0x1110) | ||
184 | #define S5P_CMU_SCLKSTOP_COREBLK_LOWPWR S5P_PMUREG(0x1114) | ||
185 | #define S5P_CMU_RESET_COREBLK_LOWPWR S5P_PMUREG(0x111C) | ||
186 | #define S5P_MPLLUSER_SYSCLK_LOWPWR S5P_PMUREG(0x1130) | ||
187 | #define S5P_CMU_CLKSTOP_ISP_LOWPWR S5P_PMUREG(0x1154) | ||
188 | #define S5P_CMU_RESET_ISP_LOWPWR S5P_PMUREG(0x1174) | ||
189 | #define S5P_TOP_BUS_COREBLK_LOWPWR S5P_PMUREG(0x1190) | ||
190 | #define S5P_TOP_RETENTION_COREBLK_LOWPWR S5P_PMUREG(0x1194) | ||
191 | #define S5P_TOP_PWR_COREBLK_LOWPWR S5P_PMUREG(0x1198) | ||
192 | #define S5P_OSCCLK_GATE_LOWPWR S5P_PMUREG(0x11A4) | ||
193 | #define S5P_LOGIC_RESET_COREBLK_LOWPWR S5P_PMUREG(0x11B0) | ||
194 | #define S5P_OSCCLK_GATE_COREBLK_LOWPWR S5P_PMUREG(0x11B4) | ||
195 | #define S5P_HSI_MEM_LOWPWR S5P_PMUREG(0x11C4) | ||
196 | #define S5P_ROTATOR_MEM_LOWPWR S5P_PMUREG(0x11DC) | ||
197 | #define S5P_PAD_RETENTION_GPIO_COREBLK_LOWPWR S5P_PMUREG(0x123C) | ||
198 | #define S5P_PAD_ISOLATION_COREBLK_LOWPWR S5P_PMUREG(0x1250) | ||
199 | #define S5P_GPIO_MODE_COREBLK_LOWPWR S5P_PMUREG(0x1320) | ||
200 | #define S5P_TOP_ASB_RESET_LOWPWR S5P_PMUREG(0x1344) | ||
201 | #define S5P_TOP_ASB_ISOLATION_LOWPWR S5P_PMUREG(0x1348) | ||
202 | #define S5P_ISP_LOWPWR S5P_PMUREG(0x1394) | ||
203 | #define S5P_DRAM_FREQ_DOWN_LOWPWR S5P_PMUREG(0x13B0) | ||
204 | #define S5P_DDRPHY_DLLOFF_LOWPWR S5P_PMUREG(0x13B4) | ||
205 | #define S5P_CMU_SYSCLK_ISP_LOWPWR S5P_PMUREG(0x13B8) | ||
206 | #define S5P_CMU_SYSCLK_GPS_LOWPWR S5P_PMUREG(0x13BC) | ||
207 | #define S5P_LPDDR_PHY_DLL_LOCK_LOWPWR S5P_PMUREG(0x13C0) | ||
208 | |||
209 | #define S5P_ARM_L2_0_OPTION S5P_PMUREG(0x2608) | ||
210 | #define S5P_ARM_L2_1_OPTION S5P_PMUREG(0x2628) | ||
211 | #define S5P_ONENAND_MEM_OPTION S5P_PMUREG(0x2E08) | ||
212 | #define S5P_HSI_MEM_OPTION S5P_PMUREG(0x2E28) | ||
213 | #define S5P_G2D_ACP_MEM_OPTION S5P_PMUREG(0x2E48) | ||
214 | #define S5P_USBOTG_MEM_OPTION S5P_PMUREG(0x2E68) | ||
215 | #define S5P_HSMMC_MEM_OPTION S5P_PMUREG(0x2E88) | ||
216 | #define S5P_CSSYS_MEM_OPTION S5P_PMUREG(0x2EA8) | ||
217 | #define S5P_SECSS_MEM_OPTION S5P_PMUREG(0x2EC8) | ||
218 | #define S5P_ROTATOR_MEM_OPTION S5P_PMUREG(0x2F48) | ||
219 | |||
168 | #endif /* __ASM_ARCH_REGS_PMU_H */ | 220 | #endif /* __ASM_ARCH_REGS_PMU_H */ |
diff --git a/arch/arm/mach-exynos4/include/mach/regs-sysmmu.h b/arch/arm/mach-exynos/include/mach/regs-sysmmu.h index 68ff6ad08a2..68ff6ad08a2 100644 --- a/arch/arm/mach-exynos4/include/mach/regs-sysmmu.h +++ b/arch/arm/mach-exynos/include/mach/regs-sysmmu.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/regs-usb-phy.h b/arch/arm/mach-exynos/include/mach/regs-usb-phy.h index c337cf3a71b..c337cf3a71b 100644 --- a/arch/arm/mach-exynos4/include/mach/regs-usb-phy.h +++ b/arch/arm/mach-exynos/include/mach/regs-usb-phy.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/sysmmu.h b/arch/arm/mach-exynos/include/mach/sysmmu.h index 6a5fbb534e8..6a5fbb534e8 100644 --- a/arch/arm/mach-exynos4/include/mach/sysmmu.h +++ b/arch/arm/mach-exynos/include/mach/sysmmu.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h index 5e3220c18fc..5e3220c18fc 100644 --- a/arch/arm/mach-exynos4/include/mach/system.h +++ b/arch/arm/mach-exynos/include/mach/system.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/timex.h b/arch/arm/mach-exynos/include/mach/timex.h index 6d138750a70..6d138750a70 100644 --- a/arch/arm/mach-exynos4/include/mach/timex.h +++ b/arch/arm/mach-exynos/include/mach/timex.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/uncompress.h b/arch/arm/mach-exynos/include/mach/uncompress.h index 21d97bcd9ac..21d97bcd9ac 100644 --- a/arch/arm/mach-exynos4/include/mach/uncompress.h +++ b/arch/arm/mach-exynos/include/mach/uncompress.h | |||
diff --git a/arch/arm/mach-exynos4/include/mach/vmalloc.h b/arch/arm/mach-exynos/include/mach/vmalloc.h index 284330e571d..284330e571d 100644 --- a/arch/arm/mach-exynos4/include/mach/vmalloc.h +++ b/arch/arm/mach-exynos/include/mach/vmalloc.h | |||
diff --git a/arch/arm/mach-exynos4/init.c b/arch/arm/mach-exynos/init.c index a8a83e3881a..a8a83e3881a 100644 --- a/arch/arm/mach-exynos4/init.c +++ b/arch/arm/mach-exynos/init.c | |||
diff --git a/arch/arm/mach-exynos4/irq-combiner.c b/arch/arm/mach-exynos/irq-combiner.c index 5a2758ab055..5a2758ab055 100644 --- a/arch/arm/mach-exynos4/irq-combiner.c +++ b/arch/arm/mach-exynos/irq-combiner.c | |||
diff --git a/arch/arm/mach-exynos4/irq-eint.c b/arch/arm/mach-exynos/irq-eint.c index badb8c66fc9..badb8c66fc9 100644 --- a/arch/arm/mach-exynos4/irq-eint.c +++ b/arch/arm/mach-exynos/irq-eint.c | |||
diff --git a/arch/arm/mach-exynos4/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c index f0ca6c157d2..f0ca6c157d2 100644 --- a/arch/arm/mach-exynos4/mach-armlex4210.c +++ b/arch/arm/mach-exynos/mach-armlex4210.c | |||
diff --git a/arch/arm/mach-exynos4/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c index 6e0536818bf..236bbe18716 100644 --- a/arch/arm/mach-exynos4/mach-nuri.c +++ b/arch/arm/mach-exynos/mach-nuri.c | |||
@@ -27,15 +27,20 @@ | |||
27 | #include <linux/pwm_backlight.h> | 27 | #include <linux/pwm_backlight.h> |
28 | 28 | ||
29 | #include <video/platform_lcd.h> | 29 | #include <video/platform_lcd.h> |
30 | #include <media/m5mols.h> | ||
31 | #include <media/s5p_fimc.h> | ||
32 | #include <media/v4l2-mediabus.h> | ||
30 | 33 | ||
31 | #include <asm/mach/arch.h> | 34 | #include <asm/mach/arch.h> |
32 | #include <asm/mach-types.h> | 35 | #include <asm/mach-types.h> |
33 | 36 | ||
34 | #include <plat/adc.h> | 37 | #include <plat/adc.h> |
38 | #include <plat/regs-fb-v4.h> | ||
35 | #include <plat/regs-serial.h> | 39 | #include <plat/regs-serial.h> |
36 | #include <plat/exynos4.h> | 40 | #include <plat/exynos4.h> |
37 | #include <plat/cpu.h> | 41 | #include <plat/cpu.h> |
38 | #include <plat/devs.h> | 42 | #include <plat/devs.h> |
43 | #include <plat/fb.h> | ||
39 | #include <plat/sdhci.h> | 44 | #include <plat/sdhci.h> |
40 | #include <plat/ehci.h> | 45 | #include <plat/ehci.h> |
41 | #include <plat/clock.h> | 46 | #include <plat/clock.h> |
@@ -43,6 +48,9 @@ | |||
43 | #include <plat/iic.h> | 48 | #include <plat/iic.h> |
44 | #include <plat/mfc.h> | 49 | #include <plat/mfc.h> |
45 | #include <plat/pd.h> | 50 | #include <plat/pd.h> |
51 | #include <plat/fimc-core.h> | ||
52 | #include <plat/camport.h> | ||
53 | #include <plat/mipi_csis.h> | ||
46 | 54 | ||
47 | #include <mach/map.h> | 55 | #include <mach/map.h> |
48 | 56 | ||
@@ -63,6 +71,8 @@ | |||
63 | enum fixed_regulator_id { | 71 | enum fixed_regulator_id { |
64 | FIXED_REG_ID_MMC = 0, | 72 | FIXED_REG_ID_MMC = 0, |
65 | FIXED_REG_ID_MAX8903, | 73 | FIXED_REG_ID_MAX8903, |
74 | FIXED_REG_ID_CAM_A28V, | ||
75 | FIXED_REG_ID_CAM_12V, | ||
66 | }; | 76 | }; |
67 | 77 | ||
68 | static struct s3c2410_uartcfg nuri_uartcfgs[] __initdata = { | 78 | static struct s3c2410_uartcfg nuri_uartcfgs[] __initdata = { |
@@ -199,6 +209,33 @@ static struct platform_device nuri_gpio_keys = { | |||
199 | }, | 209 | }, |
200 | }; | 210 | }; |
201 | 211 | ||
212 | /* Frame Buffer */ | ||
213 | static struct s3c_fb_pd_win nuri_fb_win0 = { | ||
214 | .win_mode = { | ||
215 | .left_margin = 64, | ||
216 | .right_margin = 16, | ||
217 | .upper_margin = 64, | ||
218 | .lower_margin = 1, | ||
219 | .hsync_len = 48, | ||
220 | .vsync_len = 3, | ||
221 | .xres = 1280, | ||
222 | .yres = 800, | ||
223 | .refresh = 60, | ||
224 | }, | ||
225 | .max_bpp = 24, | ||
226 | .default_bpp = 16, | ||
227 | .virtual_x = 1280, | ||
228 | .virtual_y = 800, | ||
229 | }; | ||
230 | |||
231 | static struct s3c_fb_platdata nuri_fb_pdata __initdata = { | ||
232 | .win[0] = &nuri_fb_win0, | ||
233 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB | | ||
234 | VIDCON0_CLKSEL_LCD, | ||
235 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | ||
236 | .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, | ||
237 | }; | ||
238 | |||
202 | static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power) | 239 | static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power) |
203 | { | 240 | { |
204 | int gpio = EXYNOS4_GPE1(5); | 241 | int gpio = EXYNOS4_GPE1(5); |
@@ -1037,13 +1074,6 @@ static struct platform_device nuri_max8903_device = { | |||
1037 | }, | 1074 | }, |
1038 | }; | 1075 | }; |
1039 | 1076 | ||
1040 | static struct device *nuri_cm_devices[] = { | ||
1041 | &s3c_device_i2c5.dev, | ||
1042 | &s3c_device_adc.dev, | ||
1043 | NULL, /* Reserved for UART */ | ||
1044 | NULL, | ||
1045 | }; | ||
1046 | |||
1047 | static void __init nuri_power_init(void) | 1077 | static void __init nuri_power_init(void) |
1048 | { | 1078 | { |
1049 | int gpio; | 1079 | int gpio; |
@@ -1088,10 +1118,141 @@ static void __init nuri_ehci_init(void) | |||
1088 | s5p_ehci_set_platdata(pdata); | 1118 | s5p_ehci_set_platdata(pdata); |
1089 | } | 1119 | } |
1090 | 1120 | ||
1121 | /* CAMERA */ | ||
1122 | static struct regulator_consumer_supply cam_vdda_supply[] = { | ||
1123 | REGULATOR_SUPPLY("a_sensor", "0-001f"), | ||
1124 | }; | ||
1125 | |||
1126 | static struct regulator_init_data cam_vdda_reg_init_data = { | ||
1127 | .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS }, | ||
1128 | .num_consumer_supplies = ARRAY_SIZE(cam_vdda_supply), | ||
1129 | .consumer_supplies = cam_vdda_supply, | ||
1130 | }; | ||
1131 | |||
1132 | static struct fixed_voltage_config cam_vdda_fixed_voltage_cfg = { | ||
1133 | .supply_name = "CAM_IO_EN", | ||
1134 | .microvolts = 2800000, | ||
1135 | .gpio = EXYNOS4_GPE2(1), /* CAM_IO_EN */ | ||
1136 | .enable_high = 1, | ||
1137 | .init_data = &cam_vdda_reg_init_data, | ||
1138 | }; | ||
1139 | |||
1140 | static struct platform_device cam_vdda_fixed_rdev = { | ||
1141 | .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_A28V, | ||
1142 | .dev = { .platform_data = &cam_vdda_fixed_voltage_cfg }, | ||
1143 | }; | ||
1144 | |||
1145 | static struct regulator_consumer_supply camera_8m_12v_supply = | ||
1146 | REGULATOR_SUPPLY("dig_12", "0-001f"); | ||
1147 | |||
1148 | static struct regulator_init_data cam_8m_12v_reg_init_data = { | ||
1149 | .num_consumer_supplies = 1, | ||
1150 | .consumer_supplies = &camera_8m_12v_supply, | ||
1151 | .constraints = { | ||
1152 | .valid_ops_mask = REGULATOR_CHANGE_STATUS | ||
1153 | }, | ||
1154 | }; | ||
1155 | |||
1156 | static struct fixed_voltage_config cam_8m_12v_fixed_voltage_cfg = { | ||
1157 | .supply_name = "8M_1.2V", | ||
1158 | .microvolts = 1200000, | ||
1159 | .gpio = EXYNOS4_GPE2(5), /* 8M_1.2V_EN */ | ||
1160 | .enable_high = 1, | ||
1161 | .init_data = &cam_8m_12v_reg_init_data, | ||
1162 | }; | ||
1163 | |||
1164 | static struct platform_device cam_8m_12v_fixed_rdev = { | ||
1165 | .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_12V, | ||
1166 | .dev = { .platform_data = &cam_8m_12v_fixed_voltage_cfg }, | ||
1167 | }; | ||
1168 | |||
1169 | static struct s5p_platform_mipi_csis mipi_csis_platdata = { | ||
1170 | .clk_rate = 166000000UL, | ||
1171 | .lanes = 2, | ||
1172 | .alignment = 32, | ||
1173 | .hs_settle = 12, | ||
1174 | .phy_enable = s5p_csis_phy_enable, | ||
1175 | }; | ||
1176 | |||
1177 | #define GPIO_CAM_MEGA_RST EXYNOS4_GPY3(7) /* ISP_RESET */ | ||
1178 | #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPL2(5) | ||
1179 | |||
1180 | static struct m5mols_platform_data m5mols_platdata = { | ||
1181 | .gpio_reset = GPIO_CAM_MEGA_RST, | ||
1182 | }; | ||
1183 | |||
1184 | static struct i2c_board_info m5mols_board_info = { | ||
1185 | I2C_BOARD_INFO("M5MOLS", 0x1F), | ||
1186 | .platform_data = &m5mols_platdata, | ||
1187 | }; | ||
1188 | |||
1189 | static struct s5p_fimc_isp_info nuri_camera_sensors[] = { | ||
1190 | { | ||
1191 | .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | | ||
1192 | V4L2_MBUS_VSYNC_ACTIVE_LOW, | ||
1193 | .bus_type = FIMC_MIPI_CSI2, | ||
1194 | .board_info = &m5mols_board_info, | ||
1195 | .clk_frequency = 24000000UL, | ||
1196 | .csi_data_align = 32, | ||
1197 | }, | ||
1198 | }; | ||
1199 | |||
1200 | static struct s5p_platform_fimc fimc_md_platdata = { | ||
1201 | .isp_info = nuri_camera_sensors, | ||
1202 | .num_clients = ARRAY_SIZE(nuri_camera_sensors), | ||
1203 | }; | ||
1204 | |||
1205 | static struct gpio nuri_camera_gpios[] = { | ||
1206 | { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" }, | ||
1207 | { GPIO_CAM_MEGA_RST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" }, | ||
1208 | }; | ||
1209 | |||
1210 | static void nuri_camera_init(void) | ||
1211 | { | ||
1212 | s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata), | ||
1213 | &s5p_device_mipi_csis0); | ||
1214 | s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata), | ||
1215 | &s5p_device_fimc_md); | ||
1216 | |||
1217 | if (gpio_request_array(nuri_camera_gpios, | ||
1218 | ARRAY_SIZE(nuri_camera_gpios))) { | ||
1219 | pr_err("%s: GPIO request failed\n", __func__); | ||
1220 | return; | ||
1221 | } | ||
1222 | |||
1223 | m5mols_board_info.irq = s5p_register_gpio_interrupt(GPIO_CAM_8M_ISP_INT); | ||
1224 | if (!IS_ERR_VALUE(m5mols_board_info.irq)) | ||
1225 | s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xF)); | ||
1226 | else | ||
1227 | pr_err("%s: Failed to configure 8M_ISP_INT GPIO\n", __func__); | ||
1228 | |||
1229 | /* Free GPIOs controlled directly by the sensor drivers. */ | ||
1230 | gpio_free(GPIO_CAM_MEGA_RST); | ||
1231 | |||
1232 | if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A)) { | ||
1233 | pr_err("%s: Camera port A setup failed\n", __func__); | ||
1234 | return; | ||
1235 | } | ||
1236 | /* Increase drive strength of the sensor clock output */ | ||
1237 | s5p_gpio_set_drvstr(EXYNOS4_GPJ1(3), S5P_GPIO_DRVSTR_LV4); | ||
1238 | } | ||
1239 | |||
1240 | static struct s3c2410_platform_i2c nuri_i2c0_platdata __initdata = { | ||
1241 | .frequency = 400000U, | ||
1242 | .sda_delay = 200, | ||
1243 | }; | ||
1244 | |||
1091 | static struct platform_device *nuri_devices[] __initdata = { | 1245 | static struct platform_device *nuri_devices[] __initdata = { |
1092 | /* Samsung Platform Devices */ | 1246 | /* Samsung Platform Devices */ |
1093 | &s3c_device_i2c5, /* PMIC should initialize first */ | 1247 | &s3c_device_i2c5, /* PMIC should initialize first */ |
1248 | &s3c_device_i2c0, | ||
1094 | &emmc_fixed_voltage, | 1249 | &emmc_fixed_voltage, |
1250 | &s5p_device_mipi_csis0, | ||
1251 | &s5p_device_fimc0, | ||
1252 | &s5p_device_fimc1, | ||
1253 | &s5p_device_fimc2, | ||
1254 | &s5p_device_fimc3, | ||
1255 | &s5p_device_fimd0, | ||
1095 | &s3c_device_hsmmc0, | 1256 | &s3c_device_hsmmc0, |
1096 | &s3c_device_hsmmc2, | 1257 | &s3c_device_hsmmc2, |
1097 | &s3c_device_hsmmc3, | 1258 | &s3c_device_hsmmc3, |
@@ -1106,6 +1267,9 @@ static struct platform_device *nuri_devices[] __initdata = { | |||
1106 | &s5p_device_mfc_l, | 1267 | &s5p_device_mfc_l, |
1107 | &s5p_device_mfc_r, | 1268 | &s5p_device_mfc_r, |
1108 | &exynos4_device_pd[PD_MFC], | 1269 | &exynos4_device_pd[PD_MFC], |
1270 | &exynos4_device_pd[PD_LCD0], | ||
1271 | &exynos4_device_pd[PD_CAM], | ||
1272 | &s5p_device_fimc_md, | ||
1109 | 1273 | ||
1110 | /* NURI Devices */ | 1274 | /* NURI Devices */ |
1111 | &nuri_gpio_keys, | 1275 | &nuri_gpio_keys, |
@@ -1113,6 +1277,8 @@ static struct platform_device *nuri_devices[] __initdata = { | |||
1113 | &nuri_backlight_device, | 1277 | &nuri_backlight_device, |
1114 | &max8903_fixed_reg_dev, | 1278 | &max8903_fixed_reg_dev, |
1115 | &nuri_max8903_device, | 1279 | &nuri_max8903_device, |
1280 | &cam_vdda_fixed_rdev, | ||
1281 | &cam_8m_12v_fixed_rdev, | ||
1116 | }; | 1282 | }; |
1117 | 1283 | ||
1118 | static void __init nuri_map_io(void) | 1284 | static void __init nuri_map_io(void) |
@@ -1133,6 +1299,7 @@ static void __init nuri_machine_init(void) | |||
1133 | nuri_tsp_init(); | 1299 | nuri_tsp_init(); |
1134 | nuri_power_init(); | 1300 | nuri_power_init(); |
1135 | 1301 | ||
1302 | s3c_i2c0_set_platdata(&nuri_i2c0_platdata); | ||
1136 | i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); | 1303 | i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); |
1137 | s3c_i2c3_set_platdata(&i2c3_data); | 1304 | s3c_i2c3_set_platdata(&i2c3_data); |
1138 | i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs)); | 1305 | i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs)); |
@@ -1142,12 +1309,23 @@ static void __init nuri_machine_init(void) | |||
1142 | i2c9_devs[I2C9_MAX17042].irq = gpio_to_irq(EXYNOS4_GPX2(3)); | 1309 | i2c9_devs[I2C9_MAX17042].irq = gpio_to_irq(EXYNOS4_GPX2(3)); |
1143 | i2c_register_board_info(9, i2c9_devs, ARRAY_SIZE(i2c9_devs)); | 1310 | i2c_register_board_info(9, i2c9_devs, ARRAY_SIZE(i2c9_devs)); |
1144 | 1311 | ||
1312 | s5p_fimd0_set_platdata(&nuri_fb_pdata); | ||
1313 | |||
1314 | nuri_camera_init(); | ||
1315 | |||
1145 | nuri_ehci_init(); | 1316 | nuri_ehci_init(); |
1146 | clk_xusbxti.rate = 24000000; | 1317 | clk_xusbxti.rate = 24000000; |
1147 | 1318 | ||
1148 | /* Last */ | 1319 | /* Last */ |
1149 | platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); | 1320 | platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); |
1150 | s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; | 1321 | s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; |
1322 | s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev; | ||
1323 | |||
1324 | s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1325 | s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1326 | s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1327 | s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1328 | s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1151 | } | 1329 | } |
1152 | 1330 | ||
1153 | MACHINE_START(NURI, "NURI") | 1331 | MACHINE_START(NURI, "NURI") |
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c new file mode 100644 index 00000000000..f80b563f2be --- /dev/null +++ b/arch/arm/mach-exynos/mach-origen.c | |||
@@ -0,0 +1,700 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/mach-origen.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Insignal Co., Ltd. | ||
4 | * http://www.insignal.co.kr/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/serial_core.h> | ||
12 | #include <linux/gpio.h> | ||
13 | #include <linux/mmc/host.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <linux/input.h> | ||
17 | #include <linux/pwm_backlight.h> | ||
18 | #include <linux/gpio_keys.h> | ||
19 | #include <linux/i2c.h> | ||
20 | #include <linux/regulator/machine.h> | ||
21 | #include <linux/mfd/max8997.h> | ||
22 | #include <linux/lcd.h> | ||
23 | |||
24 | #include <asm/mach/arch.h> | ||
25 | #include <asm/mach-types.h> | ||
26 | |||
27 | #include <video/platform_lcd.h> | ||
28 | |||
29 | #include <plat/regs-serial.h> | ||
30 | #include <plat/regs-fb-v4.h> | ||
31 | #include <plat/exynos4.h> | ||
32 | #include <plat/cpu.h> | ||
33 | #include <plat/devs.h> | ||
34 | #include <plat/sdhci.h> | ||
35 | #include <plat/iic.h> | ||
36 | #include <plat/ehci.h> | ||
37 | #include <plat/clock.h> | ||
38 | #include <plat/gpio-cfg.h> | ||
39 | #include <plat/backlight.h> | ||
40 | #include <plat/pd.h> | ||
41 | #include <plat/fb.h> | ||
42 | #include <plat/mfc.h> | ||
43 | |||
44 | #include <mach/map.h> | ||
45 | |||
46 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
47 | #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
48 | S3C2410_UCON_RXILEVEL | \ | ||
49 | S3C2410_UCON_TXIRQMODE | \ | ||
50 | S3C2410_UCON_RXIRQMODE | \ | ||
51 | S3C2410_UCON_RXFIFO_TOI | \ | ||
52 | S3C2443_UCON_RXERR_IRQEN) | ||
53 | |||
54 | #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
55 | |||
56 | #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
57 | S5PV210_UFCON_TXTRIG4 | \ | ||
58 | S5PV210_UFCON_RXTRIG4) | ||
59 | |||
60 | static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = { | ||
61 | [0] = { | ||
62 | .hwport = 0, | ||
63 | .flags = 0, | ||
64 | .ucon = ORIGEN_UCON_DEFAULT, | ||
65 | .ulcon = ORIGEN_ULCON_DEFAULT, | ||
66 | .ufcon = ORIGEN_UFCON_DEFAULT, | ||
67 | }, | ||
68 | [1] = { | ||
69 | .hwport = 1, | ||
70 | .flags = 0, | ||
71 | .ucon = ORIGEN_UCON_DEFAULT, | ||
72 | .ulcon = ORIGEN_ULCON_DEFAULT, | ||
73 | .ufcon = ORIGEN_UFCON_DEFAULT, | ||
74 | }, | ||
75 | [2] = { | ||
76 | .hwport = 2, | ||
77 | .flags = 0, | ||
78 | .ucon = ORIGEN_UCON_DEFAULT, | ||
79 | .ulcon = ORIGEN_ULCON_DEFAULT, | ||
80 | .ufcon = ORIGEN_UFCON_DEFAULT, | ||
81 | }, | ||
82 | [3] = { | ||
83 | .hwport = 3, | ||
84 | .flags = 0, | ||
85 | .ucon = ORIGEN_UCON_DEFAULT, | ||
86 | .ulcon = ORIGEN_ULCON_DEFAULT, | ||
87 | .ufcon = ORIGEN_UFCON_DEFAULT, | ||
88 | }, | ||
89 | }; | ||
90 | |||
91 | static struct regulator_consumer_supply __initdata ldo3_consumer[] = { | ||
92 | REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */ | ||
93 | REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */ | ||
94 | REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */ | ||
95 | }; | ||
96 | static struct regulator_consumer_supply __initdata ldo6_consumer[] = { | ||
97 | REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */ | ||
98 | }; | ||
99 | static struct regulator_consumer_supply __initdata ldo7_consumer[] = { | ||
100 | REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */ | ||
101 | }; | ||
102 | static struct regulator_consumer_supply __initdata ldo8_consumer[] = { | ||
103 | REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */ | ||
104 | REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */ | ||
105 | }; | ||
106 | static struct regulator_consumer_supply __initdata ldo9_consumer[] = { | ||
107 | REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */ | ||
108 | }; | ||
109 | static struct regulator_consumer_supply __initdata ldo11_consumer[] = { | ||
110 | REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */ | ||
111 | }; | ||
112 | static struct regulator_consumer_supply __initdata ldo14_consumer[] = { | ||
113 | REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */ | ||
114 | }; | ||
115 | static struct regulator_consumer_supply __initdata ldo17_consumer[] = { | ||
116 | REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */ | ||
117 | }; | ||
118 | static struct regulator_consumer_supply __initdata buck1_consumer[] = { | ||
119 | REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */ | ||
120 | }; | ||
121 | static struct regulator_consumer_supply __initdata buck2_consumer[] = { | ||
122 | REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */ | ||
123 | }; | ||
124 | static struct regulator_consumer_supply __initdata buck3_consumer[] = { | ||
125 | REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */ | ||
126 | }; | ||
127 | static struct regulator_consumer_supply __initdata buck7_consumer[] = { | ||
128 | REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */ | ||
129 | }; | ||
130 | |||
131 | static struct regulator_init_data __initdata max8997_ldo1_data = { | ||
132 | .constraints = { | ||
133 | .name = "VDD_ABB_3.3V", | ||
134 | .min_uV = 3300000, | ||
135 | .max_uV = 3300000, | ||
136 | .apply_uV = 1, | ||
137 | .state_mem = { | ||
138 | .disabled = 1, | ||
139 | }, | ||
140 | }, | ||
141 | }; | ||
142 | |||
143 | static struct regulator_init_data __initdata max8997_ldo2_data = { | ||
144 | .constraints = { | ||
145 | .name = "VDD_ALIVE_1.1V", | ||
146 | .min_uV = 1100000, | ||
147 | .max_uV = 1100000, | ||
148 | .apply_uV = 1, | ||
149 | .always_on = 1, | ||
150 | .state_mem = { | ||
151 | .enabled = 1, | ||
152 | }, | ||
153 | }, | ||
154 | }; | ||
155 | |||
156 | static struct regulator_init_data __initdata max8997_ldo3_data = { | ||
157 | .constraints = { | ||
158 | .name = "VMIPI_1.1V", | ||
159 | .min_uV = 1100000, | ||
160 | .max_uV = 1100000, | ||
161 | .apply_uV = 1, | ||
162 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
163 | .state_mem = { | ||
164 | .disabled = 1, | ||
165 | }, | ||
166 | }, | ||
167 | .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer), | ||
168 | .consumer_supplies = ldo3_consumer, | ||
169 | }; | ||
170 | |||
171 | static struct regulator_init_data __initdata max8997_ldo4_data = { | ||
172 | .constraints = { | ||
173 | .name = "VDD_RTC_1.8V", | ||
174 | .min_uV = 1800000, | ||
175 | .max_uV = 1800000, | ||
176 | .apply_uV = 1, | ||
177 | .always_on = 1, | ||
178 | .state_mem = { | ||
179 | .disabled = 1, | ||
180 | }, | ||
181 | }, | ||
182 | }; | ||
183 | |||
184 | static struct regulator_init_data __initdata max8997_ldo6_data = { | ||
185 | .constraints = { | ||
186 | .name = "VMIPI_1.8V", | ||
187 | .min_uV = 1800000, | ||
188 | .max_uV = 1800000, | ||
189 | .apply_uV = 1, | ||
190 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
191 | .state_mem = { | ||
192 | .disabled = 1, | ||
193 | }, | ||
194 | }, | ||
195 | .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer), | ||
196 | .consumer_supplies = ldo6_consumer, | ||
197 | }; | ||
198 | |||
199 | static struct regulator_init_data __initdata max8997_ldo7_data = { | ||
200 | .constraints = { | ||
201 | .name = "VDD_AUD_1.8V", | ||
202 | .min_uV = 1800000, | ||
203 | .max_uV = 1800000, | ||
204 | .apply_uV = 1, | ||
205 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
206 | .state_mem = { | ||
207 | .disabled = 1, | ||
208 | }, | ||
209 | }, | ||
210 | .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer), | ||
211 | .consumer_supplies = ldo7_consumer, | ||
212 | }; | ||
213 | |||
214 | static struct regulator_init_data __initdata max8997_ldo8_data = { | ||
215 | .constraints = { | ||
216 | .name = "VADC_3.3V", | ||
217 | .min_uV = 3300000, | ||
218 | .max_uV = 3300000, | ||
219 | .apply_uV = 1, | ||
220 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
221 | .state_mem = { | ||
222 | .disabled = 1, | ||
223 | }, | ||
224 | }, | ||
225 | .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer), | ||
226 | .consumer_supplies = ldo8_consumer, | ||
227 | }; | ||
228 | |||
229 | static struct regulator_init_data __initdata max8997_ldo9_data = { | ||
230 | .constraints = { | ||
231 | .name = "DVDD_SWB_2.8V", | ||
232 | .min_uV = 2800000, | ||
233 | .max_uV = 2800000, | ||
234 | .apply_uV = 1, | ||
235 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
236 | .state_mem = { | ||
237 | .disabled = 1, | ||
238 | }, | ||
239 | }, | ||
240 | .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer), | ||
241 | .consumer_supplies = ldo9_consumer, | ||
242 | }; | ||
243 | |||
244 | static struct regulator_init_data __initdata max8997_ldo10_data = { | ||
245 | .constraints = { | ||
246 | .name = "VDD_PLL_1.1V", | ||
247 | .min_uV = 1100000, | ||
248 | .max_uV = 1100000, | ||
249 | .apply_uV = 1, | ||
250 | .always_on = 1, | ||
251 | .state_mem = { | ||
252 | .disabled = 1, | ||
253 | }, | ||
254 | }, | ||
255 | }; | ||
256 | |||
257 | static struct regulator_init_data __initdata max8997_ldo11_data = { | ||
258 | .constraints = { | ||
259 | .name = "VDD_AUD_3V", | ||
260 | .min_uV = 3000000, | ||
261 | .max_uV = 3000000, | ||
262 | .apply_uV = 1, | ||
263 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
264 | .state_mem = { | ||
265 | .disabled = 1, | ||
266 | }, | ||
267 | }, | ||
268 | .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer), | ||
269 | .consumer_supplies = ldo11_consumer, | ||
270 | }; | ||
271 | |||
272 | static struct regulator_init_data __initdata max8997_ldo14_data = { | ||
273 | .constraints = { | ||
274 | .name = "AVDD18_SWB_1.8V", | ||
275 | .min_uV = 1800000, | ||
276 | .max_uV = 1800000, | ||
277 | .apply_uV = 1, | ||
278 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
279 | .state_mem = { | ||
280 | .disabled = 1, | ||
281 | }, | ||
282 | }, | ||
283 | .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer), | ||
284 | .consumer_supplies = ldo14_consumer, | ||
285 | }; | ||
286 | |||
287 | static struct regulator_init_data __initdata max8997_ldo17_data = { | ||
288 | .constraints = { | ||
289 | .name = "VDD_SWB_3.3V", | ||
290 | .min_uV = 3300000, | ||
291 | .max_uV = 3300000, | ||
292 | .apply_uV = 1, | ||
293 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
294 | .state_mem = { | ||
295 | .disabled = 1, | ||
296 | }, | ||
297 | }, | ||
298 | .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer), | ||
299 | .consumer_supplies = ldo17_consumer, | ||
300 | }; | ||
301 | |||
302 | static struct regulator_init_data __initdata max8997_ldo21_data = { | ||
303 | .constraints = { | ||
304 | .name = "VDD_MIF_1.2V", | ||
305 | .min_uV = 1200000, | ||
306 | .max_uV = 1200000, | ||
307 | .apply_uV = 1, | ||
308 | .always_on = 1, | ||
309 | .state_mem = { | ||
310 | .disabled = 1, | ||
311 | }, | ||
312 | }, | ||
313 | }; | ||
314 | |||
315 | static struct regulator_init_data __initdata max8997_buck1_data = { | ||
316 | .constraints = { | ||
317 | .name = "VDD_ARM_1.2V", | ||
318 | .min_uV = 950000, | ||
319 | .max_uV = 1350000, | ||
320 | .always_on = 1, | ||
321 | .boot_on = 1, | ||
322 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
323 | .state_mem = { | ||
324 | .disabled = 1, | ||
325 | }, | ||
326 | }, | ||
327 | .num_consumer_supplies = ARRAY_SIZE(buck1_consumer), | ||
328 | .consumer_supplies = buck1_consumer, | ||
329 | }; | ||
330 | |||
331 | static struct regulator_init_data __initdata max8997_buck2_data = { | ||
332 | .constraints = { | ||
333 | .name = "VDD_INT_1.1V", | ||
334 | .min_uV = 900000, | ||
335 | .max_uV = 1100000, | ||
336 | .always_on = 1, | ||
337 | .boot_on = 1, | ||
338 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
339 | .state_mem = { | ||
340 | .disabled = 1, | ||
341 | }, | ||
342 | }, | ||
343 | .num_consumer_supplies = ARRAY_SIZE(buck2_consumer), | ||
344 | .consumer_supplies = buck2_consumer, | ||
345 | }; | ||
346 | |||
347 | static struct regulator_init_data __initdata max8997_buck3_data = { | ||
348 | .constraints = { | ||
349 | .name = "VDD_G3D_1.1V", | ||
350 | .min_uV = 900000, | ||
351 | .max_uV = 1100000, | ||
352 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
353 | REGULATOR_CHANGE_STATUS, | ||
354 | .state_mem = { | ||
355 | .disabled = 1, | ||
356 | }, | ||
357 | }, | ||
358 | .num_consumer_supplies = ARRAY_SIZE(buck3_consumer), | ||
359 | .consumer_supplies = buck3_consumer, | ||
360 | }; | ||
361 | |||
362 | static struct regulator_init_data __initdata max8997_buck5_data = { | ||
363 | .constraints = { | ||
364 | .name = "VDDQ_M1M2_1.2V", | ||
365 | .min_uV = 1200000, | ||
366 | .max_uV = 1200000, | ||
367 | .apply_uV = 1, | ||
368 | .always_on = 1, | ||
369 | .state_mem = { | ||
370 | .disabled = 1, | ||
371 | }, | ||
372 | }, | ||
373 | }; | ||
374 | |||
375 | static struct regulator_init_data __initdata max8997_buck7_data = { | ||
376 | .constraints = { | ||
377 | .name = "VDD_LCD_3.3V", | ||
378 | .min_uV = 3300000, | ||
379 | .max_uV = 3300000, | ||
380 | .boot_on = 1, | ||
381 | .apply_uV = 1, | ||
382 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
383 | .state_mem = { | ||
384 | .disabled = 1 | ||
385 | }, | ||
386 | }, | ||
387 | .num_consumer_supplies = ARRAY_SIZE(buck7_consumer), | ||
388 | .consumer_supplies = buck7_consumer, | ||
389 | }; | ||
390 | |||
391 | static struct max8997_regulator_data __initdata origen_max8997_regulators[] = { | ||
392 | { MAX8997_LDO1, &max8997_ldo1_data }, | ||
393 | { MAX8997_LDO2, &max8997_ldo2_data }, | ||
394 | { MAX8997_LDO3, &max8997_ldo3_data }, | ||
395 | { MAX8997_LDO4, &max8997_ldo4_data }, | ||
396 | { MAX8997_LDO6, &max8997_ldo6_data }, | ||
397 | { MAX8997_LDO7, &max8997_ldo7_data }, | ||
398 | { MAX8997_LDO8, &max8997_ldo8_data }, | ||
399 | { MAX8997_LDO9, &max8997_ldo9_data }, | ||
400 | { MAX8997_LDO10, &max8997_ldo10_data }, | ||
401 | { MAX8997_LDO11, &max8997_ldo11_data }, | ||
402 | { MAX8997_LDO14, &max8997_ldo14_data }, | ||
403 | { MAX8997_LDO17, &max8997_ldo17_data }, | ||
404 | { MAX8997_LDO21, &max8997_ldo21_data }, | ||
405 | { MAX8997_BUCK1, &max8997_buck1_data }, | ||
406 | { MAX8997_BUCK2, &max8997_buck2_data }, | ||
407 | { MAX8997_BUCK3, &max8997_buck3_data }, | ||
408 | { MAX8997_BUCK5, &max8997_buck5_data }, | ||
409 | { MAX8997_BUCK7, &max8997_buck7_data }, | ||
410 | }; | ||
411 | |||
412 | struct max8997_platform_data __initdata origen_max8997_pdata = { | ||
413 | .num_regulators = ARRAY_SIZE(origen_max8997_regulators), | ||
414 | .regulators = origen_max8997_regulators, | ||
415 | |||
416 | .wakeup = true, | ||
417 | .buck1_gpiodvs = false, | ||
418 | .buck2_gpiodvs = false, | ||
419 | .buck5_gpiodvs = false, | ||
420 | .irq_base = IRQ_GPIO_END + 1, | ||
421 | |||
422 | .ignore_gpiodvs_side_effect = true, | ||
423 | .buck125_default_idx = 0x0, | ||
424 | |||
425 | .buck125_gpios[0] = EXYNOS4_GPX0(0), | ||
426 | .buck125_gpios[1] = EXYNOS4_GPX0(1), | ||
427 | .buck125_gpios[2] = EXYNOS4_GPX0(2), | ||
428 | |||
429 | .buck1_voltage[0] = 1350000, | ||
430 | .buck1_voltage[1] = 1300000, | ||
431 | .buck1_voltage[2] = 1250000, | ||
432 | .buck1_voltage[3] = 1200000, | ||
433 | .buck1_voltage[4] = 1150000, | ||
434 | .buck1_voltage[5] = 1100000, | ||
435 | .buck1_voltage[6] = 1000000, | ||
436 | .buck1_voltage[7] = 950000, | ||
437 | |||
438 | .buck2_voltage[0] = 1100000, | ||
439 | .buck2_voltage[1] = 1100000, | ||
440 | .buck2_voltage[2] = 1100000, | ||
441 | .buck2_voltage[3] = 1100000, | ||
442 | .buck2_voltage[4] = 1000000, | ||
443 | .buck2_voltage[5] = 1000000, | ||
444 | .buck2_voltage[6] = 1000000, | ||
445 | .buck2_voltage[7] = 1000000, | ||
446 | |||
447 | .buck5_voltage[0] = 1200000, | ||
448 | .buck5_voltage[1] = 1200000, | ||
449 | .buck5_voltage[2] = 1200000, | ||
450 | .buck5_voltage[3] = 1200000, | ||
451 | .buck5_voltage[4] = 1200000, | ||
452 | .buck5_voltage[5] = 1200000, | ||
453 | .buck5_voltage[6] = 1200000, | ||
454 | .buck5_voltage[7] = 1200000, | ||
455 | }; | ||
456 | |||
457 | /* I2C0 */ | ||
458 | static struct i2c_board_info i2c0_devs[] __initdata = { | ||
459 | { | ||
460 | I2C_BOARD_INFO("max8997", (0xCC >> 1)), | ||
461 | .platform_data = &origen_max8997_pdata, | ||
462 | .irq = IRQ_EINT(4), | ||
463 | }, | ||
464 | }; | ||
465 | |||
466 | static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = { | ||
467 | .cd_type = S3C_SDHCI_CD_INTERNAL, | ||
468 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
469 | }; | ||
470 | |||
471 | static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = { | ||
472 | .cd_type = S3C_SDHCI_CD_INTERNAL, | ||
473 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
474 | }; | ||
475 | |||
476 | /* USB EHCI */ | ||
477 | static struct s5p_ehci_platdata origen_ehci_pdata; | ||
478 | |||
479 | static void __init origen_ehci_init(void) | ||
480 | { | ||
481 | struct s5p_ehci_platdata *pdata = &origen_ehci_pdata; | ||
482 | |||
483 | s5p_ehci_set_platdata(pdata); | ||
484 | } | ||
485 | |||
486 | static struct gpio_keys_button origen_gpio_keys_table[] = { | ||
487 | { | ||
488 | .code = KEY_MENU, | ||
489 | .gpio = EXYNOS4_GPX1(5), | ||
490 | .desc = "gpio-keys: KEY_MENU", | ||
491 | .type = EV_KEY, | ||
492 | .active_low = 1, | ||
493 | .wakeup = 1, | ||
494 | .debounce_interval = 1, | ||
495 | }, { | ||
496 | .code = KEY_HOME, | ||
497 | .gpio = EXYNOS4_GPX1(6), | ||
498 | .desc = "gpio-keys: KEY_HOME", | ||
499 | .type = EV_KEY, | ||
500 | .active_low = 1, | ||
501 | .wakeup = 1, | ||
502 | .debounce_interval = 1, | ||
503 | }, { | ||
504 | .code = KEY_BACK, | ||
505 | .gpio = EXYNOS4_GPX1(7), | ||
506 | .desc = "gpio-keys: KEY_BACK", | ||
507 | .type = EV_KEY, | ||
508 | .active_low = 1, | ||
509 | .wakeup = 1, | ||
510 | .debounce_interval = 1, | ||
511 | }, { | ||
512 | .code = KEY_UP, | ||
513 | .gpio = EXYNOS4_GPX2(0), | ||
514 | .desc = "gpio-keys: KEY_UP", | ||
515 | .type = EV_KEY, | ||
516 | .active_low = 1, | ||
517 | .wakeup = 1, | ||
518 | .debounce_interval = 1, | ||
519 | }, { | ||
520 | .code = KEY_DOWN, | ||
521 | .gpio = EXYNOS4_GPX2(1), | ||
522 | .desc = "gpio-keys: KEY_DOWN", | ||
523 | .type = EV_KEY, | ||
524 | .active_low = 1, | ||
525 | .wakeup = 1, | ||
526 | .debounce_interval = 1, | ||
527 | }, | ||
528 | }; | ||
529 | |||
530 | static struct gpio_keys_platform_data origen_gpio_keys_data = { | ||
531 | .buttons = origen_gpio_keys_table, | ||
532 | .nbuttons = ARRAY_SIZE(origen_gpio_keys_table), | ||
533 | }; | ||
534 | |||
535 | static struct platform_device origen_device_gpiokeys = { | ||
536 | .name = "gpio-keys", | ||
537 | .dev = { | ||
538 | .platform_data = &origen_gpio_keys_data, | ||
539 | }, | ||
540 | }; | ||
541 | |||
542 | static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power) | ||
543 | { | ||
544 | int ret; | ||
545 | |||
546 | if (power) | ||
547 | ret = gpio_request_one(EXYNOS4_GPE3(4), | ||
548 | GPIOF_OUT_INIT_HIGH, "GPE3_4"); | ||
549 | else | ||
550 | ret = gpio_request_one(EXYNOS4_GPE3(4), | ||
551 | GPIOF_OUT_INIT_LOW, "GPE3_4"); | ||
552 | |||
553 | gpio_free(EXYNOS4_GPE3(4)); | ||
554 | |||
555 | if (ret) | ||
556 | pr_err("failed to request gpio for LCD power: %d\n", ret); | ||
557 | } | ||
558 | |||
559 | static struct plat_lcd_data origen_lcd_hv070wsa_data = { | ||
560 | .set_power = lcd_hv070wsa_set_power, | ||
561 | }; | ||
562 | |||
563 | static struct platform_device origen_lcd_hv070wsa = { | ||
564 | .name = "platform-lcd", | ||
565 | .dev.parent = &s5p_device_fimd0.dev, | ||
566 | .dev.platform_data = &origen_lcd_hv070wsa_data, | ||
567 | }; | ||
568 | |||
569 | static struct s3c_fb_pd_win origen_fb_win0 = { | ||
570 | .win_mode = { | ||
571 | .left_margin = 64, | ||
572 | .right_margin = 16, | ||
573 | .upper_margin = 64, | ||
574 | .lower_margin = 16, | ||
575 | .hsync_len = 48, | ||
576 | .vsync_len = 3, | ||
577 | .xres = 1024, | ||
578 | .yres = 600, | ||
579 | }, | ||
580 | .max_bpp = 32, | ||
581 | .default_bpp = 24, | ||
582 | }; | ||
583 | |||
584 | static struct s3c_fb_platdata origen_lcd_pdata __initdata = { | ||
585 | .win[0] = &origen_fb_win0, | ||
586 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | ||
587 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | ||
588 | .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, | ||
589 | }; | ||
590 | |||
591 | static struct platform_device *origen_devices[] __initdata = { | ||
592 | &s3c_device_hsmmc2, | ||
593 | &s3c_device_hsmmc0, | ||
594 | &s3c_device_i2c0, | ||
595 | &s3c_device_rtc, | ||
596 | &s3c_device_wdt, | ||
597 | &s5p_device_ehci, | ||
598 | &s5p_device_fimc0, | ||
599 | &s5p_device_fimc1, | ||
600 | &s5p_device_fimc2, | ||
601 | &s5p_device_fimc3, | ||
602 | &s5p_device_fimd0, | ||
603 | &s5p_device_hdmi, | ||
604 | &s5p_device_i2c_hdmiphy, | ||
605 | &s5p_device_mfc, | ||
606 | &s5p_device_mfc_l, | ||
607 | &s5p_device_mfc_r, | ||
608 | &s5p_device_mixer, | ||
609 | &exynos4_device_pd[PD_LCD0], | ||
610 | &exynos4_device_pd[PD_TV], | ||
611 | &exynos4_device_pd[PD_G3D], | ||
612 | &exynos4_device_pd[PD_LCD1], | ||
613 | &exynos4_device_pd[PD_CAM], | ||
614 | &exynos4_device_pd[PD_GPS], | ||
615 | &exynos4_device_pd[PD_MFC], | ||
616 | &origen_device_gpiokeys, | ||
617 | &origen_lcd_hv070wsa, | ||
618 | }; | ||
619 | |||
620 | /* LCD Backlight data */ | ||
621 | static struct samsung_bl_gpio_info origen_bl_gpio_info = { | ||
622 | .no = EXYNOS4_GPD0(0), | ||
623 | .func = S3C_GPIO_SFN(2), | ||
624 | }; | ||
625 | |||
626 | static struct platform_pwm_backlight_data origen_bl_data = { | ||
627 | .pwm_id = 0, | ||
628 | .pwm_period_ns = 1000, | ||
629 | }; | ||
630 | |||
631 | static void s5p_tv_setup(void) | ||
632 | { | ||
633 | /* Direct HPD to HDMI chip */ | ||
634 | gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"); | ||
635 | s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); | ||
636 | s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); | ||
637 | } | ||
638 | |||
639 | static void __init origen_map_io(void) | ||
640 | { | ||
641 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
642 | s3c24xx_init_clocks(24000000); | ||
643 | s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs)); | ||
644 | } | ||
645 | |||
646 | static void __init origen_power_init(void) | ||
647 | { | ||
648 | gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ"); | ||
649 | s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf)); | ||
650 | s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE); | ||
651 | } | ||
652 | |||
653 | static void __init origen_reserve(void) | ||
654 | { | ||
655 | s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); | ||
656 | } | ||
657 | |||
658 | static void __init origen_machine_init(void) | ||
659 | { | ||
660 | origen_power_init(); | ||
661 | |||
662 | s3c_i2c0_set_platdata(NULL); | ||
663 | i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs)); | ||
664 | |||
665 | /* | ||
666 | * Since sdhci instance 2 can contain a bootable media, | ||
667 | * sdhci instance 0 is registered after instance 2. | ||
668 | */ | ||
669 | s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata); | ||
670 | s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata); | ||
671 | |||
672 | origen_ehci_init(); | ||
673 | clk_xusbxti.rate = 24000000; | ||
674 | |||
675 | s5p_tv_setup(); | ||
676 | s5p_i2c_hdmiphy_set_platdata(NULL); | ||
677 | |||
678 | s5p_fimd0_set_platdata(&origen_lcd_pdata); | ||
679 | |||
680 | platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices)); | ||
681 | |||
682 | s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev; | ||
683 | |||
684 | s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev; | ||
685 | s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev; | ||
686 | |||
687 | s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; | ||
688 | |||
689 | samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data); | ||
690 | } | ||
691 | |||
692 | MACHINE_START(ORIGEN, "ORIGEN") | ||
693 | /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */ | ||
694 | .atag_offset = 0x100, | ||
695 | .init_irq = exynos4_init_irq, | ||
696 | .map_io = origen_map_io, | ||
697 | .init_machine = origen_machine_init, | ||
698 | .timer = &exynos4_timer, | ||
699 | .reserve = &origen_reserve, | ||
700 | MACHINE_END | ||
diff --git a/arch/arm/mach-exynos4/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c index fcf2e0e23d5..fcf2e0e23d5 100644 --- a/arch/arm/mach-exynos4/mach-smdk4x12.c +++ b/arch/arm/mach-exynos/mach-smdk4x12.c | |||
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c index 2c1a076c6a7..cec2afabe7b 100644 --- a/arch/arm/mach-exynos4/mach-smdkv310.c +++ b/arch/arm/mach-exynos/mach-smdkv310.c | |||
@@ -37,6 +37,9 @@ | |||
37 | #include <plat/pd.h> | 37 | #include <plat/pd.h> |
38 | #include <plat/gpio-cfg.h> | 38 | #include <plat/gpio-cfg.h> |
39 | #include <plat/backlight.h> | 39 | #include <plat/backlight.h> |
40 | #include <plat/mfc.h> | ||
41 | #include <plat/ehci.h> | ||
42 | #include <plat/clock.h> | ||
40 | 43 | ||
41 | #include <mach/map.h> | 44 | #include <mach/map.h> |
42 | 45 | ||
@@ -232,17 +235,36 @@ static struct i2c_board_info i2c_devs1[] __initdata = { | |||
232 | {I2C_BOARD_INFO("wm8994", 0x1a),}, | 235 | {I2C_BOARD_INFO("wm8994", 0x1a),}, |
233 | }; | 236 | }; |
234 | 237 | ||
238 | /* USB EHCI */ | ||
239 | static struct s5p_ehci_platdata smdkv310_ehci_pdata; | ||
240 | |||
241 | static void __init smdkv310_ehci_init(void) | ||
242 | { | ||
243 | struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata; | ||
244 | |||
245 | s5p_ehci_set_platdata(pdata); | ||
246 | } | ||
247 | |||
235 | static struct platform_device *smdkv310_devices[] __initdata = { | 248 | static struct platform_device *smdkv310_devices[] __initdata = { |
236 | &s3c_device_hsmmc0, | 249 | &s3c_device_hsmmc0, |
237 | &s3c_device_hsmmc1, | 250 | &s3c_device_hsmmc1, |
238 | &s3c_device_hsmmc2, | 251 | &s3c_device_hsmmc2, |
239 | &s3c_device_hsmmc3, | 252 | &s3c_device_hsmmc3, |
240 | &s3c_device_i2c1, | 253 | &s3c_device_i2c1, |
254 | &s5p_device_i2c_hdmiphy, | ||
241 | &s3c_device_rtc, | 255 | &s3c_device_rtc, |
242 | &s3c_device_wdt, | 256 | &s3c_device_wdt, |
257 | &s5p_device_ehci, | ||
258 | &s5p_device_fimc0, | ||
259 | &s5p_device_fimc1, | ||
260 | &s5p_device_fimc2, | ||
261 | &s5p_device_fimc3, | ||
243 | &exynos4_device_ac97, | 262 | &exynos4_device_ac97, |
244 | &exynos4_device_i2s0, | 263 | &exynos4_device_i2s0, |
245 | &samsung_device_keypad, | 264 | &samsung_device_keypad, |
265 | &s5p_device_mfc, | ||
266 | &s5p_device_mfc_l, | ||
267 | &s5p_device_mfc_r, | ||
246 | &exynos4_device_pd[PD_MFC], | 268 | &exynos4_device_pd[PD_MFC], |
247 | &exynos4_device_pd[PD_G3D], | 269 | &exynos4_device_pd[PD_G3D], |
248 | &exynos4_device_pd[PD_LCD0], | 270 | &exynos4_device_pd[PD_LCD0], |
@@ -258,6 +280,8 @@ static struct platform_device *smdkv310_devices[] __initdata = { | |||
258 | &smdkv310_lcd_lte480wv, | 280 | &smdkv310_lcd_lte480wv, |
259 | &smdkv310_smsc911x, | 281 | &smdkv310_smsc911x, |
260 | &exynos4_device_ahci, | 282 | &exynos4_device_ahci, |
283 | &s5p_device_hdmi, | ||
284 | &s5p_device_mixer, | ||
261 | }; | 285 | }; |
262 | 286 | ||
263 | static void __init smdkv310_smsc911x_init(void) | 287 | static void __init smdkv310_smsc911x_init(void) |
@@ -294,6 +318,18 @@ static struct platform_pwm_backlight_data smdkv310_bl_data = { | |||
294 | .pwm_period_ns = 1000, | 318 | .pwm_period_ns = 1000, |
295 | }; | 319 | }; |
296 | 320 | ||
321 | static void s5p_tv_setup(void) | ||
322 | { | ||
323 | /* direct HPD to HDMI chip */ | ||
324 | WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug")); | ||
325 | s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); | ||
326 | s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); | ||
327 | |||
328 | /* setup dependencies between TV devices */ | ||
329 | s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev; | ||
330 | s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev; | ||
331 | } | ||
332 | |||
297 | static void __init smdkv310_map_io(void) | 333 | static void __init smdkv310_map_io(void) |
298 | { | 334 | { |
299 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 335 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); |
@@ -301,6 +337,11 @@ static void __init smdkv310_map_io(void) | |||
301 | s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs)); | 337 | s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs)); |
302 | } | 338 | } |
303 | 339 | ||
340 | static void __init smdkv310_reserve(void) | ||
341 | { | ||
342 | s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); | ||
343 | } | ||
344 | |||
304 | static void __init smdkv310_machine_init(void) | 345 | static void __init smdkv310_machine_init(void) |
305 | { | 346 | { |
306 | s3c_i2c1_set_platdata(NULL); | 347 | s3c_i2c1_set_platdata(NULL); |
@@ -313,12 +354,19 @@ static void __init smdkv310_machine_init(void) | |||
313 | s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata); | 354 | s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata); |
314 | s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata); | 355 | s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata); |
315 | 356 | ||
357 | s5p_tv_setup(); | ||
358 | s5p_i2c_hdmiphy_set_platdata(NULL); | ||
359 | |||
316 | samsung_keypad_set_platdata(&smdkv310_keypad_data); | 360 | samsung_keypad_set_platdata(&smdkv310_keypad_data); |
317 | 361 | ||
318 | samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data); | 362 | samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data); |
319 | s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata); | 363 | s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata); |
320 | 364 | ||
365 | smdkv310_ehci_init(); | ||
366 | clk_xusbxti.rate = 24000000; | ||
367 | |||
321 | platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); | 368 | platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); |
369 | s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; | ||
322 | } | 370 | } |
323 | 371 | ||
324 | MACHINE_START(SMDKV310, "SMDKV310") | 372 | MACHINE_START(SMDKV310, "SMDKV310") |
@@ -329,6 +377,7 @@ MACHINE_START(SMDKV310, "SMDKV310") | |||
329 | .map_io = smdkv310_map_io, | 377 | .map_io = smdkv310_map_io, |
330 | .init_machine = smdkv310_machine_init, | 378 | .init_machine = smdkv310_machine_init, |
331 | .timer = &exynos4_timer, | 379 | .timer = &exynos4_timer, |
380 | .reserve = &smdkv310_reserve, | ||
332 | MACHINE_END | 381 | MACHINE_END |
333 | 382 | ||
334 | MACHINE_START(SMDKC210, "SMDKC210") | 383 | MACHINE_START(SMDKC210, "SMDKC210") |
diff --git a/arch/arm/mach-exynos4/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c index 2aac6f755c8..a2a177ff4b4 100644 --- a/arch/arm/mach-exynos4/mach-universal_c210.c +++ b/arch/arm/mach-exynos/mach-universal_c210.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/i2c.h> | 13 | #include <linux/i2c.h> |
14 | #include <linux/gpio_keys.h> | 14 | #include <linux/gpio_keys.h> |
15 | #include <linux/gpio.h> | 15 | #include <linux/gpio.h> |
16 | #include <linux/fb.h> | ||
16 | #include <linux/mfd/max8998.h> | 17 | #include <linux/mfd/max8998.h> |
17 | #include <linux/regulator/machine.h> | 18 | #include <linux/regulator/machine.h> |
18 | #include <linux/regulator/fixed.h> | 19 | #include <linux/regulator/fixed.h> |
@@ -31,12 +32,21 @@ | |||
31 | #include <plat/devs.h> | 32 | #include <plat/devs.h> |
32 | #include <plat/iic.h> | 33 | #include <plat/iic.h> |
33 | #include <plat/gpio-cfg.h> | 34 | #include <plat/gpio-cfg.h> |
35 | #include <plat/fb.h> | ||
34 | #include <plat/mfc.h> | 36 | #include <plat/mfc.h> |
35 | #include <plat/sdhci.h> | 37 | #include <plat/sdhci.h> |
36 | #include <plat/pd.h> | 38 | #include <plat/pd.h> |
39 | #include <plat/regs-fb-v4.h> | ||
40 | #include <plat/fimc-core.h> | ||
41 | #include <plat/camport.h> | ||
42 | #include <plat/mipi_csis.h> | ||
37 | 43 | ||
38 | #include <mach/map.h> | 44 | #include <mach/map.h> |
39 | 45 | ||
46 | #include <media/v4l2-mediabus.h> | ||
47 | #include <media/s5p_fimc.h> | ||
48 | #include <media/m5mols.h> | ||
49 | |||
40 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 50 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
41 | #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 51 | #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
42 | S3C2410_UCON_RXILEVEL | \ | 52 | S3C2410_UCON_RXILEVEL | \ |
@@ -110,6 +120,9 @@ static struct regulator_consumer_supply lp3974_buck1_consumer = | |||
110 | static struct regulator_consumer_supply lp3974_buck2_consumer = | 120 | static struct regulator_consumer_supply lp3974_buck2_consumer = |
111 | REGULATOR_SUPPLY("vddg3d", NULL); | 121 | REGULATOR_SUPPLY("vddg3d", NULL); |
112 | 122 | ||
123 | static struct regulator_consumer_supply lp3974_buck3_consumer = | ||
124 | REGULATOR_SUPPLY("vdet", "s5p-sdo"); | ||
125 | |||
113 | static struct regulator_init_data lp3974_buck1_data = { | 126 | static struct regulator_init_data lp3974_buck1_data = { |
114 | .constraints = { | 127 | .constraints = { |
115 | .name = "VINT_1.1V", | 128 | .name = "VINT_1.1V", |
@@ -153,6 +166,8 @@ static struct regulator_init_data lp3974_buck3_data = { | |||
153 | .enabled = 1, | 166 | .enabled = 1, |
154 | }, | 167 | }, |
155 | }, | 168 | }, |
169 | .num_consumer_supplies = 1, | ||
170 | .consumer_supplies = &lp3974_buck3_consumer, | ||
156 | }; | 171 | }; |
157 | 172 | ||
158 | static struct regulator_init_data lp3974_buck4_data = { | 173 | static struct regulator_init_data lp3974_buck4_data = { |
@@ -181,6 +196,12 @@ static struct regulator_init_data lp3974_ldo2_data = { | |||
181 | }, | 196 | }, |
182 | }; | 197 | }; |
183 | 198 | ||
199 | static struct regulator_consumer_supply lp3974_ldo3_consumer[] = { | ||
200 | REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), | ||
201 | REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), | ||
202 | REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), | ||
203 | }; | ||
204 | |||
184 | static struct regulator_init_data lp3974_ldo3_data = { | 205 | static struct regulator_init_data lp3974_ldo3_data = { |
185 | .constraints = { | 206 | .constraints = { |
186 | .name = "VUSB+MIPI_1.1V", | 207 | .name = "VUSB+MIPI_1.1V", |
@@ -192,6 +213,12 @@ static struct regulator_init_data lp3974_ldo3_data = { | |||
192 | .disabled = 1, | 213 | .disabled = 1, |
193 | }, | 214 | }, |
194 | }, | 215 | }, |
216 | .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer), | ||
217 | .consumer_supplies = lp3974_ldo3_consumer, | ||
218 | }; | ||
219 | |||
220 | static struct regulator_consumer_supply lp3974_ldo4_consumer[] = { | ||
221 | REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), | ||
195 | }; | 222 | }; |
196 | 223 | ||
197 | static struct regulator_init_data lp3974_ldo4_data = { | 224 | static struct regulator_init_data lp3974_ldo4_data = { |
@@ -205,6 +232,8 @@ static struct regulator_init_data lp3974_ldo4_data = { | |||
205 | .disabled = 1, | 232 | .disabled = 1, |
206 | }, | 233 | }, |
207 | }, | 234 | }, |
235 | .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer), | ||
236 | .consumer_supplies = lp3974_ldo4_consumer, | ||
208 | }; | 237 | }; |
209 | 238 | ||
210 | static struct regulator_init_data lp3974_ldo5_data = { | 239 | static struct regulator_init_data lp3974_ldo5_data = { |
@@ -233,6 +262,10 @@ static struct regulator_init_data lp3974_ldo6_data = { | |||
233 | }, | 262 | }, |
234 | }; | 263 | }; |
235 | 264 | ||
265 | static struct regulator_consumer_supply lp3974_ldo7_consumer[] = { | ||
266 | REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), | ||
267 | }; | ||
268 | |||
236 | static struct regulator_init_data lp3974_ldo7_data = { | 269 | static struct regulator_init_data lp3974_ldo7_data = { |
237 | .constraints = { | 270 | .constraints = { |
238 | .name = "VLCD+VMIPI_1.8V", | 271 | .name = "VLCD+VMIPI_1.8V", |
@@ -244,6 +277,12 @@ static struct regulator_init_data lp3974_ldo7_data = { | |||
244 | .disabled = 1, | 277 | .disabled = 1, |
245 | }, | 278 | }, |
246 | }, | 279 | }, |
280 | .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer), | ||
281 | .consumer_supplies = lp3974_ldo7_consumer, | ||
282 | }; | ||
283 | |||
284 | static struct regulator_consumer_supply lp3974_ldo8_consumer[] = { | ||
285 | REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"), | ||
247 | }; | 286 | }; |
248 | 287 | ||
249 | static struct regulator_init_data lp3974_ldo8_data = { | 288 | static struct regulator_init_data lp3974_ldo8_data = { |
@@ -257,6 +296,8 @@ static struct regulator_init_data lp3974_ldo8_data = { | |||
257 | .disabled = 1, | 296 | .disabled = 1, |
258 | }, | 297 | }, |
259 | }, | 298 | }, |
299 | .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer), | ||
300 | .consumer_supplies = lp3974_ldo8_consumer, | ||
260 | }; | 301 | }; |
261 | 302 | ||
262 | static struct regulator_init_data lp3974_ldo9_data = { | 303 | static struct regulator_init_data lp3974_ldo9_data = { |
@@ -286,6 +327,9 @@ static struct regulator_init_data lp3974_ldo10_data = { | |||
286 | }, | 327 | }, |
287 | }; | 328 | }; |
288 | 329 | ||
330 | static struct regulator_consumer_supply lp3974_ldo11_consumer = | ||
331 | REGULATOR_SUPPLY("dig_28", "0-001f"); | ||
332 | |||
289 | static struct regulator_init_data lp3974_ldo11_data = { | 333 | static struct regulator_init_data lp3974_ldo11_data = { |
290 | .constraints = { | 334 | .constraints = { |
291 | .name = "CAM_AF_3.3V", | 335 | .name = "CAM_AF_3.3V", |
@@ -297,6 +341,8 @@ static struct regulator_init_data lp3974_ldo11_data = { | |||
297 | .disabled = 1, | 341 | .disabled = 1, |
298 | }, | 342 | }, |
299 | }, | 343 | }, |
344 | .num_consumer_supplies = 1, | ||
345 | .consumer_supplies = &lp3974_ldo11_consumer, | ||
300 | }; | 346 | }; |
301 | 347 | ||
302 | static struct regulator_init_data lp3974_ldo12_data = { | 348 | static struct regulator_init_data lp3974_ldo12_data = { |
@@ -325,6 +371,9 @@ static struct regulator_init_data lp3974_ldo13_data = { | |||
325 | }, | 371 | }, |
326 | }; | 372 | }; |
327 | 373 | ||
374 | static struct regulator_consumer_supply lp3974_ldo14_consumer = | ||
375 | REGULATOR_SUPPLY("dig_18", "0-001f"); | ||
376 | |||
328 | static struct regulator_init_data lp3974_ldo14_data = { | 377 | static struct regulator_init_data lp3974_ldo14_data = { |
329 | .constraints = { | 378 | .constraints = { |
330 | .name = "CAM_I_HOST_1.8V", | 379 | .name = "CAM_I_HOST_1.8V", |
@@ -336,8 +385,14 @@ static struct regulator_init_data lp3974_ldo14_data = { | |||
336 | .disabled = 1, | 385 | .disabled = 1, |
337 | }, | 386 | }, |
338 | }, | 387 | }, |
388 | .num_consumer_supplies = 1, | ||
389 | .consumer_supplies = &lp3974_ldo14_consumer, | ||
339 | }; | 390 | }; |
340 | 391 | ||
392 | |||
393 | static struct regulator_consumer_supply lp3974_ldo15_consumer = | ||
394 | REGULATOR_SUPPLY("dig_12", "0-001f"); | ||
395 | |||
341 | static struct regulator_init_data lp3974_ldo15_data = { | 396 | static struct regulator_init_data lp3974_ldo15_data = { |
342 | .constraints = { | 397 | .constraints = { |
343 | .name = "CAM_S_DIG+FM33_CORE_1.2V", | 398 | .name = "CAM_S_DIG+FM33_CORE_1.2V", |
@@ -349,6 +404,12 @@ static struct regulator_init_data lp3974_ldo15_data = { | |||
349 | .disabled = 1, | 404 | .disabled = 1, |
350 | }, | 405 | }, |
351 | }, | 406 | }, |
407 | .num_consumer_supplies = 1, | ||
408 | .consumer_supplies = &lp3974_ldo15_consumer, | ||
409 | }; | ||
410 | |||
411 | static struct regulator_consumer_supply lp3974_ldo16_consumer[] = { | ||
412 | REGULATOR_SUPPLY("a_sensor", "0-001f"), | ||
352 | }; | 413 | }; |
353 | 414 | ||
354 | static struct regulator_init_data lp3974_ldo16_data = { | 415 | static struct regulator_init_data lp3974_ldo16_data = { |
@@ -362,6 +423,8 @@ static struct regulator_init_data lp3974_ldo16_data = { | |||
362 | .disabled = 1, | 423 | .disabled = 1, |
363 | }, | 424 | }, |
364 | }, | 425 | }, |
426 | .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer), | ||
427 | .consumer_supplies = lp3974_ldo16_consumer, | ||
365 | }; | 428 | }; |
366 | 429 | ||
367 | static struct regulator_init_data lp3974_ldo17_data = { | 430 | static struct regulator_init_data lp3974_ldo17_data = { |
@@ -472,6 +535,43 @@ static struct max8998_platform_data universal_lp3974_pdata = { | |||
472 | .wakeup = true, | 535 | .wakeup = true, |
473 | }; | 536 | }; |
474 | 537 | ||
538 | |||
539 | enum fixed_regulator_id { | ||
540 | FIXED_REG_ID_MMC0, | ||
541 | FIXED_REG_ID_HDMI_5V, | ||
542 | FIXED_REG_ID_CAM_S_IF, | ||
543 | FIXED_REG_ID_CAM_I_CORE, | ||
544 | FIXED_REG_ID_CAM_VT_DIO, | ||
545 | }; | ||
546 | |||
547 | static struct regulator_consumer_supply hdmi_fixed_consumer = | ||
548 | REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi"); | ||
549 | |||
550 | static struct regulator_init_data hdmi_fixed_voltage_init_data = { | ||
551 | .constraints = { | ||
552 | .name = "HDMI_5V", | ||
553 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
554 | }, | ||
555 | .num_consumer_supplies = 1, | ||
556 | .consumer_supplies = &hdmi_fixed_consumer, | ||
557 | }; | ||
558 | |||
559 | static struct fixed_voltage_config hdmi_fixed_voltage_config = { | ||
560 | .supply_name = "HDMI_EN1", | ||
561 | .microvolts = 5000000, | ||
562 | .gpio = EXYNOS4_GPE0(1), | ||
563 | .enable_high = true, | ||
564 | .init_data = &hdmi_fixed_voltage_init_data, | ||
565 | }; | ||
566 | |||
567 | static struct platform_device hdmi_fixed_voltage = { | ||
568 | .name = "reg-fixed-voltage", | ||
569 | .id = FIXED_REG_ID_HDMI_5V, | ||
570 | .dev = { | ||
571 | .platform_data = &hdmi_fixed_voltage_config, | ||
572 | }, | ||
573 | }; | ||
574 | |||
475 | /* GPIO I2C 5 (PMIC) */ | 575 | /* GPIO I2C 5 (PMIC) */ |
476 | static struct i2c_board_info i2c5_devs[] __initdata = { | 576 | static struct i2c_board_info i2c5_devs[] __initdata = { |
477 | { | 577 | { |
@@ -573,6 +673,11 @@ static void __init universal_touchkey_init(void) | |||
573 | gpio_direction_output(gpio, 1); | 673 | gpio_direction_output(gpio, 1); |
574 | } | 674 | } |
575 | 675 | ||
676 | static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = { | ||
677 | .frequency = 300 * 1000, | ||
678 | .sda_delay = 200, | ||
679 | }; | ||
680 | |||
576 | /* GPIO KEYS */ | 681 | /* GPIO KEYS */ |
577 | static struct gpio_keys_button universal_gpio_keys_tables[] = { | 682 | static struct gpio_keys_button universal_gpio_keys_tables[] = { |
578 | { | 683 | { |
@@ -658,7 +763,7 @@ static struct fixed_voltage_config mmc0_fixed_voltage_config = { | |||
658 | 763 | ||
659 | static struct platform_device mmc0_fixed_voltage = { | 764 | static struct platform_device mmc0_fixed_voltage = { |
660 | .name = "reg-fixed-voltage", | 765 | .name = "reg-fixed-voltage", |
661 | .id = 0, | 766 | .id = FIXED_REG_ID_MMC0, |
662 | .dev = { | 767 | .dev = { |
663 | .platform_data = &mmc0_fixed_voltage_config, | 768 | .platform_data = &mmc0_fixed_voltage_config, |
664 | }, | 769 | }, |
@@ -692,18 +797,165 @@ static void __init universal_sdhci_init(void) | |||
692 | s3c_sdhci3_set_platdata(&universal_hsmmc3_data); | 797 | s3c_sdhci3_set_platdata(&universal_hsmmc3_data); |
693 | } | 798 | } |
694 | 799 | ||
695 | /* I2C0 */ | ||
696 | static struct i2c_board_info i2c0_devs[] __initdata = { | ||
697 | /* Camera, To be updated */ | ||
698 | }; | ||
699 | |||
700 | /* I2C1 */ | 800 | /* I2C1 */ |
701 | static struct i2c_board_info i2c1_devs[] __initdata = { | 801 | static struct i2c_board_info i2c1_devs[] __initdata = { |
702 | /* Gyro, To be updated */ | 802 | /* Gyro, To be updated */ |
703 | }; | 803 | }; |
704 | 804 | ||
805 | /* Frame Buffer */ | ||
806 | static struct s3c_fb_pd_win universal_fb_win0 = { | ||
807 | .win_mode = { | ||
808 | .left_margin = 16, | ||
809 | .right_margin = 16, | ||
810 | .upper_margin = 2, | ||
811 | .lower_margin = 28, | ||
812 | .hsync_len = 2, | ||
813 | .vsync_len = 1, | ||
814 | .xres = 480, | ||
815 | .yres = 800, | ||
816 | .refresh = 55, | ||
817 | }, | ||
818 | .max_bpp = 32, | ||
819 | .default_bpp = 16, | ||
820 | }; | ||
821 | |||
822 | static struct s3c_fb_platdata universal_lcd_pdata __initdata = { | ||
823 | .win[0] = &universal_fb_win0, | ||
824 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB | | ||
825 | VIDCON0_CLKSEL_LCD, | ||
826 | .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN | ||
827 | | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | ||
828 | .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, | ||
829 | }; | ||
830 | |||
831 | static struct regulator_consumer_supply cam_i_core_supply = | ||
832 | REGULATOR_SUPPLY("core", "0-001f"); | ||
833 | |||
834 | static struct regulator_init_data cam_i_core_reg_init_data = { | ||
835 | .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS }, | ||
836 | .num_consumer_supplies = 1, | ||
837 | .consumer_supplies = &cam_i_core_supply, | ||
838 | }; | ||
839 | |||
840 | static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = { | ||
841 | .supply_name = "CAM_I_CORE_1.2V", | ||
842 | .microvolts = 1200000, | ||
843 | .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */ | ||
844 | .enable_high = 1, | ||
845 | .init_data = &cam_i_core_reg_init_data, | ||
846 | }; | ||
847 | |||
848 | static struct platform_device cam_i_core_fixed_reg_dev = { | ||
849 | .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE, | ||
850 | .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg }, | ||
851 | }; | ||
852 | |||
853 | static struct regulator_consumer_supply cam_s_if_supply = | ||
854 | REGULATOR_SUPPLY("d_sensor", "0-001f"); | ||
855 | |||
856 | static struct regulator_init_data cam_s_if_reg_init_data = { | ||
857 | .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS }, | ||
858 | .num_consumer_supplies = 1, | ||
859 | .consumer_supplies = &cam_s_if_supply, | ||
860 | }; | ||
861 | |||
862 | static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = { | ||
863 | .supply_name = "CAM_S_IF_1.8V", | ||
864 | .microvolts = 1800000, | ||
865 | .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */ | ||
866 | .enable_high = 1, | ||
867 | .init_data = &cam_s_if_reg_init_data, | ||
868 | }; | ||
869 | |||
870 | static struct platform_device cam_s_if_fixed_reg_dev = { | ||
871 | .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF, | ||
872 | .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg }, | ||
873 | }; | ||
874 | |||
875 | static struct s5p_platform_mipi_csis mipi_csis_platdata = { | ||
876 | .clk_rate = 166000000UL, | ||
877 | .lanes = 2, | ||
878 | .alignment = 32, | ||
879 | .hs_settle = 12, | ||
880 | .phy_enable = s5p_csis_phy_enable, | ||
881 | }; | ||
882 | |||
883 | #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3) | ||
884 | #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */ | ||
885 | #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5) | ||
886 | |||
887 | static int m5mols_set_power(struct device *dev, int on) | ||
888 | { | ||
889 | gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on); | ||
890 | gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on); | ||
891 | return 0; | ||
892 | } | ||
893 | |||
894 | static struct m5mols_platform_data m5mols_platdata = { | ||
895 | .gpio_reset = GPIO_CAM_MEGA_nRST, | ||
896 | .reset_polarity = 0, | ||
897 | .set_power = m5mols_set_power, | ||
898 | }; | ||
899 | |||
900 | static struct i2c_board_info m5mols_board_info = { | ||
901 | I2C_BOARD_INFO("M5MOLS", 0x1F), | ||
902 | .platform_data = &m5mols_platdata, | ||
903 | }; | ||
904 | |||
905 | static struct s5p_fimc_isp_info universal_camera_sensors[] = { | ||
906 | { | ||
907 | .mux_id = 0, | ||
908 | .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | | ||
909 | V4L2_MBUS_VSYNC_ACTIVE_LOW, | ||
910 | .bus_type = FIMC_MIPI_CSI2, | ||
911 | .board_info = &m5mols_board_info, | ||
912 | .i2c_bus_num = 0, | ||
913 | .clk_frequency = 21600000UL, | ||
914 | .csi_data_align = 32, | ||
915 | }, | ||
916 | }; | ||
917 | |||
918 | static struct s5p_platform_fimc fimc_md_platdata = { | ||
919 | .isp_info = universal_camera_sensors, | ||
920 | .num_clients = ARRAY_SIZE(universal_camera_sensors), | ||
921 | }; | ||
922 | |||
923 | static struct gpio universal_camera_gpios[] = { | ||
924 | { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" }, | ||
925 | { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" }, | ||
926 | { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" }, | ||
927 | { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" }, | ||
928 | }; | ||
929 | |||
930 | static void universal_camera_init(void) | ||
931 | { | ||
932 | s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata), | ||
933 | &s5p_device_mipi_csis0); | ||
934 | s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata), | ||
935 | &s5p_device_fimc_md); | ||
936 | |||
937 | if (gpio_request_array(universal_camera_gpios, | ||
938 | ARRAY_SIZE(universal_camera_gpios))) { | ||
939 | pr_err("%s: GPIO request failed\n", __func__); | ||
940 | return; | ||
941 | } | ||
942 | |||
943 | if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf))) | ||
944 | m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT); | ||
945 | else | ||
946 | pr_err("Failed to configure 8M_ISP_INT GPIO\n"); | ||
947 | |||
948 | /* Free GPIOs controlled directly by the sensor drivers. */ | ||
949 | gpio_free(GPIO_CAM_MEGA_nRST); | ||
950 | gpio_free(GPIO_CAM_8M_ISP_INT); | ||
951 | |||
952 | if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A)) | ||
953 | pr_err("Camera port A setup failed\n"); | ||
954 | } | ||
955 | |||
705 | static struct platform_device *universal_devices[] __initdata = { | 956 | static struct platform_device *universal_devices[] __initdata = { |
706 | /* Samsung Platform Devices */ | 957 | /* Samsung Platform Devices */ |
958 | &s5p_device_mipi_csis0, | ||
707 | &s5p_device_fimc0, | 959 | &s5p_device_fimc0, |
708 | &s5p_device_fimc1, | 960 | &s5p_device_fimc1, |
709 | &s5p_device_fimc2, | 961 | &s5p_device_fimc2, |
@@ -712,17 +964,30 @@ static struct platform_device *universal_devices[] __initdata = { | |||
712 | &s3c_device_hsmmc0, | 964 | &s3c_device_hsmmc0, |
713 | &s3c_device_hsmmc2, | 965 | &s3c_device_hsmmc2, |
714 | &s3c_device_hsmmc3, | 966 | &s3c_device_hsmmc3, |
967 | &s3c_device_i2c0, | ||
715 | &s3c_device_i2c3, | 968 | &s3c_device_i2c3, |
716 | &s3c_device_i2c5, | 969 | &s3c_device_i2c5, |
970 | &s5p_device_i2c_hdmiphy, | ||
971 | &hdmi_fixed_voltage, | ||
972 | &exynos4_device_pd[PD_TV], | ||
973 | &s5p_device_hdmi, | ||
974 | &s5p_device_sdo, | ||
975 | &s5p_device_mixer, | ||
717 | 976 | ||
718 | /* Universal Devices */ | 977 | /* Universal Devices */ |
719 | &i2c_gpio12, | 978 | &i2c_gpio12, |
720 | &universal_gpio_keys, | 979 | &universal_gpio_keys, |
721 | &s5p_device_onenand, | 980 | &s5p_device_onenand, |
981 | &s5p_device_fimd0, | ||
722 | &s5p_device_mfc, | 982 | &s5p_device_mfc, |
723 | &s5p_device_mfc_l, | 983 | &s5p_device_mfc_l, |
724 | &s5p_device_mfc_r, | 984 | &s5p_device_mfc_r, |
725 | &exynos4_device_pd[PD_MFC], | 985 | &exynos4_device_pd[PD_MFC], |
986 | &exynos4_device_pd[PD_LCD0], | ||
987 | &exynos4_device_pd[PD_CAM], | ||
988 | &cam_i_core_fixed_reg_dev, | ||
989 | &cam_s_if_fixed_reg_dev, | ||
990 | &s5p_device_fimc_md, | ||
726 | }; | 991 | }; |
727 | 992 | ||
728 | static void __init universal_map_io(void) | 993 | static void __init universal_map_io(void) |
@@ -732,6 +997,20 @@ static void __init universal_map_io(void) | |||
732 | s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); | 997 | s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); |
733 | } | 998 | } |
734 | 999 | ||
1000 | void s5p_tv_setup(void) | ||
1001 | { | ||
1002 | /* direct HPD to HDMI chip */ | ||
1003 | gpio_request(EXYNOS4_GPX3(7), "hpd-plug"); | ||
1004 | |||
1005 | gpio_direction_input(EXYNOS4_GPX3(7)); | ||
1006 | s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); | ||
1007 | s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); | ||
1008 | |||
1009 | /* setup dependencies between TV devices */ | ||
1010 | s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev; | ||
1011 | s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev; | ||
1012 | } | ||
1013 | |||
735 | static void __init universal_reserve(void) | 1014 | static void __init universal_reserve(void) |
736 | { | 1015 | { |
737 | s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); | 1016 | s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); |
@@ -740,8 +1019,9 @@ static void __init universal_reserve(void) | |||
740 | static void __init universal_machine_init(void) | 1019 | static void __init universal_machine_init(void) |
741 | { | 1020 | { |
742 | universal_sdhci_init(); | 1021 | universal_sdhci_init(); |
1022 | s5p_tv_setup(); | ||
743 | 1023 | ||
744 | i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs)); | 1024 | s3c_i2c0_set_platdata(&universal_i2c0_platdata); |
745 | i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); | 1025 | i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); |
746 | 1026 | ||
747 | universal_tsp_init(); | 1027 | universal_tsp_init(); |
@@ -749,15 +1029,28 @@ static void __init universal_machine_init(void) | |||
749 | i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs)); | 1029 | i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs)); |
750 | 1030 | ||
751 | s3c_i2c5_set_platdata(NULL); | 1031 | s3c_i2c5_set_platdata(NULL); |
1032 | s5p_i2c_hdmiphy_set_platdata(NULL); | ||
752 | i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); | 1033 | i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); |
753 | 1034 | ||
1035 | s5p_fimd0_set_platdata(&universal_lcd_pdata); | ||
1036 | |||
754 | universal_touchkey_init(); | 1037 | universal_touchkey_init(); |
755 | i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs, | 1038 | i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs, |
756 | ARRAY_SIZE(i2c_gpio12_devs)); | 1039 | ARRAY_SIZE(i2c_gpio12_devs)); |
757 | 1040 | ||
1041 | universal_camera_init(); | ||
1042 | |||
758 | /* Last */ | 1043 | /* Last */ |
759 | platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices)); | 1044 | platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices)); |
1045 | |||
760 | s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; | 1046 | s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; |
1047 | s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev; | ||
1048 | |||
1049 | s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1050 | s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1051 | s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1052 | s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
1053 | s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev; | ||
761 | } | 1054 | } |
762 | 1055 | ||
763 | MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") | 1056 | MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") |
diff --git a/arch/arm/mach-exynos4/mct.c b/arch/arm/mach-exynos/mct.c index f191608b28d..97343df8f13 100644 --- a/arch/arm/mach-exynos4/mct.c +++ b/arch/arm/mach-exynos/mct.c | |||
@@ -44,7 +44,7 @@ struct mct_clock_event_device { | |||
44 | char name[10]; | 44 | char name[10]; |
45 | }; | 45 | }; |
46 | 46 | ||
47 | struct mct_clock_event_device mct_tick[NR_CPUS]; | 47 | static DEFINE_PER_CPU(struct mct_clock_event_device, percpu_mct_tick); |
48 | 48 | ||
49 | static void exynos4_mct_write(unsigned int value, void *addr) | 49 | static void exynos4_mct_write(unsigned int value, void *addr) |
50 | { | 50 | { |
@@ -302,7 +302,7 @@ static void exynos4_mct_tick_start(unsigned long cycles, | |||
302 | static int exynos4_tick_set_next_event(unsigned long cycles, | 302 | static int exynos4_tick_set_next_event(unsigned long cycles, |
303 | struct clock_event_device *evt) | 303 | struct clock_event_device *evt) |
304 | { | 304 | { |
305 | struct mct_clock_event_device *mevt = &mct_tick[smp_processor_id()]; | 305 | struct mct_clock_event_device *mevt = this_cpu_ptr(&percpu_mct_tick); |
306 | 306 | ||
307 | exynos4_mct_tick_start(cycles, mevt); | 307 | exynos4_mct_tick_start(cycles, mevt); |
308 | 308 | ||
@@ -312,7 +312,7 @@ static int exynos4_tick_set_next_event(unsigned long cycles, | |||
312 | static inline void exynos4_tick_set_mode(enum clock_event_mode mode, | 312 | static inline void exynos4_tick_set_mode(enum clock_event_mode mode, |
313 | struct clock_event_device *evt) | 313 | struct clock_event_device *evt) |
314 | { | 314 | { |
315 | struct mct_clock_event_device *mevt = &mct_tick[smp_processor_id()]; | 315 | struct mct_clock_event_device *mevt = this_cpu_ptr(&percpu_mct_tick); |
316 | 316 | ||
317 | exynos4_mct_tick_stop(mevt); | 317 | exynos4_mct_tick_stop(mevt); |
318 | 318 | ||
@@ -376,14 +376,16 @@ static struct irqaction mct_tick1_event_irq = { | |||
376 | 376 | ||
377 | static void exynos4_mct_tick_init(struct clock_event_device *evt) | 377 | static void exynos4_mct_tick_init(struct clock_event_device *evt) |
378 | { | 378 | { |
379 | struct mct_clock_event_device *mevt; | ||
379 | unsigned int cpu = smp_processor_id(); | 380 | unsigned int cpu = smp_processor_id(); |
380 | 381 | ||
381 | mct_tick[cpu].evt = evt; | 382 | mevt = this_cpu_ptr(&percpu_mct_tick); |
383 | mevt->evt = evt; | ||
382 | 384 | ||
383 | mct_tick[cpu].base = EXYNOS4_MCT_L_BASE(cpu); | 385 | mevt->base = EXYNOS4_MCT_L_BASE(cpu); |
384 | sprintf(mct_tick[cpu].name, "mct_tick%d", cpu); | 386 | sprintf(mevt->name, "mct_tick%d", cpu); |
385 | 387 | ||
386 | evt->name = mct_tick[cpu].name; | 388 | evt->name = mevt->name; |
387 | evt->cpumask = cpumask_of(cpu); | 389 | evt->cpumask = cpumask_of(cpu); |
388 | evt->set_next_event = exynos4_tick_set_next_event; | 390 | evt->set_next_event = exynos4_tick_set_next_event; |
389 | evt->set_mode = exynos4_tick_set_mode; | 391 | evt->set_mode = exynos4_tick_set_mode; |
@@ -398,21 +400,21 @@ static void exynos4_mct_tick_init(struct clock_event_device *evt) | |||
398 | 400 | ||
399 | clockevents_register_device(evt); | 401 | clockevents_register_device(evt); |
400 | 402 | ||
401 | exynos4_mct_write(0x1, mct_tick[cpu].base + MCT_L_TCNTB_OFFSET); | 403 | exynos4_mct_write(0x1, mevt->base + MCT_L_TCNTB_OFFSET); |
402 | 404 | ||
403 | if (mct_int_type == MCT_INT_SPI) { | 405 | if (mct_int_type == MCT_INT_SPI) { |
404 | if (cpu == 0) { | 406 | if (cpu == 0) { |
405 | mct_tick0_event_irq.dev_id = &mct_tick[cpu]; | 407 | mct_tick0_event_irq.dev_id = mevt; |
406 | evt->irq = IRQ_MCT_L0; | 408 | evt->irq = IRQ_MCT_L0; |
407 | setup_irq(IRQ_MCT_L0, &mct_tick0_event_irq); | 409 | setup_irq(IRQ_MCT_L0, &mct_tick0_event_irq); |
408 | } else { | 410 | } else { |
409 | mct_tick1_event_irq.dev_id = &mct_tick[cpu]; | 411 | mct_tick1_event_irq.dev_id = mevt; |
410 | evt->irq = IRQ_MCT_L1; | 412 | evt->irq = IRQ_MCT_L1; |
411 | setup_irq(IRQ_MCT_L1, &mct_tick1_event_irq); | 413 | setup_irq(IRQ_MCT_L1, &mct_tick1_event_irq); |
412 | irq_set_affinity(IRQ_MCT_L1, cpumask_of(1)); | 414 | irq_set_affinity(IRQ_MCT_L1, cpumask_of(1)); |
413 | } | 415 | } |
414 | } else { | 416 | } else { |
415 | gic_enable_ppi(IRQ_MCT_LOCALTIMER); | 417 | enable_percpu_irq(IRQ_MCT_LOCALTIMER, 0); |
416 | } | 418 | } |
417 | } | 419 | } |
418 | 420 | ||
@@ -427,9 +429,11 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt) | |||
427 | void local_timer_stop(struct clock_event_device *evt) | 429 | void local_timer_stop(struct clock_event_device *evt) |
428 | { | 430 | { |
429 | evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); | 431 | evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); |
430 | disable_irq(evt->irq); | 432 | if (mct_int_type == MCT_INT_SPI) |
433 | disable_irq(evt->irq); | ||
434 | else | ||
435 | disable_percpu_irq(IRQ_MCT_LOCALTIMER); | ||
431 | } | 436 | } |
432 | |||
433 | #endif /* CONFIG_LOCAL_TIMERS */ | 437 | #endif /* CONFIG_LOCAL_TIMERS */ |
434 | 438 | ||
435 | static void __init exynos4_timer_resources(void) | 439 | static void __init exynos4_timer_resources(void) |
@@ -438,6 +442,16 @@ static void __init exynos4_timer_resources(void) | |||
438 | mct_clk = clk_get(NULL, "xtal"); | 442 | mct_clk = clk_get(NULL, "xtal"); |
439 | 443 | ||
440 | clk_rate = clk_get_rate(mct_clk); | 444 | clk_rate = clk_get_rate(mct_clk); |
445 | |||
446 | if (mct_int_type == MCT_INT_PPI) { | ||
447 | int err; | ||
448 | |||
449 | err = request_percpu_irq(IRQ_MCT_LOCALTIMER, | ||
450 | exynos4_mct_tick_isr, "MCT", | ||
451 | &percpu_mct_tick); | ||
452 | WARN(err, "MCT: can't request IRQ %d (%d)\n", | ||
453 | IRQ_MCT_LOCALTIMER, err); | ||
454 | } | ||
441 | } | 455 | } |
442 | 456 | ||
443 | static void __init exynos4_timer_init(void) | 457 | static void __init exynos4_timer_init(void) |
diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 05595407e9f..69ffb2fb387 100644 --- a/arch/arm/mach-exynos4/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c | |||
@@ -110,8 +110,6 @@ void __cpuinit platform_secondary_init(unsigned int cpu) | |||
110 | */ | 110 | */ |
111 | spin_lock(&boot_lock); | 111 | spin_lock(&boot_lock); |
112 | spin_unlock(&boot_lock); | 112 | spin_unlock(&boot_lock); |
113 | |||
114 | set_cpu_online(cpu, true); | ||
115 | } | 113 | } |
116 | 114 | ||
117 | int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) | 115 | int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) |
diff --git a/arch/arm/mach-exynos4/pm.c b/arch/arm/mach-exynos/pm.c index 62e4f436300..509a435afd4 100644 --- a/arch/arm/mach-exynos4/pm.c +++ b/arch/arm/mach-exynos/pm.c | |||
@@ -339,6 +339,13 @@ static int exynos4_pm_suspend(void) | |||
339 | tmp &= ~S5P_CENTRAL_LOWPWR_CFG; | 339 | tmp &= ~S5P_CENTRAL_LOWPWR_CFG; |
340 | __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); | 340 | __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); |
341 | 341 | ||
342 | if (soc_is_exynos4212()) { | ||
343 | tmp = __raw_readl(S5P_CENTRAL_SEQ_OPTION); | ||
344 | tmp &= ~(S5P_USE_STANDBYWFI_ISP_ARM | | ||
345 | S5P_USE_STANDBYWFE_ISP_ARM); | ||
346 | __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION); | ||
347 | } | ||
348 | |||
342 | /* Save Power control register */ | 349 | /* Save Power control register */ |
343 | asm ("mrc p15, 0, %0, c15, c0, 0" | 350 | asm ("mrc p15, 0, %0, c15, c0, 0" |
344 | : "=r" (tmp) : : "cc"); | 351 | : "=r" (tmp) : : "cc"); |
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c new file mode 100644 index 00000000000..bba48f5c3e8 --- /dev/null +++ b/arch/arm/mach-exynos/pmu.c | |||
@@ -0,0 +1,230 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/pmu.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * EXYNOS4210 - CPU PMU(Power Management Unit) support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/io.h> | ||
14 | #include <linux/kernel.h> | ||
15 | |||
16 | #include <mach/regs-clock.h> | ||
17 | #include <mach/pmu.h> | ||
18 | |||
19 | static struct exynos4_pmu_conf *exynos4_pmu_config; | ||
20 | |||
21 | static struct exynos4_pmu_conf exynos4210_pmu_config[] = { | ||
22 | /* { .reg = address, .val = { AFTR, LPA, SLEEP } */ | ||
23 | { S5P_ARM_CORE0_LOWPWR, { 0x0, 0x0, 0x2 } }, | ||
24 | { S5P_DIS_IRQ_CORE0, { 0x0, 0x0, 0x0 } }, | ||
25 | { S5P_DIS_IRQ_CENTRAL0, { 0x0, 0x0, 0x0 } }, | ||
26 | { S5P_ARM_CORE1_LOWPWR, { 0x0, 0x0, 0x2 } }, | ||
27 | { S5P_DIS_IRQ_CORE1, { 0x0, 0x0, 0x0 } }, | ||
28 | { S5P_DIS_IRQ_CENTRAL1, { 0x0, 0x0, 0x0 } }, | ||
29 | { S5P_ARM_COMMON_LOWPWR, { 0x0, 0x0, 0x2 } }, | ||
30 | { S5P_L2_0_LOWPWR, { 0x2, 0x2, 0x3 } }, | ||
31 | { S5P_L2_1_LOWPWR, { 0x2, 0x2, 0x3 } }, | ||
32 | { S5P_CMU_ACLKSTOP_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
33 | { S5P_CMU_SCLKSTOP_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
34 | { S5P_CMU_RESET_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
35 | { S5P_APLL_SYSCLK_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
36 | { S5P_MPLL_SYSCLK_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
37 | { S5P_VPLL_SYSCLK_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
38 | { S5P_EPLL_SYSCLK_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
39 | { S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
40 | { S5P_CMU_RESET_GPSALIVE_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
41 | { S5P_CMU_CLKSTOP_CAM_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
42 | { S5P_CMU_CLKSTOP_TV_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
43 | { S5P_CMU_CLKSTOP_MFC_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
44 | { S5P_CMU_CLKSTOP_G3D_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
45 | { S5P_CMU_CLKSTOP_LCD0_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
46 | { S5P_CMU_CLKSTOP_LCD1_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
47 | { S5P_CMU_CLKSTOP_MAUDIO_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
48 | { S5P_CMU_CLKSTOP_GPS_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
49 | { S5P_CMU_RESET_CAM_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
50 | { S5P_CMU_RESET_TV_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
51 | { S5P_CMU_RESET_MFC_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
52 | { S5P_CMU_RESET_G3D_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
53 | { S5P_CMU_RESET_LCD0_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
54 | { S5P_CMU_RESET_LCD1_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
55 | { S5P_CMU_RESET_MAUDIO_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
56 | { S5P_CMU_RESET_GPS_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
57 | { S5P_TOP_BUS_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
58 | { S5P_TOP_RETENTION_LOWPWR, { 0x1, 0x0, 0x1 } }, | ||
59 | { S5P_TOP_PWR_LOWPWR, { 0x3, 0x0, 0x3 } }, | ||
60 | { S5P_LOGIC_RESET_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
61 | { S5P_ONENAND_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
62 | { S5P_MODIMIF_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
63 | { S5P_G2D_ACP_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
64 | { S5P_USBOTG_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
65 | { S5P_HSMMC_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
66 | { S5P_CSSYS_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
67 | { S5P_SECSS_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
68 | { S5P_PCIE_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
69 | { S5P_SATA_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
70 | { S5P_PAD_RETENTION_DRAM_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
71 | { S5P_PAD_RETENTION_MAUDIO_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
72 | { S5P_PAD_RETENTION_GPIO_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
73 | { S5P_PAD_RETENTION_UART_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
74 | { S5P_PAD_RETENTION_MMCA_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
75 | { S5P_PAD_RETENTION_MMCB_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
76 | { S5P_PAD_RETENTION_EBIA_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
77 | { S5P_PAD_RETENTION_EBIB_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
78 | { S5P_PAD_RETENTION_ISOLATION_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
79 | { S5P_PAD_RETENTION_ALV_SEL_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
80 | { S5P_XUSBXTI_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
81 | { S5P_XXTI_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
82 | { S5P_EXT_REGULATOR_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
83 | { S5P_GPIO_MODE_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
84 | { S5P_GPIO_MODE_MAUDIO_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
85 | { S5P_CAM_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
86 | { S5P_TV_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
87 | { S5P_MFC_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
88 | { S5P_G3D_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
89 | { S5P_LCD0_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
90 | { S5P_LCD1_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
91 | { S5P_MAUDIO_LOWPWR, { 0x7, 0x7, 0x0 } }, | ||
92 | { S5P_GPS_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
93 | { S5P_GPS_ALIVE_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
94 | { PMU_TABLE_END,}, | ||
95 | }; | ||
96 | |||
97 | static struct exynos4_pmu_conf exynos4212_pmu_config[] = { | ||
98 | { S5P_ARM_CORE0_LOWPWR, { 0x0, 0x0, 0x2 } }, | ||
99 | { S5P_DIS_IRQ_CORE0, { 0x0, 0x0, 0x0 } }, | ||
100 | { S5P_DIS_IRQ_CENTRAL0, { 0x0, 0x0, 0x0 } }, | ||
101 | { S5P_ARM_CORE1_LOWPWR, { 0x0, 0x0, 0x2 } }, | ||
102 | { S5P_DIS_IRQ_CORE1, { 0x0, 0x0, 0x0 } }, | ||
103 | { S5P_DIS_IRQ_CENTRAL1, { 0x0, 0x0, 0x0 } }, | ||
104 | { S5P_ISP_ARM_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
105 | { S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR, { 0x0, 0x0, 0x0 } }, | ||
106 | { S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR, { 0x0, 0x0, 0x0 } }, | ||
107 | { S5P_ARM_COMMON_LOWPWR, { 0x0, 0x0, 0x2 } }, | ||
108 | { S5P_L2_0_LOWPWR, { 0x0, 0x0, 0x3 } }, | ||
109 | /* XXX_OPTION register should be set other field */ | ||
110 | { S5P_ARM_L2_0_OPTION, { 0x10, 0x10, 0x0 } }, | ||
111 | { S5P_L2_1_LOWPWR, { 0x0, 0x0, 0x3 } }, | ||
112 | { S5P_ARM_L2_1_OPTION, { 0x10, 0x10, 0x0 } }, | ||
113 | { S5P_CMU_ACLKSTOP_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
114 | { S5P_CMU_SCLKSTOP_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
115 | { S5P_CMU_RESET_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
116 | { S5P_DRAM_FREQ_DOWN_LOWPWR, { 0x1, 0x1, 0x1 } }, | ||
117 | { S5P_DDRPHY_DLLOFF_LOWPWR, { 0x1, 0x1, 0x1 } }, | ||
118 | { S5P_LPDDR_PHY_DLL_LOCK_LOWPWR, { 0x1, 0x1, 0x1 } }, | ||
119 | { S5P_CMU_ACLKSTOP_COREBLK_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
120 | { S5P_CMU_SCLKSTOP_COREBLK_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
121 | { S5P_CMU_RESET_COREBLK_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
122 | { S5P_APLL_SYSCLK_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
123 | { S5P_MPLL_SYSCLK_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
124 | { S5P_VPLL_SYSCLK_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
125 | { S5P_EPLL_SYSCLK_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
126 | { S5P_MPLLUSER_SYSCLK_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
127 | { S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
128 | { S5P_CMU_RESET_GPSALIVE_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
129 | { S5P_CMU_CLKSTOP_CAM_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
130 | { S5P_CMU_CLKSTOP_TV_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
131 | { S5P_CMU_CLKSTOP_MFC_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
132 | { S5P_CMU_CLKSTOP_G3D_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
133 | { S5P_CMU_CLKSTOP_LCD0_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
134 | { S5P_CMU_CLKSTOP_ISP_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
135 | { S5P_CMU_CLKSTOP_MAUDIO_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
136 | { S5P_CMU_CLKSTOP_GPS_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
137 | { S5P_CMU_RESET_CAM_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
138 | { S5P_CMU_RESET_TV_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
139 | { S5P_CMU_RESET_MFC_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
140 | { S5P_CMU_RESET_G3D_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
141 | { S5P_CMU_RESET_LCD0_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
142 | { S5P_CMU_RESET_ISP_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
143 | { S5P_CMU_RESET_MAUDIO_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
144 | { S5P_CMU_RESET_GPS_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
145 | { S5P_TOP_BUS_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
146 | { S5P_TOP_RETENTION_LOWPWR, { 0x1, 0x0, 0x1 } }, | ||
147 | { S5P_TOP_PWR_LOWPWR, { 0x3, 0x0, 0x3 } }, | ||
148 | { S5P_TOP_BUS_COREBLK_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
149 | { S5P_TOP_RETENTION_COREBLK_LOWPWR, { 0x1, 0x0, 0x1 } }, | ||
150 | { S5P_TOP_PWR_COREBLK_LOWPWR, { 0x3, 0x0, 0x3 } }, | ||
151 | { S5P_LOGIC_RESET_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
152 | { S5P_OSCCLK_GATE_LOWPWR, { 0x1, 0x0, 0x1 } }, | ||
153 | { S5P_LOGIC_RESET_COREBLK_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
154 | { S5P_OSCCLK_GATE_COREBLK_LOWPWR, { 0x1, 0x0, 0x1 } }, | ||
155 | { S5P_ONENAND_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
156 | { S5P_ONENAND_MEM_OPTION, { 0x10, 0x10, 0x0 } }, | ||
157 | { S5P_HSI_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
158 | { S5P_HSI_MEM_OPTION, { 0x10, 0x10, 0x0 } }, | ||
159 | { S5P_G2D_ACP_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
160 | { S5P_G2D_ACP_MEM_OPTION, { 0x10, 0x10, 0x0 } }, | ||
161 | { S5P_USBOTG_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
162 | { S5P_USBOTG_MEM_OPTION, { 0x10, 0x10, 0x0 } }, | ||
163 | { S5P_HSMMC_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
164 | { S5P_HSMMC_MEM_OPTION, { 0x10, 0x10, 0x0 } }, | ||
165 | { S5P_CSSYS_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
166 | { S5P_CSSYS_MEM_OPTION, { 0x10, 0x10, 0x0 } }, | ||
167 | { S5P_SECSS_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
168 | { S5P_SECSS_MEM_OPTION, { 0x10, 0x10, 0x0 } }, | ||
169 | { S5P_ROTATOR_MEM_LOWPWR, { 0x3, 0x0, 0x0 } }, | ||
170 | { S5P_ROTATOR_MEM_OPTION, { 0x10, 0x10, 0x0 } }, | ||
171 | { S5P_PAD_RETENTION_DRAM_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
172 | { S5P_PAD_RETENTION_MAUDIO_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
173 | { S5P_PAD_RETENTION_GPIO_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
174 | { S5P_PAD_RETENTION_UART_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
175 | { S5P_PAD_RETENTION_MMCA_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
176 | { S5P_PAD_RETENTION_MMCB_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
177 | { S5P_PAD_RETENTION_EBIA_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
178 | { S5P_PAD_RETENTION_EBIB_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
179 | { S5P_PAD_RETENTION_GPIO_COREBLK_LOWPWR,{ 0x1, 0x0, 0x0 } }, | ||
180 | { S5P_PAD_RETENTION_ISOLATION_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
181 | { S5P_PAD_ISOLATION_COREBLK_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
182 | { S5P_PAD_RETENTION_ALV_SEL_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
183 | { S5P_XUSBXTI_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
184 | { S5P_XXTI_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
185 | { S5P_EXT_REGULATOR_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
186 | { S5P_GPIO_MODE_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
187 | { S5P_GPIO_MODE_COREBLK_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
188 | { S5P_GPIO_MODE_MAUDIO_LOWPWR, { 0x1, 0x1, 0x0 } }, | ||
189 | { S5P_TOP_ASB_RESET_LOWPWR, { 0x1, 0x1, 0x1 } }, | ||
190 | { S5P_TOP_ASB_ISOLATION_LOWPWR, { 0x1, 0x0, 0x1 } }, | ||
191 | { S5P_CAM_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
192 | { S5P_TV_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
193 | { S5P_MFC_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
194 | { S5P_G3D_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
195 | { S5P_LCD0_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
196 | { S5P_ISP_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
197 | { S5P_MAUDIO_LOWPWR, { 0x7, 0x7, 0x0 } }, | ||
198 | { S5P_GPS_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
199 | { S5P_GPS_ALIVE_LOWPWR, { 0x7, 0x0, 0x0 } }, | ||
200 | { S5P_CMU_SYSCLK_ISP_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
201 | { S5P_CMU_SYSCLK_GPS_LOWPWR, { 0x1, 0x0, 0x0 } }, | ||
202 | { PMU_TABLE_END,}, | ||
203 | }; | ||
204 | |||
205 | void exynos4_sys_powerdown_conf(enum sys_powerdown mode) | ||
206 | { | ||
207 | unsigned int i; | ||
208 | |||
209 | for (i = 0; (exynos4_pmu_config[i].reg != PMU_TABLE_END) ; i++) | ||
210 | __raw_writel(exynos4_pmu_config[i].val[mode], | ||
211 | exynos4_pmu_config[i].reg); | ||
212 | } | ||
213 | |||
214 | static int __init exynos4_pmu_init(void) | ||
215 | { | ||
216 | exynos4_pmu_config = exynos4210_pmu_config; | ||
217 | |||
218 | if (soc_is_exynos4210()) { | ||
219 | exynos4_pmu_config = exynos4210_pmu_config; | ||
220 | pr_info("EXYNOS4210 PMU Initialize\n"); | ||
221 | } else if (soc_is_exynos4212()) { | ||
222 | exynos4_pmu_config = exynos4212_pmu_config; | ||
223 | pr_info("EXYNOS4212 PMU Initialize\n"); | ||
224 | } else { | ||
225 | pr_info("EXYNOS4: PMU not supported\n"); | ||
226 | } | ||
227 | |||
228 | return 0; | ||
229 | } | ||
230 | arch_initcall(exynos4_pmu_init); | ||
diff --git a/arch/arm/mach-exynos4/setup-fimc.c b/arch/arm/mach-exynos/setup-fimc.c index 6a45078d9d1..6a45078d9d1 100644 --- a/arch/arm/mach-exynos4/setup-fimc.c +++ b/arch/arm/mach-exynos/setup-fimc.c | |||
diff --git a/arch/arm/mach-exynos4/setup-fimd0.c b/arch/arm/mach-exynos/setup-fimd0.c index 07a6dbeecdd..07a6dbeecdd 100644 --- a/arch/arm/mach-exynos4/setup-fimd0.c +++ b/arch/arm/mach-exynos/setup-fimd0.c | |||
diff --git a/arch/arm/mach-exynos4/setup-i2c0.c b/arch/arm/mach-exynos/setup-i2c0.c index d395bd17c38..d395bd17c38 100644 --- a/arch/arm/mach-exynos4/setup-i2c0.c +++ b/arch/arm/mach-exynos/setup-i2c0.c | |||
diff --git a/arch/arm/mach-exynos4/setup-i2c1.c b/arch/arm/mach-exynos/setup-i2c1.c index fd7235a43f6..fd7235a43f6 100644 --- a/arch/arm/mach-exynos4/setup-i2c1.c +++ b/arch/arm/mach-exynos/setup-i2c1.c | |||
diff --git a/arch/arm/mach-exynos4/setup-i2c2.c b/arch/arm/mach-exynos/setup-i2c2.c index 2694b19e8b3..2694b19e8b3 100644 --- a/arch/arm/mach-exynos4/setup-i2c2.c +++ b/arch/arm/mach-exynos/setup-i2c2.c | |||
diff --git a/arch/arm/mach-exynos4/setup-i2c3.c b/arch/arm/mach-exynos/setup-i2c3.c index 379bd306993..379bd306993 100644 --- a/arch/arm/mach-exynos4/setup-i2c3.c +++ b/arch/arm/mach-exynos/setup-i2c3.c | |||
diff --git a/arch/arm/mach-exynos4/setup-i2c4.c b/arch/arm/mach-exynos/setup-i2c4.c index 9f3c04855b7..9f3c04855b7 100644 --- a/arch/arm/mach-exynos4/setup-i2c4.c +++ b/arch/arm/mach-exynos/setup-i2c4.c | |||
diff --git a/arch/arm/mach-exynos4/setup-i2c5.c b/arch/arm/mach-exynos/setup-i2c5.c index 77e1a1e57c7..77e1a1e57c7 100644 --- a/arch/arm/mach-exynos4/setup-i2c5.c +++ b/arch/arm/mach-exynos/setup-i2c5.c | |||
diff --git a/arch/arm/mach-exynos4/setup-i2c6.c b/arch/arm/mach-exynos/setup-i2c6.c index 284d12b7af0..284d12b7af0 100644 --- a/arch/arm/mach-exynos4/setup-i2c6.c +++ b/arch/arm/mach-exynos/setup-i2c6.c | |||
diff --git a/arch/arm/mach-exynos4/setup-i2c7.c b/arch/arm/mach-exynos/setup-i2c7.c index b7611ee359a..b7611ee359a 100644 --- a/arch/arm/mach-exynos4/setup-i2c7.c +++ b/arch/arm/mach-exynos/setup-i2c7.c | |||
diff --git a/arch/arm/mach-exynos4/setup-keypad.c b/arch/arm/mach-exynos/setup-keypad.c index 7862bfb5933..7862bfb5933 100644 --- a/arch/arm/mach-exynos4/setup-keypad.c +++ b/arch/arm/mach-exynos/setup-keypad.c | |||
diff --git a/arch/arm/mach-exynos4/setup-sdhci-gpio.c b/arch/arm/mach-exynos/setup-sdhci-gpio.c index e8d08bf8965..e8d08bf8965 100644 --- a/arch/arm/mach-exynos4/setup-sdhci-gpio.c +++ b/arch/arm/mach-exynos/setup-sdhci-gpio.c | |||
diff --git a/arch/arm/mach-exynos/setup-sdhci.c b/arch/arm/mach-exynos/setup-sdhci.c new file mode 100644 index 00000000000..92937b41090 --- /dev/null +++ b/arch/arm/mach-exynos/setup-sdhci.c | |||
@@ -0,0 +1,22 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/setup-sdhci.c | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * EXYNOS4 - Helper functions for settign up SDHCI device(s) (HSMMC) | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/types.h> | ||
14 | |||
15 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | ||
16 | |||
17 | char *exynos4_hsmmc_clksrcs[4] = { | ||
18 | [0] = NULL, | ||
19 | [1] = NULL, | ||
20 | [2] = "sclk_mmc", /* mmc_bus */ | ||
21 | [3] = NULL, | ||
22 | }; | ||
diff --git a/arch/arm/mach-exynos4/setup-usb-phy.c b/arch/arm/mach-exynos/setup-usb-phy.c index 39aca045f66..39aca045f66 100644 --- a/arch/arm/mach-exynos4/setup-usb-phy.c +++ b/arch/arm/mach-exynos/setup-usb-phy.c | |||
diff --git a/arch/arm/mach-exynos4/dma.c b/arch/arm/mach-exynos4/dma.c deleted file mode 100644 index 564bb530f33..00000000000 --- a/arch/arm/mach-exynos4/dma.c +++ /dev/null | |||
@@ -1,172 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/dma.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
7 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
22 | */ | ||
23 | |||
24 | #include <linux/platform_device.h> | ||
25 | #include <linux/dma-mapping.h> | ||
26 | |||
27 | #include <plat/devs.h> | ||
28 | #include <plat/irqs.h> | ||
29 | |||
30 | #include <mach/map.h> | ||
31 | #include <mach/irqs.h> | ||
32 | |||
33 | #include <plat/s3c-pl330-pdata.h> | ||
34 | |||
35 | static u64 dma_dmamask = DMA_BIT_MASK(32); | ||
36 | |||
37 | static struct resource exynos4_pdma0_resource[] = { | ||
38 | [0] = { | ||
39 | .start = EXYNOS4_PA_PDMA0, | ||
40 | .end = EXYNOS4_PA_PDMA0 + SZ_4K, | ||
41 | .flags = IORESOURCE_MEM, | ||
42 | }, | ||
43 | [1] = { | ||
44 | .start = IRQ_PDMA0, | ||
45 | .end = IRQ_PDMA0, | ||
46 | .flags = IORESOURCE_IRQ, | ||
47 | }, | ||
48 | }; | ||
49 | |||
50 | static struct s3c_pl330_platdata exynos4_pdma0_pdata = { | ||
51 | .peri = { | ||
52 | [0] = DMACH_PCM0_RX, | ||
53 | [1] = DMACH_PCM0_TX, | ||
54 | [2] = DMACH_PCM2_RX, | ||
55 | [3] = DMACH_PCM2_TX, | ||
56 | [4] = DMACH_MSM_REQ0, | ||
57 | [5] = DMACH_MSM_REQ2, | ||
58 | [6] = DMACH_SPI0_RX, | ||
59 | [7] = DMACH_SPI0_TX, | ||
60 | [8] = DMACH_SPI2_RX, | ||
61 | [9] = DMACH_SPI2_TX, | ||
62 | [10] = DMACH_I2S0S_TX, | ||
63 | [11] = DMACH_I2S0_RX, | ||
64 | [12] = DMACH_I2S0_TX, | ||
65 | [13] = DMACH_I2S2_RX, | ||
66 | [14] = DMACH_I2S2_TX, | ||
67 | [15] = DMACH_UART0_RX, | ||
68 | [16] = DMACH_UART0_TX, | ||
69 | [17] = DMACH_UART2_RX, | ||
70 | [18] = DMACH_UART2_TX, | ||
71 | [19] = DMACH_UART4_RX, | ||
72 | [20] = DMACH_UART4_TX, | ||
73 | [21] = DMACH_SLIMBUS0_RX, | ||
74 | [22] = DMACH_SLIMBUS0_TX, | ||
75 | [23] = DMACH_SLIMBUS2_RX, | ||
76 | [24] = DMACH_SLIMBUS2_TX, | ||
77 | [25] = DMACH_SLIMBUS4_RX, | ||
78 | [26] = DMACH_SLIMBUS4_TX, | ||
79 | [27] = DMACH_AC97_MICIN, | ||
80 | [28] = DMACH_AC97_PCMIN, | ||
81 | [29] = DMACH_AC97_PCMOUT, | ||
82 | [30] = DMACH_MAX, | ||
83 | [31] = DMACH_MAX, | ||
84 | }, | ||
85 | }; | ||
86 | |||
87 | static struct platform_device exynos4_device_pdma0 = { | ||
88 | .name = "s3c-pl330", | ||
89 | .id = 0, | ||
90 | .num_resources = ARRAY_SIZE(exynos4_pdma0_resource), | ||
91 | .resource = exynos4_pdma0_resource, | ||
92 | .dev = { | ||
93 | .dma_mask = &dma_dmamask, | ||
94 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
95 | .platform_data = &exynos4_pdma0_pdata, | ||
96 | }, | ||
97 | }; | ||
98 | |||
99 | static struct resource exynos4_pdma1_resource[] = { | ||
100 | [0] = { | ||
101 | .start = EXYNOS4_PA_PDMA1, | ||
102 | .end = EXYNOS4_PA_PDMA1 + SZ_4K, | ||
103 | .flags = IORESOURCE_MEM, | ||
104 | }, | ||
105 | [1] = { | ||
106 | .start = IRQ_PDMA1, | ||
107 | .end = IRQ_PDMA1, | ||
108 | .flags = IORESOURCE_IRQ, | ||
109 | }, | ||
110 | }; | ||
111 | |||
112 | static struct s3c_pl330_platdata exynos4_pdma1_pdata = { | ||
113 | .peri = { | ||
114 | [0] = DMACH_PCM0_RX, | ||
115 | [1] = DMACH_PCM0_TX, | ||
116 | [2] = DMACH_PCM1_RX, | ||
117 | [3] = DMACH_PCM1_TX, | ||
118 | [4] = DMACH_MSM_REQ1, | ||
119 | [5] = DMACH_MSM_REQ3, | ||
120 | [6] = DMACH_SPI1_RX, | ||
121 | [7] = DMACH_SPI1_TX, | ||
122 | [8] = DMACH_I2S0S_TX, | ||
123 | [9] = DMACH_I2S0_RX, | ||
124 | [10] = DMACH_I2S0_TX, | ||
125 | [11] = DMACH_I2S1_RX, | ||
126 | [12] = DMACH_I2S1_TX, | ||
127 | [13] = DMACH_UART0_RX, | ||
128 | [14] = DMACH_UART0_TX, | ||
129 | [15] = DMACH_UART1_RX, | ||
130 | [16] = DMACH_UART1_TX, | ||
131 | [17] = DMACH_UART3_RX, | ||
132 | [18] = DMACH_UART3_TX, | ||
133 | [19] = DMACH_SLIMBUS1_RX, | ||
134 | [20] = DMACH_SLIMBUS1_TX, | ||
135 | [21] = DMACH_SLIMBUS3_RX, | ||
136 | [22] = DMACH_SLIMBUS3_TX, | ||
137 | [23] = DMACH_SLIMBUS5_RX, | ||
138 | [24] = DMACH_SLIMBUS5_TX, | ||
139 | [25] = DMACH_SLIMBUS0AUX_RX, | ||
140 | [26] = DMACH_SLIMBUS0AUX_TX, | ||
141 | [27] = DMACH_SPDIF, | ||
142 | [28] = DMACH_MAX, | ||
143 | [29] = DMACH_MAX, | ||
144 | [30] = DMACH_MAX, | ||
145 | [31] = DMACH_MAX, | ||
146 | }, | ||
147 | }; | ||
148 | |||
149 | static struct platform_device exynos4_device_pdma1 = { | ||
150 | .name = "s3c-pl330", | ||
151 | .id = 1, | ||
152 | .num_resources = ARRAY_SIZE(exynos4_pdma1_resource), | ||
153 | .resource = exynos4_pdma1_resource, | ||
154 | .dev = { | ||
155 | .dma_mask = &dma_dmamask, | ||
156 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
157 | .platform_data = &exynos4_pdma1_pdata, | ||
158 | }, | ||
159 | }; | ||
160 | |||
161 | static struct platform_device *exynos4_dmacs[] __initdata = { | ||
162 | &exynos4_device_pdma0, | ||
163 | &exynos4_device_pdma1, | ||
164 | }; | ||
165 | |||
166 | static int __init exynos4_dma_init(void) | ||
167 | { | ||
168 | platform_add_devices(exynos4_dmacs, ARRAY_SIZE(exynos4_dmacs)); | ||
169 | |||
170 | return 0; | ||
171 | } | ||
172 | arch_initcall(exynos4_dma_init); | ||
diff --git a/arch/arm/mach-exynos4/include/mach/clkdev.h b/arch/arm/mach-exynos4/include/mach/clkdev.h deleted file mode 100644 index 7dffa83d23f..00000000000 --- a/arch/arm/mach-exynos4/include/mach/clkdev.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __MACH_CLKDEV_H__ | ||
2 | #define __MACH_CLKDEV_H__ | ||
3 | |||
4 | #define __clk_get(clk) ({ 1; }) | ||
5 | #define __clk_put(clk) do {} while (0) | ||
6 | |||
7 | #endif | ||
diff --git a/arch/arm/mach-exynos4/mach-origen.c b/arch/arm/mach-exynos4/mach-origen.c deleted file mode 100644 index b5f6f38557c..00000000000 --- a/arch/arm/mach-exynos4/mach-origen.c +++ /dev/null | |||
@@ -1,108 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/mach-origen.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Insignal Co., Ltd. | ||
4 | * http://www.insignal.co.kr/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/serial_core.h> | ||
12 | #include <linux/gpio.h> | ||
13 | #include <linux/mmc/host.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <linux/input.h> | ||
17 | |||
18 | #include <asm/mach/arch.h> | ||
19 | #include <asm/mach-types.h> | ||
20 | |||
21 | #include <plat/regs-serial.h> | ||
22 | #include <plat/exynos4.h> | ||
23 | #include <plat/cpu.h> | ||
24 | #include <plat/devs.h> | ||
25 | #include <plat/sdhci.h> | ||
26 | #include <plat/iic.h> | ||
27 | |||
28 | #include <mach/map.h> | ||
29 | |||
30 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
31 | #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
32 | S3C2410_UCON_RXILEVEL | \ | ||
33 | S3C2410_UCON_TXIRQMODE | \ | ||
34 | S3C2410_UCON_RXIRQMODE | \ | ||
35 | S3C2410_UCON_RXFIFO_TOI | \ | ||
36 | S3C2443_UCON_RXERR_IRQEN) | ||
37 | |||
38 | #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
39 | |||
40 | #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
41 | S5PV210_UFCON_TXTRIG4 | \ | ||
42 | S5PV210_UFCON_RXTRIG4) | ||
43 | |||
44 | static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = { | ||
45 | [0] = { | ||
46 | .hwport = 0, | ||
47 | .flags = 0, | ||
48 | .ucon = ORIGEN_UCON_DEFAULT, | ||
49 | .ulcon = ORIGEN_ULCON_DEFAULT, | ||
50 | .ufcon = ORIGEN_UFCON_DEFAULT, | ||
51 | }, | ||
52 | [1] = { | ||
53 | .hwport = 1, | ||
54 | .flags = 0, | ||
55 | .ucon = ORIGEN_UCON_DEFAULT, | ||
56 | .ulcon = ORIGEN_ULCON_DEFAULT, | ||
57 | .ufcon = ORIGEN_UFCON_DEFAULT, | ||
58 | }, | ||
59 | [2] = { | ||
60 | .hwport = 2, | ||
61 | .flags = 0, | ||
62 | .ucon = ORIGEN_UCON_DEFAULT, | ||
63 | .ulcon = ORIGEN_ULCON_DEFAULT, | ||
64 | .ufcon = ORIGEN_UFCON_DEFAULT, | ||
65 | }, | ||
66 | [3] = { | ||
67 | .hwport = 3, | ||
68 | .flags = 0, | ||
69 | .ucon = ORIGEN_UCON_DEFAULT, | ||
70 | .ulcon = ORIGEN_ULCON_DEFAULT, | ||
71 | .ufcon = ORIGEN_UFCON_DEFAULT, | ||
72 | }, | ||
73 | }; | ||
74 | |||
75 | static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = { | ||
76 | .cd_type = S3C_SDHCI_CD_GPIO, | ||
77 | .ext_cd_gpio = EXYNOS4_GPK2(2), | ||
78 | .ext_cd_gpio_invert = 1, | ||
79 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
80 | }; | ||
81 | |||
82 | static struct platform_device *origen_devices[] __initdata = { | ||
83 | &s3c_device_hsmmc2, | ||
84 | &s3c_device_rtc, | ||
85 | &s3c_device_wdt, | ||
86 | }; | ||
87 | |||
88 | static void __init origen_map_io(void) | ||
89 | { | ||
90 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
91 | s3c24xx_init_clocks(24000000); | ||
92 | s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs)); | ||
93 | } | ||
94 | |||
95 | static void __init origen_machine_init(void) | ||
96 | { | ||
97 | s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata); | ||
98 | platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices)); | ||
99 | } | ||
100 | |||
101 | MACHINE_START(ORIGEN, "ORIGEN") | ||
102 | /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */ | ||
103 | .atag_offset = 0x100, | ||
104 | .init_irq = exynos4_init_irq, | ||
105 | .map_io = origen_map_io, | ||
106 | .init_machine = origen_machine_init, | ||
107 | .timer = &exynos4_timer, | ||
108 | MACHINE_END | ||
diff --git a/arch/arm/mach-exynos4/pmu.c b/arch/arm/mach-exynos4/pmu.c deleted file mode 100644 index 7ea9eb2a20d..00000000000 --- a/arch/arm/mach-exynos4/pmu.c +++ /dev/null | |||
@@ -1,175 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/pmu.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * EXYNOS4210 - CPU PMU(Power Management Unit) support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/io.h> | ||
14 | #include <linux/kernel.h> | ||
15 | |||
16 | #include <mach/regs-clock.h> | ||
17 | #include <mach/pmu.h> | ||
18 | |||
19 | static void __iomem *sys_powerdown_reg[] = { | ||
20 | S5P_ARM_CORE0_LOWPWR, | ||
21 | S5P_DIS_IRQ_CORE0, | ||
22 | S5P_DIS_IRQ_CENTRAL0, | ||
23 | S5P_ARM_CORE1_LOWPWR, | ||
24 | S5P_DIS_IRQ_CORE1, | ||
25 | S5P_DIS_IRQ_CENTRAL1, | ||
26 | S5P_ARM_COMMON_LOWPWR, | ||
27 | S5P_L2_0_LOWPWR, | ||
28 | S5P_L2_1_LOWPWR, | ||
29 | S5P_CMU_ACLKSTOP_LOWPWR, | ||
30 | S5P_CMU_SCLKSTOP_LOWPWR, | ||
31 | S5P_CMU_RESET_LOWPWR, | ||
32 | S5P_APLL_SYSCLK_LOWPWR, | ||
33 | S5P_MPLL_SYSCLK_LOWPWR, | ||
34 | S5P_VPLL_SYSCLK_LOWPWR, | ||
35 | S5P_EPLL_SYSCLK_LOWPWR, | ||
36 | S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR, | ||
37 | S5P_CMU_RESET_GPSALIVE_LOWPWR, | ||
38 | S5P_CMU_CLKSTOP_CAM_LOWPWR, | ||
39 | S5P_CMU_CLKSTOP_TV_LOWPWR, | ||
40 | S5P_CMU_CLKSTOP_MFC_LOWPWR, | ||
41 | S5P_CMU_CLKSTOP_G3D_LOWPWR, | ||
42 | S5P_CMU_CLKSTOP_LCD0_LOWPWR, | ||
43 | S5P_CMU_CLKSTOP_LCD1_LOWPWR, | ||
44 | S5P_CMU_CLKSTOP_MAUDIO_LOWPWR, | ||
45 | S5P_CMU_CLKSTOP_GPS_LOWPWR, | ||
46 | S5P_CMU_RESET_CAM_LOWPWR, | ||
47 | S5P_CMU_RESET_TV_LOWPWR, | ||
48 | S5P_CMU_RESET_MFC_LOWPWR, | ||
49 | S5P_CMU_RESET_G3D_LOWPWR, | ||
50 | S5P_CMU_RESET_LCD0_LOWPWR, | ||
51 | S5P_CMU_RESET_LCD1_LOWPWR, | ||
52 | S5P_CMU_RESET_MAUDIO_LOWPWR, | ||
53 | S5P_CMU_RESET_GPS_LOWPWR, | ||
54 | S5P_TOP_BUS_LOWPWR, | ||
55 | S5P_TOP_RETENTION_LOWPWR, | ||
56 | S5P_TOP_PWR_LOWPWR, | ||
57 | S5P_LOGIC_RESET_LOWPWR, | ||
58 | S5P_ONENAND_MEM_LOWPWR, | ||
59 | S5P_MODIMIF_MEM_LOWPWR, | ||
60 | S5P_G2D_ACP_MEM_LOWPWR, | ||
61 | S5P_USBOTG_MEM_LOWPWR, | ||
62 | S5P_HSMMC_MEM_LOWPWR, | ||
63 | S5P_CSSYS_MEM_LOWPWR, | ||
64 | S5P_SECSS_MEM_LOWPWR, | ||
65 | S5P_PCIE_MEM_LOWPWR, | ||
66 | S5P_SATA_MEM_LOWPWR, | ||
67 | S5P_PAD_RETENTION_DRAM_LOWPWR, | ||
68 | S5P_PAD_RETENTION_MAUDIO_LOWPWR, | ||
69 | S5P_PAD_RETENTION_GPIO_LOWPWR, | ||
70 | S5P_PAD_RETENTION_UART_LOWPWR, | ||
71 | S5P_PAD_RETENTION_MMCA_LOWPWR, | ||
72 | S5P_PAD_RETENTION_MMCB_LOWPWR, | ||
73 | S5P_PAD_RETENTION_EBIA_LOWPWR, | ||
74 | S5P_PAD_RETENTION_EBIB_LOWPWR, | ||
75 | S5P_PAD_RETENTION_ISOLATION_LOWPWR, | ||
76 | S5P_PAD_RETENTION_ALV_SEL_LOWPWR, | ||
77 | S5P_XUSBXTI_LOWPWR, | ||
78 | S5P_XXTI_LOWPWR, | ||
79 | S5P_EXT_REGULATOR_LOWPWR, | ||
80 | S5P_GPIO_MODE_LOWPWR, | ||
81 | S5P_GPIO_MODE_MAUDIO_LOWPWR, | ||
82 | S5P_CAM_LOWPWR, | ||
83 | S5P_TV_LOWPWR, | ||
84 | S5P_MFC_LOWPWR, | ||
85 | S5P_G3D_LOWPWR, | ||
86 | S5P_LCD0_LOWPWR, | ||
87 | S5P_LCD1_LOWPWR, | ||
88 | S5P_MAUDIO_LOWPWR, | ||
89 | S5P_GPS_LOWPWR, | ||
90 | S5P_GPS_ALIVE_LOWPWR, | ||
91 | }; | ||
92 | |||
93 | static const unsigned int sys_powerdown_val[][NUM_SYS_POWERDOWN] = { | ||
94 | /* { AFTR, LPA, SLEEP }*/ | ||
95 | { 0, 0, 2 }, /* ARM_CORE0 */ | ||
96 | { 0, 0, 0 }, /* ARM_DIS_IRQ_CORE0 */ | ||
97 | { 0, 0, 0 }, /* ARM_DIS_IRQ_CENTRAL0 */ | ||
98 | { 0, 0, 2 }, /* ARM_CORE1 */ | ||
99 | { 0, 0, 0 }, /* ARM_DIS_IRQ_CORE1 */ | ||
100 | { 0, 0, 0 }, /* ARM_DIS_IRQ_CENTRAL1 */ | ||
101 | { 0, 0, 2 }, /* ARM_COMMON */ | ||
102 | { 2, 2, 3 }, /* ARM_CPU_L2_0 */ | ||
103 | { 2, 2, 3 }, /* ARM_CPU_L2_1 */ | ||
104 | { 1, 0, 0 }, /* CMU_ACLKSTOP */ | ||
105 | { 1, 0, 0 }, /* CMU_SCLKSTOP */ | ||
106 | { 1, 1, 0 }, /* CMU_RESET */ | ||
107 | { 1, 0, 0 }, /* APLL_SYSCLK */ | ||
108 | { 1, 0, 0 }, /* MPLL_SYSCLK */ | ||
109 | { 1, 0, 0 }, /* VPLL_SYSCLK */ | ||
110 | { 1, 1, 0 }, /* EPLL_SYSCLK */ | ||
111 | { 1, 1, 0 }, /* CMU_CLKSTOP_GPS_ALIVE */ | ||
112 | { 1, 1, 0 }, /* CMU_RESET_GPS_ALIVE */ | ||
113 | { 1, 1, 0 }, /* CMU_CLKSTOP_CAM */ | ||
114 | { 1, 1, 0 }, /* CMU_CLKSTOP_TV */ | ||
115 | { 1, 1, 0 }, /* CMU_CLKSTOP_MFC */ | ||
116 | { 1, 1, 0 }, /* CMU_CLKSTOP_G3D */ | ||
117 | { 1, 1, 0 }, /* CMU_CLKSTOP_LCD0 */ | ||
118 | { 1, 1, 0 }, /* CMU_CLKSTOP_LCD1 */ | ||
119 | { 1, 1, 0 }, /* CMU_CLKSTOP_MAUDIO */ | ||
120 | { 1, 1, 0 }, /* CMU_CLKSTOP_GPS */ | ||
121 | { 1, 1, 0 }, /* CMU_RESET_CAM */ | ||
122 | { 1, 1, 0 }, /* CMU_RESET_TV */ | ||
123 | { 1, 1, 0 }, /* CMU_RESET_MFC */ | ||
124 | { 1, 1, 0 }, /* CMU_RESET_G3D */ | ||
125 | { 1, 1, 0 }, /* CMU_RESET_LCD0 */ | ||
126 | { 1, 1, 0 }, /* CMU_RESET_LCD1 */ | ||
127 | { 1, 1, 0 }, /* CMU_RESET_MAUDIO */ | ||
128 | { 1, 1, 0 }, /* CMU_RESET_GPS */ | ||
129 | { 3, 0, 0 }, /* TOP_BUS */ | ||
130 | { 1, 0, 1 }, /* TOP_RETENTION */ | ||
131 | { 3, 0, 3 }, /* TOP_PWR */ | ||
132 | { 1, 1, 0 }, /* LOGIC_RESET */ | ||
133 | { 3, 0, 0 }, /* ONENAND_MEM */ | ||
134 | { 3, 0, 0 }, /* MODIMIF_MEM */ | ||
135 | { 3, 0, 0 }, /* G2D_ACP_MEM */ | ||
136 | { 3, 0, 0 }, /* USBOTG_MEM */ | ||
137 | { 3, 0, 0 }, /* HSMMC_MEM */ | ||
138 | { 3, 0, 0 }, /* CSSYS_MEM */ | ||
139 | { 3, 0, 0 }, /* SECSS_MEM */ | ||
140 | { 3, 0, 0 }, /* PCIE_MEM */ | ||
141 | { 3, 0, 0 }, /* SATA_MEM */ | ||
142 | { 1, 0, 0 }, /* PAD_RETENTION_DRAM */ | ||
143 | { 1, 1, 0 }, /* PAD_RETENTION_MAUDIO */ | ||
144 | { 1, 0, 0 }, /* PAD_RETENTION_GPIO */ | ||
145 | { 1, 0, 0 }, /* PAD_RETENTION_UART */ | ||
146 | { 1, 0, 0 }, /* PAD_RETENTION_MMCA */ | ||
147 | { 1, 0, 0 }, /* PAD_RETENTION_MMCB */ | ||
148 | { 1, 0, 0 }, /* PAD_RETENTION_EBIA */ | ||
149 | { 1, 0, 0 }, /* PAD_RETENTION_EBIB */ | ||
150 | { 1, 0, 0 }, /* PAD_RETENTION_ISOLATION */ | ||
151 | { 1, 0, 0 }, /* PAD_RETENTION_ALV_SEL */ | ||
152 | { 1, 1, 0 }, /* XUSBXTI */ | ||
153 | { 1, 1, 0 }, /* XXTI */ | ||
154 | { 1, 1, 0 }, /* EXT_REGULATOR */ | ||
155 | { 1, 0, 0 }, /* GPIO_MODE */ | ||
156 | { 1, 1, 0 }, /* GPIO_MODE_MAUDIO */ | ||
157 | { 7, 0, 0 }, /* CAM */ | ||
158 | { 7, 0, 0 }, /* TV */ | ||
159 | { 7, 0, 0 }, /* MFC */ | ||
160 | { 7, 0, 0 }, /* G3D */ | ||
161 | { 7, 0, 0 }, /* LCD0 */ | ||
162 | { 7, 0, 0 }, /* LCD1 */ | ||
163 | { 7, 7, 0 }, /* MAUDIO */ | ||
164 | { 7, 0, 0 }, /* GPS */ | ||
165 | { 7, 0, 0 }, /* GPS_ALIVE */ | ||
166 | }; | ||
167 | |||
168 | void exynos4_sys_powerdown_conf(enum sys_powerdown mode) | ||
169 | { | ||
170 | unsigned int count = ARRAY_SIZE(sys_powerdown_reg); | ||
171 | |||
172 | for (; count > 0; count--) | ||
173 | __raw_writel(sys_powerdown_val[count - 1][mode], | ||
174 | sys_powerdown_reg[count - 1]); | ||
175 | } | ||
diff --git a/arch/arm/mach-exynos4/setup-sdhci.c b/arch/arm/mach-exynos4/setup-sdhci.c deleted file mode 100644 index 1e83f8cf236..00000000000 --- a/arch/arm/mach-exynos4/setup-sdhci.c +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/setup-sdhci.c | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * EXYNOS4 - Helper functions for settign up SDHCI device(s) (HSMMC) | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/types.h> | ||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/io.h> | ||
18 | |||
19 | #include <linux/mmc/card.h> | ||
20 | #include <linux/mmc/host.h> | ||
21 | |||
22 | #include <plat/regs-sdhci.h> | ||
23 | |||
24 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | ||
25 | |||
26 | char *exynos4_hsmmc_clksrcs[4] = { | ||
27 | [0] = NULL, | ||
28 | [1] = NULL, | ||
29 | [2] = "sclk_mmc", /* mmc_bus */ | ||
30 | [3] = NULL, | ||
31 | }; | ||
32 | |||
33 | void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r, | ||
34 | struct mmc_ios *ios, struct mmc_card *card) | ||
35 | { | ||
36 | u32 ctrl2, ctrl3; | ||
37 | |||
38 | /* don't need to alter anything according to card-type */ | ||
39 | |||
40 | ctrl2 = readl(r + S3C_SDHCI_CONTROL2); | ||
41 | |||
42 | /* select base clock source to HCLK */ | ||
43 | |||
44 | ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; | ||
45 | |||
46 | /* | ||
47 | * clear async mode, enable conflict mask, rx feedback ctrl, SD | ||
48 | * clk hold and no use debounce count | ||
49 | */ | ||
50 | |||
51 | ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | | ||
52 | S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | | ||
53 | S3C_SDHCI_CTRL2_ENFBCLKRX | | ||
54 | S3C_SDHCI_CTRL2_DFCNT_NONE | | ||
55 | S3C_SDHCI_CTRL2_ENCLKOUTHOLD); | ||
56 | |||
57 | /* Tx and Rx feedback clock delay control */ | ||
58 | |||
59 | if (ios->clock < 25 * 1000000) | ||
60 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | | ||
61 | S3C_SDHCI_CTRL3_FCSEL2 | | ||
62 | S3C_SDHCI_CTRL3_FCSEL1 | | ||
63 | S3C_SDHCI_CTRL3_FCSEL0); | ||
64 | else | ||
65 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); | ||
66 | |||
67 | writel(ctrl2, r + S3C_SDHCI_CONTROL2); | ||
68 | writel(ctrl3, r + S3C_SDHCI_CONTROL3); | ||
69 | } | ||
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index cfa84178eb2..ba232d79fa8 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c | |||
@@ -293,8 +293,7 @@ static struct mc13xxx_platform_data mc13783_pdata = { | |||
293 | .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), | 293 | .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), |
294 | 294 | ||
295 | }, | 295 | }, |
296 | .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN | | 296 | .flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC, |
297 | MC13783_USE_RTC, | ||
298 | }; | 297 | }; |
299 | 298 | ||
300 | /* SPI */ | 299 | /* SPI */ |
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 60f1fda6ce9..b8c54b84018 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c | |||
@@ -492,7 +492,7 @@ static struct mc13xxx_platform_data mc13783_pdata = { | |||
492 | .regulators = mx31_3ds_regulators, | 492 | .regulators = mx31_3ds_regulators, |
493 | .num_regulators = ARRAY_SIZE(mx31_3ds_regulators), | 493 | .num_regulators = ARRAY_SIZE(mx31_3ds_regulators), |
494 | }, | 494 | }, |
495 | .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN, | 495 | .flags = MC13XXX_USE_TOUCHSCREEN, |
496 | }; | 496 | }; |
497 | 497 | ||
498 | /* SPI */ | 498 | /* SPI */ |
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c index 5defd8e70fc..102ec99357c 100644 --- a/arch/arm/mach-imx/mach-mx31lilly.c +++ b/arch/arm/mach-imx/mach-mx31lilly.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/delay.h> | 27 | #include <linux/delay.h> |
28 | #include <linux/platform_device.h> | 28 | #include <linux/platform_device.h> |
29 | #include <linux/interrupt.h> | 29 | #include <linux/interrupt.h> |
30 | #include <linux/moduleparam.h> | ||
30 | #include <linux/smsc911x.h> | 31 | #include <linux/smsc911x.h> |
31 | #include <linux/mtd/physmap.h> | 32 | #include <linux/mtd/physmap.h> |
32 | #include <linux/spi/spi.h> | 33 | #include <linux/spi/spi.h> |
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c index c97c26d814e..5366d2de18f 100644 --- a/arch/arm/mach-imx/mach-mx31lite.c +++ b/arch/arm/mach-imx/mach-mx31lite.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/memory.h> | 21 | #include <linux/memory.h> |
22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
23 | #include <linux/gpio.h> | 23 | #include <linux/gpio.h> |
24 | #include <linux/moduleparam.h> | ||
24 | #include <linux/smsc911x.h> | 25 | #include <linux/smsc911x.h> |
25 | #include <linux/mfd/mc13783.h> | 26 | #include <linux/mfd/mc13783.h> |
26 | #include <linux/spi/spi.h> | 27 | #include <linux/spi/spi.h> |
@@ -112,8 +113,7 @@ static const struct spi_imx_master spi1_pdata __initconst = { | |||
112 | }; | 113 | }; |
113 | 114 | ||
114 | static struct mc13xxx_platform_data mc13783_pdata __initdata = { | 115 | static struct mc13xxx_platform_data mc13783_pdata __initdata = { |
115 | .flags = MC13XXX_USE_RTC | | 116 | .flags = MC13XXX_USE_RTC, |
116 | MC13XXX_USE_REGULATOR, | ||
117 | }; | 117 | }; |
118 | 118 | ||
119 | static struct spi_board_info mc13783_spi_dev __initdata = { | 119 | static struct spi_board_info mc13783_spi_dev __initdata = { |
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index fff7791b7e7..93269150309 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/gpio.h> | 18 | #include <linux/gpio.h> |
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <linux/interrupt.h> | 20 | #include <linux/interrupt.h> |
21 | #include <linux/moduleparam.h> | ||
21 | #include <linux/leds.h> | 22 | #include <linux/leds.h> |
22 | #include <linux/memory.h> | 23 | #include <linux/memory.h> |
23 | #include <linux/mtd/physmap.h> | 24 | #include <linux/mtd/physmap.h> |
@@ -31,6 +32,7 @@ | |||
31 | #include <linux/clk.h> | 32 | #include <linux/clk.h> |
32 | #include <linux/io.h> | 33 | #include <linux/io.h> |
33 | #include <linux/err.h> | 34 | #include <linux/err.h> |
35 | #include <linux/input.h> | ||
34 | 36 | ||
35 | #include <linux/usb/otg.h> | 37 | #include <linux/usb/otg.h> |
36 | #include <linux/usb/ulpi.h> | 38 | #include <linux/usb/ulpi.h> |
@@ -225,7 +227,7 @@ static struct mc13xxx_regulator_init_data moboard_regulators[] = { | |||
225 | }, | 227 | }, |
226 | }; | 228 | }; |
227 | 229 | ||
228 | static struct mc13783_led_platform_data moboard_led[] = { | 230 | static struct mc13xxx_led_platform_data moboard_led[] = { |
229 | { | 231 | { |
230 | .id = MC13783_LED_R1, | 232 | .id = MC13783_LED_R1, |
231 | .name = "coreboard-led-4:red", | 233 | .name = "coreboard-led-4:red", |
@@ -258,7 +260,7 @@ static struct mc13783_led_platform_data moboard_led[] = { | |||
258 | }, | 260 | }, |
259 | }; | 261 | }; |
260 | 262 | ||
261 | static struct mc13783_leds_platform_data moboard_leds = { | 263 | static struct mc13xxx_leds_platform_data moboard_leds = { |
262 | .num_leds = ARRAY_SIZE(moboard_led), | 264 | .num_leds = ARRAY_SIZE(moboard_led), |
263 | .led = moboard_led, | 265 | .led = moboard_led, |
264 | .flags = MC13783_LED_SLEWLIMTC, | 266 | .flags = MC13783_LED_SLEWLIMTC, |
@@ -267,14 +269,20 @@ static struct mc13783_leds_platform_data moboard_leds = { | |||
267 | .tc2_period = MC13783_LED_PERIOD_10MS, | 269 | .tc2_period = MC13783_LED_PERIOD_10MS, |
268 | }; | 270 | }; |
269 | 271 | ||
272 | static struct mc13xxx_buttons_platform_data moboard_buttons = { | ||
273 | .b1on_flags = MC13783_BUTTON_DBNC_750MS | MC13783_BUTTON_ENABLE | | ||
274 | MC13783_BUTTON_POL_INVERT, | ||
275 | .b1on_key = KEY_POWER, | ||
276 | }; | ||
277 | |||
270 | static struct mc13xxx_platform_data moboard_pmic = { | 278 | static struct mc13xxx_platform_data moboard_pmic = { |
271 | .regulators = { | 279 | .regulators = { |
272 | .regulators = moboard_regulators, | 280 | .regulators = moboard_regulators, |
273 | .num_regulators = ARRAY_SIZE(moboard_regulators), | 281 | .num_regulators = ARRAY_SIZE(moboard_regulators), |
274 | }, | 282 | }, |
275 | .leds = &moboard_leds, | 283 | .leds = &moboard_leds, |
276 | .flags = MC13XXX_USE_REGULATOR | MC13XXX_USE_RTC | | 284 | .buttons = &moboard_buttons, |
277 | MC13XXX_USE_ADC | MC13XXX_USE_LED, | 285 | .flags = MC13XXX_USE_RTC | MC13XXX_USE_ADC, |
278 | }; | 286 | }; |
279 | 287 | ||
280 | static struct spi_board_info moboard_spi_board_info[] __initdata = { | 288 | static struct spi_board_info moboard_spi_board_info[] __initdata = { |
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index 100bc733ce9..a17e9c7dfca 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c | |||
@@ -268,8 +268,7 @@ static struct mc13xxx_platform_data pcm038_pmic = { | |||
268 | .regulators = pcm038_regulators, | 268 | .regulators = pcm038_regulators, |
269 | .num_regulators = ARRAY_SIZE(pcm038_regulators), | 269 | .num_regulators = ARRAY_SIZE(pcm038_regulators), |
270 | }, | 270 | }, |
271 | .flags = MC13783_USE_ADC | MC13783_USE_REGULATOR | | 271 | .flags = MC13XXX_USE_ADC | MC13XXX_USE_TOUCHSCREEN, |
272 | MC13783_USE_TOUCHSCREEN, | ||
273 | }; | 272 | }; |
274 | 273 | ||
275 | static struct spi_board_info pcm038_spi_board_info[] __initdata = { | 274 | static struct spi_board_info pcm038_spi_board_info[] __initdata = { |
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c index 251c40897da..db012fadf88 100644 --- a/arch/arm/mach-iop13xx/pci.c +++ b/arch/arm/mach-iop13xx/pci.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/slab.h> | 21 | #include <linux/slab.h> |
22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
23 | #include <linux/jiffies.h> | 23 | #include <linux/jiffies.h> |
24 | #include <linux/export.h> | ||
24 | #include <asm/irq.h> | 25 | #include <asm/irq.h> |
25 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
26 | #include <asm/sizes.h> | 27 | #include <asm/sizes.h> |
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index 59a512672bb..24f0fe35f4a 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/bitops.h> | 25 | #include <linux/bitops.h> |
26 | #include <linux/serial_8250.h> | 26 | #include <linux/serial_8250.h> |
27 | #include <linux/mm.h> | 27 | #include <linux/mm.h> |
28 | #include <linux/export.h> | ||
28 | 29 | ||
29 | #include <asm/types.h> | 30 | #include <asm/types.h> |
30 | #include <asm/setup.h> | 31 | #include <asm/setup.h> |
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index f72a3a893c4..8325058ef87 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/delay.h> | 26 | #include <linux/delay.h> |
27 | #include <linux/device.h> | 27 | #include <linux/device.h> |
28 | #include <linux/io.h> | 28 | #include <linux/io.h> |
29 | #include <linux/export.h> | ||
29 | #include <asm/dma-mapping.h> | 30 | #include <asm/dma-mapping.h> |
30 | 31 | ||
31 | #include <asm/cputype.h> | 32 | #include <asm/cputype.h> |
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 07772575d7a..b86a0055ab9 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/clocksource.h> | 28 | #include <linux/clocksource.h> |
29 | #include <linux/clockchips.h> | 29 | #include <linux/clockchips.h> |
30 | #include <linux/io.h> | 30 | #include <linux/io.h> |
31 | #include <linux/export.h> | ||
31 | 32 | ||
32 | #include <mach/udc.h> | 33 | #include <mach/udc.h> |
33 | #include <mach/hardware.h> | 34 | #include <mach/hardware.h> |
diff --git a/arch/arm/mach-kirkwood/cpuidle.c b/arch/arm/mach-kirkwood/cpuidle.c index f68d33f1f39..864e569f684 100644 --- a/arch/arm/mach-kirkwood/cpuidle.c +++ b/arch/arm/mach-kirkwood/cpuidle.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
19 | #include <linux/cpuidle.h> | 19 | #include <linux/cpuidle.h> |
20 | #include <linux/io.h> | 20 | #include <linux/io.h> |
21 | #include <linux/export.h> | ||
21 | #include <asm/proc-fns.h> | 22 | #include <asm/proc-fns.h> |
22 | #include <mach/kirkwood.h> | 23 | #include <mach/kirkwood.h> |
23 | 24 | ||
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile index 8f948f98164..ba254a71691 100644 --- a/arch/arm/mach-mmp/Makefile +++ b/arch/arm/mach-mmp/Makefile | |||
@@ -7,7 +7,7 @@ obj-y += common.o clock.o devices.o time.o | |||
7 | # SoC support | 7 | # SoC support |
8 | obj-$(CONFIG_CPU_PXA168) += pxa168.o irq-pxa168.o | 8 | obj-$(CONFIG_CPU_PXA168) += pxa168.o irq-pxa168.o |
9 | obj-$(CONFIG_CPU_PXA910) += pxa910.o irq-pxa168.o | 9 | obj-$(CONFIG_CPU_PXA910) += pxa910.o irq-pxa168.o |
10 | obj-$(CONFIG_CPU_MMP2) += mmp2.o irq-mmp2.o | 10 | obj-$(CONFIG_CPU_MMP2) += mmp2.o irq-mmp2.o sram.o |
11 | 11 | ||
12 | # board support | 12 | # board support |
13 | obj-$(CONFIG_MACH_ASPENITE) += aspenite.o | 13 | obj-$(CONFIG_MACH_ASPENITE) += aspenite.o |
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c index e411252e3d3..983cfb15fbd 100644 --- a/arch/arm/mach-mmp/brownstone.c +++ b/arch/arm/mach-mmp/brownstone.c | |||
@@ -185,6 +185,15 @@ static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc2 = { | |||
185 | | PXA_FLAG_SD_8_BIT_CAPABLE_SLOT, | 185 | | PXA_FLAG_SD_8_BIT_CAPABLE_SLOT, |
186 | }; | 186 | }; |
187 | 187 | ||
188 | static struct sram_platdata mmp2_asram_platdata = { | ||
189 | .pool_name = "asram", | ||
190 | .granularity = SRAM_GRANULARITY, | ||
191 | }; | ||
192 | |||
193 | static struct sram_platdata mmp2_isram_platdata = { | ||
194 | .pool_name = "isram", | ||
195 | .granularity = SRAM_GRANULARITY, | ||
196 | }; | ||
188 | 197 | ||
189 | static void __init brownstone_init(void) | 198 | static void __init brownstone_init(void) |
190 | { | 199 | { |
@@ -196,6 +205,8 @@ static void __init brownstone_init(void) | |||
196 | mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info)); | 205 | mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info)); |
197 | mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */ | 206 | mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */ |
198 | mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */ | 207 | mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */ |
208 | mmp2_add_asram(&mmp2_asram_platdata); | ||
209 | mmp2_add_isram(&mmp2_isram_platdata); | ||
199 | 210 | ||
200 | /* enable 5v regulator */ | 211 | /* enable 5v regulator */ |
201 | platform_device_register(&brownstone_v_5vp_device); | 212 | platform_device_register(&brownstone_v_5vp_device); |
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h index de7b88826ad..2f7b2d3c2b1 100644 --- a/arch/arm/mach-mmp/include/mach/mmp2.h +++ b/arch/arm/mach-mmp/include/mach/mmp2.h | |||
@@ -13,6 +13,7 @@ extern void mmp2_clear_pmic_int(void); | |||
13 | #include <linux/i2c.h> | 13 | #include <linux/i2c.h> |
14 | #include <linux/i2c/pxa-i2c.h> | 14 | #include <linux/i2c/pxa-i2c.h> |
15 | #include <mach/devices.h> | 15 | #include <mach/devices.h> |
16 | #include <mach/sram.h> | ||
16 | 17 | ||
17 | extern struct pxa_device_desc mmp2_device_uart1; | 18 | extern struct pxa_device_desc mmp2_device_uart1; |
18 | extern struct pxa_device_desc mmp2_device_uart2; | 19 | extern struct pxa_device_desc mmp2_device_uart2; |
@@ -28,6 +29,8 @@ extern struct pxa_device_desc mmp2_device_sdh0; | |||
28 | extern struct pxa_device_desc mmp2_device_sdh1; | 29 | extern struct pxa_device_desc mmp2_device_sdh1; |
29 | extern struct pxa_device_desc mmp2_device_sdh2; | 30 | extern struct pxa_device_desc mmp2_device_sdh2; |
30 | extern struct pxa_device_desc mmp2_device_sdh3; | 31 | extern struct pxa_device_desc mmp2_device_sdh3; |
32 | extern struct pxa_device_desc mmp2_device_asram; | ||
33 | extern struct pxa_device_desc mmp2_device_isram; | ||
31 | 34 | ||
32 | static inline int mmp2_add_uart(int id) | 35 | static inline int mmp2_add_uart(int id) |
33 | { | 36 | { |
@@ -85,5 +88,15 @@ static inline int mmp2_add_sdhost(int id, struct sdhci_pxa_platdata *data) | |||
85 | return pxa_register_device(d, data, sizeof(*data)); | 88 | return pxa_register_device(d, data, sizeof(*data)); |
86 | } | 89 | } |
87 | 90 | ||
91 | static inline int mmp2_add_asram(struct sram_platdata *data) | ||
92 | { | ||
93 | return pxa_register_device(&mmp2_device_asram, data, sizeof(*data)); | ||
94 | } | ||
95 | |||
96 | static inline int mmp2_add_isram(struct sram_platdata *data) | ||
97 | { | ||
98 | return pxa_register_device(&mmp2_device_isram, data, sizeof(*data)); | ||
99 | } | ||
100 | |||
88 | #endif /* __ASM_MACH_MMP2_H */ | 101 | #endif /* __ASM_MACH_MMP2_H */ |
89 | 102 | ||
diff --git a/arch/arm/mach-mmp/include/mach/sram.h b/arch/arm/mach-mmp/include/mach/sram.h new file mode 100644 index 00000000000..239e0fc1bb1 --- /dev/null +++ b/arch/arm/mach-mmp/include/mach/sram.h | |||
@@ -0,0 +1,35 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-mmp/include/mach/sram.h | ||
3 | * | ||
4 | * SRAM Memory Management | ||
5 | * | ||
6 | * Copyright (c) 2011 Marvell Semiconductors Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_ARCH_SRAM_H | ||
15 | #define __ASM_ARCH_SRAM_H | ||
16 | |||
17 | #include <linux/genalloc.h> | ||
18 | |||
19 | /* ARBITRARY: SRAM allocations are multiples of this 2^N size */ | ||
20 | #define SRAM_GRANULARITY 512 | ||
21 | |||
22 | enum sram_type { | ||
23 | MMP_SRAM_UNDEFINED = 0, | ||
24 | MMP_ASRAM, | ||
25 | MMP_ISRAM, | ||
26 | }; | ||
27 | |||
28 | struct sram_platdata { | ||
29 | char *pool_name; | ||
30 | int granularity; | ||
31 | }; | ||
32 | |||
33 | extern struct gen_pool *sram_get_gpool(char *pool_name); | ||
34 | |||
35 | #endif /* __ASM_ARCH_SRAM_H */ | ||
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c index 7a7e8e4dde4..5dd1d4a6aeb 100644 --- a/arch/arm/mach-mmp/mmp2.c +++ b/arch/arm/mach-mmp/mmp2.c | |||
@@ -226,4 +226,7 @@ MMP2_DEVICE(sdh0, "sdhci-pxav3", 0, MMC, 0xd4280000, 0x120); | |||
226 | MMP2_DEVICE(sdh1, "sdhci-pxav3", 1, MMC2, 0xd4280800, 0x120); | 226 | MMP2_DEVICE(sdh1, "sdhci-pxav3", 1, MMC2, 0xd4280800, 0x120); |
227 | MMP2_DEVICE(sdh2, "sdhci-pxav3", 2, MMC3, 0xd4281000, 0x120); | 227 | MMP2_DEVICE(sdh2, "sdhci-pxav3", 2, MMC3, 0xd4281000, 0x120); |
228 | MMP2_DEVICE(sdh3, "sdhci-pxav3", 3, MMC4, 0xd4281800, 0x120); | 228 | MMP2_DEVICE(sdh3, "sdhci-pxav3", 3, MMC4, 0xd4281800, 0x120); |
229 | MMP2_DEVICE(asram, "asram", -1, NONE, 0xe0000000, 0x4000); | ||
230 | /* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */ | ||
231 | MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000); | ||
229 | 232 | ||
diff --git a/arch/arm/mach-mmp/sram.c b/arch/arm/mach-mmp/sram.c new file mode 100644 index 00000000000..4304f951937 --- /dev/null +++ b/arch/arm/mach-mmp/sram.c | |||
@@ -0,0 +1,168 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-mmp/sram.c | ||
3 | * | ||
4 | * based on mach-davinci/sram.c - DaVinci simple SRAM allocator | ||
5 | * | ||
6 | * Copyright (c) 2011 Marvell Semiconductors Inc. | ||
7 | * All Rights Reserved | ||
8 | * | ||
9 | * Add for mmp sram support - Leo Yan <leoy@marvell.com> | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License version 2 as | ||
13 | * published by the Free Software Foundation. | ||
14 | * | ||
15 | */ | ||
16 | |||
17 | #include <linux/module.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/platform_device.h> | ||
20 | #include <linux/io.h> | ||
21 | #include <linux/err.h> | ||
22 | #include <linux/slab.h> | ||
23 | #include <linux/genalloc.h> | ||
24 | |||
25 | #include <mach/sram.h> | ||
26 | |||
27 | struct sram_bank_info { | ||
28 | char *pool_name; | ||
29 | struct gen_pool *gpool; | ||
30 | int granularity; | ||
31 | |||
32 | phys_addr_t sram_phys; | ||
33 | void __iomem *sram_virt; | ||
34 | u32 sram_size; | ||
35 | |||
36 | struct list_head node; | ||
37 | }; | ||
38 | |||
39 | static DEFINE_MUTEX(sram_lock); | ||
40 | static LIST_HEAD(sram_bank_list); | ||
41 | |||
42 | struct gen_pool *sram_get_gpool(char *pool_name) | ||
43 | { | ||
44 | struct sram_bank_info *info = NULL; | ||
45 | |||
46 | if (!pool_name) | ||
47 | return NULL; | ||
48 | |||
49 | mutex_lock(&sram_lock); | ||
50 | |||
51 | list_for_each_entry(info, &sram_bank_list, node) | ||
52 | if (!strcmp(pool_name, info->pool_name)) | ||
53 | break; | ||
54 | |||
55 | mutex_unlock(&sram_lock); | ||
56 | |||
57 | if (&info->node == &sram_bank_list) | ||
58 | return NULL; | ||
59 | |||
60 | return info->gpool; | ||
61 | } | ||
62 | EXPORT_SYMBOL(sram_get_gpool); | ||
63 | |||
64 | static int __devinit sram_probe(struct platform_device *pdev) | ||
65 | { | ||
66 | struct sram_platdata *pdata = pdev->dev.platform_data; | ||
67 | struct sram_bank_info *info; | ||
68 | struct resource *res; | ||
69 | int ret = 0; | ||
70 | |||
71 | if (!pdata && !pdata->pool_name) | ||
72 | return -ENODEV; | ||
73 | |||
74 | info = kzalloc(sizeof(*info), GFP_KERNEL); | ||
75 | if (!info) | ||
76 | return -ENOMEM; | ||
77 | |||
78 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
79 | if (res == NULL) { | ||
80 | dev_err(&pdev->dev, "no memory resource defined\n"); | ||
81 | ret = -ENODEV; | ||
82 | goto out; | ||
83 | } | ||
84 | |||
85 | if (!resource_size(res)) | ||
86 | return 0; | ||
87 | |||
88 | info->sram_phys = (phys_addr_t)res->start; | ||
89 | info->sram_size = resource_size(res); | ||
90 | info->sram_virt = ioremap(info->sram_phys, info->sram_size); | ||
91 | info->pool_name = kstrdup(pdata->pool_name, GFP_KERNEL); | ||
92 | info->granularity = pdata->granularity; | ||
93 | |||
94 | info->gpool = gen_pool_create(ilog2(info->granularity), -1); | ||
95 | if (!info->gpool) { | ||
96 | dev_err(&pdev->dev, "create pool failed\n"); | ||
97 | ret = -ENOMEM; | ||
98 | goto create_pool_err; | ||
99 | } | ||
100 | |||
101 | ret = gen_pool_add_virt(info->gpool, (unsigned long)info->sram_virt, | ||
102 | info->sram_phys, info->sram_size, -1); | ||
103 | if (ret < 0) { | ||
104 | dev_err(&pdev->dev, "add new chunk failed\n"); | ||
105 | ret = -ENOMEM; | ||
106 | goto add_chunk_err; | ||
107 | } | ||
108 | |||
109 | mutex_lock(&sram_lock); | ||
110 | list_add(&info->node, &sram_bank_list); | ||
111 | mutex_unlock(&sram_lock); | ||
112 | |||
113 | platform_set_drvdata(pdev, info); | ||
114 | |||
115 | dev_info(&pdev->dev, "initialized\n"); | ||
116 | return 0; | ||
117 | |||
118 | add_chunk_err: | ||
119 | gen_pool_destroy(info->gpool); | ||
120 | create_pool_err: | ||
121 | iounmap(info->sram_virt); | ||
122 | kfree(info->pool_name); | ||
123 | out: | ||
124 | kfree(info); | ||
125 | return ret; | ||
126 | } | ||
127 | |||
128 | static int __devexit sram_remove(struct platform_device *pdev) | ||
129 | { | ||
130 | struct sram_bank_info *info; | ||
131 | |||
132 | info = platform_get_drvdata(pdev); | ||
133 | if (info == NULL) | ||
134 | return -ENODEV; | ||
135 | |||
136 | mutex_lock(&sram_lock); | ||
137 | list_del(&info->node); | ||
138 | mutex_unlock(&sram_lock); | ||
139 | |||
140 | gen_pool_destroy(info->gpool); | ||
141 | iounmap(info->sram_virt); | ||
142 | kfree(info->pool_name); | ||
143 | kfree(info); | ||
144 | return 0; | ||
145 | } | ||
146 | |||
147 | static const struct platform_device_id sram_id_table[] = { | ||
148 | { "asram", MMP_ASRAM }, | ||
149 | { "isram", MMP_ISRAM }, | ||
150 | { } | ||
151 | }; | ||
152 | |||
153 | static struct platform_driver sram_driver = { | ||
154 | .probe = sram_probe, | ||
155 | .remove = sram_remove, | ||
156 | .driver = { | ||
157 | .name = "mmp-sram", | ||
158 | }, | ||
159 | .id_table = sram_id_table, | ||
160 | }; | ||
161 | |||
162 | static int __init sram_init(void) | ||
163 | { | ||
164 | return platform_driver_register(&sram_driver); | ||
165 | } | ||
166 | core_initcall(sram_init); | ||
167 | |||
168 | MODULE_LICENSE("GPL"); | ||
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c index 140ddbbc3a8..8759ecf7454 100644 --- a/arch/arm/mach-msm/io.c +++ b/arch/arm/mach-msm/io.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/kernel.h> | 20 | #include <linux/kernel.h> |
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/io.h> | 22 | #include <linux/io.h> |
23 | #include <linux/export.h> | ||
23 | 24 | ||
24 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
25 | #include <asm/page.h> | 26 | #include <asm/page.h> |
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-mx5/mx51_efika.c index b004e178417..ec6ca91b299 100644 --- a/arch/arm/mach-mx5/mx51_efika.c +++ b/arch/arm/mach-mx5/mx51_efika.c | |||
@@ -565,7 +565,7 @@ static struct mc13xxx_regulator_init_data mx51_efika_regulators[] = { | |||
565 | }; | 565 | }; |
566 | 566 | ||
567 | static struct mc13xxx_platform_data mx51_efika_mc13892_data = { | 567 | static struct mc13xxx_platform_data mx51_efika_mc13892_data = { |
568 | .flags = MC13XXX_USE_RTC | MC13XXX_USE_REGULATOR, | 568 | .flags = MC13XXX_USE_RTC, |
569 | .regulators = { | 569 | .regulators = { |
570 | .num_regulators = ARRAY_SIZE(mx51_efika_regulators), | 570 | .num_regulators = ARRAY_SIZE(mx51_efika_regulators), |
571 | .regulators = mx51_efika_regulators, | 571 | .regulators = mx51_efika_regulators, |
diff --git a/arch/arm/mach-netx/xc.c b/arch/arm/mach-netx/xc.c index f009b54e8d2..e4cfb7e5361 100644 --- a/arch/arm/mach-netx/xc.c +++ b/arch/arm/mach-netx/xc.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/mutex.h> | 23 | #include <linux/mutex.h> |
24 | #include <linux/slab.h> | 24 | #include <linux/slab.h> |
25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
26 | #include <linux/export.h> | ||
26 | 27 | ||
27 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
28 | #include <mach/irqs.h> | 29 | #include <mach/irqs.h> |
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 1f1db76d704..51bae31cf36 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/leds.h> | 19 | #include <linux/leds.h> |
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/serial_8250.h> | 21 | #include <linux/serial_8250.h> |
22 | #include <linux/export.h> | ||
22 | 23 | ||
23 | #include <media/soc_camera.h> | 24 | #include <media/soc_camera.h> |
24 | 25 | ||
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 667a7cbdb11..092a4c04640 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/types.h> | 26 | #include <linux/types.h> |
27 | #include <linux/i2c.h> | 27 | #include <linux/i2c.h> |
28 | #include <linux/errno.h> | 28 | #include <linux/errno.h> |
29 | #include <linux/export.h> | ||
29 | 30 | ||
30 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
31 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 2a6545ba61c..61ed6cdab2b 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/serial_8250.h> | 25 | #include <linux/serial_8250.h> |
26 | #include <linux/serial_reg.h> | 26 | #include <linux/serial_reg.h> |
27 | #include <linux/smc91x.h> | 27 | #include <linux/smc91x.h> |
28 | #include <linux/export.h> | ||
28 | 29 | ||
29 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
30 | #include <mach/system.h> | 31 | #include <mach/system.h> |
diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c index c0e1f48aa11..e962926b67b 100644 --- a/arch/arm/mach-omap1/mailbox.c +++ b/arch/arm/mach-omap1/mailbox.c | |||
@@ -9,6 +9,7 @@ | |||
9 | * for more details. | 9 | * for more details. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/module.h> | ||
12 | #include <linux/interrupt.h> | 13 | #include <linux/interrupt.h> |
13 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
14 | #include <linux/io.h> | 15 | #include <linux/io.h> |
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 497e9dc2795..50341471890 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
@@ -14,7 +14,6 @@ config ARCH_OMAP2PLUS_TYPICAL | |||
14 | select SERIAL_OMAP_CONSOLE | 14 | select SERIAL_OMAP_CONSOLE |
15 | select I2C | 15 | select I2C |
16 | select I2C_OMAP | 16 | select I2C_OMAP |
17 | select MFD_SUPPORT | ||
18 | select MENELAUS if ARCH_OMAP2 | 17 | select MENELAUS if ARCH_OMAP2 |
19 | select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 | 18 | select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 |
20 | select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 | 19 | select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 |
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 70261bcda3f..4a71cb7e42d 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c | |||
@@ -378,7 +378,8 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { | |||
378 | static int __init omap3_beagle_i2c_init(void) | 378 | static int __init omap3_beagle_i2c_init(void) |
379 | { | 379 | { |
380 | omap3_pmic_get_config(&beagle_twldata, | 380 | omap3_pmic_get_config(&beagle_twldata, |
381 | TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, | 381 | TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | |
382 | TWL_COMMON_PDATA_AUDIO, | ||
382 | TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); | 383 | TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); |
383 | 384 | ||
384 | beagle_twldata.vpll2->constraints.name = "VDVI"; | 385 | beagle_twldata.vpll2->constraints.name = "VDVI"; |
@@ -444,9 +445,15 @@ static struct platform_device keys_gpio = { | |||
444 | }, | 445 | }, |
445 | }; | 446 | }; |
446 | 447 | ||
448 | static struct platform_device madc_hwmon = { | ||
449 | .name = "twl4030_madc_hwmon", | ||
450 | .id = -1, | ||
451 | }; | ||
452 | |||
447 | static struct platform_device *omap3_beagle_devices[] __initdata = { | 453 | static struct platform_device *omap3_beagle_devices[] __initdata = { |
448 | &leds_gpio, | 454 | &leds_gpio, |
449 | &keys_gpio, | 455 | &keys_gpio, |
456 | &madc_hwmon, | ||
450 | }; | 457 | }; |
451 | 458 | ||
452 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { | 459 | static const struct usbhs_omap_board_data usbhs_bdata __initconst = { |
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 2d24e287e8c..ec00b2ec702 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c | |||
@@ -34,6 +34,7 @@ | |||
34 | #include <linux/regulator/fixed.h> | 34 | #include <linux/regulator/fixed.h> |
35 | #include <linux/regulator/machine.h> | 35 | #include <linux/regulator/machine.h> |
36 | #include <linux/mmc/host.h> | 36 | #include <linux/mmc/host.h> |
37 | #include <linux/export.h> | ||
37 | 38 | ||
38 | #include <mach/hardware.h> | 39 | #include <mach/hardware.h> |
39 | #include <asm/mach-types.h> | 40 | #include <asm/mach-types.h> |
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 8480ee4344e..ad07689e156 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/device.h> | 17 | #include <linux/device.h> |
18 | #include <linux/list.h> | 18 | #include <linux/list.h> |
19 | #include <linux/errno.h> | 19 | #include <linux/errno.h> |
20 | #include <linux/string.h> | ||
20 | #include <linux/delay.h> | 21 | #include <linux/delay.h> |
21 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
22 | #include <linux/limits.h> | 23 | #include <linux/limits.h> |
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 4036821a01f..adb2756e242 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c | |||
@@ -15,6 +15,7 @@ | |||
15 | * GNU General Public License for more details. | 15 | * GNU General Public License for more details. |
16 | */ | 16 | */ |
17 | 17 | ||
18 | #include <linux/string.h> | ||
18 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
19 | #include <linux/init.h> | 20 | #include <linux/init.h> |
20 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c index 911cd2e68d4..74f18f2952d 100644 --- a/arch/arm/mach-omap2/dsp.c +++ b/arch/arm/mach-omap2/dsp.c | |||
@@ -18,6 +18,7 @@ | |||
18 | * of the OMAP PM core code. | 18 | * of the OMAP PM core code. |
19 | */ | 19 | */ |
20 | 20 | ||
21 | #include <linux/module.h> | ||
21 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
22 | #include "cm2xxx_3xxx.h" | 23 | #include "cm2xxx_3xxx.h" |
23 | #include "prm2xxx_3xxx.h" | 24 | #include "prm2xxx_3xxx.h" |
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c index d776ded9830..5cdce10d618 100644 --- a/arch/arm/mach-omap2/gpmc-onenand.c +++ b/arch/arm/mach-omap2/gpmc-onenand.c | |||
@@ -10,6 +10,7 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/string.h> | ||
13 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
14 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
15 | #include <linux/mtd/onenand_regs.h> | 16 | #include <linux/mtd/onenand_regs.h> |
diff --git a/arch/arm/mach-omap2/hwspinlock.c b/arch/arm/mach-omap2/hwspinlock.c index 36e21091b06..454dfce125c 100644 --- a/arch/arm/mach-omap2/hwspinlock.c +++ b/arch/arm/mach-omap2/hwspinlock.c | |||
@@ -19,10 +19,15 @@ | |||
19 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/err.h> | 21 | #include <linux/err.h> |
22 | #include <linux/hwspinlock.h> | ||
22 | 23 | ||
23 | #include <plat/omap_hwmod.h> | 24 | #include <plat/omap_hwmod.h> |
24 | #include <plat/omap_device.h> | 25 | #include <plat/omap_device.h> |
25 | 26 | ||
27 | static struct hwspinlock_pdata omap_hwspinlock_pdata __initdata = { | ||
28 | .base_id = 0, | ||
29 | }; | ||
30 | |||
26 | int __init hwspinlocks_init(void) | 31 | int __init hwspinlocks_init(void) |
27 | { | 32 | { |
28 | int retval = 0; | 33 | int retval = 0; |
@@ -40,7 +45,9 @@ int __init hwspinlocks_init(void) | |||
40 | if (oh == NULL) | 45 | if (oh == NULL) |
41 | return -EINVAL; | 46 | return -EINVAL; |
42 | 47 | ||
43 | pdev = omap_device_build(dev_name, 0, oh, NULL, 0, NULL, 0, false); | 48 | pdev = omap_device_build(dev_name, 0, oh, &omap_hwspinlock_pdata, |
49 | sizeof(struct hwspinlock_pdata), | ||
50 | NULL, 0, false); | ||
44 | if (IS_ERR(pdev)) { | 51 | if (IS_ERR(pdev)) { |
45 | pr_err("Can't build omap_device for %s:%s\n", dev_name, | 52 | pr_err("Can't build omap_device for %s:%s\n", dev_name, |
46 | oh_name); | 53 | oh_name); |
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 86d564a640b..609ea2ded7e 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c | |||
@@ -10,6 +10,7 @@ | |||
10 | * for more details. | 10 | * for more details. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | ||
13 | #include <linux/clk.h> | 14 | #include <linux/clk.h> |
14 | #include <linux/err.h> | 15 | #include <linux/err.h> |
15 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c index e61feadcda4..b8822048e40 100644 --- a/arch/arm/mach-omap2/omap-iommu.c +++ b/arch/arm/mach-omap2/omap-iommu.c | |||
@@ -10,6 +10,7 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | ||
13 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
14 | 15 | ||
15 | #include <plat/iommu.h> | 16 | #include <plat/iommu.h> |
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 2ab7a9e17fe..1e79bdf313e 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
15 | #include <linux/err.h> | 15 | #include <linux/err.h> |
16 | #include <linux/opp.h> | 16 | #include <linux/opp.h> |
17 | #include <linux/export.h> | ||
17 | 18 | ||
18 | #include <plat/omap-pm.h> | 19 | #include <plat/omap-pm.h> |
19 | #include <plat/omap_device.h> | 20 | #include <plat/omap_device.h> |
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 8db5f035eb0..597e2da831b 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/clk.h> | 23 | #include <linux/clk.h> |
24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
25 | #include <linux/delay.h> | 25 | #include <linux/delay.h> |
26 | #include <linux/export.h> | ||
26 | 27 | ||
27 | #include <mach/system.h> | 28 | #include <mach/system.h> |
28 | #include <plat/common.h> | 29 | #include <plat/common.h> |
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 0347b93211e..6a4f6839a7d 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c | |||
@@ -17,6 +17,7 @@ | |||
17 | * published by the Free Software Foundation. | 17 | * published by the Free Software Foundation. |
18 | */ | 18 | */ |
19 | 19 | ||
20 | #include <linux/module.h> | ||
20 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
21 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
22 | #include <linux/io.h> | 23 | #include <linux/io.h> |
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index 8dd26b765b7..994d8f591a1 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c | |||
@@ -8,11 +8,13 @@ | |||
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <linux/string.h> | ||
11 | #include <linux/types.h> | 12 | #include <linux/types.h> |
12 | #include <linux/errno.h> | 13 | #include <linux/errno.h> |
13 | #include <linux/delay.h> | 14 | #include <linux/delay.h> |
14 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
15 | #include <linux/gpio.h> | 16 | #include <linux/gpio.h> |
17 | #include <linux/export.h> | ||
16 | 18 | ||
17 | #include <linux/usb/musb.h> | 19 | #include <linux/usb/musb.h> |
18 | 20 | ||
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 64070ac1e76..1f8fdf736e6 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/err.h> | 24 | #include <linux/err.h> |
25 | #include <linux/export.h> | ||
25 | #include <linux/debugfs.h> | 26 | #include <linux/debugfs.h> |
26 | #include <linux/slab.h> | 27 | #include <linux/slab.h> |
27 | #include <linux/clk.h> | 28 | #include <linux/clk.h> |
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c index 7db66465716..05bfa1b1c00 100644 --- a/arch/arm/mach-pxa/colibri-pxa270.c +++ b/arch/arm/mach-pxa/colibri-pxa270.c | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
15 | #include <linux/moduleparam.h> | ||
15 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
16 | #include <linux/mtd/mtd.h> | 17 | #include <linux/mtd/mtd.h> |
17 | #include <linux/mtd/partitions.h> | 18 | #include <linux/mtd/partitions.h> |
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 3e9483b0605..549468d088b 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <linux/spi/pxa2xx_spi.h> | 32 | #include <linux/spi/pxa2xx_spi.h> |
33 | #include <linux/mtd/sharpsl.h> | 33 | #include <linux/mtd/sharpsl.h> |
34 | #include <linux/input/matrix_keypad.h> | 34 | #include <linux/input/matrix_keypad.h> |
35 | #include <linux/module.h> | ||
35 | #include <video/w100fb.h> | 36 | #include <video/w100fb.h> |
36 | 37 | ||
37 | #include <asm/setup.h> | 38 | #include <asm/setup.h> |
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c index 8e697dd8acc..d82b7aa3c09 100644 --- a/arch/arm/mach-pxa/eseries.c +++ b/arch/arm/mach-pxa/eseries.c | |||
@@ -144,7 +144,7 @@ static struct clk_lookup eseries_clkregs[] = { | |||
144 | INIT_CLKREG(&tmio_dummy_clk, NULL, "CLK_CK32K"), | 144 | INIT_CLKREG(&tmio_dummy_clk, NULL, "CLK_CK32K"), |
145 | }; | 145 | }; |
146 | 146 | ||
147 | void eseries_register_clks(void) | 147 | static void __init eseries_register_clks(void) |
148 | { | 148 | { |
149 | clkdev_add_table(eseries_clkregs, ARRAY_SIZE(eseries_clkregs)); | 149 | clkdev_add_table(eseries_clkregs, ARRAY_SIZE(eseries_clkregs)); |
150 | } | 150 | } |
diff --git a/arch/arm/mach-pxa/eseries.h b/arch/arm/mach-pxa/eseries.h index be921965e91..b96949dd5ad 100644 --- a/arch/arm/mach-pxa/eseries.h +++ b/arch/arm/mach-pxa/eseries.h | |||
@@ -11,5 +11,4 @@ extern int eseries_tmio_resume(struct platform_device *dev); | |||
11 | extern void eseries_get_tmio_gpios(void); | 11 | extern void eseries_get_tmio_gpios(void); |
12 | extern struct resource eseries_tmio_resources[]; | 12 | extern struct resource eseries_tmio_resources[]; |
13 | extern struct platform_device e300_tc6387xb_device; | 13 | extern struct platform_device e300_tc6387xb_device; |
14 | extern void eseries_register_clks(void); | ||
15 | 14 | ||
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h index 576868f8b8c..41b4c93a96c 100644 --- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h +++ b/arch/arm/mach-pxa/include/mach/gpio-pxa.h | |||
@@ -25,7 +25,7 @@ | |||
25 | #define GPIO_REGS_VIRT io_p2v(0x40E00000) | 25 | #define GPIO_REGS_VIRT io_p2v(0x40E00000) |
26 | 26 | ||
27 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) | 27 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) |
28 | #define GPIO_REG(x) (GPIO_REGS_VIRT + (x)) | 28 | #define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x))) |
29 | 29 | ||
30 | /* GPIO Pin Level Registers */ | 30 | /* GPIO Pin Level Registers */ |
31 | #define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00) | 31 | #define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00) |
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index 9a9c539f6c0..6d38c6548b3 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c | |||
@@ -394,9 +394,9 @@ static int pcm990_camera_set_bus_param(struct soc_camera_link *link, | |||
394 | } | 394 | } |
395 | 395 | ||
396 | if (flags & SOCAM_DATAWIDTH_8) | 396 | if (flags & SOCAM_DATAWIDTH_8) |
397 | gpio_set_value(gpio_bus_switch, 1); | 397 | gpio_set_value_cansleep(gpio_bus_switch, 1); |
398 | else | 398 | else |
399 | gpio_set_value(gpio_bus_switch, 0); | 399 | gpio_set_value_cansleep(gpio_bus_switch, 0); |
400 | 400 | ||
401 | return 0; | 401 | return 0; |
402 | } | 402 | } |
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index 948ce3e729f..50c83317786 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c | |||
@@ -16,6 +16,7 @@ | |||
16 | */ | 16 | */ |
17 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
19 | #include <linux/export.h> | ||
19 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
20 | #include <linux/fb.h> | 21 | #include <linux/fb.h> |
21 | #include <linux/pm.h> | 22 | #include <linux/pm.h> |
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index d8dec9113aa..953a9195f9e 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/input/matrix_keypad.h> | 30 | #include <linux/input/matrix_keypad.h> |
31 | #include <linux/regulator/machine.h> | 31 | #include <linux/regulator/machine.h> |
32 | #include <linux/io.h> | 32 | #include <linux/io.h> |
33 | #include <linux/module.h> | ||
33 | 34 | ||
34 | #include <asm/setup.h> | 35 | #include <asm/setup.h> |
35 | #include <asm/mach-types.h> | 36 | #include <asm/mach-types.h> |
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 35bbf13724b..1aaed2b17e1 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
19 | #include <linux/export.h> | ||
19 | #include <linux/sched.h> | 20 | #include <linux/sched.h> |
20 | #include <linux/bitops.h> | 21 | #include <linux/bitops.h> |
21 | #include <linux/fb.h> | 22 | #include <linux/fb.h> |
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig index 3700cf32af0..5261a7ed099 100644 --- a/arch/arm/mach-s3c2410/Kconfig +++ b/arch/arm/mach-s3c2410/Kconfig | |||
@@ -6,7 +6,6 @@ config CPU_S3C2410 | |||
6 | bool | 6 | bool |
7 | depends on ARCH_S3C2410 | 7 | depends on ARCH_S3C2410 |
8 | select CPU_ARM920T | 8 | select CPU_ARM920T |
9 | select S3C_GPIO_PULL_UP | ||
10 | select S3C2410_CLOCK | 9 | select S3C2410_CLOCK |
11 | select CPU_LLSERIAL_S3C2410 | 10 | select CPU_LLSERIAL_S3C2410 |
12 | select S3C2410_PM if PM | 11 | select S3C2410_PM if PM |
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c2410/include/mach/dma.h index b2b2a5bb275..ae8e482b642 100644 --- a/arch/arm/mach-s3c2410/include/mach/dma.h +++ b/arch/arm/mach-s3c2410/include/mach/dma.h | |||
@@ -13,7 +13,6 @@ | |||
13 | #ifndef __ASM_ARCH_DMA_H | 13 | #ifndef __ASM_ARCH_DMA_H |
14 | #define __ASM_ARCH_DMA_H __FILE__ | 14 | #define __ASM_ARCH_DMA_H __FILE__ |
15 | 15 | ||
16 | #include <plat/dma.h> | ||
17 | #include <linux/sysdev.h> | 16 | #include <linux/sysdev.h> |
18 | 17 | ||
19 | #define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ | 18 | #define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ |
@@ -51,6 +50,18 @@ enum dma_ch { | |||
51 | DMACH_MAX, /* the end entry */ | 50 | DMACH_MAX, /* the end entry */ |
52 | }; | 51 | }; |
53 | 52 | ||
53 | static inline bool samsung_dma_has_circular(void) | ||
54 | { | ||
55 | return false; | ||
56 | } | ||
57 | |||
58 | static inline bool samsung_dma_is_dmadev(void) | ||
59 | { | ||
60 | return false; | ||
61 | } | ||
62 | |||
63 | #include <plat/dma.h> | ||
64 | |||
54 | #define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */ | 65 | #define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */ |
55 | 66 | ||
56 | /* we have 4 dma channels */ | 67 | /* we have 4 dma channels */ |
@@ -163,7 +174,7 @@ struct s3c2410_dma_chan { | |||
163 | struct s3c2410_dma_client *client; | 174 | struct s3c2410_dma_client *client; |
164 | 175 | ||
165 | /* channel configuration */ | 176 | /* channel configuration */ |
166 | enum s3c2410_dmasrc source; | 177 | enum dma_data_direction source; |
167 | enum dma_ch req_ch; | 178 | enum dma_ch req_ch; |
168 | unsigned long dev_addr; | 179 | unsigned long dev_addr; |
169 | unsigned long load_timeout; | 180 | unsigned long load_timeout; |
@@ -196,9 +207,4 @@ struct s3c2410_dma_chan { | |||
196 | 207 | ||
197 | typedef unsigned long dma_device_t; | 208 | typedef unsigned long dma_device_t; |
198 | 209 | ||
199 | static inline bool s3c_dma_has_circular(void) | ||
200 | { | ||
201 | return false; | ||
202 | } | ||
203 | |||
204 | #endif /* __ASM_ARCH_DMA_H */ | 210 | #endif /* __ASM_ARCH_DMA_H */ |
diff --git a/arch/arm/mach-s3c2410/include/mach/fb.h b/arch/arm/mach-s3c2410/include/mach/fb.h index eee0654eb8f..a957bc8ed44 100644 --- a/arch/arm/mach-s3c2410/include/mach/fb.h +++ b/arch/arm/mach-s3c2410/include/mach/fb.h | |||
@@ -1,74 +1 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/fb.h | #include <plat/fb-s3c2410.h> | |
2 | * | ||
3 | * Copyright (c) 2004 Arnaud Patard <arnaud.patard@rtp-net.org> | ||
4 | * | ||
5 | * Inspired by pxafb.h | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_ARM_FB_H | ||
13 | #define __ASM_ARM_FB_H | ||
14 | |||
15 | #include <mach/regs-lcd.h> | ||
16 | |||
17 | struct s3c2410fb_hw { | ||
18 | unsigned long lcdcon1; | ||
19 | unsigned long lcdcon2; | ||
20 | unsigned long lcdcon3; | ||
21 | unsigned long lcdcon4; | ||
22 | unsigned long lcdcon5; | ||
23 | }; | ||
24 | |||
25 | /* LCD description */ | ||
26 | struct s3c2410fb_display { | ||
27 | /* LCD type */ | ||
28 | unsigned type; | ||
29 | |||
30 | /* Screen size */ | ||
31 | unsigned short width; | ||
32 | unsigned short height; | ||
33 | |||
34 | /* Screen info */ | ||
35 | unsigned short xres; | ||
36 | unsigned short yres; | ||
37 | unsigned short bpp; | ||
38 | |||
39 | unsigned pixclock; /* pixclock in picoseconds */ | ||
40 | unsigned short left_margin; /* value in pixels (TFT) or HCLKs (STN) */ | ||
41 | unsigned short right_margin; /* value in pixels (TFT) or HCLKs (STN) */ | ||
42 | unsigned short hsync_len; /* value in pixels (TFT) or HCLKs (STN) */ | ||
43 | unsigned short upper_margin; /* value in lines (TFT) or 0 (STN) */ | ||
44 | unsigned short lower_margin; /* value in lines (TFT) or 0 (STN) */ | ||
45 | unsigned short vsync_len; /* value in lines (TFT) or 0 (STN) */ | ||
46 | |||
47 | /* lcd configuration registers */ | ||
48 | unsigned long lcdcon5; | ||
49 | }; | ||
50 | |||
51 | struct s3c2410fb_mach_info { | ||
52 | |||
53 | struct s3c2410fb_display *displays; /* attached diplays info */ | ||
54 | unsigned num_displays; /* number of defined displays */ | ||
55 | unsigned default_display; | ||
56 | |||
57 | /* GPIOs */ | ||
58 | |||
59 | unsigned long gpcup; | ||
60 | unsigned long gpcup_mask; | ||
61 | unsigned long gpccon; | ||
62 | unsigned long gpccon_mask; | ||
63 | unsigned long gpdup; | ||
64 | unsigned long gpdup_mask; | ||
65 | unsigned long gpdcon; | ||
66 | unsigned long gpdcon_mask; | ||
67 | |||
68 | /* lpc3600 control register */ | ||
69 | unsigned long lpcsel; | ||
70 | }; | ||
71 | |||
72 | extern void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *); | ||
73 | |||
74 | #endif /* __ASM_ARM_FB_H */ | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-fns.h b/arch/arm/mach-s3c2410/include/mach/gpio-fns.h index bab13920176..c53ad34c657 100644 --- a/arch/arm/mach-s3c2410/include/mach/gpio-fns.h +++ b/arch/arm/mach-s3c2410/include/mach/gpio-fns.h | |||
@@ -1,98 +1 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/gpio-fns.h | #include <plat/gpio-fns.h> | |
2 | * | ||
3 | * Copyright (c) 2003-2009 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C2410 - hardware | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __MACH_GPIO_FNS_H | ||
14 | #define __MACH_GPIO_FNS_H __FILE__ | ||
15 | |||
16 | /* These functions are in the to-be-removed category and it is strongly | ||
17 | * encouraged not to use these in new code. They will be marked deprecated | ||
18 | * very soon. | ||
19 | * | ||
20 | * Most of the functionality can be either replaced by the gpiocfg calls | ||
21 | * for the s3c platform or by the generic GPIOlib API. | ||
22 | * | ||
23 | * As of 2.6.35-rc, these will be removed, with the few drivers using them | ||
24 | * either replaced or given a wrapper until the calls can be removed. | ||
25 | */ | ||
26 | |||
27 | #include <plat/gpio-cfg.h> | ||
28 | |||
29 | static inline void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int cfg) | ||
30 | { | ||
31 | /* 1:1 mapping between cfgpin and setcfg calls at the moment */ | ||
32 | s3c_gpio_cfgpin(pin, cfg); | ||
33 | } | ||
34 | |||
35 | /* external functions for GPIO support | ||
36 | * | ||
37 | * These allow various different clients to access the same GPIO | ||
38 | * registers without conflicting. If your driver only owns the entire | ||
39 | * GPIO register, then it is safe to ioremap/__raw_{read|write} to it. | ||
40 | */ | ||
41 | |||
42 | extern unsigned int s3c2410_gpio_getcfg(unsigned int pin); | ||
43 | |||
44 | /* s3c2410_gpio_getirq | ||
45 | * | ||
46 | * turn the given pin number into the corresponding IRQ number | ||
47 | * | ||
48 | * returns: | ||
49 | * < 0 = no interrupt for this pin | ||
50 | * >=0 = interrupt number for the pin | ||
51 | */ | ||
52 | |||
53 | extern int s3c2410_gpio_getirq(unsigned int pin); | ||
54 | |||
55 | /* s3c2410_gpio_irqfilter | ||
56 | * | ||
57 | * set the irq filtering on the given pin | ||
58 | * | ||
59 | * on = 0 => disable filtering | ||
60 | * 1 => enable filtering | ||
61 | * | ||
62 | * config = S3C2410_EINTFLT_PCLK or S3C2410_EINTFLT_EXTCLK orred with | ||
63 | * width of filter (0 through 63) | ||
64 | * | ||
65 | * | ||
66 | */ | ||
67 | |||
68 | extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, | ||
69 | unsigned int config); | ||
70 | |||
71 | /* s3c2410_gpio_pullup | ||
72 | * | ||
73 | * This call should be replaced with s3c_gpio_setpull(). | ||
74 | * | ||
75 | * As a note, there is currently no distinction between pull-up and pull-down | ||
76 | * in the s3c24xx series devices with only an on/off configuration. | ||
77 | */ | ||
78 | |||
79 | /* s3c2410_gpio_pullup | ||
80 | * | ||
81 | * configure the pull-up control on the given pin | ||
82 | * | ||
83 | * to = 1 => disable the pull-up | ||
84 | * 0 => enable the pull-up | ||
85 | * | ||
86 | * eg; | ||
87 | * | ||
88 | * s3c2410_gpio_pullup(S3C2410_GPB(0), 0); | ||
89 | * s3c2410_gpio_pullup(S3C2410_GPE(8), 0); | ||
90 | */ | ||
91 | |||
92 | extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to); | ||
93 | |||
94 | extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to); | ||
95 | |||
96 | extern unsigned int s3c2410_gpio_getpin(unsigned int pin); | ||
97 | |||
98 | #endif /* __MACH_GPIO_FNS_H */ | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h b/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h index 4f7bf3272e8..019ea86057f 100644 --- a/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h +++ b/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h | |||
@@ -53,7 +53,7 @@ | |||
53 | #define S3C2410_GPIO_M_NR (32) /* technically 2. */ | 53 | #define S3C2410_GPIO_M_NR (32) /* technically 2. */ |
54 | 54 | ||
55 | #if CONFIG_S3C_GPIO_SPACE != 0 | 55 | #if CONFIG_S3C_GPIO_SPACE != 0 |
56 | #error CONFIG_S3C_GPIO_SPACE cannot be zero at the moment | 56 | #error CONFIG_S3C_GPIO_SPACE cannot be nonzero at the moment |
57 | #endif | 57 | #endif |
58 | 58 | ||
59 | #define S3C2410_GPIO_NEXT(__gpio) \ | 59 | #define S3C2410_GPIO_NEXT(__gpio) \ |
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-track.h b/arch/arm/mach-s3c2410/include/mach/gpio-track.h index d67819dde42..c410a078622 100644 --- a/arch/arm/mach-s3c2410/include/mach/gpio-track.h +++ b/arch/arm/mach-s3c2410/include/mach/gpio-track.h | |||
@@ -17,11 +17,11 @@ | |||
17 | 17 | ||
18 | #include <mach/regs-gpio.h> | 18 | #include <mach/regs-gpio.h> |
19 | 19 | ||
20 | extern struct s3c_gpio_chip s3c24xx_gpios[]; | 20 | extern struct samsung_gpio_chip s3c24xx_gpios[]; |
21 | 21 | ||
22 | static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int pin) | 22 | static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int pin) |
23 | { | 23 | { |
24 | struct s3c_gpio_chip *chip; | 24 | struct samsung_gpio_chip *chip; |
25 | 25 | ||
26 | if (pin > S3C_GPIO_END) | 26 | if (pin > S3C_GPIO_END) |
27 | return NULL; | 27 | return NULL; |
diff --git a/arch/arm/mach-s3c2410/include/mach/irqs.h b/arch/arm/mach-s3c2410/include/mach/irqs.h index e5a68ea1311..e53b2177319 100644 --- a/arch/arm/mach-s3c2410/include/mach/irqs.h +++ b/arch/arm/mach-s3c2410/include/mach/irqs.h | |||
@@ -191,9 +191,9 @@ | |||
191 | #define IRQ_LCD_SYSTEM IRQ_S3C2443_LCD2 | 191 | #define IRQ_LCD_SYSTEM IRQ_S3C2443_LCD2 |
192 | 192 | ||
193 | #ifdef CONFIG_CPU_S3C2440 | 193 | #ifdef CONFIG_CPU_S3C2440 |
194 | #define IRQ_S3C244x_AC97 IRQ_S3C2440_AC97 | 194 | #define IRQ_S3C244X_AC97 IRQ_S3C2440_AC97 |
195 | #else | 195 | #else |
196 | #define IRQ_S3C244x_AC97 IRQ_S3C2443_AC97 | 196 | #define IRQ_S3C244X_AC97 IRQ_S3C2443_AC97 |
197 | #endif | 197 | #endif |
198 | 198 | ||
199 | /* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */ | 199 | /* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */ |
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h index 4cf495f813a..78ae807f128 100644 --- a/arch/arm/mach-s3c2410/include/mach/map.h +++ b/arch/arm/mach-s3c2410/include/mach/map.h | |||
@@ -149,6 +149,7 @@ | |||
149 | #define S3C24XX_PA_RTC S3C2410_PA_RTC | 149 | #define S3C24XX_PA_RTC S3C2410_PA_RTC |
150 | #define S3C24XX_PA_ADC S3C2410_PA_ADC | 150 | #define S3C24XX_PA_ADC S3C2410_PA_ADC |
151 | #define S3C24XX_PA_SPI S3C2410_PA_SPI | 151 | #define S3C24XX_PA_SPI S3C2410_PA_SPI |
152 | #define S3C24XX_PA_SPI1 (S3C2410_PA_SPI + S3C2410_SPI1) | ||
152 | #define S3C24XX_PA_SDI S3C2410_PA_SDI | 153 | #define S3C24XX_PA_SDI S3C2410_PA_SDI |
153 | #define S3C24XX_PA_NAND S3C2410_PA_NAND | 154 | #define S3C24XX_PA_NAND S3C2410_PA_NAND |
154 | 155 | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/pm-core.h b/arch/arm/mach-s3c2410/include/mach/pm-core.h index 45eea5210c8..2eef7e6f767 100644 --- a/arch/arm/mach-s3c2410/include/mach/pm-core.h +++ b/arch/arm/mach-s3c2410/include/mach/pm-core.h | |||
@@ -64,4 +64,4 @@ static inline void s3c_pm_arch_update_uart(void __iomem *regs, | |||
64 | } | 64 | } |
65 | 65 | ||
66 | static inline void s3c_pm_restored_gpios(void) { } | 66 | static inline void s3c_pm_restored_gpios(void) { } |
67 | static inline void s3c_pm_saved_gpios(void) { } | 67 | static inline void samsung_pm_saved_gpios(void) { } |
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h index 5e06c726583..c3feff3c048 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h | |||
@@ -65,6 +65,7 @@ | |||
65 | #define S3C2443_CLKDIV0_PREDIV_MASK (3<<4) | 65 | #define S3C2443_CLKDIV0_PREDIV_MASK (3<<4) |
66 | #define S3C2443_CLKDIV0_PREDIV_SHIFT (4) | 66 | #define S3C2443_CLKDIV0_PREDIV_SHIFT (4) |
67 | 67 | ||
68 | #define S3C2416_CLKDIV0_ARMDIV_MASK (7 << 9) | ||
68 | #define S3C2443_CLKDIV0_ARMDIV_MASK (15<<9) | 69 | #define S3C2443_CLKDIV0_ARMDIV_MASK (15<<9) |
69 | #define S3C2443_CLKDIV0_ARMDIV_SHIFT (9) | 70 | #define S3C2443_CLKDIV0_ARMDIV_SHIFT (9) |
70 | #define S3C2443_CLKDIV0_ARMDIV_1 (0<<9) | 71 | #define S3C2443_CLKDIV0_ARMDIV_1 (0<<9) |
@@ -102,6 +103,7 @@ | |||
102 | #define S3C2443_PCLKCON_UART3 (1<<3) | 103 | #define S3C2443_PCLKCON_UART3 (1<<3) |
103 | #define S3C2443_PCLKCON_IIC (1<<4) | 104 | #define S3C2443_PCLKCON_IIC (1<<4) |
104 | #define S3C2443_PCLKCON_SDI (1<<5) | 105 | #define S3C2443_PCLKCON_SDI (1<<5) |
106 | #define S3C2443_PCLKCON_HSSPI (1<<6) | ||
105 | #define S3C2443_PCLKCON_ADC (1<<7) | 107 | #define S3C2443_PCLKCON_ADC (1<<7) |
106 | #define S3C2443_PCLKCON_AC97 (1<<8) | 108 | #define S3C2443_PCLKCON_AC97 (1<<8) |
107 | #define S3C2443_PCLKCON_IIS (1<<9) | 109 | #define S3C2443_PCLKCON_IIS (1<<9) |
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 556c535829f..05a7d16e59f 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <video/platform_lcd.h> | 35 | #include <video/platform_lcd.h> |
36 | 36 | ||
37 | #include <linux/mmc/host.h> | 37 | #include <linux/mmc/host.h> |
38 | #include <linux/export.h> | ||
38 | 39 | ||
39 | #include <asm/mach/arch.h> | 40 | #include <asm/mach/arch.h> |
40 | #include <asm/mach/map.h> | 41 | #include <asm/mach/map.h> |
@@ -696,9 +697,9 @@ static void __init h1940_init(void) | |||
696 | S3C2410_MISCCR_USBSUSPND0 | | 697 | S3C2410_MISCCR_USBSUSPND0 | |
697 | S3C2410_MISCCR_USBSUSPND1, 0x0); | 698 | S3C2410_MISCCR_USBSUSPND1, 0x0); |
698 | 699 | ||
699 | tmp = (0x78 << S3C24XX_PLLCON_MDIVSHIFT) | 700 | tmp = (0x78 << S3C24XX_PLL_MDIV_SHIFT) |
700 | | (0x02 << S3C24XX_PLLCON_PDIVSHIFT) | 701 | | (0x02 << S3C24XX_PLL_PDIV_SHIFT) |
701 | | (0x03 << S3C24XX_PLLCON_SDIVSHIFT); | 702 | | (0x03 << S3C24XX_PLL_SDIV_SHIFT); |
702 | writel(tmp, S3C2410_UPLLCON); | 703 | writel(tmp, S3C2410_UPLLCON); |
703 | 704 | ||
704 | gpio_request(S3C2410_GPC(0), "LCD power"); | 705 | gpio_request(S3C2410_GPC(0), "LCD power"); |
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c index 367d376deb9..45185215625 100644 --- a/arch/arm/mach-s3c2410/mach-qt2410.c +++ b/arch/arm/mach-s3c2410/mach-qt2410.c | |||
@@ -49,6 +49,7 @@ | |||
49 | 49 | ||
50 | #include <mach/regs-gpio.h> | 50 | #include <mach/regs-gpio.h> |
51 | #include <mach/leds-gpio.h> | 51 | #include <mach/leds-gpio.h> |
52 | #include <mach/regs-lcd.h> | ||
52 | #include <plat/regs-serial.h> | 53 | #include <plat/regs-serial.h> |
53 | #include <mach/fb.h> | 54 | #include <mach/fb.h> |
54 | #include <plat/nand.h> | 55 | #include <plat/nand.h> |
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c index 343a540d86a..3d7ebc557a7 100644 --- a/arch/arm/mach-s3c2410/s3c2410.c +++ b/arch/arm/mach-s3c2410/s3c2410.c | |||
@@ -72,8 +72,8 @@ void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |||
72 | 72 | ||
73 | void __init s3c2410_map_io(void) | 73 | void __init s3c2410_map_io(void) |
74 | { | 74 | { |
75 | s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up; | 75 | s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; |
76 | s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up; | 76 | s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; |
77 | 77 | ||
78 | iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc)); | 78 | iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc)); |
79 | } | 79 | } |
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c index c61e3261615..d2a7d5ef3e6 100644 --- a/arch/arm/mach-s3c2412/dma.c +++ b/arch/arm/mach-s3c2412/dma.c | |||
@@ -130,11 +130,11 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = { | |||
130 | 130 | ||
131 | static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan, | 131 | static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan, |
132 | struct s3c24xx_dma_map *map, | 132 | struct s3c24xx_dma_map *map, |
133 | enum s3c2410_dmasrc dir) | 133 | enum dma_data_direction dir) |
134 | { | 134 | { |
135 | unsigned long chsel; | 135 | unsigned long chsel; |
136 | 136 | ||
137 | if (dir == S3C2410_DMASRC_HW) | 137 | if (dir == DMA_FROM_DEVICE) |
138 | chsel = map->channels_rx[0]; | 138 | chsel = map->channels_rx[0]; |
139 | else | 139 | else |
140 | chsel = map->channels[0]; | 140 | chsel = map->channels[0]; |
diff --git a/arch/arm/mach-s3c2412/gpio.c b/arch/arm/mach-s3c2412/gpio.c new file mode 100644 index 00000000000..4526f6ba31a --- /dev/null +++ b/arch/arm/mach-s3c2412/gpio.c | |||
@@ -0,0 +1,62 @@ | |||
1 | /* linux/arch/arm/mach-s3c2412/gpio.c | ||
2 | * | ||
3 | * Copyright (c) 2007 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * http://armlinux.simtec.co.uk/. | ||
7 | * | ||
8 | * S3C2412/S3C2413 specific GPIO support | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/module.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | #include <linux/gpio.h> | ||
20 | |||
21 | #include <asm/mach/arch.h> | ||
22 | #include <asm/mach/map.h> | ||
23 | |||
24 | #include <mach/regs-gpio.h> | ||
25 | #include <mach/hardware.h> | ||
26 | |||
27 | #include <plat/gpio-core.h> | ||
28 | |||
29 | int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state) | ||
30 | { | ||
31 | struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin); | ||
32 | unsigned long offs = pin - chip->chip.base; | ||
33 | unsigned long flags; | ||
34 | unsigned long slpcon; | ||
35 | |||
36 | offs *= 2; | ||
37 | |||
38 | if (pin < S3C2410_GPB(0)) | ||
39 | return -EINVAL; | ||
40 | |||
41 | if (pin >= S3C2410_GPF(0) && | ||
42 | pin <= S3C2410_GPG(16)) | ||
43 | return -EINVAL; | ||
44 | |||
45 | if (pin > S3C2410_GPH(16)) | ||
46 | return -EINVAL; | ||
47 | |||
48 | local_irq_save(flags); | ||
49 | |||
50 | slpcon = __raw_readl(chip->base + 0x0C); | ||
51 | |||
52 | slpcon &= ~(3 << offs); | ||
53 | slpcon |= state << offs; | ||
54 | |||
55 | __raw_writel(slpcon, chip->base + 0x0C); | ||
56 | |||
57 | local_irq_restore(flags); | ||
58 | |||
59 | return 0; | ||
60 | } | ||
61 | |||
62 | EXPORT_SYMBOL(s3c2412_gpio_set_sleepcfg); | ||
diff --git a/arch/arm/mach-s3c2416/Kconfig b/arch/arm/mach-s3c2416/Kconfig index 69b48a7d1db..84c7b03e5a3 100644 --- a/arch/arm/mach-s3c2416/Kconfig +++ b/arch/arm/mach-s3c2416/Kconfig | |||
@@ -13,7 +13,6 @@ config CPU_S3C2416 | |||
13 | select CPU_ARM926T | 13 | select CPU_ARM926T |
14 | select S3C2416_DMA if S3C2410_DMA | 14 | select S3C2416_DMA if S3C2410_DMA |
15 | select CPU_LLSERIAL_S3C2440 | 15 | select CPU_LLSERIAL_S3C2440 |
16 | select S3C_GPIO_PULL_UPDOWN | ||
17 | select SAMSUNG_CLKSRC | 16 | select SAMSUNG_CLKSRC |
18 | select S3C2443_CLOCK | 17 | select S3C2443_CLOCK |
19 | help | 18 | help |
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c index 21a5e81f0ab..afbbe8bc21d 100644 --- a/arch/arm/mach-s3c2416/clock.c +++ b/arch/arm/mach-s3c2416/clock.c | |||
@@ -21,7 +21,6 @@ | |||
21 | #include <plat/cpu.h> | 21 | #include <plat/cpu.h> |
22 | 22 | ||
23 | #include <plat/cpu-freq.h> | 23 | #include <plat/cpu-freq.h> |
24 | #include <plat/pll6553x.h> | ||
25 | #include <plat/pll.h> | 24 | #include <plat/pll.h> |
26 | 25 | ||
27 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
@@ -29,6 +28,14 @@ | |||
29 | #include <mach/regs-clock.h> | 28 | #include <mach/regs-clock.h> |
30 | #include <mach/regs-s3c2443-clock.h> | 29 | #include <mach/regs-s3c2443-clock.h> |
31 | 30 | ||
31 | /* armdiv | ||
32 | * | ||
33 | * this clock is sourced from msysclk and can have a number of | ||
34 | * divider values applied to it to then be fed into armclk. | ||
35 | * The real clock definition is done in s3c2443-clock.c, | ||
36 | * only the armdiv divisor table must be defined here. | ||
37 | */ | ||
38 | |||
32 | static unsigned int armdiv[8] = { | 39 | static unsigned int armdiv[8] = { |
33 | [0] = 1, | 40 | [0] = 1, |
34 | [1] = 2, | 41 | [1] = 2, |
@@ -38,6 +45,32 @@ static unsigned int armdiv[8] = { | |||
38 | [7] = 8, | 45 | [7] = 8, |
39 | }; | 46 | }; |
40 | 47 | ||
48 | static struct clksrc_clk hsspi_eplldiv = { | ||
49 | .clk = { | ||
50 | .name = "hsspi-eplldiv", | ||
51 | .parent = &clk_esysclk.clk, | ||
52 | .ctrlbit = (1 << 14), | ||
53 | .enable = s3c2443_clkcon_enable_s, | ||
54 | }, | ||
55 | .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 24 }, | ||
56 | }; | ||
57 | |||
58 | static struct clk *hsspi_sources[] = { | ||
59 | [0] = &hsspi_eplldiv.clk, | ||
60 | [1] = NULL, /* to fix */ | ||
61 | }; | ||
62 | |||
63 | static struct clksrc_clk hsspi_mux = { | ||
64 | .clk = { | ||
65 | .name = "hsspi-if", | ||
66 | }, | ||
67 | .sources = &(struct clksrc_sources) { | ||
68 | .sources = hsspi_sources, | ||
69 | .nr_sources = ARRAY_SIZE(hsspi_sources), | ||
70 | }, | ||
71 | .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 18 }, | ||
72 | }; | ||
73 | |||
41 | static struct clksrc_clk hsmmc_div[] = { | 74 | static struct clksrc_clk hsmmc_div[] = { |
42 | [0] = { | 75 | [0] = { |
43 | .clk = { | 76 | .clk = { |
@@ -100,20 +133,15 @@ static struct clk hsmmc0_clk = { | |||
100 | .ctrlbit = S3C2416_HCLKCON_HSMMC0, | 133 | .ctrlbit = S3C2416_HCLKCON_HSMMC0, |
101 | }; | 134 | }; |
102 | 135 | ||
103 | static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0) | ||
104 | { | ||
105 | clkcon0 &= 7 << S3C2443_CLKDIV0_ARMDIV_SHIFT; | ||
106 | |||
107 | return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]; | ||
108 | } | ||
109 | |||
110 | void __init_or_cpufreq s3c2416_setup_clocks(void) | 136 | void __init_or_cpufreq s3c2416_setup_clocks(void) |
111 | { | 137 | { |
112 | s3c2443_common_setup_clocks(s3c2416_get_pll, s3c2416_fclk_div); | 138 | s3c2443_common_setup_clocks(s3c2416_get_pll); |
113 | } | 139 | } |
114 | 140 | ||
115 | 141 | ||
116 | static struct clksrc_clk *clksrcs[] __initdata = { | 142 | static struct clksrc_clk *clksrcs[] __initdata = { |
143 | &hsspi_eplldiv, | ||
144 | &hsspi_mux, | ||
117 | &hsmmc_div[0], | 145 | &hsmmc_div[0], |
118 | &hsmmc_div[1], | 146 | &hsmmc_div[1], |
119 | &hsmmc_mux[0], | 147 | &hsmmc_mux[0], |
@@ -131,7 +159,9 @@ void __init s3c2416_init_clocks(int xtal) | |||
131 | 159 | ||
132 | clk_epll.parent = &clk_epllref.clk; | 160 | clk_epll.parent = &clk_epllref.clk; |
133 | 161 | ||
134 | s3c2443_common_init_clocks(xtal, s3c2416_get_pll, s3c2416_fclk_div); | 162 | s3c2443_common_init_clocks(xtal, s3c2416_get_pll, |
163 | armdiv, ARRAY_SIZE(armdiv), | ||
164 | S3C2416_CLKDIV0_ARMDIV_MASK); | ||
135 | 165 | ||
136 | for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) | 166 | for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) |
137 | s3c_register_clksrc(clksrcs[ptr], 1); | 167 | s3c_register_clksrc(clksrcs[ptr], 1); |
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c index 20b3fdfb305..ee214bc83c8 100644 --- a/arch/arm/mach-s3c2416/s3c2416.c +++ b/arch/arm/mach-s3c2416/s3c2416.c | |||
@@ -60,6 +60,7 @@ | |||
60 | #include <plat/iic-core.h> | 60 | #include <plat/iic-core.h> |
61 | #include <plat/fb-core.h> | 61 | #include <plat/fb-core.h> |
62 | #include <plat/nand-core.h> | 62 | #include <plat/nand-core.h> |
63 | #include <plat/adc-core.h> | ||
63 | 64 | ||
64 | static struct map_desc s3c2416_iodesc[] __initdata = { | 65 | static struct map_desc s3c2416_iodesc[] __initdata = { |
65 | IODESC_ENT(WATCHDOG), | 66 | IODESC_ENT(WATCHDOG), |
@@ -97,6 +98,8 @@ int __init s3c2416_init(void) | |||
97 | 98 | ||
98 | s3c_fb_setname("s3c2443-fb"); | 99 | s3c_fb_setname("s3c2443-fb"); |
99 | 100 | ||
101 | s3c_adc_setname("s3c2416-adc"); | ||
102 | |||
100 | #ifdef CONFIG_PM | 103 | #ifdef CONFIG_PM |
101 | register_syscore_ops(&s3c2416_pm_syscore_ops); | 104 | register_syscore_ops(&s3c2416_pm_syscore_ops); |
102 | #endif | 105 | #endif |
@@ -120,8 +123,8 @@ void __init s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |||
120 | 123 | ||
121 | void __init s3c2416_map_io(void) | 124 | void __init s3c2416_map_io(void) |
122 | { | 125 | { |
123 | s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_updown; | 126 | s3c24xx_gpiocfg_default.set_pull = samsung_gpio_setpull_updown; |
124 | s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_updown; | 127 | s3c24xx_gpiocfg_default.get_pull = samsung_gpio_getpull_updown; |
125 | 128 | ||
126 | /* initialize device information early */ | 129 | /* initialize device information early */ |
127 | s3c2416_default_sdhci0(); | 130 | s3c2416_default_sdhci0(); |
diff --git a/arch/arm/mach-s3c2416/setup-sdhci.c b/arch/arm/mach-s3c2416/setup-sdhci.c index ed34fad8f2c..cee53955eb0 100644 --- a/arch/arm/mach-s3c2416/setup-sdhci.c +++ b/arch/arm/mach-s3c2416/setup-sdhci.c | |||
@@ -12,17 +12,7 @@ | |||
12 | * published by the Free Software Foundation. | 12 | * published by the Free Software Foundation. |
13 | */ | 13 | */ |
14 | 14 | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/types.h> | 15 | #include <linux/types.h> |
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/io.h> | ||
20 | |||
21 | #include <linux/mmc/card.h> | ||
22 | #include <linux/mmc/host.h> | ||
23 | |||
24 | #include <plat/regs-sdhci.h> | ||
25 | #include <plat/sdhci.h> | ||
26 | 16 | ||
27 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | 17 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ |
28 | 18 | ||
@@ -32,30 +22,3 @@ char *s3c2416_hsmmc_clksrcs[4] = { | |||
32 | [2] = "hsmmc-if", | 22 | [2] = "hsmmc-if", |
33 | /* [3] = "48m", - note not successfully used yet */ | 23 | /* [3] = "48m", - note not successfully used yet */ |
34 | }; | 24 | }; |
35 | |||
36 | void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev, | ||
37 | void __iomem *r, | ||
38 | struct mmc_ios *ios, | ||
39 | struct mmc_card *card) | ||
40 | { | ||
41 | u32 ctrl2, ctrl3; | ||
42 | |||
43 | ctrl2 = __raw_readl(r + S3C_SDHCI_CONTROL2); | ||
44 | ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; | ||
45 | ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | | ||
46 | S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | | ||
47 | S3C_SDHCI_CTRL2_ENFBCLKRX | | ||
48 | S3C_SDHCI_CTRL2_DFCNT_NONE | | ||
49 | S3C_SDHCI_CTRL2_ENCLKOUTHOLD); | ||
50 | |||
51 | if (ios->clock < 25 * 1000000) | ||
52 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | | ||
53 | S3C_SDHCI_CTRL3_FCSEL2 | | ||
54 | S3C_SDHCI_CTRL3_FCSEL1 | | ||
55 | S3C_SDHCI_CTRL3_FCSEL0); | ||
56 | else | ||
57 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); | ||
58 | |||
59 | __raw_writel(ctrl2, r + S3C_SDHCI_CONTROL2); | ||
60 | __raw_writel(ctrl3, r + S3C_SDHCI_CONTROL3); | ||
61 | } | ||
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig index c461fb8e15c..914e620f125 100644 --- a/arch/arm/mach-s3c2440/Kconfig +++ b/arch/arm/mach-s3c2440/Kconfig | |||
@@ -5,7 +5,6 @@ | |||
5 | config CPU_S3C2440 | 5 | config CPU_S3C2440 |
6 | bool | 6 | bool |
7 | select CPU_ARM920T | 7 | select CPU_ARM920T |
8 | select S3C_GPIO_PULL_UP | ||
9 | select S3C2410_CLOCK | 8 | select S3C2410_CLOCK |
10 | select S3C2410_PM if PM | 9 | select S3C2410_PM if PM |
11 | select S3C2440_DMA if S3C2410_DMA | 10 | select S3C2440_DMA if S3C2410_DMA |
@@ -17,7 +16,6 @@ config CPU_S3C2440 | |||
17 | config CPU_S3C2442 | 16 | config CPU_S3C2442 |
18 | bool | 17 | bool |
19 | select CPU_ARM920T | 18 | select CPU_ARM920T |
20 | select S3C_GPIO_PULL_DOWN | ||
21 | select S3C2410_CLOCK | 19 | select S3C2410_CLOCK |
22 | select S3C2410_PM if PM | 20 | select S3C2410_PM if PM |
23 | select CPU_S3C244X | 21 | select CPU_S3C244X |
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c index 684dbb3567f..0d3453bf567 100644 --- a/arch/arm/mach-s3c2440/mach-rx1950.c +++ b/arch/arm/mach-s3c2440/mach-rx1950.c | |||
@@ -43,6 +43,7 @@ | |||
43 | 43 | ||
44 | #include <mach/regs-gpio.h> | 44 | #include <mach/regs-gpio.h> |
45 | #include <mach/regs-gpioj.h> | 45 | #include <mach/regs-gpioj.h> |
46 | #include <mach/regs-lcd.h> | ||
46 | #include <mach/h1940.h> | 47 | #include <mach/h1940.h> |
47 | #include <mach/fb.h> | 48 | #include <mach/fb.h> |
48 | 49 | ||
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c index 2270d336021..37f8cc6aabd 100644 --- a/arch/arm/mach-s3c2440/s3c2440.c +++ b/arch/arm/mach-s3c2440/s3c2440.c | |||
@@ -70,6 +70,6 @@ void __init s3c2440_map_io(void) | |||
70 | { | 70 | { |
71 | s3c244x_map_io(); | 71 | s3c244x_map_io(); |
72 | 72 | ||
73 | s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up; | 73 | s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; |
74 | s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up; | 74 | s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; |
75 | } | 75 | } |
diff --git a/arch/arm/mach-s3c2440/s3c2442.c b/arch/arm/mach-s3c2440/s3c2442.c index 6f2b65e6e06..2c822e09392 100644 --- a/arch/arm/mach-s3c2440/s3c2442.c +++ b/arch/arm/mach-s3c2440/s3c2442.c | |||
@@ -182,6 +182,6 @@ void __init s3c2442_map_io(void) | |||
182 | { | 182 | { |
183 | s3c244x_map_io(); | 183 | s3c244x_map_io(); |
184 | 184 | ||
185 | s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1down; | 185 | s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1down; |
186 | s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1down; | 186 | s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1down; |
187 | } | 187 | } |
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig index d8eb86823df..8814031516c 100644 --- a/arch/arm/mach-s3c2443/Kconfig +++ b/arch/arm/mach-s3c2443/Kconfig | |||
@@ -10,7 +10,6 @@ config CPU_S3C2443 | |||
10 | select CPU_LLSERIAL_S3C2440 | 10 | select CPU_LLSERIAL_S3C2440 |
11 | select SAMSUNG_CLKSRC | 11 | select SAMSUNG_CLKSRC |
12 | select S3C2443_CLOCK | 12 | select S3C2443_CLOCK |
13 | select S3C_GPIO_PULL_S3C2443 | ||
14 | help | 13 | help |
15 | Support for the S3C2443 SoC from the S3C24XX line | 14 | Support for the S3C2443 SoC from the S3C24XX line |
16 | 15 | ||
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c index 38058af4897..1c2c088aa2e 100644 --- a/arch/arm/mach-s3c2443/clock.c +++ b/arch/arm/mach-s3c2443/clock.c | |||
@@ -57,18 +57,14 @@ | |||
57 | 57 | ||
58 | /* clock selections */ | 58 | /* clock selections */ |
59 | 59 | ||
60 | static struct clk clk_i2s_ext = { | ||
61 | .name = "i2s-ext", | ||
62 | }; | ||
63 | |||
64 | /* armdiv | 60 | /* armdiv |
65 | * | 61 | * |
66 | * this clock is sourced from msysclk and can have a number of | 62 | * this clock is sourced from msysclk and can have a number of |
67 | * divider values applied to it to then be fed into armclk. | 63 | * divider values applied to it to then be fed into armclk. |
64 | * The real clock definition is done in s3c2443-clock.c, | ||
65 | * only the armdiv divisor table must be defined here. | ||
68 | */ | 66 | */ |
69 | 67 | ||
70 | /* armdiv divisor table */ | ||
71 | |||
72 | static unsigned int armdiv[16] = { | 68 | static unsigned int armdiv[16] = { |
73 | [S3C2443_CLKDIV0_ARMDIV_1 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 1, | 69 | [S3C2443_CLKDIV0_ARMDIV_1 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 1, |
74 | [S3C2443_CLKDIV0_ARMDIV_2 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 2, | 70 | [S3C2443_CLKDIV0_ARMDIV_2 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 2, |
@@ -80,92 +76,6 @@ static unsigned int armdiv[16] = { | |||
80 | [S3C2443_CLKDIV0_ARMDIV_16 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 16, | 76 | [S3C2443_CLKDIV0_ARMDIV_16 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 16, |
81 | }; | 77 | }; |
82 | 78 | ||
83 | static inline unsigned int s3c2443_fclk_div(unsigned long clkcon0) | ||
84 | { | ||
85 | clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK; | ||
86 | |||
87 | return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]; | ||
88 | } | ||
89 | |||
90 | static unsigned long s3c2443_armclk_roundrate(struct clk *clk, | ||
91 | unsigned long rate) | ||
92 | { | ||
93 | unsigned long parent = clk_get_rate(clk->parent); | ||
94 | unsigned long calc; | ||
95 | unsigned best = 256; /* bigger than any value */ | ||
96 | unsigned div; | ||
97 | int ptr; | ||
98 | |||
99 | for (ptr = 0; ptr < ARRAY_SIZE(armdiv); ptr++) { | ||
100 | div = armdiv[ptr]; | ||
101 | calc = parent / div; | ||
102 | if (calc <= rate && div < best) | ||
103 | best = div; | ||
104 | } | ||
105 | |||
106 | return parent / best; | ||
107 | } | ||
108 | |||
109 | static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate) | ||
110 | { | ||
111 | unsigned long parent = clk_get_rate(clk->parent); | ||
112 | unsigned long calc; | ||
113 | unsigned div; | ||
114 | unsigned best = 256; /* bigger than any value */ | ||
115 | int ptr; | ||
116 | int val = -1; | ||
117 | |||
118 | for (ptr = 0; ptr < ARRAY_SIZE(armdiv); ptr++) { | ||
119 | div = armdiv[ptr]; | ||
120 | calc = parent / div; | ||
121 | if (calc <= rate && div < best) { | ||
122 | best = div; | ||
123 | val = ptr; | ||
124 | } | ||
125 | } | ||
126 | |||
127 | if (val >= 0) { | ||
128 | unsigned long clkcon0; | ||
129 | |||
130 | clkcon0 = __raw_readl(S3C2443_CLKDIV0); | ||
131 | clkcon0 &= ~S3C2443_CLKDIV0_ARMDIV_MASK; | ||
132 | clkcon0 |= val << S3C2443_CLKDIV0_ARMDIV_SHIFT; | ||
133 | __raw_writel(clkcon0, S3C2443_CLKDIV0); | ||
134 | } | ||
135 | |||
136 | return (val == -1) ? -EINVAL : 0; | ||
137 | } | ||
138 | |||
139 | static struct clk clk_armdiv = { | ||
140 | .name = "armdiv", | ||
141 | .parent = &clk_msysclk.clk, | ||
142 | .ops = &(struct clk_ops) { | ||
143 | .round_rate = s3c2443_armclk_roundrate, | ||
144 | .set_rate = s3c2443_armclk_setrate, | ||
145 | }, | ||
146 | }; | ||
147 | |||
148 | /* armclk | ||
149 | * | ||
150 | * this is the clock fed into the ARM core itself, from armdiv or from hclk. | ||
151 | */ | ||
152 | |||
153 | static struct clk *clk_arm_sources[] = { | ||
154 | [0] = &clk_armdiv, | ||
155 | [1] = &clk_h, | ||
156 | }; | ||
157 | |||
158 | static struct clksrc_clk clk_arm = { | ||
159 | .clk = { | ||
160 | .name = "armclk", | ||
161 | }, | ||
162 | .sources = &(struct clksrc_sources) { | ||
163 | .sources = clk_arm_sources, | ||
164 | .nr_sources = ARRAY_SIZE(clk_arm_sources), | ||
165 | }, | ||
166 | .reg_src = { .reg = S3C2443_CLKDIV0, .size = 1, .shift = 13 }, | ||
167 | }; | ||
168 | |||
169 | /* hsspi | 79 | /* hsspi |
170 | * | 80 | * |
171 | * high-speed spi clock, sourced from esysclk | 81 | * high-speed spi clock, sourced from esysclk |
@@ -173,7 +83,7 @@ static struct clksrc_clk clk_arm = { | |||
173 | 83 | ||
174 | static struct clksrc_clk clk_hsspi = { | 84 | static struct clksrc_clk clk_hsspi = { |
175 | .clk = { | 85 | .clk = { |
176 | .name = "hsspi", | 86 | .name = "hsspi-if", |
177 | .parent = &clk_esysclk.clk, | 87 | .parent = &clk_esysclk.clk, |
178 | .ctrlbit = S3C2443_SCLKCON_HSSPICLK, | 88 | .ctrlbit = S3C2443_SCLKCON_HSSPICLK, |
179 | .enable = s3c2443_clkcon_enable_s, | 89 | .enable = s3c2443_clkcon_enable_s, |
@@ -235,48 +145,6 @@ static struct clk clk_hsmmc = { | |||
235 | }, | 145 | }, |
236 | }; | 146 | }; |
237 | 147 | ||
238 | /* i2s_eplldiv | ||
239 | * | ||
240 | * This clock is the output from the I2S divisor of ESYSCLK, and is separate | ||
241 | * from the mux that comes after it (cannot merge into one single clock) | ||
242 | */ | ||
243 | |||
244 | static struct clksrc_clk clk_i2s_eplldiv = { | ||
245 | .clk = { | ||
246 | .name = "i2s-eplldiv", | ||
247 | .parent = &clk_esysclk.clk, | ||
248 | }, | ||
249 | .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 12, }, | ||
250 | }; | ||
251 | |||
252 | /* i2s-ref | ||
253 | * | ||
254 | * i2s bus reference clock, selectable from external, esysclk or epllref | ||
255 | * | ||
256 | * Note, this used to be two clocks, but was compressed into one. | ||
257 | */ | ||
258 | |||
259 | struct clk *clk_i2s_srclist[] = { | ||
260 | [0] = &clk_i2s_eplldiv.clk, | ||
261 | [1] = &clk_i2s_ext, | ||
262 | [2] = &clk_epllref.clk, | ||
263 | [3] = &clk_epllref.clk, | ||
264 | }; | ||
265 | |||
266 | static struct clksrc_clk clk_i2s = { | ||
267 | .clk = { | ||
268 | .name = "i2s-if", | ||
269 | .ctrlbit = S3C2443_SCLKCON_I2SCLK, | ||
270 | .enable = s3c2443_clkcon_enable_s, | ||
271 | |||
272 | }, | ||
273 | .sources = &(struct clksrc_sources) { | ||
274 | .sources = clk_i2s_srclist, | ||
275 | .nr_sources = ARRAY_SIZE(clk_i2s_srclist), | ||
276 | }, | ||
277 | .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 14 }, | ||
278 | }; | ||
279 | |||
280 | /* standard clock definitions */ | 148 | /* standard clock definitions */ |
281 | 149 | ||
282 | static struct clk init_clocks_off[] = { | 150 | static struct clk init_clocks_off[] = { |
@@ -286,11 +154,6 @@ static struct clk init_clocks_off[] = { | |||
286 | .enable = s3c2443_clkcon_enable_p, | 154 | .enable = s3c2443_clkcon_enable_p, |
287 | .ctrlbit = S3C2443_PCLKCON_SDI, | 155 | .ctrlbit = S3C2443_PCLKCON_SDI, |
288 | }, { | 156 | }, { |
289 | .name = "iis", | ||
290 | .parent = &clk_p, | ||
291 | .enable = s3c2443_clkcon_enable_p, | ||
292 | .ctrlbit = S3C2443_PCLKCON_IIS, | ||
293 | }, { | ||
294 | .name = "spi", | 157 | .name = "spi", |
295 | .devname = "s3c2410-spi.0", | 158 | .devname = "s3c2410-spi.0", |
296 | .parent = &clk_p, | 159 | .parent = &clk_p, |
@@ -305,27 +168,20 @@ static struct clk init_clocks_off[] = { | |||
305 | } | 168 | } |
306 | }; | 169 | }; |
307 | 170 | ||
308 | static struct clk init_clocks[] = { | ||
309 | }; | ||
310 | |||
311 | /* clocks to add straight away */ | 171 | /* clocks to add straight away */ |
312 | 172 | ||
313 | static struct clksrc_clk *clksrcs[] __initdata = { | 173 | static struct clksrc_clk *clksrcs[] __initdata = { |
314 | &clk_arm, | ||
315 | &clk_i2s_eplldiv, | ||
316 | &clk_i2s, | ||
317 | &clk_hsspi, | 174 | &clk_hsspi, |
318 | &clk_hsmmc_div, | 175 | &clk_hsmmc_div, |
319 | }; | 176 | }; |
320 | 177 | ||
321 | static struct clk *clks[] __initdata = { | 178 | static struct clk *clks[] __initdata = { |
322 | &clk_hsmmc, | 179 | &clk_hsmmc, |
323 | &clk_armdiv, | ||
324 | }; | 180 | }; |
325 | 181 | ||
326 | void __init_or_cpufreq s3c2443_setup_clocks(void) | 182 | void __init_or_cpufreq s3c2443_setup_clocks(void) |
327 | { | 183 | { |
328 | s3c2443_common_setup_clocks(s3c2443_get_mpll, s3c2443_fclk_div); | 184 | s3c2443_common_setup_clocks(s3c2443_get_mpll); |
329 | } | 185 | } |
330 | 186 | ||
331 | void __init s3c2443_init_clocks(int xtal) | 187 | void __init s3c2443_init_clocks(int xtal) |
@@ -336,7 +192,9 @@ void __init s3c2443_init_clocks(int xtal) | |||
336 | clk_epll.rate = s3c2443_get_epll(epllcon, xtal); | 192 | clk_epll.rate = s3c2443_get_epll(epllcon, xtal); |
337 | clk_epll.parent = &clk_epllref.clk; | 193 | clk_epll.parent = &clk_epllref.clk; |
338 | 194 | ||
339 | s3c2443_common_init_clocks(xtal, s3c2443_get_mpll, s3c2443_fclk_div); | 195 | s3c2443_common_init_clocks(xtal, s3c2443_get_mpll, |
196 | armdiv, ARRAY_SIZE(armdiv), | ||
197 | S3C2443_CLKDIV0_ARMDIV_MASK); | ||
340 | 198 | ||
341 | s3c2443_setup_clocks(); | 199 | s3c2443_setup_clocks(); |
342 | 200 | ||
@@ -345,10 +203,6 @@ void __init s3c2443_init_clocks(int xtal) | |||
345 | for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) | 203 | for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) |
346 | s3c_register_clksrc(clksrcs[ptr], 1); | 204 | s3c_register_clksrc(clksrcs[ptr], 1); |
347 | 205 | ||
348 | /* register clocks from clock array */ | ||
349 | |||
350 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | ||
351 | |||
352 | /* We must be careful disabling the clocks we are not intending to | 206 | /* We must be careful disabling the clocks we are not intending to |
353 | * be using at boot time, as subsystems such as the LCD which do | 207 | * be using at boot time, as subsystems such as the LCD which do |
354 | * their own DMA requests to the bus can cause the system to lockup | 208 | * their own DMA requests to the bus can cause the system to lockup |
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c index e6a28ba52c7..a22b771b0f3 100644 --- a/arch/arm/mach-s3c2443/s3c2443.c +++ b/arch/arm/mach-s3c2443/s3c2443.c | |||
@@ -41,6 +41,7 @@ | |||
41 | #include <plat/cpu.h> | 41 | #include <plat/cpu.h> |
42 | #include <plat/fb-core.h> | 42 | #include <plat/fb-core.h> |
43 | #include <plat/nand-core.h> | 43 | #include <plat/nand-core.h> |
44 | #include <plat/adc-core.h> | ||
44 | 45 | ||
45 | static struct map_desc s3c2443_iodesc[] __initdata = { | 46 | static struct map_desc s3c2443_iodesc[] __initdata = { |
46 | IODESC_ENT(WATCHDOG), | 47 | IODESC_ENT(WATCHDOG), |
@@ -70,6 +71,8 @@ int __init s3c2443_init(void) | |||
70 | s3c_nand_setname("s3c2412-nand"); | 71 | s3c_nand_setname("s3c2412-nand"); |
71 | s3c_fb_setname("s3c2443-fb"); | 72 | s3c_fb_setname("s3c2443-fb"); |
72 | 73 | ||
74 | s3c_adc_setname("s3c2443-adc"); | ||
75 | |||
73 | /* change WDT IRQ number */ | 76 | /* change WDT IRQ number */ |
74 | s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; | 77 | s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; |
75 | s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; | 78 | s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; |
@@ -90,8 +93,8 @@ void __init s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |||
90 | 93 | ||
91 | void __init s3c2443_map_io(void) | 94 | void __init s3c2443_map_io(void) |
92 | { | 95 | { |
93 | s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_s3c2443; | 96 | s3c24xx_gpiocfg_default.set_pull = s3c2443_gpio_setpull; |
94 | s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_s3c2443; | 97 | s3c24xx_gpiocfg_default.get_pull = s3c2443_gpio_getpull; |
95 | 98 | ||
96 | iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc)); | 99 | iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc)); |
97 | } | 100 | } |
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index f057b6ae4f9..5552e048c2b 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig | |||
@@ -288,5 +288,6 @@ config MACH_WLF_CRAGG_6410 | |||
288 | select S3C_DEV_RTC | 288 | select S3C_DEV_RTC |
289 | select S3C64XX_DEV_SPI | 289 | select S3C64XX_DEV_SPI |
290 | select S3C24XX_GPIO_EXTRA128 | 290 | select S3C24XX_GPIO_EXTRA128 |
291 | select I2C | ||
291 | help | 292 | help |
292 | Machine support for the Wolfson Cragganmore S3C6410 variant. | 293 | Machine support for the Wolfson Cragganmore S3C6410 variant. |
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index 61b4034a0c2..cfc0b994180 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile | |||
@@ -13,7 +13,6 @@ obj- := | |||
13 | # Core files | 13 | # Core files |
14 | obj-y += cpu.o | 14 | obj-y += cpu.o |
15 | obj-y += clock.o | 15 | obj-y += clock.o |
16 | obj-y += gpiolib.o | ||
17 | 16 | ||
18 | # Core support for S3C6400 system | 17 | # Core support for S3C6400 system |
19 | 18 | ||
@@ -55,12 +54,10 @@ obj-$(CONFIG_MACH_HMT) += mach-hmt.o | |||
55 | obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o | 54 | obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o |
56 | obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o | 55 | obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o |
57 | obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o | 56 | obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o |
58 | obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o | 57 | obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o |
59 | 58 | ||
60 | # device support | 59 | # device support |
61 | 60 | ||
62 | obj-y += dev-uart.o | 61 | obj-y += dev-uart.o |
63 | obj-y += dev-audio.o | 62 | obj-y += dev-audio.o |
64 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | 63 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o |
65 | obj-$(CONFIG_S3C64XX_DEV_TS) += dev-ts.o | ||
66 | obj-$(CONFIG_S3C64XX_DEV_ONENAND1) += dev-onenand1.o | ||
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 8cf39e33579..39c238d7a3d 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c | |||
@@ -25,13 +25,13 @@ | |||
25 | 25 | ||
26 | #include <mach/regs-sys.h> | 26 | #include <mach/regs-sys.h> |
27 | #include <mach/regs-clock.h> | 27 | #include <mach/regs-clock.h> |
28 | #include <mach/pll.h> | ||
29 | 28 | ||
30 | #include <plat/cpu.h> | 29 | #include <plat/cpu.h> |
31 | #include <plat/devs.h> | 30 | #include <plat/devs.h> |
32 | #include <plat/cpu-freq.h> | 31 | #include <plat/cpu-freq.h> |
33 | #include <plat/clock.h> | 32 | #include <plat/clock.h> |
34 | #include <plat/clock-clksrc.h> | 33 | #include <plat/clock-clksrc.h> |
34 | #include <plat/pll.h> | ||
35 | 35 | ||
36 | /* fin_apll, fin_mpll and fin_epll are all the same clock, which we call | 36 | /* fin_apll, fin_mpll and fin_epll are all the same clock, which we call |
37 | * ext_xtal_mux for want of an actual name from the manual. | 37 | * ext_xtal_mux for want of an actual name from the manual. |
@@ -735,7 +735,8 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) | |||
735 | /* For now assume the mux always selects the crystal */ | 735 | /* For now assume the mux always selects the crystal */ |
736 | clk_ext_xtal_mux.parent = xtal_clk; | 736 | clk_ext_xtal_mux.parent = xtal_clk; |
737 | 737 | ||
738 | epll = s3c6400_get_epll(xtal); | 738 | epll = s3c_get_pll6553x(xtal, __raw_readl(S3C_EPLL_CON0), |
739 | __raw_readl(S3C_EPLL_CON1)); | ||
739 | mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON)); | 740 | mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON)); |
740 | apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON)); | 741 | apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON)); |
741 | 742 | ||
@@ -744,7 +745,13 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) | |||
744 | printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n", | 745 | printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n", |
745 | apll, mpll, epll); | 746 | apll, mpll, epll); |
746 | 747 | ||
747 | hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); | 748 | if(__raw_readl(S3C64XX_OTHERS) & S3C64XX_OTHERS_SYNCMUXSEL) |
749 | /* Synchronous mode */ | ||
750 | hclk2 = apll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); | ||
751 | else | ||
752 | /* Asynchronous mode */ | ||
753 | hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); | ||
754 | |||
748 | hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK); | 755 | hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK); |
749 | pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK); | 756 | pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK); |
750 | 757 | ||
diff --git a/arch/arm/mach-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c index c7047838e11..de085b798aa 100644 --- a/arch/arm/mach-s3c64xx/cpu.c +++ b/arch/arm/mach-s3c64xx/cpu.c | |||
@@ -34,8 +34,8 @@ | |||
34 | #include <plat/devs.h> | 34 | #include <plat/devs.h> |
35 | #include <plat/clock.h> | 35 | #include <plat/clock.h> |
36 | 36 | ||
37 | #include <mach/s3c6400.h> | 37 | #include <plat/s3c6400.h> |
38 | #include <mach/s3c6410.h> | 38 | #include <plat/s3c6410.h> |
39 | 39 | ||
40 | /* table of supported CPUs */ | 40 | /* table of supported CPUs */ |
41 | 41 | ||
diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index cad67022fa2..93470b158a4 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
14 | #include <linux/dma-mapping.h> | 14 | #include <linux/dma-mapping.h> |
15 | #include <linux/gpio.h> | 15 | #include <linux/gpio.h> |
16 | #include <linux/export.h> | ||
16 | 17 | ||
17 | #include <mach/irqs.h> | 18 | #include <mach/irqs.h> |
18 | #include <mach/map.h> | 19 | #include <mach/map.h> |
diff --git a/arch/arm/mach-s3c64xx/dev-onenand1.c b/arch/arm/mach-s3c64xx/dev-onenand1.c deleted file mode 100644 index 999f9e17a1e..00000000000 --- a/arch/arm/mach-s3c64xx/dev-onenand1.c +++ /dev/null | |||
@@ -1,53 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-s3c64xx/dev-onenand1.c | ||
3 | * | ||
4 | * Copyright (c) 2008-2010 Samsung Electronics | ||
5 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
6 | * | ||
7 | * S3C64XX series device definition for OneNAND devices | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/mtd/mtd.h> | ||
17 | #include <linux/mtd/onenand.h> | ||
18 | |||
19 | #include <mach/irqs.h> | ||
20 | #include <mach/map.h> | ||
21 | |||
22 | #include <plat/devs.h> | ||
23 | |||
24 | static struct resource s3c64xx_onenand1_resources[] = { | ||
25 | [0] = { | ||
26 | .start = S3C64XX_PA_ONENAND1, | ||
27 | .end = S3C64XX_PA_ONENAND1 + 0x400 - 1, | ||
28 | .flags = IORESOURCE_MEM, | ||
29 | }, | ||
30 | [1] = { | ||
31 | .start = S3C64XX_PA_ONENAND1_BUF, | ||
32 | .end = S3C64XX_PA_ONENAND1_BUF + S3C64XX_SZ_ONENAND1_BUF - 1, | ||
33 | .flags = IORESOURCE_MEM, | ||
34 | }, | ||
35 | [2] = { | ||
36 | .start = IRQ_ONENAND1, | ||
37 | .end = IRQ_ONENAND1, | ||
38 | .flags = IORESOURCE_IRQ, | ||
39 | }, | ||
40 | }; | ||
41 | |||
42 | struct platform_device s3c64xx_device_onenand1 = { | ||
43 | .name = "samsung-onenand", | ||
44 | .id = 1, | ||
45 | .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources), | ||
46 | .resource = s3c64xx_onenand1_resources, | ||
47 | }; | ||
48 | |||
49 | void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata) | ||
50 | { | ||
51 | s3c_set_platdata(pdata, sizeof(struct onenand_platform_data), | ||
52 | &s3c64xx_device_onenand1); | ||
53 | } | ||
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c index 204bfafe4bf..17d62f4f820 100644 --- a/arch/arm/mach-s3c64xx/dma.c +++ b/arch/arm/mach-s3c64xx/dma.c | |||
@@ -147,14 +147,14 @@ static void s3c64xx_dma_fill_lli(struct s3c2410_dma_chan *chan, | |||
147 | u32 control0, control1; | 147 | u32 control0, control1; |
148 | 148 | ||
149 | switch (chan->source) { | 149 | switch (chan->source) { |
150 | case S3C2410_DMASRC_HW: | 150 | case DMA_FROM_DEVICE: |
151 | src = chan->dev_addr; | 151 | src = chan->dev_addr; |
152 | dst = data; | 152 | dst = data; |
153 | control0 = PL080_CONTROL_SRC_AHB2; | 153 | control0 = PL080_CONTROL_SRC_AHB2; |
154 | control0 |= PL080_CONTROL_DST_INCR; | 154 | control0 |= PL080_CONTROL_DST_INCR; |
155 | break; | 155 | break; |
156 | 156 | ||
157 | case S3C2410_DMASRC_MEM: | 157 | case DMA_TO_DEVICE: |
158 | src = data; | 158 | src = data; |
159 | dst = chan->dev_addr; | 159 | dst = chan->dev_addr; |
160 | control0 = PL080_CONTROL_DST_AHB2; | 160 | control0 = PL080_CONTROL_DST_AHB2; |
@@ -416,7 +416,7 @@ EXPORT_SYMBOL(s3c2410_dma_enqueue); | |||
416 | 416 | ||
417 | 417 | ||
418 | int s3c2410_dma_devconfig(enum dma_ch channel, | 418 | int s3c2410_dma_devconfig(enum dma_ch channel, |
419 | enum s3c2410_dmasrc source, | 419 | enum dma_data_direction source, |
420 | unsigned long devaddr) | 420 | unsigned long devaddr) |
421 | { | 421 | { |
422 | struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); | 422 | struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); |
@@ -437,11 +437,11 @@ int s3c2410_dma_devconfig(enum dma_ch channel, | |||
437 | pr_debug("%s: peripheral %d\n", __func__, peripheral); | 437 | pr_debug("%s: peripheral %d\n", __func__, peripheral); |
438 | 438 | ||
439 | switch (source) { | 439 | switch (source) { |
440 | case S3C2410_DMASRC_HW: | 440 | case DMA_FROM_DEVICE: |
441 | config = 2 << PL080_CONFIG_FLOW_CONTROL_SHIFT; | 441 | config = 2 << PL080_CONFIG_FLOW_CONTROL_SHIFT; |
442 | config |= peripheral << PL080_CONFIG_SRC_SEL_SHIFT; | 442 | config |= peripheral << PL080_CONFIG_SRC_SEL_SHIFT; |
443 | break; | 443 | break; |
444 | case S3C2410_DMASRC_MEM: | 444 | case DMA_TO_DEVICE: |
445 | config = 1 << PL080_CONFIG_FLOW_CONTROL_SHIFT; | 445 | config = 1 << PL080_CONFIG_FLOW_CONTROL_SHIFT; |
446 | config |= peripheral << PL080_CONFIG_DST_SEL_SHIFT; | 446 | config |= peripheral << PL080_CONFIG_DST_SEL_SHIFT; |
447 | break; | 447 | break; |
@@ -740,7 +740,7 @@ static int __init s3c64xx_dma_init(void) | |||
740 | } | 740 | } |
741 | 741 | ||
742 | /* Set all DMA configuration to be DMA, not SDMA */ | 742 | /* Set all DMA configuration to be DMA, not SDMA */ |
743 | writel(0xffffff, S3C_SYSREG(0x110)); | 743 | writel(0xffffff, S3C64XX_SDMA_SEL); |
744 | 744 | ||
745 | /* Register standard DMA controllers */ | 745 | /* Register standard DMA controllers */ |
746 | s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000); | 746 | s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000); |
diff --git a/arch/arm/mach-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c deleted file mode 100644 index 92b09085caa..00000000000 --- a/arch/arm/mach-s3c64xx/gpiolib.c +++ /dev/null | |||
@@ -1,290 +0,0 @@ | |||
1 | /* arch/arm/plat-s3c64xx/gpiolib.c | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C64XX - GPIOlib support | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/irq.h> | ||
17 | #include <linux/io.h> | ||
18 | #include <linux/gpio.h> | ||
19 | |||
20 | #include <mach/map.h> | ||
21 | |||
22 | #include <plat/gpio-core.h> | ||
23 | #include <plat/gpio-cfg.h> | ||
24 | #include <plat/gpio-cfg-helpers.h> | ||
25 | #include <mach/regs-gpio.h> | ||
26 | |||
27 | /* GPIO bank summary: | ||
28 | * | ||
29 | * Bank GPIOs Style SlpCon ExtInt Group | ||
30 | * A 8 4Bit Yes 1 | ||
31 | * B 7 4Bit Yes 1 | ||
32 | * C 8 4Bit Yes 2 | ||
33 | * D 5 4Bit Yes 3 | ||
34 | * E 5 4Bit Yes None | ||
35 | * F 16 2Bit Yes 4 [1] | ||
36 | * G 7 4Bit Yes 5 | ||
37 | * H 10 4Bit[2] Yes 6 | ||
38 | * I 16 2Bit Yes None | ||
39 | * J 12 2Bit Yes None | ||
40 | * K 16 4Bit[2] No None | ||
41 | * L 15 4Bit[2] No None | ||
42 | * M 6 4Bit No IRQ_EINT | ||
43 | * N 16 2Bit No IRQ_EINT | ||
44 | * O 16 2Bit Yes 7 | ||
45 | * P 15 2Bit Yes 8 | ||
46 | * Q 9 2Bit Yes 9 | ||
47 | * | ||
48 | * [1] BANKF pins 14,15 do not form part of the external interrupt sources | ||
49 | * [2] BANK has two control registers, GPxCON0 and GPxCON1 | ||
50 | */ | ||
51 | |||
52 | static struct s3c_gpio_cfg gpio_4bit_cfg_noint = { | ||
53 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, | ||
54 | .get_config = s3c_gpio_getcfg_s3c64xx_4bit, | ||
55 | .set_pull = s3c_gpio_setpull_updown, | ||
56 | .get_pull = s3c_gpio_getpull_updown, | ||
57 | }; | ||
58 | |||
59 | static struct s3c_gpio_cfg gpio_4bit_cfg_eint0111 = { | ||
60 | .cfg_eint = 7, | ||
61 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, | ||
62 | .get_config = s3c_gpio_getcfg_s3c64xx_4bit, | ||
63 | .set_pull = s3c_gpio_setpull_updown, | ||
64 | .get_pull = s3c_gpio_getpull_updown, | ||
65 | }; | ||
66 | |||
67 | static struct s3c_gpio_cfg gpio_4bit_cfg_eint0011 = { | ||
68 | .cfg_eint = 3, | ||
69 | .get_config = s3c_gpio_getcfg_s3c64xx_4bit, | ||
70 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, | ||
71 | .set_pull = s3c_gpio_setpull_updown, | ||
72 | .get_pull = s3c_gpio_getpull_updown, | ||
73 | }; | ||
74 | |||
75 | static int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin) | ||
76 | { | ||
77 | return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO; | ||
78 | } | ||
79 | |||
80 | static struct s3c_gpio_chip gpio_4bit[] = { | ||
81 | { | ||
82 | .base = S3C64XX_GPA_BASE, | ||
83 | .config = &gpio_4bit_cfg_eint0111, | ||
84 | .chip = { | ||
85 | .base = S3C64XX_GPA(0), | ||
86 | .ngpio = S3C64XX_GPIO_A_NR, | ||
87 | .label = "GPA", | ||
88 | }, | ||
89 | }, { | ||
90 | .base = S3C64XX_GPB_BASE, | ||
91 | .config = &gpio_4bit_cfg_eint0111, | ||
92 | .chip = { | ||
93 | .base = S3C64XX_GPB(0), | ||
94 | .ngpio = S3C64XX_GPIO_B_NR, | ||
95 | .label = "GPB", | ||
96 | }, | ||
97 | }, { | ||
98 | .base = S3C64XX_GPC_BASE, | ||
99 | .config = &gpio_4bit_cfg_eint0111, | ||
100 | .chip = { | ||
101 | .base = S3C64XX_GPC(0), | ||
102 | .ngpio = S3C64XX_GPIO_C_NR, | ||
103 | .label = "GPC", | ||
104 | }, | ||
105 | }, { | ||
106 | .base = S3C64XX_GPD_BASE, | ||
107 | .config = &gpio_4bit_cfg_eint0111, | ||
108 | .chip = { | ||
109 | .base = S3C64XX_GPD(0), | ||
110 | .ngpio = S3C64XX_GPIO_D_NR, | ||
111 | .label = "GPD", | ||
112 | }, | ||
113 | }, { | ||
114 | .base = S3C64XX_GPE_BASE, | ||
115 | .config = &gpio_4bit_cfg_noint, | ||
116 | .chip = { | ||
117 | .base = S3C64XX_GPE(0), | ||
118 | .ngpio = S3C64XX_GPIO_E_NR, | ||
119 | .label = "GPE", | ||
120 | }, | ||
121 | }, { | ||
122 | .base = S3C64XX_GPG_BASE, | ||
123 | .config = &gpio_4bit_cfg_eint0111, | ||
124 | .chip = { | ||
125 | .base = S3C64XX_GPG(0), | ||
126 | .ngpio = S3C64XX_GPIO_G_NR, | ||
127 | .label = "GPG", | ||
128 | }, | ||
129 | }, { | ||
130 | .base = S3C64XX_GPM_BASE, | ||
131 | .config = &gpio_4bit_cfg_eint0011, | ||
132 | .chip = { | ||
133 | .base = S3C64XX_GPM(0), | ||
134 | .ngpio = S3C64XX_GPIO_M_NR, | ||
135 | .label = "GPM", | ||
136 | .to_irq = s3c64xx_gpio2int_gpm, | ||
137 | }, | ||
138 | }, | ||
139 | }; | ||
140 | |||
141 | static int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin) | ||
142 | { | ||
143 | return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO; | ||
144 | } | ||
145 | |||
146 | static struct s3c_gpio_chip gpio_4bit2[] = { | ||
147 | { | ||
148 | .base = S3C64XX_GPH_BASE + 0x4, | ||
149 | .config = &gpio_4bit_cfg_eint0111, | ||
150 | .chip = { | ||
151 | .base = S3C64XX_GPH(0), | ||
152 | .ngpio = S3C64XX_GPIO_H_NR, | ||
153 | .label = "GPH", | ||
154 | }, | ||
155 | }, { | ||
156 | .base = S3C64XX_GPK_BASE + 0x4, | ||
157 | .config = &gpio_4bit_cfg_noint, | ||
158 | .chip = { | ||
159 | .base = S3C64XX_GPK(0), | ||
160 | .ngpio = S3C64XX_GPIO_K_NR, | ||
161 | .label = "GPK", | ||
162 | }, | ||
163 | }, { | ||
164 | .base = S3C64XX_GPL_BASE + 0x4, | ||
165 | .config = &gpio_4bit_cfg_eint0011, | ||
166 | .chip = { | ||
167 | .base = S3C64XX_GPL(0), | ||
168 | .ngpio = S3C64XX_GPIO_L_NR, | ||
169 | .label = "GPL", | ||
170 | .to_irq = s3c64xx_gpio2int_gpl, | ||
171 | }, | ||
172 | }, | ||
173 | }; | ||
174 | |||
175 | static struct s3c_gpio_cfg gpio_2bit_cfg_noint = { | ||
176 | .set_config = s3c_gpio_setcfg_s3c24xx, | ||
177 | .get_config = s3c_gpio_getcfg_s3c24xx, | ||
178 | .set_pull = s3c_gpio_setpull_updown, | ||
179 | .get_pull = s3c_gpio_getpull_updown, | ||
180 | }; | ||
181 | |||
182 | static struct s3c_gpio_cfg gpio_2bit_cfg_eint10 = { | ||
183 | .cfg_eint = 2, | ||
184 | .set_config = s3c_gpio_setcfg_s3c24xx, | ||
185 | .get_config = s3c_gpio_getcfg_s3c24xx, | ||
186 | .set_pull = s3c_gpio_setpull_updown, | ||
187 | .get_pull = s3c_gpio_getpull_updown, | ||
188 | }; | ||
189 | |||
190 | static struct s3c_gpio_cfg gpio_2bit_cfg_eint11 = { | ||
191 | .cfg_eint = 3, | ||
192 | .set_config = s3c_gpio_setcfg_s3c24xx, | ||
193 | .get_config = s3c_gpio_getcfg_s3c24xx, | ||
194 | .set_pull = s3c_gpio_setpull_updown, | ||
195 | .get_pull = s3c_gpio_getpull_updown, | ||
196 | }; | ||
197 | |||
198 | static struct s3c_gpio_chip gpio_2bit[] = { | ||
199 | { | ||
200 | .base = S3C64XX_GPF_BASE, | ||
201 | .config = &gpio_2bit_cfg_eint11, | ||
202 | .chip = { | ||
203 | .base = S3C64XX_GPF(0), | ||
204 | .ngpio = S3C64XX_GPIO_F_NR, | ||
205 | .label = "GPF", | ||
206 | }, | ||
207 | }, { | ||
208 | .base = S3C64XX_GPI_BASE, | ||
209 | .config = &gpio_2bit_cfg_noint, | ||
210 | .chip = { | ||
211 | .base = S3C64XX_GPI(0), | ||
212 | .ngpio = S3C64XX_GPIO_I_NR, | ||
213 | .label = "GPI", | ||
214 | }, | ||
215 | }, { | ||
216 | .base = S3C64XX_GPJ_BASE, | ||
217 | .config = &gpio_2bit_cfg_noint, | ||
218 | .chip = { | ||
219 | .base = S3C64XX_GPJ(0), | ||
220 | .ngpio = S3C64XX_GPIO_J_NR, | ||
221 | .label = "GPJ", | ||
222 | }, | ||
223 | }, { | ||
224 | .base = S3C64XX_GPN_BASE, | ||
225 | .irq_base = IRQ_EINT(0), | ||
226 | .config = &gpio_2bit_cfg_eint10, | ||
227 | .chip = { | ||
228 | .base = S3C64XX_GPN(0), | ||
229 | .ngpio = S3C64XX_GPIO_N_NR, | ||
230 | .label = "GPN", | ||
231 | .to_irq = samsung_gpiolib_to_irq, | ||
232 | }, | ||
233 | }, { | ||
234 | .base = S3C64XX_GPO_BASE, | ||
235 | .config = &gpio_2bit_cfg_eint11, | ||
236 | .chip = { | ||
237 | .base = S3C64XX_GPO(0), | ||
238 | .ngpio = S3C64XX_GPIO_O_NR, | ||
239 | .label = "GPO", | ||
240 | }, | ||
241 | }, { | ||
242 | .base = S3C64XX_GPP_BASE, | ||
243 | .config = &gpio_2bit_cfg_eint11, | ||
244 | .chip = { | ||
245 | .base = S3C64XX_GPP(0), | ||
246 | .ngpio = S3C64XX_GPIO_P_NR, | ||
247 | .label = "GPP", | ||
248 | }, | ||
249 | }, { | ||
250 | .base = S3C64XX_GPQ_BASE, | ||
251 | .config = &gpio_2bit_cfg_eint11, | ||
252 | .chip = { | ||
253 | .base = S3C64XX_GPQ(0), | ||
254 | .ngpio = S3C64XX_GPIO_Q_NR, | ||
255 | .label = "GPQ", | ||
256 | }, | ||
257 | }, | ||
258 | }; | ||
259 | |||
260 | static __init void s3c64xx_gpiolib_add_2bit(struct s3c_gpio_chip *chip) | ||
261 | { | ||
262 | chip->pm = __gpio_pm(&s3c_gpio_pm_2bit); | ||
263 | } | ||
264 | |||
265 | static __init void s3c64xx_gpiolib_add(struct s3c_gpio_chip *chips, | ||
266 | int nr_chips, | ||
267 | void (*fn)(struct s3c_gpio_chip *)) | ||
268 | { | ||
269 | for (; nr_chips > 0; nr_chips--, chips++) { | ||
270 | if (fn) | ||
271 | (fn)(chips); | ||
272 | s3c_gpiolib_add(chips); | ||
273 | } | ||
274 | } | ||
275 | |||
276 | static __init int s3c64xx_gpiolib_init(void) | ||
277 | { | ||
278 | s3c64xx_gpiolib_add(gpio_4bit, ARRAY_SIZE(gpio_4bit), | ||
279 | samsung_gpiolib_add_4bit); | ||
280 | |||
281 | s3c64xx_gpiolib_add(gpio_4bit2, ARRAY_SIZE(gpio_4bit2), | ||
282 | samsung_gpiolib_add_4bit2); | ||
283 | |||
284 | s3c64xx_gpiolib_add(gpio_2bit, ARRAY_SIZE(gpio_2bit), | ||
285 | s3c64xx_gpiolib_add_2bit); | ||
286 | |||
287 | return 0; | ||
288 | } | ||
289 | |||
290 | core_initcall(s3c64xx_gpiolib_init); | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/clkdev.h b/arch/arm/mach-s3c64xx/include/mach/clkdev.h deleted file mode 100644 index 7dffa83d23f..00000000000 --- a/arch/arm/mach-s3c64xx/include/mach/clkdev.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __MACH_CLKDEV_H__ | ||
2 | #define __MACH_CLKDEV_H__ | ||
3 | |||
4 | #define __clk_get(clk) ({ 1; }) | ||
5 | #define __clk_put(clk) do {} while (0) | ||
6 | |||
7 | #endif | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/crag6410.h b/arch/arm/mach-s3c64xx/include/mach/crag6410.h new file mode 100644 index 00000000000..be9074e17df --- /dev/null +++ b/arch/arm/mach-s3c64xx/include/mach/crag6410.h | |||
@@ -0,0 +1,23 @@ | |||
1 | /* Cragganmore 6410 shared definitions | ||
2 | * | ||
3 | * Copyright 2011 Wolfson Microelectronics plc | ||
4 | * Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef MACH_CRAG6410_H | ||
12 | #define MACH_CRAG6410_H | ||
13 | |||
14 | #include <linux/gpio.h> | ||
15 | |||
16 | #define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START | ||
17 | #define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64) | ||
18 | |||
19 | #define PCA935X_GPIO_BASE GPIO_BOARD_START | ||
20 | #define CODEC_GPIO_BASE (GPIO_BOARD_START + 8) | ||
21 | #define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16) | ||
22 | |||
23 | #endif | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/dma.h b/arch/arm/mach-s3c64xx/include/mach/dma.h index 0a5d9268a23..fe1a98cf0e4 100644 --- a/arch/arm/mach-s3c64xx/include/mach/dma.h +++ b/arch/arm/mach-s3c64xx/include/mach/dma.h | |||
@@ -58,11 +58,15 @@ enum dma_ch { | |||
58 | DMACH_MAX /* the end */ | 58 | DMACH_MAX /* the end */ |
59 | }; | 59 | }; |
60 | 60 | ||
61 | static __inline__ bool s3c_dma_has_circular(void) | 61 | static inline bool samsung_dma_has_circular(void) |
62 | { | 62 | { |
63 | return true; | 63 | return true; |
64 | } | 64 | } |
65 | 65 | ||
66 | static inline bool samsung_dma_is_dmadev(void) | ||
67 | { | ||
68 | return false; | ||
69 | } | ||
66 | #define S3C2410_DMAF_CIRCULAR (1 << 0) | 70 | #define S3C2410_DMAF_CIRCULAR (1 << 0) |
67 | 71 | ||
68 | #include <plat/dma.h> | 72 | #include <plat/dma.h> |
@@ -95,7 +99,7 @@ struct s3c2410_dma_chan { | |||
95 | unsigned char peripheral; | 99 | unsigned char peripheral; |
96 | 100 | ||
97 | unsigned int flags; | 101 | unsigned int flags; |
98 | enum s3c2410_dmasrc source; | 102 | enum dma_data_direction source; |
99 | 103 | ||
100 | 104 | ||
101 | dma_addr_t dev_addr; | 105 | dma_addr_t dev_addr; |
diff --git a/arch/arm/mach-s3c64xx/include/mach/pll.h b/arch/arm/mach-s3c64xx/include/mach/pll.h deleted file mode 100644 index 5ef0bb698ee..00000000000 --- a/arch/arm/mach-s3c64xx/include/mach/pll.h +++ /dev/null | |||
@@ -1,45 +0,0 @@ | |||
1 | /* arch/arm/plat-s3c64xx/include/plat/pll.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C64XX PLL code | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C6400_PLL_MDIV_MASK ((1 << (25-16+1)) - 1) | ||
16 | #define S3C6400_PLL_PDIV_MASK ((1 << (13-8+1)) - 1) | ||
17 | #define S3C6400_PLL_SDIV_MASK ((1 << (2-0+1)) - 1) | ||
18 | #define S3C6400_PLL_MDIV_SHIFT (16) | ||
19 | #define S3C6400_PLL_PDIV_SHIFT (8) | ||
20 | #define S3C6400_PLL_SDIV_SHIFT (0) | ||
21 | |||
22 | #include <asm/div64.h> | ||
23 | #include <plat/pll6553x.h> | ||
24 | |||
25 | static inline unsigned long s3c6400_get_pll(unsigned long baseclk, | ||
26 | u32 pllcon) | ||
27 | { | ||
28 | u32 mdiv, pdiv, sdiv; | ||
29 | u64 fvco = baseclk; | ||
30 | |||
31 | mdiv = (pllcon >> S3C6400_PLL_MDIV_SHIFT) & S3C6400_PLL_MDIV_MASK; | ||
32 | pdiv = (pllcon >> S3C6400_PLL_PDIV_SHIFT) & S3C6400_PLL_PDIV_MASK; | ||
33 | sdiv = (pllcon >> S3C6400_PLL_SDIV_SHIFT) & S3C6400_PLL_SDIV_MASK; | ||
34 | |||
35 | fvco *= mdiv; | ||
36 | do_div(fvco, (pdiv << sdiv)); | ||
37 | |||
38 | return (unsigned long)fvco; | ||
39 | } | ||
40 | |||
41 | static inline unsigned long s3c6400_get_epll(unsigned long baseclk) | ||
42 | { | ||
43 | return s3c_get_pll6553x(baseclk, __raw_readl(S3C_EPLL_CON0), | ||
44 | __raw_readl(S3C_EPLL_CON1)); | ||
45 | } | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/pm-core.h b/arch/arm/mach-s3c64xx/include/mach/pm-core.h index 38659bebe4b..fcf3dcabb69 100644 --- a/arch/arm/mach-s3c64xx/include/mach/pm-core.h +++ b/arch/arm/mach-s3c64xx/include/mach/pm-core.h | |||
@@ -104,7 +104,7 @@ static inline void s3c_pm_restored_gpios(void) | |||
104 | __raw_writel(0, S3C64XX_SLPEN); | 104 | __raw_writel(0, S3C64XX_SLPEN); |
105 | } | 105 | } |
106 | 106 | ||
107 | static inline void s3c_pm_saved_gpios(void) | 107 | static inline void samsung_pm_saved_gpios(void) |
108 | { | 108 | { |
109 | /* turn on the sleep mode and keep it there, as it seems that during | 109 | /* turn on the sleep mode and keep it there, as it seems that during |
110 | * suspend the xCON registers get re-set and thus you can end up with | 110 | * suspend the xCON registers get re-set and thus you can end up with |
diff --git a/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h deleted file mode 100644 index b25bedee0d5..00000000000 --- a/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h +++ /dev/null | |||
@@ -1,56 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c6400/include/mach/pwm-clock.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C64xx - pwm clock and timer support | ||
9 | */ | ||
10 | |||
11 | /** | ||
12 | * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk | ||
13 | * @tcfg: The timer TCFG1 register bits shifted down to 0. | ||
14 | * | ||
15 | * Return true if the given configuration from TCFG1 is a TCLK instead | ||
16 | * any of the TDIV clocks. | ||
17 | */ | ||
18 | static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) | ||
19 | { | ||
20 | return tcfg >= S3C64XX_TCFG1_MUX_TCLK; | ||
21 | } | ||
22 | |||
23 | /** | ||
24 | * tcfg_to_divisor() - convert tcfg1 setting to a divisor | ||
25 | * @tcfg1: The tcfg1 setting, shifted down. | ||
26 | * | ||
27 | * Get the divisor value for the given tcfg1 setting. We assume the | ||
28 | * caller has already checked to see if this is not a TCLK source. | ||
29 | */ | ||
30 | static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) | ||
31 | { | ||
32 | return 1 << tcfg1; | ||
33 | } | ||
34 | |||
35 | /** | ||
36 | * pwm_tdiv_has_div1() - does the tdiv setting have a /1 | ||
37 | * | ||
38 | * Return true if we have a /1 in the tdiv setting. | ||
39 | */ | ||
40 | static inline unsigned int pwm_tdiv_has_div1(void) | ||
41 | { | ||
42 | return 1; | ||
43 | } | ||
44 | |||
45 | /** | ||
46 | * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. | ||
47 | * @div: The divisor to calculate the bit information for. | ||
48 | * | ||
49 | * Turn a divisor into the necessary bit field for TCFG1. | ||
50 | */ | ||
51 | static inline unsigned long pwm_tdiv_div_bits(unsigned int div) | ||
52 | { | ||
53 | return ilog2(div); | ||
54 | } | ||
55 | |||
56 | #define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h index 69b78d9f83b..b91e0209328 100644 --- a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h | |||
@@ -21,8 +21,11 @@ | |||
21 | #define S3C64XX_AHB_CON1 S3C_SYSREG(0x104) | 21 | #define S3C64XX_AHB_CON1 S3C_SYSREG(0x104) |
22 | #define S3C64XX_AHB_CON2 S3C_SYSREG(0x108) | 22 | #define S3C64XX_AHB_CON2 S3C_SYSREG(0x108) |
23 | 23 | ||
24 | #define S3C64XX_SDMA_SEL S3C_SYSREG(0x110) | ||
25 | |||
24 | #define S3C64XX_OTHERS S3C_SYSREG(0x900) | 26 | #define S3C64XX_OTHERS S3C_SYSREG(0x900) |
25 | 27 | ||
26 | #define S3C64XX_OTHERS_USBMASK (1 << 16) | 28 | #define S3C64XX_OTHERS_USBMASK (1 << 16) |
29 | #define S3C64XX_OTHERS_SYNCMUXSEL (1 << 6) | ||
27 | 30 | ||
28 | #endif /* _PLAT_REGS_SYS_H */ | 31 | #endif /* _PLAT_REGS_SYS_H */ |
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c index d164a282bfb..8eba88e7209 100644 --- a/arch/arm/mach-s3c64xx/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c | |||
@@ -45,7 +45,7 @@ | |||
45 | #include <plat/fb.h> | 45 | #include <plat/fb.h> |
46 | #include <plat/regs-fb-v4.h> | 46 | #include <plat/regs-fb-v4.h> |
47 | 47 | ||
48 | #include <mach/s3c6410.h> | 48 | #include <plat/s3c6410.h> |
49 | #include <plat/clock.h> | 49 | #include <plat/clock.h> |
50 | #include <plat/devs.h> | 50 | #include <plat/devs.h> |
51 | #include <plat/cpu.h> | 51 | #include <plat/cpu.h> |
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c new file mode 100644 index 00000000000..66668565ee7 --- /dev/null +++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c | |||
@@ -0,0 +1,182 @@ | |||
1 | /* Speyside modules for Cragganmore - board data probing | ||
2 | * | ||
3 | * Copyright 2011 Wolfson Microelectronics plc | ||
4 | * Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/module.h> | ||
12 | #include <linux/interrupt.h> | ||
13 | #include <linux/i2c.h> | ||
14 | |||
15 | #include <linux/mfd/wm831x/irq.h> | ||
16 | #include <linux/mfd/wm831x/gpio.h> | ||
17 | |||
18 | #include <sound/wm8996.h> | ||
19 | #include <sound/wm8962.h> | ||
20 | #include <sound/wm9081.h> | ||
21 | |||
22 | #include <mach/crag6410.h> | ||
23 | |||
24 | static struct wm8996_retune_mobile_config wm8996_retune[] = { | ||
25 | { | ||
26 | .name = "Sub LPF", | ||
27 | .rate = 48000, | ||
28 | .regs = { | ||
29 | 0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000, | ||
30 | 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000, | ||
31 | 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000 | ||
32 | }, | ||
33 | }, | ||
34 | { | ||
35 | .name = "Sub HPF", | ||
36 | .rate = 48000, | ||
37 | .regs = { | ||
38 | 0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000, | ||
39 | 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000, | ||
40 | 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000 | ||
41 | }, | ||
42 | }, | ||
43 | }; | ||
44 | |||
45 | static struct wm8996_pdata wm8996_pdata __initdata = { | ||
46 | .ldo_ena = S3C64XX_GPN(7), | ||
47 | .gpio_base = CODEC_GPIO_BASE, | ||
48 | .micdet_def = 1, | ||
49 | .inl_mode = WM8996_DIFFERRENTIAL_1, | ||
50 | .inr_mode = WM8996_DIFFERRENTIAL_1, | ||
51 | |||
52 | .irq_flags = IRQF_TRIGGER_RISING, | ||
53 | |||
54 | .gpio_default = { | ||
55 | 0x8001, /* GPIO1 == ADCLRCLK1 */ | ||
56 | 0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */ | ||
57 | 0x0141, /* GPIO3 == HP_SEL */ | ||
58 | 0x0002, /* GPIO4 == IRQ */ | ||
59 | 0x020e, /* GPIO5 == CLKOUT */ | ||
60 | }, | ||
61 | |||
62 | .retune_mobile_cfgs = wm8996_retune, | ||
63 | .num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune), | ||
64 | }; | ||
65 | |||
66 | static struct wm8962_pdata wm8962_pdata __initdata = { | ||
67 | .gpio_init = { | ||
68 | 0, | ||
69 | WM8962_GPIO_FN_OPCLK, | ||
70 | WM8962_GPIO_FN_DMICCLK, | ||
71 | 0, | ||
72 | 0x8000 | WM8962_GPIO_FN_DMICDAT, | ||
73 | WM8962_GPIO_FN_IRQ, /* Open drain mode */ | ||
74 | }, | ||
75 | .irq_active_low = true, | ||
76 | }; | ||
77 | |||
78 | static struct wm9081_pdata wm9081_pdata __initdata = { | ||
79 | .irq_high = false, | ||
80 | .irq_cmos = false, | ||
81 | }; | ||
82 | |||
83 | static const struct i2c_board_info wm1254_devs[] = { | ||
84 | { I2C_BOARD_INFO("wm8996", 0x1a), | ||
85 | .platform_data = &wm8996_pdata, | ||
86 | .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2, | ||
87 | }, | ||
88 | { I2C_BOARD_INFO("wm9081", 0x6c), | ||
89 | .platform_data = &wm9081_pdata, }, | ||
90 | }; | ||
91 | |||
92 | static const struct i2c_board_info wm1255_devs[] = { | ||
93 | { I2C_BOARD_INFO("wm5100", 0x1a), | ||
94 | .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2, | ||
95 | }, | ||
96 | { I2C_BOARD_INFO("wm9081", 0x6c), | ||
97 | .platform_data = &wm9081_pdata, }, | ||
98 | }; | ||
99 | |||
100 | static const struct i2c_board_info wm1259_devs[] = { | ||
101 | { I2C_BOARD_INFO("wm8962", 0x1a), | ||
102 | .platform_data = &wm8962_pdata, | ||
103 | .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2, | ||
104 | }, | ||
105 | }; | ||
106 | |||
107 | |||
108 | static __devinitdata const struct { | ||
109 | u8 id; | ||
110 | const char *name; | ||
111 | const struct i2c_board_info *i2c_devs; | ||
112 | int num_i2c_devs; | ||
113 | } gf_mods[] = { | ||
114 | { .id = 0x01, .name = "1250-EV1 Springbank" }, | ||
115 | { .id = 0x02, .name = "1251-EV1 Jura" }, | ||
116 | { .id = 0x03, .name = "1252-EV1 Glenlivet" }, | ||
117 | { .id = 0x11, .name = "6249-EV2 Glenfarclas", }, | ||
118 | { .id = 0x21, .name = "1275-EV1 Mortlach" }, | ||
119 | { .id = 0x25, .name = "1274-EV1 Glencadam" }, | ||
120 | { .id = 0x31, .name = "1253-EV1 Tomatin", }, | ||
121 | { .id = 0x39, .name = "1254-EV1 Dallas Dhu", | ||
122 | .i2c_devs = wm1254_devs, .num_i2c_devs = ARRAY_SIZE(wm1254_devs) }, | ||
123 | { .id = 0x3a, .name = "1259-EV1 Tobermory", | ||
124 | .i2c_devs = wm1259_devs, .num_i2c_devs = ARRAY_SIZE(wm1259_devs) }, | ||
125 | { .id = 0x3b, .name = "1255-EV1 Kilchoman", | ||
126 | .i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) }, | ||
127 | { .id = 0x3c, .name = "1273-EV1 Longmorn" }, | ||
128 | }; | ||
129 | |||
130 | static __devinit int wlf_gf_module_probe(struct i2c_client *i2c, | ||
131 | const struct i2c_device_id *i2c_id) | ||
132 | { | ||
133 | int ret, i, j, id, rev; | ||
134 | |||
135 | ret = i2c_smbus_read_byte_data(i2c, 0); | ||
136 | if (ret < 0) { | ||
137 | dev_err(&i2c->dev, "Failed to read ID: %d\n", ret); | ||
138 | return ret; | ||
139 | } | ||
140 | |||
141 | id = (ret & 0xfe) >> 2; | ||
142 | rev = ret & 0x3; | ||
143 | for (i = 0; i < ARRAY_SIZE(gf_mods); i++) | ||
144 | if (id == gf_mods[i].id) | ||
145 | break; | ||
146 | |||
147 | if (i < ARRAY_SIZE(gf_mods)) { | ||
148 | dev_info(&i2c->dev, "%s revision %d\n", | ||
149 | gf_mods[i].name, rev + 1); | ||
150 | for (j = 0; j < gf_mods[i].num_i2c_devs; j++) { | ||
151 | if (!i2c_new_device(i2c->adapter, | ||
152 | &(gf_mods[i].i2c_devs[j]))) | ||
153 | dev_err(&i2c->dev, | ||
154 | "Failed to register dev: %d\n", ret); | ||
155 | } | ||
156 | } else { | ||
157 | dev_warn(&i2c->dev, "Unknown module ID %d revision %d\n", | ||
158 | id, rev); | ||
159 | } | ||
160 | |||
161 | return 0; | ||
162 | } | ||
163 | |||
164 | static const struct i2c_device_id wlf_gf_module_id[] = { | ||
165 | { "wlf-gf-module", 0 }, | ||
166 | { } | ||
167 | }; | ||
168 | |||
169 | static struct i2c_driver wlf_gf_module_driver = { | ||
170 | .driver = { | ||
171 | .name = "wlf-gf-module", | ||
172 | .owner = THIS_MODULE, | ||
173 | }, | ||
174 | .probe = wlf_gf_module_probe, | ||
175 | .id_table = wlf_gf_module_id, | ||
176 | }; | ||
177 | |||
178 | static int __init wlf_gf_module_register(void) | ||
179 | { | ||
180 | return i2c_add_driver(&wlf_gf_module_driver); | ||
181 | } | ||
182 | module_init(wlf_gf_module_register); | ||
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c index 806580388f3..d04b6544851 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410.c | |||
@@ -43,13 +43,14 @@ | |||
43 | #include <mach/hardware.h> | 43 | #include <mach/hardware.h> |
44 | #include <mach/map.h> | 44 | #include <mach/map.h> |
45 | 45 | ||
46 | #include <mach/s3c6410.h> | ||
47 | #include <mach/regs-sys.h> | 46 | #include <mach/regs-sys.h> |
48 | #include <mach/regs-gpio.h> | 47 | #include <mach/regs-gpio.h> |
49 | #include <mach/regs-modem.h> | 48 | #include <mach/regs-modem.h> |
49 | #include <mach/crag6410.h> | ||
50 | 50 | ||
51 | #include <mach/regs-gpio-memport.h> | 51 | #include <mach/regs-gpio-memport.h> |
52 | 52 | ||
53 | #include <plat/s3c6410.h> | ||
53 | #include <plat/regs-serial.h> | 54 | #include <plat/regs-serial.h> |
54 | #include <plat/regs-fb-v4.h> | 55 | #include <plat/regs-fb-v4.h> |
55 | #include <plat/fb.h> | 56 | #include <plat/fb.h> |
@@ -65,17 +66,6 @@ | |||
65 | #include <plat/iic.h> | 66 | #include <plat/iic.h> |
66 | #include <plat/pm.h> | 67 | #include <plat/pm.h> |
67 | 68 | ||
68 | #include <sound/wm8996.h> | ||
69 | #include <sound/wm8962.h> | ||
70 | #include <sound/wm9081.h> | ||
71 | |||
72 | #define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START | ||
73 | #define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64) | ||
74 | |||
75 | #define PCA935X_GPIO_BASE GPIO_BOARD_START | ||
76 | #define CODEC_GPIO_BASE (GPIO_BOARD_START + 8) | ||
77 | #define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16) | ||
78 | |||
79 | /* serial port setup */ | 69 | /* serial port setup */ |
80 | 70 | ||
81 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) | 71 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) |
@@ -287,6 +277,11 @@ static struct platform_device speyside_device = { | |||
287 | .id = -1, | 277 | .id = -1, |
288 | }; | 278 | }; |
289 | 279 | ||
280 | static struct platform_device lowland_device = { | ||
281 | .name = "lowland", | ||
282 | .id = -1, | ||
283 | }; | ||
284 | |||
290 | static struct platform_device speyside_wm8962_device = { | 285 | static struct platform_device speyside_wm8962_device = { |
291 | .name = "speyside-wm8962", | 286 | .name = "speyside-wm8962", |
292 | .id = -1, | 287 | .id = -1, |
@@ -295,6 +290,8 @@ static struct platform_device speyside_wm8962_device = { | |||
295 | static struct regulator_consumer_supply wallvdd_consumers[] = { | 290 | static struct regulator_consumer_supply wallvdd_consumers[] = { |
296 | REGULATOR_SUPPLY("SPKVDD1", "1-001a"), | 291 | REGULATOR_SUPPLY("SPKVDD1", "1-001a"), |
297 | REGULATOR_SUPPLY("SPKVDD2", "1-001a"), | 292 | REGULATOR_SUPPLY("SPKVDD2", "1-001a"), |
293 | REGULATOR_SUPPLY("SPKVDDL", "1-001a"), | ||
294 | REGULATOR_SUPPLY("SPKVDDR", "1-001a"), | ||
298 | }; | 295 | }; |
299 | 296 | ||
300 | static struct regulator_init_data wallvdd_data = { | 297 | static struct regulator_init_data wallvdd_data = { |
@@ -342,6 +339,7 @@ static struct platform_device *crag6410_devices[] __initdata = { | |||
342 | &crag6410_backlight_device, | 339 | &crag6410_backlight_device, |
343 | &speyside_device, | 340 | &speyside_device, |
344 | &speyside_wm8962_device, | 341 | &speyside_wm8962_device, |
342 | &lowland_device, | ||
345 | &wallvdd_device, | 343 | &wallvdd_device, |
346 | }; | 344 | }; |
347 | 345 | ||
@@ -350,6 +348,12 @@ static struct pca953x_platform_data crag6410_pca_data = { | |||
350 | .irq_base = 0, | 348 | .irq_base = 0, |
351 | }; | 349 | }; |
352 | 350 | ||
351 | /* VDDARM is controlled by DVS1 connected to GPK(0) */ | ||
352 | static struct wm831x_buckv_pdata vddarm_pdata = { | ||
353 | .dvs_control_src = 1, | ||
354 | .dvs_gpio = S3C64XX_GPK(0), | ||
355 | }; | ||
356 | |||
353 | static struct regulator_consumer_supply vddarm_consumers[] __initdata = { | 357 | static struct regulator_consumer_supply vddarm_consumers[] __initdata = { |
354 | REGULATOR_SUPPLY("vddarm", NULL), | 358 | REGULATOR_SUPPLY("vddarm", NULL), |
355 | }; | 359 | }; |
@@ -365,6 +369,7 @@ static struct regulator_init_data vddarm __initdata = { | |||
365 | .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers), | 369 | .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers), |
366 | .consumer_supplies = vddarm_consumers, | 370 | .consumer_supplies = vddarm_consumers, |
367 | .supply_regulator = "WALLVDD", | 371 | .supply_regulator = "WALLVDD", |
372 | .driver_data = &vddarm_pdata, | ||
368 | }; | 373 | }; |
369 | 374 | ||
370 | static struct regulator_init_data vddint __initdata = { | 375 | static struct regulator_init_data vddint __initdata = { |
@@ -500,6 +505,8 @@ static struct wm831x_pdata crag_pmic_pdata __initdata = { | |||
500 | .backup = &banff_backup_pdata, | 505 | .backup = &banff_backup_pdata, |
501 | 506 | ||
502 | .gpio_defaults = { | 507 | .gpio_defaults = { |
508 | /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */ | ||
509 | [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8, | ||
503 | /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/ | 510 | /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/ |
504 | [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6, | 511 | [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6, |
505 | /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/ | 512 | /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/ |
@@ -557,8 +564,12 @@ static struct regulator_init_data pvdd_1v2 __initdata = { | |||
557 | }; | 564 | }; |
558 | 565 | ||
559 | static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = { | 566 | static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = { |
567 | REGULATOR_SUPPLY("LDOVDD", "1-001a"), | ||
560 | REGULATOR_SUPPLY("PLLVDD", "1-001a"), | 568 | REGULATOR_SUPPLY("PLLVDD", "1-001a"), |
561 | REGULATOR_SUPPLY("DBVDD", "1-001a"), | 569 | REGULATOR_SUPPLY("DBVDD", "1-001a"), |
570 | REGULATOR_SUPPLY("DBVDD1", "1-001a"), | ||
571 | REGULATOR_SUPPLY("DBVDD2", "1-001a"), | ||
572 | REGULATOR_SUPPLY("DBVDD3", "1-001a"), | ||
562 | REGULATOR_SUPPLY("CPVDD", "1-001a"), | 573 | REGULATOR_SUPPLY("CPVDD", "1-001a"), |
563 | REGULATOR_SUPPLY("AVDD2", "1-001a"), | 574 | REGULATOR_SUPPLY("AVDD2", "1-001a"), |
564 | REGULATOR_SUPPLY("DCVDD", "1-001a"), | 575 | REGULATOR_SUPPLY("DCVDD", "1-001a"), |
@@ -611,81 +622,16 @@ static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = { | |||
611 | .disable_touch = true, | 622 | .disable_touch = true, |
612 | }; | 623 | }; |
613 | 624 | ||
614 | static struct wm8996_retune_mobile_config wm8996_retune[] = { | ||
615 | { | ||
616 | .name = "Sub LPF", | ||
617 | .rate = 48000, | ||
618 | .regs = { | ||
619 | 0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000, | ||
620 | 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000, | ||
621 | 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000 | ||
622 | }, | ||
623 | }, | ||
624 | { | ||
625 | .name = "Sub HPF", | ||
626 | .rate = 48000, | ||
627 | .regs = { | ||
628 | 0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000, | ||
629 | 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000, | ||
630 | 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000 | ||
631 | }, | ||
632 | }, | ||
633 | }; | ||
634 | |||
635 | static struct wm8996_pdata wm8996_pdata __initdata = { | ||
636 | .ldo_ena = S3C64XX_GPN(7), | ||
637 | .gpio_base = CODEC_GPIO_BASE, | ||
638 | .micdet_def = 1, | ||
639 | .inl_mode = WM8996_DIFFERRENTIAL_1, | ||
640 | .inr_mode = WM8996_DIFFERRENTIAL_1, | ||
641 | |||
642 | .irq_flags = IRQF_TRIGGER_RISING, | ||
643 | |||
644 | .gpio_default = { | ||
645 | 0x8001, /* GPIO1 == ADCLRCLK1 */ | ||
646 | 0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */ | ||
647 | 0x0141, /* GPIO3 == HP_SEL */ | ||
648 | 0x0002, /* GPIO4 == IRQ */ | ||
649 | 0x020e, /* GPIO5 == CLKOUT */ | ||
650 | }, | ||
651 | |||
652 | .retune_mobile_cfgs = wm8996_retune, | ||
653 | .num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune), | ||
654 | }; | ||
655 | |||
656 | static struct wm8962_pdata wm8962_pdata __initdata = { | ||
657 | .gpio_init = { | ||
658 | 0, | ||
659 | WM8962_GPIO_FN_OPCLK, | ||
660 | WM8962_GPIO_FN_DMICCLK, | ||
661 | 0, | ||
662 | 0x8000 | WM8962_GPIO_FN_DMICDAT, | ||
663 | WM8962_GPIO_FN_IRQ, /* Open drain mode */ | ||
664 | }, | ||
665 | .irq_active_low = true, | ||
666 | }; | ||
667 | |||
668 | static struct wm9081_pdata wm9081_pdata __initdata = { | ||
669 | .irq_high = false, | ||
670 | .irq_cmos = false, | ||
671 | }; | ||
672 | |||
673 | static struct i2c_board_info i2c_devs1[] __initdata = { | 625 | static struct i2c_board_info i2c_devs1[] __initdata = { |
674 | { I2C_BOARD_INFO("wm8311", 0x34), | 626 | { I2C_BOARD_INFO("wm8311", 0x34), |
675 | .irq = S3C_EINT(0), | 627 | .irq = S3C_EINT(0), |
676 | .platform_data = &glenfarclas_pmic_pdata }, | 628 | .platform_data = &glenfarclas_pmic_pdata }, |
677 | 629 | ||
630 | { I2C_BOARD_INFO("wlf-gf-module", 0x24) }, | ||
631 | { I2C_BOARD_INFO("wlf-gf-module", 0x25) }, | ||
632 | { I2C_BOARD_INFO("wlf-gf-module", 0x26) }, | ||
633 | |||
678 | { I2C_BOARD_INFO("wm1250-ev1", 0x27) }, | 634 | { I2C_BOARD_INFO("wm1250-ev1", 0x27) }, |
679 | { I2C_BOARD_INFO("wm8996", 0x1a), | ||
680 | .platform_data = &wm8996_pdata, | ||
681 | .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2, | ||
682 | }, | ||
683 | { I2C_BOARD_INFO("wm9081", 0x6c), | ||
684 | .platform_data = &wm9081_pdata, }, | ||
685 | { I2C_BOARD_INFO("wm8962", 0x1a), | ||
686 | .platform_data = &wm8962_pdata, | ||
687 | .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2, | ||
688 | }, | ||
689 | }; | 635 | }; |
690 | 636 | ||
691 | static void __init crag6410_map_io(void) | 637 | static void __init crag6410_map_io(void) |
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c index 19a0887e1c1..952f75ff5de 100644 --- a/arch/arm/mach-s3c64xx/mach-hmt.c +++ b/arch/arm/mach-s3c64xx/mach-hmt.c | |||
@@ -37,7 +37,7 @@ | |||
37 | #include <plat/fb.h> | 37 | #include <plat/fb.h> |
38 | #include <plat/nand.h> | 38 | #include <plat/nand.h> |
39 | 39 | ||
40 | #include <mach/s3c6410.h> | 40 | #include <plat/s3c6410.h> |
41 | #include <plat/clock.h> | 41 | #include <plat/clock.h> |
42 | #include <plat/devs.h> | 42 | #include <plat/devs.h> |
43 | #include <plat/cpu.h> | 43 | #include <plat/cpu.h> |
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c index fb8969aa412..1bc85c35949 100644 --- a/arch/arm/mach-s3c64xx/mach-mini6410.c +++ b/arch/arm/mach-s3c64xx/mach-mini6410.c | |||
@@ -32,8 +32,8 @@ | |||
32 | #include <mach/regs-gpio.h> | 32 | #include <mach/regs-gpio.h> |
33 | #include <mach/regs-modem.h> | 33 | #include <mach/regs-modem.h> |
34 | #include <mach/regs-srom.h> | 34 | #include <mach/regs-srom.h> |
35 | #include <mach/s3c6410.h> | ||
36 | 35 | ||
36 | #include <plat/s3c6410.h> | ||
37 | #include <plat/adc.h> | 37 | #include <plat/adc.h> |
38 | #include <plat/cpu.h> | 38 | #include <plat/cpu.h> |
39 | #include <plat/devs.h> | 39 | #include <plat/devs.h> |
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c index c30f2e5e0d8..cb13cba98b3 100644 --- a/arch/arm/mach-s3c64xx/mach-ncp.c +++ b/arch/arm/mach-s3c64xx/mach-ncp.c | |||
@@ -39,7 +39,7 @@ | |||
39 | #include <plat/iic.h> | 39 | #include <plat/iic.h> |
40 | #include <plat/fb.h> | 40 | #include <plat/fb.h> |
41 | 41 | ||
42 | #include <mach/s3c6410.h> | 42 | #include <plat/s3c6410.h> |
43 | #include <plat/clock.h> | 43 | #include <plat/clock.h> |
44 | #include <plat/devs.h> | 44 | #include <plat/devs.h> |
45 | #include <plat/cpu.h> | 45 | #include <plat/cpu.h> |
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c index 93170d4834e..87281e4b847 100644 --- a/arch/arm/mach-s3c64xx/mach-real6410.c +++ b/arch/arm/mach-s3c64xx/mach-real6410.c | |||
@@ -33,8 +33,8 @@ | |||
33 | #include <mach/regs-gpio.h> | 33 | #include <mach/regs-gpio.h> |
34 | #include <mach/regs-modem.h> | 34 | #include <mach/regs-modem.h> |
35 | #include <mach/regs-srom.h> | 35 | #include <mach/regs-srom.h> |
36 | #include <mach/s3c6410.h> | ||
37 | 36 | ||
37 | #include <plat/s3c6410.h> | ||
38 | #include <plat/adc.h> | 38 | #include <plat/adc.h> |
39 | #include <plat/cpu.h> | 39 | #include <plat/cpu.h> |
40 | #include <plat/devs.h> | 40 | #include <plat/devs.h> |
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c index cbb57ded3d9..94c831d8836 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq5.c +++ b/arch/arm/mach-s3c64xx/mach-smartq5.c | |||
@@ -22,8 +22,8 @@ | |||
22 | 22 | ||
23 | #include <mach/map.h> | 23 | #include <mach/map.h> |
24 | #include <mach/regs-gpio.h> | 24 | #include <mach/regs-gpio.h> |
25 | #include <mach/s3c6410.h> | ||
26 | 25 | ||
26 | #include <plat/s3c6410.h> | ||
27 | #include <plat/cpu.h> | 27 | #include <plat/cpu.h> |
28 | #include <plat/devs.h> | 28 | #include <plat/devs.h> |
29 | #include <plat/fb.h> | 29 | #include <plat/fb.h> |
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c index 04f914b85fd..f112547ce80 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq7.c +++ b/arch/arm/mach-s3c64xx/mach-smartq7.c | |||
@@ -22,8 +22,8 @@ | |||
22 | 22 | ||
23 | #include <mach/map.h> | 23 | #include <mach/map.h> |
24 | #include <mach/regs-gpio.h> | 24 | #include <mach/regs-gpio.h> |
25 | #include <mach/s3c6410.h> | ||
26 | 25 | ||
26 | #include <plat/s3c6410.h> | ||
27 | #include <plat/cpu.h> | 27 | #include <plat/cpu.h> |
28 | #include <plat/devs.h> | 28 | #include <plat/devs.h> |
29 | #include <plat/fb.h> | 29 | #include <plat/fb.h> |
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c index 6fd5e95f8f7..73450c2b530 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6400.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c | |||
@@ -31,7 +31,7 @@ | |||
31 | 31 | ||
32 | #include <plat/regs-serial.h> | 32 | #include <plat/regs-serial.h> |
33 | 33 | ||
34 | #include <mach/s3c6400.h> | 34 | #include <plat/s3c6400.h> |
35 | #include <plat/clock.h> | 35 | #include <plat/clock.h> |
36 | #include <plat/devs.h> | 36 | #include <plat/devs.h> |
37 | #include <plat/cpu.h> | 37 | #include <plat/cpu.h> |
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index 5f147c33eda..8bc8edd85e5 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c | |||
@@ -63,7 +63,7 @@ | |||
63 | #include <plat/fb.h> | 63 | #include <plat/fb.h> |
64 | #include <plat/gpio-cfg.h> | 64 | #include <plat/gpio-cfg.h> |
65 | 65 | ||
66 | #include <mach/s3c6410.h> | 66 | #include <plat/s3c6410.h> |
67 | #include <plat/clock.h> | 67 | #include <plat/clock.h> |
68 | #include <plat/devs.h> | 68 | #include <plat/devs.h> |
69 | #include <plat/cpu.h> | 69 | #include <plat/cpu.h> |
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c index 055e2858b0d..b375cd5c47c 100644 --- a/arch/arm/mach-s3c64xx/pm.c +++ b/arch/arm/mach-s3c64xx/pm.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <mach/regs-clock.h> | 29 | #include <mach/regs-clock.h> |
30 | #include <mach/regs-syscon-power.h> | 30 | #include <mach/regs-syscon-power.h> |
31 | #include <mach/regs-gpio-memport.h> | 31 | #include <mach/regs-gpio-memport.h> |
32 | #include <mach/regs-modem.h> | ||
32 | 33 | ||
33 | #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK | 34 | #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK |
34 | void s3c_pm_debug_smdkled(u32 set, u32 clear) | 35 | void s3c_pm_debug_smdkled(u32 set, u32 clear) |
@@ -85,6 +86,9 @@ static struct sleep_save misc_save[] = { | |||
85 | SAVE_ITEM(S3C64XX_MEM0CONSLP0), | 86 | SAVE_ITEM(S3C64XX_MEM0CONSLP0), |
86 | SAVE_ITEM(S3C64XX_MEM0CONSLP1), | 87 | SAVE_ITEM(S3C64XX_MEM0CONSLP1), |
87 | SAVE_ITEM(S3C64XX_MEM1CONSLP), | 88 | SAVE_ITEM(S3C64XX_MEM1CONSLP), |
89 | |||
90 | SAVE_ITEM(S3C64XX_SDMA_SEL), | ||
91 | SAVE_ITEM(S3C64XX_MODEM_MIFPCON), | ||
88 | }; | 92 | }; |
89 | 93 | ||
90 | void s3c_pm_configure_extint(void) | 94 | void s3c_pm_configure_extint(void) |
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c index 5e93fe3f3f4..7a3bc32df42 100644 --- a/arch/arm/mach-s3c64xx/s3c6400.c +++ b/arch/arm/mach-s3c64xx/s3c6400.c | |||
@@ -38,7 +38,7 @@ | |||
38 | #include <plat/sdhci.h> | 38 | #include <plat/sdhci.h> |
39 | #include <plat/iic-core.h> | 39 | #include <plat/iic-core.h> |
40 | #include <plat/onenand-core.h> | 40 | #include <plat/onenand-core.h> |
41 | #include <mach/s3c6400.h> | 41 | #include <plat/s3c6400.h> |
42 | 42 | ||
43 | void __init s3c6400_map_io(void) | 43 | void __init s3c6400_map_io(void) |
44 | { | 44 | { |
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c index 312aa6b115e..4117003464a 100644 --- a/arch/arm/mach-s3c64xx/s3c6410.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c | |||
@@ -41,8 +41,8 @@ | |||
41 | #include <plat/adc-core.h> | 41 | #include <plat/adc-core.h> |
42 | #include <plat/iic-core.h> | 42 | #include <plat/iic-core.h> |
43 | #include <plat/onenand-core.h> | 43 | #include <plat/onenand-core.h> |
44 | #include <mach/s3c6400.h> | 44 | #include <plat/s3c6400.h> |
45 | #include <mach/s3c6410.h> | 45 | #include <plat/s3c6410.h> |
46 | 46 | ||
47 | void __init s3c6410_map_io(void) | 47 | void __init s3c6410_map_io(void) |
48 | { | 48 | { |
diff --git a/arch/arm/mach-s3c64xx/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci.c index f344a222bc8..c75a71b2116 100644 --- a/arch/arm/mach-s3c64xx/setup-sdhci.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci.c | |||
@@ -12,17 +12,7 @@ | |||
12 | * published by the Free Software Foundation. | 12 | * published by the Free Software Foundation. |
13 | */ | 13 | */ |
14 | 14 | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/types.h> | 15 | #include <linux/types.h> |
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/io.h> | ||
20 | |||
21 | #include <linux/mmc/card.h> | ||
22 | #include <linux/mmc/host.h> | ||
23 | |||
24 | #include <plat/regs-sdhci.h> | ||
25 | #include <plat/sdhci.h> | ||
26 | 16 | ||
27 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | 17 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ |
28 | 18 | ||
@@ -32,41 +22,3 @@ char *s3c64xx_hsmmc_clksrcs[4] = { | |||
32 | [2] = "mmc_bus", | 22 | [2] = "mmc_bus", |
33 | /* [3] = "48m", - note not successfully used yet */ | 23 | /* [3] = "48m", - note not successfully used yet */ |
34 | }; | 24 | }; |
35 | |||
36 | void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, | ||
37 | void __iomem *r, | ||
38 | struct mmc_ios *ios, | ||
39 | struct mmc_card *card) | ||
40 | { | ||
41 | u32 ctrl2, ctrl3; | ||
42 | |||
43 | ctrl2 = readl(r + S3C_SDHCI_CONTROL2); | ||
44 | ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; | ||
45 | ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | | ||
46 | S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | | ||
47 | S3C_SDHCI_CTRL2_ENFBCLKRX | | ||
48 | S3C_SDHCI_CTRL2_DFCNT_NONE | | ||
49 | S3C_SDHCI_CTRL2_ENCLKOUTHOLD); | ||
50 | |||
51 | if (ios->clock < 25 * 1000000) | ||
52 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | | ||
53 | S3C_SDHCI_CTRL3_FCSEL2 | | ||
54 | S3C_SDHCI_CTRL3_FCSEL1 | | ||
55 | S3C_SDHCI_CTRL3_FCSEL0); | ||
56 | else | ||
57 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); | ||
58 | |||
59 | pr_debug("%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3); | ||
60 | writel(ctrl2, r + S3C_SDHCI_CONTROL2); | ||
61 | writel(ctrl3, r + S3C_SDHCI_CONTROL3); | ||
62 | } | ||
63 | |||
64 | void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev, | ||
65 | void __iomem *r, | ||
66 | struct mmc_ios *ios, | ||
67 | struct mmc_card *card) | ||
68 | { | ||
69 | writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); | ||
70 | |||
71 | s3c6400_setup_sdhci_cfg_card(dev, r, ios, card); | ||
72 | } | ||
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig index 65c7518dad7..18690c5f99e 100644 --- a/arch/arm/mach-s5p64x0/Kconfig +++ b/arch/arm/mach-s5p64x0/Kconfig | |||
@@ -9,18 +9,28 @@ if ARCH_S5P64X0 | |||
9 | 9 | ||
10 | config CPU_S5P6440 | 10 | config CPU_S5P6440 |
11 | bool | 11 | bool |
12 | select S3C_PL330_DMA | 12 | select SAMSUNG_DMADEV |
13 | select S5P_HRT | 13 | select S5P_HRT |
14 | select S5P_SLEEP if PM | ||
15 | select SAMSUNG_WAKEMASK if PM | ||
14 | help | 16 | help |
15 | Enable S5P6440 CPU support | 17 | Enable S5P6440 CPU support |
16 | 18 | ||
17 | config CPU_S5P6450 | 19 | config CPU_S5P6450 |
18 | bool | 20 | bool |
19 | select S3C_PL330_DMA | 21 | select SAMSUNG_DMADEV |
20 | select S5P_HRT | 22 | select S5P_HRT |
23 | select S5P_SLEEP if PM | ||
24 | select SAMSUNG_WAKEMASK if PM | ||
21 | help | 25 | help |
22 | Enable S5P6450 CPU support | 26 | Enable S5P6450 CPU support |
23 | 27 | ||
28 | config S5P64X0_SETUP_FB_24BPP | ||
29 | bool | ||
30 | help | ||
31 | Common setup code for S5P64X0 based boards with a LCD display | ||
32 | through RGB interface. | ||
33 | |||
24 | config S5P64X0_SETUP_I2C1 | 34 | config S5P64X0_SETUP_I2C1 |
25 | bool | 35 | bool |
26 | help | 36 | help |
@@ -31,6 +41,7 @@ config S5P64X0_SETUP_I2C1 | |||
31 | config MACH_SMDK6440 | 41 | config MACH_SMDK6440 |
32 | bool "SMDK6440" | 42 | bool "SMDK6440" |
33 | select CPU_S5P6440 | 43 | select CPU_S5P6440 |
44 | select S3C_DEV_FB | ||
34 | select S3C_DEV_I2C1 | 45 | select S3C_DEV_I2C1 |
35 | select S3C_DEV_RTC | 46 | select S3C_DEV_RTC |
36 | select S3C_DEV_WDT | 47 | select S3C_DEV_WDT |
@@ -39,6 +50,7 @@ config MACH_SMDK6440 | |||
39 | select SAMSUNG_DEV_BACKLIGHT | 50 | select SAMSUNG_DEV_BACKLIGHT |
40 | select SAMSUNG_DEV_PWM | 51 | select SAMSUNG_DEV_PWM |
41 | select SAMSUNG_DEV_TS | 52 | select SAMSUNG_DEV_TS |
53 | select S5P64X0_SETUP_FB_24BPP | ||
42 | select S5P64X0_SETUP_I2C1 | 54 | select S5P64X0_SETUP_I2C1 |
43 | help | 55 | help |
44 | Machine support for the Samsung SMDK6440 | 56 | Machine support for the Samsung SMDK6440 |
@@ -46,6 +58,7 @@ config MACH_SMDK6440 | |||
46 | config MACH_SMDK6450 | 58 | config MACH_SMDK6450 |
47 | bool "SMDK6450" | 59 | bool "SMDK6450" |
48 | select CPU_S5P6450 | 60 | select CPU_S5P6450 |
61 | select S3C_DEV_FB | ||
49 | select S3C_DEV_I2C1 | 62 | select S3C_DEV_I2C1 |
50 | select S3C_DEV_RTC | 63 | select S3C_DEV_RTC |
51 | select S3C_DEV_WDT | 64 | select S3C_DEV_WDT |
@@ -54,6 +67,7 @@ config MACH_SMDK6450 | |||
54 | select SAMSUNG_DEV_BACKLIGHT | 67 | select SAMSUNG_DEV_BACKLIGHT |
55 | select SAMSUNG_DEV_PWM | 68 | select SAMSUNG_DEV_PWM |
56 | select SAMSUNG_DEV_TS | 69 | select SAMSUNG_DEV_TS |
70 | select S5P64X0_SETUP_FB_24BPP | ||
57 | select S5P64X0_SETUP_I2C1 | 71 | select S5P64X0_SETUP_I2C1 |
58 | help | 72 | help |
59 | Machine support for the Samsung SMDK6450 | 73 | Machine support for the Samsung SMDK6450 |
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile index 5f6afdf067e..a1324d8dc4e 100644 --- a/arch/arm/mach-s5p64x0/Makefile +++ b/arch/arm/mach-s5p64x0/Makefile | |||
@@ -12,10 +12,11 @@ obj- := | |||
12 | 12 | ||
13 | # Core support for S5P64X0 system | 13 | # Core support for S5P64X0 system |
14 | 14 | ||
15 | obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o gpiolib.o | 15 | obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o |
16 | obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o irq-eint.o | 16 | obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o irq-eint.o |
17 | obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o | 17 | obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o |
18 | obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o | 18 | obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o |
19 | obj-$(CONFIG_PM) += pm.o irq-pm.o | ||
19 | 20 | ||
20 | # machine support | 21 | # machine support |
21 | 22 | ||
@@ -28,3 +29,4 @@ obj-y += dev-audio.o | |||
28 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | 29 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o |
29 | 30 | ||
30 | obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o | 31 | obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o |
32 | obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o | ||
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c index 0e9cd3092dd..c54c65d511f 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c | |||
@@ -146,7 +146,8 @@ static struct clk init_clocks_off[] = { | |||
146 | .enable = s5p64x0_hclk0_ctrl, | 146 | .enable = s5p64x0_hclk0_ctrl, |
147 | .ctrlbit = (1 << 8), | 147 | .ctrlbit = (1 << 8), |
148 | }, { | 148 | }, { |
149 | .name = "pdma", | 149 | .name = "dma", |
150 | .devname = "dma-pl330", | ||
150 | .parent = &clk_hclk_low.clk, | 151 | .parent = &clk_hclk_low.clk, |
151 | .enable = s5p64x0_hclk0_ctrl, | 152 | .enable = s5p64x0_hclk0_ctrl, |
152 | .ctrlbit = (1 << 12), | 153 | .ctrlbit = (1 << 12), |
@@ -499,6 +500,11 @@ static struct clksrc_clk *sysclks[] = { | |||
499 | &clk_pclk_low, | 500 | &clk_pclk_low, |
500 | }; | 501 | }; |
501 | 502 | ||
503 | static struct clk dummy_apb_pclk = { | ||
504 | .name = "apb_pclk", | ||
505 | .id = -1, | ||
506 | }; | ||
507 | |||
502 | void __init_or_cpufreq s5p6440_setup_clocks(void) | 508 | void __init_or_cpufreq s5p6440_setup_clocks(void) |
503 | { | 509 | { |
504 | struct clk *xtal_clk; | 510 | struct clk *xtal_clk; |
@@ -581,5 +587,7 @@ void __init s5p6440_register_clocks(void) | |||
581 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 587 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
582 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 588 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
583 | 589 | ||
590 | s3c24xx_register_clock(&dummy_apb_pclk); | ||
591 | |||
584 | s3c_pwmclk_init(); | 592 | s3c_pwmclk_init(); |
585 | } | 593 | } |
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c index d9dc16cde10..2d04abfba12 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6450.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c | |||
@@ -179,7 +179,8 @@ static struct clk init_clocks_off[] = { | |||
179 | .enable = s5p64x0_hclk0_ctrl, | 179 | .enable = s5p64x0_hclk0_ctrl, |
180 | .ctrlbit = (1 << 3), | 180 | .ctrlbit = (1 << 3), |
181 | }, { | 181 | }, { |
182 | .name = "pdma", | 182 | .name = "dma", |
183 | .devname = "dma-pl330", | ||
183 | .parent = &clk_hclk_low.clk, | 184 | .parent = &clk_hclk_low.clk, |
184 | .enable = s5p64x0_hclk0_ctrl, | 185 | .enable = s5p64x0_hclk0_ctrl, |
185 | .ctrlbit = (1 << 12), | 186 | .ctrlbit = (1 << 12), |
@@ -553,6 +554,11 @@ static struct clksrc_clk *sysclks[] = { | |||
553 | &clk_sclk_audio0, | 554 | &clk_sclk_audio0, |
554 | }; | 555 | }; |
555 | 556 | ||
557 | static struct clk dummy_apb_pclk = { | ||
558 | .name = "apb_pclk", | ||
559 | .id = -1, | ||
560 | }; | ||
561 | |||
556 | void __init_or_cpufreq s5p6450_setup_clocks(void) | 562 | void __init_or_cpufreq s5p6450_setup_clocks(void) |
557 | { | 563 | { |
558 | struct clk *xtal_clk; | 564 | struct clk *xtal_clk; |
@@ -632,5 +638,7 @@ void __init s5p6450_register_clocks(void) | |||
632 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 638 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
633 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 639 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
634 | 640 | ||
641 | s3c24xx_register_clock(&dummy_apb_pclk); | ||
642 | |||
635 | s3c_pwmclk_init(); | 643 | s3c_pwmclk_init(); |
636 | } | 644 | } |
diff --git a/arch/arm/mach-s5p64x0/cpu.c b/arch/arm/mach-s5p64x0/cpu.c index 8a938542c54..ecab40cf19a 100644 --- a/arch/arm/mach-s5p64x0/cpu.c +++ b/arch/arm/mach-s5p64x0/cpu.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <plat/s5p6440.h> | 39 | #include <plat/s5p6440.h> |
40 | #include <plat/s5p6450.h> | 40 | #include <plat/s5p6450.h> |
41 | #include <plat/adc-core.h> | 41 | #include <plat/adc-core.h> |
42 | #include <plat/fb-core.h> | ||
42 | 43 | ||
43 | /* Initial IO mappings */ | 44 | /* Initial IO mappings */ |
44 | 45 | ||
@@ -109,6 +110,7 @@ void __init s5p6440_map_io(void) | |||
109 | { | 110 | { |
110 | /* initialize any device information early */ | 111 | /* initialize any device information early */ |
111 | s3c_adc_setname("s3c64xx-adc"); | 112 | s3c_adc_setname("s3c64xx-adc"); |
113 | s3c_fb_setname("s5p64x0-fb"); | ||
112 | 114 | ||
113 | iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); | 115 | iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); |
114 | iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); | 116 | iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); |
@@ -119,6 +121,7 @@ void __init s5p6450_map_io(void) | |||
119 | { | 121 | { |
120 | /* initialize any device information early */ | 122 | /* initialize any device information early */ |
121 | s3c_adc_setname("s3c64xx-adc"); | 123 | s3c_adc_setname("s3c64xx-adc"); |
124 | s3c_fb_setname("s5p64x0-fb"); | ||
122 | 125 | ||
123 | iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); | 126 | iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); |
124 | iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); | 127 | iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); |
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c index 0e5b3e63e5b..442dd4ad12d 100644 --- a/arch/arm/mach-s5p64x0/dma.c +++ b/arch/arm/mach-s5p64x0/dma.c | |||
@@ -21,115 +21,208 @@ | |||
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #include <linux/platform_device.h> | ||
25 | #include <linux/dma-mapping.h> | 24 | #include <linux/dma-mapping.h> |
25 | #include <linux/amba/bus.h> | ||
26 | #include <linux/amba/pl330.h> | ||
27 | |||
28 | #include <asm/irq.h> | ||
26 | 29 | ||
27 | #include <mach/map.h> | 30 | #include <mach/map.h> |
28 | #include <mach/irqs.h> | 31 | #include <mach/irqs.h> |
29 | #include <mach/regs-clock.h> | 32 | #include <mach/regs-clock.h> |
33 | #include <mach/dma.h> | ||
30 | 34 | ||
31 | #include <plat/cpu.h> | 35 | #include <plat/cpu.h> |
32 | #include <plat/devs.h> | 36 | #include <plat/devs.h> |
33 | #include <plat/s3c-pl330-pdata.h> | 37 | #include <plat/irqs.h> |
34 | 38 | ||
35 | static u64 dma_dmamask = DMA_BIT_MASK(32); | 39 | static u64 dma_dmamask = DMA_BIT_MASK(32); |
36 | 40 | ||
37 | static struct resource s5p64x0_pdma_resource[] = { | 41 | struct dma_pl330_peri s5p6440_pdma_peri[22] = { |
38 | [0] = { | 42 | { |
39 | .start = S5P64X0_PA_PDMA, | 43 | .peri_id = (u8)DMACH_UART0_RX, |
40 | .end = S5P64X0_PA_PDMA + SZ_4K, | 44 | .rqtype = DEVTOMEM, |
41 | .flags = IORESOURCE_MEM, | 45 | }, { |
42 | }, | 46 | .peri_id = (u8)DMACH_UART0_TX, |
43 | [1] = { | 47 | .rqtype = MEMTODEV, |
44 | .start = IRQ_DMA0, | 48 | }, { |
45 | .end = IRQ_DMA0, | 49 | .peri_id = (u8)DMACH_UART1_RX, |
46 | .flags = IORESOURCE_IRQ, | 50 | .rqtype = DEVTOMEM, |
51 | }, { | ||
52 | .peri_id = (u8)DMACH_UART1_TX, | ||
53 | .rqtype = MEMTODEV, | ||
54 | }, { | ||
55 | .peri_id = (u8)DMACH_UART2_RX, | ||
56 | .rqtype = DEVTOMEM, | ||
57 | }, { | ||
58 | .peri_id = (u8)DMACH_UART2_TX, | ||
59 | .rqtype = MEMTODEV, | ||
60 | }, { | ||
61 | .peri_id = (u8)DMACH_UART3_RX, | ||
62 | .rqtype = DEVTOMEM, | ||
63 | }, { | ||
64 | .peri_id = (u8)DMACH_UART3_TX, | ||
65 | .rqtype = MEMTODEV, | ||
66 | }, { | ||
67 | .peri_id = DMACH_MAX, | ||
68 | }, { | ||
69 | .peri_id = DMACH_MAX, | ||
70 | }, { | ||
71 | .peri_id = (u8)DMACH_PCM0_TX, | ||
72 | .rqtype = MEMTODEV, | ||
73 | }, { | ||
74 | .peri_id = (u8)DMACH_PCM0_RX, | ||
75 | .rqtype = DEVTOMEM, | ||
76 | }, { | ||
77 | .peri_id = (u8)DMACH_I2S0_TX, | ||
78 | .rqtype = MEMTODEV, | ||
79 | }, { | ||
80 | .peri_id = (u8)DMACH_I2S0_RX, | ||
81 | .rqtype = DEVTOMEM, | ||
82 | }, { | ||
83 | .peri_id = (u8)DMACH_SPI0_TX, | ||
84 | .rqtype = MEMTODEV, | ||
85 | }, { | ||
86 | .peri_id = (u8)DMACH_SPI0_RX, | ||
87 | .rqtype = DEVTOMEM, | ||
88 | }, { | ||
89 | .peri_id = (u8)DMACH_MAX, | ||
90 | }, { | ||
91 | .peri_id = (u8)DMACH_MAX, | ||
92 | }, { | ||
93 | .peri_id = (u8)DMACH_MAX, | ||
94 | }, { | ||
95 | .peri_id = (u8)DMACH_MAX, | ||
96 | }, { | ||
97 | .peri_id = (u8)DMACH_SPI1_TX, | ||
98 | .rqtype = MEMTODEV, | ||
99 | }, { | ||
100 | .peri_id = (u8)DMACH_SPI1_RX, | ||
101 | .rqtype = DEVTOMEM, | ||
47 | }, | 102 | }, |
48 | }; | 103 | }; |
49 | 104 | ||
50 | static struct s3c_pl330_platdata s5p6440_pdma_pdata = { | 105 | struct dma_pl330_platdata s5p6440_pdma_pdata = { |
51 | .peri = { | 106 | .nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri), |
52 | [0] = DMACH_UART0_RX, | 107 | .peri = s5p6440_pdma_peri, |
53 | [1] = DMACH_UART0_TX, | ||
54 | [2] = DMACH_UART1_RX, | ||
55 | [3] = DMACH_UART1_TX, | ||
56 | [4] = DMACH_UART2_RX, | ||
57 | [5] = DMACH_UART2_TX, | ||
58 | [6] = DMACH_UART3_RX, | ||
59 | [7] = DMACH_UART3_TX, | ||
60 | [8] = DMACH_MAX, | ||
61 | [9] = DMACH_MAX, | ||
62 | [10] = DMACH_PCM0_TX, | ||
63 | [11] = DMACH_PCM0_RX, | ||
64 | [12] = DMACH_I2S0_TX, | ||
65 | [13] = DMACH_I2S0_RX, | ||
66 | [14] = DMACH_SPI0_TX, | ||
67 | [15] = DMACH_SPI0_RX, | ||
68 | [16] = DMACH_MAX, | ||
69 | [17] = DMACH_MAX, | ||
70 | [18] = DMACH_MAX, | ||
71 | [19] = DMACH_MAX, | ||
72 | [20] = DMACH_SPI1_TX, | ||
73 | [21] = DMACH_SPI1_RX, | ||
74 | [22] = DMACH_MAX, | ||
75 | [23] = DMACH_MAX, | ||
76 | [24] = DMACH_MAX, | ||
77 | [25] = DMACH_MAX, | ||
78 | [26] = DMACH_MAX, | ||
79 | [27] = DMACH_MAX, | ||
80 | [28] = DMACH_MAX, | ||
81 | [29] = DMACH_PWM, | ||
82 | [30] = DMACH_MAX, | ||
83 | [31] = DMACH_MAX, | ||
84 | }, | ||
85 | }; | 108 | }; |
86 | 109 | ||
87 | static struct s3c_pl330_platdata s5p6450_pdma_pdata = { | 110 | struct dma_pl330_peri s5p6450_pdma_peri[32] = { |
88 | .peri = { | 111 | { |
89 | [0] = DMACH_UART0_RX, | 112 | .peri_id = (u8)DMACH_UART0_RX, |
90 | [1] = DMACH_UART0_TX, | 113 | .rqtype = DEVTOMEM, |
91 | [2] = DMACH_UART1_RX, | 114 | }, { |
92 | [3] = DMACH_UART1_TX, | 115 | .peri_id = (u8)DMACH_UART0_TX, |
93 | [4] = DMACH_UART2_RX, | 116 | .rqtype = MEMTODEV, |
94 | [5] = DMACH_UART2_TX, | 117 | }, { |
95 | [6] = DMACH_UART3_RX, | 118 | .peri_id = (u8)DMACH_UART1_RX, |
96 | [7] = DMACH_UART3_TX, | 119 | .rqtype = DEVTOMEM, |
97 | [8] = DMACH_UART4_RX, | 120 | }, { |
98 | [9] = DMACH_UART4_TX, | 121 | .peri_id = (u8)DMACH_UART1_TX, |
99 | [10] = DMACH_PCM0_TX, | 122 | .rqtype = MEMTODEV, |
100 | [11] = DMACH_PCM0_RX, | 123 | }, { |
101 | [12] = DMACH_I2S0_TX, | 124 | .peri_id = (u8)DMACH_UART2_RX, |
102 | [13] = DMACH_I2S0_RX, | 125 | .rqtype = DEVTOMEM, |
103 | [14] = DMACH_SPI0_TX, | 126 | }, { |
104 | [15] = DMACH_SPI0_RX, | 127 | .peri_id = (u8)DMACH_UART2_TX, |
105 | [16] = DMACH_PCM1_TX, | 128 | .rqtype = MEMTODEV, |
106 | [17] = DMACH_PCM1_RX, | 129 | }, { |
107 | [18] = DMACH_PCM2_TX, | 130 | .peri_id = (u8)DMACH_UART3_RX, |
108 | [19] = DMACH_PCM2_RX, | 131 | .rqtype = DEVTOMEM, |
109 | [20] = DMACH_SPI1_TX, | 132 | }, { |
110 | [21] = DMACH_SPI1_RX, | 133 | .peri_id = (u8)DMACH_UART3_TX, |
111 | [22] = DMACH_USI_TX, | 134 | .rqtype = MEMTODEV, |
112 | [23] = DMACH_USI_RX, | 135 | }, { |
113 | [24] = DMACH_MAX, | 136 | .peri_id = (u8)DMACH_UART4_RX, |
114 | [25] = DMACH_I2S1_TX, | 137 | .rqtype = DEVTOMEM, |
115 | [26] = DMACH_I2S1_RX, | 138 | }, { |
116 | [27] = DMACH_I2S2_TX, | 139 | .peri_id = (u8)DMACH_UART4_TX, |
117 | [28] = DMACH_I2S2_RX, | 140 | .rqtype = MEMTODEV, |
118 | [29] = DMACH_PWM, | 141 | }, { |
119 | [30] = DMACH_UART5_RX, | 142 | .peri_id = (u8)DMACH_PCM0_TX, |
120 | [31] = DMACH_UART5_TX, | 143 | .rqtype = MEMTODEV, |
144 | }, { | ||
145 | .peri_id = (u8)DMACH_PCM0_RX, | ||
146 | .rqtype = DEVTOMEM, | ||
147 | }, { | ||
148 | .peri_id = (u8)DMACH_I2S0_TX, | ||
149 | .rqtype = MEMTODEV, | ||
150 | }, { | ||
151 | .peri_id = (u8)DMACH_I2S0_RX, | ||
152 | .rqtype = DEVTOMEM, | ||
153 | }, { | ||
154 | .peri_id = (u8)DMACH_SPI0_TX, | ||
155 | .rqtype = MEMTODEV, | ||
156 | }, { | ||
157 | .peri_id = (u8)DMACH_SPI0_RX, | ||
158 | .rqtype = DEVTOMEM, | ||
159 | }, { | ||
160 | .peri_id = (u8)DMACH_PCM1_TX, | ||
161 | .rqtype = MEMTODEV, | ||
162 | }, { | ||
163 | .peri_id = (u8)DMACH_PCM1_RX, | ||
164 | .rqtype = DEVTOMEM, | ||
165 | }, { | ||
166 | .peri_id = (u8)DMACH_PCM2_TX, | ||
167 | .rqtype = MEMTODEV, | ||
168 | }, { | ||
169 | .peri_id = (u8)DMACH_PCM2_RX, | ||
170 | .rqtype = DEVTOMEM, | ||
171 | }, { | ||
172 | .peri_id = (u8)DMACH_SPI1_TX, | ||
173 | .rqtype = MEMTODEV, | ||
174 | }, { | ||
175 | .peri_id = (u8)DMACH_SPI1_RX, | ||
176 | .rqtype = DEVTOMEM, | ||
177 | }, { | ||
178 | .peri_id = (u8)DMACH_USI_TX, | ||
179 | .rqtype = MEMTODEV, | ||
180 | }, { | ||
181 | .peri_id = (u8)DMACH_USI_RX, | ||
182 | .rqtype = DEVTOMEM, | ||
183 | }, { | ||
184 | .peri_id = (u8)DMACH_MAX, | ||
185 | }, { | ||
186 | .peri_id = (u8)DMACH_I2S1_TX, | ||
187 | .rqtype = MEMTODEV, | ||
188 | }, { | ||
189 | .peri_id = (u8)DMACH_I2S1_RX, | ||
190 | .rqtype = DEVTOMEM, | ||
191 | }, { | ||
192 | .peri_id = (u8)DMACH_I2S2_TX, | ||
193 | .rqtype = MEMTODEV, | ||
194 | }, { | ||
195 | .peri_id = (u8)DMACH_I2S2_RX, | ||
196 | .rqtype = DEVTOMEM, | ||
197 | }, { | ||
198 | .peri_id = (u8)DMACH_PWM, | ||
199 | }, { | ||
200 | .peri_id = (u8)DMACH_UART5_RX, | ||
201 | .rqtype = DEVTOMEM, | ||
202 | }, { | ||
203 | .peri_id = (u8)DMACH_UART5_TX, | ||
204 | .rqtype = MEMTODEV, | ||
121 | }, | 205 | }, |
122 | }; | 206 | }; |
123 | 207 | ||
124 | static struct platform_device s5p64x0_device_pdma = { | 208 | struct dma_pl330_platdata s5p6450_pdma_pdata = { |
125 | .name = "s3c-pl330", | 209 | .nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri), |
126 | .id = -1, | 210 | .peri = s5p6450_pdma_peri, |
127 | .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource), | 211 | }; |
128 | .resource = s5p64x0_pdma_resource, | 212 | |
129 | .dev = { | 213 | struct amba_device s5p64x0_device_pdma = { |
214 | .dev = { | ||
215 | .init_name = "dma-pl330", | ||
130 | .dma_mask = &dma_dmamask, | 216 | .dma_mask = &dma_dmamask, |
131 | .coherent_dma_mask = DMA_BIT_MASK(32), | 217 | .coherent_dma_mask = DMA_BIT_MASK(32), |
132 | }, | 218 | }, |
219 | .res = { | ||
220 | .start = S5P64X0_PA_PDMA, | ||
221 | .end = S5P64X0_PA_PDMA + SZ_4K, | ||
222 | .flags = IORESOURCE_MEM, | ||
223 | }, | ||
224 | .irq = {IRQ_DMA0, NO_IRQ}, | ||
225 | .periphid = 0x00041330, | ||
133 | }; | 226 | }; |
134 | 227 | ||
135 | static int __init s5p64x0_dma_init(void) | 228 | static int __init s5p64x0_dma_init(void) |
@@ -139,7 +232,7 @@ static int __init s5p64x0_dma_init(void) | |||
139 | else | 232 | else |
140 | s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; | 233 | s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; |
141 | 234 | ||
142 | platform_device_register(&s5p64x0_device_pdma); | 235 | amba_device_register(&s5p64x0_device_pdma, &iomem_resource); |
143 | 236 | ||
144 | return 0; | 237 | return 0; |
145 | } | 238 | } |
diff --git a/arch/arm/mach-s5p64x0/include/mach/clkdev.h b/arch/arm/mach-s5p64x0/include/mach/clkdev.h deleted file mode 100644 index 7dffa83d23f..00000000000 --- a/arch/arm/mach-s5p64x0/include/mach/clkdev.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __MACH_CLKDEV_H__ | ||
2 | #define __MACH_CLKDEV_H__ | ||
3 | |||
4 | #define __clk_get(clk) ({ 1; }) | ||
5 | #define __clk_put(clk) do {} while (0) | ||
6 | |||
7 | #endif | ||
diff --git a/arch/arm/mach-s5p64x0/include/mach/dma.h b/arch/arm/mach-s5p64x0/include/mach/dma.h index 81209eb1409..5a622af461d 100644 --- a/arch/arm/mach-s5p64x0/include/mach/dma.h +++ b/arch/arm/mach-s5p64x0/include/mach/dma.h | |||
@@ -20,7 +20,7 @@ | |||
20 | #ifndef __MACH_DMA_H | 20 | #ifndef __MACH_DMA_H |
21 | #define __MACH_DMA_H | 21 | #define __MACH_DMA_H |
22 | 22 | ||
23 | /* This platform uses the common S3C DMA API driver for PL330 */ | 23 | /* This platform uses the common common DMA API driver for PL330 */ |
24 | #include <plat/s3c-dma-pl330.h> | 24 | #include <plat/dma-pl330.h> |
25 | 25 | ||
26 | #endif /* __MACH_DMA_H */ | 26 | #endif /* __MACH_DMA_H */ |
diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h index 5837a36ece8..53982db9d25 100644 --- a/arch/arm/mach-s5p64x0/include/mach/irqs.h +++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h | |||
@@ -87,6 +87,10 @@ | |||
87 | 87 | ||
88 | #define IRQ_I2S0 IRQ_I2SV40 | 88 | #define IRQ_I2S0 IRQ_I2SV40 |
89 | 89 | ||
90 | #define IRQ_LCD_FIFO IRQ_DISPCON0 | ||
91 | #define IRQ_LCD_VSYNC IRQ_DISPCON1 | ||
92 | #define IRQ_LCD_SYSTEM IRQ_DISPCON2 | ||
93 | |||
90 | /* S5P6450 EINT feature will be added */ | 94 | /* S5P6450 EINT feature will be added */ |
91 | 95 | ||
92 | /* | 96 | /* |
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h index 95c91257c7c..4d3ac8a3709 100644 --- a/arch/arm/mach-s5p64x0/include/mach/map.h +++ b/arch/arm/mach-s5p64x0/include/mach/map.h | |||
@@ -47,6 +47,8 @@ | |||
47 | 47 | ||
48 | #define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) | 48 | #define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) |
49 | 49 | ||
50 | #define S5P64X0_PA_FB 0xEE000000 | ||
51 | |||
50 | #define S5P64X0_PA_I2S 0xF2000000 | 52 | #define S5P64X0_PA_I2S 0xF2000000 |
51 | #define S5P6450_PA_I2S1 0xF2800000 | 53 | #define S5P6450_PA_I2S1 0xF2800000 |
52 | #define S5P6450_PA_I2S2 0xF2900000 | 54 | #define S5P6450_PA_I2S2 0xF2900000 |
@@ -64,6 +66,7 @@ | |||
64 | #define S3C_PA_IIC1 S5P6440_PA_IIC1 | 66 | #define S3C_PA_IIC1 S5P6440_PA_IIC1 |
65 | #define S3C_PA_RTC S5P64X0_PA_RTC | 67 | #define S3C_PA_RTC S5P64X0_PA_RTC |
66 | #define S3C_PA_WDT S5P64X0_PA_WDT | 68 | #define S3C_PA_WDT S5P64X0_PA_WDT |
69 | #define S3C_PA_FB S5P64X0_PA_FB | ||
67 | 70 | ||
68 | #define S5P_PA_CHIPID S5P64X0_PA_CHIPID | 71 | #define S5P_PA_CHIPID S5P64X0_PA_CHIPID |
69 | #define S5P_PA_SROMC S5P64X0_PA_SROMC | 72 | #define S5P_PA_SROMC S5P64X0_PA_SROMC |
@@ -85,5 +88,6 @@ | |||
85 | #define S5P_PA_UART5 S5P6450_PA_UART(5) | 88 | #define S5P_PA_UART5 S5P6450_PA_UART(5) |
86 | 89 | ||
87 | #define S5P_SZ_UART SZ_256 | 90 | #define S5P_SZ_UART SZ_256 |
91 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) | ||
88 | 92 | ||
89 | #endif /* __ASM_ARCH_MAP_H */ | 93 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s5p64x0/include/mach/pm-core.h b/arch/arm/mach-s5p64x0/include/mach/pm-core.h new file mode 100644 index 00000000000..e52f7545d3a --- /dev/null +++ b/arch/arm/mach-s5p64x0/include/mach/pm-core.h | |||
@@ -0,0 +1,117 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/pm-core.h | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 - PM core support for arch/arm/plat-samsung/pm.c | ||
7 | * | ||
8 | * Based on PM core support for S3C64XX by Ben Dooks | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <mach/regs-gpio.h> | ||
16 | |||
17 | static inline void s3c_pm_debug_init_uart(void) | ||
18 | { | ||
19 | u32 tmp = __raw_readl(S5P64X0_CLK_GATE_PCLK); | ||
20 | |||
21 | /* | ||
22 | * As a note, since the S5P64X0 UARTs generally have multiple | ||
23 | * clock sources, we simply enable PCLK at the moment and hope | ||
24 | * that the resume settings for the UART are suitable for the | ||
25 | * use with PCLK. | ||
26 | */ | ||
27 | tmp |= S5P64X0_CLK_GATE_PCLK_UART0; | ||
28 | tmp |= S5P64X0_CLK_GATE_PCLK_UART1; | ||
29 | tmp |= S5P64X0_CLK_GATE_PCLK_UART2; | ||
30 | tmp |= S5P64X0_CLK_GATE_PCLK_UART3; | ||
31 | |||
32 | __raw_writel(tmp, S5P64X0_CLK_GATE_PCLK); | ||
33 | udelay(10); | ||
34 | } | ||
35 | |||
36 | static inline void s3c_pm_arch_prepare_irqs(void) | ||
37 | { | ||
38 | /* VIC should have already been taken care of */ | ||
39 | |||
40 | /* clear any pending EINT0 interrupts */ | ||
41 | __raw_writel(__raw_readl(S5P64X0_EINT0PEND), S5P64X0_EINT0PEND); | ||
42 | } | ||
43 | |||
44 | static inline void s3c_pm_arch_stop_clocks(void) { } | ||
45 | static inline void s3c_pm_arch_show_resume_irqs(void) { } | ||
46 | |||
47 | /* | ||
48 | * make these defines, we currently do not have any need to change | ||
49 | * the IRQ wake controls depending on the CPU we are running on | ||
50 | */ | ||
51 | #define s3c_irqwake_eintallow ((1 << 16) - 1) | ||
52 | #define s3c_irqwake_intallow (~0) | ||
53 | |||
54 | static inline void s3c_pm_arch_update_uart(void __iomem *regs, | ||
55 | struct pm_uart_save *save) | ||
56 | { | ||
57 | u32 ucon = __raw_readl(regs + S3C2410_UCON); | ||
58 | u32 ucon_clk = ucon & S3C6400_UCON_CLKMASK; | ||
59 | u32 save_clk = save->ucon & S3C6400_UCON_CLKMASK; | ||
60 | u32 new_ucon; | ||
61 | u32 delta; | ||
62 | |||
63 | /* | ||
64 | * S5P64X0 UART blocks only support level interrupts, so ensure that | ||
65 | * when we restore unused UART blocks we force the level interrupt | ||
66 | * settings. | ||
67 | */ | ||
68 | save->ucon |= S3C2410_UCON_TXILEVEL | S3C2410_UCON_RXILEVEL; | ||
69 | |||
70 | /* | ||
71 | * We have a constraint on changing the clock type of the UART | ||
72 | * between UCLKx and PCLK, so ensure that when we restore UCON | ||
73 | * that the CLK field is correctly modified if the bootloader | ||
74 | * has changed anything. | ||
75 | */ | ||
76 | if (ucon_clk != save_clk) { | ||
77 | new_ucon = save->ucon; | ||
78 | delta = ucon_clk ^ save_clk; | ||
79 | |||
80 | /* | ||
81 | * change from UCLKx => wrong PCLK, | ||
82 | * either UCLK can be tested for by a bit-test | ||
83 | * with UCLK0 | ||
84 | */ | ||
85 | if (ucon_clk & S3C6400_UCON_UCLK0 && | ||
86 | !(save_clk & S3C6400_UCON_UCLK0) && | ||
87 | delta & S3C6400_UCON_PCLK2) { | ||
88 | new_ucon &= ~S3C6400_UCON_UCLK0; | ||
89 | } else if (delta == S3C6400_UCON_PCLK2) { | ||
90 | /* | ||
91 | * as a precaution, don't change from | ||
92 | * PCLK2 => PCLK or vice-versa | ||
93 | */ | ||
94 | new_ucon ^= S3C6400_UCON_PCLK2; | ||
95 | } | ||
96 | |||
97 | S3C_PMDBG("ucon change %04x => %04x (save=%04x)\n", | ||
98 | ucon, new_ucon, save->ucon); | ||
99 | save->ucon = new_ucon; | ||
100 | } | ||
101 | } | ||
102 | |||
103 | static inline void s3c_pm_restored_gpios(void) | ||
104 | { | ||
105 | /* ensure sleep mode has been cleared from the system */ | ||
106 | __raw_writel(0, S5P64X0_SLPEN); | ||
107 | } | ||
108 | |||
109 | static inline void samsung_pm_saved_gpios(void) | ||
110 | { | ||
111 | /* | ||
112 | * turn on the sleep mode and keep it there, as it seems that during | ||
113 | * suspend the xCON registers get re-set and thus you can end up with | ||
114 | * problems between going to sleep and resuming. | ||
115 | */ | ||
116 | __raw_writel(S5P64X0_SLPEN_USE_xSLP, S5P64X0_SLPEN); | ||
117 | } | ||
diff --git a/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h b/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h deleted file mode 100644 index 19fff8b701c..00000000000 --- a/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h +++ /dev/null | |||
@@ -1,68 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright 2008 Openmoko, Inc. | ||
7 | * Copyright 2008 Simtec Electronics | ||
8 | * Ben Dooks <ben@simtec.co.uk> | ||
9 | * http://armlinux.simtec.co.uk/ | ||
10 | * | ||
11 | * S5P64X0 - pwm clock and timer support | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License version 2 as | ||
15 | * published by the Free Software Foundation. | ||
16 | */ | ||
17 | |||
18 | #ifndef __ASM_ARCH_PWMCLK_H | ||
19 | #define __ASM_ARCH_PWMCLK_H __FILE__ | ||
20 | |||
21 | /** | ||
22 | * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk | ||
23 | * @tcfg: The timer TCFG1 register bits shifted down to 0. | ||
24 | * | ||
25 | * Return true if the given configuration from TCFG1 is a TCLK instead | ||
26 | * any of the TDIV clocks. | ||
27 | */ | ||
28 | static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) | ||
29 | { | ||
30 | return 0; | ||
31 | } | ||
32 | |||
33 | /** | ||
34 | * tcfg_to_divisor() - convert tcfg1 setting to a divisor | ||
35 | * @tcfg1: The tcfg1 setting, shifted down. | ||
36 | * | ||
37 | * Get the divisor value for the given tcfg1 setting. We assume the | ||
38 | * caller has already checked to see if this is not a TCLK source. | ||
39 | */ | ||
40 | static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) | ||
41 | { | ||
42 | return 1 << tcfg1; | ||
43 | } | ||
44 | |||
45 | /** | ||
46 | * pwm_tdiv_has_div1() - does the tdiv setting have a /1 | ||
47 | * | ||
48 | * Return true if we have a /1 in the tdiv setting. | ||
49 | */ | ||
50 | static inline unsigned int pwm_tdiv_has_div1(void) | ||
51 | { | ||
52 | return 1; | ||
53 | } | ||
54 | |||
55 | /** | ||
56 | * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. | ||
57 | * @div: The divisor to calculate the bit information for. | ||
58 | * | ||
59 | * Turn a divisor into the necessary bit field for TCFG1. | ||
60 | */ | ||
61 | static inline unsigned long pwm_tdiv_div_bits(unsigned int div) | ||
62 | { | ||
63 | return ilog2(div); | ||
64 | } | ||
65 | |||
66 | #define S3C_TCFG1_MUX_TCLK 0 | ||
67 | |||
68 | #endif /* __ASM_ARCH_PWMCLK_H */ | ||
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-clock.h b/arch/arm/mach-s5p64x0/include/mach/regs-clock.h index a133f22fa15..bd91112c813 100644 --- a/arch/arm/mach-s5p64x0/include/mach/regs-clock.h +++ b/arch/arm/mach-s5p64x0/include/mach/regs-clock.h | |||
@@ -41,17 +41,50 @@ | |||
41 | #define S5P6450_DPLL_CON S5P_CLKREG(0x50) | 41 | #define S5P6450_DPLL_CON S5P_CLKREG(0x50) |
42 | #define S5P6450_DPLL_CON_K S5P_CLKREG(0x54) | 42 | #define S5P6450_DPLL_CON_K S5P_CLKREG(0x54) |
43 | 43 | ||
44 | #define S5P64X0_AHB_CON0 S5P_CLKREG(0x100) | ||
44 | #define S5P64X0_CLK_SRC1 S5P_CLKREG(0x10C) | 45 | #define S5P64X0_CLK_SRC1 S5P_CLKREG(0x10C) |
45 | 46 | ||
46 | #define S5P64X0_SYS_ID S5P_CLKREG(0x118) | 47 | #define S5P64X0_SYS_ID S5P_CLKREG(0x118) |
47 | #define S5P64X0_SYS_OTHERS S5P_CLKREG(0x11C) | 48 | #define S5P64X0_SYS_OTHERS S5P_CLKREG(0x11C) |
48 | 49 | ||
49 | #define S5P64X0_PWR_CFG S5P_CLKREG(0x804) | 50 | #define S5P64X0_PWR_CFG S5P_CLKREG(0x804) |
51 | #define S5P64X0_EINT_WAKEUP_MASK S5P_CLKREG(0x808) | ||
52 | #define S5P64X0_SLEEP_CFG S5P_CLKREG(0x818) | ||
53 | #define S5P64X0_PWR_STABLE S5P_CLKREG(0x828) | ||
54 | |||
50 | #define S5P64X0_OTHERS S5P_CLKREG(0x900) | 55 | #define S5P64X0_OTHERS S5P_CLKREG(0x900) |
56 | #define S5P64X0_WAKEUP_STAT S5P_CLKREG(0x908) | ||
57 | |||
58 | #define S5P64X0_INFORM0 S5P_CLKREG(0xA00) | ||
51 | 59 | ||
52 | #define S5P64X0_CLKDIV0_HCLK_SHIFT (8) | 60 | #define S5P64X0_CLKDIV0_HCLK_SHIFT (8) |
53 | #define S5P64X0_CLKDIV0_HCLK_MASK (0xF << S5P64X0_CLKDIV0_HCLK_SHIFT) | 61 | #define S5P64X0_CLKDIV0_HCLK_MASK (0xF << S5P64X0_CLKDIV0_HCLK_SHIFT) |
54 | 62 | ||
63 | /* HCLK GATE Registers */ | ||
64 | #define S5P64X0_CLK_GATE_HCLK1_FIMGVG (1 << 2) | ||
65 | #define S5P64X0_CLK_GATE_SCLK1_FIMGVG (1 << 2) | ||
66 | |||
67 | /* PCLK GATE Registers */ | ||
68 | #define S5P64X0_CLK_GATE_PCLK_UART3 (1 << 4) | ||
69 | #define S5P64X0_CLK_GATE_PCLK_UART2 (1 << 3) | ||
70 | #define S5P64X0_CLK_GATE_PCLK_UART1 (1 << 2) | ||
71 | #define S5P64X0_CLK_GATE_PCLK_UART0 (1 << 1) | ||
72 | |||
73 | #define S5P64X0_PWR_CFG_MMC1_DISABLE (1 << 15) | ||
74 | #define S5P64X0_PWR_CFG_MMC0_DISABLE (1 << 14) | ||
75 | #define S5P64X0_PWR_CFG_RTC_TICK_DISABLE (1 << 11) | ||
76 | #define S5P64X0_PWR_CFG_RTC_ALRM_DISABLE (1 << 10) | ||
77 | #define S5P64X0_PWR_CFG_WFI_MASK (3 << 5) | ||
78 | #define S5P64X0_PWR_CFG_WFI_SLEEP (3 << 5) | ||
79 | |||
80 | #define S5P64X0_SLEEP_CFG_OSC_EN (1 << 0) | ||
81 | |||
82 | #define S5P64X0_PWR_STABLE_PWR_CNT_VAL4 (4 << 0) | ||
83 | |||
84 | #define S5P6450_OTHERS_DISABLE_INT (1 << 31) | ||
85 | #define S5P64X0_OTHERS_RET_UART (1 << 26) | ||
86 | #define S5P64X0_OTHERS_RET_MMC1 (1 << 25) | ||
87 | #define S5P64X0_OTHERS_RET_MMC0 (1 << 24) | ||
55 | #define S5P64X0_OTHERS_USB_SIG_MASK (1 << 16) | 88 | #define S5P64X0_OTHERS_USB_SIG_MASK (1 << 16) |
56 | 89 | ||
57 | /* Compatibility defines */ | 90 | /* Compatibility defines */ |
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h index 6ce254729f3..cfdfa4fdadf 100644 --- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h +++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | |||
@@ -34,14 +34,35 @@ | |||
34 | #define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180) | 34 | #define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180) |
35 | #define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300) | 35 | #define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300) |
36 | 36 | ||
37 | #define S5P64X0_SPCON0 (S5P_VA_GPIO + 0x1A0) | ||
38 | #define S5P64X0_SPCON0_LCD_SEL_MASK (0x3 << 0) | ||
39 | #define S5P64X0_SPCON0_LCD_SEL_RGB (0x1 << 0) | ||
40 | #define S5P64X0_SPCON1 (S5P_VA_GPIO + 0x2B0) | ||
41 | |||
42 | #define S5P64X0_MEM0CONSLP0 (S5P_VA_GPIO + 0x1C0) | ||
43 | #define S5P64X0_MEM0CONSLP1 (S5P_VA_GPIO + 0x1C4) | ||
44 | #define S5P64X0_MEM0DRVCON (S5P_VA_GPIO + 0x1D0) | ||
45 | #define S5P64X0_MEM1DRVCON (S5P_VA_GPIO + 0x1D4) | ||
46 | |||
47 | #define S5P64X0_EINT12CON (S5P_VA_GPIO + 0x200) | ||
48 | #define S5P64X0_EINT12FLTCON (S5P_VA_GPIO + 0x220) | ||
49 | #define S5P64X0_EINT12MASK (S5P_VA_GPIO + 0x240) | ||
50 | |||
37 | /* External interrupt control registers for group0 */ | 51 | /* External interrupt control registers for group0 */ |
38 | 52 | ||
39 | #define EINT0CON0_OFFSET (0x900) | 53 | #define EINT0CON0_OFFSET (0x900) |
54 | #define EINT0FLTCON0_OFFSET (0x910) | ||
55 | #define EINT0FLTCON1_OFFSET (0x914) | ||
40 | #define EINT0MASK_OFFSET (0x920) | 56 | #define EINT0MASK_OFFSET (0x920) |
41 | #define EINT0PEND_OFFSET (0x924) | 57 | #define EINT0PEND_OFFSET (0x924) |
42 | 58 | ||
43 | #define S5P64X0_EINT0CON0 (S5P_VA_GPIO + EINT0CON0_OFFSET) | 59 | #define S5P64X0_EINT0CON0 (S5P_VA_GPIO + EINT0CON0_OFFSET) |
60 | #define S5P64X0_EINT0FLTCON0 (S5P_VA_GPIO + EINT0FLTCON0_OFFSET) | ||
61 | #define S5P64X0_EINT0FLTCON1 (S5P_VA_GPIO + EINT0FLTCON1_OFFSET) | ||
44 | #define S5P64X0_EINT0MASK (S5P_VA_GPIO + EINT0MASK_OFFSET) | 62 | #define S5P64X0_EINT0MASK (S5P_VA_GPIO + EINT0MASK_OFFSET) |
45 | #define S5P64X0_EINT0PEND (S5P_VA_GPIO + EINT0PEND_OFFSET) | 63 | #define S5P64X0_EINT0PEND (S5P_VA_GPIO + EINT0PEND_OFFSET) |
46 | 64 | ||
65 | #define S5P64X0_SLPEN (S5P_VA_GPIO + 0x930) | ||
66 | #define S5P64X0_SLPEN_USE_xSLP (1 << 0) | ||
67 | |||
47 | #endif /* __ASM_ARCH_REGS_GPIO_H */ | 68 | #endif /* __ASM_ARCH_REGS_GPIO_H */ |
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c index 494e1a8f6f6..275dc74f4a7 100644 --- a/arch/arm/mach-s5p64x0/irq-eint.c +++ b/arch/arm/mach-s5p64x0/irq-eint.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <plat/cpu.h> | 20 | #include <plat/cpu.h> |
21 | #include <plat/regs-irqtype.h> | 21 | #include <plat/regs-irqtype.h> |
22 | #include <plat/gpio-cfg.h> | 22 | #include <plat/gpio-cfg.h> |
23 | #include <plat/pm.h> | ||
23 | 24 | ||
24 | #include <mach/regs-gpio.h> | 25 | #include <mach/regs-gpio.h> |
25 | #include <mach/regs-clock.h> | 26 | #include <mach/regs-clock.h> |
@@ -134,6 +135,7 @@ static int s5p64x0_alloc_gc(void) | |||
134 | ct->chip.irq_mask = irq_gc_mask_set_bit; | 135 | ct->chip.irq_mask = irq_gc_mask_set_bit; |
135 | ct->chip.irq_unmask = irq_gc_mask_clr_bit; | 136 | ct->chip.irq_unmask = irq_gc_mask_clr_bit; |
136 | ct->chip.irq_set_type = s5p64x0_irq_eint_set_type; | 137 | ct->chip.irq_set_type = s5p64x0_irq_eint_set_type; |
138 | ct->chip.irq_set_wake = s3c_irqext_wake; | ||
137 | ct->regs.ack = EINT0PEND_OFFSET; | 139 | ct->regs.ack = EINT0PEND_OFFSET; |
138 | ct->regs.mask = EINT0MASK_OFFSET; | 140 | ct->regs.mask = EINT0MASK_OFFSET; |
139 | irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE, | 141 | irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE, |
diff --git a/arch/arm/mach-s5p64x0/irq-pm.c b/arch/arm/mach-s5p64x0/irq-pm.c new file mode 100644 index 00000000000..3e6f2456ee9 --- /dev/null +++ b/arch/arm/mach-s5p64x0/irq-pm.c | |||
@@ -0,0 +1,92 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/irq-pm.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 - Interrupt handling Power Management | ||
7 | * | ||
8 | * Based on arch/arm/mach-s3c64xx/irq-pm.c by Ben Dooks | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/syscore_ops.h> | ||
16 | #include <linux/serial_core.h> | ||
17 | #include <linux/io.h> | ||
18 | |||
19 | #include <plat/regs-serial.h> | ||
20 | #include <plat/pm.h> | ||
21 | |||
22 | #include <mach/regs-gpio.h> | ||
23 | |||
24 | static struct sleep_save irq_save[] = { | ||
25 | SAVE_ITEM(S5P64X0_EINT0CON0), | ||
26 | SAVE_ITEM(S5P64X0_EINT0FLTCON0), | ||
27 | SAVE_ITEM(S5P64X0_EINT0FLTCON1), | ||
28 | SAVE_ITEM(S5P64X0_EINT0MASK), | ||
29 | }; | ||
30 | |||
31 | static struct irq_grp_save { | ||
32 | u32 con; | ||
33 | u32 fltcon; | ||
34 | u32 mask; | ||
35 | } eint_grp_save[4]; | ||
36 | |||
37 | static u32 irq_uart_mask[CONFIG_SERIAL_SAMSUNG_UARTS]; | ||
38 | |||
39 | static int s5p64x0_irq_pm_suspend(void) | ||
40 | { | ||
41 | struct irq_grp_save *grp = eint_grp_save; | ||
42 | int i; | ||
43 | |||
44 | S3C_PMDBG("%s: suspending IRQs\n", __func__); | ||
45 | |||
46 | s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); | ||
47 | |||
48 | for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++) | ||
49 | irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM); | ||
50 | |||
51 | for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) { | ||
52 | grp->con = __raw_readl(S5P64X0_EINT12CON + (i * 4)); | ||
53 | grp->mask = __raw_readl(S5P64X0_EINT12MASK + (i * 4)); | ||
54 | grp->fltcon = __raw_readl(S5P64X0_EINT12FLTCON + (i * 4)); | ||
55 | } | ||
56 | |||
57 | return 0; | ||
58 | } | ||
59 | |||
60 | static void s5p64x0_irq_pm_resume(void) | ||
61 | { | ||
62 | struct irq_grp_save *grp = eint_grp_save; | ||
63 | int i; | ||
64 | |||
65 | S3C_PMDBG("%s: resuming IRQs\n", __func__); | ||
66 | |||
67 | s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); | ||
68 | |||
69 | for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++) | ||
70 | __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM); | ||
71 | |||
72 | for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) { | ||
73 | __raw_writel(grp->con, S5P64X0_EINT12CON + (i * 4)); | ||
74 | __raw_writel(grp->mask, S5P64X0_EINT12MASK + (i * 4)); | ||
75 | __raw_writel(grp->fltcon, S5P64X0_EINT12FLTCON + (i * 4)); | ||
76 | } | ||
77 | |||
78 | S3C_PMDBG("%s: IRQ configuration restored\n", __func__); | ||
79 | } | ||
80 | |||
81 | static struct syscore_ops s5p64x0_irq_syscore_ops = { | ||
82 | .suspend = s5p64x0_irq_pm_suspend, | ||
83 | .resume = s5p64x0_irq_pm_resume, | ||
84 | }; | ||
85 | |||
86 | static int __init s5p64x0_syscore_init(void) | ||
87 | { | ||
88 | register_syscore_ops(&s5p64x0_irq_syscore_ops); | ||
89 | |||
90 | return 0; | ||
91 | } | ||
92 | core_initcall(s5p64x0_syscore_init); | ||
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c index 88857f5a49f..4a1250cd135 100644 --- a/arch/arm/mach-s5p64x0/mach-smdk6440.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c | |||
@@ -23,6 +23,9 @@ | |||
23 | #include <linux/clk.h> | 23 | #include <linux/clk.h> |
24 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
25 | #include <linux/pwm_backlight.h> | 25 | #include <linux/pwm_backlight.h> |
26 | #include <linux/fb.h> | ||
27 | |||
28 | #include <video/platform_lcd.h> | ||
26 | 29 | ||
27 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
28 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
@@ -47,6 +50,8 @@ | |||
47 | #include <plat/ts.h> | 50 | #include <plat/ts.h> |
48 | #include <plat/s5p-time.h> | 51 | #include <plat/s5p-time.h> |
49 | #include <plat/backlight.h> | 52 | #include <plat/backlight.h> |
53 | #include <plat/fb.h> | ||
54 | #include <plat/regs-fb.h> | ||
50 | 55 | ||
51 | #define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 56 | #define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
52 | S3C2410_UCON_RXILEVEL | \ | 57 | S3C2410_UCON_RXILEVEL | \ |
@@ -92,6 +97,59 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = { | |||
92 | }, | 97 | }, |
93 | }; | 98 | }; |
94 | 99 | ||
100 | /* Frame Buffer */ | ||
101 | static struct s3c_fb_pd_win smdk6440_fb_win0 = { | ||
102 | .win_mode = { | ||
103 | .left_margin = 8, | ||
104 | .right_margin = 13, | ||
105 | .upper_margin = 7, | ||
106 | .lower_margin = 5, | ||
107 | .hsync_len = 3, | ||
108 | .vsync_len = 1, | ||
109 | .xres = 800, | ||
110 | .yres = 480, | ||
111 | }, | ||
112 | .max_bpp = 32, | ||
113 | .default_bpp = 24, | ||
114 | }; | ||
115 | |||
116 | static struct s3c_fb_platdata smdk6440_lcd_pdata __initdata = { | ||
117 | .win[0] = &smdk6440_fb_win0, | ||
118 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | ||
119 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | ||
120 | .setup_gpio = s5p64x0_fb_gpio_setup_24bpp, | ||
121 | }; | ||
122 | |||
123 | /* LCD power controller */ | ||
124 | static void smdk6440_lte480_reset_power(struct plat_lcd_data *pd, | ||
125 | unsigned int power) | ||
126 | { | ||
127 | int err; | ||
128 | |||
129 | if (power) { | ||
130 | err = gpio_request(S5P6440_GPN(5), "GPN"); | ||
131 | if (err) { | ||
132 | printk(KERN_ERR "failed to request GPN for lcd reset\n"); | ||
133 | return; | ||
134 | } | ||
135 | |||
136 | gpio_direction_output(S5P6440_GPN(5), 1); | ||
137 | gpio_set_value(S5P6440_GPN(5), 0); | ||
138 | gpio_set_value(S5P6440_GPN(5), 1); | ||
139 | gpio_free(S5P6440_GPN(5)); | ||
140 | } | ||
141 | } | ||
142 | |||
143 | static struct plat_lcd_data smdk6440_lcd_power_data = { | ||
144 | .set_power = smdk6440_lte480_reset_power, | ||
145 | }; | ||
146 | |||
147 | static struct platform_device smdk6440_lcd_lte480wv = { | ||
148 | .name = "platform-lcd", | ||
149 | .dev.parent = &s3c_device_fb.dev, | ||
150 | .dev.platform_data = &smdk6440_lcd_power_data, | ||
151 | }; | ||
152 | |||
95 | static struct platform_device *smdk6440_devices[] __initdata = { | 153 | static struct platform_device *smdk6440_devices[] __initdata = { |
96 | &s3c_device_adc, | 154 | &s3c_device_adc, |
97 | &s3c_device_rtc, | 155 | &s3c_device_rtc, |
@@ -101,6 +159,8 @@ static struct platform_device *smdk6440_devices[] __initdata = { | |||
101 | &s3c_device_wdt, | 159 | &s3c_device_wdt, |
102 | &samsung_asoc_dma, | 160 | &samsung_asoc_dma, |
103 | &s5p6440_device_iis, | 161 | &s5p6440_device_iis, |
162 | &s3c_device_fb, | ||
163 | &smdk6440_lcd_lte480wv, | ||
104 | }; | 164 | }; |
105 | 165 | ||
106 | static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = { | 166 | static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = { |
@@ -147,6 +207,17 @@ static void __init smdk6440_map_io(void) | |||
147 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); | 207 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); |
148 | } | 208 | } |
149 | 209 | ||
210 | static void s5p6440_set_lcd_interface(void) | ||
211 | { | ||
212 | unsigned int cfg; | ||
213 | |||
214 | /* select TFT LCD type (RGB I/F) */ | ||
215 | cfg = __raw_readl(S5P64X0_SPCON0); | ||
216 | cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK; | ||
217 | cfg |= S5P64X0_SPCON0_LCD_SEL_RGB; | ||
218 | __raw_writel(cfg, S5P64X0_SPCON0); | ||
219 | } | ||
220 | |||
150 | static void __init smdk6440_machine_init(void) | 221 | static void __init smdk6440_machine_init(void) |
151 | { | 222 | { |
152 | s3c24xx_ts_set_platdata(NULL); | 223 | s3c24xx_ts_set_platdata(NULL); |
@@ -160,6 +231,9 @@ static void __init smdk6440_machine_init(void) | |||
160 | 231 | ||
161 | samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data); | 232 | samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data); |
162 | 233 | ||
234 | s5p6440_set_lcd_interface(); | ||
235 | s3c_fb_set_platdata(&smdk6440_lcd_pdata); | ||
236 | |||
163 | platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices)); | 237 | platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices)); |
164 | } | 238 | } |
165 | 239 | ||
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c index e1b277b9461..0ab129ecf00 100644 --- a/arch/arm/mach-s5p64x0/mach-smdk6450.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c | |||
@@ -23,6 +23,9 @@ | |||
23 | #include <linux/clk.h> | 23 | #include <linux/clk.h> |
24 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
25 | #include <linux/pwm_backlight.h> | 25 | #include <linux/pwm_backlight.h> |
26 | #include <linux/fb.h> | ||
27 | |||
28 | #include <video/platform_lcd.h> | ||
26 | 29 | ||
27 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
28 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
@@ -47,6 +50,8 @@ | |||
47 | #include <plat/ts.h> | 50 | #include <plat/ts.h> |
48 | #include <plat/s5p-time.h> | 51 | #include <plat/s5p-time.h> |
49 | #include <plat/backlight.h> | 52 | #include <plat/backlight.h> |
53 | #include <plat/fb.h> | ||
54 | #include <plat/regs-fb.h> | ||
50 | 55 | ||
51 | #define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 56 | #define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
52 | S3C2410_UCON_RXILEVEL | \ | 57 | S3C2410_UCON_RXILEVEL | \ |
@@ -110,6 +115,59 @@ static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = { | |||
110 | #endif | 115 | #endif |
111 | }; | 116 | }; |
112 | 117 | ||
118 | /* Frame Buffer */ | ||
119 | static struct s3c_fb_pd_win smdk6450_fb_win0 = { | ||
120 | .win_mode = { | ||
121 | .left_margin = 8, | ||
122 | .right_margin = 13, | ||
123 | .upper_margin = 7, | ||
124 | .lower_margin = 5, | ||
125 | .hsync_len = 3, | ||
126 | .vsync_len = 1, | ||
127 | .xres = 800, | ||
128 | .yres = 480, | ||
129 | }, | ||
130 | .max_bpp = 32, | ||
131 | .default_bpp = 24, | ||
132 | }; | ||
133 | |||
134 | static struct s3c_fb_platdata smdk6450_lcd_pdata __initdata = { | ||
135 | .win[0] = &smdk6450_fb_win0, | ||
136 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | ||
137 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | ||
138 | .setup_gpio = s5p64x0_fb_gpio_setup_24bpp, | ||
139 | }; | ||
140 | |||
141 | /* LCD power controller */ | ||
142 | static void smdk6450_lte480_reset_power(struct plat_lcd_data *pd, | ||
143 | unsigned int power) | ||
144 | { | ||
145 | int err; | ||
146 | |||
147 | if (power) { | ||
148 | err = gpio_request(S5P6450_GPN(5), "GPN"); | ||
149 | if (err) { | ||
150 | printk(KERN_ERR "failed to request GPN for lcd reset\n"); | ||
151 | return; | ||
152 | } | ||
153 | |||
154 | gpio_direction_output(S5P6450_GPN(5), 1); | ||
155 | gpio_set_value(S5P6450_GPN(5), 0); | ||
156 | gpio_set_value(S5P6450_GPN(5), 1); | ||
157 | gpio_free(S5P6450_GPN(5)); | ||
158 | } | ||
159 | } | ||
160 | |||
161 | static struct plat_lcd_data smdk6450_lcd_power_data = { | ||
162 | .set_power = smdk6450_lte480_reset_power, | ||
163 | }; | ||
164 | |||
165 | static struct platform_device smdk6450_lcd_lte480wv = { | ||
166 | .name = "platform-lcd", | ||
167 | .dev.parent = &s3c_device_fb.dev, | ||
168 | .dev.platform_data = &smdk6450_lcd_power_data, | ||
169 | }; | ||
170 | |||
113 | static struct platform_device *smdk6450_devices[] __initdata = { | 171 | static struct platform_device *smdk6450_devices[] __initdata = { |
114 | &s3c_device_adc, | 172 | &s3c_device_adc, |
115 | &s3c_device_rtc, | 173 | &s3c_device_rtc, |
@@ -119,6 +177,9 @@ static struct platform_device *smdk6450_devices[] __initdata = { | |||
119 | &s3c_device_wdt, | 177 | &s3c_device_wdt, |
120 | &samsung_asoc_dma, | 178 | &samsung_asoc_dma, |
121 | &s5p6450_device_iis0, | 179 | &s5p6450_device_iis0, |
180 | &s3c_device_fb, | ||
181 | &smdk6450_lcd_lte480wv, | ||
182 | |||
122 | /* s5p6450_device_spi0 will be added */ | 183 | /* s5p6450_device_spi0 will be added */ |
123 | }; | 184 | }; |
124 | 185 | ||
@@ -166,6 +227,17 @@ static void __init smdk6450_map_io(void) | |||
166 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); | 227 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); |
167 | } | 228 | } |
168 | 229 | ||
230 | static void s5p6450_set_lcd_interface(void) | ||
231 | { | ||
232 | unsigned int cfg; | ||
233 | |||
234 | /* select TFT LCD type (RGB I/F) */ | ||
235 | cfg = __raw_readl(S5P64X0_SPCON0); | ||
236 | cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK; | ||
237 | cfg |= S5P64X0_SPCON0_LCD_SEL_RGB; | ||
238 | __raw_writel(cfg, S5P64X0_SPCON0); | ||
239 | } | ||
240 | |||
169 | static void __init smdk6450_machine_init(void) | 241 | static void __init smdk6450_machine_init(void) |
170 | { | 242 | { |
171 | s3c24xx_ts_set_platdata(NULL); | 243 | s3c24xx_ts_set_platdata(NULL); |
@@ -179,6 +251,9 @@ static void __init smdk6450_machine_init(void) | |||
179 | 251 | ||
180 | samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data); | 252 | samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data); |
181 | 253 | ||
254 | s5p6450_set_lcd_interface(); | ||
255 | s3c_fb_set_platdata(&smdk6450_lcd_pdata); | ||
256 | |||
182 | platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices)); | 257 | platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices)); |
183 | } | 258 | } |
184 | 259 | ||
diff --git a/arch/arm/mach-s5p64x0/pm.c b/arch/arm/mach-s5p64x0/pm.c new file mode 100644 index 00000000000..69927243d25 --- /dev/null +++ b/arch/arm/mach-s5p64x0/pm.c | |||
@@ -0,0 +1,204 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/pm.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 Power Management Support | ||
7 | * | ||
8 | * Based on arch/arm/mach-s3c64xx/pm.c by Ben Dooks | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/suspend.h> | ||
16 | #include <linux/syscore_ops.h> | ||
17 | #include <linux/io.h> | ||
18 | |||
19 | #include <plat/cpu.h> | ||
20 | #include <plat/pm.h> | ||
21 | #include <plat/regs-timer.h> | ||
22 | #include <plat/wakeup-mask.h> | ||
23 | |||
24 | #include <mach/regs-clock.h> | ||
25 | #include <mach/regs-gpio.h> | ||
26 | |||
27 | static struct sleep_save s5p64x0_core_save[] = { | ||
28 | SAVE_ITEM(S5P64X0_APLL_CON), | ||
29 | SAVE_ITEM(S5P64X0_MPLL_CON), | ||
30 | SAVE_ITEM(S5P64X0_EPLL_CON), | ||
31 | SAVE_ITEM(S5P64X0_EPLL_CON_K), | ||
32 | SAVE_ITEM(S5P64X0_CLK_SRC0), | ||
33 | SAVE_ITEM(S5P64X0_CLK_SRC1), | ||
34 | SAVE_ITEM(S5P64X0_CLK_DIV0), | ||
35 | SAVE_ITEM(S5P64X0_CLK_DIV1), | ||
36 | SAVE_ITEM(S5P64X0_CLK_DIV2), | ||
37 | SAVE_ITEM(S5P64X0_CLK_DIV3), | ||
38 | SAVE_ITEM(S5P64X0_CLK_GATE_MEM0), | ||
39 | SAVE_ITEM(S5P64X0_CLK_GATE_HCLK1), | ||
40 | SAVE_ITEM(S5P64X0_CLK_GATE_SCLK1), | ||
41 | }; | ||
42 | |||
43 | static struct sleep_save s5p64x0_misc_save[] = { | ||
44 | SAVE_ITEM(S5P64X0_AHB_CON0), | ||
45 | SAVE_ITEM(S5P64X0_SPCON0), | ||
46 | SAVE_ITEM(S5P64X0_SPCON1), | ||
47 | SAVE_ITEM(S5P64X0_MEM0CONSLP0), | ||
48 | SAVE_ITEM(S5P64X0_MEM0CONSLP1), | ||
49 | SAVE_ITEM(S5P64X0_MEM0DRVCON), | ||
50 | SAVE_ITEM(S5P64X0_MEM1DRVCON), | ||
51 | |||
52 | SAVE_ITEM(S3C64XX_TINT_CSTAT), | ||
53 | }; | ||
54 | |||
55 | /* DPLL is present only in S5P6450 */ | ||
56 | static struct sleep_save s5p6450_core_save[] = { | ||
57 | SAVE_ITEM(S5P6450_DPLL_CON), | ||
58 | SAVE_ITEM(S5P6450_DPLL_CON_K), | ||
59 | }; | ||
60 | |||
61 | void s3c_pm_configure_extint(void) | ||
62 | { | ||
63 | __raw_writel(s3c_irqwake_eintmask, S5P64X0_EINT_WAKEUP_MASK); | ||
64 | } | ||
65 | |||
66 | void s3c_pm_restore_core(void) | ||
67 | { | ||
68 | __raw_writel(0, S5P64X0_EINT_WAKEUP_MASK); | ||
69 | |||
70 | s3c_pm_do_restore_core(s5p64x0_core_save, | ||
71 | ARRAY_SIZE(s5p64x0_core_save)); | ||
72 | |||
73 | if (soc_is_s5p6450()) | ||
74 | s3c_pm_do_restore_core(s5p6450_core_save, | ||
75 | ARRAY_SIZE(s5p6450_core_save)); | ||
76 | |||
77 | s3c_pm_do_restore(s5p64x0_misc_save, ARRAY_SIZE(s5p64x0_misc_save)); | ||
78 | } | ||
79 | |||
80 | void s3c_pm_save_core(void) | ||
81 | { | ||
82 | s3c_pm_do_save(s5p64x0_misc_save, ARRAY_SIZE(s5p64x0_misc_save)); | ||
83 | |||
84 | if (soc_is_s5p6450()) | ||
85 | s3c_pm_do_save(s5p6450_core_save, | ||
86 | ARRAY_SIZE(s5p6450_core_save)); | ||
87 | |||
88 | s3c_pm_do_save(s5p64x0_core_save, ARRAY_SIZE(s5p64x0_core_save)); | ||
89 | } | ||
90 | |||
91 | static int s5p64x0_cpu_suspend(unsigned long arg) | ||
92 | { | ||
93 | unsigned long tmp = 0; | ||
94 | |||
95 | /* | ||
96 | * Issue the standby signal into the pm unit. Note, we | ||
97 | * issue a write-buffer drain just in case. | ||
98 | */ | ||
99 | asm("b 1f\n\t" | ||
100 | ".align 5\n\t" | ||
101 | "1:\n\t" | ||
102 | "mcr p15, 0, %0, c7, c10, 5\n\t" | ||
103 | "mcr p15, 0, %0, c7, c10, 4\n\t" | ||
104 | "mcr p15, 0, %0, c7, c0, 4" : : "r" (tmp)); | ||
105 | |||
106 | /* we should never get past here */ | ||
107 | panic("sleep resumed to originator?"); | ||
108 | } | ||
109 | |||
110 | /* mapping of interrupts to parts of the wakeup mask */ | ||
111 | static struct samsung_wakeup_mask s5p64x0_wake_irqs[] = { | ||
112 | { .irq = IRQ_RTC_ALARM, .bit = S5P64X0_PWR_CFG_RTC_ALRM_DISABLE, }, | ||
113 | { .irq = IRQ_RTC_TIC, .bit = S5P64X0_PWR_CFG_RTC_TICK_DISABLE, }, | ||
114 | { .irq = IRQ_HSMMC0, .bit = S5P64X0_PWR_CFG_MMC0_DISABLE, }, | ||
115 | { .irq = IRQ_HSMMC1, .bit = S5P64X0_PWR_CFG_MMC1_DISABLE, }, | ||
116 | }; | ||
117 | |||
118 | static void s5p64x0_pm_prepare(void) | ||
119 | { | ||
120 | u32 tmp; | ||
121 | |||
122 | samsung_sync_wakemask(S5P64X0_PWR_CFG, | ||
123 | s5p64x0_wake_irqs, ARRAY_SIZE(s5p64x0_wake_irqs)); | ||
124 | |||
125 | /* store the resume address in INFORM0 register */ | ||
126 | __raw_writel(virt_to_phys(s3c_cpu_resume), S5P64X0_INFORM0); | ||
127 | |||
128 | /* setup clock gating for FIMGVG block */ | ||
129 | __raw_writel((__raw_readl(S5P64X0_CLK_GATE_HCLK1) | \ | ||
130 | (S5P64X0_CLK_GATE_HCLK1_FIMGVG)), S5P64X0_CLK_GATE_HCLK1); | ||
131 | __raw_writel((__raw_readl(S5P64X0_CLK_GATE_SCLK1) | \ | ||
132 | (S5P64X0_CLK_GATE_SCLK1_FIMGVG)), S5P64X0_CLK_GATE_SCLK1); | ||
133 | |||
134 | /* Configure the stabilization counter with wait time required */ | ||
135 | __raw_writel(S5P64X0_PWR_STABLE_PWR_CNT_VAL4, S5P64X0_PWR_STABLE); | ||
136 | |||
137 | /* set WFI to SLEEP mode configuration */ | ||
138 | tmp = __raw_readl(S5P64X0_SLEEP_CFG); | ||
139 | tmp &= ~(S5P64X0_SLEEP_CFG_OSC_EN); | ||
140 | __raw_writel(tmp, S5P64X0_SLEEP_CFG); | ||
141 | |||
142 | tmp = __raw_readl(S5P64X0_PWR_CFG); | ||
143 | tmp &= ~(S5P64X0_PWR_CFG_WFI_MASK); | ||
144 | tmp |= S5P64X0_PWR_CFG_WFI_SLEEP; | ||
145 | __raw_writel(tmp, S5P64X0_PWR_CFG); | ||
146 | |||
147 | /* | ||
148 | * set OTHERS register to disable interrupt before going to | ||
149 | * sleep. This bit is present only in S5P6450, it is reserved | ||
150 | * in S5P6440. | ||
151 | */ | ||
152 | if (soc_is_s5p6450()) { | ||
153 | tmp = __raw_readl(S5P64X0_OTHERS); | ||
154 | tmp |= S5P6450_OTHERS_DISABLE_INT; | ||
155 | __raw_writel(tmp, S5P64X0_OTHERS); | ||
156 | } | ||
157 | |||
158 | /* ensure previous wakeup state is cleared before sleeping */ | ||
159 | __raw_writel(__raw_readl(S5P64X0_WAKEUP_STAT), S5P64X0_WAKEUP_STAT); | ||
160 | |||
161 | } | ||
162 | |||
163 | static int s5p64x0_pm_add(struct sys_device *sysdev) | ||
164 | { | ||
165 | pm_cpu_prep = s5p64x0_pm_prepare; | ||
166 | pm_cpu_sleep = s5p64x0_cpu_suspend; | ||
167 | pm_uart_udivslot = 1; | ||
168 | |||
169 | return 0; | ||
170 | } | ||
171 | |||
172 | static struct sysdev_driver s5p64x0_pm_driver = { | ||
173 | .add = s5p64x0_pm_add, | ||
174 | }; | ||
175 | |||
176 | static __init int s5p64x0_pm_drvinit(void) | ||
177 | { | ||
178 | s3c_pm_init(); | ||
179 | |||
180 | return sysdev_driver_register(&s5p64x0_sysclass, &s5p64x0_pm_driver); | ||
181 | } | ||
182 | arch_initcall(s5p64x0_pm_drvinit); | ||
183 | |||
184 | static void s5p64x0_pm_resume(void) | ||
185 | { | ||
186 | u32 tmp; | ||
187 | |||
188 | tmp = __raw_readl(S5P64X0_OTHERS); | ||
189 | tmp |= (S5P64X0_OTHERS_RET_MMC0 | S5P64X0_OTHERS_RET_MMC1 | \ | ||
190 | S5P64X0_OTHERS_RET_UART); | ||
191 | __raw_writel(tmp , S5P64X0_OTHERS); | ||
192 | } | ||
193 | |||
194 | static struct syscore_ops s5p64x0_pm_syscore_ops = { | ||
195 | .resume = s5p64x0_pm_resume, | ||
196 | }; | ||
197 | |||
198 | static __init int s5p64x0_pm_syscore_init(void) | ||
199 | { | ||
200 | register_syscore_ops(&s5p64x0_pm_syscore_ops); | ||
201 | |||
202 | return 0; | ||
203 | } | ||
204 | arch_initcall(s5p64x0_pm_syscore_init); | ||
diff --git a/arch/arm/mach-s5p64x0/setup-fb-24bpp.c b/arch/arm/mach-s5p64x0/setup-fb-24bpp.c new file mode 100644 index 00000000000..f346ee4af54 --- /dev/null +++ b/arch/arm/mach-s5p64x0/setup-fb-24bpp.c | |||
@@ -0,0 +1,29 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/setup-fb-24bpp.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Base S5P64X0 GPIO setup information for LCD framebuffer | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/fb.h> | ||
14 | #include <linux/gpio.h> | ||
15 | |||
16 | #include <plat/cpu.h> | ||
17 | #include <plat/fb.h> | ||
18 | #include <plat/gpio-cfg.h> | ||
19 | |||
20 | void s5p64x0_fb_gpio_setup_24bpp(void) | ||
21 | { | ||
22 | if (soc_is_s5p6440()) { | ||
23 | s3c_gpio_cfgrange_nopull(S5P6440_GPI(0), 16, S3C_GPIO_SFN(2)); | ||
24 | s3c_gpio_cfgrange_nopull(S5P6440_GPJ(0), 12, S3C_GPIO_SFN(2)); | ||
25 | } else if (soc_is_s5p6450()) { | ||
26 | s3c_gpio_cfgrange_nopull(S5P6450_GPI(0), 16, S3C_GPIO_SFN(2)); | ||
27 | s3c_gpio_cfgrange_nopull(S5P6450_GPJ(0), 12, S3C_GPIO_SFN(2)); | ||
28 | } | ||
29 | } | ||
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig index e8a33c4b054..e538a4c67e9 100644 --- a/arch/arm/mach-s5pc100/Kconfig +++ b/arch/arm/mach-s5pc100/Kconfig | |||
@@ -10,7 +10,7 @@ if ARCH_S5PC100 | |||
10 | config CPU_S5PC100 | 10 | config CPU_S5PC100 |
11 | bool | 11 | bool |
12 | select S5P_EXT_INT | 12 | select S5P_EXT_INT |
13 | select S3C_PL330_DMA | 13 | select SAMSUNG_DMADEV |
14 | help | 14 | help |
15 | Enable S5PC100 CPU support | 15 | Enable S5PC100 CPU support |
16 | 16 | ||
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c index ff5cbb30de5..8d47709da71 100644 --- a/arch/arm/mach-s5pc100/clock.c +++ b/arch/arm/mach-s5pc100/clock.c | |||
@@ -33,6 +33,11 @@ static struct clk s5p_clk_otgphy = { | |||
33 | .name = "otg_phy", | 33 | .name = "otg_phy", |
34 | }; | 34 | }; |
35 | 35 | ||
36 | static struct clk dummy_apb_pclk = { | ||
37 | .name = "apb_pclk", | ||
38 | .id = -1, | ||
39 | }; | ||
40 | |||
36 | static struct clk *clk_src_mout_href_list[] = { | 41 | static struct clk *clk_src_mout_href_list[] = { |
37 | [0] = &s5p_clk_27m, | 42 | [0] = &s5p_clk_27m, |
38 | [1] = &clk_fin_hpll, | 43 | [1] = &clk_fin_hpll, |
@@ -454,14 +459,14 @@ static struct clk init_clocks_off[] = { | |||
454 | .enable = s5pc100_d1_0_ctrl, | 459 | .enable = s5pc100_d1_0_ctrl, |
455 | .ctrlbit = (1 << 2), | 460 | .ctrlbit = (1 << 2), |
456 | }, { | 461 | }, { |
457 | .name = "pdma", | 462 | .name = "dma", |
458 | .devname = "s3c-pl330.1", | 463 | .devname = "dma-pl330.1", |
459 | .parent = &clk_div_d1_bus.clk, | 464 | .parent = &clk_div_d1_bus.clk, |
460 | .enable = s5pc100_d1_0_ctrl, | 465 | .enable = s5pc100_d1_0_ctrl, |
461 | .ctrlbit = (1 << 1), | 466 | .ctrlbit = (1 << 1), |
462 | }, { | 467 | }, { |
463 | .name = "pdma", | 468 | .name = "dma", |
464 | .devname = "s3c-pl330.0", | 469 | .devname = "dma-pl330.0", |
465 | .parent = &clk_div_d1_bus.clk, | 470 | .parent = &clk_div_d1_bus.clk, |
466 | .enable = s5pc100_d1_0_ctrl, | 471 | .enable = s5pc100_d1_0_ctrl, |
467 | .ctrlbit = (1 << 0), | 472 | .ctrlbit = (1 << 0), |
@@ -1276,5 +1281,7 @@ void __init s5pc100_register_clocks(void) | |||
1276 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1281 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1277 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1282 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1278 | 1283 | ||
1284 | s3c24xx_register_clock(&dummy_apb_pclk); | ||
1285 | |||
1279 | s3c_pwmclk_init(); | 1286 | s3c_pwmclk_init(); |
1280 | } | 1287 | } |
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c index bf4cd0fb97c..065a087f5a8 100644 --- a/arch/arm/mach-s5pc100/dma.c +++ b/arch/arm/mach-s5pc100/dma.c | |||
@@ -1,4 +1,8 @@ | |||
1 | /* | 1 | /* linux/arch/arm/mach-s5pc100/dma.c |
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
2 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | 6 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. |
3 | * Jaswinder Singh <jassi.brar@samsung.com> | 7 | * Jaswinder Singh <jassi.brar@samsung.com> |
4 | * | 8 | * |
@@ -17,150 +21,246 @@ | |||
17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
18 | */ | 22 | */ |
19 | 23 | ||
20 | #include <linux/platform_device.h> | ||
21 | #include <linux/dma-mapping.h> | 24 | #include <linux/dma-mapping.h> |
25 | #include <linux/amba/bus.h> | ||
26 | #include <linux/amba/pl330.h> | ||
22 | 27 | ||
28 | #include <asm/irq.h> | ||
23 | #include <plat/devs.h> | 29 | #include <plat/devs.h> |
30 | #include <plat/irqs.h> | ||
24 | 31 | ||
25 | #include <mach/map.h> | 32 | #include <mach/map.h> |
26 | #include <mach/irqs.h> | 33 | #include <mach/irqs.h> |
27 | 34 | #include <mach/dma.h> | |
28 | #include <plat/s3c-pl330-pdata.h> | ||
29 | 35 | ||
30 | static u64 dma_dmamask = DMA_BIT_MASK(32); | 36 | static u64 dma_dmamask = DMA_BIT_MASK(32); |
31 | 37 | ||
32 | static struct resource s5pc100_pdma0_resource[] = { | 38 | struct dma_pl330_peri pdma0_peri[30] = { |
33 | [0] = { | 39 | { |
34 | .start = S5PC100_PA_PDMA0, | 40 | .peri_id = (u8)DMACH_UART0_RX, |
35 | .end = S5PC100_PA_PDMA0 + SZ_4K, | 41 | .rqtype = DEVTOMEM, |
36 | .flags = IORESOURCE_MEM, | 42 | }, { |
37 | }, | 43 | .peri_id = (u8)DMACH_UART0_TX, |
38 | [1] = { | 44 | .rqtype = MEMTODEV, |
39 | .start = IRQ_PDMA0, | 45 | }, { |
40 | .end = IRQ_PDMA0, | 46 | .peri_id = (u8)DMACH_UART1_RX, |
41 | .flags = IORESOURCE_IRQ, | 47 | .rqtype = DEVTOMEM, |
48 | }, { | ||
49 | .peri_id = (u8)DMACH_UART1_TX, | ||
50 | .rqtype = MEMTODEV, | ||
51 | }, { | ||
52 | .peri_id = (u8)DMACH_UART2_RX, | ||
53 | .rqtype = DEVTOMEM, | ||
54 | }, { | ||
55 | .peri_id = (u8)DMACH_UART2_TX, | ||
56 | .rqtype = MEMTODEV, | ||
57 | }, { | ||
58 | .peri_id = (u8)DMACH_UART3_RX, | ||
59 | .rqtype = DEVTOMEM, | ||
60 | }, { | ||
61 | .peri_id = (u8)DMACH_UART3_TX, | ||
62 | .rqtype = MEMTODEV, | ||
63 | }, { | ||
64 | .peri_id = DMACH_IRDA, | ||
65 | }, { | ||
66 | .peri_id = (u8)DMACH_I2S0_RX, | ||
67 | .rqtype = DEVTOMEM, | ||
68 | }, { | ||
69 | .peri_id = (u8)DMACH_I2S0_TX, | ||
70 | .rqtype = MEMTODEV, | ||
71 | }, { | ||
72 | .peri_id = (u8)DMACH_I2S0S_TX, | ||
73 | .rqtype = MEMTODEV, | ||
74 | }, { | ||
75 | .peri_id = (u8)DMACH_I2S1_RX, | ||
76 | .rqtype = DEVTOMEM, | ||
77 | }, { | ||
78 | .peri_id = (u8)DMACH_I2S1_TX, | ||
79 | .rqtype = MEMTODEV, | ||
80 | }, { | ||
81 | .peri_id = (u8)DMACH_I2S2_RX, | ||
82 | .rqtype = DEVTOMEM, | ||
83 | }, { | ||
84 | .peri_id = (u8)DMACH_I2S2_TX, | ||
85 | .rqtype = MEMTODEV, | ||
86 | }, { | ||
87 | .peri_id = (u8)DMACH_SPI0_RX, | ||
88 | .rqtype = DEVTOMEM, | ||
89 | }, { | ||
90 | .peri_id = (u8)DMACH_SPI0_TX, | ||
91 | .rqtype = MEMTODEV, | ||
92 | }, { | ||
93 | .peri_id = (u8)DMACH_SPI1_RX, | ||
94 | .rqtype = DEVTOMEM, | ||
95 | }, { | ||
96 | .peri_id = (u8)DMACH_SPI1_TX, | ||
97 | .rqtype = MEMTODEV, | ||
98 | }, { | ||
99 | .peri_id = (u8)DMACH_SPI2_RX, | ||
100 | .rqtype = DEVTOMEM, | ||
101 | }, { | ||
102 | .peri_id = (u8)DMACH_SPI2_TX, | ||
103 | .rqtype = MEMTODEV, | ||
104 | }, { | ||
105 | .peri_id = (u8)DMACH_AC97_MICIN, | ||
106 | .rqtype = DEVTOMEM, | ||
107 | }, { | ||
108 | .peri_id = (u8)DMACH_AC97_PCMIN, | ||
109 | .rqtype = DEVTOMEM, | ||
110 | }, { | ||
111 | .peri_id = (u8)DMACH_AC97_PCMOUT, | ||
112 | .rqtype = MEMTODEV, | ||
113 | }, { | ||
114 | .peri_id = (u8)DMACH_EXTERNAL, | ||
115 | }, { | ||
116 | .peri_id = (u8)DMACH_PWM, | ||
117 | }, { | ||
118 | .peri_id = (u8)DMACH_SPDIF, | ||
119 | .rqtype = MEMTODEV, | ||
120 | }, { | ||
121 | .peri_id = (u8)DMACH_HSI_RX, | ||
122 | .rqtype = DEVTOMEM, | ||
123 | }, { | ||
124 | .peri_id = (u8)DMACH_HSI_TX, | ||
125 | .rqtype = MEMTODEV, | ||
42 | }, | 126 | }, |
43 | }; | 127 | }; |
44 | 128 | ||
45 | static struct s3c_pl330_platdata s5pc100_pdma0_pdata = { | 129 | struct dma_pl330_platdata s5pc100_pdma0_pdata = { |
46 | .peri = { | 130 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), |
47 | [0] = DMACH_UART0_RX, | 131 | .peri = pdma0_peri, |
48 | [1] = DMACH_UART0_TX, | ||
49 | [2] = DMACH_UART1_RX, | ||
50 | [3] = DMACH_UART1_TX, | ||
51 | [4] = DMACH_UART2_RX, | ||
52 | [5] = DMACH_UART2_TX, | ||
53 | [6] = DMACH_UART3_RX, | ||
54 | [7] = DMACH_UART3_TX, | ||
55 | [8] = DMACH_IRDA, | ||
56 | [9] = DMACH_I2S0_RX, | ||
57 | [10] = DMACH_I2S0_TX, | ||
58 | [11] = DMACH_I2S0S_TX, | ||
59 | [12] = DMACH_I2S1_RX, | ||
60 | [13] = DMACH_I2S1_TX, | ||
61 | [14] = DMACH_I2S2_RX, | ||
62 | [15] = DMACH_I2S2_TX, | ||
63 | [16] = DMACH_SPI0_RX, | ||
64 | [17] = DMACH_SPI0_TX, | ||
65 | [18] = DMACH_SPI1_RX, | ||
66 | [19] = DMACH_SPI1_TX, | ||
67 | [20] = DMACH_SPI2_RX, | ||
68 | [21] = DMACH_SPI2_TX, | ||
69 | [22] = DMACH_AC97_MICIN, | ||
70 | [23] = DMACH_AC97_PCMIN, | ||
71 | [24] = DMACH_AC97_PCMOUT, | ||
72 | [25] = DMACH_EXTERNAL, | ||
73 | [26] = DMACH_PWM, | ||
74 | [27] = DMACH_SPDIF, | ||
75 | [28] = DMACH_HSI_RX, | ||
76 | [29] = DMACH_HSI_TX, | ||
77 | [30] = DMACH_MAX, | ||
78 | [31] = DMACH_MAX, | ||
79 | }, | ||
80 | }; | 132 | }; |
81 | 133 | ||
82 | static struct platform_device s5pc100_device_pdma0 = { | 134 | struct amba_device s5pc100_device_pdma0 = { |
83 | .name = "s3c-pl330", | 135 | .dev = { |
84 | .id = 0, | 136 | .init_name = "dma-pl330.0", |
85 | .num_resources = ARRAY_SIZE(s5pc100_pdma0_resource), | ||
86 | .resource = s5pc100_pdma0_resource, | ||
87 | .dev = { | ||
88 | .dma_mask = &dma_dmamask, | 137 | .dma_mask = &dma_dmamask, |
89 | .coherent_dma_mask = DMA_BIT_MASK(32), | 138 | .coherent_dma_mask = DMA_BIT_MASK(32), |
90 | .platform_data = &s5pc100_pdma0_pdata, | 139 | .platform_data = &s5pc100_pdma0_pdata, |
91 | }, | 140 | }, |
92 | }; | 141 | .res = { |
93 | 142 | .start = S5PC100_PA_PDMA0, | |
94 | static struct resource s5pc100_pdma1_resource[] = { | 143 | .end = S5PC100_PA_PDMA0 + SZ_4K, |
95 | [0] = { | ||
96 | .start = S5PC100_PA_PDMA1, | ||
97 | .end = S5PC100_PA_PDMA1 + SZ_4K, | ||
98 | .flags = IORESOURCE_MEM, | 144 | .flags = IORESOURCE_MEM, |
99 | }, | 145 | }, |
100 | [1] = { | 146 | .irq = {IRQ_PDMA0, NO_IRQ}, |
101 | .start = IRQ_PDMA1, | 147 | .periphid = 0x00041330, |
102 | .end = IRQ_PDMA1, | ||
103 | .flags = IORESOURCE_IRQ, | ||
104 | }, | ||
105 | }; | 148 | }; |
106 | 149 | ||
107 | static struct s3c_pl330_platdata s5pc100_pdma1_pdata = { | 150 | struct dma_pl330_peri pdma1_peri[30] = { |
108 | .peri = { | 151 | { |
109 | [0] = DMACH_UART0_RX, | 152 | .peri_id = (u8)DMACH_UART0_RX, |
110 | [1] = DMACH_UART0_TX, | 153 | .rqtype = DEVTOMEM, |
111 | [2] = DMACH_UART1_RX, | 154 | }, { |
112 | [3] = DMACH_UART1_TX, | 155 | .peri_id = (u8)DMACH_UART0_TX, |
113 | [4] = DMACH_UART2_RX, | 156 | .rqtype = MEMTODEV, |
114 | [5] = DMACH_UART2_TX, | 157 | }, { |
115 | [6] = DMACH_UART3_RX, | 158 | .peri_id = (u8)DMACH_UART1_RX, |
116 | [7] = DMACH_UART3_TX, | 159 | .rqtype = DEVTOMEM, |
117 | [8] = DMACH_IRDA, | 160 | }, { |
118 | [9] = DMACH_I2S0_RX, | 161 | .peri_id = (u8)DMACH_UART1_TX, |
119 | [10] = DMACH_I2S0_TX, | 162 | .rqtype = MEMTODEV, |
120 | [11] = DMACH_I2S0S_TX, | 163 | }, { |
121 | [12] = DMACH_I2S1_RX, | 164 | .peri_id = (u8)DMACH_UART2_RX, |
122 | [13] = DMACH_I2S1_TX, | 165 | .rqtype = DEVTOMEM, |
123 | [14] = DMACH_I2S2_RX, | 166 | }, { |
124 | [15] = DMACH_I2S2_TX, | 167 | .peri_id = (u8)DMACH_UART2_TX, |
125 | [16] = DMACH_SPI0_RX, | 168 | .rqtype = MEMTODEV, |
126 | [17] = DMACH_SPI0_TX, | 169 | }, { |
127 | [18] = DMACH_SPI1_RX, | 170 | .peri_id = (u8)DMACH_UART3_RX, |
128 | [19] = DMACH_SPI1_TX, | 171 | .rqtype = DEVTOMEM, |
129 | [20] = DMACH_SPI2_RX, | 172 | }, { |
130 | [21] = DMACH_SPI2_TX, | 173 | .peri_id = (u8)DMACH_UART3_TX, |
131 | [22] = DMACH_PCM0_RX, | 174 | .rqtype = MEMTODEV, |
132 | [23] = DMACH_PCM0_TX, | 175 | }, { |
133 | [24] = DMACH_PCM1_RX, | 176 | .peri_id = DMACH_IRDA, |
134 | [25] = DMACH_PCM1_TX, | 177 | }, { |
135 | [26] = DMACH_MSM_REQ0, | 178 | .peri_id = (u8)DMACH_I2S0_RX, |
136 | [27] = DMACH_MSM_REQ1, | 179 | .rqtype = DEVTOMEM, |
137 | [28] = DMACH_MSM_REQ2, | 180 | }, { |
138 | [29] = DMACH_MSM_REQ3, | 181 | .peri_id = (u8)DMACH_I2S0_TX, |
139 | [30] = DMACH_MAX, | 182 | .rqtype = MEMTODEV, |
140 | [31] = DMACH_MAX, | 183 | }, { |
184 | .peri_id = (u8)DMACH_I2S0S_TX, | ||
185 | .rqtype = MEMTODEV, | ||
186 | }, { | ||
187 | .peri_id = (u8)DMACH_I2S1_RX, | ||
188 | .rqtype = DEVTOMEM, | ||
189 | }, { | ||
190 | .peri_id = (u8)DMACH_I2S1_TX, | ||
191 | .rqtype = MEMTODEV, | ||
192 | }, { | ||
193 | .peri_id = (u8)DMACH_I2S2_RX, | ||
194 | .rqtype = DEVTOMEM, | ||
195 | }, { | ||
196 | .peri_id = (u8)DMACH_I2S2_TX, | ||
197 | .rqtype = MEMTODEV, | ||
198 | }, { | ||
199 | .peri_id = (u8)DMACH_SPI0_RX, | ||
200 | .rqtype = DEVTOMEM, | ||
201 | }, { | ||
202 | .peri_id = (u8)DMACH_SPI0_TX, | ||
203 | .rqtype = MEMTODEV, | ||
204 | }, { | ||
205 | .peri_id = (u8)DMACH_SPI1_RX, | ||
206 | .rqtype = DEVTOMEM, | ||
207 | }, { | ||
208 | .peri_id = (u8)DMACH_SPI1_TX, | ||
209 | .rqtype = MEMTODEV, | ||
210 | }, { | ||
211 | .peri_id = (u8)DMACH_SPI2_RX, | ||
212 | .rqtype = DEVTOMEM, | ||
213 | }, { | ||
214 | .peri_id = (u8)DMACH_SPI2_TX, | ||
215 | .rqtype = MEMTODEV, | ||
216 | }, { | ||
217 | .peri_id = (u8)DMACH_PCM0_RX, | ||
218 | .rqtype = DEVTOMEM, | ||
219 | }, { | ||
220 | .peri_id = (u8)DMACH_PCM1_TX, | ||
221 | .rqtype = MEMTODEV, | ||
222 | }, { | ||
223 | .peri_id = (u8)DMACH_PCM1_RX, | ||
224 | .rqtype = DEVTOMEM, | ||
225 | }, { | ||
226 | .peri_id = (u8)DMACH_PCM1_TX, | ||
227 | .rqtype = MEMTODEV, | ||
228 | }, { | ||
229 | .peri_id = (u8)DMACH_MSM_REQ0, | ||
230 | }, { | ||
231 | .peri_id = (u8)DMACH_MSM_REQ1, | ||
232 | }, { | ||
233 | .peri_id = (u8)DMACH_MSM_REQ2, | ||
234 | }, { | ||
235 | .peri_id = (u8)DMACH_MSM_REQ3, | ||
141 | }, | 236 | }, |
142 | }; | 237 | }; |
143 | 238 | ||
144 | static struct platform_device s5pc100_device_pdma1 = { | 239 | struct dma_pl330_platdata s5pc100_pdma1_pdata = { |
145 | .name = "s3c-pl330", | 240 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), |
146 | .id = 1, | 241 | .peri = pdma1_peri, |
147 | .num_resources = ARRAY_SIZE(s5pc100_pdma1_resource), | 242 | }; |
148 | .resource = s5pc100_pdma1_resource, | 243 | |
149 | .dev = { | 244 | struct amba_device s5pc100_device_pdma1 = { |
245 | .dev = { | ||
246 | .init_name = "dma-pl330.1", | ||
150 | .dma_mask = &dma_dmamask, | 247 | .dma_mask = &dma_dmamask, |
151 | .coherent_dma_mask = DMA_BIT_MASK(32), | 248 | .coherent_dma_mask = DMA_BIT_MASK(32), |
152 | .platform_data = &s5pc100_pdma1_pdata, | 249 | .platform_data = &s5pc100_pdma1_pdata, |
153 | }, | 250 | }, |
154 | }; | 251 | .res = { |
155 | 252 | .start = S5PC100_PA_PDMA1, | |
156 | static struct platform_device *s5pc100_dmacs[] __initdata = { | 253 | .end = S5PC100_PA_PDMA1 + SZ_4K, |
157 | &s5pc100_device_pdma0, | 254 | .flags = IORESOURCE_MEM, |
158 | &s5pc100_device_pdma1, | 255 | }, |
256 | .irq = {IRQ_PDMA1, NO_IRQ}, | ||
257 | .periphid = 0x00041330, | ||
159 | }; | 258 | }; |
160 | 259 | ||
161 | static int __init s5pc100_dma_init(void) | 260 | static int __init s5pc100_dma_init(void) |
162 | { | 261 | { |
163 | platform_add_devices(s5pc100_dmacs, ARRAY_SIZE(s5pc100_dmacs)); | 262 | amba_device_register(&s5pc100_device_pdma0, &iomem_resource); |
263 | amba_device_register(&s5pc100_device_pdma1, &iomem_resource); | ||
164 | 264 | ||
165 | return 0; | 265 | return 0; |
166 | } | 266 | } |
diff --git a/arch/arm/mach-s5pc100/include/mach/clkdev.h b/arch/arm/mach-s5pc100/include/mach/clkdev.h deleted file mode 100644 index 7dffa83d23f..00000000000 --- a/arch/arm/mach-s5pc100/include/mach/clkdev.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __MACH_CLKDEV_H__ | ||
2 | #define __MACH_CLKDEV_H__ | ||
3 | |||
4 | #define __clk_get(clk) ({ 1; }) | ||
5 | #define __clk_put(clk) do {} while (0) | ||
6 | |||
7 | #endif | ||
diff --git a/arch/arm/mach-s5pc100/include/mach/dma.h b/arch/arm/mach-s5pc100/include/mach/dma.h index 81209eb1409..201842a3769 100644 --- a/arch/arm/mach-s5pc100/include/mach/dma.h +++ b/arch/arm/mach-s5pc100/include/mach/dma.h | |||
@@ -20,7 +20,7 @@ | |||
20 | #ifndef __MACH_DMA_H | 20 | #ifndef __MACH_DMA_H |
21 | #define __MACH_DMA_H | 21 | #define __MACH_DMA_H |
22 | 22 | ||
23 | /* This platform uses the common S3C DMA API driver for PL330 */ | 23 | /* This platform uses the common DMA API driver for PL330 */ |
24 | #include <plat/s3c-dma-pl330.h> | 24 | #include <plat/dma-pl330.h> |
25 | 25 | ||
26 | #endif /* __MACH_DMA_H */ | 26 | #endif /* __MACH_DMA_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/pwm-clock.h b/arch/arm/mach-s5pc100/include/mach/pwm-clock.h deleted file mode 100644 index b34d2f7aae5..00000000000 --- a/arch/arm/mach-s5pc100/include/mach/pwm-clock.h +++ /dev/null | |||
@@ -1,56 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pc100/include/mach/pwm-clock.h | ||
2 | * | ||
3 | * Copyright 2009 Samsung Electronics Co. | ||
4 | * Byungho Min <bhmin@samsung.com> | ||
5 | * | ||
6 | * S5PC100 - pwm clock and timer support | ||
7 | * | ||
8 | * Based on mach-s3c6400/include/mach/pwm-clock.h | ||
9 | */ | ||
10 | |||
11 | /** | ||
12 | * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk | ||
13 | * @tcfg: The timer TCFG1 register bits shifted down to 0. | ||
14 | * | ||
15 | * Return true if the given configuration from TCFG1 is a TCLK instead | ||
16 | * any of the TDIV clocks. | ||
17 | */ | ||
18 | static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) | ||
19 | { | ||
20 | return tcfg >= S3C64XX_TCFG1_MUX_TCLK; | ||
21 | } | ||
22 | |||
23 | /** | ||
24 | * tcfg_to_divisor() - convert tcfg1 setting to a divisor | ||
25 | * @tcfg1: The tcfg1 setting, shifted down. | ||
26 | * | ||
27 | * Get the divisor value for the given tcfg1 setting. We assume the | ||
28 | * caller has already checked to see if this is not a TCLK source. | ||
29 | */ | ||
30 | static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) | ||
31 | { | ||
32 | return 1 << tcfg1; | ||
33 | } | ||
34 | |||
35 | /** | ||
36 | * pwm_tdiv_has_div1() - does the tdiv setting have a /1 | ||
37 | * | ||
38 | * Return true if we have a /1 in the tdiv setting. | ||
39 | */ | ||
40 | static inline unsigned int pwm_tdiv_has_div1(void) | ||
41 | { | ||
42 | return 1; | ||
43 | } | ||
44 | |||
45 | /** | ||
46 | * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. | ||
47 | * @div: The divisor to calculate the bit information for. | ||
48 | * | ||
49 | * Turn a divisor into the necessary bit field for TCFG1. | ||
50 | */ | ||
51 | static inline unsigned long pwm_tdiv_div_bits(unsigned int div) | ||
52 | { | ||
53 | return ilog2(div); | ||
54 | } | ||
55 | |||
56 | #define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK | ||
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c index be25879bb2e..6418c6e8a7b 100644 --- a/arch/arm/mach-s5pc100/setup-sdhci.c +++ b/arch/arm/mach-s5pc100/setup-sdhci.c | |||
@@ -11,17 +11,7 @@ | |||
11 | * published by the Free Software Foundation. | 11 | * published by the Free Software Foundation. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/types.h> | 14 | #include <linux/types.h> |
16 | #include <linux/interrupt.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | #include <linux/io.h> | ||
19 | |||
20 | #include <linux/mmc/card.h> | ||
21 | #include <linux/mmc/host.h> | ||
22 | |||
23 | #include <plat/regs-sdhci.h> | ||
24 | #include <plat/sdhci.h> | ||
25 | 15 | ||
26 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | 16 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ |
27 | 17 | ||
@@ -31,35 +21,3 @@ char *s5pc100_hsmmc_clksrcs[4] = { | |||
31 | [2] = "sclk_mmc", /* mmc_bus */ | 21 | [2] = "sclk_mmc", /* mmc_bus */ |
32 | /* [3] = "48m", - note not successfully used yet */ | 22 | /* [3] = "48m", - note not successfully used yet */ |
33 | }; | 23 | }; |
34 | |||
35 | |||
36 | void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev, | ||
37 | void __iomem *r, | ||
38 | struct mmc_ios *ios, | ||
39 | struct mmc_card *card) | ||
40 | { | ||
41 | u32 ctrl2, ctrl3; | ||
42 | |||
43 | /* don't need to alter anything according to card-type */ | ||
44 | |||
45 | writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); | ||
46 | |||
47 | ctrl2 = readl(r + S3C_SDHCI_CONTROL2); | ||
48 | ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; | ||
49 | ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | | ||
50 | S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | | ||
51 | S3C_SDHCI_CTRL2_ENFBCLKRX | | ||
52 | S3C_SDHCI_CTRL2_DFCNT_NONE | | ||
53 | S3C_SDHCI_CTRL2_ENCLKOUTHOLD); | ||
54 | |||
55 | if (ios->clock < 25 * 1000000) | ||
56 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | | ||
57 | S3C_SDHCI_CTRL3_FCSEL2 | | ||
58 | S3C_SDHCI_CTRL3_FCSEL1 | | ||
59 | S3C_SDHCI_CTRL3_FCSEL0); | ||
60 | else | ||
61 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); | ||
62 | |||
63 | writel(ctrl2, r + S3C_SDHCI_CONTROL2); | ||
64 | writel(ctrl3, r + S3C_SDHCI_CONTROL3); | ||
65 | } | ||
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index aaeb44a7371..646057ab2e4 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig | |||
@@ -11,9 +11,11 @@ if ARCH_S5PV210 | |||
11 | 11 | ||
12 | config CPU_S5PV210 | 12 | config CPU_S5PV210 |
13 | bool | 13 | bool |
14 | select S3C_PL330_DMA | 14 | select SAMSUNG_DMADEV |
15 | select S5P_EXT_INT | 15 | select S5P_EXT_INT |
16 | select S5P_HRT | 16 | select S5P_HRT |
17 | select S5P_PM if PM | ||
18 | select S5P_SLEEP if PM | ||
17 | help | 19 | help |
18 | Enable S5PV210 CPU support | 20 | Enable S5PV210 CPU support |
19 | 21 | ||
@@ -93,11 +95,13 @@ config MACH_GONI | |||
93 | select S3C_DEV_USB_HSOTG | 95 | select S3C_DEV_USB_HSOTG |
94 | select S5P_DEV_ONENAND | 96 | select S5P_DEV_ONENAND |
95 | select SAMSUNG_DEV_KEYPAD | 97 | select SAMSUNG_DEV_KEYPAD |
98 | select S5P_DEV_TV | ||
96 | select S5PV210_SETUP_FB_24BPP | 99 | select S5PV210_SETUP_FB_24BPP |
97 | select S5PV210_SETUP_I2C1 | 100 | select S5PV210_SETUP_I2C1 |
98 | select S5PV210_SETUP_I2C2 | 101 | select S5PV210_SETUP_I2C2 |
99 | select S5PV210_SETUP_KEYPAD | 102 | select S5PV210_SETUP_KEYPAD |
100 | select S5PV210_SETUP_SDHCI | 103 | select S5PV210_SETUP_SDHCI |
104 | select S5PV210_SETUP_FIMC | ||
101 | help | 105 | help |
102 | Machine support for Samsung GONI board | 106 | Machine support for Samsung GONI board |
103 | S5PC110(MCP) is one of package option of S5PV210 | 107 | S5PC110(MCP) is one of package option of S5PV210 |
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index ef7e4668d67..009fbe53df9 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile | |||
@@ -14,7 +14,7 @@ obj- := | |||
14 | 14 | ||
15 | obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o | 15 | obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o |
16 | obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o | 16 | obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o |
17 | obj-$(CONFIG_PM) += pm.o sleep.o | 17 | obj-$(CONFIG_PM) += pm.o |
18 | 18 | ||
19 | # machine support | 19 | # machine support |
20 | 20 | ||
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c index f5f8fa89679..4c5ac7a69e9 100644 --- a/arch/arm/mach-s5pv210/clock.c +++ b/arch/arm/mach-s5pv210/clock.c | |||
@@ -174,6 +174,16 @@ static int s5pv210_clk_mask1_ctrl(struct clk *clk, int enable) | |||
174 | return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable); | 174 | return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable); |
175 | } | 175 | } |
176 | 176 | ||
177 | static int exynos4_clk_hdmiphy_ctrl(struct clk *clk, int enable) | ||
178 | { | ||
179 | return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable); | ||
180 | } | ||
181 | |||
182 | static int exynos4_clk_dac_ctrl(struct clk *clk, int enable) | ||
183 | { | ||
184 | return s5p_gatectrl(S5P_DAC_PHY_CONTROL, clk, enable); | ||
185 | } | ||
186 | |||
177 | static struct clk clk_sclk_hdmi27m = { | 187 | static struct clk clk_sclk_hdmi27m = { |
178 | .name = "sclk_hdmi27m", | 188 | .name = "sclk_hdmi27m", |
179 | .rate = 27000000, | 189 | .rate = 27000000, |
@@ -203,6 +213,11 @@ static struct clk clk_pcmcdclk2 = { | |||
203 | .name = "pcmcdclk", | 213 | .name = "pcmcdclk", |
204 | }; | 214 | }; |
205 | 215 | ||
216 | static struct clk dummy_apb_pclk = { | ||
217 | .name = "apb_pclk", | ||
218 | .id = -1, | ||
219 | }; | ||
220 | |||
206 | static struct clk *clkset_vpllsrc_list[] = { | 221 | static struct clk *clkset_vpllsrc_list[] = { |
207 | [0] = &clk_fin_vpll, | 222 | [0] = &clk_fin_vpll, |
208 | [1] = &clk_sclk_hdmi27m, | 223 | [1] = &clk_sclk_hdmi27m, |
@@ -289,14 +304,14 @@ static struct clk_ops clk_fout_apll_ops = { | |||
289 | 304 | ||
290 | static struct clk init_clocks_off[] = { | 305 | static struct clk init_clocks_off[] = { |
291 | { | 306 | { |
292 | .name = "pdma", | 307 | .name = "dma", |
293 | .devname = "s3c-pl330.0", | 308 | .devname = "dma-pl330.0", |
294 | .parent = &clk_hclk_psys.clk, | 309 | .parent = &clk_hclk_psys.clk, |
295 | .enable = s5pv210_clk_ip0_ctrl, | 310 | .enable = s5pv210_clk_ip0_ctrl, |
296 | .ctrlbit = (1 << 3), | 311 | .ctrlbit = (1 << 3), |
297 | }, { | 312 | }, { |
298 | .name = "pdma", | 313 | .name = "dma", |
299 | .devname = "s3c-pl330.1", | 314 | .devname = "dma-pl330.1", |
300 | .parent = &clk_hclk_psys.clk, | 315 | .parent = &clk_hclk_psys.clk, |
301 | .enable = s5pv210_clk_ip0_ctrl, | 316 | .enable = s5pv210_clk_ip0_ctrl, |
302 | .ctrlbit = (1 << 4), | 317 | .ctrlbit = (1 << 4), |
@@ -330,6 +345,40 @@ static struct clk init_clocks_off[] = { | |||
330 | .enable = s5pv210_clk_ip0_ctrl, | 345 | .enable = s5pv210_clk_ip0_ctrl, |
331 | .ctrlbit = (1 << 16), | 346 | .ctrlbit = (1 << 16), |
332 | }, { | 347 | }, { |
348 | .name = "dac", | ||
349 | .devname = "s5p-sdo", | ||
350 | .parent = &clk_hclk_dsys.clk, | ||
351 | .enable = s5pv210_clk_ip1_ctrl, | ||
352 | .ctrlbit = (1 << 10), | ||
353 | }, { | ||
354 | .name = "mixer", | ||
355 | .devname = "s5p-mixer", | ||
356 | .parent = &clk_hclk_dsys.clk, | ||
357 | .enable = s5pv210_clk_ip1_ctrl, | ||
358 | .ctrlbit = (1 << 9), | ||
359 | }, { | ||
360 | .name = "vp", | ||
361 | .devname = "s5p-mixer", | ||
362 | .parent = &clk_hclk_dsys.clk, | ||
363 | .enable = s5pv210_clk_ip1_ctrl, | ||
364 | .ctrlbit = (1 << 8), | ||
365 | }, { | ||
366 | .name = "hdmi", | ||
367 | .devname = "s5pv210-hdmi", | ||
368 | .parent = &clk_hclk_dsys.clk, | ||
369 | .enable = s5pv210_clk_ip1_ctrl, | ||
370 | .ctrlbit = (1 << 11), | ||
371 | }, { | ||
372 | .name = "hdmiphy", | ||
373 | .devname = "s5pv210-hdmi", | ||
374 | .enable = exynos4_clk_hdmiphy_ctrl, | ||
375 | .ctrlbit = (1 << 0), | ||
376 | }, { | ||
377 | .name = "dacphy", | ||
378 | .devname = "s5p-sdo", | ||
379 | .enable = exynos4_clk_dac_ctrl, | ||
380 | .ctrlbit = (1 << 0), | ||
381 | }, { | ||
333 | .name = "otg", | 382 | .name = "otg", |
334 | .parent = &clk_hclk_psys.clk, | 383 | .parent = &clk_hclk_psys.clk, |
335 | .enable = s5pv210_clk_ip1_ctrl, | 384 | .enable = s5pv210_clk_ip1_ctrl, |
@@ -407,6 +456,12 @@ static struct clk init_clocks_off[] = { | |||
407 | .enable = s5pv210_clk_ip3_ctrl, | 456 | .enable = s5pv210_clk_ip3_ctrl, |
408 | .ctrlbit = (1<<9), | 457 | .ctrlbit = (1<<9), |
409 | }, { | 458 | }, { |
459 | .name = "i2c", | ||
460 | .devname = "s3c2440-hdmiphy-i2c", | ||
461 | .parent = &clk_pclk_psys.clk, | ||
462 | .enable = s5pv210_clk_ip3_ctrl, | ||
463 | .ctrlbit = (1 << 11), | ||
464 | }, { | ||
410 | .name = "spi", | 465 | .name = "spi", |
411 | .devname = "s3c64xx-spi.0", | 466 | .devname = "s3c64xx-spi.0", |
412 | .parent = &clk_pclk_psys.clk, | 467 | .parent = &clk_pclk_psys.clk, |
@@ -594,6 +649,23 @@ static struct clksrc_sources clkset_sclk_mixer = { | |||
594 | .nr_sources = ARRAY_SIZE(clkset_sclk_mixer_list), | 649 | .nr_sources = ARRAY_SIZE(clkset_sclk_mixer_list), |
595 | }; | 650 | }; |
596 | 651 | ||
652 | static struct clksrc_clk clk_sclk_mixer = { | ||
653 | .clk = { | ||
654 | .name = "sclk_mixer", | ||
655 | .enable = s5pv210_clk_mask0_ctrl, | ||
656 | .ctrlbit = (1 << 1), | ||
657 | }, | ||
658 | .sources = &clkset_sclk_mixer, | ||
659 | .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 }, | ||
660 | }; | ||
661 | |||
662 | static struct clksrc_clk *sclk_tv[] = { | ||
663 | &clk_sclk_dac, | ||
664 | &clk_sclk_pixel, | ||
665 | &clk_sclk_hdmi, | ||
666 | &clk_sclk_mixer, | ||
667 | }; | ||
668 | |||
597 | static struct clk *clkset_sclk_audio0_list[] = { | 669 | static struct clk *clkset_sclk_audio0_list[] = { |
598 | [0] = &clk_ext_xtal_mux, | 670 | [0] = &clk_ext_xtal_mux, |
599 | [1] = &clk_pcmcdclk0, | 671 | [1] = &clk_pcmcdclk0, |
@@ -777,14 +849,6 @@ static struct clksrc_clk clksrcs[] = { | |||
777 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 }, | 849 | .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 }, |
778 | }, { | 850 | }, { |
779 | .clk = { | 851 | .clk = { |
780 | .name = "sclk_mixer", | ||
781 | .enable = s5pv210_clk_mask0_ctrl, | ||
782 | .ctrlbit = (1 << 1), | ||
783 | }, | ||
784 | .sources = &clkset_sclk_mixer, | ||
785 | .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 }, | ||
786 | }, { | ||
787 | .clk = { | ||
788 | .name = "sclk_fimc", | 852 | .name = "sclk_fimc", |
789 | .devname = "s5pv210-fimc.0", | 853 | .devname = "s5pv210-fimc.0", |
790 | .enable = s5pv210_clk_mask1_ctrl, | 854 | .enable = s5pv210_clk_mask1_ctrl, |
@@ -973,9 +1037,6 @@ static struct clksrc_clk *sysclks[] = { | |||
973 | &clk_pclk_psys, | 1037 | &clk_pclk_psys, |
974 | &clk_vpllsrc, | 1038 | &clk_vpllsrc, |
975 | &clk_sclk_vpll, | 1039 | &clk_sclk_vpll, |
976 | &clk_sclk_dac, | ||
977 | &clk_sclk_pixel, | ||
978 | &clk_sclk_hdmi, | ||
979 | &clk_mout_dmc0, | 1040 | &clk_mout_dmc0, |
980 | &clk_sclk_dmc0, | 1041 | &clk_sclk_dmc0, |
981 | &clk_sclk_audio0, | 1042 | &clk_sclk_audio0, |
@@ -1060,6 +1121,61 @@ static struct clk_ops s5pv210_epll_ops = { | |||
1060 | .get_rate = s5p_epll_get_rate, | 1121 | .get_rate = s5p_epll_get_rate, |
1061 | }; | 1122 | }; |
1062 | 1123 | ||
1124 | static u32 vpll_div[][5] = { | ||
1125 | { 54000000, 3, 53, 3, 0 }, | ||
1126 | { 108000000, 3, 53, 2, 0 }, | ||
1127 | }; | ||
1128 | |||
1129 | static unsigned long s5pv210_vpll_get_rate(struct clk *clk) | ||
1130 | { | ||
1131 | return clk->rate; | ||
1132 | } | ||
1133 | |||
1134 | static int s5pv210_vpll_set_rate(struct clk *clk, unsigned long rate) | ||
1135 | { | ||
1136 | unsigned int vpll_con; | ||
1137 | unsigned int i; | ||
1138 | |||
1139 | /* Return if nothing changed */ | ||
1140 | if (clk->rate == rate) | ||
1141 | return 0; | ||
1142 | |||
1143 | vpll_con = __raw_readl(S5P_VPLL_CON); | ||
1144 | vpll_con &= ~(0x1 << 27 | \ | ||
1145 | PLL90XX_MDIV_MASK << PLL90XX_MDIV_SHIFT | \ | ||
1146 | PLL90XX_PDIV_MASK << PLL90XX_PDIV_SHIFT | \ | ||
1147 | PLL90XX_SDIV_MASK << PLL90XX_SDIV_SHIFT); | ||
1148 | |||
1149 | for (i = 0; i < ARRAY_SIZE(vpll_div); i++) { | ||
1150 | if (vpll_div[i][0] == rate) { | ||
1151 | vpll_con |= vpll_div[i][1] << PLL90XX_PDIV_SHIFT; | ||
1152 | vpll_con |= vpll_div[i][2] << PLL90XX_MDIV_SHIFT; | ||
1153 | vpll_con |= vpll_div[i][3] << PLL90XX_SDIV_SHIFT; | ||
1154 | vpll_con |= vpll_div[i][4] << 27; | ||
1155 | break; | ||
1156 | } | ||
1157 | } | ||
1158 | |||
1159 | if (i == ARRAY_SIZE(vpll_div)) { | ||
1160 | printk(KERN_ERR "%s: Invalid Clock VPLL Frequency\n", | ||
1161 | __func__); | ||
1162 | return -EINVAL; | ||
1163 | } | ||
1164 | |||
1165 | __raw_writel(vpll_con, S5P_VPLL_CON); | ||
1166 | |||
1167 | /* Wait for VPLL lock */ | ||
1168 | while (!(__raw_readl(S5P_VPLL_CON) & (1 << PLL90XX_LOCKED_SHIFT))) | ||
1169 | continue; | ||
1170 | |||
1171 | clk->rate = rate; | ||
1172 | return 0; | ||
1173 | } | ||
1174 | static struct clk_ops s5pv210_vpll_ops = { | ||
1175 | .get_rate = s5pv210_vpll_get_rate, | ||
1176 | .set_rate = s5pv210_vpll_set_rate, | ||
1177 | }; | ||
1178 | |||
1063 | void __init_or_cpufreq s5pv210_setup_clocks(void) | 1179 | void __init_or_cpufreq s5pv210_setup_clocks(void) |
1064 | { | 1180 | { |
1065 | struct clk *xtal_clk; | 1181 | struct clk *xtal_clk; |
@@ -1108,6 +1224,7 @@ void __init_or_cpufreq s5pv210_setup_clocks(void) | |||
1108 | clk_fout_apll.ops = &clk_fout_apll_ops; | 1224 | clk_fout_apll.ops = &clk_fout_apll_ops; |
1109 | clk_fout_mpll.rate = mpll; | 1225 | clk_fout_mpll.rate = mpll; |
1110 | clk_fout_epll.rate = epll; | 1226 | clk_fout_epll.rate = epll; |
1227 | clk_fout_vpll.ops = &s5pv210_vpll_ops; | ||
1111 | clk_fout_vpll.rate = vpll; | 1228 | clk_fout_vpll.rate = vpll; |
1112 | 1229 | ||
1113 | printk(KERN_INFO "S5PV210: PLL settings, A=%ld, M=%ld, E=%ld V=%ld", | 1230 | printk(KERN_INFO "S5PV210: PLL settings, A=%ld, M=%ld, E=%ld V=%ld", |
@@ -1153,11 +1270,15 @@ void __init s5pv210_register_clocks(void) | |||
1153 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | 1270 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) |
1154 | s3c_register_clksrc(sysclks[ptr], 1); | 1271 | s3c_register_clksrc(sysclks[ptr], 1); |
1155 | 1272 | ||
1273 | for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++) | ||
1274 | s3c_register_clksrc(sclk_tv[ptr], 1); | ||
1275 | |||
1156 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 1276 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
1157 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 1277 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
1158 | 1278 | ||
1159 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1279 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1160 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1280 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1161 | 1281 | ||
1282 | s3c24xx_register_clock(&dummy_apb_pclk); | ||
1162 | s3c_pwmclk_init(); | 1283 | s3c_pwmclk_init(); |
1163 | } | 1284 | } |
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c index 91145720822..84ec7463323 100644 --- a/arch/arm/mach-s5pv210/cpu.c +++ b/arch/arm/mach-s5pv210/cpu.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include <plat/keypad-core.h> | 42 | #include <plat/keypad-core.h> |
43 | #include <plat/sdhci.h> | 43 | #include <plat/sdhci.h> |
44 | #include <plat/reset.h> | 44 | #include <plat/reset.h> |
45 | #include <plat/tv-core.h> | ||
45 | 46 | ||
46 | /* Initial IO mappings */ | 47 | /* Initial IO mappings */ |
47 | 48 | ||
@@ -145,6 +146,9 @@ void __init s5pv210_map_io(void) | |||
145 | 146 | ||
146 | /* Use s5pv210-keypad instead of samsung-keypad */ | 147 | /* Use s5pv210-keypad instead of samsung-keypad */ |
147 | samsung_keypad_setname("s5pv210-keypad"); | 148 | samsung_keypad_setname("s5pv210-keypad"); |
149 | |||
150 | /* setup TV devices */ | ||
151 | s5p_hdmi_setname("s5pv210-hdmi"); | ||
148 | } | 152 | } |
149 | 153 | ||
150 | void __init s5pv210_init_clocks(int xtal) | 154 | void __init s5pv210_init_clocks(int xtal) |
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c index 497d3439a14..86b749c18b7 100644 --- a/arch/arm/mach-s5pv210/dma.c +++ b/arch/arm/mach-s5pv210/dma.c | |||
@@ -1,4 +1,8 @@ | |||
1 | /* | 1 | /* linux/arch/arm/mach-s5pv210/dma.c |
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
2 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | 6 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. |
3 | * Jaswinder Singh <jassi.brar@samsung.com> | 7 | * Jaswinder Singh <jassi.brar@samsung.com> |
4 | * | 8 | * |
@@ -17,151 +21,240 @@ | |||
17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
18 | */ | 22 | */ |
19 | 23 | ||
20 | #include <linux/platform_device.h> | ||
21 | #include <linux/dma-mapping.h> | 24 | #include <linux/dma-mapping.h> |
25 | #include <linux/amba/bus.h> | ||
26 | #include <linux/amba/pl330.h> | ||
22 | 27 | ||
28 | #include <asm/irq.h> | ||
23 | #include <plat/devs.h> | 29 | #include <plat/devs.h> |
24 | #include <plat/irqs.h> | 30 | #include <plat/irqs.h> |
25 | 31 | ||
26 | #include <mach/map.h> | 32 | #include <mach/map.h> |
27 | #include <mach/irqs.h> | 33 | #include <mach/irqs.h> |
28 | 34 | #include <mach/dma.h> | |
29 | #include <plat/s3c-pl330-pdata.h> | ||
30 | 35 | ||
31 | static u64 dma_dmamask = DMA_BIT_MASK(32); | 36 | static u64 dma_dmamask = DMA_BIT_MASK(32); |
32 | 37 | ||
33 | static struct resource s5pv210_pdma0_resource[] = { | 38 | struct dma_pl330_peri pdma0_peri[28] = { |
34 | [0] = { | 39 | { |
35 | .start = S5PV210_PA_PDMA0, | 40 | .peri_id = (u8)DMACH_UART0_RX, |
36 | .end = S5PV210_PA_PDMA0 + SZ_4K, | 41 | .rqtype = DEVTOMEM, |
37 | .flags = IORESOURCE_MEM, | 42 | }, { |
38 | }, | 43 | .peri_id = (u8)DMACH_UART0_TX, |
39 | [1] = { | 44 | .rqtype = MEMTODEV, |
40 | .start = IRQ_PDMA0, | 45 | }, { |
41 | .end = IRQ_PDMA0, | 46 | .peri_id = (u8)DMACH_UART1_RX, |
42 | .flags = IORESOURCE_IRQ, | 47 | .rqtype = DEVTOMEM, |
48 | }, { | ||
49 | .peri_id = (u8)DMACH_UART1_TX, | ||
50 | .rqtype = MEMTODEV, | ||
51 | }, { | ||
52 | .peri_id = (u8)DMACH_UART2_RX, | ||
53 | .rqtype = DEVTOMEM, | ||
54 | }, { | ||
55 | .peri_id = (u8)DMACH_UART2_TX, | ||
56 | .rqtype = MEMTODEV, | ||
57 | }, { | ||
58 | .peri_id = (u8)DMACH_UART3_RX, | ||
59 | .rqtype = DEVTOMEM, | ||
60 | }, { | ||
61 | .peri_id = (u8)DMACH_UART3_TX, | ||
62 | .rqtype = MEMTODEV, | ||
63 | }, { | ||
64 | .peri_id = DMACH_MAX, | ||
65 | }, { | ||
66 | .peri_id = (u8)DMACH_I2S0_RX, | ||
67 | .rqtype = DEVTOMEM, | ||
68 | }, { | ||
69 | .peri_id = (u8)DMACH_I2S0_TX, | ||
70 | .rqtype = MEMTODEV, | ||
71 | }, { | ||
72 | .peri_id = (u8)DMACH_I2S0S_TX, | ||
73 | .rqtype = MEMTODEV, | ||
74 | }, { | ||
75 | .peri_id = (u8)DMACH_I2S1_RX, | ||
76 | .rqtype = DEVTOMEM, | ||
77 | }, { | ||
78 | .peri_id = (u8)DMACH_I2S1_TX, | ||
79 | .rqtype = MEMTODEV, | ||
80 | }, { | ||
81 | .peri_id = (u8)DMACH_MAX, | ||
82 | }, { | ||
83 | .peri_id = (u8)DMACH_MAX, | ||
84 | }, { | ||
85 | .peri_id = (u8)DMACH_SPI0_RX, | ||
86 | .rqtype = DEVTOMEM, | ||
87 | }, { | ||
88 | .peri_id = (u8)DMACH_SPI0_TX, | ||
89 | .rqtype = MEMTODEV, | ||
90 | }, { | ||
91 | .peri_id = (u8)DMACH_SPI1_RX, | ||
92 | .rqtype = DEVTOMEM, | ||
93 | }, { | ||
94 | .peri_id = (u8)DMACH_SPI1_TX, | ||
95 | .rqtype = MEMTODEV, | ||
96 | }, { | ||
97 | .peri_id = (u8)DMACH_MAX, | ||
98 | }, { | ||
99 | .peri_id = (u8)DMACH_MAX, | ||
100 | }, { | ||
101 | .peri_id = (u8)DMACH_AC97_MICIN, | ||
102 | .rqtype = DEVTOMEM, | ||
103 | }, { | ||
104 | .peri_id = (u8)DMACH_AC97_PCMIN, | ||
105 | .rqtype = DEVTOMEM, | ||
106 | }, { | ||
107 | .peri_id = (u8)DMACH_AC97_PCMOUT, | ||
108 | .rqtype = MEMTODEV, | ||
109 | }, { | ||
110 | .peri_id = (u8)DMACH_MAX, | ||
111 | }, { | ||
112 | .peri_id = (u8)DMACH_PWM, | ||
113 | }, { | ||
114 | .peri_id = (u8)DMACH_SPDIF, | ||
115 | .rqtype = MEMTODEV, | ||
43 | }, | 116 | }, |
44 | }; | 117 | }; |
45 | 118 | ||
46 | static struct s3c_pl330_platdata s5pv210_pdma0_pdata = { | 119 | struct dma_pl330_platdata s5pv210_pdma0_pdata = { |
47 | .peri = { | 120 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), |
48 | [0] = DMACH_UART0_RX, | 121 | .peri = pdma0_peri, |
49 | [1] = DMACH_UART0_TX, | ||
50 | [2] = DMACH_UART1_RX, | ||
51 | [3] = DMACH_UART1_TX, | ||
52 | [4] = DMACH_UART2_RX, | ||
53 | [5] = DMACH_UART2_TX, | ||
54 | [6] = DMACH_UART3_RX, | ||
55 | [7] = DMACH_UART3_TX, | ||
56 | [8] = DMACH_MAX, | ||
57 | [9] = DMACH_I2S0_RX, | ||
58 | [10] = DMACH_I2S0_TX, | ||
59 | [11] = DMACH_I2S0S_TX, | ||
60 | [12] = DMACH_I2S1_RX, | ||
61 | [13] = DMACH_I2S1_TX, | ||
62 | [14] = DMACH_MAX, | ||
63 | [15] = DMACH_MAX, | ||
64 | [16] = DMACH_SPI0_RX, | ||
65 | [17] = DMACH_SPI0_TX, | ||
66 | [18] = DMACH_SPI1_RX, | ||
67 | [19] = DMACH_SPI1_TX, | ||
68 | [20] = DMACH_MAX, | ||
69 | [21] = DMACH_MAX, | ||
70 | [22] = DMACH_AC97_MICIN, | ||
71 | [23] = DMACH_AC97_PCMIN, | ||
72 | [24] = DMACH_AC97_PCMOUT, | ||
73 | [25] = DMACH_MAX, | ||
74 | [26] = DMACH_PWM, | ||
75 | [27] = DMACH_SPDIF, | ||
76 | [28] = DMACH_MAX, | ||
77 | [29] = DMACH_MAX, | ||
78 | [30] = DMACH_MAX, | ||
79 | [31] = DMACH_MAX, | ||
80 | }, | ||
81 | }; | 122 | }; |
82 | 123 | ||
83 | static struct platform_device s5pv210_device_pdma0 = { | 124 | struct amba_device s5pv210_device_pdma0 = { |
84 | .name = "s3c-pl330", | 125 | .dev = { |
85 | .id = 0, | 126 | .init_name = "dma-pl330.0", |
86 | .num_resources = ARRAY_SIZE(s5pv210_pdma0_resource), | ||
87 | .resource = s5pv210_pdma0_resource, | ||
88 | .dev = { | ||
89 | .dma_mask = &dma_dmamask, | 127 | .dma_mask = &dma_dmamask, |
90 | .coherent_dma_mask = DMA_BIT_MASK(32), | 128 | .coherent_dma_mask = DMA_BIT_MASK(32), |
91 | .platform_data = &s5pv210_pdma0_pdata, | 129 | .platform_data = &s5pv210_pdma0_pdata, |
92 | }, | 130 | }, |
93 | }; | 131 | .res = { |
94 | 132 | .start = S5PV210_PA_PDMA0, | |
95 | static struct resource s5pv210_pdma1_resource[] = { | 133 | .end = S5PV210_PA_PDMA0 + SZ_4K, |
96 | [0] = { | ||
97 | .start = S5PV210_PA_PDMA1, | ||
98 | .end = S5PV210_PA_PDMA1 + SZ_4K, | ||
99 | .flags = IORESOURCE_MEM, | 134 | .flags = IORESOURCE_MEM, |
100 | }, | 135 | }, |
101 | [1] = { | 136 | .irq = {IRQ_PDMA0, NO_IRQ}, |
102 | .start = IRQ_PDMA1, | 137 | .periphid = 0x00041330, |
103 | .end = IRQ_PDMA1, | ||
104 | .flags = IORESOURCE_IRQ, | ||
105 | }, | ||
106 | }; | 138 | }; |
107 | 139 | ||
108 | static struct s3c_pl330_platdata s5pv210_pdma1_pdata = { | 140 | struct dma_pl330_peri pdma1_peri[32] = { |
109 | .peri = { | 141 | { |
110 | [0] = DMACH_UART0_RX, | 142 | .peri_id = (u8)DMACH_UART0_RX, |
111 | [1] = DMACH_UART0_TX, | 143 | .rqtype = DEVTOMEM, |
112 | [2] = DMACH_UART1_RX, | 144 | }, { |
113 | [3] = DMACH_UART1_TX, | 145 | .peri_id = (u8)DMACH_UART0_TX, |
114 | [4] = DMACH_UART2_RX, | 146 | .rqtype = MEMTODEV, |
115 | [5] = DMACH_UART2_TX, | 147 | }, { |
116 | [6] = DMACH_UART3_RX, | 148 | .peri_id = (u8)DMACH_UART1_RX, |
117 | [7] = DMACH_UART3_TX, | 149 | .rqtype = DEVTOMEM, |
118 | [8] = DMACH_MAX, | 150 | }, { |
119 | [9] = DMACH_I2S0_RX, | 151 | .peri_id = (u8)DMACH_UART1_TX, |
120 | [10] = DMACH_I2S0_TX, | 152 | .rqtype = MEMTODEV, |
121 | [11] = DMACH_I2S0S_TX, | 153 | }, { |
122 | [12] = DMACH_I2S1_RX, | 154 | .peri_id = (u8)DMACH_UART2_RX, |
123 | [13] = DMACH_I2S1_TX, | 155 | .rqtype = DEVTOMEM, |
124 | [14] = DMACH_I2S2_RX, | 156 | }, { |
125 | [15] = DMACH_I2S2_TX, | 157 | .peri_id = (u8)DMACH_UART2_TX, |
126 | [16] = DMACH_SPI0_RX, | 158 | .rqtype = MEMTODEV, |
127 | [17] = DMACH_SPI0_TX, | 159 | }, { |
128 | [18] = DMACH_SPI1_RX, | 160 | .peri_id = (u8)DMACH_UART3_RX, |
129 | [19] = DMACH_SPI1_TX, | 161 | .rqtype = DEVTOMEM, |
130 | [20] = DMACH_MAX, | 162 | }, { |
131 | [21] = DMACH_MAX, | 163 | .peri_id = (u8)DMACH_UART3_TX, |
132 | [22] = DMACH_PCM0_RX, | 164 | .rqtype = MEMTODEV, |
133 | [23] = DMACH_PCM0_TX, | 165 | }, { |
134 | [24] = DMACH_PCM1_RX, | 166 | .peri_id = DMACH_MAX, |
135 | [25] = DMACH_PCM1_TX, | 167 | }, { |
136 | [26] = DMACH_MSM_REQ0, | 168 | .peri_id = (u8)DMACH_I2S0_RX, |
137 | [27] = DMACH_MSM_REQ1, | 169 | .rqtype = DEVTOMEM, |
138 | [28] = DMACH_MSM_REQ2, | 170 | }, { |
139 | [29] = DMACH_MSM_REQ3, | 171 | .peri_id = (u8)DMACH_I2S0_TX, |
140 | [30] = DMACH_PCM2_RX, | 172 | .rqtype = MEMTODEV, |
141 | [31] = DMACH_PCM2_TX, | 173 | }, { |
174 | .peri_id = (u8)DMACH_I2S0S_TX, | ||
175 | .rqtype = MEMTODEV, | ||
176 | }, { | ||
177 | .peri_id = (u8)DMACH_I2S1_RX, | ||
178 | .rqtype = DEVTOMEM, | ||
179 | }, { | ||
180 | .peri_id = (u8)DMACH_I2S1_TX, | ||
181 | .rqtype = MEMTODEV, | ||
182 | }, { | ||
183 | .peri_id = (u8)DMACH_I2S2_RX, | ||
184 | .rqtype = DEVTOMEM, | ||
185 | }, { | ||
186 | .peri_id = (u8)DMACH_I2S2_TX, | ||
187 | .rqtype = MEMTODEV, | ||
188 | }, { | ||
189 | .peri_id = (u8)DMACH_SPI0_RX, | ||
190 | .rqtype = DEVTOMEM, | ||
191 | }, { | ||
192 | .peri_id = (u8)DMACH_SPI0_TX, | ||
193 | .rqtype = MEMTODEV, | ||
194 | }, { | ||
195 | .peri_id = (u8)DMACH_SPI1_RX, | ||
196 | .rqtype = DEVTOMEM, | ||
197 | }, { | ||
198 | .peri_id = (u8)DMACH_SPI1_TX, | ||
199 | .rqtype = MEMTODEV, | ||
200 | }, { | ||
201 | .peri_id = (u8)DMACH_MAX, | ||
202 | }, { | ||
203 | .peri_id = (u8)DMACH_MAX, | ||
204 | }, { | ||
205 | .peri_id = (u8)DMACH_PCM0_RX, | ||
206 | .rqtype = DEVTOMEM, | ||
207 | }, { | ||
208 | .peri_id = (u8)DMACH_PCM0_TX, | ||
209 | .rqtype = MEMTODEV, | ||
210 | }, { | ||
211 | .peri_id = (u8)DMACH_PCM1_RX, | ||
212 | .rqtype = DEVTOMEM, | ||
213 | }, { | ||
214 | .peri_id = (u8)DMACH_PCM1_TX, | ||
215 | .rqtype = MEMTODEV, | ||
216 | }, { | ||
217 | .peri_id = (u8)DMACH_MSM_REQ0, | ||
218 | }, { | ||
219 | .peri_id = (u8)DMACH_MSM_REQ1, | ||
220 | }, { | ||
221 | .peri_id = (u8)DMACH_MSM_REQ2, | ||
222 | }, { | ||
223 | .peri_id = (u8)DMACH_MSM_REQ3, | ||
224 | }, { | ||
225 | .peri_id = (u8)DMACH_PCM2_RX, | ||
226 | .rqtype = DEVTOMEM, | ||
227 | }, { | ||
228 | .peri_id = (u8)DMACH_PCM2_TX, | ||
229 | .rqtype = MEMTODEV, | ||
142 | }, | 230 | }, |
143 | }; | 231 | }; |
144 | 232 | ||
145 | static struct platform_device s5pv210_device_pdma1 = { | 233 | struct dma_pl330_platdata s5pv210_pdma1_pdata = { |
146 | .name = "s3c-pl330", | 234 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), |
147 | .id = 1, | 235 | .peri = pdma1_peri, |
148 | .num_resources = ARRAY_SIZE(s5pv210_pdma1_resource), | 236 | }; |
149 | .resource = s5pv210_pdma1_resource, | 237 | |
150 | .dev = { | 238 | struct amba_device s5pv210_device_pdma1 = { |
239 | .dev = { | ||
240 | .init_name = "dma-pl330.1", | ||
151 | .dma_mask = &dma_dmamask, | 241 | .dma_mask = &dma_dmamask, |
152 | .coherent_dma_mask = DMA_BIT_MASK(32), | 242 | .coherent_dma_mask = DMA_BIT_MASK(32), |
153 | .platform_data = &s5pv210_pdma1_pdata, | 243 | .platform_data = &s5pv210_pdma1_pdata, |
154 | }, | 244 | }, |
155 | }; | 245 | .res = { |
156 | 246 | .start = S5PV210_PA_PDMA1, | |
157 | static struct platform_device *s5pv210_dmacs[] __initdata = { | 247 | .end = S5PV210_PA_PDMA1 + SZ_4K, |
158 | &s5pv210_device_pdma0, | 248 | .flags = IORESOURCE_MEM, |
159 | &s5pv210_device_pdma1, | 249 | }, |
250 | .irq = {IRQ_PDMA1, NO_IRQ}, | ||
251 | .periphid = 0x00041330, | ||
160 | }; | 252 | }; |
161 | 253 | ||
162 | static int __init s5pv210_dma_init(void) | 254 | static int __init s5pv210_dma_init(void) |
163 | { | 255 | { |
164 | platform_add_devices(s5pv210_dmacs, ARRAY_SIZE(s5pv210_dmacs)); | 256 | amba_device_register(&s5pv210_device_pdma0, &iomem_resource); |
257 | amba_device_register(&s5pv210_device_pdma1, &iomem_resource); | ||
165 | 258 | ||
166 | return 0; | 259 | return 0; |
167 | } | 260 | } |
diff --git a/arch/arm/mach-s5pv210/include/mach/clkdev.h b/arch/arm/mach-s5pv210/include/mach/clkdev.h deleted file mode 100644 index 7dffa83d23f..00000000000 --- a/arch/arm/mach-s5pv210/include/mach/clkdev.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __MACH_CLKDEV_H__ | ||
2 | #define __MACH_CLKDEV_H__ | ||
3 | |||
4 | #define __clk_get(clk) ({ 1; }) | ||
5 | #define __clk_put(clk) do {} while (0) | ||
6 | |||
7 | #endif | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/dma.h b/arch/arm/mach-s5pv210/include/mach/dma.h index 81209eb1409..201842a3769 100644 --- a/arch/arm/mach-s5pv210/include/mach/dma.h +++ b/arch/arm/mach-s5pv210/include/mach/dma.h | |||
@@ -20,7 +20,7 @@ | |||
20 | #ifndef __MACH_DMA_H | 20 | #ifndef __MACH_DMA_H |
21 | #define __MACH_DMA_H | 21 | #define __MACH_DMA_H |
22 | 22 | ||
23 | /* This platform uses the common S3C DMA API driver for PL330 */ | 23 | /* This platform uses the common DMA API driver for PL330 */ |
24 | #include <plat/s3c-dma-pl330.h> | 24 | #include <plat/dma-pl330.h> |
25 | 25 | ||
26 | #endif /* __MACH_DMA_H */ | 26 | #endif /* __MACH_DMA_H */ |
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h index b9f9ec33384..5e0de3a31f3 100644 --- a/arch/arm/mach-s5pv210/include/mach/irqs.h +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h | |||
@@ -56,7 +56,7 @@ | |||
56 | #define IRQ_SPI2 S5P_IRQ_VIC1(17) | 56 | #define IRQ_SPI2 S5P_IRQ_VIC1(17) |
57 | #define IRQ_IRDA S5P_IRQ_VIC1(18) | 57 | #define IRQ_IRDA S5P_IRQ_VIC1(18) |
58 | #define IRQ_IIC2 S5P_IRQ_VIC1(19) | 58 | #define IRQ_IIC2 S5P_IRQ_VIC1(19) |
59 | #define IRQ_IIC3 S5P_IRQ_VIC1(20) | 59 | #define IRQ_IIC_HDMIPHY S5P_IRQ_VIC1(20) |
60 | #define IRQ_HSIRX S5P_IRQ_VIC1(21) | 60 | #define IRQ_HSIRX S5P_IRQ_VIC1(21) |
61 | #define IRQ_HSITX S5P_IRQ_VIC1(22) | 61 | #define IRQ_HSITX S5P_IRQ_VIC1(22) |
62 | #define IRQ_UHOST S5P_IRQ_VIC1(23) | 62 | #define IRQ_UHOST S5P_IRQ_VIC1(23) |
@@ -86,7 +86,7 @@ | |||
86 | #define IRQ_HDMI S5P_IRQ_VIC2(12) | 86 | #define IRQ_HDMI S5P_IRQ_VIC2(12) |
87 | #define IRQ_IIC1 S5P_IRQ_VIC2(13) | 87 | #define IRQ_IIC1 S5P_IRQ_VIC2(13) |
88 | #define IRQ_MFC S5P_IRQ_VIC2(14) | 88 | #define IRQ_MFC S5P_IRQ_VIC2(14) |
89 | #define IRQ_TVENC S5P_IRQ_VIC2(15) | 89 | #define IRQ_SDO S5P_IRQ_VIC2(15) |
90 | #define IRQ_I2S0 S5P_IRQ_VIC2(16) | 90 | #define IRQ_I2S0 S5P_IRQ_VIC2(16) |
91 | #define IRQ_I2S1 S5P_IRQ_VIC2(17) | 91 | #define IRQ_I2S1 S5P_IRQ_VIC2(17) |
92 | #define IRQ_I2S2 S5P_IRQ_VIC2(18) | 92 | #define IRQ_I2S2 S5P_IRQ_VIC2(18) |
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h index aac343c180b..7ff609f1568 100644 --- a/arch/arm/mach-s5pv210/include/mach/map.h +++ b/arch/arm/mach-s5pv210/include/mach/map.h | |||
@@ -90,6 +90,12 @@ | |||
90 | #define S5PV210_PA_FIMC1 0xFB300000 | 90 | #define S5PV210_PA_FIMC1 0xFB300000 |
91 | #define S5PV210_PA_FIMC2 0xFB400000 | 91 | #define S5PV210_PA_FIMC2 0xFB400000 |
92 | 92 | ||
93 | #define S5PV210_PA_SDO 0xF9000000 | ||
94 | #define S5PV210_PA_VP 0xF9100000 | ||
95 | #define S5PV210_PA_MIXER 0xF9200000 | ||
96 | #define S5PV210_PA_HDMI 0xFA100000 | ||
97 | #define S5PV210_PA_IIC_HDMIPHY 0xFA900000 | ||
98 | |||
93 | /* Compatibiltiy Defines */ | 99 | /* Compatibiltiy Defines */ |
94 | 100 | ||
95 | #define S3C_PA_FB S5PV210_PA_FB | 101 | #define S3C_PA_FB S5PV210_PA_FB |
@@ -110,6 +116,13 @@ | |||
110 | #define S5P_PA_FIMC2 S5PV210_PA_FIMC2 | 116 | #define S5P_PA_FIMC2 S5PV210_PA_FIMC2 |
111 | #define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS | 117 | #define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS |
112 | #define S5P_PA_MFC S5PV210_PA_MFC | 118 | #define S5P_PA_MFC S5PV210_PA_MFC |
119 | #define S5P_PA_IIC_HDMIPHY S5PV210_PA_IIC_HDMIPHY | ||
120 | |||
121 | #define S5P_PA_SDO S5PV210_PA_SDO | ||
122 | #define S5P_PA_VP S5PV210_PA_VP | ||
123 | #define S5P_PA_MIXER S5PV210_PA_MIXER | ||
124 | #define S5P_PA_HDMI S5PV210_PA_HDMI | ||
125 | |||
113 | #define S5P_PA_ONENAND S5PC110_PA_ONENAND | 126 | #define S5P_PA_ONENAND S5PC110_PA_ONENAND |
114 | #define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA | 127 | #define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA |
115 | #define S5P_PA_SDRAM S5PV210_PA_SDRAM | 128 | #define S5P_PA_SDRAM S5PV210_PA_SDRAM |
diff --git a/arch/arm/mach-s5pv210/include/mach/pm-core.h b/arch/arm/mach-s5pv210/include/mach/pm-core.h index 3e22109e1b7..eba8aea63ed 100644 --- a/arch/arm/mach-s5pv210/include/mach/pm-core.h +++ b/arch/arm/mach-s5pv210/include/mach/pm-core.h | |||
@@ -43,4 +43,4 @@ static inline void s3c_pm_arch_update_uart(void __iomem *regs, | |||
43 | } | 43 | } |
44 | 44 | ||
45 | static inline void s3c_pm_restored_gpios(void) { } | 45 | static inline void s3c_pm_restored_gpios(void) { } |
46 | static inline void s3c_pm_saved_gpios(void) { } | 46 | static inline void samsung_pm_saved_gpios(void) { } |
diff --git a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h deleted file mode 100644 index f8a9f1b330e..00000000000 --- a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Copyright 2008 Openmoko, Inc. | ||
7 | * Copyright 2008 Simtec Electronics | ||
8 | * Ben Dooks <ben@simtec.co.uk> | ||
9 | * http://armlinux.simtec.co.uk/ | ||
10 | * | ||
11 | * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h | ||
12 | * | ||
13 | * S5PV210 - pwm clock and timer support | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License version 2 as | ||
17 | * published by the Free Software Foundation. | ||
18 | */ | ||
19 | |||
20 | #ifndef __ASM_ARCH_PWMCLK_H | ||
21 | #define __ASM_ARCH_PWMCLK_H __FILE__ | ||
22 | |||
23 | /** | ||
24 | * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk | ||
25 | * @tcfg: The timer TCFG1 register bits shifted down to 0. | ||
26 | * | ||
27 | * Return true if the given configuration from TCFG1 is a TCLK instead | ||
28 | * any of the TDIV clocks. | ||
29 | */ | ||
30 | static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) | ||
31 | { | ||
32 | return tcfg == S3C64XX_TCFG1_MUX_TCLK; | ||
33 | } | ||
34 | |||
35 | /** | ||
36 | * tcfg_to_divisor() - convert tcfg1 setting to a divisor | ||
37 | * @tcfg1: The tcfg1 setting, shifted down. | ||
38 | * | ||
39 | * Get the divisor value for the given tcfg1 setting. We assume the | ||
40 | * caller has already checked to see if this is not a TCLK source. | ||
41 | */ | ||
42 | static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) | ||
43 | { | ||
44 | return 1 << tcfg1; | ||
45 | } | ||
46 | |||
47 | /** | ||
48 | * pwm_tdiv_has_div1() - does the tdiv setting have a /1 | ||
49 | * | ||
50 | * Return true if we have a /1 in the tdiv setting. | ||
51 | */ | ||
52 | static inline unsigned int pwm_tdiv_has_div1(void) | ||
53 | { | ||
54 | return 1; | ||
55 | } | ||
56 | |||
57 | /** | ||
58 | * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. | ||
59 | * @div: The divisor to calculate the bit information for. | ||
60 | * | ||
61 | * Turn a divisor into the necessary bit field for TCFG1. | ||
62 | */ | ||
63 | static inline unsigned long pwm_tdiv_div_bits(unsigned int div) | ||
64 | { | ||
65 | return ilog2(div); | ||
66 | } | ||
67 | |||
68 | #define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK | ||
69 | |||
70 | #endif /* __ASM_ARCH_PWMCLK_H */ | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h index 78925c51634..032de66fb8b 100644 --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h | |||
@@ -144,8 +144,9 @@ | |||
144 | 144 | ||
145 | #define S5P_OTHERS S5P_CLKREG(0xE000) | 145 | #define S5P_OTHERS S5P_CLKREG(0xE000) |
146 | #define S5P_OM_STAT S5P_CLKREG(0xE100) | 146 | #define S5P_OM_STAT S5P_CLKREG(0xE100) |
147 | #define S5P_HDMI_PHY_CONTROL S5P_CLKREG(0xE804) | ||
147 | #define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C) | 148 | #define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C) |
148 | #define S5P_DAC_CONTROL S5P_CLKREG(0xE810) | 149 | #define S5P_DAC_PHY_CONTROL S5P_CLKREG(0xE810) |
149 | #define S5P_MIPI_DPHY_CONTROL(x) S5P_CLKREG(0xE814) | 150 | #define S5P_MIPI_DPHY_CONTROL(x) S5P_CLKREG(0xE814) |
150 | #define S5P_MIPI_DPHY_ENABLE (1 << 0) | 151 | #define S5P_MIPI_DPHY_ENABLE (1 << 0) |
151 | #define S5P_MIPI_DPHY_SRESETN (1 << 1) | 152 | #define S5P_MIPI_DPHY_SRESETN (1 << 1) |
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index 061cc7e4f48..15edcae448b 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c | |||
@@ -48,6 +48,11 @@ | |||
48 | #include <plat/s5p-time.h> | 48 | #include <plat/s5p-time.h> |
49 | #include <plat/mfc.h> | 49 | #include <plat/mfc.h> |
50 | #include <plat/regs-fb-v4.h> | 50 | #include <plat/regs-fb-v4.h> |
51 | #include <plat/camport.h> | ||
52 | |||
53 | #include <media/v4l2-mediabus.h> | ||
54 | #include <media/s5p_fimc.h> | ||
55 | #include <media/noon010pc30.h> | ||
51 | 56 | ||
52 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 57 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
53 | #define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 58 | #define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
@@ -272,6 +277,14 @@ static void __init goni_tsp_init(void) | |||
272 | i2c2_devs[0].irq = gpio_to_irq(gpio); | 277 | i2c2_devs[0].irq = gpio_to_irq(gpio); |
273 | } | 278 | } |
274 | 279 | ||
280 | static void goni_camera_init(void) | ||
281 | { | ||
282 | s5pv210_fimc_setup_gpio(S5P_CAMPORT_A); | ||
283 | |||
284 | /* Set max driver strength on CAM_A_CLKOUT pin. */ | ||
285 | s5p_gpio_set_drvstr(S5PV210_GPE1(3), S5P_GPIO_DRVSTR_LV4); | ||
286 | } | ||
287 | |||
275 | /* MAX8998 regulators */ | 288 | /* MAX8998 regulators */ |
276 | #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) | 289 | #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) |
277 | 290 | ||
@@ -285,6 +298,7 @@ static struct regulator_consumer_supply goni_ldo5_consumers[] = { | |||
285 | 298 | ||
286 | static struct regulator_consumer_supply goni_ldo8_consumers[] = { | 299 | static struct regulator_consumer_supply goni_ldo8_consumers[] = { |
287 | REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), | 300 | REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), |
301 | REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"), | ||
288 | }; | 302 | }; |
289 | 303 | ||
290 | static struct regulator_consumer_supply goni_ldo11_consumers[] = { | 304 | static struct regulator_consumer_supply goni_ldo11_consumers[] = { |
@@ -475,6 +489,10 @@ static struct regulator_consumer_supply buck1_consumer = | |||
475 | static struct regulator_consumer_supply buck2_consumer = | 489 | static struct regulator_consumer_supply buck2_consumer = |
476 | REGULATOR_SUPPLY("vddint", NULL); | 490 | REGULATOR_SUPPLY("vddint", NULL); |
477 | 491 | ||
492 | static struct regulator_consumer_supply buck3_consumer = | ||
493 | REGULATOR_SUPPLY("vdet", "s5p-sdo"); | ||
494 | |||
495 | |||
478 | static struct regulator_init_data goni_buck1_data = { | 496 | static struct regulator_init_data goni_buck1_data = { |
479 | .constraints = { | 497 | .constraints = { |
480 | .name = "VARM_1.2V", | 498 | .name = "VARM_1.2V", |
@@ -511,6 +529,8 @@ static struct regulator_init_data goni_buck3_data = { | |||
511 | .enabled = 1, | 529 | .enabled = 1, |
512 | }, | 530 | }, |
513 | }, | 531 | }, |
532 | .num_consumer_supplies = 1, | ||
533 | .consumer_supplies = &buck3_consumer, | ||
514 | }; | 534 | }; |
515 | 535 | ||
516 | static struct regulator_init_data goni_buck4_data = { | 536 | static struct regulator_init_data goni_buck4_data = { |
@@ -801,6 +821,34 @@ static void goni_setup_sdhci(void) | |||
801 | s3c_sdhci2_set_platdata(&goni_hsmmc2_data); | 821 | s3c_sdhci2_set_platdata(&goni_hsmmc2_data); |
802 | }; | 822 | }; |
803 | 823 | ||
824 | static struct noon010pc30_platform_data noon010pc30_pldata = { | ||
825 | .clk_rate = 16000000UL, | ||
826 | .gpio_nreset = S5PV210_GPB(2), /* CAM_CIF_NRST */ | ||
827 | .gpio_nstby = S5PV210_GPB(0), /* CAM_CIF_NSTBY */ | ||
828 | }; | ||
829 | |||
830 | static struct i2c_board_info noon010pc30_board_info = { | ||
831 | I2C_BOARD_INFO("NOON010PC30", 0x60 >> 1), | ||
832 | .platform_data = &noon010pc30_pldata, | ||
833 | }; | ||
834 | |||
835 | static struct s5p_fimc_isp_info goni_camera_sensors[] = { | ||
836 | { | ||
837 | .mux_id = 0, | ||
838 | .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | | ||
839 | V4L2_MBUS_VSYNC_ACTIVE_LOW, | ||
840 | .bus_type = FIMC_ITU_601, | ||
841 | .board_info = &noon010pc30_board_info, | ||
842 | .i2c_bus_num = 0, | ||
843 | .clk_frequency = 16000000UL, | ||
844 | }, | ||
845 | }; | ||
846 | |||
847 | struct s5p_platform_fimc goni_fimc_md_platdata __initdata = { | ||
848 | .isp_info = goni_camera_sensors, | ||
849 | .num_clients = ARRAY_SIZE(goni_camera_sensors), | ||
850 | }; | ||
851 | |||
804 | static struct platform_device *goni_devices[] __initdata = { | 852 | static struct platform_device *goni_devices[] __initdata = { |
805 | &s3c_device_fb, | 853 | &s3c_device_fb, |
806 | &s5p_device_onenand, | 854 | &s5p_device_onenand, |
@@ -812,10 +860,13 @@ static struct platform_device *goni_devices[] __initdata = { | |||
812 | &s5p_device_mfc, | 860 | &s5p_device_mfc, |
813 | &s5p_device_mfc_l, | 861 | &s5p_device_mfc_l, |
814 | &s5p_device_mfc_r, | 862 | &s5p_device_mfc_r, |
863 | &s5p_device_mixer, | ||
864 | &s5p_device_sdo, | ||
815 | &s3c_device_i2c0, | 865 | &s3c_device_i2c0, |
816 | &s5p_device_fimc0, | 866 | &s5p_device_fimc0, |
817 | &s5p_device_fimc1, | 867 | &s5p_device_fimc1, |
818 | &s5p_device_fimc2, | 868 | &s5p_device_fimc2, |
869 | &s5p_device_fimc_md, | ||
819 | &s3c_device_hsmmc0, | 870 | &s3c_device_hsmmc0, |
820 | &s3c_device_hsmmc1, | 871 | &s3c_device_hsmmc1, |
821 | &s3c_device_hsmmc2, | 872 | &s3c_device_hsmmc2, |
@@ -884,6 +935,12 @@ static void __init goni_machine_init(void) | |||
884 | /* FB */ | 935 | /* FB */ |
885 | s3c_fb_set_platdata(&goni_lcd_pdata); | 936 | s3c_fb_set_platdata(&goni_lcd_pdata); |
886 | 937 | ||
938 | /* FIMC */ | ||
939 | s3c_set_platdata(&goni_fimc_md_platdata, sizeof(goni_fimc_md_platdata), | ||
940 | &s5p_device_fimc_md); | ||
941 | |||
942 | goni_camera_init(); | ||
943 | |||
887 | /* SPI */ | 944 | /* SPI */ |
888 | spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); | 945 | spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); |
889 | 946 | ||
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c index a83b6c909f6..6b8ccc4d35f 100644 --- a/arch/arm/mach-s5pv210/setup-sdhci.c +++ b/arch/arm/mach-s5pv210/setup-sdhci.c | |||
@@ -10,17 +10,7 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/types.h> | 13 | #include <linux/types.h> |
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/io.h> | ||
18 | |||
19 | #include <linux/mmc/card.h> | ||
20 | #include <linux/mmc/host.h> | ||
21 | |||
22 | #include <plat/regs-sdhci.h> | ||
23 | #include <plat/sdhci.h> | ||
24 | 14 | ||
25 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | 15 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ |
26 | 16 | ||
@@ -30,34 +20,3 @@ char *s5pv210_hsmmc_clksrcs[4] = { | |||
30 | [2] = "sclk_mmc", /* mmc_bus */ | 20 | [2] = "sclk_mmc", /* mmc_bus */ |
31 | /* [3] = NULL, - reserved */ | 21 | /* [3] = NULL, - reserved */ |
32 | }; | 22 | }; |
33 | |||
34 | void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | ||
35 | void __iomem *r, | ||
36 | struct mmc_ios *ios, | ||
37 | struct mmc_card *card) | ||
38 | { | ||
39 | u32 ctrl2, ctrl3; | ||
40 | |||
41 | /* don't need to alter anything according to card-type */ | ||
42 | |||
43 | writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); | ||
44 | |||
45 | ctrl2 = readl(r + S3C_SDHCI_CONTROL2); | ||
46 | ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; | ||
47 | ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | | ||
48 | S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | | ||
49 | S3C_SDHCI_CTRL2_ENFBCLKRX | | ||
50 | S3C_SDHCI_CTRL2_DFCNT_NONE | | ||
51 | S3C_SDHCI_CTRL2_ENCLKOUTHOLD); | ||
52 | |||
53 | if (ios->clock < 25 * 1000000) | ||
54 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | | ||
55 | S3C_SDHCI_CTRL3_FCSEL2 | | ||
56 | S3C_SDHCI_CTRL3_FCSEL1 | | ||
57 | S3C_SDHCI_CTRL3_FCSEL0); | ||
58 | else | ||
59 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); | ||
60 | |||
61 | writel(ctrl2, r + S3C_SDHCI_CONTROL2); | ||
62 | writel(ctrl3, r + S3C_SDHCI_CONTROL3); | ||
63 | } | ||
diff --git a/arch/arm/mach-s5pv210/sleep.S b/arch/arm/mach-s5pv210/sleep.S deleted file mode 100644 index e3452ccd4b0..00000000000 --- a/arch/arm/mach-s5pv210/sleep.S +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s5p/sleep.S | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5PV210 power Manager (Suspend-To-RAM) support | ||
7 | * Based on S3C2410 sleep code by: | ||
8 | * Ben Dooks, (c) 2004 Simtec Electronics | ||
9 | * | ||
10 | * Based on PXA/SA1100 sleep code by: | ||
11 | * Nicolas Pitre, (c) 2002 Monta Vista Software Inc | ||
12 | * Cliff Brake, (c) 2001 | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation; either version 2 of the License, or | ||
17 | * (at your option) any later version. | ||
18 | * | ||
19 | * This program is distributed in the hope that it will be useful, | ||
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
22 | * GNU General Public License for more details. | ||
23 | * | ||
24 | * You should have received a copy of the GNU General Public License | ||
25 | * along with this program; if not, write to the Free Software | ||
26 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
27 | */ | ||
28 | |||
29 | #include <linux/linkage.h> | ||
30 | #include <asm/assembler.h> | ||
31 | #include <asm/memory.h> | ||
32 | |||
33 | .text | ||
34 | |||
35 | /* sleep magic, to allow the bootloader to check for an valid | ||
36 | * image to resume to. Must be the first word before the | ||
37 | * s3c_cpu_resume entry. | ||
38 | */ | ||
39 | |||
40 | .word 0x2bedf00d | ||
41 | |||
42 | /* s3c_cpu_resume | ||
43 | * | ||
44 | * resume code entry for bootloader to call | ||
45 | * | ||
46 | * we must put this code here in the data segment as we have no | ||
47 | * other way of restoring the stack pointer after sleep, and we | ||
48 | * must not write to the code segment (code is read-only) | ||
49 | */ | ||
50 | |||
51 | ENTRY(s3c_cpu_resume) | ||
52 | b cpu_resume | ||
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c index bd3e1bfdd6a..2965cc9d424 100644 --- a/arch/arm/mach-sa1100/collie.c +++ b/arch/arm/mach-sa1100/collie.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
32 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
33 | #include <asm/irq.h> | 33 | #include <asm/irq.h> |
34 | #include <asm/page.h> | ||
34 | #include <asm/setup.h> | 35 | #include <asm/setup.h> |
35 | #include <mach/collie.h> | 36 | #include <mach/collie.h> |
36 | 37 | ||
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c index 0bb520d48ed..77198fe02bc 100644 --- a/arch/arm/mach-sa1100/jornada720.c +++ b/arch/arm/mach-sa1100/jornada720.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
27 | #include <asm/hardware/sa1111.h> | 27 | #include <asm/hardware/sa1111.h> |
28 | #include <asm/irq.h> | 28 | #include <asm/irq.h> |
29 | #include <asm/page.h> | ||
29 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
30 | #include <asm/setup.h> | 31 | #include <asm/setup.h> |
31 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 0c8f6cf3e94..0828fab2b65 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig | |||
@@ -26,6 +26,7 @@ config ARCH_SH73A0 | |||
26 | select SH_CLK_CPG | 26 | select SH_CLK_CPG |
27 | select ARCH_WANT_OPTIONAL_GPIOLIB | 27 | select ARCH_WANT_OPTIONAL_GPIOLIB |
28 | select ARM_GIC | 28 | select ARM_GIC |
29 | select I2C | ||
29 | 30 | ||
30 | comment "SH-Mobile Board Type" | 31 | comment "SH-Mobile Board Type" |
31 | 32 | ||
@@ -69,6 +70,11 @@ config MACH_MACKEREL | |||
69 | depends on ARCH_SH7372 | 70 | depends on ARCH_SH7372 |
70 | select ARCH_REQUIRE_GPIOLIB | 71 | select ARCH_REQUIRE_GPIOLIB |
71 | 72 | ||
73 | config MACH_KOTA2 | ||
74 | bool "KOTA2 board" | ||
75 | select ARCH_REQUIRE_GPIOLIB | ||
76 | depends on ARCH_SH73A0 | ||
77 | |||
72 | comment "SH-Mobile System Configuration" | 78 | comment "SH-Mobile System Configuration" |
73 | 79 | ||
74 | menu "Memory configuration" | 80 | menu "Memory configuration" |
@@ -78,6 +84,7 @@ config MEMORY_START | |||
78 | default "0x50000000" if MACH_G3EVM | 84 | default "0x50000000" if MACH_G3EVM |
79 | default "0x40000000" if MACH_G4EVM || MACH_AP4EVB || MACH_AG5EVM || \ | 85 | default "0x40000000" if MACH_G4EVM || MACH_AP4EVB || MACH_AG5EVM || \ |
80 | MACH_MACKEREL | 86 | MACH_MACKEREL |
87 | default "0x41000000" if MACH_KOTA2 | ||
81 | default "0x00000000" | 88 | default "0x00000000" |
82 | ---help--- | 89 | ---help--- |
83 | Tweak this only when porting to a new machine which does not | 90 | Tweak this only when porting to a new machine which does not |
@@ -89,6 +96,7 @@ config MEMORY_SIZE | |||
89 | default "0x08000000" if MACH_G3EVM | 96 | default "0x08000000" if MACH_G3EVM |
90 | default "0x08000000" if MACH_G4EVM | 97 | default "0x08000000" if MACH_G4EVM |
91 | default "0x20000000" if MACH_AG5EVM | 98 | default "0x20000000" if MACH_AG5EVM |
99 | default "0x1e000000" if MACH_KOTA2 | ||
92 | default "0x10000000" if MACH_AP4EVB || MACH_MACKEREL | 100 | default "0x10000000" if MACH_AP4EVB || MACH_MACKEREL |
93 | default "0x04000000" | 101 | default "0x04000000" |
94 | help | 102 | help |
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 612b27000c3..2aec2f73251 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile | |||
@@ -41,6 +41,7 @@ obj-$(CONFIG_MACH_G4EVM) += board-g4evm.o | |||
41 | obj-$(CONFIG_MACH_AP4EVB) += board-ap4evb.o | 41 | obj-$(CONFIG_MACH_AP4EVB) += board-ap4evb.o |
42 | obj-$(CONFIG_MACH_AG5EVM) += board-ag5evm.o | 42 | obj-$(CONFIG_MACH_AG5EVM) += board-ag5evm.o |
43 | obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o | 43 | obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o |
44 | obj-$(CONFIG_MACH_KOTA2) += board-kota2.o | ||
44 | 45 | ||
45 | # Framework support | 46 | # Framework support |
46 | obj-$(CONFIG_SMP) += $(smp-y) | 47 | obj-$(CONFIG_SMP) += $(smp-y) |
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index 475342bcc95..83624e26b88 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c | |||
@@ -59,7 +59,7 @@ static struct resource smsc9220_resources[] = { | |||
59 | .flags = IORESOURCE_MEM, | 59 | .flags = IORESOURCE_MEM, |
60 | }, | 60 | }, |
61 | [1] = { | 61 | [1] = { |
62 | .start = gic_spi(33), /* PINT1 */ | 62 | .start = SH73A0_PINT0_IRQ(2), /* PINTA2 */ |
63 | .flags = IORESOURCE_IRQ, | 63 | .flags = IORESOURCE_IRQ, |
64 | }, | 64 | }, |
65 | }; | 65 | }; |
@@ -339,6 +339,18 @@ static struct platform_device mipidsi0_device = { | |||
339 | }, | 339 | }, |
340 | }; | 340 | }; |
341 | 341 | ||
342 | /* SDHI0 */ | ||
343 | static irqreturn_t ag5evm_sdhi0_gpio_cd(int irq, void *arg) | ||
344 | { | ||
345 | struct device *dev = arg; | ||
346 | struct sh_mobile_sdhi_info *info = dev->platform_data; | ||
347 | struct tmio_mmc_data *pdata = info->pdata; | ||
348 | |||
349 | tmio_mmc_cd_wakeup(pdata); | ||
350 | |||
351 | return IRQ_HANDLED; | ||
352 | } | ||
353 | |||
342 | static struct sh_mobile_sdhi_info sdhi0_info = { | 354 | static struct sh_mobile_sdhi_info sdhi0_info = { |
343 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, | 355 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, |
344 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, | 356 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, |
@@ -462,19 +474,6 @@ static void __init ag5evm_map_io(void) | |||
462 | shmobile_setup_console(); | 474 | shmobile_setup_console(); |
463 | } | 475 | } |
464 | 476 | ||
465 | #define PINTC_ADDR 0xe6900000 | ||
466 | #define PINTER0A (PINTC_ADDR + 0xa0) | ||
467 | #define PINTCR0A (PINTC_ADDR + 0xb0) | ||
468 | |||
469 | void __init ag5evm_init_irq(void) | ||
470 | { | ||
471 | sh73a0_init_irq(); | ||
472 | |||
473 | /* setup PINT: enable PINTA2 as active low */ | ||
474 | __raw_writel(__raw_readl(PINTER0A) | (1<<29), PINTER0A); | ||
475 | __raw_writew(__raw_readw(PINTCR0A) | (2<<10), PINTCR0A); | ||
476 | } | ||
477 | |||
478 | #define DSI0PHYCR 0xe615006c | 477 | #define DSI0PHYCR 0xe615006c |
479 | 478 | ||
480 | static void __init ag5evm_init(void) | 479 | static void __init ag5evm_init(void) |
@@ -570,6 +569,13 @@ static void __init ag5evm_init(void) | |||
570 | gpio_request(GPIO_FN_SDHID0_1, NULL); | 569 | gpio_request(GPIO_FN_SDHID0_1, NULL); |
571 | gpio_request(GPIO_FN_SDHID0_0, NULL); | 570 | gpio_request(GPIO_FN_SDHID0_0, NULL); |
572 | 571 | ||
572 | if (!request_irq(intcs_evt2irq(0x3c0), ag5evm_sdhi0_gpio_cd, | ||
573 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, | ||
574 | "sdhi0 cd", &sdhi0_device.dev)) | ||
575 | sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD; | ||
576 | else | ||
577 | pr_warn("Unable to setup SDHI0 GPIO IRQ\n"); | ||
578 | |||
573 | /* enable SDHI1 on CN4 [WLAN I/F] */ | 579 | /* enable SDHI1 on CN4 [WLAN I/F] */ |
574 | gpio_request(GPIO_FN_SDHICLK1, NULL); | 580 | gpio_request(GPIO_FN_SDHICLK1, NULL); |
575 | gpio_request(GPIO_FN_SDHICMD1_PU, NULL); | 581 | gpio_request(GPIO_FN_SDHICMD1_PU, NULL); |
@@ -601,7 +607,7 @@ struct sys_timer ag5evm_timer = { | |||
601 | 607 | ||
602 | MACHINE_START(AG5EVM, "ag5evm") | 608 | MACHINE_START(AG5EVM, "ag5evm") |
603 | .map_io = ag5evm_map_io, | 609 | .map_io = ag5evm_map_io, |
604 | .init_irq = ag5evm_init_irq, | 610 | .init_irq = sh73a0_init_irq, |
605 | .handle_irq = shmobile_handle_irq_gic, | 611 | .handle_irq = shmobile_handle_irq_gic, |
606 | .init_machine = ag5evm_init, | 612 | .init_machine = ag5evm_init, |
607 | .timer = &ag5evm_timer, | 613 | .timer = &ag5evm_timer, |
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index 5b7edadf464..a3aa0f6df96 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c | |||
@@ -200,8 +200,8 @@ static struct physmap_flash_data nor_flash_data = { | |||
200 | 200 | ||
201 | static struct resource nor_flash_resources[] = { | 201 | static struct resource nor_flash_resources[] = { |
202 | [0] = { | 202 | [0] = { |
203 | .start = 0x00000000, | 203 | .start = 0x20000000, /* CS0 shadow instead of regular CS0 */ |
204 | .end = 0x08000000 - 1, | 204 | .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */ |
205 | .flags = IORESOURCE_MEM, | 205 | .flags = IORESOURCE_MEM, |
206 | } | 206 | } |
207 | }; | 207 | }; |
@@ -933,7 +933,7 @@ static struct platform_device ap4evb_camera = { | |||
933 | static struct sh_csi2_client_config csi2_clients[] = { | 933 | static struct sh_csi2_client_config csi2_clients[] = { |
934 | { | 934 | { |
935 | .phy = SH_CSI2_PHY_MAIN, | 935 | .phy = SH_CSI2_PHY_MAIN, |
936 | .lanes = 3, | 936 | .lanes = 0, /* default: 2 lanes */ |
937 | .channel = 0, | 937 | .channel = 0, |
938 | .pdev = &ap4evb_camera, | 938 | .pdev = &ap4evb_camera, |
939 | }, | 939 | }, |
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c new file mode 100644 index 00000000000..adc73122bf2 --- /dev/null +++ b/arch/arm/mach-shmobile/board-kota2.c | |||
@@ -0,0 +1,447 @@ | |||
1 | /* | ||
2 | * kota2 board support | ||
3 | * | ||
4 | * Copyright (C) 2011 Renesas Solutions Corp. | ||
5 | * Copyright (C) 2011 Magnus Damm | ||
6 | * Copyright (C) 2010 Takashi Yoshii <yoshii.takashi.zj@renesas.com> | ||
7 | * Copyright (C) 2009 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; version 2 of the License. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
21 | */ | ||
22 | |||
23 | #include <linux/kernel.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/interrupt.h> | ||
26 | #include <linux/irq.h> | ||
27 | #include <linux/platform_device.h> | ||
28 | #include <linux/delay.h> | ||
29 | #include <linux/io.h> | ||
30 | #include <linux/smsc911x.h> | ||
31 | #include <linux/gpio.h> | ||
32 | #include <linux/input.h> | ||
33 | #include <linux/input/sh_keysc.h> | ||
34 | #include <linux/gpio_keys.h> | ||
35 | #include <linux/leds.h> | ||
36 | #include <linux/mmc/host.h> | ||
37 | #include <linux/mmc/sh_mmcif.h> | ||
38 | #include <linux/mfd/tmio.h> | ||
39 | #include <linux/mmc/sh_mobile_sdhi.h> | ||
40 | #include <mach/hardware.h> | ||
41 | #include <mach/sh73a0.h> | ||
42 | #include <mach/common.h> | ||
43 | #include <asm/mach-types.h> | ||
44 | #include <asm/mach/arch.h> | ||
45 | #include <asm/mach/map.h> | ||
46 | #include <asm/mach/time.h> | ||
47 | #include <asm/hardware/gic.h> | ||
48 | #include <asm/hardware/cache-l2x0.h> | ||
49 | #include <asm/traps.h> | ||
50 | |||
51 | static struct resource smsc9220_resources[] = { | ||
52 | [0] = { | ||
53 | .start = 0x14000000, /* CS5A */ | ||
54 | .end = 0x140000ff, /* A1->A7 */ | ||
55 | .flags = IORESOURCE_MEM, | ||
56 | }, | ||
57 | [1] = { | ||
58 | .start = gic_spi(33), /* PINTA2 @ PORT144 */ | ||
59 | .flags = IORESOURCE_IRQ, | ||
60 | }, | ||
61 | }; | ||
62 | |||
63 | static struct smsc911x_platform_config smsc9220_platdata = { | ||
64 | .flags = SMSC911X_USE_32BIT, /* 32-bit SW on 16-bit HW bus */ | ||
65 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
66 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
67 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | ||
68 | }; | ||
69 | |||
70 | static struct platform_device eth_device = { | ||
71 | .name = "smsc911x", | ||
72 | .id = 0, | ||
73 | .dev = { | ||
74 | .platform_data = &smsc9220_platdata, | ||
75 | }, | ||
76 | .resource = smsc9220_resources, | ||
77 | .num_resources = ARRAY_SIZE(smsc9220_resources), | ||
78 | }; | ||
79 | |||
80 | static struct sh_keysc_info keysc_platdata = { | ||
81 | .mode = SH_KEYSC_MODE_6, | ||
82 | .scan_timing = 3, | ||
83 | .delay = 100, | ||
84 | .keycodes = { | ||
85 | KEY_NUMERIC_STAR, KEY_NUMERIC_0, KEY_NUMERIC_POUND, | ||
86 | 0, 0, 0, 0, 0, | ||
87 | KEY_NUMERIC_7, KEY_NUMERIC_8, KEY_NUMERIC_9, | ||
88 | 0, KEY_DOWN, 0, 0, 0, | ||
89 | KEY_NUMERIC_4, KEY_NUMERIC_5, KEY_NUMERIC_6, | ||
90 | KEY_LEFT, KEY_ENTER, KEY_RIGHT, 0, 0, | ||
91 | KEY_NUMERIC_1, KEY_NUMERIC_2, KEY_NUMERIC_3, | ||
92 | 0, KEY_UP, 0, 0, 0, | ||
93 | 0, 0, 0, 0, 0, 0, 0, 0, | ||
94 | 0, 0, 0, 0, 0, 0, 0, 0, | ||
95 | 0, 0, 0, 0, 0, 0, 0, 0, | ||
96 | 0, 0, 0, 0, 0, 0, 0, 0, | ||
97 | }, | ||
98 | }; | ||
99 | |||
100 | static struct resource keysc_resources[] = { | ||
101 | [0] = { | ||
102 | .name = "KEYSC", | ||
103 | .start = 0xe61b0000, | ||
104 | .end = 0xe61b0098 - 1, | ||
105 | .flags = IORESOURCE_MEM, | ||
106 | }, | ||
107 | [1] = { | ||
108 | .start = gic_spi(71), | ||
109 | .flags = IORESOURCE_IRQ, | ||
110 | }, | ||
111 | }; | ||
112 | |||
113 | static struct platform_device keysc_device = { | ||
114 | .name = "sh_keysc", | ||
115 | .id = 0, | ||
116 | .num_resources = ARRAY_SIZE(keysc_resources), | ||
117 | .resource = keysc_resources, | ||
118 | .dev = { | ||
119 | .platform_data = &keysc_platdata, | ||
120 | }, | ||
121 | }; | ||
122 | |||
123 | #define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 } | ||
124 | |||
125 | static struct gpio_keys_button gpio_buttons[] = { | ||
126 | GPIO_KEY(KEY_VOLUMEUP, GPIO_PORT56, "+"), /* S2: VOL+ [IRQ9] */ | ||
127 | GPIO_KEY(KEY_VOLUMEDOWN, GPIO_PORT54, "-"), /* S3: VOL- [IRQ10] */ | ||
128 | GPIO_KEY(KEY_MENU, GPIO_PORT27, "Menu"), /* S4: MENU [IRQ30] */ | ||
129 | GPIO_KEY(KEY_HOMEPAGE, GPIO_PORT26, "Home"), /* S5: HOME [IRQ31] */ | ||
130 | GPIO_KEY(KEY_BACK, GPIO_PORT11, "Back"), /* S6: BACK [IRQ0] */ | ||
131 | GPIO_KEY(KEY_PHONE, GPIO_PORT238, "Tel"), /* S7: TEL [IRQ11] */ | ||
132 | GPIO_KEY(KEY_POWER, GPIO_PORT239, "C1"), /* S8: CAM [IRQ13] */ | ||
133 | GPIO_KEY(KEY_MAIL, GPIO_PORT224, "Mail"), /* S9: MAIL [IRQ3] */ | ||
134 | /* Omitted button "C3?": GPIO_PORT223 - S10: CUST [IRQ8] */ | ||
135 | GPIO_KEY(KEY_CAMERA, GPIO_PORT164, "C2"), /* S11: CAM_HALF [IRQ25] */ | ||
136 | /* Omitted button "?": GPIO_PORT152 - S12: CAM_FULL [No IRQ] */ | ||
137 | }; | ||
138 | |||
139 | static struct gpio_keys_platform_data gpio_key_info = { | ||
140 | .buttons = gpio_buttons, | ||
141 | .nbuttons = ARRAY_SIZE(gpio_buttons), | ||
142 | .poll_interval = 250, /* polled for now */ | ||
143 | }; | ||
144 | |||
145 | static struct platform_device gpio_keys_device = { | ||
146 | .name = "gpio-keys-polled", /* polled for now */ | ||
147 | .id = -1, | ||
148 | .dev = { | ||
149 | .platform_data = &gpio_key_info, | ||
150 | }, | ||
151 | }; | ||
152 | |||
153 | #define GPIO_LED(n, g) { .name = n, .gpio = g } | ||
154 | |||
155 | static struct gpio_led gpio_leds[] = { | ||
156 | GPIO_LED("V2513", GPIO_PORT153), /* PORT153 [TPU1T02] -> V2513 */ | ||
157 | GPIO_LED("V2514", GPIO_PORT199), /* PORT199 [TPU4TO1] -> V2514 */ | ||
158 | GPIO_LED("V2515", GPIO_PORT197), /* PORT197 [TPU2TO1] -> V2515 */ | ||
159 | GPIO_LED("KEYLED", GPIO_PORT163), /* PORT163 [TPU3TO0] -> KEYLED */ | ||
160 | GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */ | ||
161 | GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */ | ||
162 | GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */ | ||
163 | }; | ||
164 | |||
165 | static struct gpio_led_platform_data gpio_leds_info = { | ||
166 | .leds = gpio_leds, | ||
167 | .num_leds = ARRAY_SIZE(gpio_leds), | ||
168 | }; | ||
169 | |||
170 | static struct platform_device gpio_leds_device = { | ||
171 | .name = "leds-gpio", | ||
172 | .id = -1, | ||
173 | .dev = { | ||
174 | .platform_data = &gpio_leds_info, | ||
175 | }, | ||
176 | }; | ||
177 | |||
178 | static struct resource mmcif_resources[] = { | ||
179 | [0] = { | ||
180 | .name = "MMCIF", | ||
181 | .start = 0xe6bd0000, | ||
182 | .end = 0xe6bd00ff, | ||
183 | .flags = IORESOURCE_MEM, | ||
184 | }, | ||
185 | [1] = { | ||
186 | .start = gic_spi(140), | ||
187 | .flags = IORESOURCE_IRQ, | ||
188 | }, | ||
189 | [2] = { | ||
190 | .start = gic_spi(141), | ||
191 | .flags = IORESOURCE_IRQ, | ||
192 | }, | ||
193 | }; | ||
194 | |||
195 | static struct sh_mmcif_plat_data mmcif_info = { | ||
196 | .ocr = MMC_VDD_165_195, | ||
197 | .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, | ||
198 | }; | ||
199 | |||
200 | static struct platform_device mmcif_device = { | ||
201 | .name = "sh_mmcif", | ||
202 | .id = 0, | ||
203 | .dev = { | ||
204 | .platform_data = &mmcif_info, | ||
205 | }, | ||
206 | .num_resources = ARRAY_SIZE(mmcif_resources), | ||
207 | .resource = mmcif_resources, | ||
208 | }; | ||
209 | |||
210 | static struct sh_mobile_sdhi_info sdhi0_info = { | ||
211 | .tmio_caps = MMC_CAP_SD_HIGHSPEED, | ||
212 | .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT, | ||
213 | }; | ||
214 | |||
215 | static struct resource sdhi0_resources[] = { | ||
216 | [0] = { | ||
217 | .name = "SDHI0", | ||
218 | .start = 0xee100000, | ||
219 | .end = 0xee1000ff, | ||
220 | .flags = IORESOURCE_MEM, | ||
221 | }, | ||
222 | [1] = { | ||
223 | .start = gic_spi(83), | ||
224 | .flags = IORESOURCE_IRQ, | ||
225 | }, | ||
226 | [2] = { | ||
227 | .start = gic_spi(84), | ||
228 | .flags = IORESOURCE_IRQ, | ||
229 | }, | ||
230 | [3] = { | ||
231 | .start = gic_spi(85), | ||
232 | .flags = IORESOURCE_IRQ, | ||
233 | }, | ||
234 | }; | ||
235 | |||
236 | static struct platform_device sdhi0_device = { | ||
237 | .name = "sh_mobile_sdhi", | ||
238 | .id = 0, | ||
239 | .num_resources = ARRAY_SIZE(sdhi0_resources), | ||
240 | .resource = sdhi0_resources, | ||
241 | .dev = { | ||
242 | .platform_data = &sdhi0_info, | ||
243 | }, | ||
244 | }; | ||
245 | |||
246 | static struct sh_mobile_sdhi_info sdhi1_info = { | ||
247 | .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ, | ||
248 | .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT, | ||
249 | }; | ||
250 | |||
251 | static struct resource sdhi1_resources[] = { | ||
252 | [0] = { | ||
253 | .name = "SDHI1", | ||
254 | .start = 0xee120000, | ||
255 | .end = 0xee1200ff, | ||
256 | .flags = IORESOURCE_MEM, | ||
257 | }, | ||
258 | [1] = { | ||
259 | .start = gic_spi(87), | ||
260 | .flags = IORESOURCE_IRQ, | ||
261 | }, | ||
262 | [2] = { | ||
263 | .start = gic_spi(88), | ||
264 | .flags = IORESOURCE_IRQ, | ||
265 | }, | ||
266 | [3] = { | ||
267 | .start = gic_spi(89), | ||
268 | .flags = IORESOURCE_IRQ, | ||
269 | }, | ||
270 | }; | ||
271 | |||
272 | static struct platform_device sdhi1_device = { | ||
273 | .name = "sh_mobile_sdhi", | ||
274 | .id = 1, | ||
275 | .num_resources = ARRAY_SIZE(sdhi1_resources), | ||
276 | .resource = sdhi1_resources, | ||
277 | .dev = { | ||
278 | .platform_data = &sdhi1_info, | ||
279 | }, | ||
280 | }; | ||
281 | |||
282 | static struct platform_device *kota2_devices[] __initdata = { | ||
283 | ð_device, | ||
284 | &keysc_device, | ||
285 | &gpio_keys_device, | ||
286 | &gpio_leds_device, | ||
287 | &mmcif_device, | ||
288 | &sdhi0_device, | ||
289 | &sdhi1_device, | ||
290 | }; | ||
291 | |||
292 | static struct map_desc kota2_io_desc[] __initdata = { | ||
293 | /* create a 1:1 entity map for 0xe6xxxxxx | ||
294 | * used by CPGA, INTC and PFC. | ||
295 | */ | ||
296 | { | ||
297 | .virtual = 0xe6000000, | ||
298 | .pfn = __phys_to_pfn(0xe6000000), | ||
299 | .length = 256 << 20, | ||
300 | .type = MT_DEVICE_NONSHARED | ||
301 | }, | ||
302 | }; | ||
303 | |||
304 | static void __init kota2_map_io(void) | ||
305 | { | ||
306 | iotable_init(kota2_io_desc, ARRAY_SIZE(kota2_io_desc)); | ||
307 | |||
308 | /* setup early devices and console here as well */ | ||
309 | sh73a0_add_early_devices(); | ||
310 | shmobile_setup_console(); | ||
311 | } | ||
312 | |||
313 | #define PINTER0A 0xe69000a0 | ||
314 | #define PINTCR0A 0xe69000b0 | ||
315 | |||
316 | void __init kota2_init_irq(void) | ||
317 | { | ||
318 | sh73a0_init_irq(); | ||
319 | |||
320 | /* setup PINT: enable PINTA2 as active low */ | ||
321 | __raw_writel(1 << 29, PINTER0A); | ||
322 | __raw_writew(2 << 10, PINTCR0A); | ||
323 | } | ||
324 | |||
325 | static void __init kota2_init(void) | ||
326 | { | ||
327 | sh73a0_pinmux_init(); | ||
328 | |||
329 | /* SCIFA2 (UART2) */ | ||
330 | gpio_request(GPIO_FN_SCIFA2_TXD1, NULL); | ||
331 | gpio_request(GPIO_FN_SCIFA2_RXD1, NULL); | ||
332 | gpio_request(GPIO_FN_SCIFA2_RTS1_, NULL); | ||
333 | gpio_request(GPIO_FN_SCIFA2_CTS1_, NULL); | ||
334 | |||
335 | /* SCIFA4 (UART1) */ | ||
336 | gpio_request(GPIO_FN_SCIFA4_TXD, NULL); | ||
337 | gpio_request(GPIO_FN_SCIFA4_RXD, NULL); | ||
338 | gpio_request(GPIO_FN_SCIFA4_RTS_, NULL); | ||
339 | gpio_request(GPIO_FN_SCIFA4_CTS_, NULL); | ||
340 | |||
341 | /* SMSC911X */ | ||
342 | gpio_request(GPIO_FN_D0_NAF0, NULL); | ||
343 | gpio_request(GPIO_FN_D1_NAF1, NULL); | ||
344 | gpio_request(GPIO_FN_D2_NAF2, NULL); | ||
345 | gpio_request(GPIO_FN_D3_NAF3, NULL); | ||
346 | gpio_request(GPIO_FN_D4_NAF4, NULL); | ||
347 | gpio_request(GPIO_FN_D5_NAF5, NULL); | ||
348 | gpio_request(GPIO_FN_D6_NAF6, NULL); | ||
349 | gpio_request(GPIO_FN_D7_NAF7, NULL); | ||
350 | gpio_request(GPIO_FN_D8_NAF8, NULL); | ||
351 | gpio_request(GPIO_FN_D9_NAF9, NULL); | ||
352 | gpio_request(GPIO_FN_D10_NAF10, NULL); | ||
353 | gpio_request(GPIO_FN_D11_NAF11, NULL); | ||
354 | gpio_request(GPIO_FN_D12_NAF12, NULL); | ||
355 | gpio_request(GPIO_FN_D13_NAF13, NULL); | ||
356 | gpio_request(GPIO_FN_D14_NAF14, NULL); | ||
357 | gpio_request(GPIO_FN_D15_NAF15, NULL); | ||
358 | gpio_request(GPIO_FN_CS5A_, NULL); | ||
359 | gpio_request(GPIO_FN_WE0__FWE, NULL); | ||
360 | gpio_request(GPIO_PORT144, NULL); /* PINTA2 */ | ||
361 | gpio_direction_input(GPIO_PORT144); | ||
362 | gpio_request(GPIO_PORT145, NULL); /* RESET */ | ||
363 | gpio_direction_output(GPIO_PORT145, 1); | ||
364 | |||
365 | /* KEYSC */ | ||
366 | gpio_request(GPIO_FN_KEYIN0_PU, NULL); | ||
367 | gpio_request(GPIO_FN_KEYIN1_PU, NULL); | ||
368 | gpio_request(GPIO_FN_KEYIN2_PU, NULL); | ||
369 | gpio_request(GPIO_FN_KEYIN3_PU, NULL); | ||
370 | gpio_request(GPIO_FN_KEYIN4_PU, NULL); | ||
371 | gpio_request(GPIO_FN_KEYIN5_PU, NULL); | ||
372 | gpio_request(GPIO_FN_KEYIN6_PU, NULL); | ||
373 | gpio_request(GPIO_FN_KEYIN7_PU, NULL); | ||
374 | gpio_request(GPIO_FN_KEYOUT0, NULL); | ||
375 | gpio_request(GPIO_FN_KEYOUT1, NULL); | ||
376 | gpio_request(GPIO_FN_KEYOUT2, NULL); | ||
377 | gpio_request(GPIO_FN_KEYOUT3, NULL); | ||
378 | gpio_request(GPIO_FN_KEYOUT4, NULL); | ||
379 | gpio_request(GPIO_FN_KEYOUT5, NULL); | ||
380 | gpio_request(GPIO_FN_PORT59_KEYOUT6, NULL); | ||
381 | gpio_request(GPIO_FN_PORT58_KEYOUT7, NULL); | ||
382 | gpio_request(GPIO_FN_KEYOUT8, NULL); | ||
383 | |||
384 | /* MMCIF */ | ||
385 | gpio_request(GPIO_FN_MMCCLK0, NULL); | ||
386 | gpio_request(GPIO_FN_MMCD0_0, NULL); | ||
387 | gpio_request(GPIO_FN_MMCD0_1, NULL); | ||
388 | gpio_request(GPIO_FN_MMCD0_2, NULL); | ||
389 | gpio_request(GPIO_FN_MMCD0_3, NULL); | ||
390 | gpio_request(GPIO_FN_MMCD0_4, NULL); | ||
391 | gpio_request(GPIO_FN_MMCD0_5, NULL); | ||
392 | gpio_request(GPIO_FN_MMCD0_6, NULL); | ||
393 | gpio_request(GPIO_FN_MMCD0_7, NULL); | ||
394 | gpio_request(GPIO_FN_MMCCMD0, NULL); | ||
395 | gpio_request(GPIO_PORT208, NULL); /* Reset */ | ||
396 | gpio_direction_output(GPIO_PORT208, 1); | ||
397 | |||
398 | /* SDHI0 (microSD) */ | ||
399 | gpio_request(GPIO_FN_SDHICD0_PU, NULL); | ||
400 | gpio_request(GPIO_FN_SDHICMD0_PU, NULL); | ||
401 | gpio_request(GPIO_FN_SDHICLK0, NULL); | ||
402 | gpio_request(GPIO_FN_SDHID0_3_PU, NULL); | ||
403 | gpio_request(GPIO_FN_SDHID0_2_PU, NULL); | ||
404 | gpio_request(GPIO_FN_SDHID0_1_PU, NULL); | ||
405 | gpio_request(GPIO_FN_SDHID0_0_PU, NULL); | ||
406 | |||
407 | /* SCIFB (BT) */ | ||
408 | gpio_request(GPIO_FN_PORT159_SCIFB_SCK, NULL); | ||
409 | gpio_request(GPIO_FN_PORT160_SCIFB_TXD, NULL); | ||
410 | gpio_request(GPIO_FN_PORT161_SCIFB_CTS_, NULL); | ||
411 | gpio_request(GPIO_FN_PORT162_SCIFB_RXD, NULL); | ||
412 | gpio_request(GPIO_FN_PORT163_SCIFB_RTS_, NULL); | ||
413 | |||
414 | /* SDHI1 (BCM4330) */ | ||
415 | gpio_request(GPIO_FN_SDHICLK1, NULL); | ||
416 | gpio_request(GPIO_FN_SDHICMD1_PU, NULL); | ||
417 | gpio_request(GPIO_FN_SDHID1_3_PU, NULL); | ||
418 | gpio_request(GPIO_FN_SDHID1_2_PU, NULL); | ||
419 | gpio_request(GPIO_FN_SDHID1_1_PU, NULL); | ||
420 | gpio_request(GPIO_FN_SDHID1_0_PU, NULL); | ||
421 | |||
422 | #ifdef CONFIG_CACHE_L2X0 | ||
423 | /* Early BRESP enable, Shared attribute override enable, 64K*8way */ | ||
424 | l2x0_init(__io(0xf0100000), 0x40460000, 0x82000fff); | ||
425 | #endif | ||
426 | sh73a0_add_standard_devices(); | ||
427 | platform_add_devices(kota2_devices, ARRAY_SIZE(kota2_devices)); | ||
428 | } | ||
429 | |||
430 | static void __init kota2_timer_init(void) | ||
431 | { | ||
432 | sh73a0_clock_init(); | ||
433 | shmobile_timer.init(); | ||
434 | return; | ||
435 | } | ||
436 | |||
437 | struct sys_timer kota2_timer = { | ||
438 | .init = kota2_timer_init, | ||
439 | }; | ||
440 | |||
441 | MACHINE_START(KOTA2, "kota2") | ||
442 | .map_io = kota2_map_io, | ||
443 | .init_irq = kota2_init_irq, | ||
444 | .handle_irq = shmobile_handle_irq_gic, | ||
445 | .init_machine = kota2_init, | ||
446 | .timer = &kota2_timer, | ||
447 | MACHINE_END | ||
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 3689ad2e915..9c5e598e0e3 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c | |||
@@ -273,8 +273,8 @@ static struct physmap_flash_data nor_flash_data = { | |||
273 | 273 | ||
274 | static struct resource nor_flash_resources[] = { | 274 | static struct resource nor_flash_resources[] = { |
275 | [0] = { | 275 | [0] = { |
276 | .start = 0x00000000, | 276 | .start = 0x20000000, /* CS0 shadow instead of regular CS0 */ |
277 | .end = 0x08000000 - 1, | 277 | .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */ |
278 | .flags = IORESOURCE_MEM, | 278 | .flags = IORESOURCE_MEM, |
279 | } | 279 | } |
280 | }; | 280 | }; |
@@ -1223,9 +1223,10 @@ static struct soc_camera_platform_info camera_info = { | |||
1223 | .width = 640, | 1223 | .width = 640, |
1224 | .height = 480, | 1224 | .height = 480, |
1225 | }, | 1225 | }, |
1226 | .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | | 1226 | .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER | |
1227 | SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8 | | 1227 | V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH | |
1228 | SOCAM_DATA_ACTIVE_HIGH, | 1228 | V4L2_MBUS_DATA_ACTIVE_HIGH, |
1229 | .mbus_type = V4L2_MBUS_PARALLEL, | ||
1229 | .set_capture = camera_set_capture, | 1230 | .set_capture = camera_set_capture, |
1230 | }; | 1231 | }; |
1231 | 1232 | ||
diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c index 6b7c7c42bc8..31654d78b96 100644 --- a/arch/arm/mach-shmobile/clock.c +++ b/arch/arm/mach-shmobile/clock.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
23 | #include <linux/init.h> | 23 | #include <linux/init.h> |
24 | #include <linux/sh_clk.h> | 24 | #include <linux/sh_clk.h> |
25 | #include <linux/export.h> | ||
25 | 26 | ||
26 | int __init clk_init(void) | 27 | int __init clk_init(void) |
27 | { | 28 | { |
diff --git a/arch/arm/mach-shmobile/include/mach/intc.h b/arch/arm/mach-shmobile/include/mach/intc.h new file mode 100644 index 00000000000..8b22258c8ca --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/intc.h | |||
@@ -0,0 +1,246 @@ | |||
1 | #ifndef __ASM_MACH_INTC_H | ||
2 | #define __ASM_MACH_INTC_H | ||
3 | #include <linux/sh_intc.h> | ||
4 | |||
5 | #define INTC_IRQ_PINS_ENUM_16L(p) \ | ||
6 | p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \ | ||
7 | p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7, \ | ||
8 | p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \ | ||
9 | p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15 | ||
10 | |||
11 | #define INTC_IRQ_PINS_ENUM_16H(p) \ | ||
12 | p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \ | ||
13 | p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23, \ | ||
14 | p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \ | ||
15 | p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31 | ||
16 | |||
17 | #define INTC_IRQ_PINS_VECT_16L(p, vect) \ | ||
18 | vect(p ## _IRQ0, 0x0200), vect(p ## _IRQ1, 0x0220), \ | ||
19 | vect(p ## _IRQ2, 0x0240), vect(p ## _IRQ3, 0x0260), \ | ||
20 | vect(p ## _IRQ4, 0x0280), vect(p ## _IRQ5, 0x02a0), \ | ||
21 | vect(p ## _IRQ6, 0x02c0), vect(p ## _IRQ7, 0x02e0), \ | ||
22 | vect(p ## _IRQ8, 0x0300), vect(p ## _IRQ9, 0x0320), \ | ||
23 | vect(p ## _IRQ10, 0x0340), vect(p ## _IRQ11, 0x0360), \ | ||
24 | vect(p ## _IRQ12, 0x0380), vect(p ## _IRQ13, 0x03a0), \ | ||
25 | vect(p ## _IRQ14, 0x03c0), vect(p ## _IRQ15, 0x03e0) | ||
26 | |||
27 | #define INTC_IRQ_PINS_VECT_16H(p, vect) \ | ||
28 | vect(p ## _IRQ16, 0x3200), vect(p ## _IRQ17, 0x3220), \ | ||
29 | vect(p ## _IRQ18, 0x3240), vect(p ## _IRQ19, 0x3260), \ | ||
30 | vect(p ## _IRQ20, 0x3280), vect(p ## _IRQ21, 0x32a0), \ | ||
31 | vect(p ## _IRQ22, 0x32c0), vect(p ## _IRQ23, 0x32e0), \ | ||
32 | vect(p ## _IRQ24, 0x3300), vect(p ## _IRQ25, 0x3320), \ | ||
33 | vect(p ## _IRQ26, 0x3340), vect(p ## _IRQ27, 0x3360), \ | ||
34 | vect(p ## _IRQ28, 0x3380), vect(p ## _IRQ29, 0x33a0), \ | ||
35 | vect(p ## _IRQ30, 0x33c0), vect(p ## _IRQ31, 0x33e0) | ||
36 | |||
37 | #define INTC_IRQ_PINS_MASK_16L(p, base) \ | ||
38 | { base + 0x40, base + 0x60, 8, /* INTMSK00A / INTMSKCLR00A */ \ | ||
39 | { p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \ | ||
40 | p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7 } }, \ | ||
41 | { base + 0x44, base + 0x64, 8, /* INTMSK10A / INTMSKCLR10A */ \ | ||
42 | { p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \ | ||
43 | p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15 } } | ||
44 | |||
45 | #define INTC_IRQ_PINS_MASK_16H(p, base) \ | ||
46 | { base + 0x48, base + 0x68, 8, /* INTMSK20A / INTMSKCLR20A */ \ | ||
47 | { p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \ | ||
48 | p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23 } }, \ | ||
49 | { base + 0x4c, base + 0x6c, 8, /* INTMSK30A / INTMSKCLR30A */ \ | ||
50 | { p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \ | ||
51 | p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31 } } | ||
52 | |||
53 | #define INTC_IRQ_PINS_PRIO_16L(p, base) \ | ||
54 | { base + 0x10, 0, 32, 4, /* INTPRI00A */ \ | ||
55 | { p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \ | ||
56 | p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7 } }, \ | ||
57 | { base + 0x14, 0, 32, 4, /* INTPRI10A */ \ | ||
58 | { p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \ | ||
59 | p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15 } } | ||
60 | |||
61 | #define INTC_IRQ_PINS_PRIO_16H(p, base) \ | ||
62 | { base + 0x18, 0, 32, 4, /* INTPRI20A */ \ | ||
63 | { p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \ | ||
64 | p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23 } }, \ | ||
65 | { base + 0x1c, 0, 32, 4, /* INTPRI30A */ \ | ||
66 | { p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \ | ||
67 | p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31 } } | ||
68 | |||
69 | #define INTC_IRQ_PINS_SENSE_16L(p, base) \ | ||
70 | { base + 0x00, 32, 4, /* ICR1A */ \ | ||
71 | { p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \ | ||
72 | p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7 } }, \ | ||
73 | { base + 0x04, 32, 4, /* ICR2A */ \ | ||
74 | { p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \ | ||
75 | p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15 } } | ||
76 | |||
77 | #define INTC_IRQ_PINS_SENSE_16H(p, base) \ | ||
78 | { base + 0x08, 32, 4, /* ICR3A */ \ | ||
79 | { p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \ | ||
80 | p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23 } }, \ | ||
81 | { base + 0x0c, 32, 4, /* ICR4A */ \ | ||
82 | { p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \ | ||
83 | p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31 } } | ||
84 | |||
85 | #define INTC_IRQ_PINS_ACK_16L(p, base) \ | ||
86 | { base + 0x20, 0, 8, /* INTREQ00A */ \ | ||
87 | { p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \ | ||
88 | p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7 } }, \ | ||
89 | { base + 0x24, 0, 8, /* INTREQ10A */ \ | ||
90 | { p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \ | ||
91 | p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15 } } | ||
92 | |||
93 | #define INTC_IRQ_PINS_ACK_16H(p, base) \ | ||
94 | { base + 0x28, 0, 8, /* INTREQ20A */ \ | ||
95 | { p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \ | ||
96 | p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23 } }, \ | ||
97 | { base + 0x2c, 0, 8, /* INTREQ30A */ \ | ||
98 | { p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \ | ||
99 | p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31 } } | ||
100 | |||
101 | #define INTC_IRQ_PINS_16(p, base, vect, str) \ | ||
102 | \ | ||
103 | static struct resource p ## _resources[] __initdata = { \ | ||
104 | [0] = { \ | ||
105 | .start = base, \ | ||
106 | .end = base + 0x64, \ | ||
107 | .flags = IORESOURCE_MEM, \ | ||
108 | }, \ | ||
109 | }; \ | ||
110 | \ | ||
111 | enum { \ | ||
112 | p ## _UNUSED = 0, \ | ||
113 | INTC_IRQ_PINS_ENUM_16L(p), \ | ||
114 | }; \ | ||
115 | \ | ||
116 | static struct intc_vect p ## _vectors[] __initdata = { \ | ||
117 | INTC_IRQ_PINS_VECT_16L(p, vect), \ | ||
118 | }; \ | ||
119 | \ | ||
120 | static struct intc_mask_reg p ## _mask_registers[] __initdata = { \ | ||
121 | INTC_IRQ_PINS_MASK_16L(p, base), \ | ||
122 | }; \ | ||
123 | \ | ||
124 | static struct intc_prio_reg p ## _prio_registers[] __initdata = { \ | ||
125 | INTC_IRQ_PINS_PRIO_16L(p, base), \ | ||
126 | }; \ | ||
127 | \ | ||
128 | static struct intc_sense_reg p ## _sense_registers[] __initdata = { \ | ||
129 | INTC_IRQ_PINS_SENSE_16L(p, base), \ | ||
130 | }; \ | ||
131 | \ | ||
132 | static struct intc_mask_reg p ## _ack_registers[] __initdata = { \ | ||
133 | INTC_IRQ_PINS_ACK_16L(p, base), \ | ||
134 | }; \ | ||
135 | \ | ||
136 | static struct intc_desc p ## _desc __initdata = { \ | ||
137 | .name = str, \ | ||
138 | .resource = p ## _resources, \ | ||
139 | .num_resources = ARRAY_SIZE(p ## _resources), \ | ||
140 | .hw = INTC_HW_DESC(p ## _vectors, NULL, \ | ||
141 | p ## _mask_registers, p ## _prio_registers, \ | ||
142 | p ## _sense_registers, p ## _ack_registers) \ | ||
143 | } | ||
144 | |||
145 | #define INTC_IRQ_PINS_32(p, base, vect, str) \ | ||
146 | \ | ||
147 | static struct resource p ## _resources[] __initdata = { \ | ||
148 | [0] = { \ | ||
149 | .start = base, \ | ||
150 | .end = base + 0x6c, \ | ||
151 | .flags = IORESOURCE_MEM, \ | ||
152 | }, \ | ||
153 | }; \ | ||
154 | \ | ||
155 | enum { \ | ||
156 | p ## _UNUSED = 0, \ | ||
157 | INTC_IRQ_PINS_ENUM_16L(p), \ | ||
158 | INTC_IRQ_PINS_ENUM_16H(p), \ | ||
159 | }; \ | ||
160 | \ | ||
161 | static struct intc_vect p ## _vectors[] __initdata = { \ | ||
162 | INTC_IRQ_PINS_VECT_16L(p, vect), \ | ||
163 | INTC_IRQ_PINS_VECT_16H(p, vect), \ | ||
164 | }; \ | ||
165 | \ | ||
166 | static struct intc_mask_reg p ## _mask_registers[] __initdata = { \ | ||
167 | INTC_IRQ_PINS_MASK_16L(p, base), \ | ||
168 | INTC_IRQ_PINS_MASK_16H(p, base), \ | ||
169 | }; \ | ||
170 | \ | ||
171 | static struct intc_prio_reg p ## _prio_registers[] __initdata = { \ | ||
172 | INTC_IRQ_PINS_PRIO_16L(p, base), \ | ||
173 | INTC_IRQ_PINS_PRIO_16H(p, base), \ | ||
174 | }; \ | ||
175 | \ | ||
176 | static struct intc_sense_reg p ## _sense_registers[] __initdata = { \ | ||
177 | INTC_IRQ_PINS_SENSE_16L(p, base), \ | ||
178 | INTC_IRQ_PINS_SENSE_16H(p, base), \ | ||
179 | }; \ | ||
180 | \ | ||
181 | static struct intc_mask_reg p ## _ack_registers[] __initdata = { \ | ||
182 | INTC_IRQ_PINS_ACK_16L(p, base), \ | ||
183 | INTC_IRQ_PINS_ACK_16H(p, base), \ | ||
184 | }; \ | ||
185 | \ | ||
186 | static struct intc_desc p ## _desc __initdata = { \ | ||
187 | .name = str, \ | ||
188 | .resource = p ## _resources, \ | ||
189 | .num_resources = ARRAY_SIZE(p ## _resources), \ | ||
190 | .hw = INTC_HW_DESC(p ## _vectors, NULL, \ | ||
191 | p ## _mask_registers, p ## _prio_registers, \ | ||
192 | p ## _sense_registers, p ## _ack_registers) \ | ||
193 | } | ||
194 | |||
195 | #define INTC_PINT_E_EMPTY | ||
196 | #define INTC_PINT_E_NONE 0, 0, 0, 0, 0, 0, 0, 0, | ||
197 | #define INTC_PINT_E(p) \ | ||
198 | PINT ## p ## 0, PINT ## p ## 1, PINT ## p ## 2, PINT ## p ## 3, \ | ||
199 | PINT ## p ## 4, PINT ## p ## 5, PINT ## p ## 6, PINT ## p ## 7, | ||
200 | |||
201 | #define INTC_PINT_V_NONE | ||
202 | #define INTC_PINT_V(p, vect) \ | ||
203 | vect(PINT ## p ## 0, 0), vect(PINT ## p ## 1, 1), \ | ||
204 | vect(PINT ## p ## 2, 2), vect(PINT ## p ## 3, 3), \ | ||
205 | vect(PINT ## p ## 4, 4), vect(PINT ## p ## 5, 5), \ | ||
206 | vect(PINT ## p ## 6, 6), vect(PINT ## p ## 7, 7), | ||
207 | |||
208 | #define INTC_PINT(p, mask_reg, sense_base, str, \ | ||
209 | enums_1, enums_2, enums_3, enums_4, \ | ||
210 | vect_1, vect_2, vect_3, vect_4, \ | ||
211 | mask_a, mask_b, mask_c, mask_d, \ | ||
212 | sense_a, sense_b, sense_c, sense_d) \ | ||
213 | \ | ||
214 | enum { \ | ||
215 | PINT ## p ## _UNUSED = 0, \ | ||
216 | enums_1 enums_2 enums_3 enums_4 \ | ||
217 | }; \ | ||
218 | \ | ||
219 | static struct intc_vect p ## _vectors[] __initdata = { \ | ||
220 | vect_1 vect_2 vect_3 vect_4 \ | ||
221 | }; \ | ||
222 | \ | ||
223 | static struct intc_mask_reg p ## _mask_registers[] __initdata = { \ | ||
224 | { mask_reg, 0, 32, /* PINTER */ \ | ||
225 | { mask_a mask_b mask_c mask_d } } \ | ||
226 | }; \ | ||
227 | \ | ||
228 | static struct intc_sense_reg p ## _sense_registers[] __initdata = { \ | ||
229 | { sense_base + 0x00, 16, 2, /* PINTCR */ \ | ||
230 | { sense_a } }, \ | ||
231 | { sense_base + 0x04, 16, 2, /* PINTCR */ \ | ||
232 | { sense_b } }, \ | ||
233 | { sense_base + 0x08, 16, 2, /* PINTCR */ \ | ||
234 | { sense_c } }, \ | ||
235 | { sense_base + 0x0c, 16, 2, /* PINTCR */ \ | ||
236 | { sense_d } }, \ | ||
237 | }; \ | ||
238 | \ | ||
239 | static struct intc_desc p ## _desc __initdata = { \ | ||
240 | .name = str, \ | ||
241 | .hw = INTC_HW_DESC(p ## _vectors, NULL, \ | ||
242 | p ## _mask_registers, NULL, \ | ||
243 | p ## _sense_registers, NULL), \ | ||
244 | } | ||
245 | |||
246 | #endif /* __ASM_MACH_INTC_H */ | ||
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h index 216c3d695ef..18ae6a990bc 100644 --- a/arch/arm/mach-shmobile/include/mach/sh73a0.h +++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h | |||
@@ -451,11 +451,23 @@ enum { | |||
451 | GPIO_FN_KEYIN5_PU, | 451 | GPIO_FN_KEYIN5_PU, |
452 | GPIO_FN_KEYIN6_PU, | 452 | GPIO_FN_KEYIN6_PU, |
453 | GPIO_FN_KEYIN7_PU, | 453 | GPIO_FN_KEYIN7_PU, |
454 | GPIO_FN_SDHICD0_PU, | ||
455 | GPIO_FN_SDHID0_0_PU, | ||
456 | GPIO_FN_SDHID0_1_PU, | ||
457 | GPIO_FN_SDHID0_2_PU, | ||
458 | GPIO_FN_SDHID0_3_PU, | ||
459 | GPIO_FN_SDHICMD0_PU, | ||
460 | GPIO_FN_SDHIWP0_PU, | ||
454 | GPIO_FN_SDHID1_0_PU, | 461 | GPIO_FN_SDHID1_0_PU, |
455 | GPIO_FN_SDHID1_1_PU, | 462 | GPIO_FN_SDHID1_1_PU, |
456 | GPIO_FN_SDHID1_2_PU, | 463 | GPIO_FN_SDHID1_2_PU, |
457 | GPIO_FN_SDHID1_3_PU, | 464 | GPIO_FN_SDHID1_3_PU, |
458 | GPIO_FN_SDHICMD1_PU, | 465 | GPIO_FN_SDHICMD1_PU, |
466 | GPIO_FN_SDHID2_0_PU, | ||
467 | GPIO_FN_SDHID2_1_PU, | ||
468 | GPIO_FN_SDHID2_2_PU, | ||
469 | GPIO_FN_SDHID2_3_PU, | ||
470 | GPIO_FN_SDHICMD2_PU, | ||
459 | GPIO_FN_MMCCMD0_PU, | 471 | GPIO_FN_MMCCMD0_PU, |
460 | GPIO_FN_MMCCMD1_PU, | 472 | GPIO_FN_MMCCMD1_PU, |
461 | GPIO_FN_FSIACK_PU, | 473 | GPIO_FN_FSIACK_PU, |
@@ -463,6 +475,7 @@ enum { | |||
463 | GPIO_FN_FSIAIBT_PU, | 475 | GPIO_FN_FSIAIBT_PU, |
464 | GPIO_FN_FSIAISLD_PU, | 476 | GPIO_FN_FSIAISLD_PU, |
465 | }; | 477 | }; |
478 | |||
466 | /* DMA slave IDs */ | 479 | /* DMA slave IDs */ |
467 | enum { | 480 | enum { |
468 | SHDMA_SLAVE_INVALID, | 481 | SHDMA_SLAVE_INVALID, |
@@ -494,4 +507,8 @@ enum { | |||
494 | SHDMA_SLAVE_MMCIF_RX, | 507 | SHDMA_SLAVE_MMCIF_RX, |
495 | }; | 508 | }; |
496 | 509 | ||
510 | /* PINT interrupts are located at Linux IRQ 768 and up */ | ||
511 | #define SH73A0_PINT0_IRQ(irq) ((irq) + 768) | ||
512 | #define SH73A0_PINT1_IRQ(irq) ((irq) + 800) | ||
513 | |||
497 | #endif /* __ASM_SH73A0_H__ */ | 514 | #endif /* __ASM_SH73A0_H__ */ |
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c index cc442d198cd..cfde9bfc366 100644 --- a/arch/arm/mach-shmobile/intc-sh7367.c +++ b/arch/arm/mach-shmobile/intc-sh7367.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/irq.h> | 22 | #include <linux/irq.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/sh_intc.h> | 24 | #include <linux/sh_intc.h> |
25 | #include <mach/intc.h> | ||
25 | #include <asm/mach-types.h> | 26 | #include <asm/mach-types.h> |
26 | #include <asm/mach/arch.h> | 27 | #include <asm/mach/arch.h> |
27 | 28 | ||
@@ -31,8 +32,6 @@ enum { | |||
31 | DISABLED, | 32 | DISABLED, |
32 | 33 | ||
33 | /* interrupt sources INTCA */ | 34 | /* interrupt sources INTCA */ |
34 | IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A, | ||
35 | IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A, | ||
36 | DIRC, | 35 | DIRC, |
37 | CRYPT1_ERR, CRYPT2_STD, | 36 | CRYPT1_ERR, CRYPT2_STD, |
38 | IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1, | 37 | IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1, |
@@ -76,14 +75,6 @@ enum { | |||
76 | }; | 75 | }; |
77 | 76 | ||
78 | static struct intc_vect intca_vectors[] __initdata = { | 77 | static struct intc_vect intca_vectors[] __initdata = { |
79 | INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220), | ||
80 | INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260), | ||
81 | INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0), | ||
82 | INTC_VECT(IRQ6A, 0x02c0), INTC_VECT(IRQ7A, 0x02e0), | ||
83 | INTC_VECT(IRQ8A, 0x0300), INTC_VECT(IRQ9A, 0x0320), | ||
84 | INTC_VECT(IRQ10A, 0x0340), INTC_VECT(IRQ11A, 0x0360), | ||
85 | INTC_VECT(IRQ12A, 0x0380), INTC_VECT(IRQ13A, 0x03a0), | ||
86 | INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0), | ||
87 | INTC_VECT(DIRC, 0x0560), | 78 | INTC_VECT(DIRC, 0x0560), |
88 | INTC_VECT(CRYPT1_ERR, 0x05e0), | 79 | INTC_VECT(CRYPT1_ERR, 0x05e0), |
89 | INTC_VECT(CRYPT2_STD, 0x0700), | 80 | INTC_VECT(CRYPT2_STD, 0x0700), |
@@ -163,10 +154,6 @@ static struct intc_group intca_groups[] __initdata = { | |||
163 | }; | 154 | }; |
164 | 155 | ||
165 | static struct intc_mask_reg intca_mask_registers[] __initdata = { | 156 | static struct intc_mask_reg intca_mask_registers[] __initdata = { |
166 | { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */ | ||
167 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
168 | { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */ | ||
169 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
170 | { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */ | 157 | { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */ |
171 | { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0, | 158 | { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0, |
172 | ARM11_IRQPMU, 0, ARM11_COMMTX, ARM11_COMMRX } }, | 159 | ARM11_IRQPMU, 0, ARM11_COMMTX, ARM11_COMMRX } }, |
@@ -212,11 +199,6 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = { | |||
212 | }; | 199 | }; |
213 | 200 | ||
214 | static struct intc_prio_reg intca_prio_registers[] __initdata = { | 201 | static struct intc_prio_reg intca_prio_registers[] __initdata = { |
215 | { 0xe6900010, 0, 32, 4, /* INTPRI00A */ | ||
216 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
217 | { 0xe6900014, 0, 32, 4, /* INTPRI10A */ | ||
218 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
219 | |||
220 | { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } }, | 202 | { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } }, |
221 | { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, ETM11, BBIF1, BBIF2 } }, | 203 | { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, ETM11, BBIF1, BBIF2 } }, |
222 | { 0xe6940008, 0, 16, 4, /* IPRCA */ { CRYPT1_ERR, CRYPT2_STD, | 204 | { 0xe6940008, 0, 16, 4, /* IPRCA */ { CRYPT1_ERR, CRYPT2_STD, |
@@ -240,29 +222,18 @@ static struct intc_prio_reg intca_prio_registers[] __initdata = { | |||
240 | { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } }, | 222 | { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } }, |
241 | }; | 223 | }; |
242 | 224 | ||
243 | static struct intc_sense_reg intca_sense_registers[] __initdata = { | ||
244 | { 0xe6900000, 16, 2, /* ICR1A */ | ||
245 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
246 | { 0xe6900004, 16, 2, /* ICR2A */ | ||
247 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
248 | }; | ||
249 | |||
250 | static struct intc_mask_reg intca_ack_registers[] __initdata = { | ||
251 | { 0xe6900020, 0, 8, /* INTREQ00A */ | ||
252 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
253 | { 0xe6900024, 0, 8, /* INTREQ10A */ | ||
254 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
255 | }; | ||
256 | |||
257 | static struct intc_desc intca_desc __initdata = { | 225 | static struct intc_desc intca_desc __initdata = { |
258 | .name = "sh7367-intca", | 226 | .name = "sh7367-intca", |
259 | .force_enable = ENABLED, | 227 | .force_enable = ENABLED, |
260 | .force_disable = DISABLED, | 228 | .force_disable = DISABLED, |
261 | .hw = INTC_HW_DESC(intca_vectors, intca_groups, | 229 | .hw = INTC_HW_DESC(intca_vectors, intca_groups, |
262 | intca_mask_registers, intca_prio_registers, | 230 | intca_mask_registers, intca_prio_registers, |
263 | intca_sense_registers, intca_ack_registers), | 231 | NULL, NULL), |
264 | }; | 232 | }; |
265 | 233 | ||
234 | INTC_IRQ_PINS_16(intca_irq_pins, 0xe6900000, | ||
235 | INTC_VECT, "sh7367-intca-irq-pins"); | ||
236 | |||
266 | enum { | 237 | enum { |
267 | UNUSED_INTCS = 0, | 238 | UNUSED_INTCS = 0, |
268 | 239 | ||
@@ -432,6 +403,7 @@ void __init sh7367_init_irq(void) | |||
432 | void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); | 403 | void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); |
433 | 404 | ||
434 | register_intc_controller(&intca_desc); | 405 | register_intc_controller(&intca_desc); |
406 | register_intc_controller(&intca_irq_pins_desc); | ||
435 | register_intc_controller(&intcs_desc); | 407 | register_intc_controller(&intcs_desc); |
436 | 408 | ||
437 | /* demux using INTEVTSA */ | 409 | /* demux using INTEVTSA */ |
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c index 29cdc0522d9..2d8856df80e 100644 --- a/arch/arm/mach-shmobile/intc-sh7372.c +++ b/arch/arm/mach-shmobile/intc-sh7372.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/irq.h> | 22 | #include <linux/irq.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/sh_intc.h> | 24 | #include <linux/sh_intc.h> |
25 | #include <mach/intc.h> | ||
25 | #include <asm/mach-types.h> | 26 | #include <asm/mach-types.h> |
26 | #include <asm/mach/arch.h> | 27 | #include <asm/mach/arch.h> |
27 | 28 | ||
@@ -29,10 +30,6 @@ enum { | |||
29 | UNUSED_INTCA = 0, | 30 | UNUSED_INTCA = 0, |
30 | 31 | ||
31 | /* interrupt sources INTCA */ | 32 | /* interrupt sources INTCA */ |
32 | IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A, | ||
33 | IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A, | ||
34 | IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A, | ||
35 | IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A, | ||
36 | DIRC, | 33 | DIRC, |
37 | CRYPT_STD, | 34 | CRYPT_STD, |
38 | IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1, | 35 | IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1, |
@@ -86,22 +83,6 @@ enum { | |||
86 | }; | 83 | }; |
87 | 84 | ||
88 | static struct intc_vect intca_vectors[] __initdata = { | 85 | static struct intc_vect intca_vectors[] __initdata = { |
89 | INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220), | ||
90 | INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260), | ||
91 | INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0), | ||
92 | INTC_VECT(IRQ6A, 0x02c0), INTC_VECT(IRQ7A, 0x02e0), | ||
93 | INTC_VECT(IRQ8A, 0x0300), INTC_VECT(IRQ9A, 0x0320), | ||
94 | INTC_VECT(IRQ10A, 0x0340), INTC_VECT(IRQ11A, 0x0360), | ||
95 | INTC_VECT(IRQ12A, 0x0380), INTC_VECT(IRQ13A, 0x03a0), | ||
96 | INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0), | ||
97 | INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220), | ||
98 | INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260), | ||
99 | INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ21A, 0x32a0), | ||
100 | INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0), | ||
101 | INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320), | ||
102 | INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360), | ||
103 | INTC_VECT(IRQ28A, 0x3380), INTC_VECT(IRQ29A, 0x33a0), | ||
104 | INTC_VECT(IRQ30A, 0x33c0), INTC_VECT(IRQ31A, 0x33e0), | ||
105 | INTC_VECT(DIRC, 0x0560), | 86 | INTC_VECT(DIRC, 0x0560), |
106 | INTC_VECT(CRYPT_STD, 0x0700), | 87 | INTC_VECT(CRYPT_STD, 0x0700), |
107 | INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0), | 88 | INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0), |
@@ -203,15 +184,6 @@ static struct intc_group intca_groups[] __initdata = { | |||
203 | }; | 184 | }; |
204 | 185 | ||
205 | static struct intc_mask_reg intca_mask_registers[] __initdata = { | 186 | static struct intc_mask_reg intca_mask_registers[] __initdata = { |
206 | { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */ | ||
207 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
208 | { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */ | ||
209 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
210 | { 0xe6900048, 0xe6900068, 8, /* INTMSK20A / INTMSKCLR20A */ | ||
211 | { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } }, | ||
212 | { 0xe690004c, 0xe690006c, 8, /* INTMSK30A / INTMSKCLR30A */ | ||
213 | { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } }, | ||
214 | |||
215 | { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */ | 187 | { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */ |
216 | { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0, | 188 | { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0, |
217 | AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } }, | 189 | AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } }, |
@@ -282,15 +254,6 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = { | |||
282 | }; | 254 | }; |
283 | 255 | ||
284 | static struct intc_prio_reg intca_prio_registers[] __initdata = { | 256 | static struct intc_prio_reg intca_prio_registers[] __initdata = { |
285 | { 0xe6900010, 0, 32, 4, /* INTPRI00A */ | ||
286 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
287 | { 0xe6900014, 0, 32, 4, /* INTPRI10A */ | ||
288 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
289 | { 0xe6900018, 0, 32, 4, /* INTPRI20A */ | ||
290 | { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } }, | ||
291 | { 0xe690001c, 0, 32, 4, /* INTPRI30A */ | ||
292 | { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } }, | ||
293 | |||
294 | { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, 0 } }, | 257 | { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, 0 } }, |
295 | { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } }, | 258 | { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } }, |
296 | { 0xe6940008, 0, 16, 4, /* IPRCA */ { 0, CRYPT_STD, | 259 | { 0xe6940008, 0, 16, 4, /* IPRCA */ { 0, CRYPT_STD, |
@@ -336,33 +299,13 @@ static struct intc_prio_reg intca_prio_registers[] __initdata = { | |||
336 | { 0xe6950050, 0, 16, 4, /* IPRUA3 */ { USBHSDMAC1_USHDMI, 0, 0, 0 } }, | 299 | { 0xe6950050, 0, 16, 4, /* IPRUA3 */ { USBHSDMAC1_USHDMI, 0, 0, 0 } }, |
337 | }; | 300 | }; |
338 | 301 | ||
339 | static struct intc_sense_reg intca_sense_registers[] __initdata = { | 302 | static DECLARE_INTC_DESC(intca_desc, "sh7372-intca", |
340 | { 0xe6900000, 32, 4, /* ICR1A */ | 303 | intca_vectors, intca_groups, |
341 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | 304 | intca_mask_registers, intca_prio_registers, |
342 | { 0xe6900004, 32, 4, /* ICR2A */ | 305 | NULL); |
343 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
344 | { 0xe6900008, 32, 4, /* ICR3A */ | ||
345 | { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } }, | ||
346 | { 0xe690000c, 32, 4, /* ICR4A */ | ||
347 | { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } }, | ||
348 | }; | ||
349 | |||
350 | static struct intc_mask_reg intca_ack_registers[] __initdata = { | ||
351 | { 0xe6900020, 0, 8, /* INTREQ00A */ | ||
352 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
353 | { 0xe6900024, 0, 8, /* INTREQ10A */ | ||
354 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
355 | { 0xe6900028, 0, 8, /* INTREQ20A */ | ||
356 | { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } }, | ||
357 | { 0xe690002c, 0, 8, /* INTREQ30A */ | ||
358 | { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } }, | ||
359 | }; | ||
360 | |||
361 | static DECLARE_INTC_DESC_ACK(intca_desc, "sh7372-intca", | ||
362 | intca_vectors, intca_groups, | ||
363 | intca_mask_registers, intca_prio_registers, | ||
364 | intca_sense_registers, intca_ack_registers); | ||
365 | 306 | ||
307 | INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000, | ||
308 | INTC_VECT, "sh7372-intca-irq-pins"); | ||
366 | enum { | 309 | enum { |
367 | UNUSED_INTCS = 0, | 310 | UNUSED_INTCS = 0, |
368 | ENABLED_INTCS, | 311 | ENABLED_INTCS, |
@@ -618,6 +561,7 @@ void __init sh7372_init_irq(void) | |||
618 | intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE); | 561 | intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE); |
619 | 562 | ||
620 | register_intc_controller(&intca_desc); | 563 | register_intc_controller(&intca_desc); |
564 | register_intc_controller(&intca_irq_pins_desc); | ||
621 | register_intc_controller(&intcs_desc); | 565 | register_intc_controller(&intcs_desc); |
622 | 566 | ||
623 | /* demux using INTEVTSA */ | 567 | /* demux using INTEVTSA */ |
diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c index fe45154ce66..2af4e6e9bc5 100644 --- a/arch/arm/mach-shmobile/intc-sh7377.c +++ b/arch/arm/mach-shmobile/intc-sh7377.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/irq.h> | 22 | #include <linux/irq.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/sh_intc.h> | 24 | #include <linux/sh_intc.h> |
25 | #include <mach/intc.h> | ||
25 | #include <asm/mach-types.h> | 26 | #include <asm/mach-types.h> |
26 | #include <asm/mach/arch.h> | 27 | #include <asm/mach/arch.h> |
27 | 28 | ||
@@ -31,10 +32,6 @@ enum { | |||
31 | DISABLED, | 32 | DISABLED, |
32 | 33 | ||
33 | /* interrupt sources INTCA */ | 34 | /* interrupt sources INTCA */ |
34 | IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A, | ||
35 | IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A, | ||
36 | IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A, | ||
37 | IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A, | ||
38 | DIRC, | 35 | DIRC, |
39 | _2DG, | 36 | _2DG, |
40 | CRYPT_STD, | 37 | CRYPT_STD, |
@@ -91,22 +88,6 @@ enum { | |||
91 | }; | 88 | }; |
92 | 89 | ||
93 | static struct intc_vect intca_vectors[] __initdata = { | 90 | static struct intc_vect intca_vectors[] __initdata = { |
94 | INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220), | ||
95 | INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260), | ||
96 | INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0), | ||
97 | INTC_VECT(IRQ6A, 0x02c0), INTC_VECT(IRQ7A, 0x02e0), | ||
98 | INTC_VECT(IRQ8A, 0x0300), INTC_VECT(IRQ9A, 0x0320), | ||
99 | INTC_VECT(IRQ10A, 0x0340), INTC_VECT(IRQ11A, 0x0360), | ||
100 | INTC_VECT(IRQ12A, 0x0380), INTC_VECT(IRQ13A, 0x03a0), | ||
101 | INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0), | ||
102 | INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220), | ||
103 | INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260), | ||
104 | INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ31A, 0x32a0), | ||
105 | INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0), | ||
106 | INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320), | ||
107 | INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360), | ||
108 | INTC_VECT(IRQ28A, 0x3380), INTC_VECT(IRQ29A, 0x33a0), | ||
109 | INTC_VECT(IRQ30A, 0x33c0), INTC_VECT(IRQ31A, 0x33e0), | ||
110 | INTC_VECT(DIRC, 0x0560), | 91 | INTC_VECT(DIRC, 0x0560), |
111 | INTC_VECT(_2DG, 0x05e0), | 92 | INTC_VECT(_2DG, 0x05e0), |
112 | INTC_VECT(CRYPT_STD, 0x0700), | 93 | INTC_VECT(CRYPT_STD, 0x0700), |
@@ -203,15 +184,6 @@ static struct intc_group intca_groups[] __initdata = { | |||
203 | }; | 184 | }; |
204 | 185 | ||
205 | static struct intc_mask_reg intca_mask_registers[] __initdata = { | 186 | static struct intc_mask_reg intca_mask_registers[] __initdata = { |
206 | { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */ | ||
207 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
208 | { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */ | ||
209 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
210 | { 0xe6900048, 0xe6900068, 8, /* INTMSK20A / INTMSKCLR20A */ | ||
211 | { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } }, | ||
212 | { 0xe690004c, 0xe690006c, 8, /* INTMSK30A / INTMSKCLR30A */ | ||
213 | { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } }, | ||
214 | |||
215 | { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */ | 187 | { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */ |
216 | { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0, | 188 | { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0, |
217 | AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } }, | 189 | AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } }, |
@@ -273,15 +245,6 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = { | |||
273 | }; | 245 | }; |
274 | 246 | ||
275 | static struct intc_prio_reg intca_prio_registers[] __initdata = { | 247 | static struct intc_prio_reg intca_prio_registers[] __initdata = { |
276 | { 0xe6900010, 0, 32, 4, /* INTPRI00A */ | ||
277 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
278 | { 0xe6900014, 0, 32, 4, /* INTPRI10A */ | ||
279 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
280 | { 0xe6900018, 0, 32, 4, /* INTPRI10A */ | ||
281 | { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } }, | ||
282 | { 0xe690001c, 0, 32, 4, /* INTPRI30A */ | ||
283 | { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } }, | ||
284 | |||
285 | { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } }, | 248 | { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } }, |
286 | { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } }, | 249 | { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } }, |
287 | { 0xe6940008, 0, 16, 4, /* IPRCA */ { _2DG, CRYPT_STD, | 250 | { 0xe6940008, 0, 16, 4, /* IPRCA */ { _2DG, CRYPT_STD, |
@@ -315,37 +278,18 @@ static struct intc_prio_reg intca_prio_registers[] __initdata = { | |||
315 | { 0xe694003c, 0, 16, 4, /* IPRPA3 */ { SCIFA6, 0, 0, 0 } }, | 278 | { 0xe694003c, 0, 16, 4, /* IPRPA3 */ { SCIFA6, 0, 0, 0 } }, |
316 | }; | 279 | }; |
317 | 280 | ||
318 | static struct intc_sense_reg intca_sense_registers[] __initdata = { | ||
319 | { 0xe6900000, 16, 2, /* ICR1A */ | ||
320 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
321 | { 0xe6900004, 16, 2, /* ICR2A */ | ||
322 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
323 | { 0xe6900008, 16, 2, /* ICR3A */ | ||
324 | { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } }, | ||
325 | { 0xe690000c, 16, 2, /* ICR4A */ | ||
326 | { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } }, | ||
327 | }; | ||
328 | |||
329 | static struct intc_mask_reg intca_ack_registers[] __initdata = { | ||
330 | { 0xe6900020, 0, 8, /* INTREQ00A */ | ||
331 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
332 | { 0xe6900024, 0, 8, /* INTREQ10A */ | ||
333 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
334 | { 0xe6900028, 0, 8, /* INTREQ20A */ | ||
335 | { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } }, | ||
336 | { 0xe690002c, 0, 8, /* INTREQ30A */ | ||
337 | { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } }, | ||
338 | }; | ||
339 | |||
340 | static struct intc_desc intca_desc __initdata = { | 281 | static struct intc_desc intca_desc __initdata = { |
341 | .name = "sh7377-intca", | 282 | .name = "sh7377-intca", |
342 | .force_enable = ENABLED, | 283 | .force_enable = ENABLED, |
343 | .force_disable = DISABLED, | 284 | .force_disable = DISABLED, |
344 | .hw = INTC_HW_DESC(intca_vectors, intca_groups, | 285 | .hw = INTC_HW_DESC(intca_vectors, intca_groups, |
345 | intca_mask_registers, intca_prio_registers, | 286 | intca_mask_registers, intca_prio_registers, |
346 | intca_sense_registers, intca_ack_registers), | 287 | NULL, NULL), |
347 | }; | 288 | }; |
348 | 289 | ||
290 | INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000, | ||
291 | INTC_VECT, "sh7377-intca-irq-pins"); | ||
292 | |||
349 | /* this macro ignore entry which is also in INTCA */ | 293 | /* this macro ignore entry which is also in INTCA */ |
350 | #define __IGNORE(a...) | 294 | #define __IGNORE(a...) |
351 | #define __IGNORE0(a...) 0 | 295 | #define __IGNORE0(a...) 0 |
@@ -638,6 +582,7 @@ void __init sh7377_init_irq(void) | |||
638 | void __iomem *intevtsa = ioremap_nocache(INTEVTSA, PAGE_SIZE); | 582 | void __iomem *intevtsa = ioremap_nocache(INTEVTSA, PAGE_SIZE); |
639 | 583 | ||
640 | register_intc_controller(&intca_desc); | 584 | register_intc_controller(&intca_desc); |
585 | register_intc_controller(&intca_irq_pins_desc); | ||
641 | register_intc_controller(&intcs_desc); | 586 | register_intc_controller(&intcs_desc); |
642 | 587 | ||
643 | /* demux using INTEVTSA */ | 588 | /* demux using INTEVTSA */ |
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c index a911a60e771..1eda6b0b69e 100644 --- a/arch/arm/mach-shmobile/intc-sh73a0.c +++ b/arch/arm/mach-shmobile/intc-sh73a0.c | |||
@@ -22,6 +22,8 @@ | |||
22 | #include <linux/irq.h> | 22 | #include <linux/irq.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/sh_intc.h> | 24 | #include <linux/sh_intc.h> |
25 | #include <mach/intc.h> | ||
26 | #include <mach/sh73a0.h> | ||
25 | #include <asm/hardware/gic.h> | 27 | #include <asm/hardware/gic.h> |
26 | #include <asm/mach-types.h> | 28 | #include <asm/mach-types.h> |
27 | #include <asm/mach/arch.h> | 29 | #include <asm/mach/arch.h> |
@@ -255,20 +257,205 @@ static int sh73a0_set_wake(struct irq_data *data, unsigned int on) | |||
255 | return 0; /* always allow wakeup */ | 257 | return 0; /* always allow wakeup */ |
256 | } | 258 | } |
257 | 259 | ||
260 | #define RELOC_BASE 0x1000 | ||
261 | |||
262 | /* INTCA IRQ pins at INTCS + 0x1000 to make space for GIC+INTC handling */ | ||
263 | #define INTCS_VECT_RELOC(n, vect) INTCS_VECT((n), (vect) + RELOC_BASE) | ||
264 | |||
265 | INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000, | ||
266 | INTCS_VECT_RELOC, "sh73a0-intca-irq-pins"); | ||
267 | |||
268 | static int to_gic_irq(struct irq_data *data) | ||
269 | { | ||
270 | unsigned int vect = irq2evt(data->irq) - INTCS_VECT_BASE; | ||
271 | |||
272 | if (vect >= 0x3200) | ||
273 | vect -= 0x3000; | ||
274 | else | ||
275 | vect -= 0x0200; | ||
276 | |||
277 | return gic_spi((vect >> 5) + 1); | ||
278 | } | ||
279 | |||
280 | static int to_intca_reloc_irq(struct irq_data *data) | ||
281 | { | ||
282 | return data->irq + (RELOC_BASE >> 5); | ||
283 | } | ||
284 | |||
285 | #define irq_cb(cb, irq) irq_get_chip(irq)->cb(irq_get_irq_data(irq)) | ||
286 | #define irq_cbp(cb, irq, p...) irq_get_chip(irq)->cb(irq_get_irq_data(irq), p) | ||
287 | |||
288 | static void intca_gic_enable(struct irq_data *data) | ||
289 | { | ||
290 | irq_cb(irq_unmask, to_intca_reloc_irq(data)); | ||
291 | irq_cb(irq_unmask, to_gic_irq(data)); | ||
292 | } | ||
293 | |||
294 | static void intca_gic_disable(struct irq_data *data) | ||
295 | { | ||
296 | irq_cb(irq_mask, to_gic_irq(data)); | ||
297 | irq_cb(irq_mask, to_intca_reloc_irq(data)); | ||
298 | } | ||
299 | |||
300 | static void intca_gic_mask_ack(struct irq_data *data) | ||
301 | { | ||
302 | irq_cb(irq_mask, to_gic_irq(data)); | ||
303 | irq_cb(irq_mask_ack, to_intca_reloc_irq(data)); | ||
304 | } | ||
305 | |||
306 | static void intca_gic_eoi(struct irq_data *data) | ||
307 | { | ||
308 | irq_cb(irq_eoi, to_gic_irq(data)); | ||
309 | } | ||
310 | |||
311 | static int intca_gic_set_type(struct irq_data *data, unsigned int type) | ||
312 | { | ||
313 | return irq_cbp(irq_set_type, to_intca_reloc_irq(data), type); | ||
314 | } | ||
315 | |||
316 | static int intca_gic_set_wake(struct irq_data *data, unsigned int on) | ||
317 | { | ||
318 | return irq_cbp(irq_set_wake, to_intca_reloc_irq(data), on); | ||
319 | } | ||
320 | |||
321 | #ifdef CONFIG_SMP | ||
322 | static int intca_gic_set_affinity(struct irq_data *data, | ||
323 | const struct cpumask *cpumask, | ||
324 | bool force) | ||
325 | { | ||
326 | return irq_cbp(irq_set_affinity, to_gic_irq(data), cpumask, force); | ||
327 | } | ||
328 | #endif | ||
329 | |||
330 | struct irq_chip intca_gic_irq_chip = { | ||
331 | .name = "INTCA-GIC", | ||
332 | .irq_mask = intca_gic_disable, | ||
333 | .irq_unmask = intca_gic_enable, | ||
334 | .irq_mask_ack = intca_gic_mask_ack, | ||
335 | .irq_eoi = intca_gic_eoi, | ||
336 | .irq_enable = intca_gic_enable, | ||
337 | .irq_disable = intca_gic_disable, | ||
338 | .irq_shutdown = intca_gic_disable, | ||
339 | .irq_set_type = intca_gic_set_type, | ||
340 | .irq_set_wake = intca_gic_set_wake, | ||
341 | #ifdef CONFIG_SMP | ||
342 | .irq_set_affinity = intca_gic_set_affinity, | ||
343 | #endif | ||
344 | }; | ||
345 | |||
346 | static int to_intc_vect(int irq) | ||
347 | { | ||
348 | unsigned int irq_pin = irq - gic_spi(1); | ||
349 | unsigned int offs; | ||
350 | |||
351 | if (irq_pin < 16) | ||
352 | offs = 0x0200; | ||
353 | else | ||
354 | offs = 0x3000; | ||
355 | |||
356 | return offs + (irq_pin << 5); | ||
357 | } | ||
358 | |||
359 | static irqreturn_t sh73a0_irq_pin_demux(int irq, void *dev_id) | ||
360 | { | ||
361 | generic_handle_irq(intcs_evt2irq(to_intc_vect(irq))); | ||
362 | return IRQ_HANDLED; | ||
363 | } | ||
364 | |||
365 | static struct irqaction sh73a0_irq_pin_cascade[32]; | ||
366 | |||
367 | #define PINTER0 0xe69000a0 | ||
368 | #define PINTER1 0xe69000a4 | ||
369 | #define PINTRR0 0xe69000d0 | ||
370 | #define PINTRR1 0xe69000d4 | ||
371 | |||
372 | #define PINT0A_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq)) | ||
373 | #define PINT0B_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 8)) | ||
374 | #define PINT0C_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 16)) | ||
375 | #define PINT0D_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 24)) | ||
376 | #define PINT1E_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT1_IRQ(irq)) | ||
377 | |||
378 | INTC_PINT(intc_pint0, PINTER0, 0xe69000b0, "sh73a0-pint0", \ | ||
379 | INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \ | ||
380 | INTC_PINT_V(A, PINT0A_IRQ), INTC_PINT_V(B, PINT0B_IRQ), \ | ||
381 | INTC_PINT_V(C, PINT0C_IRQ), INTC_PINT_V(D, PINT0D_IRQ), \ | ||
382 | INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \ | ||
383 | INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D)); | ||
384 | |||
385 | INTC_PINT(intc_pint1, PINTER1, 0xe69000c0, "sh73a0-pint1", \ | ||
386 | INTC_PINT_E(E), INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, \ | ||
387 | INTC_PINT_V(E, PINT1E_IRQ), INTC_PINT_V_NONE, \ | ||
388 | INTC_PINT_V_NONE, INTC_PINT_V_NONE, \ | ||
389 | INTC_PINT_E_NONE, INTC_PINT_E_NONE, INTC_PINT_E_NONE, INTC_PINT_E(E), \ | ||
390 | INTC_PINT_E(E), INTC_PINT_E_NONE, INTC_PINT_E_NONE, INTC_PINT_E_NONE); | ||
391 | |||
392 | static struct irqaction sh73a0_pint0_cascade; | ||
393 | static struct irqaction sh73a0_pint1_cascade; | ||
394 | |||
395 | static void pint_demux(unsigned long rr, unsigned long er, int base_irq) | ||
396 | { | ||
397 | unsigned long value = ioread32(rr) & ioread32(er); | ||
398 | int k; | ||
399 | |||
400 | for (k = 0; k < 32; k++) { | ||
401 | if (value & (1 << (31 - k))) { | ||
402 | generic_handle_irq(base_irq + k); | ||
403 | iowrite32(~(1 << (31 - k)), rr); | ||
404 | } | ||
405 | } | ||
406 | } | ||
407 | |||
408 | static irqreturn_t sh73a0_pint0_demux(int irq, void *dev_id) | ||
409 | { | ||
410 | pint_demux(PINTRR0, PINTER0, SH73A0_PINT0_IRQ(0)); | ||
411 | return IRQ_HANDLED; | ||
412 | } | ||
413 | |||
414 | static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id) | ||
415 | { | ||
416 | pint_demux(PINTRR1, PINTER1, SH73A0_PINT1_IRQ(0)); | ||
417 | return IRQ_HANDLED; | ||
418 | } | ||
419 | |||
258 | void __init sh73a0_init_irq(void) | 420 | void __init sh73a0_init_irq(void) |
259 | { | 421 | { |
260 | void __iomem *gic_dist_base = __io(0xf0001000); | 422 | void __iomem *gic_dist_base = __io(0xf0001000); |
261 | void __iomem *gic_cpu_base = __io(0xf0000100); | 423 | void __iomem *gic_cpu_base = __io(0xf0000100); |
262 | void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); | 424 | void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); |
425 | int k, n; | ||
263 | 426 | ||
264 | gic_init(0, 29, gic_dist_base, gic_cpu_base); | 427 | gic_init(0, 29, gic_dist_base, gic_cpu_base); |
265 | gic_arch_extn.irq_set_wake = sh73a0_set_wake; | 428 | gic_arch_extn.irq_set_wake = sh73a0_set_wake; |
266 | 429 | ||
267 | register_intc_controller(&intcs_desc); | 430 | register_intc_controller(&intcs_desc); |
431 | register_intc_controller(&intca_irq_pins_desc); | ||
432 | register_intc_controller(&intc_pint0_desc); | ||
433 | register_intc_controller(&intc_pint1_desc); | ||
268 | 434 | ||
269 | /* demux using INTEVTSA */ | 435 | /* demux using INTEVTSA */ |
270 | sh73a0_intcs_cascade.name = "INTCS cascade"; | 436 | sh73a0_intcs_cascade.name = "INTCS cascade"; |
271 | sh73a0_intcs_cascade.handler = sh73a0_intcs_demux; | 437 | sh73a0_intcs_cascade.handler = sh73a0_intcs_demux; |
272 | sh73a0_intcs_cascade.dev_id = intevtsa; | 438 | sh73a0_intcs_cascade.dev_id = intevtsa; |
273 | setup_irq(gic_spi(50), &sh73a0_intcs_cascade); | 439 | setup_irq(gic_spi(50), &sh73a0_intcs_cascade); |
440 | |||
441 | /* IRQ pins require special handling through INTCA and GIC */ | ||
442 | for (k = 0; k < 32; k++) { | ||
443 | sh73a0_irq_pin_cascade[k].name = "INTCA-GIC cascade"; | ||
444 | sh73a0_irq_pin_cascade[k].handler = sh73a0_irq_pin_demux; | ||
445 | setup_irq(gic_spi(1 + k), &sh73a0_irq_pin_cascade[k]); | ||
446 | |||
447 | n = intcs_evt2irq(to_intc_vect(gic_spi(1 + k))); | ||
448 | irq_set_chip_and_handler_name(n, &intca_gic_irq_chip, | ||
449 | handle_level_irq, "level"); | ||
450 | set_irq_flags(n, IRQF_VALID); /* yuck */ | ||
451 | } | ||
452 | |||
453 | /* PINT pins are sanely tied to the GIC as SPI */ | ||
454 | sh73a0_pint0_cascade.name = "PINT0 cascade"; | ||
455 | sh73a0_pint0_cascade.handler = sh73a0_pint0_demux; | ||
456 | setup_irq(gic_spi(33), &sh73a0_pint0_cascade); | ||
457 | |||
458 | sh73a0_pint1_cascade.name = "PINT1 cascade"; | ||
459 | sh73a0_pint1_cascade.handler = sh73a0_pint1_demux; | ||
460 | setup_irq(gic_spi(34), &sh73a0_pint1_cascade); | ||
274 | } | 461 | } |
diff --git a/arch/arm/mach-shmobile/pfc-sh73a0.c b/arch/arm/mach-shmobile/pfc-sh73a0.c index 3eed44eb98b..5abe02fbd6b 100644 --- a/arch/arm/mach-shmobile/pfc-sh73a0.c +++ b/arch/arm/mach-shmobile/pfc-sh73a0.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
23 | #include <linux/gpio.h> | 23 | #include <linux/gpio.h> |
24 | #include <mach/sh73a0.h> | 24 | #include <mach/sh73a0.h> |
25 | #include <mach/irqs.h> | ||
25 | 26 | ||
26 | #define _1(fn, pfx, sfx) fn(pfx, sfx) | 27 | #define _1(fn, pfx, sfx) fn(pfx, sfx) |
27 | 28 | ||
@@ -488,13 +489,26 @@ enum { | |||
488 | KEYIN5_PU_MARK, | 489 | KEYIN5_PU_MARK, |
489 | KEYIN6_PU_MARK, | 490 | KEYIN6_PU_MARK, |
490 | KEYIN7_PU_MARK, | 491 | KEYIN7_PU_MARK, |
492 | SDHICD0_PU_MARK, | ||
493 | SDHID0_0_PU_MARK, | ||
494 | SDHID0_1_PU_MARK, | ||
495 | SDHID0_2_PU_MARK, | ||
496 | SDHID0_3_PU_MARK, | ||
497 | SDHICMD0_PU_MARK, | ||
498 | SDHIWP0_PU_MARK, | ||
491 | SDHID1_0_PU_MARK, | 499 | SDHID1_0_PU_MARK, |
492 | SDHID1_1_PU_MARK, | 500 | SDHID1_1_PU_MARK, |
493 | SDHID1_2_PU_MARK, | 501 | SDHID1_2_PU_MARK, |
494 | SDHID1_3_PU_MARK, | 502 | SDHID1_3_PU_MARK, |
495 | SDHICMD1_PU_MARK, | 503 | SDHICMD1_PU_MARK, |
504 | SDHID2_0_PU_MARK, | ||
505 | SDHID2_1_PU_MARK, | ||
506 | SDHID2_2_PU_MARK, | ||
507 | SDHID2_3_PU_MARK, | ||
508 | SDHICMD2_PU_MARK, | ||
496 | MMCCMD0_PU_MARK, | 509 | MMCCMD0_PU_MARK, |
497 | MMCCMD1_PU_MARK, | 510 | MMCCMD1_PU_MARK, |
511 | FSIBISLD_PU_MARK, | ||
498 | FSIACK_PU_MARK, | 512 | FSIACK_PU_MARK, |
499 | FSIAILR_PU_MARK, | 513 | FSIAILR_PU_MARK, |
500 | FSIAIBT_PU_MARK, | 514 | FSIAIBT_PU_MARK, |
@@ -1387,19 +1401,28 @@ static pinmux_enum_t pinmux_data[] = { | |||
1387 | PINMUX_DATA(TS_SCK4_MARK, PORT268_FN3), | 1401 | PINMUX_DATA(TS_SCK4_MARK, PORT268_FN3), |
1388 | PINMUX_DATA(SDHICMD2_MARK, PORT269_FN1), | 1402 | PINMUX_DATA(SDHICMD2_MARK, PORT269_FN1), |
1389 | PINMUX_DATA(MMCCLK0_MARK, PORT270_FN1, MSEL4CR_MSEL15_0), | 1403 | PINMUX_DATA(MMCCLK0_MARK, PORT270_FN1, MSEL4CR_MSEL15_0), |
1390 | PINMUX_DATA(MMCD0_0_MARK, PORT271_FN1, MSEL4CR_MSEL15_0), | 1404 | PINMUX_DATA(MMCD0_0_MARK, PORT271_FN1, PORT271_IN_PU, |
1391 | PINMUX_DATA(MMCD0_1_MARK, PORT272_FN1, MSEL4CR_MSEL15_0), | 1405 | MSEL4CR_MSEL15_0), |
1392 | PINMUX_DATA(MMCD0_2_MARK, PORT273_FN1, MSEL4CR_MSEL15_0), | 1406 | PINMUX_DATA(MMCD0_1_MARK, PORT272_FN1, PORT272_IN_PU, |
1393 | PINMUX_DATA(MMCD0_3_MARK, PORT274_FN1, MSEL4CR_MSEL15_0), | 1407 | MSEL4CR_MSEL15_0), |
1394 | PINMUX_DATA(MMCD0_4_MARK, PORT275_FN1, MSEL4CR_MSEL15_0), \ | 1408 | PINMUX_DATA(MMCD0_2_MARK, PORT273_FN1, PORT273_IN_PU, |
1409 | MSEL4CR_MSEL15_0), | ||
1410 | PINMUX_DATA(MMCD0_3_MARK, PORT274_FN1, PORT274_IN_PU, | ||
1411 | MSEL4CR_MSEL15_0), | ||
1412 | PINMUX_DATA(MMCD0_4_MARK, PORT275_FN1, PORT275_IN_PU, | ||
1413 | MSEL4CR_MSEL15_0), \ | ||
1395 | PINMUX_DATA(TS_SPSYNC5_MARK, PORT275_FN3), | 1414 | PINMUX_DATA(TS_SPSYNC5_MARK, PORT275_FN3), |
1396 | PINMUX_DATA(MMCD0_5_MARK, PORT276_FN1, MSEL4CR_MSEL15_0), \ | 1415 | PINMUX_DATA(MMCD0_5_MARK, PORT276_FN1, PORT276_IN_PU, |
1416 | MSEL4CR_MSEL15_0), \ | ||
1397 | PINMUX_DATA(TS_SDAT5_MARK, PORT276_FN3), | 1417 | PINMUX_DATA(TS_SDAT5_MARK, PORT276_FN3), |
1398 | PINMUX_DATA(MMCD0_6_MARK, PORT277_FN1, MSEL4CR_MSEL15_0), \ | 1418 | PINMUX_DATA(MMCD0_6_MARK, PORT277_FN1, PORT277_IN_PU, |
1419 | MSEL4CR_MSEL15_0), \ | ||
1399 | PINMUX_DATA(TS_SDEN5_MARK, PORT277_FN3), | 1420 | PINMUX_DATA(TS_SDEN5_MARK, PORT277_FN3), |
1400 | PINMUX_DATA(MMCD0_7_MARK, PORT278_FN1, MSEL4CR_MSEL15_0), \ | 1421 | PINMUX_DATA(MMCD0_7_MARK, PORT278_FN1, PORT278_IN_PU, |
1422 | MSEL4CR_MSEL15_0), \ | ||
1401 | PINMUX_DATA(TS_SCK5_MARK, PORT278_FN3), | 1423 | PINMUX_DATA(TS_SCK5_MARK, PORT278_FN3), |
1402 | PINMUX_DATA(MMCCMD0_MARK, PORT279_FN1, MSEL4CR_MSEL15_0), | 1424 | PINMUX_DATA(MMCCMD0_MARK, PORT279_FN1, PORT279_IN_PU, |
1425 | MSEL4CR_MSEL15_0), | ||
1403 | PINMUX_DATA(RESETOUTS__MARK, PORT281_FN1), \ | 1426 | PINMUX_DATA(RESETOUTS__MARK, PORT281_FN1), \ |
1404 | PINMUX_DATA(EXTAL2OUT_MARK, PORT281_FN2), | 1427 | PINMUX_DATA(EXTAL2OUT_MARK, PORT281_FN2), |
1405 | PINMUX_DATA(MCP_WAIT__MCP_FRB_MARK, PORT288_FN1), | 1428 | PINMUX_DATA(MCP_WAIT__MCP_FRB_MARK, PORT288_FN1), |
@@ -1516,16 +1539,29 @@ static pinmux_enum_t pinmux_data[] = { | |||
1516 | PINMUX_DATA(KEYIN6_PU_MARK, PORT72_FN2, PORT72_IN_PU), | 1539 | PINMUX_DATA(KEYIN6_PU_MARK, PORT72_FN2, PORT72_IN_PU), |
1517 | PINMUX_DATA(KEYIN7_PU_MARK, PORT73_FN2, PORT73_IN_PU), | 1540 | PINMUX_DATA(KEYIN7_PU_MARK, PORT73_FN2, PORT73_IN_PU), |
1518 | 1541 | ||
1519 | PINMUX_DATA(SDHID1_0_PU_MARK, PORT259_IN_PU, PORT259_FN1), | 1542 | PINMUX_DATA(SDHICD0_PU_MARK, PORT251_FN1, PORT251_IN_PU), |
1520 | PINMUX_DATA(SDHID1_1_PU_MARK, PORT260_IN_PU, PORT260_FN1), | 1543 | PINMUX_DATA(SDHID0_0_PU_MARK, PORT252_FN1, PORT252_IN_PU), |
1521 | PINMUX_DATA(SDHID1_2_PU_MARK, PORT261_IN_PU, PORT261_FN1), | 1544 | PINMUX_DATA(SDHID0_1_PU_MARK, PORT253_FN1, PORT253_IN_PU), |
1522 | PINMUX_DATA(SDHID1_3_PU_MARK, PORT262_IN_PU, PORT262_FN1), | 1545 | PINMUX_DATA(SDHID0_2_PU_MARK, PORT254_FN1, PORT254_IN_PU), |
1523 | PINMUX_DATA(SDHICMD1_PU_MARK, PORT263_IN_PU, PORT263_FN1), | 1546 | PINMUX_DATA(SDHID0_3_PU_MARK, PORT255_FN1, PORT255_IN_PU), |
1547 | PINMUX_DATA(SDHICMD0_PU_MARK, PORT256_FN1, PORT256_IN_PU), | ||
1548 | PINMUX_DATA(SDHIWP0_PU_MARK, PORT257_FN1, PORT256_IN_PU), | ||
1549 | PINMUX_DATA(SDHID1_0_PU_MARK, PORT259_FN1, PORT259_IN_PU), | ||
1550 | PINMUX_DATA(SDHID1_1_PU_MARK, PORT260_FN1, PORT260_IN_PU), | ||
1551 | PINMUX_DATA(SDHID1_2_PU_MARK, PORT261_FN1, PORT261_IN_PU), | ||
1552 | PINMUX_DATA(SDHID1_3_PU_MARK, PORT262_FN1, PORT262_IN_PU), | ||
1553 | PINMUX_DATA(SDHICMD1_PU_MARK, PORT263_FN1, PORT263_IN_PU), | ||
1554 | PINMUX_DATA(SDHID2_0_PU_MARK, PORT265_FN1, PORT265_IN_PU), | ||
1555 | PINMUX_DATA(SDHID2_1_PU_MARK, PORT266_FN1, PORT266_IN_PU), | ||
1556 | PINMUX_DATA(SDHID2_2_PU_MARK, PORT267_FN1, PORT267_IN_PU), | ||
1557 | PINMUX_DATA(SDHID2_3_PU_MARK, PORT268_FN1, PORT268_IN_PU), | ||
1558 | PINMUX_DATA(SDHICMD2_PU_MARK, PORT269_FN1, PORT269_IN_PU), | ||
1524 | 1559 | ||
1525 | PINMUX_DATA(MMCCMD0_PU_MARK, PORT279_FN1, PORT279_IN_PU, | 1560 | PINMUX_DATA(MMCCMD0_PU_MARK, PORT279_FN1, PORT279_IN_PU, |
1526 | MSEL4CR_MSEL15_0), | 1561 | MSEL4CR_MSEL15_0), |
1527 | PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT279_IN_PU, | 1562 | PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU, |
1528 | MSEL4CR_MSEL15_1), | 1563 | MSEL4CR_MSEL15_1), |
1564 | PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU), | ||
1529 | PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU), | 1565 | PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU), |
1530 | PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU), | 1566 | PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU), |
1531 | PINMUX_DATA(FSIAIBT_PU_MARK, PORT51_FN5, PORT51_IN_PU), | 1567 | PINMUX_DATA(FSIAIBT_PU_MARK, PORT51_FN5, PORT51_IN_PU), |
@@ -2181,11 +2217,23 @@ static struct pinmux_gpio pinmux_gpios[] = { | |||
2181 | GPIO_FN(KEYIN5_PU), | 2217 | GPIO_FN(KEYIN5_PU), |
2182 | GPIO_FN(KEYIN6_PU), | 2218 | GPIO_FN(KEYIN6_PU), |
2183 | GPIO_FN(KEYIN7_PU), | 2219 | GPIO_FN(KEYIN7_PU), |
2220 | GPIO_FN(SDHICD0_PU), | ||
2221 | GPIO_FN(SDHID0_0_PU), | ||
2222 | GPIO_FN(SDHID0_1_PU), | ||
2223 | GPIO_FN(SDHID0_2_PU), | ||
2224 | GPIO_FN(SDHID0_3_PU), | ||
2225 | GPIO_FN(SDHICMD0_PU), | ||
2226 | GPIO_FN(SDHIWP0_PU), | ||
2184 | GPIO_FN(SDHID1_0_PU), | 2227 | GPIO_FN(SDHID1_0_PU), |
2185 | GPIO_FN(SDHID1_1_PU), | 2228 | GPIO_FN(SDHID1_1_PU), |
2186 | GPIO_FN(SDHID1_2_PU), | 2229 | GPIO_FN(SDHID1_2_PU), |
2187 | GPIO_FN(SDHID1_3_PU), | 2230 | GPIO_FN(SDHID1_3_PU), |
2188 | GPIO_FN(SDHICMD1_PU), | 2231 | GPIO_FN(SDHICMD1_PU), |
2232 | GPIO_FN(SDHID2_0_PU), | ||
2233 | GPIO_FN(SDHID2_1_PU), | ||
2234 | GPIO_FN(SDHID2_2_PU), | ||
2235 | GPIO_FN(SDHID2_3_PU), | ||
2236 | GPIO_FN(SDHICMD2_PU), | ||
2189 | GPIO_FN(MMCCMD0_PU), | 2237 | GPIO_FN(MMCCMD0_PU), |
2190 | GPIO_FN(MMCCMD1_PU), | 2238 | GPIO_FN(MMCCMD1_PU), |
2191 | GPIO_FN(FSIACK_PU), | 2239 | GPIO_FN(FSIACK_PU), |
@@ -2718,6 +2766,45 @@ static struct pinmux_data_reg pinmux_data_regs[] = { | |||
2718 | { }, | 2766 | { }, |
2719 | }; | 2767 | }; |
2720 | 2768 | ||
2769 | /* IRQ pins through INTCS with IRQ0->15 from 0x200 and IRQ16-31 from 0x3200 */ | ||
2770 | #define EXT_IRQ16L(n) intcs_evt2irq(0x200 + ((n) << 5)) | ||
2771 | #define EXT_IRQ16H(n) intcs_evt2irq(0x3200 + ((n - 16) << 5)) | ||
2772 | |||
2773 | static struct pinmux_irq pinmux_irqs[] = { | ||
2774 | PINMUX_IRQ(EXT_IRQ16H(19), PORT9_FN0), | ||
2775 | PINMUX_IRQ(EXT_IRQ16L(1), PORT10_FN0), | ||
2776 | PINMUX_IRQ(EXT_IRQ16L(0), PORT11_FN0), | ||
2777 | PINMUX_IRQ(EXT_IRQ16H(18), PORT13_FN0), | ||
2778 | PINMUX_IRQ(EXT_IRQ16H(20), PORT14_FN0), | ||
2779 | PINMUX_IRQ(EXT_IRQ16H(21), PORT15_FN0), | ||
2780 | PINMUX_IRQ(EXT_IRQ16H(31), PORT26_FN0), | ||
2781 | PINMUX_IRQ(EXT_IRQ16H(30), PORT27_FN0), | ||
2782 | PINMUX_IRQ(EXT_IRQ16H(29), PORT28_FN0), | ||
2783 | PINMUX_IRQ(EXT_IRQ16H(22), PORT40_FN0), | ||
2784 | PINMUX_IRQ(EXT_IRQ16H(23), PORT53_FN0), | ||
2785 | PINMUX_IRQ(EXT_IRQ16L(10), PORT54_FN0), | ||
2786 | PINMUX_IRQ(EXT_IRQ16L(9), PORT56_FN0), | ||
2787 | PINMUX_IRQ(EXT_IRQ16H(26), PORT115_FN0), | ||
2788 | PINMUX_IRQ(EXT_IRQ16H(27), PORT116_FN0), | ||
2789 | PINMUX_IRQ(EXT_IRQ16H(28), PORT117_FN0), | ||
2790 | PINMUX_IRQ(EXT_IRQ16H(24), PORT118_FN0), | ||
2791 | PINMUX_IRQ(EXT_IRQ16L(6), PORT147_FN0), | ||
2792 | PINMUX_IRQ(EXT_IRQ16L(2), PORT149_FN0), | ||
2793 | PINMUX_IRQ(EXT_IRQ16L(7), PORT150_FN0), | ||
2794 | PINMUX_IRQ(EXT_IRQ16L(12), PORT156_FN0), | ||
2795 | PINMUX_IRQ(EXT_IRQ16L(4), PORT159_FN0), | ||
2796 | PINMUX_IRQ(EXT_IRQ16H(25), PORT164_FN0), | ||
2797 | PINMUX_IRQ(EXT_IRQ16L(8), PORT223_FN0), | ||
2798 | PINMUX_IRQ(EXT_IRQ16L(3), PORT224_FN0), | ||
2799 | PINMUX_IRQ(EXT_IRQ16L(5), PORT227_FN0), | ||
2800 | PINMUX_IRQ(EXT_IRQ16H(17), PORT234_FN0), | ||
2801 | PINMUX_IRQ(EXT_IRQ16L(11), PORT238_FN0), | ||
2802 | PINMUX_IRQ(EXT_IRQ16L(13), PORT239_FN0), | ||
2803 | PINMUX_IRQ(EXT_IRQ16H(16), PORT249_FN0), | ||
2804 | PINMUX_IRQ(EXT_IRQ16L(14), PORT251_FN0), | ||
2805 | PINMUX_IRQ(EXT_IRQ16L(9), PORT308_FN0), | ||
2806 | }; | ||
2807 | |||
2721 | static struct pinmux_info sh73a0_pinmux_info = { | 2808 | static struct pinmux_info sh73a0_pinmux_info = { |
2722 | .name = "sh73a0_pfc", | 2809 | .name = "sh73a0_pfc", |
2723 | .reserved_id = PINMUX_RESERVED, | 2810 | .reserved_id = PINMUX_RESERVED, |
@@ -2738,6 +2825,9 @@ static struct pinmux_info sh73a0_pinmux_info = { | |||
2738 | 2825 | ||
2739 | .gpio_data = pinmux_data, | 2826 | .gpio_data = pinmux_data, |
2740 | .gpio_data_size = ARRAY_SIZE(pinmux_data), | 2827 | .gpio_data_size = ARRAY_SIZE(pinmux_data), |
2828 | |||
2829 | .gpio_irq = pinmux_irqs, | ||
2830 | .gpio_irq_size = ARRAY_SIZE(pinmux_irqs), | ||
2741 | }; | 2831 | }; |
2742 | 2832 | ||
2743 | void sh73a0_pinmux_init(void) | 2833 | void sh73a0_pinmux_init(void) |
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c index e4e485fa253..c49a833bf9b 100644 --- a/arch/arm/mach-shmobile/platsmp.c +++ b/arch/arm/mach-shmobile/platsmp.c | |||
@@ -21,9 +21,11 @@ | |||
21 | #include <asm/mach-types.h> | 21 | #include <asm/mach-types.h> |
22 | #include <mach/common.h> | 22 | #include <mach/common.h> |
23 | 23 | ||
24 | #define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2()) | ||
25 | |||
24 | static unsigned int __init shmobile_smp_get_core_count(void) | 26 | static unsigned int __init shmobile_smp_get_core_count(void) |
25 | { | 27 | { |
26 | if (machine_is_ag5evm()) | 28 | if (is_sh73a0()) |
27 | return sh73a0_get_core_count(); | 29 | return sh73a0_get_core_count(); |
28 | 30 | ||
29 | return 1; | 31 | return 1; |
@@ -31,7 +33,7 @@ static unsigned int __init shmobile_smp_get_core_count(void) | |||
31 | 33 | ||
32 | static void __init shmobile_smp_prepare_cpus(void) | 34 | static void __init shmobile_smp_prepare_cpus(void) |
33 | { | 35 | { |
34 | if (machine_is_ag5evm()) | 36 | if (is_sh73a0()) |
35 | sh73a0_smp_prepare_cpus(); | 37 | sh73a0_smp_prepare_cpus(); |
36 | } | 38 | } |
37 | 39 | ||
@@ -39,13 +41,13 @@ void __cpuinit platform_secondary_init(unsigned int cpu) | |||
39 | { | 41 | { |
40 | trace_hardirqs_off(); | 42 | trace_hardirqs_off(); |
41 | 43 | ||
42 | if (machine_is_ag5evm()) | 44 | if (is_sh73a0()) |
43 | sh73a0_secondary_init(cpu); | 45 | sh73a0_secondary_init(cpu); |
44 | } | 46 | } |
45 | 47 | ||
46 | int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) | 48 | int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) |
47 | { | 49 | { |
48 | if (machine_is_ag5evm()) | 50 | if (is_sh73a0()) |
49 | return sh73a0_boot_secondary(cpu); | 51 | return sh73a0_boot_secondary(cpu); |
50 | 52 | ||
51 | return -ENOSYS; | 53 | return -ENOSYS; |
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c index f5aa173c26b..97ef3e55dfd 100644 --- a/arch/arm/mach-tegra/pcie.c +++ b/arch/arm/mach-tegra/pcie.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <linux/irq.h> | 32 | #include <linux/irq.h> |
33 | #include <linux/clk.h> | 33 | #include <linux/clk.h> |
34 | #include <linux/delay.h> | 34 | #include <linux/delay.h> |
35 | #include <linux/export.h> | ||
35 | 36 | ||
36 | #include <asm/sizes.h> | 37 | #include <asm/sizes.h> |
37 | #include <asm/mach/pci.h> | 38 | #include <asm/mach/pci.h> |
diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c index f0394baa11f..5140deeddf7 100644 --- a/arch/arm/mach-u300/i2c.c +++ b/arch/arm/mach-u300/i2c.c | |||
@@ -256,57 +256,8 @@ static struct ab3100_platform_data ab3100_plf_data = { | |||
256 | }; | 256 | }; |
257 | #endif | 257 | #endif |
258 | 258 | ||
259 | #ifdef CONFIG_AB3550_CORE | ||
260 | static struct abx500_init_settings ab3550_init_settings[] = { | ||
261 | { | ||
262 | .bank = 0, | ||
263 | .reg = AB3550_IMR1, | ||
264 | .setting = 0xff | ||
265 | }, | ||
266 | { | ||
267 | .bank = 0, | ||
268 | .reg = AB3550_IMR2, | ||
269 | .setting = 0xff | ||
270 | }, | ||
271 | { | ||
272 | .bank = 0, | ||
273 | .reg = AB3550_IMR3, | ||
274 | .setting = 0xff | ||
275 | }, | ||
276 | { | ||
277 | .bank = 0, | ||
278 | .reg = AB3550_IMR4, | ||
279 | .setting = 0xff | ||
280 | }, | ||
281 | { | ||
282 | .bank = 0, | ||
283 | .reg = AB3550_IMR5, | ||
284 | /* The two most significant bits are not used */ | ||
285 | .setting = 0x3f | ||
286 | }, | ||
287 | }; | ||
288 | |||
289 | static struct ab3550_platform_data ab3550_plf_data = { | ||
290 | .irq = { | ||
291 | .base = IRQ_AB3550_BASE, | ||
292 | .count = (IRQ_AB3550_END - IRQ_AB3550_BASE + 1), | ||
293 | }, | ||
294 | .dev_data = { | ||
295 | }, | ||
296 | .init_settings = ab3550_init_settings, | ||
297 | .init_settings_sz = ARRAY_SIZE(ab3550_init_settings), | ||
298 | }; | ||
299 | #endif | ||
300 | |||
301 | static struct i2c_board_info __initdata bus0_i2c_board_info[] = { | 259 | static struct i2c_board_info __initdata bus0_i2c_board_info[] = { |
302 | #if defined(CONFIG_AB3550_CORE) | 260 | #ifdef CONFIG_AB3100_CORE |
303 | { | ||
304 | .type = "ab3550", | ||
305 | .addr = 0x4A, | ||
306 | .irq = IRQ_U300_IRQ0_EXT, | ||
307 | .platform_data = &ab3550_plf_data, | ||
308 | }, | ||
309 | #elif defined(CONFIG_AB3100_CORE) | ||
310 | { | 261 | { |
311 | .type = "ab3100", | 262 | .type = "ab3100", |
312 | .addr = 0x48, | 263 | .addr = 0x48, |
diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h index d270fea3292..db3fbfa1d6e 100644 --- a/arch/arm/mach-u300/include/mach/irqs.h +++ b/arch/arm/mach-u300/include/mach/irqs.h | |||
@@ -117,14 +117,6 @@ | |||
117 | #define IRQ_U300_GPIO_END (U300_VIC_IRQS_END) | 117 | #define IRQ_U300_GPIO_END (U300_VIC_IRQS_END) |
118 | #endif | 118 | #endif |
119 | 119 | ||
120 | /* Optional AB3550 mixsig chip */ | 120 | #define NR_IRQS (IRQ_U300_GPIO_END) |
121 | #ifdef CONFIG_AB3550_CORE | ||
122 | #define IRQ_AB3550_BASE (IRQ_U300_GPIO_END) | ||
123 | #define IRQ_AB3550_END (IRQ_AB3550_BASE + 38) | ||
124 | #else | ||
125 | #define IRQ_AB3550_END (IRQ_U300_GPIO_END) | ||
126 | #endif | ||
127 | |||
128 | #define NR_IRQS (IRQ_AB3550_END) | ||
129 | 121 | ||
130 | #endif | 122 | #endif |
diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c index e014aa749b0..82025ba70c0 100644 --- a/arch/arm/mach-ux500/board-u5500.c +++ b/arch/arm/mach-ux500/board-u5500.c | |||
@@ -10,6 +10,7 @@ | |||
10 | #include <linux/amba/bus.h> | 10 | #include <linux/amba/bus.h> |
11 | #include <linux/irq.h> | 11 | #include <linux/irq.h> |
12 | #include <linux/i2c.h> | 12 | #include <linux/i2c.h> |
13 | #include <linux/mfd/ab5500/ab5500.h> | ||
13 | 14 | ||
14 | #include <asm/mach/arch.h> | 15 | #include <asm/mach/arch.h> |
15 | #include <asm/mach-types.h> | 16 | #include <asm/mach-types.h> |
@@ -87,7 +88,6 @@ static struct lm3530_platform_data u5500_als_platform_data = { | |||
87 | .brt_val = 0x7F, /* Max brightness */ | 88 | .brt_val = 0x7F, /* Max brightness */ |
88 | }; | 89 | }; |
89 | 90 | ||
90 | |||
91 | static struct i2c_board_info __initdata u5500_i2c2_devices[] = { | 91 | static struct i2c_board_info __initdata u5500_i2c2_devices[] = { |
92 | { | 92 | { |
93 | /* Backlight */ | 93 | /* Backlight */ |
@@ -101,6 +101,30 @@ static void __init u5500_i2c_init(void) | |||
101 | db5500_add_i2c2(&u5500_i2c2_data); | 101 | db5500_add_i2c2(&u5500_i2c2_data); |
102 | i2c_register_board_info(2, ARRAY_AND_SIZE(u5500_i2c2_devices)); | 102 | i2c_register_board_info(2, ARRAY_AND_SIZE(u5500_i2c2_devices)); |
103 | } | 103 | } |
104 | |||
105 | static struct ab5500_platform_data ab5500_plf_data = { | ||
106 | .irq = { | ||
107 | .base = 0, | ||
108 | .count = 0, | ||
109 | }, | ||
110 | .init_settings = NULL, | ||
111 | .init_settings_sz = 0, | ||
112 | .pm_power_off = false, | ||
113 | }; | ||
114 | |||
115 | static struct platform_device ab5500_device = { | ||
116 | .name = "ab5500-core", | ||
117 | .id = 0, | ||
118 | .dev = { | ||
119 | .platform_data = &ab5500_plf_data, | ||
120 | }, | ||
121 | .num_resources = 0, | ||
122 | }; | ||
123 | |||
124 | static struct platform_device *u5500_platform_devices[] __initdata = { | ||
125 | &ab5500_device, | ||
126 | }; | ||
127 | |||
104 | static void __init u5500_uart_init(void) | 128 | static void __init u5500_uart_init(void) |
105 | { | 129 | { |
106 | db5500_add_uart0(NULL); | 130 | db5500_add_uart0(NULL); |
@@ -115,6 +139,9 @@ static void __init u5500_init_machine(void) | |||
115 | u5500_i2c_init(); | 139 | u5500_i2c_init(); |
116 | u5500_sdi_init(); | 140 | u5500_sdi_init(); |
117 | u5500_uart_init(); | 141 | u5500_uart_init(); |
142 | |||
143 | platform_add_devices(u5500_platform_devices, | ||
144 | ARRAY_SIZE(u5500_platform_devices)); | ||
118 | } | 145 | } |
119 | 146 | ||
120 | MACHINE_START(U5500, "ST-Ericsson U5500 Platform") | 147 | MACHINE_START(U5500, "ST-Ericsson U5500 Platform") |
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 1405d0eb7ed..f4185749437 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c | |||
@@ -47,6 +47,6 @@ void __init ux500_init_irq(void) | |||
47 | if (cpu_is_u5500()) | 47 | if (cpu_is_u5500()) |
48 | db5500_prcmu_early_init(); | 48 | db5500_prcmu_early_init(); |
49 | if (cpu_is_u8500()) | 49 | if (cpu_is_u8500()) |
50 | prcmu_early_init(); | 50 | db8500_prcmu_early_init(); |
51 | clk_init(); | 51 | clk_init(); |
52 | } | 52 | } |
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c index 7cab7917942..7599e2625c7 100644 --- a/arch/arm/mm/fault-armv.c +++ b/arch/arm/mm/fault-armv.c | |||
@@ -8,7 +8,6 @@ | |||
8 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
10 | */ | 10 | */ |
11 | #include <linux/module.h> | ||
12 | #include <linux/sched.h> | 11 | #include <linux/sched.h> |
13 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
14 | #include <linux/mm.h> | 13 | #include <linux/mm.h> |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 04e9a92bb47..fbdd12ea3a5 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/bootmem.h> | 14 | #include <linux/bootmem.h> |
15 | #include <linux/mman.h> | 15 | #include <linux/mman.h> |
16 | #include <linux/export.h> | ||
16 | #include <linux/nodemask.h> | 17 | #include <linux/nodemask.h> |
17 | #include <linux/initrd.h> | 18 | #include <linux/initrd.h> |
18 | #include <linux/of_fdt.h> | 19 | #include <linux/of_fdt.h> |
diff --git a/arch/arm/plat-iop/gpio.c b/arch/arm/plat-iop/gpio.c index 640e498c12e..e4de9be78fe 100644 --- a/arch/arm/plat-iop/gpio.c +++ b/arch/arm/plat-iop/gpio.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/types.h> | 15 | #include <linux/types.h> |
16 | #include <linux/errno.h> | 16 | #include <linux/errno.h> |
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
18 | #include <linux/export.h> | ||
18 | #include <asm/hardware/iop3xx.h> | 19 | #include <asm/hardware/iop3xx.h> |
19 | 20 | ||
20 | void gpio_line_config(int line, int direction) | 21 | void gpio_line_config(int line, int direction) |
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index 7cdc5161ff2..568dd0223d1 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/io.h> | 22 | #include <linux/io.h> |
23 | #include <linux/clocksource.h> | 23 | #include <linux/clocksource.h> |
24 | #include <linux/clockchips.h> | 24 | #include <linux/clockchips.h> |
25 | #include <linux/export.h> | ||
25 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
26 | #include <asm/irq.h> | 27 | #include <asm/irq.h> |
27 | #include <asm/sched_clock.h> | 28 | #include <asm/sched_clock.h> |
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index 3ba4d11ca73..567e4b54f24 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/list.h> | 15 | #include <linux/list.h> |
16 | #include <linux/errno.h> | 16 | #include <linux/errno.h> |
17 | #include <linux/export.h> | ||
17 | #include <linux/err.h> | 18 | #include <linux/err.h> |
18 | #include <linux/string.h> | 19 | #include <linux/string.h> |
19 | #include <linux/clk.h> | 20 | #include <linux/clk.h> |
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c index 69ddc9f76c1..ad80112c227 100644 --- a/arch/arm/plat-omap/mailbox.c +++ b/arch/arm/plat-omap/mailbox.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/kfifo.h> | 29 | #include <linux/kfifo.h> |
30 | #include <linux/err.h> | 30 | #include <linux/err.h> |
31 | #include <linux/notifier.h> | 31 | #include <linux/notifier.h> |
32 | #include <linux/module.h> | ||
32 | 33 | ||
33 | #include <plat/mailbox.h> | 34 | #include <plat/mailbox.h> |
34 | 35 | ||
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index ef4ffc21bba..e8d98693d2d 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c | |||
@@ -78,6 +78,7 @@ | |||
78 | #undef DEBUG | 78 | #undef DEBUG |
79 | 79 | ||
80 | #include <linux/kernel.h> | 80 | #include <linux/kernel.h> |
81 | #include <linux/export.h> | ||
81 | #include <linux/platform_device.h> | 82 | #include <linux/platform_device.h> |
82 | #include <linux/slab.h> | 83 | #include <linux/slab.h> |
83 | #include <linux/err.h> | 84 | #include <linux/err.h> |
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig index 8c5b3029b39..d8973ac46bc 100644 --- a/arch/arm/plat-s3c24xx/Kconfig +++ b/arch/arm/plat-s3c24xx/Kconfig | |||
@@ -9,7 +9,6 @@ config PLAT_S3C24XX | |||
9 | select NO_IOPORT | 9 | select NO_IOPORT |
10 | select ARCH_REQUIRE_GPIOLIB | 10 | select ARCH_REQUIRE_GPIOLIB |
11 | select S3C_DEV_NAND | 11 | select S3C_DEV_NAND |
12 | select S3C_GPIO_CFG_S3C24XX | ||
13 | help | 12 | help |
14 | Base platform code for any Samsung S3C24XX device | 13 | Base platform code for any Samsung S3C24XX device |
15 | 14 | ||
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile index 0291bd6e236..b2b01125de6 100644 --- a/arch/arm/plat-s3c24xx/Makefile +++ b/arch/arm/plat-s3c24xx/Makefile | |||
@@ -14,9 +14,7 @@ obj- := | |||
14 | 14 | ||
15 | obj-y += cpu.o | 15 | obj-y += cpu.o |
16 | obj-y += irq.o | 16 | obj-y += irq.o |
17 | obj-y += devs.o | 17 | obj-y += dev-uart.o |
18 | obj-y += gpio.o | ||
19 | obj-y += gpiolib.o | ||
20 | obj-y += clock.o | 18 | obj-y += clock.o |
21 | obj-$(CONFIG_S3C24XX_DCLK) += clock-dclk.o | 19 | obj-$(CONFIG_S3C24XX_DCLK) += clock-dclk.o |
22 | 20 | ||
diff --git a/arch/arm/plat-s3c24xx/dev-uart.c b/arch/arm/plat-s3c24xx/dev-uart.c new file mode 100644 index 00000000000..9ab22e662ff --- /dev/null +++ b/arch/arm/plat-s3c24xx/dev-uart.c | |||
@@ -0,0 +1,100 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/dev-uart.c | ||
2 | * | ||
3 | * Copyright (c) 2004 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * Base S3C24XX UART resource and platform device definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/types.h> | ||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/list.h> | ||
17 | #include <linux/serial_core.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | |||
20 | #include <asm/mach/arch.h> | ||
21 | #include <asm/mach/map.h> | ||
22 | #include <asm/mach/irq.h> | ||
23 | #include <mach/hardware.h> | ||
24 | #include <mach/map.h> | ||
25 | |||
26 | #include <plat/devs.h> | ||
27 | #include <plat/regs-serial.h> | ||
28 | |||
29 | /* Serial port registrations */ | ||
30 | |||
31 | static struct resource s3c2410_uart0_resource[] = { | ||
32 | [0] = { | ||
33 | .start = S3C2410_PA_UART0, | ||
34 | .end = S3C2410_PA_UART0 + 0x3fff, | ||
35 | .flags = IORESOURCE_MEM, | ||
36 | }, | ||
37 | [1] = { | ||
38 | .start = IRQ_S3CUART_RX0, | ||
39 | .end = IRQ_S3CUART_ERR0, | ||
40 | .flags = IORESOURCE_IRQ, | ||
41 | } | ||
42 | }; | ||
43 | |||
44 | static struct resource s3c2410_uart1_resource[] = { | ||
45 | [0] = { | ||
46 | .start = S3C2410_PA_UART1, | ||
47 | .end = S3C2410_PA_UART1 + 0x3fff, | ||
48 | .flags = IORESOURCE_MEM, | ||
49 | }, | ||
50 | [1] = { | ||
51 | .start = IRQ_S3CUART_RX1, | ||
52 | .end = IRQ_S3CUART_ERR1, | ||
53 | .flags = IORESOURCE_IRQ, | ||
54 | } | ||
55 | }; | ||
56 | |||
57 | static struct resource s3c2410_uart2_resource[] = { | ||
58 | [0] = { | ||
59 | .start = S3C2410_PA_UART2, | ||
60 | .end = S3C2410_PA_UART2 + 0x3fff, | ||
61 | .flags = IORESOURCE_MEM, | ||
62 | }, | ||
63 | [1] = { | ||
64 | .start = IRQ_S3CUART_RX2, | ||
65 | .end = IRQ_S3CUART_ERR2, | ||
66 | .flags = IORESOURCE_IRQ, | ||
67 | } | ||
68 | }; | ||
69 | |||
70 | static struct resource s3c2410_uart3_resource[] = { | ||
71 | [0] = { | ||
72 | .start = S3C2443_PA_UART3, | ||
73 | .end = S3C2443_PA_UART3 + 0x3fff, | ||
74 | .flags = IORESOURCE_MEM, | ||
75 | }, | ||
76 | [1] = { | ||
77 | .start = IRQ_S3CUART_RX3, | ||
78 | .end = IRQ_S3CUART_ERR3, | ||
79 | .flags = IORESOURCE_IRQ, | ||
80 | }, | ||
81 | }; | ||
82 | |||
83 | struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = { | ||
84 | [0] = { | ||
85 | .resources = s3c2410_uart0_resource, | ||
86 | .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource), | ||
87 | }, | ||
88 | [1] = { | ||
89 | .resources = s3c2410_uart1_resource, | ||
90 | .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource), | ||
91 | }, | ||
92 | [2] = { | ||
93 | .resources = s3c2410_uart2_resource, | ||
94 | .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource), | ||
95 | }, | ||
96 | [3] = { | ||
97 | .resources = s3c2410_uart3_resource, | ||
98 | .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource), | ||
99 | }, | ||
100 | }; | ||
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c deleted file mode 100644 index a76bf2df333..00000000000 --- a/arch/arm/plat-s3c24xx/devs.c +++ /dev/null | |||
@@ -1,528 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/devs.c | ||
2 | * | ||
3 | * Copyright (c) 2004 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * Base S3C24XX platform device definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/types.h> | ||
16 | #include <linux/interrupt.h> | ||
17 | #include <linux/list.h> | ||
18 | #include <linux/timer.h> | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/serial_core.h> | ||
21 | #include <linux/platform_device.h> | ||
22 | #include <linux/io.h> | ||
23 | #include <linux/slab.h> | ||
24 | #include <linux/string.h> | ||
25 | #include <linux/dma-mapping.h> | ||
26 | |||
27 | #include <asm/mach/arch.h> | ||
28 | #include <asm/mach/map.h> | ||
29 | #include <asm/mach/irq.h> | ||
30 | #include <mach/fb.h> | ||
31 | #include <mach/hardware.h> | ||
32 | #include <mach/dma.h> | ||
33 | #include <mach/irqs.h> | ||
34 | #include <asm/irq.h> | ||
35 | |||
36 | #include <plat/regs-serial.h> | ||
37 | #include <plat/udc.h> | ||
38 | #include <plat/mci.h> | ||
39 | |||
40 | #include <plat/devs.h> | ||
41 | #include <plat/cpu.h> | ||
42 | #include <plat/regs-spi.h> | ||
43 | #include <plat/ts.h> | ||
44 | |||
45 | /* Serial port registrations */ | ||
46 | |||
47 | static struct resource s3c2410_uart0_resource[] = { | ||
48 | [0] = { | ||
49 | .start = S3C2410_PA_UART0, | ||
50 | .end = S3C2410_PA_UART0 + 0x3fff, | ||
51 | .flags = IORESOURCE_MEM, | ||
52 | }, | ||
53 | [1] = { | ||
54 | .start = IRQ_S3CUART_RX0, | ||
55 | .end = IRQ_S3CUART_ERR0, | ||
56 | .flags = IORESOURCE_IRQ, | ||
57 | } | ||
58 | }; | ||
59 | |||
60 | static struct resource s3c2410_uart1_resource[] = { | ||
61 | [0] = { | ||
62 | .start = S3C2410_PA_UART1, | ||
63 | .end = S3C2410_PA_UART1 + 0x3fff, | ||
64 | .flags = IORESOURCE_MEM, | ||
65 | }, | ||
66 | [1] = { | ||
67 | .start = IRQ_S3CUART_RX1, | ||
68 | .end = IRQ_S3CUART_ERR1, | ||
69 | .flags = IORESOURCE_IRQ, | ||
70 | } | ||
71 | }; | ||
72 | |||
73 | static struct resource s3c2410_uart2_resource[] = { | ||
74 | [0] = { | ||
75 | .start = S3C2410_PA_UART2, | ||
76 | .end = S3C2410_PA_UART2 + 0x3fff, | ||
77 | .flags = IORESOURCE_MEM, | ||
78 | }, | ||
79 | [1] = { | ||
80 | .start = IRQ_S3CUART_RX2, | ||
81 | .end = IRQ_S3CUART_ERR2, | ||
82 | .flags = IORESOURCE_IRQ, | ||
83 | } | ||
84 | }; | ||
85 | |||
86 | static struct resource s3c2410_uart3_resource[] = { | ||
87 | [0] = { | ||
88 | .start = S3C2443_PA_UART3, | ||
89 | .end = S3C2443_PA_UART3 + 0x3fff, | ||
90 | .flags = IORESOURCE_MEM, | ||
91 | }, | ||
92 | [1] = { | ||
93 | .start = IRQ_S3CUART_RX3, | ||
94 | .end = IRQ_S3CUART_ERR3, | ||
95 | .flags = IORESOURCE_IRQ, | ||
96 | }, | ||
97 | }; | ||
98 | |||
99 | struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = { | ||
100 | [0] = { | ||
101 | .resources = s3c2410_uart0_resource, | ||
102 | .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource), | ||
103 | }, | ||
104 | [1] = { | ||
105 | .resources = s3c2410_uart1_resource, | ||
106 | .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource), | ||
107 | }, | ||
108 | [2] = { | ||
109 | .resources = s3c2410_uart2_resource, | ||
110 | .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource), | ||
111 | }, | ||
112 | [3] = { | ||
113 | .resources = s3c2410_uart3_resource, | ||
114 | .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource), | ||
115 | }, | ||
116 | }; | ||
117 | |||
118 | /* LCD Controller */ | ||
119 | |||
120 | static struct resource s3c_lcd_resource[] = { | ||
121 | [0] = { | ||
122 | .start = S3C24XX_PA_LCD, | ||
123 | .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1, | ||
124 | .flags = IORESOURCE_MEM, | ||
125 | }, | ||
126 | [1] = { | ||
127 | .start = IRQ_LCD, | ||
128 | .end = IRQ_LCD, | ||
129 | .flags = IORESOURCE_IRQ, | ||
130 | } | ||
131 | |||
132 | }; | ||
133 | |||
134 | static u64 s3c_device_lcd_dmamask = 0xffffffffUL; | ||
135 | |||
136 | struct platform_device s3c_device_lcd = { | ||
137 | .name = "s3c2410-lcd", | ||
138 | .id = -1, | ||
139 | .num_resources = ARRAY_SIZE(s3c_lcd_resource), | ||
140 | .resource = s3c_lcd_resource, | ||
141 | .dev = { | ||
142 | .dma_mask = &s3c_device_lcd_dmamask, | ||
143 | .coherent_dma_mask = 0xffffffffUL | ||
144 | } | ||
145 | }; | ||
146 | |||
147 | EXPORT_SYMBOL(s3c_device_lcd); | ||
148 | |||
149 | void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) | ||
150 | { | ||
151 | struct s3c2410fb_mach_info *npd; | ||
152 | |||
153 | npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd); | ||
154 | if (npd) { | ||
155 | npd->displays = kmemdup(pd->displays, | ||
156 | sizeof(struct s3c2410fb_display) * npd->num_displays, | ||
157 | GFP_KERNEL); | ||
158 | if (!npd->displays) | ||
159 | printk(KERN_ERR "no memory for LCD display data\n"); | ||
160 | } else { | ||
161 | printk(KERN_ERR "no memory for LCD platform data\n"); | ||
162 | } | ||
163 | } | ||
164 | |||
165 | /* Touchscreen */ | ||
166 | |||
167 | static struct resource s3c_ts_resource[] = { | ||
168 | [0] = { | ||
169 | .start = S3C24XX_PA_ADC, | ||
170 | .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1, | ||
171 | .flags = IORESOURCE_MEM, | ||
172 | }, | ||
173 | [1] = { | ||
174 | .start = IRQ_TC, | ||
175 | .end = IRQ_TC, | ||
176 | .flags = IORESOURCE_IRQ, | ||
177 | }, | ||
178 | |||
179 | }; | ||
180 | |||
181 | struct platform_device s3c_device_ts = { | ||
182 | .name = "s3c2410-ts", | ||
183 | .id = -1, | ||
184 | .dev.parent = &s3c_device_adc.dev, | ||
185 | .num_resources = ARRAY_SIZE(s3c_ts_resource), | ||
186 | .resource = s3c_ts_resource, | ||
187 | }; | ||
188 | EXPORT_SYMBOL(s3c_device_ts); | ||
189 | |||
190 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info) | ||
191 | { | ||
192 | s3c_set_platdata(hard_s3c2410ts_info, | ||
193 | sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts); | ||
194 | } | ||
195 | |||
196 | /* USB Device (Gadget)*/ | ||
197 | |||
198 | static struct resource s3c_usbgadget_resource[] = { | ||
199 | [0] = { | ||
200 | .start = S3C24XX_PA_USBDEV, | ||
201 | .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1, | ||
202 | .flags = IORESOURCE_MEM, | ||
203 | }, | ||
204 | [1] = { | ||
205 | .start = IRQ_USBD, | ||
206 | .end = IRQ_USBD, | ||
207 | .flags = IORESOURCE_IRQ, | ||
208 | } | ||
209 | |||
210 | }; | ||
211 | |||
212 | struct platform_device s3c_device_usbgadget = { | ||
213 | .name = "s3c2410-usbgadget", | ||
214 | .id = -1, | ||
215 | .num_resources = ARRAY_SIZE(s3c_usbgadget_resource), | ||
216 | .resource = s3c_usbgadget_resource, | ||
217 | }; | ||
218 | |||
219 | EXPORT_SYMBOL(s3c_device_usbgadget); | ||
220 | |||
221 | void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd) | ||
222 | { | ||
223 | s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget); | ||
224 | } | ||
225 | |||
226 | /* USB High Speed 2.0 Device (Gadget) */ | ||
227 | static struct resource s3c_hsudc_resource[] = { | ||
228 | [0] = { | ||
229 | .start = S3C2416_PA_HSUDC, | ||
230 | .end = S3C2416_PA_HSUDC + S3C2416_SZ_HSUDC - 1, | ||
231 | .flags = IORESOURCE_MEM, | ||
232 | }, | ||
233 | [1] = { | ||
234 | .start = IRQ_USBD, | ||
235 | .end = IRQ_USBD, | ||
236 | .flags = IORESOURCE_IRQ, | ||
237 | } | ||
238 | }; | ||
239 | |||
240 | static u64 s3c_hsudc_dmamask = DMA_BIT_MASK(32); | ||
241 | |||
242 | struct platform_device s3c_device_usb_hsudc = { | ||
243 | .name = "s3c-hsudc", | ||
244 | .id = -1, | ||
245 | .num_resources = ARRAY_SIZE(s3c_hsudc_resource), | ||
246 | .resource = s3c_hsudc_resource, | ||
247 | .dev = { | ||
248 | .dma_mask = &s3c_hsudc_dmamask, | ||
249 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
250 | }, | ||
251 | }; | ||
252 | |||
253 | void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd) | ||
254 | { | ||
255 | s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc); | ||
256 | } | ||
257 | |||
258 | /* IIS */ | ||
259 | |||
260 | static struct resource s3c_iis_resource[] = { | ||
261 | [0] = { | ||
262 | .start = S3C24XX_PA_IIS, | ||
263 | .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1, | ||
264 | .flags = IORESOURCE_MEM, | ||
265 | } | ||
266 | }; | ||
267 | |||
268 | static u64 s3c_device_iis_dmamask = 0xffffffffUL; | ||
269 | |||
270 | struct platform_device s3c_device_iis = { | ||
271 | .name = "s3c24xx-iis", | ||
272 | .id = -1, | ||
273 | .num_resources = ARRAY_SIZE(s3c_iis_resource), | ||
274 | .resource = s3c_iis_resource, | ||
275 | .dev = { | ||
276 | .dma_mask = &s3c_device_iis_dmamask, | ||
277 | .coherent_dma_mask = 0xffffffffUL | ||
278 | } | ||
279 | }; | ||
280 | |||
281 | EXPORT_SYMBOL(s3c_device_iis); | ||
282 | |||
283 | /* RTC */ | ||
284 | |||
285 | static struct resource s3c_rtc_resource[] = { | ||
286 | [0] = { | ||
287 | .start = S3C24XX_PA_RTC, | ||
288 | .end = S3C24XX_PA_RTC + 0xff, | ||
289 | .flags = IORESOURCE_MEM, | ||
290 | }, | ||
291 | [1] = { | ||
292 | .start = IRQ_RTC, | ||
293 | .end = IRQ_RTC, | ||
294 | .flags = IORESOURCE_IRQ, | ||
295 | }, | ||
296 | [2] = { | ||
297 | .start = IRQ_TICK, | ||
298 | .end = IRQ_TICK, | ||
299 | .flags = IORESOURCE_IRQ | ||
300 | } | ||
301 | }; | ||
302 | |||
303 | struct platform_device s3c_device_rtc = { | ||
304 | .name = "s3c2410-rtc", | ||
305 | .id = -1, | ||
306 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | ||
307 | .resource = s3c_rtc_resource, | ||
308 | }; | ||
309 | |||
310 | EXPORT_SYMBOL(s3c_device_rtc); | ||
311 | |||
312 | /* ADC */ | ||
313 | |||
314 | static struct resource s3c_adc_resource[] = { | ||
315 | [0] = { | ||
316 | .start = S3C24XX_PA_ADC, | ||
317 | .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1, | ||
318 | .flags = IORESOURCE_MEM, | ||
319 | }, | ||
320 | [1] = { | ||
321 | .start = IRQ_TC, | ||
322 | .end = IRQ_TC, | ||
323 | .flags = IORESOURCE_IRQ, | ||
324 | }, | ||
325 | [2] = { | ||
326 | .start = IRQ_ADC, | ||
327 | .end = IRQ_ADC, | ||
328 | .flags = IORESOURCE_IRQ, | ||
329 | } | ||
330 | |||
331 | }; | ||
332 | |||
333 | struct platform_device s3c_device_adc = { | ||
334 | .name = "s3c24xx-adc", | ||
335 | .id = -1, | ||
336 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | ||
337 | .resource = s3c_adc_resource, | ||
338 | }; | ||
339 | |||
340 | /* SDI */ | ||
341 | |||
342 | static struct resource s3c_sdi_resource[] = { | ||
343 | [0] = { | ||
344 | .start = S3C24XX_PA_SDI, | ||
345 | .end = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1, | ||
346 | .flags = IORESOURCE_MEM, | ||
347 | }, | ||
348 | [1] = { | ||
349 | .start = IRQ_SDI, | ||
350 | .end = IRQ_SDI, | ||
351 | .flags = IORESOURCE_IRQ, | ||
352 | } | ||
353 | |||
354 | }; | ||
355 | |||
356 | struct platform_device s3c_device_sdi = { | ||
357 | .name = "s3c2410-sdi", | ||
358 | .id = -1, | ||
359 | .num_resources = ARRAY_SIZE(s3c_sdi_resource), | ||
360 | .resource = s3c_sdi_resource, | ||
361 | }; | ||
362 | |||
363 | EXPORT_SYMBOL(s3c_device_sdi); | ||
364 | |||
365 | void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) | ||
366 | { | ||
367 | s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata), | ||
368 | &s3c_device_sdi); | ||
369 | } | ||
370 | |||
371 | |||
372 | /* SPI (0) */ | ||
373 | |||
374 | static struct resource s3c_spi0_resource[] = { | ||
375 | [0] = { | ||
376 | .start = S3C24XX_PA_SPI, | ||
377 | .end = S3C24XX_PA_SPI + 0x1f, | ||
378 | .flags = IORESOURCE_MEM, | ||
379 | }, | ||
380 | [1] = { | ||
381 | .start = IRQ_SPI0, | ||
382 | .end = IRQ_SPI0, | ||
383 | .flags = IORESOURCE_IRQ, | ||
384 | } | ||
385 | |||
386 | }; | ||
387 | |||
388 | static u64 s3c_device_spi0_dmamask = 0xffffffffUL; | ||
389 | |||
390 | struct platform_device s3c_device_spi0 = { | ||
391 | .name = "s3c2410-spi", | ||
392 | .id = 0, | ||
393 | .num_resources = ARRAY_SIZE(s3c_spi0_resource), | ||
394 | .resource = s3c_spi0_resource, | ||
395 | .dev = { | ||
396 | .dma_mask = &s3c_device_spi0_dmamask, | ||
397 | .coherent_dma_mask = 0xffffffffUL | ||
398 | } | ||
399 | }; | ||
400 | |||
401 | EXPORT_SYMBOL(s3c_device_spi0); | ||
402 | |||
403 | /* SPI (1) */ | ||
404 | |||
405 | static struct resource s3c_spi1_resource[] = { | ||
406 | [0] = { | ||
407 | .start = S3C24XX_PA_SPI + S3C2410_SPI1, | ||
408 | .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f, | ||
409 | .flags = IORESOURCE_MEM, | ||
410 | }, | ||
411 | [1] = { | ||
412 | .start = IRQ_SPI1, | ||
413 | .end = IRQ_SPI1, | ||
414 | .flags = IORESOURCE_IRQ, | ||
415 | } | ||
416 | |||
417 | }; | ||
418 | |||
419 | static u64 s3c_device_spi1_dmamask = 0xffffffffUL; | ||
420 | |||
421 | struct platform_device s3c_device_spi1 = { | ||
422 | .name = "s3c2410-spi", | ||
423 | .id = 1, | ||
424 | .num_resources = ARRAY_SIZE(s3c_spi1_resource), | ||
425 | .resource = s3c_spi1_resource, | ||
426 | .dev = { | ||
427 | .dma_mask = &s3c_device_spi1_dmamask, | ||
428 | .coherent_dma_mask = 0xffffffffUL | ||
429 | } | ||
430 | }; | ||
431 | |||
432 | EXPORT_SYMBOL(s3c_device_spi1); | ||
433 | |||
434 | #ifdef CONFIG_CPU_S3C2440 | ||
435 | |||
436 | /* Camif Controller */ | ||
437 | |||
438 | static struct resource s3c_camif_resource[] = { | ||
439 | [0] = { | ||
440 | .start = S3C2440_PA_CAMIF, | ||
441 | .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1, | ||
442 | .flags = IORESOURCE_MEM, | ||
443 | }, | ||
444 | [1] = { | ||
445 | .start = IRQ_CAM, | ||
446 | .end = IRQ_CAM, | ||
447 | .flags = IORESOURCE_IRQ, | ||
448 | } | ||
449 | |||
450 | }; | ||
451 | |||
452 | static u64 s3c_device_camif_dmamask = 0xffffffffUL; | ||
453 | |||
454 | struct platform_device s3c_device_camif = { | ||
455 | .name = "s3c2440-camif", | ||
456 | .id = -1, | ||
457 | .num_resources = ARRAY_SIZE(s3c_camif_resource), | ||
458 | .resource = s3c_camif_resource, | ||
459 | .dev = { | ||
460 | .dma_mask = &s3c_device_camif_dmamask, | ||
461 | .coherent_dma_mask = 0xffffffffUL | ||
462 | } | ||
463 | }; | ||
464 | |||
465 | EXPORT_SYMBOL(s3c_device_camif); | ||
466 | |||
467 | /* AC97 */ | ||
468 | |||
469 | static struct resource s3c_ac97_resource[] = { | ||
470 | [0] = { | ||
471 | .start = S3C2440_PA_AC97, | ||
472 | .end = S3C2440_PA_AC97 + S3C2440_SZ_AC97 -1, | ||
473 | .flags = IORESOURCE_MEM, | ||
474 | }, | ||
475 | [1] = { | ||
476 | .start = IRQ_S3C244x_AC97, | ||
477 | .end = IRQ_S3C244x_AC97, | ||
478 | .flags = IORESOURCE_IRQ, | ||
479 | }, | ||
480 | [2] = { | ||
481 | .name = "PCM out", | ||
482 | .start = DMACH_PCM_OUT, | ||
483 | .end = DMACH_PCM_OUT, | ||
484 | .flags = IORESOURCE_DMA, | ||
485 | }, | ||
486 | [3] = { | ||
487 | .name = "PCM in", | ||
488 | .start = DMACH_PCM_IN, | ||
489 | .end = DMACH_PCM_IN, | ||
490 | .flags = IORESOURCE_DMA, | ||
491 | }, | ||
492 | [4] = { | ||
493 | .name = "Mic in", | ||
494 | .start = DMACH_MIC_IN, | ||
495 | .end = DMACH_MIC_IN, | ||
496 | .flags = IORESOURCE_DMA, | ||
497 | }, | ||
498 | }; | ||
499 | |||
500 | static u64 s3c_device_audio_dmamask = 0xffffffffUL; | ||
501 | |||
502 | struct platform_device s3c_device_ac97 = { | ||
503 | .name = "samsung-ac97", | ||
504 | .id = -1, | ||
505 | .num_resources = ARRAY_SIZE(s3c_ac97_resource), | ||
506 | .resource = s3c_ac97_resource, | ||
507 | .dev = { | ||
508 | .dma_mask = &s3c_device_audio_dmamask, | ||
509 | .coherent_dma_mask = 0xffffffffUL | ||
510 | } | ||
511 | }; | ||
512 | |||
513 | EXPORT_SYMBOL(s3c_device_ac97); | ||
514 | |||
515 | /* ASoC I2S */ | ||
516 | |||
517 | struct platform_device s3c2412_device_iis = { | ||
518 | .name = "s3c2412-iis", | ||
519 | .id = -1, | ||
520 | .dev = { | ||
521 | .dma_mask = &s3c_device_audio_dmamask, | ||
522 | .coherent_dma_mask = 0xffffffffUL | ||
523 | } | ||
524 | }; | ||
525 | |||
526 | EXPORT_SYMBOL(s3c2412_device_iis); | ||
527 | |||
528 | #endif // CONFIG_CPU_S32440 | ||
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index 539bd0e3def..53754bcf15a 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c | |||
@@ -1094,14 +1094,14 @@ EXPORT_SYMBOL(s3c2410_dma_config); | |||
1094 | * | 1094 | * |
1095 | * configure the dma source/destination hardware type and address | 1095 | * configure the dma source/destination hardware type and address |
1096 | * | 1096 | * |
1097 | * source: S3C2410_DMASRC_HW: source is hardware | 1097 | * source: DMA_FROM_DEVICE: source is hardware |
1098 | * S3C2410_DMASRC_MEM: source is memory | 1098 | * DMA_TO_DEVICE: source is memory |
1099 | * | 1099 | * |
1100 | * devaddr: physical address of the source | 1100 | * devaddr: physical address of the source |
1101 | */ | 1101 | */ |
1102 | 1102 | ||
1103 | int s3c2410_dma_devconfig(enum dma_ch channel, | 1103 | int s3c2410_dma_devconfig(enum dma_ch channel, |
1104 | enum s3c2410_dmasrc source, | 1104 | enum dma_data_direction source, |
1105 | unsigned long devaddr) | 1105 | unsigned long devaddr) |
1106 | { | 1106 | { |
1107 | struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); | 1107 | struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); |
@@ -1131,7 +1131,7 @@ int s3c2410_dma_devconfig(enum dma_ch channel, | |||
1131 | hwcfg |= S3C2410_DISRCC_INC; | 1131 | hwcfg |= S3C2410_DISRCC_INC; |
1132 | 1132 | ||
1133 | switch (source) { | 1133 | switch (source) { |
1134 | case S3C2410_DMASRC_HW: | 1134 | case DMA_FROM_DEVICE: |
1135 | /* source is hardware */ | 1135 | /* source is hardware */ |
1136 | pr_debug("%s: hw source, devaddr=%08lx, hwcfg=%d\n", | 1136 | pr_debug("%s: hw source, devaddr=%08lx, hwcfg=%d\n", |
1137 | __func__, devaddr, hwcfg); | 1137 | __func__, devaddr, hwcfg); |
@@ -1142,7 +1142,7 @@ int s3c2410_dma_devconfig(enum dma_ch channel, | |||
1142 | chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DIDST); | 1142 | chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DIDST); |
1143 | break; | 1143 | break; |
1144 | 1144 | ||
1145 | case S3C2410_DMASRC_MEM: | 1145 | case DMA_TO_DEVICE: |
1146 | /* source is memory */ | 1146 | /* source is memory */ |
1147 | pr_debug("%s: mem source, devaddr=%08lx, hwcfg=%d\n", | 1147 | pr_debug("%s: mem source, devaddr=%08lx, hwcfg=%d\n", |
1148 | __func__, devaddr, hwcfg); | 1148 | __func__, devaddr, hwcfg); |
diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c deleted file mode 100644 index 2f3d7c089df..00000000000 --- a/arch/arm/plat-s3c24xx/gpio.c +++ /dev/null | |||
@@ -1,96 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/gpio.c | ||
2 | * | ||
3 | * Copyright (c) 2004-2010 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C24XX GPIO support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | */ | ||
22 | |||
23 | #include <linux/kernel.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/module.h> | ||
26 | #include <linux/interrupt.h> | ||
27 | #include <linux/ioport.h> | ||
28 | #include <linux/gpio.h> | ||
29 | #include <linux/io.h> | ||
30 | |||
31 | #include <mach/hardware.h> | ||
32 | #include <mach/gpio-fns.h> | ||
33 | #include <asm/irq.h> | ||
34 | |||
35 | #include <mach/regs-gpio.h> | ||
36 | |||
37 | #include <plat/gpio-core.h> | ||
38 | |||
39 | /* gpiolib wrappers until these are totally eliminated */ | ||
40 | |||
41 | void s3c2410_gpio_pullup(unsigned int pin, unsigned int to) | ||
42 | { | ||
43 | int ret; | ||
44 | |||
45 | WARN_ON(to); /* should be none of these left */ | ||
46 | |||
47 | if (!to) { | ||
48 | /* if pull is enabled, try first with up, and if that | ||
49 | * fails, try using down */ | ||
50 | |||
51 | ret = s3c_gpio_setpull(pin, S3C_GPIO_PULL_UP); | ||
52 | if (ret) | ||
53 | s3c_gpio_setpull(pin, S3C_GPIO_PULL_DOWN); | ||
54 | } else { | ||
55 | s3c_gpio_setpull(pin, S3C_GPIO_PULL_NONE); | ||
56 | } | ||
57 | } | ||
58 | EXPORT_SYMBOL(s3c2410_gpio_pullup); | ||
59 | |||
60 | void s3c2410_gpio_setpin(unsigned int pin, unsigned int to) | ||
61 | { | ||
62 | /* do this via gpiolib until all users removed */ | ||
63 | |||
64 | gpio_request(pin, "temporary"); | ||
65 | gpio_set_value(pin, to); | ||
66 | gpio_free(pin); | ||
67 | } | ||
68 | |||
69 | EXPORT_SYMBOL(s3c2410_gpio_setpin); | ||
70 | |||
71 | unsigned int s3c2410_gpio_getpin(unsigned int pin) | ||
72 | { | ||
73 | struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | ||
74 | unsigned long offs = pin - chip->chip.base; | ||
75 | |||
76 | return __raw_readl(chip->base + 0x04) & (1<< offs); | ||
77 | } | ||
78 | |||
79 | EXPORT_SYMBOL(s3c2410_gpio_getpin); | ||
80 | |||
81 | unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change) | ||
82 | { | ||
83 | unsigned long flags; | ||
84 | unsigned long misccr; | ||
85 | |||
86 | local_irq_save(flags); | ||
87 | misccr = __raw_readl(S3C24XX_MISCCR); | ||
88 | misccr &= ~clear; | ||
89 | misccr ^= change; | ||
90 | __raw_writel(misccr, S3C24XX_MISCCR); | ||
91 | local_irq_restore(flags); | ||
92 | |||
93 | return misccr; | ||
94 | } | ||
95 | |||
96 | EXPORT_SYMBOL(s3c2410_modify_misccr); | ||
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c deleted file mode 100644 index 243b6411050..00000000000 --- a/arch/arm/plat-s3c24xx/gpiolib.c +++ /dev/null | |||
@@ -1,229 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/gpiolib.c | ||
2 | * | ||
3 | * Copyright (c) 2008-2010 Simtec Electronics | ||
4 | * http://armlinux.simtec.co.uk/ | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * | ||
7 | * S3C24XX GPIOlib support | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/module.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/sysdev.h> | ||
19 | #include <linux/ioport.h> | ||
20 | #include <linux/io.h> | ||
21 | #include <linux/gpio.h> | ||
22 | |||
23 | #include <plat/gpio-core.h> | ||
24 | #include <plat/gpio-cfg.h> | ||
25 | #include <plat/gpio-cfg-helpers.h> | ||
26 | #include <mach/hardware.h> | ||
27 | #include <asm/irq.h> | ||
28 | #include <plat/pm.h> | ||
29 | |||
30 | #include <mach/regs-gpio.h> | ||
31 | |||
32 | static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset) | ||
33 | { | ||
34 | return -EINVAL; | ||
35 | } | ||
36 | |||
37 | static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip, | ||
38 | unsigned offset, int value) | ||
39 | { | ||
40 | struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); | ||
41 | void __iomem *base = ourchip->base; | ||
42 | unsigned long flags; | ||
43 | unsigned long dat; | ||
44 | unsigned long con; | ||
45 | |||
46 | local_irq_save(flags); | ||
47 | |||
48 | con = __raw_readl(base + 0x00); | ||
49 | dat = __raw_readl(base + 0x04); | ||
50 | |||
51 | dat &= ~(1 << offset); | ||
52 | if (value) | ||
53 | dat |= 1 << offset; | ||
54 | |||
55 | __raw_writel(dat, base + 0x04); | ||
56 | |||
57 | con &= ~(1 << offset); | ||
58 | |||
59 | __raw_writel(con, base + 0x00); | ||
60 | __raw_writel(dat, base + 0x04); | ||
61 | |||
62 | local_irq_restore(flags); | ||
63 | return 0; | ||
64 | } | ||
65 | |||
66 | static int s3c24xx_gpiolib_bankf_toirq(struct gpio_chip *chip, unsigned offset) | ||
67 | { | ||
68 | if (offset < 4) | ||
69 | return IRQ_EINT0 + offset; | ||
70 | |||
71 | if (offset < 8) | ||
72 | return IRQ_EINT4 + offset - 4; | ||
73 | |||
74 | return -EINVAL; | ||
75 | } | ||
76 | |||
77 | static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = { | ||
78 | .set_config = s3c_gpio_setcfg_s3c24xx_a, | ||
79 | .get_config = s3c_gpio_getcfg_s3c24xx_a, | ||
80 | }; | ||
81 | |||
82 | struct s3c_gpio_cfg s3c24xx_gpiocfg_default = { | ||
83 | .set_config = s3c_gpio_setcfg_s3c24xx, | ||
84 | .get_config = s3c_gpio_getcfg_s3c24xx, | ||
85 | }; | ||
86 | |||
87 | struct s3c_gpio_chip s3c24xx_gpios[] = { | ||
88 | [0] = { | ||
89 | .base = S3C2410_GPACON, | ||
90 | .pm = __gpio_pm(&s3c_gpio_pm_1bit), | ||
91 | .config = &s3c24xx_gpiocfg_banka, | ||
92 | .chip = { | ||
93 | .base = S3C2410_GPA(0), | ||
94 | .owner = THIS_MODULE, | ||
95 | .label = "GPIOA", | ||
96 | .ngpio = 24, | ||
97 | .direction_input = s3c24xx_gpiolib_banka_input, | ||
98 | .direction_output = s3c24xx_gpiolib_banka_output, | ||
99 | }, | ||
100 | }, | ||
101 | [1] = { | ||
102 | .base = S3C2410_GPBCON, | ||
103 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | ||
104 | .chip = { | ||
105 | .base = S3C2410_GPB(0), | ||
106 | .owner = THIS_MODULE, | ||
107 | .label = "GPIOB", | ||
108 | .ngpio = 16, | ||
109 | }, | ||
110 | }, | ||
111 | [2] = { | ||
112 | .base = S3C2410_GPCCON, | ||
113 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | ||
114 | .chip = { | ||
115 | .base = S3C2410_GPC(0), | ||
116 | .owner = THIS_MODULE, | ||
117 | .label = "GPIOC", | ||
118 | .ngpio = 16, | ||
119 | }, | ||
120 | }, | ||
121 | [3] = { | ||
122 | .base = S3C2410_GPDCON, | ||
123 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | ||
124 | .chip = { | ||
125 | .base = S3C2410_GPD(0), | ||
126 | .owner = THIS_MODULE, | ||
127 | .label = "GPIOD", | ||
128 | .ngpio = 16, | ||
129 | }, | ||
130 | }, | ||
131 | [4] = { | ||
132 | .base = S3C2410_GPECON, | ||
133 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | ||
134 | .chip = { | ||
135 | .base = S3C2410_GPE(0), | ||
136 | .label = "GPIOE", | ||
137 | .owner = THIS_MODULE, | ||
138 | .ngpio = 16, | ||
139 | }, | ||
140 | }, | ||
141 | [5] = { | ||
142 | .base = S3C2410_GPFCON, | ||
143 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | ||
144 | .chip = { | ||
145 | .base = S3C2410_GPF(0), | ||
146 | .owner = THIS_MODULE, | ||
147 | .label = "GPIOF", | ||
148 | .ngpio = 8, | ||
149 | .to_irq = s3c24xx_gpiolib_bankf_toirq, | ||
150 | }, | ||
151 | }, | ||
152 | [6] = { | ||
153 | .base = S3C2410_GPGCON, | ||
154 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | ||
155 | .irq_base = IRQ_EINT8, | ||
156 | .chip = { | ||
157 | .base = S3C2410_GPG(0), | ||
158 | .owner = THIS_MODULE, | ||
159 | .label = "GPIOG", | ||
160 | .ngpio = 16, | ||
161 | .to_irq = samsung_gpiolib_to_irq, | ||
162 | }, | ||
163 | }, { | ||
164 | .base = S3C2410_GPHCON, | ||
165 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | ||
166 | .chip = { | ||
167 | .base = S3C2410_GPH(0), | ||
168 | .owner = THIS_MODULE, | ||
169 | .label = "GPIOH", | ||
170 | .ngpio = 11, | ||
171 | }, | ||
172 | }, | ||
173 | /* GPIOS for the S3C2443 and later devices. */ | ||
174 | { | ||
175 | .base = S3C2440_GPJCON, | ||
176 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | ||
177 | .chip = { | ||
178 | .base = S3C2410_GPJ(0), | ||
179 | .owner = THIS_MODULE, | ||
180 | .label = "GPIOJ", | ||
181 | .ngpio = 16, | ||
182 | }, | ||
183 | }, { | ||
184 | .base = S3C2443_GPKCON, | ||
185 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | ||
186 | .chip = { | ||
187 | .base = S3C2410_GPK(0), | ||
188 | .owner = THIS_MODULE, | ||
189 | .label = "GPIOK", | ||
190 | .ngpio = 16, | ||
191 | }, | ||
192 | }, { | ||
193 | .base = S3C2443_GPLCON, | ||
194 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | ||
195 | .chip = { | ||
196 | .base = S3C2410_GPL(0), | ||
197 | .owner = THIS_MODULE, | ||
198 | .label = "GPIOL", | ||
199 | .ngpio = 15, | ||
200 | }, | ||
201 | }, { | ||
202 | .base = S3C2443_GPMCON, | ||
203 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | ||
204 | .chip = { | ||
205 | .base = S3C2410_GPM(0), | ||
206 | .owner = THIS_MODULE, | ||
207 | .label = "GPIOM", | ||
208 | .ngpio = 2, | ||
209 | }, | ||
210 | }, | ||
211 | }; | ||
212 | |||
213 | |||
214 | static __init int s3c24xx_gpiolib_init(void) | ||
215 | { | ||
216 | struct s3c_gpio_chip *chip = s3c24xx_gpios; | ||
217 | int gpn; | ||
218 | |||
219 | for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++) { | ||
220 | if (!chip->config) | ||
221 | chip->config = &s3c24xx_gpiocfg_default; | ||
222 | |||
223 | s3c_gpiolib_add(chip); | ||
224 | } | ||
225 | |||
226 | return 0; | ||
227 | } | ||
228 | |||
229 | core_initcall(s3c24xx_gpiolib_init); | ||
diff --git a/arch/arm/plat-s3c24xx/include/mach/clkdev.h b/arch/arm/plat-s3c24xx/include/mach/clkdev.h deleted file mode 100644 index 7dffa83d23f..00000000000 --- a/arch/arm/plat-s3c24xx/include/mach/clkdev.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __MACH_CLKDEV_H__ | ||
2 | #define __MACH_CLKDEV_H__ | ||
3 | |||
4 | #define __clk_get(clk) ({ 1; }) | ||
5 | #define __clk_put(clk) do {} while (0) | ||
6 | |||
7 | #endif | ||
diff --git a/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h b/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h deleted file mode 100644 index a087de21bc2..00000000000 --- a/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h +++ /dev/null | |||
@@ -1,55 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h | ||
2 | * | ||
3 | * Copyright 2008 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * S3C24xx - pwm clock and timer support | ||
8 | */ | ||
9 | |||
10 | /** | ||
11 | * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk | ||
12 | * @cfg: The timer TCFG1 register bits shifted down to 0. | ||
13 | * | ||
14 | * Return true if the given configuration from TCFG1 is a TCLK instead | ||
15 | * any of the TDIV clocks. | ||
16 | */ | ||
17 | static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) | ||
18 | { | ||
19 | return tcfg == S3C2410_TCFG1_MUX_TCLK; | ||
20 | } | ||
21 | |||
22 | /** | ||
23 | * tcfg_to_divisor() - convert tcfg1 setting to a divisor | ||
24 | * @tcfg1: The tcfg1 setting, shifted down. | ||
25 | * | ||
26 | * Get the divisor value for the given tcfg1 setting. We assume the | ||
27 | * caller has already checked to see if this is not a TCLK source. | ||
28 | */ | ||
29 | static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) | ||
30 | { | ||
31 | return 1 << (1 + tcfg1); | ||
32 | } | ||
33 | |||
34 | /** | ||
35 | * pwm_tdiv_has_div1() - does the tdiv setting have a /1 | ||
36 | * | ||
37 | * Return true if we have a /1 in the tdiv setting. | ||
38 | */ | ||
39 | static inline unsigned int pwm_tdiv_has_div1(void) | ||
40 | { | ||
41 | return 0; | ||
42 | } | ||
43 | |||
44 | /** | ||
45 | * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. | ||
46 | * @div: The divisor to calculate the bit information for. | ||
47 | * | ||
48 | * Turn a divisor into the necessary bit field for TCFG1. | ||
49 | */ | ||
50 | static inline unsigned long pwm_tdiv_div_bits(unsigned int div) | ||
51 | { | ||
52 | return ilog2(div) - 1; | ||
53 | } | ||
54 | |||
55 | #define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK | ||
diff --git a/arch/arm/plat-s3c24xx/include/plat/pll.h b/arch/arm/plat-s3c24xx/include/plat/pll.h deleted file mode 100644 index 005729a1077..00000000000 --- a/arch/arm/plat-s3c24xx/include/plat/pll.h +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/include/plat/pll.h | ||
2 | * | ||
3 | * Copyright 2008 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * S3C24xx - common pll registers and code | ||
8 | */ | ||
9 | |||
10 | #define S3C24XX_PLLCON_MDIVSHIFT 12 | ||
11 | #define S3C24XX_PLLCON_PDIVSHIFT 4 | ||
12 | #define S3C24XX_PLLCON_SDIVSHIFT 0 | ||
13 | #define S3C24XX_PLLCON_MDIVMASK ((1<<(1+(19-12)))-1) | ||
14 | #define S3C24XX_PLLCON_PDIVMASK ((1<<5)-1) | ||
15 | #define S3C24XX_PLLCON_SDIVMASK 3 | ||
16 | |||
17 | #include <asm/div64.h> | ||
18 | |||
19 | static inline unsigned int | ||
20 | s3c24xx_get_pll(unsigned int pllval, unsigned int baseclk) | ||
21 | { | ||
22 | unsigned int mdiv, pdiv, sdiv; | ||
23 | uint64_t fvco; | ||
24 | |||
25 | mdiv = pllval >> S3C24XX_PLLCON_MDIVSHIFT; | ||
26 | pdiv = pllval >> S3C24XX_PLLCON_PDIVSHIFT; | ||
27 | sdiv = pllval >> S3C24XX_PLLCON_SDIVSHIFT; | ||
28 | |||
29 | mdiv &= S3C24XX_PLLCON_MDIVMASK; | ||
30 | pdiv &= S3C24XX_PLLCON_PDIVMASK; | ||
31 | sdiv &= S3C24XX_PLLCON_SDIVMASK; | ||
32 | |||
33 | fvco = (uint64_t)baseclk * (mdiv + 8); | ||
34 | do_div(fvco, (pdiv + 2) << sdiv); | ||
35 | |||
36 | return (unsigned int)fvco; | ||
37 | } | ||
38 | |||
39 | #define S3C2416_PLL_M_SHIFT (14) | ||
40 | #define S3C2416_PLL_P_SHIFT (5) | ||
41 | #define S3C2416_PLL_S_MASK (7) | ||
42 | #define S3C2416_PLL_M_MASK ((1 << 10) - 1) | ||
43 | #define S3C2416_PLL_P_MASK (63) | ||
44 | |||
45 | static inline unsigned int | ||
46 | s3c2416_get_pll(unsigned int pllval, unsigned int baseclk) | ||
47 | { | ||
48 | unsigned int m, p, s; | ||
49 | uint64_t fvco; | ||
50 | |||
51 | m = pllval >> S3C2416_PLL_M_SHIFT; | ||
52 | p = pllval >> S3C2416_PLL_P_SHIFT; | ||
53 | |||
54 | s = pllval & S3C2416_PLL_S_MASK; | ||
55 | m &= S3C2416_PLL_M_MASK; | ||
56 | p &= S3C2416_PLL_P_MASK; | ||
57 | |||
58 | fvco = (uint64_t)baseclk * m; | ||
59 | do_div(fvco, (p << s)); | ||
60 | |||
61 | return (unsigned int)fvco; | ||
62 | } | ||
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-iis.h b/arch/arm/plat-s3c24xx/include/plat/regs-iis.h deleted file mode 100644 index cc44e0e931e..00000000000 --- a/arch/arm/plat-s3c24xx/include/plat/regs-iis.h +++ /dev/null | |||
@@ -1,68 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/regs-iis.h | ||
2 | * | ||
3 | * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> | ||
4 | * http://www.simtec.co.uk/products/SWLINUX/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * S3C2410 IIS register definition | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_IIS_H | ||
14 | #define __ASM_ARCH_REGS_IIS_H | ||
15 | |||
16 | #define S3C2410_IISCON (0x00) | ||
17 | |||
18 | #define S3C2410_IISCON_LRINDEX (1<<8) | ||
19 | #define S3C2410_IISCON_TXFIFORDY (1<<7) | ||
20 | #define S3C2410_IISCON_RXFIFORDY (1<<6) | ||
21 | #define S3C2410_IISCON_TXDMAEN (1<<5) | ||
22 | #define S3C2410_IISCON_RXDMAEN (1<<4) | ||
23 | #define S3C2410_IISCON_TXIDLE (1<<3) | ||
24 | #define S3C2410_IISCON_RXIDLE (1<<2) | ||
25 | #define S3C2410_IISCON_PSCEN (1<<1) | ||
26 | #define S3C2410_IISCON_IISEN (1<<0) | ||
27 | |||
28 | #define S3C2410_IISMOD (0x04) | ||
29 | |||
30 | #define S3C2440_IISMOD_MPLL (1<<9) | ||
31 | #define S3C2410_IISMOD_SLAVE (1<<8) | ||
32 | #define S3C2410_IISMOD_NOXFER (0<<6) | ||
33 | #define S3C2410_IISMOD_RXMODE (1<<6) | ||
34 | #define S3C2410_IISMOD_TXMODE (2<<6) | ||
35 | #define S3C2410_IISMOD_TXRXMODE (3<<6) | ||
36 | #define S3C2410_IISMOD_LR_LLOW (0<<5) | ||
37 | #define S3C2410_IISMOD_LR_RLOW (1<<5) | ||
38 | #define S3C2410_IISMOD_IIS (0<<4) | ||
39 | #define S3C2410_IISMOD_MSB (1<<4) | ||
40 | #define S3C2410_IISMOD_8BIT (0<<3) | ||
41 | #define S3C2410_IISMOD_16BIT (1<<3) | ||
42 | #define S3C2410_IISMOD_BITMASK (1<<3) | ||
43 | #define S3C2410_IISMOD_256FS (0<<2) | ||
44 | #define S3C2410_IISMOD_384FS (1<<2) | ||
45 | #define S3C2410_IISMOD_16FS (0<<0) | ||
46 | #define S3C2410_IISMOD_32FS (1<<0) | ||
47 | #define S3C2410_IISMOD_48FS (2<<0) | ||
48 | #define S3C2410_IISMOD_FS_MASK (3<<0) | ||
49 | |||
50 | #define S3C2410_IISPSR (0x08) | ||
51 | #define S3C2410_IISPSR_INTMASK (31<<5) | ||
52 | #define S3C2410_IISPSR_INTSHIFT (5) | ||
53 | #define S3C2410_IISPSR_EXTMASK (31<<0) | ||
54 | #define S3C2410_IISPSR_EXTSHFIT (0) | ||
55 | |||
56 | #define S3C2410_IISFCON (0x0c) | ||
57 | |||
58 | #define S3C2410_IISFCON_TXDMA (1<<15) | ||
59 | #define S3C2410_IISFCON_RXDMA (1<<14) | ||
60 | #define S3C2410_IISFCON_TXENABLE (1<<13) | ||
61 | #define S3C2410_IISFCON_RXENABLE (1<<12) | ||
62 | #define S3C2410_IISFCON_TXMASK (0x3f << 6) | ||
63 | #define S3C2410_IISFCON_TXSHIFT (6) | ||
64 | #define S3C2410_IISFCON_RXMASK (0x3f) | ||
65 | #define S3C2410_IISFCON_RXSHIFT (0) | ||
66 | |||
67 | #define S3C2410_IISFIFO (0x10) | ||
68 | #endif /* __ASM_ARCH_REGS_IIS_H */ | ||
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-spi.h b/arch/arm/plat-s3c24xx/include/plat/regs-spi.h deleted file mode 100644 index 892e2f680fc..00000000000 --- a/arch/arm/plat-s3c24xx/include/plat/regs-spi.h +++ /dev/null | |||
@@ -1,81 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/regs-spi.h | ||
2 | * | ||
3 | * Copyright (c) 2004 Fetron GmbH | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | * S3C2410 SPI register definition | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_ARCH_REGS_SPI_H | ||
13 | #define __ASM_ARCH_REGS_SPI_H | ||
14 | |||
15 | #define S3C2410_SPI1 (0x20) | ||
16 | #define S3C2412_SPI1 (0x100) | ||
17 | |||
18 | #define S3C2410_SPCON (0x00) | ||
19 | |||
20 | #define S3C2412_SPCON_RXFIFO_RB2 (0<<14) | ||
21 | #define S3C2412_SPCON_RXFIFO_RB4 (1<<14) | ||
22 | #define S3C2412_SPCON_RXFIFO_RB12 (2<<14) | ||
23 | #define S3C2412_SPCON_RXFIFO_RB14 (3<<14) | ||
24 | #define S3C2412_SPCON_TXFIFO_RB2 (0<<12) | ||
25 | #define S3C2412_SPCON_TXFIFO_RB4 (1<<12) | ||
26 | #define S3C2412_SPCON_TXFIFO_RB12 (2<<12) | ||
27 | #define S3C2412_SPCON_TXFIFO_RB14 (3<<12) | ||
28 | #define S3C2412_SPCON_RXFIFO_RESET (1<<11) /* RxFIFO reset */ | ||
29 | #define S3C2412_SPCON_TXFIFO_RESET (1<<10) /* TxFIFO reset */ | ||
30 | #define S3C2412_SPCON_RXFIFO_EN (1<<9) /* RxFIFO Enable */ | ||
31 | #define S3C2412_SPCON_TXFIFO_EN (1<<8) /* TxFIFO Enable */ | ||
32 | |||
33 | #define S3C2412_SPCON_DIRC_RX (1<<7) | ||
34 | |||
35 | #define S3C2410_SPCON_SMOD_DMA (2<<5) /* DMA mode */ | ||
36 | #define S3C2410_SPCON_SMOD_INT (1<<5) /* interrupt mode */ | ||
37 | #define S3C2410_SPCON_SMOD_POLL (0<<5) /* polling mode */ | ||
38 | #define S3C2410_SPCON_ENSCK (1<<4) /* Enable SCK */ | ||
39 | #define S3C2410_SPCON_MSTR (1<<3) /* Master/Slave select | ||
40 | 0: slave, 1: master */ | ||
41 | #define S3C2410_SPCON_CPOL_HIGH (1<<2) /* Clock polarity select */ | ||
42 | #define S3C2410_SPCON_CPOL_LOW (0<<2) /* Clock polarity select */ | ||
43 | |||
44 | #define S3C2410_SPCON_CPHA_FMTB (1<<1) /* Clock Phase Select */ | ||
45 | #define S3C2410_SPCON_CPHA_FMTA (0<<1) /* Clock Phase Select */ | ||
46 | |||
47 | #define S3C2410_SPCON_TAGD (1<<0) /* Tx auto garbage data mode */ | ||
48 | |||
49 | |||
50 | #define S3C2410_SPSTA (0x04) | ||
51 | |||
52 | #define S3C2412_SPSTA_RXFIFO_AE (1<<11) | ||
53 | #define S3C2412_SPSTA_TXFIFO_AE (1<<10) | ||
54 | #define S3C2412_SPSTA_RXFIFO_ERROR (1<<9) | ||
55 | #define S3C2412_SPSTA_TXFIFO_ERROR (1<<8) | ||
56 | #define S3C2412_SPSTA_RXFIFO_FIFO (1<<7) | ||
57 | #define S3C2412_SPSTA_RXFIFO_EMPTY (1<<6) | ||
58 | #define S3C2412_SPSTA_TXFIFO_NFULL (1<<5) | ||
59 | #define S3C2412_SPSTA_TXFIFO_EMPTY (1<<4) | ||
60 | |||
61 | #define S3C2410_SPSTA_DCOL (1<<2) /* Data Collision Error */ | ||
62 | #define S3C2410_SPSTA_MULD (1<<1) /* Multi Master Error */ | ||
63 | #define S3C2410_SPSTA_READY (1<<0) /* Data Tx/Rx ready */ | ||
64 | #define S3C2412_SPSTA_READY_ORG (1<<3) | ||
65 | |||
66 | #define S3C2410_SPPIN (0x08) | ||
67 | |||
68 | #define S3C2410_SPPIN_ENMUL (1<<2) /* Multi Master Error detect */ | ||
69 | #define S3C2410_SPPIN_RESERVED (1<<1) | ||
70 | #define S3C2410_SPPIN_KEEP (1<<0) /* Master Out keep */ | ||
71 | |||
72 | #define S3C2410_SPPRE (0x0C) | ||
73 | #define S3C2410_SPTDAT (0x10) | ||
74 | #define S3C2410_SPRDAT (0x14) | ||
75 | |||
76 | #define S3C2412_TXFIFO (0x18) | ||
77 | #define S3C2412_RXFIFO (0x18) | ||
78 | #define S3C2412_SPFIC (0x24) | ||
79 | |||
80 | |||
81 | #endif /* __ASM_ARCH_REGS_SPI_H */ | ||
diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c index 59552c0ea5f..5a21b15b2a9 100644 --- a/arch/arm/plat-s3c24xx/s3c2443-clock.c +++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c | |||
@@ -160,6 +160,124 @@ static struct clk clk_prediv = { | |||
160 | }, | 160 | }, |
161 | }; | 161 | }; |
162 | 162 | ||
163 | /* armdiv | ||
164 | * | ||
165 | * this clock is sourced from msysclk and can have a number of | ||
166 | * divider values applied to it to then be fed into armclk. | ||
167 | */ | ||
168 | |||
169 | static unsigned int *armdiv; | ||
170 | static int nr_armdiv; | ||
171 | static int armdivmask; | ||
172 | |||
173 | static unsigned long s3c2443_armclk_roundrate(struct clk *clk, | ||
174 | unsigned long rate) | ||
175 | { | ||
176 | unsigned long parent = clk_get_rate(clk->parent); | ||
177 | unsigned long calc; | ||
178 | unsigned best = 256; /* bigger than any value */ | ||
179 | unsigned div; | ||
180 | int ptr; | ||
181 | |||
182 | if (!nr_armdiv) | ||
183 | return -EINVAL; | ||
184 | |||
185 | for (ptr = 0; ptr < nr_armdiv; ptr++) { | ||
186 | div = armdiv[ptr]; | ||
187 | if (div) { | ||
188 | /* cpufreq provides 266mhz as 266666000 not 266666666 */ | ||
189 | calc = (parent / div / 1000) * 1000; | ||
190 | if (calc <= rate && div < best) | ||
191 | best = div; | ||
192 | } | ||
193 | } | ||
194 | |||
195 | return parent / best; | ||
196 | } | ||
197 | |||
198 | static unsigned long s3c2443_armclk_getrate(struct clk *clk) | ||
199 | { | ||
200 | unsigned long rate = clk_get_rate(clk->parent); | ||
201 | unsigned long clkcon0; | ||
202 | int val; | ||
203 | |||
204 | if (!nr_armdiv || !armdivmask) | ||
205 | return -EINVAL; | ||
206 | |||
207 | clkcon0 = __raw_readl(S3C2443_CLKDIV0); | ||
208 | clkcon0 &= armdivmask; | ||
209 | val = clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT; | ||
210 | |||
211 | return rate / armdiv[val]; | ||
212 | } | ||
213 | |||
214 | static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate) | ||
215 | { | ||
216 | unsigned long parent = clk_get_rate(clk->parent); | ||
217 | unsigned long calc; | ||
218 | unsigned div; | ||
219 | unsigned best = 256; /* bigger than any value */ | ||
220 | int ptr; | ||
221 | int val = -1; | ||
222 | |||
223 | if (!nr_armdiv || !armdivmask) | ||
224 | return -EINVAL; | ||
225 | |||
226 | for (ptr = 0; ptr < nr_armdiv; ptr++) { | ||
227 | div = armdiv[ptr]; | ||
228 | if (div) { | ||
229 | /* cpufreq provides 266mhz as 266666000 not 266666666 */ | ||
230 | calc = (parent / div / 1000) * 1000; | ||
231 | if (calc <= rate && div < best) { | ||
232 | best = div; | ||
233 | val = ptr; | ||
234 | } | ||
235 | } | ||
236 | } | ||
237 | |||
238 | if (val >= 0) { | ||
239 | unsigned long clkcon0; | ||
240 | |||
241 | clkcon0 = __raw_readl(S3C2443_CLKDIV0); | ||
242 | clkcon0 &= ~armdivmask; | ||
243 | clkcon0 |= val << S3C2443_CLKDIV0_ARMDIV_SHIFT; | ||
244 | __raw_writel(clkcon0, S3C2443_CLKDIV0); | ||
245 | } | ||
246 | |||
247 | return (val == -1) ? -EINVAL : 0; | ||
248 | } | ||
249 | |||
250 | static struct clk clk_armdiv = { | ||
251 | .name = "armdiv", | ||
252 | .parent = &clk_msysclk.clk, | ||
253 | .ops = &(struct clk_ops) { | ||
254 | .round_rate = s3c2443_armclk_roundrate, | ||
255 | .get_rate = s3c2443_armclk_getrate, | ||
256 | .set_rate = s3c2443_armclk_setrate, | ||
257 | }, | ||
258 | }; | ||
259 | |||
260 | /* armclk | ||
261 | * | ||
262 | * this is the clock fed into the ARM core itself, from armdiv or from hclk. | ||
263 | */ | ||
264 | |||
265 | static struct clk *clk_arm_sources[] = { | ||
266 | [0] = &clk_armdiv, | ||
267 | [1] = &clk_h, | ||
268 | }; | ||
269 | |||
270 | static struct clksrc_clk clk_arm = { | ||
271 | .clk = { | ||
272 | .name = "armclk", | ||
273 | }, | ||
274 | .sources = &(struct clksrc_sources) { | ||
275 | .sources = clk_arm_sources, | ||
276 | .nr_sources = ARRAY_SIZE(clk_arm_sources), | ||
277 | }, | ||
278 | .reg_src = { .reg = S3C2443_CLKDIV0, .size = 1, .shift = 13 }, | ||
279 | }; | ||
280 | |||
163 | /* usbhost | 281 | /* usbhost |
164 | * | 282 | * |
165 | * usb host bus-clock, usually 48MHz to provide USB bus clock timing | 283 | * usb host bus-clock, usually 48MHz to provide USB bus clock timing |
@@ -205,9 +323,64 @@ static struct clksrc_clk clksrc_clks[] = { | |||
205 | }, | 323 | }, |
206 | }; | 324 | }; |
207 | 325 | ||
326 | static struct clk clk_i2s_ext = { | ||
327 | .name = "i2s-ext", | ||
328 | }; | ||
329 | |||
330 | /* i2s_eplldiv | ||
331 | * | ||
332 | * This clock is the output from the I2S divisor of ESYSCLK, and is separate | ||
333 | * from the mux that comes after it (cannot merge into one single clock) | ||
334 | */ | ||
335 | |||
336 | static struct clksrc_clk clk_i2s_eplldiv = { | ||
337 | .clk = { | ||
338 | .name = "i2s-eplldiv", | ||
339 | .parent = &clk_esysclk.clk, | ||
340 | }, | ||
341 | .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 12, }, | ||
342 | }; | ||
343 | |||
344 | /* i2s-ref | ||
345 | * | ||
346 | * i2s bus reference clock, selectable from external, esysclk or epllref | ||
347 | * | ||
348 | * Note, this used to be two clocks, but was compressed into one. | ||
349 | */ | ||
350 | |||
351 | static struct clk *clk_i2s_srclist[] = { | ||
352 | [0] = &clk_i2s_eplldiv.clk, | ||
353 | [1] = &clk_i2s_ext, | ||
354 | [2] = &clk_epllref.clk, | ||
355 | [3] = &clk_epllref.clk, | ||
356 | }; | ||
357 | |||
358 | static struct clksrc_clk clk_i2s = { | ||
359 | .clk = { | ||
360 | .name = "i2s-if", | ||
361 | .ctrlbit = S3C2443_SCLKCON_I2SCLK, | ||
362 | .enable = s3c2443_clkcon_enable_s, | ||
363 | |||
364 | }, | ||
365 | .sources = &(struct clksrc_sources) { | ||
366 | .sources = clk_i2s_srclist, | ||
367 | .nr_sources = ARRAY_SIZE(clk_i2s_srclist), | ||
368 | }, | ||
369 | .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 14 }, | ||
370 | }; | ||
208 | 371 | ||
209 | static struct clk init_clocks_off[] = { | 372 | static struct clk init_clocks_off[] = { |
210 | { | 373 | { |
374 | .name = "iis", | ||
375 | .parent = &clk_p, | ||
376 | .enable = s3c2443_clkcon_enable_p, | ||
377 | .ctrlbit = S3C2443_PCLKCON_IIS, | ||
378 | }, { | ||
379 | .name = "hsspi", | ||
380 | .parent = &clk_p, | ||
381 | .enable = s3c2443_clkcon_enable_p, | ||
382 | .ctrlbit = S3C2443_PCLKCON_HSSPI, | ||
383 | }, { | ||
211 | .name = "adc", | 384 | .name = "adc", |
212 | .parent = &clk_p, | 385 | .parent = &clk_p, |
213 | .enable = s3c2443_clkcon_enable_p, | 386 | .enable = s3c2443_clkcon_enable_p, |
@@ -253,6 +426,7 @@ static struct clk init_clocks[] = { | |||
253 | .ctrlbit = S3C2443_HCLKCON_DMA5, | 426 | .ctrlbit = S3C2443_HCLKCON_DMA5, |
254 | }, { | 427 | }, { |
255 | .name = "hsmmc", | 428 | .name = "hsmmc", |
429 | .devname = "s3c-sdhci.1", | ||
256 | .parent = &clk_h, | 430 | .parent = &clk_h, |
257 | .enable = s3c2443_clkcon_enable_h, | 431 | .enable = s3c2443_clkcon_enable_h, |
258 | .ctrlbit = S3C2443_HCLKCON_HSMMC, | 432 | .ctrlbit = S3C2443_HCLKCON_HSMMC, |
@@ -347,8 +521,7 @@ static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0) | |||
347 | 521 | ||
348 | /* EPLLCON compatible enough to get on/off information */ | 522 | /* EPLLCON compatible enough to get on/off information */ |
349 | 523 | ||
350 | void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll, | 524 | void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll) |
351 | fdiv_fn get_fdiv) | ||
352 | { | 525 | { |
353 | unsigned long epllcon = __raw_readl(S3C2443_EPLLCON); | 526 | unsigned long epllcon = __raw_readl(S3C2443_EPLLCON); |
354 | unsigned long mpllcon = __raw_readl(S3C2443_MPLLCON); | 527 | unsigned long mpllcon = __raw_readl(S3C2443_MPLLCON); |
@@ -368,7 +541,7 @@ void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll, | |||
368 | pll = get_mpll(mpllcon, xtal); | 541 | pll = get_mpll(mpllcon, xtal); |
369 | clk_msysclk.clk.rate = pll; | 542 | clk_msysclk.clk.rate = pll; |
370 | 543 | ||
371 | fclk = pll / get_fdiv(clkdiv0); | 544 | fclk = clk_get_rate(&clk_armdiv); |
372 | hclk = s3c2443_prediv_getrate(&clk_prediv); | 545 | hclk = s3c2443_prediv_getrate(&clk_prediv); |
373 | hclk /= s3c2443_get_hdiv(clkdiv0); | 546 | hclk /= s3c2443_get_hdiv(clkdiv0); |
374 | pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1); | 547 | pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1); |
@@ -403,20 +576,29 @@ static struct clk *clks[] __initdata = { | |||
403 | &clk_ext, | 576 | &clk_ext, |
404 | &clk_epll, | 577 | &clk_epll, |
405 | &clk_usb_bus, | 578 | &clk_usb_bus, |
579 | &clk_armdiv, | ||
406 | }; | 580 | }; |
407 | 581 | ||
408 | static struct clksrc_clk *clksrcs[] __initdata = { | 582 | static struct clksrc_clk *clksrcs[] __initdata = { |
583 | &clk_i2s_eplldiv, | ||
584 | &clk_i2s, | ||
409 | &clk_usb_bus_host, | 585 | &clk_usb_bus_host, |
410 | &clk_epllref, | 586 | &clk_epllref, |
411 | &clk_esysclk, | 587 | &clk_esysclk, |
412 | &clk_msysclk, | 588 | &clk_msysclk, |
589 | &clk_arm, | ||
413 | }; | 590 | }; |
414 | 591 | ||
415 | void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, | 592 | void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, |
416 | fdiv_fn get_fdiv) | 593 | unsigned int *divs, int nr_divs, |
594 | int divmask) | ||
417 | { | 595 | { |
418 | int ptr; | 596 | int ptr; |
419 | 597 | ||
598 | armdiv = divs; | ||
599 | nr_armdiv = nr_divs; | ||
600 | armdivmask = divmask; | ||
601 | |||
420 | /* s3c2443 parents h and p clocks from prediv */ | 602 | /* s3c2443 parents h and p clocks from prediv */ |
421 | clk_h.parent = &clk_prediv; | 603 | clk_h.parent = &clk_prediv; |
422 | clk_p.parent = &clk_prediv; | 604 | clk_p.parent = &clk_prediv; |
@@ -437,5 +619,5 @@ void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, | |||
437 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 619 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
438 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 620 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
439 | 621 | ||
440 | s3c2443_common_setup_clocks(get_mpll, get_fdiv); | 622 | s3c2443_common_setup_clocks(get_mpll); |
441 | } | 623 | } |
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig index 9a197e55f66..9b9968fa869 100644 --- a/arch/arm/plat-s5p/Kconfig +++ b/arch/arm/plat-s5p/Kconfig | |||
@@ -7,7 +7,7 @@ | |||
7 | 7 | ||
8 | config PLAT_S5P | 8 | config PLAT_S5P |
9 | bool | 9 | bool |
10 | depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4) | 10 | depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS) |
11 | default y | 11 | default y |
12 | select ARM_VIC if !ARCH_EXYNOS4 | 12 | select ARM_VIC if !ARCH_EXYNOS4 |
13 | select ARM_GIC if ARCH_EXYNOS4 | 13 | select ARM_GIC if ARCH_EXYNOS4 |
@@ -16,9 +16,6 @@ config PLAT_S5P | |||
16 | select S3C_GPIO_TRACK | 16 | select S3C_GPIO_TRACK |
17 | select S5P_GPIO_DRVSTR | 17 | select S5P_GPIO_DRVSTR |
18 | select SAMSUNG_GPIOLIB_4BIT | 18 | select SAMSUNG_GPIOLIB_4BIT |
19 | select S3C_GPIO_CFG_S3C64XX | ||
20 | select S3C_GPIO_PULL_UPDOWN | ||
21 | select S3C_GPIO_CFG_S3C24XX | ||
22 | select PLAT_SAMSUNG | 19 | select PLAT_SAMSUNG |
23 | select SAMSUNG_CLKSRC | 20 | select SAMSUNG_CLKSRC |
24 | select SAMSUNG_IRQ_VIC_TIMER | 21 | select SAMSUNG_IRQ_VIC_TIMER |
@@ -42,6 +39,12 @@ config S5P_HRT | |||
42 | help | 39 | help |
43 | Use the High Resolution timer support | 40 | Use the High Resolution timer support |
44 | 41 | ||
42 | config S5P_PM | ||
43 | bool | ||
44 | help | ||
45 | Common code for power management support on S5P and newer SoCs | ||
46 | Note: Do not select this for S5P6440 and S5P6450. | ||
47 | |||
45 | comment "System MMU" | 48 | comment "System MMU" |
46 | 49 | ||
47 | config S5P_SYSTEM_MMU | 50 | config S5P_SYSTEM_MMU |
@@ -50,6 +53,12 @@ config S5P_SYSTEM_MMU | |||
50 | help | 53 | help |
51 | Say Y here if you want to enable System MMU | 54 | Say Y here if you want to enable System MMU |
52 | 55 | ||
56 | config S5P_SLEEP | ||
57 | bool | ||
58 | help | ||
59 | Internal config node to apply common S5P sleep management code. | ||
60 | Can be selected by S5P and newer SoCs with similar sleep procedure. | ||
61 | |||
53 | config S5P_DEV_FIMC0 | 62 | config S5P_DEV_FIMC0 |
54 | bool | 63 | bool |
55 | help | 64 | help |
@@ -75,6 +84,11 @@ config S5P_DEV_FIMD0 | |||
75 | help | 84 | help |
76 | Compile in platform device definitions for FIMD controller 0 | 85 | Compile in platform device definitions for FIMD controller 0 |
77 | 86 | ||
87 | config S5P_DEV_I2C_HDMIPHY | ||
88 | bool | ||
89 | help | ||
90 | Compile in platform device definitions for I2C HDMIPHY controller | ||
91 | |||
78 | config S5P_DEV_MFC | 92 | config S5P_DEV_MFC |
79 | bool | 93 | bool |
80 | help | 94 | help |
@@ -95,6 +109,11 @@ config S5P_DEV_CSIS1 | |||
95 | help | 109 | help |
96 | Compile in platform device definitions for MIPI-CSIS channel 1 | 110 | Compile in platform device definitions for MIPI-CSIS channel 1 |
97 | 111 | ||
112 | config S5P_DEV_TV | ||
113 | bool | ||
114 | help | ||
115 | Compile in platform device definition for TV interface | ||
116 | |||
98 | config S5P_DEV_USB_EHCI | 117 | config S5P_DEV_USB_EHCI |
99 | bool | 118 | bool |
100 | help | 119 | help |
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile index 4b53e04eeca..876344038b8 100644 --- a/arch/arm/plat-s5p/Makefile +++ b/arch/arm/plat-s5p/Makefile | |||
@@ -12,7 +12,6 @@ obj- := | |||
12 | 12 | ||
13 | # Core files | 13 | # Core files |
14 | 14 | ||
15 | obj-y += dev-pmu.o | ||
16 | obj-y += dev-uart.o | 15 | obj-y += dev-uart.o |
17 | obj-y += cpu.o | 16 | obj-y += cpu.o |
18 | obj-y += clock.o | 17 | obj-y += clock.o |
@@ -20,19 +19,10 @@ obj-y += irq.o | |||
20 | obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o | 19 | obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o |
21 | obj-$(CONFIG_S5P_GPIO_INT) += irq-gpioint.o | 20 | obj-$(CONFIG_S5P_GPIO_INT) += irq-gpioint.o |
22 | obj-$(CONFIG_S5P_SYSTEM_MMU) += sysmmu.o | 21 | obj-$(CONFIG_S5P_SYSTEM_MMU) += sysmmu.o |
23 | obj-$(CONFIG_PM) += pm.o | 22 | obj-$(CONFIG_S5P_PM) += pm.o irq-pm.o |
24 | obj-$(CONFIG_PM) += irq-pm.o | 23 | obj-$(CONFIG_S5P_SLEEP) += sleep.o |
25 | obj-$(CONFIG_S5P_HRT) += s5p-time.o | 24 | obj-$(CONFIG_S5P_HRT) += s5p-time.o |
26 | 25 | ||
27 | # devices | 26 | # devices |
28 | obj-$(CONFIG_S5P_DEV_MFC) += dev-mfc.o | 27 | obj-$(CONFIG_S5P_DEV_MFC) += dev-mfc.o |
29 | obj-$(CONFIG_S5P_DEV_FIMC0) += dev-fimc0.o | ||
30 | obj-$(CONFIG_S5P_DEV_FIMC1) += dev-fimc1.o | ||
31 | obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o | ||
32 | obj-$(CONFIG_S5P_DEV_FIMC3) += dev-fimc3.o | ||
33 | obj-$(CONFIG_S5P_DEV_FIMD0) += dev-fimd0.o | ||
34 | obj-$(CONFIG_S5P_DEV_ONENAND) += dev-onenand.o | ||
35 | obj-$(CONFIG_S5P_DEV_CSIS0) += dev-csis0.o | ||
36 | obj-$(CONFIG_S5P_DEV_CSIS1) += dev-csis1.o | ||
37 | obj-$(CONFIG_S5P_DEV_USB_EHCI) += dev-ehci.o | ||
38 | obj-$(CONFIG_S5P_SETUP_MIPIPHY) += setup-mipiphy.o | 28 | obj-$(CONFIG_S5P_SETUP_MIPIPHY) += setup-mipiphy.o |
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c index 7b0a28f73a6..a56959e8351 100644 --- a/arch/arm/plat-s5p/cpu.c +++ b/arch/arm/plat-s5p/cpu.c | |||
@@ -75,7 +75,7 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
75 | .map_io = exynos4_map_io, | 75 | .map_io = exynos4_map_io, |
76 | .init_clocks = exynos4_init_clocks, | 76 | .init_clocks = exynos4_init_clocks, |
77 | .init_uarts = exynos4_init_uarts, | 77 | .init_uarts = exynos4_init_uarts, |
78 | .init = exynos4_init, | 78 | .init = exynos_init, |
79 | .name = name_exynos4210, | 79 | .name = name_exynos4210, |
80 | }, { | 80 | }, { |
81 | .idcode = EXYNOS4212_CPU_ID, | 81 | .idcode = EXYNOS4212_CPU_ID, |
@@ -83,7 +83,7 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
83 | .map_io = exynos4_map_io, | 83 | .map_io = exynos4_map_io, |
84 | .init_clocks = exynos4_init_clocks, | 84 | .init_clocks = exynos4_init_clocks, |
85 | .init_uarts = exynos4_init_uarts, | 85 | .init_uarts = exynos4_init_uarts, |
86 | .init = exynos4_init, | 86 | .init = exynos_init, |
87 | .name = name_exynos4212, | 87 | .name = name_exynos4212, |
88 | }, { | 88 | }, { |
89 | .idcode = EXYNOS4412_CPU_ID, | 89 | .idcode = EXYNOS4412_CPU_ID, |
@@ -91,7 +91,7 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
91 | .map_io = exynos4_map_io, | 91 | .map_io = exynos4_map_io, |
92 | .init_clocks = exynos4_init_clocks, | 92 | .init_clocks = exynos4_init_clocks, |
93 | .init_uarts = exynos4_init_uarts, | 93 | .init_uarts = exynos4_init_uarts, |
94 | .init = exynos4_init, | 94 | .init = exynos_init, |
95 | .name = name_exynos4412, | 95 | .name = name_exynos4412, |
96 | }, | 96 | }, |
97 | }; | 97 | }; |
diff --git a/arch/arm/plat-s5p/dev-csis0.c b/arch/arm/plat-s5p/dev-csis0.c deleted file mode 100644 index e3aabef5e34..00000000000 --- a/arch/arm/plat-s5p/dev-csis0.c +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd. | ||
3 | * | ||
4 | * S5P series device definition for MIPI-CSIS channel 0 | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/interrupt.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <mach/map.h> | ||
15 | |||
16 | static struct resource s5p_mipi_csis0_resource[] = { | ||
17 | [0] = { | ||
18 | .start = S5P_PA_MIPI_CSIS0, | ||
19 | .end = S5P_PA_MIPI_CSIS0 + SZ_4K - 1, | ||
20 | .flags = IORESOURCE_MEM, | ||
21 | }, | ||
22 | [1] = { | ||
23 | .start = IRQ_MIPI_CSIS0, | ||
24 | .end = IRQ_MIPI_CSIS0, | ||
25 | .flags = IORESOURCE_IRQ, | ||
26 | } | ||
27 | }; | ||
28 | |||
29 | struct platform_device s5p_device_mipi_csis0 = { | ||
30 | .name = "s5p-mipi-csis", | ||
31 | .id = 0, | ||
32 | .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource), | ||
33 | .resource = s5p_mipi_csis0_resource, | ||
34 | }; | ||
diff --git a/arch/arm/plat-s5p/dev-csis1.c b/arch/arm/plat-s5p/dev-csis1.c deleted file mode 100644 index 08b91b58020..00000000000 --- a/arch/arm/plat-s5p/dev-csis1.c +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd. | ||
3 | * | ||
4 | * S5P series device definition for MIPI-CSIS channel 1 | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/interrupt.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <mach/map.h> | ||
15 | |||
16 | static struct resource s5p_mipi_csis1_resource[] = { | ||
17 | [0] = { | ||
18 | .start = S5P_PA_MIPI_CSIS1, | ||
19 | .end = S5P_PA_MIPI_CSIS1 + SZ_4K - 1, | ||
20 | .flags = IORESOURCE_MEM, | ||
21 | }, | ||
22 | [1] = { | ||
23 | .start = IRQ_MIPI_CSIS1, | ||
24 | .end = IRQ_MIPI_CSIS1, | ||
25 | .flags = IORESOURCE_IRQ, | ||
26 | }, | ||
27 | }; | ||
28 | |||
29 | struct platform_device s5p_device_mipi_csis1 = { | ||
30 | .name = "s5p-mipi-csis", | ||
31 | .id = 1, | ||
32 | .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource), | ||
33 | .resource = s5p_mipi_csis1_resource, | ||
34 | }; | ||
diff --git a/arch/arm/plat-s5p/dev-ehci.c b/arch/arm/plat-s5p/dev-ehci.c deleted file mode 100644 index 94080fff9e9..00000000000 --- a/arch/arm/plat-s5p/dev-ehci.c +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Samsung Electronics Co.Ltd | ||
3 | * Author: Joonyoung Shim <jy0922.shim@samsung.com> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License as published by the | ||
7 | * Free Software Foundation; either version 2 of the License, or (at your | ||
8 | * option) any later version. | ||
9 | * | ||
10 | */ | ||
11 | |||
12 | #include <linux/platform_device.h> | ||
13 | #include <mach/irqs.h> | ||
14 | #include <mach/map.h> | ||
15 | #include <plat/devs.h> | ||
16 | #include <plat/ehci.h> | ||
17 | #include <plat/usb-phy.h> | ||
18 | |||
19 | /* USB EHCI Host Controller registration */ | ||
20 | static struct resource s5p_ehci_resource[] = { | ||
21 | [0] = { | ||
22 | .start = S5P_PA_EHCI, | ||
23 | .end = S5P_PA_EHCI + SZ_256 - 1, | ||
24 | .flags = IORESOURCE_MEM, | ||
25 | }, | ||
26 | [1] = { | ||
27 | .start = IRQ_USB_HOST, | ||
28 | .end = IRQ_USB_HOST, | ||
29 | .flags = IORESOURCE_IRQ, | ||
30 | } | ||
31 | }; | ||
32 | |||
33 | static u64 s5p_device_ehci_dmamask = 0xffffffffUL; | ||
34 | |||
35 | struct platform_device s5p_device_ehci = { | ||
36 | .name = "s5p-ehci", | ||
37 | .id = -1, | ||
38 | .num_resources = ARRAY_SIZE(s5p_ehci_resource), | ||
39 | .resource = s5p_ehci_resource, | ||
40 | .dev = { | ||
41 | .dma_mask = &s5p_device_ehci_dmamask, | ||
42 | .coherent_dma_mask = 0xffffffffUL | ||
43 | } | ||
44 | }; | ||
45 | |||
46 | void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd) | ||
47 | { | ||
48 | struct s5p_ehci_platdata *npd; | ||
49 | |||
50 | npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata), | ||
51 | &s5p_device_ehci); | ||
52 | |||
53 | if (!npd->phy_init) | ||
54 | npd->phy_init = s5p_usb_phy_init; | ||
55 | if (!npd->phy_exit) | ||
56 | npd->phy_exit = s5p_usb_phy_exit; | ||
57 | } | ||
diff --git a/arch/arm/plat-s5p/dev-fimc0.c b/arch/arm/plat-s5p/dev-fimc0.c deleted file mode 100644 index 608770fc153..00000000000 --- a/arch/arm/plat-s5p/dev-fimc0.c +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s5p/dev-fimc0.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics | ||
4 | * | ||
5 | * Base S5P FIMC0 resource and device definitions | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/dma-mapping.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/ioport.h> | ||
17 | #include <mach/map.h> | ||
18 | |||
19 | static struct resource s5p_fimc0_resource[] = { | ||
20 | [0] = { | ||
21 | .start = S5P_PA_FIMC0, | ||
22 | .end = S5P_PA_FIMC0 + SZ_4K - 1, | ||
23 | .flags = IORESOURCE_MEM, | ||
24 | }, | ||
25 | [1] = { | ||
26 | .start = IRQ_FIMC0, | ||
27 | .end = IRQ_FIMC0, | ||
28 | .flags = IORESOURCE_IRQ, | ||
29 | }, | ||
30 | }; | ||
31 | |||
32 | static u64 s5p_fimc0_dma_mask = DMA_BIT_MASK(32); | ||
33 | |||
34 | struct platform_device s5p_device_fimc0 = { | ||
35 | .name = "s5p-fimc", | ||
36 | .id = 0, | ||
37 | .num_resources = ARRAY_SIZE(s5p_fimc0_resource), | ||
38 | .resource = s5p_fimc0_resource, | ||
39 | .dev = { | ||
40 | .dma_mask = &s5p_fimc0_dma_mask, | ||
41 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
42 | }, | ||
43 | }; | ||
diff --git a/arch/arm/plat-s5p/dev-fimc1.c b/arch/arm/plat-s5p/dev-fimc1.c deleted file mode 100644 index 76e3a97a87d..00000000000 --- a/arch/arm/plat-s5p/dev-fimc1.c +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s5p/dev-fimc1.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics | ||
4 | * | ||
5 | * Base S5P FIMC1 resource and device definitions | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/dma-mapping.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/ioport.h> | ||
17 | #include <mach/map.h> | ||
18 | |||
19 | static struct resource s5p_fimc1_resource[] = { | ||
20 | [0] = { | ||
21 | .start = S5P_PA_FIMC1, | ||
22 | .end = S5P_PA_FIMC1 + SZ_4K - 1, | ||
23 | .flags = IORESOURCE_MEM, | ||
24 | }, | ||
25 | [1] = { | ||
26 | .start = IRQ_FIMC1, | ||
27 | .end = IRQ_FIMC1, | ||
28 | .flags = IORESOURCE_IRQ, | ||
29 | }, | ||
30 | }; | ||
31 | |||
32 | static u64 s5p_fimc1_dma_mask = DMA_BIT_MASK(32); | ||
33 | |||
34 | struct platform_device s5p_device_fimc1 = { | ||
35 | .name = "s5p-fimc", | ||
36 | .id = 1, | ||
37 | .num_resources = ARRAY_SIZE(s5p_fimc1_resource), | ||
38 | .resource = s5p_fimc1_resource, | ||
39 | .dev = { | ||
40 | .dma_mask = &s5p_fimc1_dma_mask, | ||
41 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
42 | }, | ||
43 | }; | ||
diff --git a/arch/arm/plat-s5p/dev-fimc2.c b/arch/arm/plat-s5p/dev-fimc2.c deleted file mode 100644 index 24d29816fa2..00000000000 --- a/arch/arm/plat-s5p/dev-fimc2.c +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s5p/dev-fimc2.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics | ||
4 | * | ||
5 | * Base S5P FIMC2 resource and device definitions | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/dma-mapping.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/ioport.h> | ||
17 | #include <mach/map.h> | ||
18 | |||
19 | static struct resource s5p_fimc2_resource[] = { | ||
20 | [0] = { | ||
21 | .start = S5P_PA_FIMC2, | ||
22 | .end = S5P_PA_FIMC2 + SZ_4K - 1, | ||
23 | .flags = IORESOURCE_MEM, | ||
24 | }, | ||
25 | [1] = { | ||
26 | .start = IRQ_FIMC2, | ||
27 | .end = IRQ_FIMC2, | ||
28 | .flags = IORESOURCE_IRQ, | ||
29 | }, | ||
30 | }; | ||
31 | |||
32 | static u64 s5p_fimc2_dma_mask = DMA_BIT_MASK(32); | ||
33 | |||
34 | struct platform_device s5p_device_fimc2 = { | ||
35 | .name = "s5p-fimc", | ||
36 | .id = 2, | ||
37 | .num_resources = ARRAY_SIZE(s5p_fimc2_resource), | ||
38 | .resource = s5p_fimc2_resource, | ||
39 | .dev = { | ||
40 | .dma_mask = &s5p_fimc2_dma_mask, | ||
41 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
42 | }, | ||
43 | }; | ||
diff --git a/arch/arm/plat-s5p/dev-fimc3.c b/arch/arm/plat-s5p/dev-fimc3.c deleted file mode 100644 index ef31beca386..00000000000 --- a/arch/arm/plat-s5p/dev-fimc3.c +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s5p/dev-fimc3.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics | ||
4 | * | ||
5 | * Base S5P FIMC3 resource and device definitions | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/dma-mapping.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/ioport.h> | ||
17 | #include <mach/map.h> | ||
18 | |||
19 | static struct resource s5p_fimc3_resource[] = { | ||
20 | [0] = { | ||
21 | .start = S5P_PA_FIMC3, | ||
22 | .end = S5P_PA_FIMC3 + SZ_4K - 1, | ||
23 | .flags = IORESOURCE_MEM, | ||
24 | }, | ||
25 | [1] = { | ||
26 | .start = IRQ_FIMC3, | ||
27 | .end = IRQ_FIMC3, | ||
28 | .flags = IORESOURCE_IRQ, | ||
29 | }, | ||
30 | }; | ||
31 | |||
32 | static u64 s5p_fimc3_dma_mask = DMA_BIT_MASK(32); | ||
33 | |||
34 | struct platform_device s5p_device_fimc3 = { | ||
35 | .name = "s5p-fimc", | ||
36 | .id = 3, | ||
37 | .num_resources = ARRAY_SIZE(s5p_fimc3_resource), | ||
38 | .resource = s5p_fimc3_resource, | ||
39 | .dev = { | ||
40 | .dma_mask = &s5p_fimc3_dma_mask, | ||
41 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
42 | }, | ||
43 | }; | ||
diff --git a/arch/arm/plat-s5p/dev-fimd0.c b/arch/arm/plat-s5p/dev-fimd0.c deleted file mode 100644 index f728bb5abce..00000000000 --- a/arch/arm/plat-s5p/dev-fimd0.c +++ /dev/null | |||
@@ -1,67 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s5p/dev-fimd0.c | ||
2 | * | ||
3 | * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Core file for Samsung Display Controller (FIMD) driver | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/string.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/fb.h> | ||
17 | #include <linux/gfp.h> | ||
18 | #include <linux/dma-mapping.h> | ||
19 | |||
20 | #include <mach/irqs.h> | ||
21 | #include <mach/map.h> | ||
22 | |||
23 | #include <plat/fb.h> | ||
24 | #include <plat/devs.h> | ||
25 | #include <plat/cpu.h> | ||
26 | |||
27 | static struct resource s5p_fimd0_resource[] = { | ||
28 | [0] = { | ||
29 | .start = S5P_PA_FIMD0, | ||
30 | .end = S5P_PA_FIMD0 + SZ_32K - 1, | ||
31 | .flags = IORESOURCE_MEM, | ||
32 | }, | ||
33 | [1] = { | ||
34 | .start = IRQ_FIMD0_VSYNC, | ||
35 | .end = IRQ_FIMD0_VSYNC, | ||
36 | .flags = IORESOURCE_IRQ, | ||
37 | }, | ||
38 | [2] = { | ||
39 | .start = IRQ_FIMD0_FIFO, | ||
40 | .end = IRQ_FIMD0_FIFO, | ||
41 | .flags = IORESOURCE_IRQ, | ||
42 | }, | ||
43 | [3] = { | ||
44 | .start = IRQ_FIMD0_SYSTEM, | ||
45 | .end = IRQ_FIMD0_SYSTEM, | ||
46 | .flags = IORESOURCE_IRQ, | ||
47 | }, | ||
48 | }; | ||
49 | |||
50 | static u64 fimd0_dmamask = DMA_BIT_MASK(32); | ||
51 | |||
52 | struct platform_device s5p_device_fimd0 = { | ||
53 | .name = "s5p-fb", | ||
54 | .id = 0, | ||
55 | .num_resources = ARRAY_SIZE(s5p_fimd0_resource), | ||
56 | .resource = s5p_fimd0_resource, | ||
57 | .dev = { | ||
58 | .dma_mask = &fimd0_dmamask, | ||
59 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
60 | }, | ||
61 | }; | ||
62 | |||
63 | void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd) | ||
64 | { | ||
65 | s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata), | ||
66 | &s5p_device_fimd0); | ||
67 | } | ||
diff --git a/arch/arm/plat-s5p/dev-mfc.c b/arch/arm/plat-s5p/dev-mfc.c index 94226a0010f..a30d36b7f61 100644 --- a/arch/arm/plat-s5p/dev-mfc.c +++ b/arch/arm/plat-s5p/dev-mfc.c | |||
@@ -22,56 +22,6 @@ | |||
22 | #include <plat/irqs.h> | 22 | #include <plat/irqs.h> |
23 | #include <plat/mfc.h> | 23 | #include <plat/mfc.h> |
24 | 24 | ||
25 | static struct resource s5p_mfc_resource[] = { | ||
26 | [0] = { | ||
27 | .start = S5P_PA_MFC, | ||
28 | .end = S5P_PA_MFC + SZ_64K - 1, | ||
29 | .flags = IORESOURCE_MEM, | ||
30 | }, | ||
31 | [1] = { | ||
32 | .start = IRQ_MFC, | ||
33 | .end = IRQ_MFC, | ||
34 | .flags = IORESOURCE_IRQ, | ||
35 | } | ||
36 | }; | ||
37 | |||
38 | struct platform_device s5p_device_mfc = { | ||
39 | .name = "s5p-mfc", | ||
40 | .id = -1, | ||
41 | .num_resources = ARRAY_SIZE(s5p_mfc_resource), | ||
42 | .resource = s5p_mfc_resource, | ||
43 | }; | ||
44 | |||
45 | /* | ||
46 | * MFC hardware has 2 memory interfaces which are modelled as two separate | ||
47 | * platform devices to let dma-mapping distinguish between them. | ||
48 | * | ||
49 | * MFC parent device (s5p_device_mfc) must be registered before memory | ||
50 | * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r). | ||
51 | */ | ||
52 | |||
53 | static u64 s5p_mfc_dma_mask = DMA_BIT_MASK(32); | ||
54 | |||
55 | struct platform_device s5p_device_mfc_l = { | ||
56 | .name = "s5p-mfc-l", | ||
57 | .id = -1, | ||
58 | .dev = { | ||
59 | .parent = &s5p_device_mfc.dev, | ||
60 | .dma_mask = &s5p_mfc_dma_mask, | ||
61 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
62 | }, | ||
63 | }; | ||
64 | |||
65 | struct platform_device s5p_device_mfc_r = { | ||
66 | .name = "s5p-mfc-r", | ||
67 | .id = -1, | ||
68 | .dev = { | ||
69 | .parent = &s5p_device_mfc.dev, | ||
70 | .dma_mask = &s5p_mfc_dma_mask, | ||
71 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
72 | }, | ||
73 | }; | ||
74 | |||
75 | struct s5p_mfc_reserved_mem { | 25 | struct s5p_mfc_reserved_mem { |
76 | phys_addr_t base; | 26 | phys_addr_t base; |
77 | unsigned long size; | 27 | unsigned long size; |
diff --git a/arch/arm/plat-s5p/dev-onenand.c b/arch/arm/plat-s5p/dev-onenand.c deleted file mode 100644 index 20336c8f247..00000000000 --- a/arch/arm/plat-s5p/dev-onenand.c +++ /dev/null | |||
@@ -1,45 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s5p/dev-onenand.c | ||
2 | * | ||
3 | * Copyright 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright (c) 2008-2010 Samsung Electronics | ||
7 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
8 | * | ||
9 | * S5P series device definition for OneNAND devices | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License version 2 as | ||
13 | * published by the Free Software Foundation. | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | |||
19 | #include <mach/irqs.h> | ||
20 | #include <mach/map.h> | ||
21 | |||
22 | static struct resource s5p_onenand_resources[] = { | ||
23 | [0] = { | ||
24 | .start = S5P_PA_ONENAND, | ||
25 | .end = S5P_PA_ONENAND + SZ_128K - 1, | ||
26 | .flags = IORESOURCE_MEM, | ||
27 | }, | ||
28 | [1] = { | ||
29 | .start = S5P_PA_ONENAND_DMA, | ||
30 | .end = S5P_PA_ONENAND_DMA + SZ_8K - 1, | ||
31 | .flags = IORESOURCE_MEM, | ||
32 | }, | ||
33 | [2] = { | ||
34 | .start = IRQ_ONENAND_AUDI, | ||
35 | .end = IRQ_ONENAND_AUDI, | ||
36 | .flags = IORESOURCE_IRQ, | ||
37 | }, | ||
38 | }; | ||
39 | |||
40 | struct platform_device s5p_device_onenand = { | ||
41 | .name = "s5pc110-onenand", | ||
42 | .id = -1, | ||
43 | .num_resources = ARRAY_SIZE(s5p_onenand_resources), | ||
44 | .resource = s5p_onenand_resources, | ||
45 | }; | ||
diff --git a/arch/arm/plat-s5p/dev-pmu.c b/arch/arm/plat-s5p/dev-pmu.c deleted file mode 100644 index a08576da72b..00000000000 --- a/arch/arm/plat-s5p/dev-pmu.c +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/plat-s5p/dev-pmu.c | ||
3 | * | ||
4 | * Copyright (C) 2010 Samsung Electronics Co.Ltd | ||
5 | * Author: Joonyoung Shim <jy0922.shim@samsung.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/platform_device.h> | ||
15 | #include <asm/pmu.h> | ||
16 | #include <mach/irqs.h> | ||
17 | |||
18 | static struct resource s5p_pmu_resource = { | ||
19 | .start = IRQ_PMU, | ||
20 | .end = IRQ_PMU, | ||
21 | .flags = IORESOURCE_IRQ, | ||
22 | }; | ||
23 | |||
24 | struct platform_device s5p_device_pmu = { | ||
25 | .name = "arm-pmu", | ||
26 | .id = ARM_PMU_DEVICE_CPU, | ||
27 | .num_resources = 1, | ||
28 | .resource = &s5p_pmu_resource, | ||
29 | }; | ||
30 | |||
31 | static int __init s5p_pmu_init(void) | ||
32 | { | ||
33 | platform_device_register(&s5p_device_pmu); | ||
34 | return 0; | ||
35 | } | ||
36 | arch_initcall(s5p_pmu_init); | ||
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c index c65eb791d1b..1fdfaa4599c 100644 --- a/arch/arm/plat-s5p/irq-gpioint.c +++ b/arch/arm/plat-s5p/irq-gpioint.c | |||
@@ -37,7 +37,7 @@ struct s5p_gpioint_bank { | |||
37 | int start; | 37 | int start; |
38 | int nr_groups; | 38 | int nr_groups; |
39 | int irq; | 39 | int irq; |
40 | struct s3c_gpio_chip **chips; | 40 | struct samsung_gpio_chip **chips; |
41 | void (*handler)(unsigned int, struct irq_desc *); | 41 | void (*handler)(unsigned int, struct irq_desc *); |
42 | }; | 42 | }; |
43 | 43 | ||
@@ -87,7 +87,7 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc) | |||
87 | chained_irq_enter(chip, desc); | 87 | chained_irq_enter(chip, desc); |
88 | 88 | ||
89 | for (group = 0; group < bank->nr_groups; group++) { | 89 | for (group = 0; group < bank->nr_groups; group++) { |
90 | struct s3c_gpio_chip *chip = bank->chips[group]; | 90 | struct samsung_gpio_chip *chip = bank->chips[group]; |
91 | if (!chip) | 91 | if (!chip) |
92 | continue; | 92 | continue; |
93 | 93 | ||
@@ -110,7 +110,7 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc) | |||
110 | chained_irq_exit(chip, desc); | 110 | chained_irq_exit(chip, desc); |
111 | } | 111 | } |
112 | 112 | ||
113 | static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip) | 113 | static __init int s5p_gpioint_add(struct samsung_gpio_chip *chip) |
114 | { | 114 | { |
115 | static int used_gpioint_groups = 0; | 115 | static int used_gpioint_groups = 0; |
116 | int group = chip->group; | 116 | int group = chip->group; |
@@ -131,7 +131,7 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip) | |||
131 | return -EINVAL; | 131 | return -EINVAL; |
132 | 132 | ||
133 | if (!bank->handler) { | 133 | if (!bank->handler) { |
134 | bank->chips = kzalloc(sizeof(struct s3c_gpio_chip *) * | 134 | bank->chips = kzalloc(sizeof(struct samsung_gpio_chip *) * |
135 | bank->nr_groups, GFP_KERNEL); | 135 | bank->nr_groups, GFP_KERNEL); |
136 | if (!bank->chips) | 136 | if (!bank->chips) |
137 | return -ENOMEM; | 137 | return -ENOMEM; |
@@ -174,7 +174,7 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip) | |||
174 | 174 | ||
175 | int __init s5p_register_gpio_interrupt(int pin) | 175 | int __init s5p_register_gpio_interrupt(int pin) |
176 | { | 176 | { |
177 | struct s3c_gpio_chip *my_chip = s3c_gpiolib_getchip(pin); | 177 | struct samsung_gpio_chip *my_chip = samsung_gpiolib_getchip(pin); |
178 | int offset, group; | 178 | int offset, group; |
179 | int ret; | 179 | int ret; |
180 | 180 | ||
diff --git a/arch/arm/mach-exynos4/sleep.S b/arch/arm/plat-s5p/sleep.S index 0984078f1eb..0fd591bfc9f 100644 --- a/arch/arm/mach-exynos4/sleep.S +++ b/arch/arm/plat-s5p/sleep.S | |||
@@ -1,15 +1,11 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/sleep.S | 1 | /* linux/arch/arm/plat-s5p/sleep.S |
2 | * | 2 | * |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * EXYNOS4210 power Manager (Suspend-To-RAM) support | 6 | * Common S5P Sleep Code |
7 | * Based on S3C2410 sleep code by: | 7 | * Based on S3C64XX sleep code by: |
8 | * Ben Dooks, (c) 2004 Simtec Electronics | 8 | * Ben Dooks, (c) 2008 Simtec Electronics |
9 | * | ||
10 | * Based on PXA/SA1100 sleep code by: | ||
11 | * Nicolas Pitre, (c) 2002 Monta Vista Software Inc | ||
12 | * Cliff Brake, (c) 2001 | ||
13 | * | 9 | * |
14 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
15 | * it under the terms of the GNU General Public License as published by | 11 | * it under the terms of the GNU General Public License as published by |
@@ -28,7 +24,6 @@ | |||
28 | 24 | ||
29 | #include <linux/linkage.h> | 25 | #include <linux/linkage.h> |
30 | #include <asm/assembler.h> | 26 | #include <asm/assembler.h> |
31 | #include <asm/memory.h> | ||
32 | 27 | ||
33 | .text | 28 | .text |
34 | 29 | ||
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 3895f9aff0d..313eb26cfa6 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig | |||
@@ -74,39 +74,12 @@ config SAMSUNG_GPIOLIB_4BIT | |||
74 | configuration. GPIOlib shall be compiled only for S3C64XX and S5P | 74 | configuration. GPIOlib shall be compiled only for S3C64XX and S5P |
75 | series of processors. | 75 | series of processors. |
76 | 76 | ||
77 | config S3C_GPIO_CFG_S3C24XX | ||
78 | bool | ||
79 | help | ||
80 | Internal configuration to enable S3C24XX style GPIO configuration | ||
81 | functions. | ||
82 | |||
83 | config S3C_GPIO_CFG_S3C64XX | 77 | config S3C_GPIO_CFG_S3C64XX |
84 | bool | 78 | bool |
85 | help | 79 | help |
86 | Internal configuration to enable S3C64XX style GPIO configuration | 80 | Internal configuration to enable S3C64XX style GPIO configuration |
87 | functions. | 81 | functions. |
88 | 82 | ||
89 | config S3C_GPIO_PULL_UPDOWN | ||
90 | bool | ||
91 | help | ||
92 | Internal configuration to enable the correct GPIO pull helper | ||
93 | |||
94 | config S3C_GPIO_PULL_S3C2443 | ||
95 | bool | ||
96 | select S3C_GPIO_PULL_UPDOWN | ||
97 | help | ||
98 | Internal configuration to enable the correct GPIO pull helper for S3C2443-style GPIO | ||
99 | |||
100 | config S3C_GPIO_PULL_DOWN | ||
101 | bool | ||
102 | help | ||
103 | Internal configuration to enable the correct GPIO pull helper | ||
104 | |||
105 | config S3C_GPIO_PULL_UP | ||
106 | bool | ||
107 | help | ||
108 | Internal configuration to enable the correct GPIO pull helper | ||
109 | |||
110 | config S5P_GPIO_DRVSTR | 83 | config S5P_GPIO_DRVSTR |
111 | bool | 84 | bool |
112 | help | 85 | help |
@@ -295,11 +268,14 @@ config S3C_DMA | |||
295 | help | 268 | help |
296 | Internal configuration for S3C DMA core | 269 | Internal configuration for S3C DMA core |
297 | 270 | ||
298 | config S3C_PL330_DMA | 271 | config SAMSUNG_DMADEV |
299 | bool | 272 | bool |
300 | select PL330 | 273 | select DMADEVICES |
274 | select PL330_DMA if (CPU_EXYNOS4210 || CPU_S5PV210 || CPU_S5PC100 || \ | ||
275 | CPU_S5P6450 || CPU_S5P6440) | ||
276 | select ARM_AMBA | ||
301 | help | 277 | help |
302 | S3C DMA API Driver for PL330 DMAC. | 278 | Use DMA device engine for PL330 DMAC. |
303 | 279 | ||
304 | comment "Power management" | 280 | comment "Power management" |
305 | 281 | ||
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 09adb84f271..6012366f33c 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile | |||
@@ -1,4 +1,4 @@ | |||
1 | # arch/arm/plat-s3c64xx/Makefile | 1 | # arch/arm/plat-samsung/Makefile |
2 | # | 2 | # |
3 | # Copyright 2009 Simtec Electronics | 3 | # Copyright 2009 Simtec Electronics |
4 | # | 4 | # |
@@ -15,9 +15,6 @@ obj-y += init.o cpu.o | |||
15 | obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET) += time.o | 15 | obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET) += time.o |
16 | obj-y += clock.o | 16 | obj-y += clock.o |
17 | obj-y += pwm-clock.o | 17 | obj-y += pwm-clock.o |
18 | obj-y += gpio.o | ||
19 | obj-y += gpio-config.o | ||
20 | obj-y += dev-asocdma.o | ||
21 | 18 | ||
22 | obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o | 19 | obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o |
23 | 20 | ||
@@ -31,40 +28,16 @@ obj-$(CONFIG_S3C_ADC) += adc.o | |||
31 | 28 | ||
32 | obj-y += platformdata.o | 29 | obj-y += platformdata.o |
33 | 30 | ||
34 | obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o | 31 | obj-y += devs.o |
35 | obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o | ||
36 | obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o | ||
37 | obj-$(CONFIG_S3C_DEV_HSMMC3) += dev-hsmmc3.o | ||
38 | obj-$(CONFIG_S3C_DEV_HWMON) += dev-hwmon.o | ||
39 | obj-y += dev-i2c0.o | ||
40 | obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o | ||
41 | obj-$(CONFIG_S3C_DEV_I2C2) += dev-i2c2.o | ||
42 | obj-$(CONFIG_S3C_DEV_I2C3) += dev-i2c3.o | ||
43 | obj-$(CONFIG_S3C_DEV_I2C4) += dev-i2c4.o | ||
44 | obj-$(CONFIG_S3C_DEV_I2C5) += dev-i2c5.o | ||
45 | obj-$(CONFIG_S3C_DEV_I2C6) += dev-i2c6.o | ||
46 | obj-$(CONFIG_S3C_DEV_I2C7) += dev-i2c7.o | ||
47 | obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o | ||
48 | obj-y += dev-uart.o | 32 | obj-y += dev-uart.o |
49 | obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o | 33 | |
50 | obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o | ||
51 | obj-$(CONFIG_S3C_DEV_WDT) += dev-wdt.o | ||
52 | obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o | ||
53 | obj-$(CONFIG_S3C_DEV_ONENAND) += dev-onenand.o | ||
54 | obj-$(CONFIG_S3C_DEV_RTC) += dev-rtc.o | ||
55 | |||
56 | obj-$(CONFIG_SAMSUNG_DEV_ADC) += dev-adc.o | ||
57 | obj-$(CONFIG_SAMSUNG_DEV_IDE) += dev-ide.o | ||
58 | obj-$(CONFIG_SAMSUNG_DEV_TS) += dev-ts.o | ||
59 | obj-$(CONFIG_SAMSUNG_DEV_KEYPAD) += dev-keypad.o | ||
60 | obj-$(CONFIG_SAMSUNG_DEV_PWM) += dev-pwm.o | ||
61 | obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight.o | 34 | obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight.o |
62 | 35 | ||
63 | # DMA support | 36 | # DMA support |
64 | 37 | ||
65 | obj-$(CONFIG_S3C_DMA) += dma.o | 38 | obj-$(CONFIG_S3C_DMA) += dma.o s3c-dma-ops.o |
66 | 39 | ||
67 | obj-$(CONFIG_S3C_PL330_DMA) += s3c-pl330.o | 40 | obj-$(CONFIG_SAMSUNG_DMADEV) += dma-ops.o |
68 | 41 | ||
69 | # PM support | 42 | # PM support |
70 | 43 | ||
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c index ee8deef1948..33ecd0c9f0c 100644 --- a/arch/arm/plat-samsung/adc.c +++ b/arch/arm/plat-samsung/adc.c | |||
@@ -41,6 +41,8 @@ | |||
41 | 41 | ||
42 | enum s3c_cpu_type { | 42 | enum s3c_cpu_type { |
43 | TYPE_ADCV1, /* S3C24XX */ | 43 | TYPE_ADCV1, /* S3C24XX */ |
44 | TYPE_ADCV11, /* S3C2443 */ | ||
45 | TYPE_ADCV12, /* S3C2416, S3C2450 */ | ||
44 | TYPE_ADCV2, /* S3C64XX, S5P64X0, S5PC100 */ | 46 | TYPE_ADCV2, /* S3C64XX, S5P64X0, S5PC100 */ |
45 | TYPE_ADCV3, /* S5PV210, S5PC110, EXYNOS4210 */ | 47 | TYPE_ADCV3, /* S5PV210, S5PC110, EXYNOS4210 */ |
46 | }; | 48 | }; |
@@ -98,13 +100,17 @@ static inline void s3c_adc_select(struct adc_device *adc, | |||
98 | 100 | ||
99 | client->select_cb(client, 1); | 101 | client->select_cb(client, 1); |
100 | 102 | ||
101 | con &= ~S3C2410_ADCCON_MUXMASK; | 103 | if (cpu == TYPE_ADCV1 || cpu == TYPE_ADCV2) |
104 | con &= ~S3C2410_ADCCON_MUXMASK; | ||
102 | con &= ~S3C2410_ADCCON_STDBM; | 105 | con &= ~S3C2410_ADCCON_STDBM; |
103 | con &= ~S3C2410_ADCCON_STARTMASK; | 106 | con &= ~S3C2410_ADCCON_STARTMASK; |
104 | 107 | ||
105 | if (!client->is_ts) { | 108 | if (!client->is_ts) { |
106 | if (cpu == TYPE_ADCV3) | 109 | if (cpu == TYPE_ADCV3) |
107 | writel(client->channel & 0xf, adc->regs + S5P_ADCMUX); | 110 | writel(client->channel & 0xf, adc->regs + S5P_ADCMUX); |
111 | else if (cpu == TYPE_ADCV11 || cpu == TYPE_ADCV12) | ||
112 | writel(client->channel & 0xf, | ||
113 | adc->regs + S3C2443_ADCMUX); | ||
108 | else | 114 | else |
109 | con |= S3C2410_ADCCON_SELMUX(client->channel); | 115 | con |= S3C2410_ADCCON_SELMUX(client->channel); |
110 | } | 116 | } |
@@ -293,13 +299,13 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw) | |||
293 | 299 | ||
294 | client->nr_samples--; | 300 | client->nr_samples--; |
295 | 301 | ||
296 | if (cpu != TYPE_ADCV1) { | 302 | if (cpu == TYPE_ADCV1 || cpu == TYPE_ADCV11) { |
297 | /* S3C64XX/S5P ADC resolution is 12-bit */ | ||
298 | data0 &= 0xfff; | ||
299 | data1 &= 0xfff; | ||
300 | } else { | ||
301 | data0 &= 0x3ff; | 303 | data0 &= 0x3ff; |
302 | data1 &= 0x3ff; | 304 | data1 &= 0x3ff; |
305 | } else { | ||
306 | /* S3C2416/S3C64XX/S5P ADC resolution is 12-bit */ | ||
307 | data0 &= 0xfff; | ||
308 | data1 &= 0xfff; | ||
303 | } | 309 | } |
304 | 310 | ||
305 | if (client->convert_cb) | 311 | if (client->convert_cb) |
@@ -320,7 +326,7 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw) | |||
320 | } | 326 | } |
321 | 327 | ||
322 | exit: | 328 | exit: |
323 | if (cpu != TYPE_ADCV1) { | 329 | if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3) { |
324 | /* Clear ADC interrupt */ | 330 | /* Clear ADC interrupt */ |
325 | writel(0, adc->regs + S3C64XX_ADCCLRINT); | 331 | writel(0, adc->regs + S3C64XX_ADCCLRINT); |
326 | } | 332 | } |
@@ -332,6 +338,7 @@ static int s3c_adc_probe(struct platform_device *pdev) | |||
332 | struct device *dev = &pdev->dev; | 338 | struct device *dev = &pdev->dev; |
333 | struct adc_device *adc; | 339 | struct adc_device *adc; |
334 | struct resource *regs; | 340 | struct resource *regs; |
341 | enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data; | ||
335 | int ret; | 342 | int ret; |
336 | unsigned tmp; | 343 | unsigned tmp; |
337 | 344 | ||
@@ -394,10 +401,13 @@ static int s3c_adc_probe(struct platform_device *pdev) | |||
394 | clk_enable(adc->clk); | 401 | clk_enable(adc->clk); |
395 | 402 | ||
396 | tmp = adc->prescale | S3C2410_ADCCON_PRSCEN; | 403 | tmp = adc->prescale | S3C2410_ADCCON_PRSCEN; |
397 | if (platform_get_device_id(pdev)->driver_data != TYPE_ADCV1) { | 404 | |
398 | /* Enable 12-bit ADC resolution */ | 405 | /* Enable 12-bit ADC resolution */ |
406 | if (cpu == TYPE_ADCV12) | ||
407 | tmp |= S3C2416_ADCCON_RESSEL; | ||
408 | if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3) | ||
399 | tmp |= S3C64XX_ADCCON_RESSEL; | 409 | tmp |= S3C64XX_ADCCON_RESSEL; |
400 | } | 410 | |
401 | writel(tmp, adc->regs + S3C2410_ADCCON); | 411 | writel(tmp, adc->regs + S3C2410_ADCCON); |
402 | 412 | ||
403 | dev_info(dev, "attached adc driver\n"); | 413 | dev_info(dev, "attached adc driver\n"); |
@@ -464,6 +474,7 @@ static int s3c_adc_resume(struct device *dev) | |||
464 | struct platform_device *pdev = container_of(dev, | 474 | struct platform_device *pdev = container_of(dev, |
465 | struct platform_device, dev); | 475 | struct platform_device, dev); |
466 | struct adc_device *adc = platform_get_drvdata(pdev); | 476 | struct adc_device *adc = platform_get_drvdata(pdev); |
477 | enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data; | ||
467 | int ret; | 478 | int ret; |
468 | unsigned long tmp; | 479 | unsigned long tmp; |
469 | 480 | ||
@@ -474,9 +485,13 @@ static int s3c_adc_resume(struct device *dev) | |||
474 | enable_irq(adc->irq); | 485 | enable_irq(adc->irq); |
475 | 486 | ||
476 | tmp = adc->prescale | S3C2410_ADCCON_PRSCEN; | 487 | tmp = adc->prescale | S3C2410_ADCCON_PRSCEN; |
488 | |||
477 | /* Enable 12-bit ADC resolution */ | 489 | /* Enable 12-bit ADC resolution */ |
478 | if (platform_get_device_id(pdev)->driver_data != TYPE_ADCV1) | 490 | if (cpu == TYPE_ADCV12) |
491 | tmp |= S3C2416_ADCCON_RESSEL; | ||
492 | if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3) | ||
479 | tmp |= S3C64XX_ADCCON_RESSEL; | 493 | tmp |= S3C64XX_ADCCON_RESSEL; |
494 | |||
480 | writel(tmp, adc->regs + S3C2410_ADCCON); | 495 | writel(tmp, adc->regs + S3C2410_ADCCON); |
481 | 496 | ||
482 | return 0; | 497 | return 0; |
@@ -492,6 +507,12 @@ static struct platform_device_id s3c_adc_driver_ids[] = { | |||
492 | .name = "s3c24xx-adc", | 507 | .name = "s3c24xx-adc", |
493 | .driver_data = TYPE_ADCV1, | 508 | .driver_data = TYPE_ADCV1, |
494 | }, { | 509 | }, { |
510 | .name = "s3c2443-adc", | ||
511 | .driver_data = TYPE_ADCV11, | ||
512 | }, { | ||
513 | .name = "s3c2416-adc", | ||
514 | .driver_data = TYPE_ADCV12, | ||
515 | }, { | ||
495 | .name = "s3c64xx-adc", | 516 | .name = "s3c64xx-adc", |
496 | .driver_data = TYPE_ADCV2, | 517 | .driver_data = TYPE_ADCV2, |
497 | }, { | 518 | }, { |
diff --git a/arch/arm/plat-samsung/dev-adc.c b/arch/arm/plat-samsung/dev-adc.c deleted file mode 100644 index 9d903d4095e..00000000000 --- a/arch/arm/plat-samsung/dev-adc.c +++ /dev/null | |||
@@ -1,46 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-adc.c | ||
2 | * | ||
3 | * Copyright 2010 Maurus Cuelenaere | ||
4 | * | ||
5 | * S3C64xx series device definition for ADC device | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/string.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | |||
16 | #include <mach/irqs.h> | ||
17 | #include <mach/map.h> | ||
18 | |||
19 | #include <plat/adc.h> | ||
20 | #include <plat/devs.h> | ||
21 | #include <plat/cpu.h> | ||
22 | |||
23 | static struct resource s3c_adc_resource[] = { | ||
24 | [0] = { | ||
25 | .start = SAMSUNG_PA_ADC, | ||
26 | .end = SAMSUNG_PA_ADC + SZ_256 - 1, | ||
27 | .flags = IORESOURCE_MEM, | ||
28 | }, | ||
29 | [1] = { | ||
30 | .start = IRQ_TC, | ||
31 | .end = IRQ_TC, | ||
32 | .flags = IORESOURCE_IRQ, | ||
33 | }, | ||
34 | [2] = { | ||
35 | .start = IRQ_ADC, | ||
36 | .end = IRQ_ADC, | ||
37 | .flags = IORESOURCE_IRQ, | ||
38 | }, | ||
39 | }; | ||
40 | |||
41 | struct platform_device s3c_device_adc = { | ||
42 | .name = "samsung-adc", | ||
43 | .id = -1, | ||
44 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | ||
45 | .resource = s3c_adc_resource, | ||
46 | }; | ||
diff --git a/arch/arm/plat-samsung/dev-asocdma.c b/arch/arm/plat-samsung/dev-asocdma.c deleted file mode 100644 index 97e35d3c064..00000000000 --- a/arch/arm/plat-samsung/dev-asocdma.c +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-asocdma.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co. Ltd | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | #include <plat/devs.h> | ||
14 | |||
15 | static u64 audio_dmamask = DMA_BIT_MASK(32); | ||
16 | |||
17 | struct platform_device samsung_asoc_dma = { | ||
18 | .name = "samsung-audio", | ||
19 | .id = -1, | ||
20 | .dev = { | ||
21 | .dma_mask = &audio_dmamask, | ||
22 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
23 | } | ||
24 | }; | ||
25 | EXPORT_SYMBOL(samsung_asoc_dma); | ||
26 | |||
27 | struct platform_device samsung_asoc_idma = { | ||
28 | .name = "samsung-idma", | ||
29 | .id = -1, | ||
30 | .dev = { | ||
31 | .dma_mask = &audio_dmamask, | ||
32 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
33 | } | ||
34 | }; | ||
35 | EXPORT_SYMBOL(samsung_asoc_idma); | ||
diff --git a/arch/arm/plat-samsung/dev-backlight.c b/arch/arm/plat-samsung/dev-backlight.c index 3cedd4c407a..e657305644c 100644 --- a/arch/arm/plat-samsung/dev-backlight.c +++ b/arch/arm/plat-samsung/dev-backlight.c | |||
@@ -12,8 +12,10 @@ | |||
12 | 12 | ||
13 | #include <linux/gpio.h> | 13 | #include <linux/gpio.h> |
14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
15 | #include <linux/slab.h> | ||
15 | #include <linux/io.h> | 16 | #include <linux/io.h> |
16 | #include <linux/pwm_backlight.h> | 17 | #include <linux/pwm_backlight.h> |
18 | #include <linux/slab.h> | ||
17 | 19 | ||
18 | #include <plat/devs.h> | 20 | #include <plat/devs.h> |
19 | #include <plat/gpio-cfg.h> | 21 | #include <plat/gpio-cfg.h> |
diff --git a/arch/arm/plat-samsung/dev-fb.c b/arch/arm/plat-samsung/dev-fb.c deleted file mode 100644 index 49a1362fd25..00000000000 --- a/arch/arm/plat-samsung/dev-fb.c +++ /dev/null | |||
@@ -1,63 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c/dev-fb.c | ||
2 | * | ||
3 | * Copyright 2008 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * S3C series device definition for framebuffer device | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/fb.h> | ||
18 | #include <linux/gfp.h> | ||
19 | |||
20 | #include <mach/irqs.h> | ||
21 | #include <mach/map.h> | ||
22 | |||
23 | #include <plat/fb.h> | ||
24 | #include <plat/devs.h> | ||
25 | #include <plat/cpu.h> | ||
26 | |||
27 | static struct resource s3c_fb_resource[] = { | ||
28 | [0] = { | ||
29 | .start = S3C_PA_FB, | ||
30 | .end = S3C_PA_FB + SZ_16K - 1, | ||
31 | .flags = IORESOURCE_MEM, | ||
32 | }, | ||
33 | [1] = { | ||
34 | .start = IRQ_LCD_VSYNC, | ||
35 | .end = IRQ_LCD_VSYNC, | ||
36 | .flags = IORESOURCE_IRQ, | ||
37 | }, | ||
38 | [2] = { | ||
39 | .start = IRQ_LCD_FIFO, | ||
40 | .end = IRQ_LCD_FIFO, | ||
41 | .flags = IORESOURCE_IRQ, | ||
42 | }, | ||
43 | [3] = { | ||
44 | .start = IRQ_LCD_SYSTEM, | ||
45 | .end = IRQ_LCD_SYSTEM, | ||
46 | .flags = IORESOURCE_IRQ, | ||
47 | }, | ||
48 | }; | ||
49 | |||
50 | struct platform_device s3c_device_fb = { | ||
51 | .name = "s3c-fb", | ||
52 | .id = -1, | ||
53 | .num_resources = ARRAY_SIZE(s3c_fb_resource), | ||
54 | .resource = s3c_fb_resource, | ||
55 | .dev.dma_mask = &s3c_device_fb.dev.coherent_dma_mask, | ||
56 | .dev.coherent_dma_mask = 0xffffffffUL, | ||
57 | }; | ||
58 | |||
59 | void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd) | ||
60 | { | ||
61 | s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata), | ||
62 | &s3c_device_fb); | ||
63 | } | ||
diff --git a/arch/arm/plat-samsung/dev-hsmmc.c b/arch/arm/plat-samsung/dev-hsmmc.c deleted file mode 100644 index 06825c4276d..00000000000 --- a/arch/arm/plat-samsung/dev-hsmmc.c +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c/dev-hsmmc.c | ||
2 | * | ||
3 | * Copyright (c) 2008 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * S3C series device definition for hsmmc devices | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/mmc/host.h> | ||
17 | |||
18 | #include <mach/map.h> | ||
19 | #include <plat/sdhci.h> | ||
20 | #include <plat/devs.h> | ||
21 | #include <plat/cpu.h> | ||
22 | |||
23 | #define S3C_SZ_HSMMC (0x1000) | ||
24 | |||
25 | static struct resource s3c_hsmmc_resource[] = { | ||
26 | [0] = { | ||
27 | .start = S3C_PA_HSMMC0, | ||
28 | .end = S3C_PA_HSMMC0 + S3C_SZ_HSMMC - 1, | ||
29 | .flags = IORESOURCE_MEM, | ||
30 | }, | ||
31 | [1] = { | ||
32 | .start = IRQ_HSMMC0, | ||
33 | .end = IRQ_HSMMC0, | ||
34 | .flags = IORESOURCE_IRQ, | ||
35 | } | ||
36 | }; | ||
37 | |||
38 | static u64 s3c_device_hsmmc_dmamask = 0xffffffffUL; | ||
39 | |||
40 | struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = { | ||
41 | .max_width = 4, | ||
42 | .host_caps = (MMC_CAP_4_BIT_DATA | | ||
43 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | ||
44 | .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL, | ||
45 | }; | ||
46 | |||
47 | struct platform_device s3c_device_hsmmc0 = { | ||
48 | .name = "s3c-sdhci", | ||
49 | .id = 0, | ||
50 | .num_resources = ARRAY_SIZE(s3c_hsmmc_resource), | ||
51 | .resource = s3c_hsmmc_resource, | ||
52 | .dev = { | ||
53 | .dma_mask = &s3c_device_hsmmc_dmamask, | ||
54 | .coherent_dma_mask = 0xffffffffUL, | ||
55 | .platform_data = &s3c_hsmmc0_def_platdata, | ||
56 | }, | ||
57 | }; | ||
58 | |||
59 | void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd) | ||
60 | { | ||
61 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata); | ||
62 | } | ||
diff --git a/arch/arm/plat-samsung/dev-hsmmc1.c b/arch/arm/plat-samsung/dev-hsmmc1.c deleted file mode 100644 index 4524ef44001..00000000000 --- a/arch/arm/plat-samsung/dev-hsmmc1.c +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c/dev-hsmmc1.c | ||
2 | * | ||
3 | * Copyright (c) 2008 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * S3C series device definition for hsmmc device 1 | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/mmc/host.h> | ||
17 | |||
18 | #include <mach/map.h> | ||
19 | #include <plat/sdhci.h> | ||
20 | #include <plat/devs.h> | ||
21 | #include <plat/cpu.h> | ||
22 | |||
23 | #define S3C_SZ_HSMMC (0x1000) | ||
24 | |||
25 | static struct resource s3c_hsmmc1_resource[] = { | ||
26 | [0] = { | ||
27 | .start = S3C_PA_HSMMC1, | ||
28 | .end = S3C_PA_HSMMC1 + S3C_SZ_HSMMC - 1, | ||
29 | .flags = IORESOURCE_MEM, | ||
30 | }, | ||
31 | [1] = { | ||
32 | .start = IRQ_HSMMC1, | ||
33 | .end = IRQ_HSMMC1, | ||
34 | .flags = IORESOURCE_IRQ, | ||
35 | } | ||
36 | }; | ||
37 | |||
38 | static u64 s3c_device_hsmmc1_dmamask = 0xffffffffUL; | ||
39 | |||
40 | struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = { | ||
41 | .max_width = 4, | ||
42 | .host_caps = (MMC_CAP_4_BIT_DATA | | ||
43 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | ||
44 | .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL, | ||
45 | }; | ||
46 | |||
47 | struct platform_device s3c_device_hsmmc1 = { | ||
48 | .name = "s3c-sdhci", | ||
49 | .id = 1, | ||
50 | .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource), | ||
51 | .resource = s3c_hsmmc1_resource, | ||
52 | .dev = { | ||
53 | .dma_mask = &s3c_device_hsmmc1_dmamask, | ||
54 | .coherent_dma_mask = 0xffffffffUL, | ||
55 | .platform_data = &s3c_hsmmc1_def_platdata, | ||
56 | }, | ||
57 | }; | ||
58 | |||
59 | void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd) | ||
60 | { | ||
61 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata); | ||
62 | } | ||
diff --git a/arch/arm/plat-samsung/dev-hsmmc2.c b/arch/arm/plat-samsung/dev-hsmmc2.c deleted file mode 100644 index 9cede9615e4..00000000000 --- a/arch/arm/plat-samsung/dev-hsmmc2.c +++ /dev/null | |||
@@ -1,63 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c/dev-hsmmc2.c | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics | ||
4 | * Copyright (c) 2009 Maurus Cuelenaere | ||
5 | * | ||
6 | * Based on arch/arm/plat-s3c/dev-hsmmc1.c | ||
7 | * original file Copyright (c) 2008 Simtec Electronics | ||
8 | * | ||
9 | * S3C series device definition for hsmmc device 2 | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License version 2 as | ||
13 | * published by the Free Software Foundation. | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | #include <linux/mmc/host.h> | ||
19 | |||
20 | #include <mach/map.h> | ||
21 | #include <plat/sdhci.h> | ||
22 | #include <plat/devs.h> | ||
23 | |||
24 | #define S3C_SZ_HSMMC (0x1000) | ||
25 | |||
26 | static struct resource s3c_hsmmc2_resource[] = { | ||
27 | [0] = { | ||
28 | .start = S3C_PA_HSMMC2, | ||
29 | .end = S3C_PA_HSMMC2 + S3C_SZ_HSMMC - 1, | ||
30 | .flags = IORESOURCE_MEM, | ||
31 | }, | ||
32 | [1] = { | ||
33 | .start = IRQ_HSMMC2, | ||
34 | .end = IRQ_HSMMC2, | ||
35 | .flags = IORESOURCE_IRQ, | ||
36 | } | ||
37 | }; | ||
38 | |||
39 | static u64 s3c_device_hsmmc2_dmamask = 0xffffffffUL; | ||
40 | |||
41 | struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = { | ||
42 | .max_width = 4, | ||
43 | .host_caps = (MMC_CAP_4_BIT_DATA | | ||
44 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | ||
45 | .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL, | ||
46 | }; | ||
47 | |||
48 | struct platform_device s3c_device_hsmmc2 = { | ||
49 | .name = "s3c-sdhci", | ||
50 | .id = 2, | ||
51 | .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource), | ||
52 | .resource = s3c_hsmmc2_resource, | ||
53 | .dev = { | ||
54 | .dma_mask = &s3c_device_hsmmc2_dmamask, | ||
55 | .coherent_dma_mask = 0xffffffffUL, | ||
56 | .platform_data = &s3c_hsmmc2_def_platdata, | ||
57 | }, | ||
58 | }; | ||
59 | |||
60 | void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd) | ||
61 | { | ||
62 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata); | ||
63 | } | ||
diff --git a/arch/arm/plat-samsung/dev-hsmmc3.c b/arch/arm/plat-samsung/dev-hsmmc3.c deleted file mode 100644 index 0358ef4a8f6..00000000000 --- a/arch/arm/plat-samsung/dev-hsmmc3.c +++ /dev/null | |||
@@ -1,66 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-hsmmc3.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright (c) 2008 Simtec Electronics | ||
7 | * Ben Dooks <ben@simtec.co.uk> | ||
8 | * http://armlinux.simtec.co.uk/ | ||
9 | * | ||
10 | * Based on arch/arm/plat-samsung/dev-hsmmc1.c | ||
11 | * | ||
12 | * Samsung device definition for hsmmc device 3 | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License version 2 as | ||
16 | * published by the Free Software Foundation. | ||
17 | */ | ||
18 | |||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/platform_device.h> | ||
21 | #include <linux/mmc/host.h> | ||
22 | |||
23 | #include <mach/map.h> | ||
24 | #include <plat/sdhci.h> | ||
25 | #include <plat/devs.h> | ||
26 | |||
27 | #define S3C_SZ_HSMMC (0x1000) | ||
28 | |||
29 | static struct resource s3c_hsmmc3_resource[] = { | ||
30 | [0] = { | ||
31 | .start = S3C_PA_HSMMC3, | ||
32 | .end = S3C_PA_HSMMC3 + S3C_SZ_HSMMC - 1, | ||
33 | .flags = IORESOURCE_MEM, | ||
34 | }, | ||
35 | [1] = { | ||
36 | .start = IRQ_HSMMC3, | ||
37 | .end = IRQ_HSMMC3, | ||
38 | .flags = IORESOURCE_IRQ, | ||
39 | } | ||
40 | }; | ||
41 | |||
42 | static u64 s3c_device_hsmmc3_dmamask = 0xffffffffUL; | ||
43 | |||
44 | struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = { | ||
45 | .max_width = 4, | ||
46 | .host_caps = (MMC_CAP_4_BIT_DATA | | ||
47 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | ||
48 | .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL, | ||
49 | }; | ||
50 | |||
51 | struct platform_device s3c_device_hsmmc3 = { | ||
52 | .name = "s3c-sdhci", | ||
53 | .id = 3, | ||
54 | .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource), | ||
55 | .resource = s3c_hsmmc3_resource, | ||
56 | .dev = { | ||
57 | .dma_mask = &s3c_device_hsmmc3_dmamask, | ||
58 | .coherent_dma_mask = 0xffffffffUL, | ||
59 | .platform_data = &s3c_hsmmc3_def_platdata, | ||
60 | }, | ||
61 | }; | ||
62 | |||
63 | void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd) | ||
64 | { | ||
65 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata); | ||
66 | } | ||
diff --git a/arch/arm/plat-samsung/dev-hwmon.c b/arch/arm/plat-samsung/dev-hwmon.c deleted file mode 100644 index c91a79ce8f3..00000000000 --- a/arch/arm/plat-samsung/dev-hwmon.c +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-hwmon.c | ||
2 | * | ||
3 | * Copyright 2008 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * Adapted for HWMON by Maurus Cuelenaere | ||
8 | * | ||
9 | * Samsung series device definition for HWMON | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License version 2 as | ||
13 | * published by the Free Software Foundation. | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | |||
19 | #include <plat/devs.h> | ||
20 | #include <plat/hwmon.h> | ||
21 | |||
22 | struct platform_device s3c_device_hwmon = { | ||
23 | .name = "s3c-hwmon", | ||
24 | .id = -1, | ||
25 | .dev.parent = &s3c_device_adc.dev, | ||
26 | }; | ||
27 | |||
28 | void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd) | ||
29 | { | ||
30 | s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata), | ||
31 | &s3c_device_hwmon); | ||
32 | } | ||
diff --git a/arch/arm/plat-samsung/dev-i2c0.c b/arch/arm/plat-samsung/dev-i2c0.c deleted file mode 100644 index f8251f5098b..00000000000 --- a/arch/arm/plat-samsung/dev-i2c0.c +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c/dev-i2c0.c | ||
2 | * | ||
3 | * Copyright 2008-2009 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * S3C series device definition for i2c device 0 | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/gfp.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/string.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | |||
19 | #include <mach/irqs.h> | ||
20 | #include <mach/map.h> | ||
21 | |||
22 | #include <plat/regs-iic.h> | ||
23 | #include <plat/iic.h> | ||
24 | #include <plat/devs.h> | ||
25 | #include <plat/cpu.h> | ||
26 | |||
27 | static struct resource s3c_i2c_resource[] = { | ||
28 | [0] = { | ||
29 | .start = S3C_PA_IIC, | ||
30 | .end = S3C_PA_IIC + SZ_4K - 1, | ||
31 | .flags = IORESOURCE_MEM, | ||
32 | }, | ||
33 | [1] = { | ||
34 | .start = IRQ_IIC, | ||
35 | .end = IRQ_IIC, | ||
36 | .flags = IORESOURCE_IRQ, | ||
37 | }, | ||
38 | }; | ||
39 | |||
40 | struct platform_device s3c_device_i2c0 = { | ||
41 | .name = "s3c2410-i2c", | ||
42 | #ifdef CONFIG_S3C_DEV_I2C1 | ||
43 | .id = 0, | ||
44 | #else | ||
45 | .id = -1, | ||
46 | #endif | ||
47 | .num_resources = ARRAY_SIZE(s3c_i2c_resource), | ||
48 | .resource = s3c_i2c_resource, | ||
49 | }; | ||
50 | |||
51 | struct s3c2410_platform_i2c default_i2c_data __initdata = { | ||
52 | .flags = 0, | ||
53 | .slave_addr = 0x10, | ||
54 | .frequency = 100*1000, | ||
55 | .sda_delay = 100, | ||
56 | }; | ||
57 | |||
58 | void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd) | ||
59 | { | ||
60 | struct s3c2410_platform_i2c *npd; | ||
61 | |||
62 | if (!pd) | ||
63 | pd = &default_i2c_data; | ||
64 | |||
65 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
66 | &s3c_device_i2c0); | ||
67 | |||
68 | if (!npd->cfg_gpio) | ||
69 | npd->cfg_gpio = s3c_i2c0_cfg_gpio; | ||
70 | } | ||
diff --git a/arch/arm/plat-samsung/dev-i2c1.c b/arch/arm/plat-samsung/dev-i2c1.c deleted file mode 100644 index 3b7c7bec1cf..00000000000 --- a/arch/arm/plat-samsung/dev-i2c1.c +++ /dev/null | |||
@@ -1,61 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c/dev-i2c1.c | ||
2 | * | ||
3 | * Copyright 2008-2009 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * S3C series device definition for i2c device 1 | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/gfp.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/string.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | |||
19 | #include <mach/irqs.h> | ||
20 | #include <mach/map.h> | ||
21 | |||
22 | #include <plat/regs-iic.h> | ||
23 | #include <plat/iic.h> | ||
24 | #include <plat/devs.h> | ||
25 | #include <plat/cpu.h> | ||
26 | |||
27 | static struct resource s3c_i2c_resource[] = { | ||
28 | [0] = { | ||
29 | .start = S3C_PA_IIC1, | ||
30 | .end = S3C_PA_IIC1 + SZ_4K - 1, | ||
31 | .flags = IORESOURCE_MEM, | ||
32 | }, | ||
33 | [1] = { | ||
34 | .start = IRQ_IIC1, | ||
35 | .end = IRQ_IIC1, | ||
36 | .flags = IORESOURCE_IRQ, | ||
37 | }, | ||
38 | }; | ||
39 | |||
40 | struct platform_device s3c_device_i2c1 = { | ||
41 | .name = "s3c2410-i2c", | ||
42 | .id = 1, | ||
43 | .num_resources = ARRAY_SIZE(s3c_i2c_resource), | ||
44 | .resource = s3c_i2c_resource, | ||
45 | }; | ||
46 | |||
47 | void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd) | ||
48 | { | ||
49 | struct s3c2410_platform_i2c *npd; | ||
50 | |||
51 | if (!pd) { | ||
52 | pd = &default_i2c_data; | ||
53 | pd->bus_num = 1; | ||
54 | } | ||
55 | |||
56 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
57 | &s3c_device_i2c1); | ||
58 | |||
59 | if (!npd->cfg_gpio) | ||
60 | npd->cfg_gpio = s3c_i2c1_cfg_gpio; | ||
61 | } | ||
diff --git a/arch/arm/plat-samsung/dev-i2c2.c b/arch/arm/plat-samsung/dev-i2c2.c deleted file mode 100644 index 07e9fd0b1b8..00000000000 --- a/arch/arm/plat-samsung/dev-i2c2.c +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c/dev-i2c2.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S3C series device definition for i2c device 2 | ||
7 | * | ||
8 | * Based on plat-samsung/dev-i2c0.c | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/gfp.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/string.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | |||
20 | #include <mach/irqs.h> | ||
21 | #include <mach/map.h> | ||
22 | |||
23 | #include <plat/regs-iic.h> | ||
24 | #include <plat/iic.h> | ||
25 | #include <plat/devs.h> | ||
26 | #include <plat/cpu.h> | ||
27 | |||
28 | static struct resource s3c_i2c_resource[] = { | ||
29 | [0] = { | ||
30 | .start = S3C_PA_IIC2, | ||
31 | .end = S3C_PA_IIC2 + SZ_4K - 1, | ||
32 | .flags = IORESOURCE_MEM, | ||
33 | }, | ||
34 | [1] = { | ||
35 | .start = IRQ_IIC2, | ||
36 | .end = IRQ_IIC2, | ||
37 | .flags = IORESOURCE_IRQ, | ||
38 | }, | ||
39 | }; | ||
40 | |||
41 | struct platform_device s3c_device_i2c2 = { | ||
42 | .name = "s3c2410-i2c", | ||
43 | .id = 2, | ||
44 | .num_resources = ARRAY_SIZE(s3c_i2c_resource), | ||
45 | .resource = s3c_i2c_resource, | ||
46 | }; | ||
47 | |||
48 | void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd) | ||
49 | { | ||
50 | struct s3c2410_platform_i2c *npd; | ||
51 | |||
52 | if (!pd) { | ||
53 | pd = &default_i2c_data; | ||
54 | pd->bus_num = 2; | ||
55 | } | ||
56 | |||
57 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
58 | &s3c_device_i2c2); | ||
59 | |||
60 | if (!npd->cfg_gpio) | ||
61 | npd->cfg_gpio = s3c_i2c2_cfg_gpio; | ||
62 | } | ||
diff --git a/arch/arm/plat-samsung/dev-i2c3.c b/arch/arm/plat-samsung/dev-i2c3.c deleted file mode 100644 index d48efa93c6e..00000000000 --- a/arch/arm/plat-samsung/dev-i2c3.c +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-i2c3.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P series device definition for i2c device 3 | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/gfp.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | |||
18 | #include <mach/irqs.h> | ||
19 | #include <mach/map.h> | ||
20 | |||
21 | #include <plat/regs-iic.h> | ||
22 | #include <plat/iic.h> | ||
23 | #include <plat/devs.h> | ||
24 | #include <plat/cpu.h> | ||
25 | |||
26 | static struct resource s3c_i2c_resource[] = { | ||
27 | [0] = { | ||
28 | .start = S3C_PA_IIC3, | ||
29 | .end = S3C_PA_IIC3 + SZ_4K - 1, | ||
30 | .flags = IORESOURCE_MEM, | ||
31 | }, | ||
32 | [1] = { | ||
33 | .start = IRQ_IIC3, | ||
34 | .end = IRQ_IIC3, | ||
35 | .flags = IORESOURCE_IRQ, | ||
36 | }, | ||
37 | }; | ||
38 | |||
39 | struct platform_device s3c_device_i2c3 = { | ||
40 | .name = "s3c2440-i2c", | ||
41 | .id = 3, | ||
42 | .num_resources = ARRAY_SIZE(s3c_i2c_resource), | ||
43 | .resource = s3c_i2c_resource, | ||
44 | }; | ||
45 | |||
46 | void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd) | ||
47 | { | ||
48 | struct s3c2410_platform_i2c *npd; | ||
49 | |||
50 | if (!pd) { | ||
51 | pd = &default_i2c_data; | ||
52 | pd->bus_num = 3; | ||
53 | } | ||
54 | |||
55 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
56 | &s3c_device_i2c3); | ||
57 | |||
58 | if (!npd->cfg_gpio) | ||
59 | npd->cfg_gpio = s3c_i2c3_cfg_gpio; | ||
60 | } | ||
diff --git a/arch/arm/plat-samsung/dev-i2c4.c b/arch/arm/plat-samsung/dev-i2c4.c deleted file mode 100644 index 07e26444efe..00000000000 --- a/arch/arm/plat-samsung/dev-i2c4.c +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-i2c4.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P series device definition for i2c device 3 | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/gfp.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | |||
18 | #include <mach/irqs.h> | ||
19 | #include <mach/map.h> | ||
20 | |||
21 | #include <plat/regs-iic.h> | ||
22 | #include <plat/iic.h> | ||
23 | #include <plat/devs.h> | ||
24 | #include <plat/cpu.h> | ||
25 | |||
26 | static struct resource s3c_i2c_resource[] = { | ||
27 | [0] = { | ||
28 | .start = S3C_PA_IIC4, | ||
29 | .end = S3C_PA_IIC4 + SZ_4K - 1, | ||
30 | .flags = IORESOURCE_MEM, | ||
31 | }, | ||
32 | [1] = { | ||
33 | .start = IRQ_IIC4, | ||
34 | .end = IRQ_IIC4, | ||
35 | .flags = IORESOURCE_IRQ, | ||
36 | }, | ||
37 | }; | ||
38 | |||
39 | struct platform_device s3c_device_i2c4 = { | ||
40 | .name = "s3c2440-i2c", | ||
41 | .id = 4, | ||
42 | .num_resources = ARRAY_SIZE(s3c_i2c_resource), | ||
43 | .resource = s3c_i2c_resource, | ||
44 | }; | ||
45 | |||
46 | void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd) | ||
47 | { | ||
48 | struct s3c2410_platform_i2c *npd; | ||
49 | |||
50 | if (!pd) { | ||
51 | pd = &default_i2c_data; | ||
52 | pd->bus_num = 4; | ||
53 | } | ||
54 | |||
55 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
56 | &s3c_device_i2c4); | ||
57 | |||
58 | if (!npd->cfg_gpio) | ||
59 | npd->cfg_gpio = s3c_i2c4_cfg_gpio; | ||
60 | } | ||
diff --git a/arch/arm/plat-samsung/dev-i2c5.c b/arch/arm/plat-samsung/dev-i2c5.c deleted file mode 100644 index f4965578456..00000000000 --- a/arch/arm/plat-samsung/dev-i2c5.c +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-i2c3.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P series device definition for i2c device 3 | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/gfp.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | |||
18 | #include <mach/irqs.h> | ||
19 | #include <mach/map.h> | ||
20 | |||
21 | #include <plat/regs-iic.h> | ||
22 | #include <plat/iic.h> | ||
23 | #include <plat/devs.h> | ||
24 | #include <plat/cpu.h> | ||
25 | |||
26 | static struct resource s3c_i2c_resource[] = { | ||
27 | [0] = { | ||
28 | .start = S3C_PA_IIC5, | ||
29 | .end = S3C_PA_IIC5 + SZ_4K - 1, | ||
30 | .flags = IORESOURCE_MEM, | ||
31 | }, | ||
32 | [1] = { | ||
33 | .start = IRQ_IIC5, | ||
34 | .end = IRQ_IIC5, | ||
35 | .flags = IORESOURCE_IRQ, | ||
36 | }, | ||
37 | }; | ||
38 | |||
39 | struct platform_device s3c_device_i2c5 = { | ||
40 | .name = "s3c2440-i2c", | ||
41 | .id = 5, | ||
42 | .num_resources = ARRAY_SIZE(s3c_i2c_resource), | ||
43 | .resource = s3c_i2c_resource, | ||
44 | }; | ||
45 | |||
46 | void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd) | ||
47 | { | ||
48 | struct s3c2410_platform_i2c *npd; | ||
49 | |||
50 | if (!pd) { | ||
51 | pd = &default_i2c_data; | ||
52 | pd->bus_num = 5; | ||
53 | } | ||
54 | |||
55 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
56 | &s3c_device_i2c5); | ||
57 | |||
58 | if (!npd->cfg_gpio) | ||
59 | npd->cfg_gpio = s3c_i2c5_cfg_gpio; | ||
60 | } | ||
diff --git a/arch/arm/plat-samsung/dev-i2c6.c b/arch/arm/plat-samsung/dev-i2c6.c deleted file mode 100644 index 141d799944e..00000000000 --- a/arch/arm/plat-samsung/dev-i2c6.c +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-i2c6.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P series device definition for i2c device 6 | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/gfp.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | |||
18 | #include <mach/irqs.h> | ||
19 | #include <mach/map.h> | ||
20 | |||
21 | #include <plat/regs-iic.h> | ||
22 | #include <plat/iic.h> | ||
23 | #include <plat/devs.h> | ||
24 | #include <plat/cpu.h> | ||
25 | |||
26 | static struct resource s3c_i2c_resource[] = { | ||
27 | [0] = { | ||
28 | .start = S3C_PA_IIC6, | ||
29 | .end = S3C_PA_IIC6 + SZ_4K - 1, | ||
30 | .flags = IORESOURCE_MEM, | ||
31 | }, | ||
32 | [1] = { | ||
33 | .start = IRQ_IIC6, | ||
34 | .end = IRQ_IIC6, | ||
35 | .flags = IORESOURCE_IRQ, | ||
36 | }, | ||
37 | }; | ||
38 | |||
39 | struct platform_device s3c_device_i2c6 = { | ||
40 | .name = "s3c2440-i2c", | ||
41 | .id = 6, | ||
42 | .num_resources = ARRAY_SIZE(s3c_i2c_resource), | ||
43 | .resource = s3c_i2c_resource, | ||
44 | }; | ||
45 | |||
46 | void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd) | ||
47 | { | ||
48 | struct s3c2410_platform_i2c *npd; | ||
49 | |||
50 | if (!pd) { | ||
51 | pd = &default_i2c_data; | ||
52 | pd->bus_num = 6; | ||
53 | } | ||
54 | |||
55 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
56 | &s3c_device_i2c6); | ||
57 | |||
58 | if (!npd->cfg_gpio) | ||
59 | npd->cfg_gpio = s3c_i2c6_cfg_gpio; | ||
60 | } | ||
diff --git a/arch/arm/plat-samsung/dev-i2c7.c b/arch/arm/plat-samsung/dev-i2c7.c deleted file mode 100644 index 9dddcd1665b..00000000000 --- a/arch/arm/plat-samsung/dev-i2c7.c +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-i2c7.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P series device definition for i2c device 7 | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/gfp.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | |||
18 | #include <mach/irqs.h> | ||
19 | #include <mach/map.h> | ||
20 | |||
21 | #include <plat/regs-iic.h> | ||
22 | #include <plat/iic.h> | ||
23 | #include <plat/devs.h> | ||
24 | #include <plat/cpu.h> | ||
25 | |||
26 | static struct resource s3c_i2c_resource[] = { | ||
27 | [0] = { | ||
28 | .start = S3C_PA_IIC7, | ||
29 | .end = S3C_PA_IIC7 + SZ_4K - 1, | ||
30 | .flags = IORESOURCE_MEM, | ||
31 | }, | ||
32 | [1] = { | ||
33 | .start = IRQ_IIC7, | ||
34 | .end = IRQ_IIC7, | ||
35 | .flags = IORESOURCE_IRQ, | ||
36 | }, | ||
37 | }; | ||
38 | |||
39 | struct platform_device s3c_device_i2c7 = { | ||
40 | .name = "s3c2440-i2c", | ||
41 | .id = 7, | ||
42 | .num_resources = ARRAY_SIZE(s3c_i2c_resource), | ||
43 | .resource = s3c_i2c_resource, | ||
44 | }; | ||
45 | |||
46 | void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd) | ||
47 | { | ||
48 | struct s3c2410_platform_i2c *npd; | ||
49 | |||
50 | if (!pd) { | ||
51 | pd = &default_i2c_data; | ||
52 | pd->bus_num = 7; | ||
53 | } | ||
54 | |||
55 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
56 | &s3c_device_i2c7); | ||
57 | |||
58 | if (!npd->cfg_gpio) | ||
59 | npd->cfg_gpio = s3c_i2c7_cfg_gpio; | ||
60 | } | ||
diff --git a/arch/arm/plat-samsung/dev-ide.c b/arch/arm/plat-samsung/dev-ide.c deleted file mode 100644 index b497982795a..00000000000 --- a/arch/arm/plat-samsung/dev-ide.c +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-ide.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Samsung CF-ATA device definition. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/interrupt.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | |||
17 | #include <mach/map.h> | ||
18 | #include <plat/ata.h> | ||
19 | #include <plat/devs.h> | ||
20 | |||
21 | static struct resource s3c_cfcon_resource[] = { | ||
22 | [0] = { | ||
23 | .start = SAMSUNG_PA_CFCON, | ||
24 | .end = SAMSUNG_PA_CFCON + SZ_16K - 1, | ||
25 | .flags = IORESOURCE_MEM, | ||
26 | }, | ||
27 | [1] = { | ||
28 | .start = IRQ_CFCON, | ||
29 | .end = IRQ_CFCON, | ||
30 | .flags = IORESOURCE_IRQ, | ||
31 | }, | ||
32 | }; | ||
33 | |||
34 | struct platform_device s3c_device_cfcon = { | ||
35 | .id = 0, | ||
36 | .num_resources = ARRAY_SIZE(s3c_cfcon_resource), | ||
37 | .resource = s3c_cfcon_resource, | ||
38 | }; | ||
39 | |||
40 | void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata) | ||
41 | { | ||
42 | s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata), | ||
43 | &s3c_device_cfcon); | ||
44 | } | ||
diff --git a/arch/arm/plat-samsung/dev-keypad.c b/arch/arm/plat-samsung/dev-keypad.c deleted file mode 100644 index 677c2d731b6..00000000000 --- a/arch/arm/plat-samsung/dev-keypad.c +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/plat-samsung/dev-keypad.c | ||
3 | * | ||
4 | * Copyright (C) 2010 Samsung Electronics Co.Ltd | ||
5 | * Author: Joonyoung Shim <jy0922.shim@samsung.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/platform_device.h> | ||
15 | #include <mach/irqs.h> | ||
16 | #include <mach/map.h> | ||
17 | #include <plat/cpu.h> | ||
18 | #include <plat/devs.h> | ||
19 | #include <plat/keypad.h> | ||
20 | |||
21 | static struct resource samsung_keypad_resources[] = { | ||
22 | [0] = { | ||
23 | .start = SAMSUNG_PA_KEYPAD, | ||
24 | .end = SAMSUNG_PA_KEYPAD + 0x20 - 1, | ||
25 | .flags = IORESOURCE_MEM, | ||
26 | }, | ||
27 | [1] = { | ||
28 | .start = IRQ_KEYPAD, | ||
29 | .end = IRQ_KEYPAD, | ||
30 | .flags = IORESOURCE_IRQ, | ||
31 | }, | ||
32 | }; | ||
33 | |||
34 | struct platform_device samsung_device_keypad = { | ||
35 | .name = "samsung-keypad", | ||
36 | .id = -1, | ||
37 | .num_resources = ARRAY_SIZE(samsung_keypad_resources), | ||
38 | .resource = samsung_keypad_resources, | ||
39 | }; | ||
40 | |||
41 | void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd) | ||
42 | { | ||
43 | struct samsung_keypad_platdata *npd; | ||
44 | |||
45 | npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata), | ||
46 | &samsung_device_keypad); | ||
47 | |||
48 | if (!npd->cfg_gpio) | ||
49 | npd->cfg_gpio = samsung_keypad_cfg_gpio; | ||
50 | } | ||
diff --git a/arch/arm/plat-samsung/dev-nand.c b/arch/arm/plat-samsung/dev-nand.c deleted file mode 100644 index b8e30ec6ac2..00000000000 --- a/arch/arm/plat-samsung/dev-nand.c +++ /dev/null | |||
@@ -1,125 +0,0 @@ | |||
1 | /* | ||
2 | * S3C series device definition for nand device | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #include <linux/gfp.h> | ||
10 | #include <linux/kernel.h> | ||
11 | #include <linux/platform_device.h> | ||
12 | |||
13 | #include <linux/mtd/mtd.h> | ||
14 | #include <linux/mtd/partitions.h> | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | #include <plat/devs.h> | ||
18 | #include <plat/nand.h> | ||
19 | |||
20 | static struct resource s3c_nand_resource[] = { | ||
21 | [0] = { | ||
22 | .start = S3C_PA_NAND, | ||
23 | .end = S3C_PA_NAND + SZ_1M, | ||
24 | .flags = IORESOURCE_MEM, | ||
25 | } | ||
26 | }; | ||
27 | |||
28 | struct platform_device s3c_device_nand = { | ||
29 | .name = "s3c2410-nand", | ||
30 | .id = -1, | ||
31 | .num_resources = ARRAY_SIZE(s3c_nand_resource), | ||
32 | .resource = s3c_nand_resource, | ||
33 | }; | ||
34 | |||
35 | EXPORT_SYMBOL(s3c_device_nand); | ||
36 | |||
37 | /** | ||
38 | * s3c_nand_copy_set() - copy nand set data | ||
39 | * @set: The new structure, directly copied from the old. | ||
40 | * | ||
41 | * Copy all the fields from the NAND set field from what is probably __initdata | ||
42 | * to new kernel memory. The code returns 0 if the copy happened correctly or | ||
43 | * an error code for the calling function to display. | ||
44 | * | ||
45 | * Note, we currently do not try and look to see if we've already copied the | ||
46 | * data in a previous set. | ||
47 | */ | ||
48 | static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set) | ||
49 | { | ||
50 | void *ptr; | ||
51 | int size; | ||
52 | |||
53 | size = sizeof(struct mtd_partition) * set->nr_partitions; | ||
54 | if (size) { | ||
55 | ptr = kmemdup(set->partitions, size, GFP_KERNEL); | ||
56 | set->partitions = ptr; | ||
57 | |||
58 | if (!ptr) | ||
59 | return -ENOMEM; | ||
60 | } | ||
61 | |||
62 | if (set->nr_map && set->nr_chips) { | ||
63 | size = sizeof(int) * set->nr_chips; | ||
64 | ptr = kmemdup(set->nr_map, size, GFP_KERNEL); | ||
65 | set->nr_map = ptr; | ||
66 | |||
67 | if (!ptr) | ||
68 | return -ENOMEM; | ||
69 | } | ||
70 | |||
71 | if (set->ecc_layout) { | ||
72 | ptr = kmemdup(set->ecc_layout, | ||
73 | sizeof(struct nand_ecclayout), GFP_KERNEL); | ||
74 | set->ecc_layout = ptr; | ||
75 | |||
76 | if (!ptr) | ||
77 | return -ENOMEM; | ||
78 | } | ||
79 | |||
80 | return 0; | ||
81 | } | ||
82 | |||
83 | void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) | ||
84 | { | ||
85 | struct s3c2410_platform_nand *npd; | ||
86 | int size; | ||
87 | int ret; | ||
88 | |||
89 | /* note, if we get a failure in allocation, we simply drop out of the | ||
90 | * function. If there is so little memory available at initialisation | ||
91 | * time then there is little chance the system is going to run. | ||
92 | */ | ||
93 | |||
94 | npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand), | ||
95 | &s3c_device_nand); | ||
96 | if (!npd) | ||
97 | return; | ||
98 | |||
99 | /* now see if we need to copy any of the nand set data */ | ||
100 | |||
101 | size = sizeof(struct s3c2410_nand_set) * npd->nr_sets; | ||
102 | if (size) { | ||
103 | struct s3c2410_nand_set *from = npd->sets; | ||
104 | struct s3c2410_nand_set *to; | ||
105 | int i; | ||
106 | |||
107 | to = kmemdup(from, size, GFP_KERNEL); | ||
108 | npd->sets = to; /* set, even if we failed */ | ||
109 | |||
110 | if (!to) { | ||
111 | printk(KERN_ERR "%s: no memory for sets\n", __func__); | ||
112 | return; | ||
113 | } | ||
114 | |||
115 | for (i = 0; i < npd->nr_sets; i++) { | ||
116 | ret = s3c_nand_copy_set(to); | ||
117 | if (ret) { | ||
118 | printk(KERN_ERR "%s: failed to copy set %d\n", | ||
119 | __func__, i); | ||
120 | return; | ||
121 | } | ||
122 | to++; | ||
123 | } | ||
124 | } | ||
125 | } | ||
diff --git a/arch/arm/plat-samsung/dev-onenand.c b/arch/arm/plat-samsung/dev-onenand.c deleted file mode 100644 index f54ae71f0cd..00000000000 --- a/arch/arm/plat-samsung/dev-onenand.c +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/plat-samsung/dev-onenand.c | ||
3 | * | ||
4 | * Copyright (c) 2008-2010 Samsung Electronics | ||
5 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
6 | * | ||
7 | * S3C64XX/S5PC100 series device definition for OneNAND devices | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | |||
17 | #include <mach/irqs.h> | ||
18 | #include <mach/map.h> | ||
19 | |||
20 | static struct resource s3c_onenand_resources[] = { | ||
21 | [0] = { | ||
22 | .start = S3C_PA_ONENAND, | ||
23 | .end = S3C_PA_ONENAND + 0x400 - 1, | ||
24 | .flags = IORESOURCE_MEM, | ||
25 | }, | ||
26 | [1] = { | ||
27 | .start = S3C_PA_ONENAND_BUF, | ||
28 | .end = S3C_PA_ONENAND_BUF + S3C_SZ_ONENAND_BUF - 1, | ||
29 | .flags = IORESOURCE_MEM, | ||
30 | }, | ||
31 | [2] = { | ||
32 | .start = IRQ_ONENAND, | ||
33 | .end = IRQ_ONENAND, | ||
34 | .flags = IORESOURCE_IRQ, | ||
35 | }, | ||
36 | }; | ||
37 | |||
38 | struct platform_device s3c_device_onenand = { | ||
39 | .name = "samsung-onenand", | ||
40 | .id = 0, | ||
41 | .num_resources = ARRAY_SIZE(s3c_onenand_resources), | ||
42 | .resource = s3c_onenand_resources, | ||
43 | }; | ||
diff --git a/arch/arm/plat-samsung/dev-pwm.c b/arch/arm/plat-samsung/dev-pwm.c deleted file mode 100644 index dab47b0e190..00000000000 --- a/arch/arm/plat-samsung/dev-pwm.c +++ /dev/null | |||
@@ -1,53 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-pwm.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright (c) 2007 Ben Dooks | ||
7 | * Copyright (c) 2008 Simtec Electronics | ||
8 | * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org> | ||
9 | * | ||
10 | * S3C series device definition for the PWM timer | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License version 2 as | ||
14 | * published by the Free Software Foundation. | ||
15 | */ | ||
16 | |||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | |||
20 | #include <mach/irqs.h> | ||
21 | |||
22 | #include <plat/devs.h> | ||
23 | |||
24 | #define TIMER_RESOURCE_SIZE (1) | ||
25 | |||
26 | #define TIMER_RESOURCE(_tmr, _irq) \ | ||
27 | (struct resource [TIMER_RESOURCE_SIZE]) { \ | ||
28 | [0] = { \ | ||
29 | .start = _irq, \ | ||
30 | .end = _irq, \ | ||
31 | .flags = IORESOURCE_IRQ \ | ||
32 | } \ | ||
33 | } | ||
34 | |||
35 | #define DEFINE_S3C_TIMER(_tmr_no, _irq) \ | ||
36 | .name = "s3c24xx-pwm", \ | ||
37 | .id = _tmr_no, \ | ||
38 | .num_resources = TIMER_RESOURCE_SIZE, \ | ||
39 | .resource = TIMER_RESOURCE(_tmr_no, _irq), \ | ||
40 | |||
41 | /* | ||
42 | * since we already have an static mapping for the timer, | ||
43 | * we do not bother setting any IO resource for the base. | ||
44 | */ | ||
45 | |||
46 | struct platform_device s3c_device_timer[] = { | ||
47 | [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) }, | ||
48 | [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) }, | ||
49 | [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) }, | ||
50 | [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) }, | ||
51 | [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) }, | ||
52 | }; | ||
53 | EXPORT_SYMBOL(s3c_device_timer); | ||
diff --git a/arch/arm/plat-samsung/dev-rtc.c b/arch/arm/plat-samsung/dev-rtc.c deleted file mode 100644 index bf4e2267333..00000000000 --- a/arch/arm/plat-samsung/dev-rtc.c +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-rtc.c | ||
2 | * | ||
3 | * Copyright 2009 by Maurus Cuelenaere <mcuelenaere@gmail.com> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | */ | ||
9 | |||
10 | #include <linux/kernel.h> | ||
11 | #include <linux/string.h> | ||
12 | #include <linux/platform_device.h> | ||
13 | |||
14 | #include <mach/irqs.h> | ||
15 | #include <mach/map.h> | ||
16 | |||
17 | #include <plat/devs.h> | ||
18 | |||
19 | static struct resource s3c_rtc_resource[] = { | ||
20 | [0] = { | ||
21 | .start = S3C_PA_RTC, | ||
22 | .end = S3C_PA_RTC + 0xff, | ||
23 | .flags = IORESOURCE_MEM, | ||
24 | }, | ||
25 | [1] = { | ||
26 | .start = IRQ_RTC_ALARM, | ||
27 | .end = IRQ_RTC_ALARM, | ||
28 | .flags = IORESOURCE_IRQ, | ||
29 | }, | ||
30 | [2] = { | ||
31 | .start = IRQ_RTC_TIC, | ||
32 | .end = IRQ_RTC_TIC, | ||
33 | .flags = IORESOURCE_IRQ | ||
34 | } | ||
35 | }; | ||
36 | |||
37 | struct platform_device s3c_device_rtc = { | ||
38 | .name = "s3c64xx-rtc", | ||
39 | .id = -1, | ||
40 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | ||
41 | .resource = s3c_rtc_resource, | ||
42 | }; | ||
43 | EXPORT_SYMBOL(s3c_device_rtc); | ||
diff --git a/arch/arm/plat-samsung/dev-ts.c b/arch/arm/plat-samsung/dev-ts.c deleted file mode 100644 index 5f3d46a9bd8..00000000000 --- a/arch/arm/plat-samsung/dev-ts.c +++ /dev/null | |||
@@ -1,59 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/dev-ts.c | ||
2 | * | ||
3 | * Copyright (c) 2008 Simtec Electronics | ||
4 | * http://armlinux.simtec.co.uk/ | ||
5 | * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org> | ||
6 | * | ||
7 | * Adapted by Maurus Cuelenaere for s3c64xx | ||
8 | * | ||
9 | * S3C64XX series device definition for touchscreen device | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License version 2 as | ||
13 | * published by the Free Software Foundation. | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/string.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | |||
20 | #include <mach/irqs.h> | ||
21 | #include <mach/map.h> | ||
22 | |||
23 | #include <plat/devs.h> | ||
24 | #include <plat/ts.h> | ||
25 | |||
26 | static struct resource s3c_ts_resource[] = { | ||
27 | [0] = { | ||
28 | .start = SAMSUNG_PA_ADC, | ||
29 | .end = SAMSUNG_PA_ADC + SZ_256 - 1, | ||
30 | .flags = IORESOURCE_MEM, | ||
31 | }, | ||
32 | [1] = { | ||
33 | .start = IRQ_TC, | ||
34 | .end = IRQ_TC, | ||
35 | .flags = IORESOURCE_IRQ, | ||
36 | }, | ||
37 | }; | ||
38 | |||
39 | struct platform_device s3c_device_ts = { | ||
40 | .name = "s3c64xx-ts", | ||
41 | .id = -1, | ||
42 | .num_resources = ARRAY_SIZE(s3c_ts_resource), | ||
43 | .resource = s3c_ts_resource, | ||
44 | }; | ||
45 | |||
46 | static struct s3c2410_ts_mach_info default_ts_data __initdata = { | ||
47 | .delay = 10000, | ||
48 | .presc = 49, | ||
49 | .oversampling_shift = 2, | ||
50 | }; | ||
51 | |||
52 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) | ||
53 | { | ||
54 | if (!pd) | ||
55 | pd = &default_ts_data; | ||
56 | |||
57 | s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info), | ||
58 | &s3c_device_ts); | ||
59 | } | ||
diff --git a/arch/arm/plat-samsung/dev-usb-hsotg.c b/arch/arm/plat-samsung/dev-usb-hsotg.c deleted file mode 100644 index 33a844ab691..00000000000 --- a/arch/arm/plat-samsung/dev-usb-hsotg.c +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c/dev-usb-hsotg.c | ||
2 | * | ||
3 | * Copyright 2008 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * S3C series device definition for USB high-speed UDC/OtG block | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/dma-mapping.h> | ||
18 | |||
19 | #include <mach/irqs.h> | ||
20 | #include <mach/map.h> | ||
21 | |||
22 | #include <plat/devs.h> | ||
23 | |||
24 | static struct resource s3c_usb_hsotg_resources[] = { | ||
25 | [0] = { | ||
26 | .start = S3C_PA_USB_HSOTG, | ||
27 | .end = S3C_PA_USB_HSOTG + 0x10000 - 1, | ||
28 | .flags = IORESOURCE_MEM, | ||
29 | }, | ||
30 | [1] = { | ||
31 | .start = IRQ_OTG, | ||
32 | .end = IRQ_OTG, | ||
33 | .flags = IORESOURCE_IRQ, | ||
34 | }, | ||
35 | }; | ||
36 | |||
37 | static u64 s3c_hsotg_dmamask = DMA_BIT_MASK(32); | ||
38 | |||
39 | struct platform_device s3c_device_usb_hsotg = { | ||
40 | .name = "s3c-hsotg", | ||
41 | .id = -1, | ||
42 | .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources), | ||
43 | .resource = s3c_usb_hsotg_resources, | ||
44 | .dev = { | ||
45 | .dma_mask = &s3c_hsotg_dmamask, | ||
46 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
47 | }, | ||
48 | }; | ||
diff --git a/arch/arm/plat-samsung/dev-usb.c b/arch/arm/plat-samsung/dev-usb.c deleted file mode 100644 index 33fbaa96770..00000000000 --- a/arch/arm/plat-samsung/dev-usb.c +++ /dev/null | |||
@@ -1,65 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c/dev-usb.c | ||
2 | * | ||
3 | * Copyright 2008 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * S3C series device definition for USB host | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/gfp.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/string.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | |||
19 | #include <mach/irqs.h> | ||
20 | #include <mach/map.h> | ||
21 | |||
22 | #include <plat/devs.h> | ||
23 | #include <plat/usb-control.h> | ||
24 | |||
25 | static struct resource s3c_usb_resource[] = { | ||
26 | [0] = { | ||
27 | .start = S3C_PA_USBHOST, | ||
28 | .end = S3C_PA_USBHOST + 0x100 - 1, | ||
29 | .flags = IORESOURCE_MEM, | ||
30 | }, | ||
31 | [1] = { | ||
32 | .start = IRQ_USBH, | ||
33 | .end = IRQ_USBH, | ||
34 | .flags = IORESOURCE_IRQ, | ||
35 | } | ||
36 | }; | ||
37 | |||
38 | static u64 s3c_device_usb_dmamask = 0xffffffffUL; | ||
39 | |||
40 | struct platform_device s3c_device_ohci = { | ||
41 | .name = "s3c2410-ohci", | ||
42 | .id = -1, | ||
43 | .num_resources = ARRAY_SIZE(s3c_usb_resource), | ||
44 | .resource = s3c_usb_resource, | ||
45 | .dev = { | ||
46 | .dma_mask = &s3c_device_usb_dmamask, | ||
47 | .coherent_dma_mask = 0xffffffffUL | ||
48 | } | ||
49 | }; | ||
50 | |||
51 | EXPORT_SYMBOL(s3c_device_ohci); | ||
52 | |||
53 | /** | ||
54 | * s3c_ohci_set_platdata - initialise OHCI device platform data | ||
55 | * @info: The platform data. | ||
56 | * | ||
57 | * This call copies the @info passed in and sets the device .platform_data | ||
58 | * field to that copy. The @info is copied so that the original can be marked | ||
59 | * __initdata. | ||
60 | */ | ||
61 | void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info) | ||
62 | { | ||
63 | s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info), | ||
64 | &s3c_device_ohci); | ||
65 | } | ||
diff --git a/arch/arm/plat-samsung/dev-wdt.c b/arch/arm/plat-samsung/dev-wdt.c deleted file mode 100644 index 019b5b8cf14..00000000000 --- a/arch/arm/plat-samsung/dev-wdt.c +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-wdt.c | ||
2 | * | ||
3 | * Copyright (c) 2004 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C series device definition for the watchdog timer | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | |||
16 | #include <mach/irqs.h> | ||
17 | #include <mach/map.h> | ||
18 | |||
19 | #include <plat/devs.h> | ||
20 | |||
21 | static struct resource s3c_wdt_resource[] = { | ||
22 | [0] = { | ||
23 | .start = S3C_PA_WDT, | ||
24 | .end = S3C_PA_WDT + SZ_1K, | ||
25 | .flags = IORESOURCE_MEM, | ||
26 | }, | ||
27 | [1] = { | ||
28 | .start = IRQ_WDT, | ||
29 | .end = IRQ_WDT, | ||
30 | .flags = IORESOURCE_IRQ, | ||
31 | } | ||
32 | }; | ||
33 | |||
34 | struct platform_device s3c_device_wdt = { | ||
35 | .name = "s3c2410-wdt", | ||
36 | .id = -1, | ||
37 | .num_resources = ARRAY_SIZE(s3c_wdt_resource), | ||
38 | .resource = s3c_wdt_resource, | ||
39 | }; | ||
40 | EXPORT_SYMBOL(s3c_device_wdt); | ||
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c new file mode 100644 index 00000000000..4ca8b571f97 --- /dev/null +++ b/arch/arm/plat-samsung/devs.c | |||
@@ -0,0 +1,1463 @@ | |||
1 | /* linux/arch/arm/plat-samsung/devs.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Base SAMSUNG platform device definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/types.h> | ||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/list.h> | ||
17 | #include <linux/timer.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/serial_core.h> | ||
20 | #include <linux/platform_device.h> | ||
21 | #include <linux/io.h> | ||
22 | #include <linux/slab.h> | ||
23 | #include <linux/string.h> | ||
24 | #include <linux/dma-mapping.h> | ||
25 | #include <linux/fb.h> | ||
26 | #include <linux/gfp.h> | ||
27 | #include <linux/mtd/mtd.h> | ||
28 | #include <linux/mtd/onenand.h> | ||
29 | #include <linux/mtd/partitions.h> | ||
30 | #include <linux/mmc/host.h> | ||
31 | #include <linux/ioport.h> | ||
32 | |||
33 | #include <asm/irq.h> | ||
34 | #include <asm/pmu.h> | ||
35 | #include <asm/mach/arch.h> | ||
36 | #include <asm/mach/map.h> | ||
37 | #include <asm/mach/irq.h> | ||
38 | |||
39 | #include <mach/hardware.h> | ||
40 | #include <mach/dma.h> | ||
41 | #include <mach/irqs.h> | ||
42 | #include <mach/map.h> | ||
43 | |||
44 | #include <plat/cpu.h> | ||
45 | #include <plat/devs.h> | ||
46 | #include <plat/adc.h> | ||
47 | #include <plat/ata.h> | ||
48 | #include <plat/ehci.h> | ||
49 | #include <plat/fb.h> | ||
50 | #include <plat/fb-s3c2410.h> | ||
51 | #include <plat/hwmon.h> | ||
52 | #include <plat/iic.h> | ||
53 | #include <plat/keypad.h> | ||
54 | #include <plat/mci.h> | ||
55 | #include <plat/nand.h> | ||
56 | #include <plat/sdhci.h> | ||
57 | #include <plat/ts.h> | ||
58 | #include <plat/udc.h> | ||
59 | #include <plat/usb-control.h> | ||
60 | #include <plat/usb-phy.h> | ||
61 | #include <plat/regs-iic.h> | ||
62 | #include <plat/regs-serial.h> | ||
63 | #include <plat/regs-spi.h> | ||
64 | |||
65 | static u64 samsung_device_dma_mask = DMA_BIT_MASK(32); | ||
66 | |||
67 | /* AC97 */ | ||
68 | #ifdef CONFIG_CPU_S3C2440 | ||
69 | static struct resource s3c_ac97_resource[] = { | ||
70 | [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97), | ||
71 | [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97), | ||
72 | [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"), | ||
73 | [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"), | ||
74 | [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"), | ||
75 | }; | ||
76 | |||
77 | struct platform_device s3c_device_ac97 = { | ||
78 | .name = "samsung-ac97", | ||
79 | .id = -1, | ||
80 | .num_resources = ARRAY_SIZE(s3c_ac97_resource), | ||
81 | .resource = s3c_ac97_resource, | ||
82 | .dev = { | ||
83 | .dma_mask = &samsung_device_dma_mask, | ||
84 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
85 | } | ||
86 | }; | ||
87 | #endif /* CONFIG_CPU_S3C2440 */ | ||
88 | |||
89 | /* ADC */ | ||
90 | |||
91 | #ifdef CONFIG_PLAT_S3C24XX | ||
92 | static struct resource s3c_adc_resource[] = { | ||
93 | [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), | ||
94 | [1] = DEFINE_RES_IRQ(IRQ_TC), | ||
95 | [2] = DEFINE_RES_IRQ(IRQ_ADC), | ||
96 | }; | ||
97 | |||
98 | struct platform_device s3c_device_adc = { | ||
99 | .name = "s3c24xx-adc", | ||
100 | .id = -1, | ||
101 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | ||
102 | .resource = s3c_adc_resource, | ||
103 | }; | ||
104 | #endif /* CONFIG_PLAT_S3C24XX */ | ||
105 | |||
106 | #if defined(CONFIG_SAMSUNG_DEV_ADC) | ||
107 | static struct resource s3c_adc_resource[] = { | ||
108 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), | ||
109 | [1] = DEFINE_RES_IRQ(IRQ_TC), | ||
110 | [2] = DEFINE_RES_IRQ(IRQ_ADC), | ||
111 | }; | ||
112 | |||
113 | struct platform_device s3c_device_adc = { | ||
114 | .name = "samsung-adc", | ||
115 | .id = -1, | ||
116 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | ||
117 | .resource = s3c_adc_resource, | ||
118 | }; | ||
119 | #endif /* CONFIG_SAMSUNG_DEV_ADC */ | ||
120 | |||
121 | /* Camif Controller */ | ||
122 | |||
123 | #ifdef CONFIG_CPU_S3C2440 | ||
124 | static struct resource s3c_camif_resource[] = { | ||
125 | [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF), | ||
126 | [1] = DEFINE_RES_IRQ(IRQ_CAM), | ||
127 | }; | ||
128 | |||
129 | struct platform_device s3c_device_camif = { | ||
130 | .name = "s3c2440-camif", | ||
131 | .id = -1, | ||
132 | .num_resources = ARRAY_SIZE(s3c_camif_resource), | ||
133 | .resource = s3c_camif_resource, | ||
134 | .dev = { | ||
135 | .dma_mask = &samsung_device_dma_mask, | ||
136 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
137 | } | ||
138 | }; | ||
139 | #endif /* CONFIG_CPU_S3C2440 */ | ||
140 | |||
141 | /* ASOC DMA */ | ||
142 | |||
143 | struct platform_device samsung_asoc_dma = { | ||
144 | .name = "samsung-audio", | ||
145 | .id = -1, | ||
146 | .dev = { | ||
147 | .dma_mask = &samsung_device_dma_mask, | ||
148 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
149 | } | ||
150 | }; | ||
151 | |||
152 | struct platform_device samsung_asoc_idma = { | ||
153 | .name = "samsung-idma", | ||
154 | .id = -1, | ||
155 | .dev = { | ||
156 | .dma_mask = &samsung_device_dma_mask, | ||
157 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
158 | } | ||
159 | }; | ||
160 | |||
161 | /* FB */ | ||
162 | |||
163 | #ifdef CONFIG_S3C_DEV_FB | ||
164 | static struct resource s3c_fb_resource[] = { | ||
165 | [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K), | ||
166 | [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC), | ||
167 | [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO), | ||
168 | [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM), | ||
169 | }; | ||
170 | |||
171 | struct platform_device s3c_device_fb = { | ||
172 | .name = "s3c-fb", | ||
173 | .id = -1, | ||
174 | .num_resources = ARRAY_SIZE(s3c_fb_resource), | ||
175 | .resource = s3c_fb_resource, | ||
176 | .dev = { | ||
177 | .dma_mask = &samsung_device_dma_mask, | ||
178 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
179 | }, | ||
180 | }; | ||
181 | |||
182 | void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd) | ||
183 | { | ||
184 | s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata), | ||
185 | &s3c_device_fb); | ||
186 | } | ||
187 | #endif /* CONFIG_S3C_DEV_FB */ | ||
188 | |||
189 | /* FIMC */ | ||
190 | |||
191 | #ifdef CONFIG_S5P_DEV_FIMC0 | ||
192 | static struct resource s5p_fimc0_resource[] = { | ||
193 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K), | ||
194 | [1] = DEFINE_RES_IRQ(IRQ_FIMC0), | ||
195 | }; | ||
196 | |||
197 | struct platform_device s5p_device_fimc0 = { | ||
198 | .name = "s5p-fimc", | ||
199 | .id = 0, | ||
200 | .num_resources = ARRAY_SIZE(s5p_fimc0_resource), | ||
201 | .resource = s5p_fimc0_resource, | ||
202 | .dev = { | ||
203 | .dma_mask = &samsung_device_dma_mask, | ||
204 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
205 | }, | ||
206 | }; | ||
207 | |||
208 | struct platform_device s5p_device_fimc_md = { | ||
209 | .name = "s5p-fimc-md", | ||
210 | .id = -1, | ||
211 | }; | ||
212 | #endif /* CONFIG_S5P_DEV_FIMC0 */ | ||
213 | |||
214 | #ifdef CONFIG_S5P_DEV_FIMC1 | ||
215 | static struct resource s5p_fimc1_resource[] = { | ||
216 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K), | ||
217 | [1] = DEFINE_RES_IRQ(IRQ_FIMC1), | ||
218 | }; | ||
219 | |||
220 | struct platform_device s5p_device_fimc1 = { | ||
221 | .name = "s5p-fimc", | ||
222 | .id = 1, | ||
223 | .num_resources = ARRAY_SIZE(s5p_fimc1_resource), | ||
224 | .resource = s5p_fimc1_resource, | ||
225 | .dev = { | ||
226 | .dma_mask = &samsung_device_dma_mask, | ||
227 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
228 | }, | ||
229 | }; | ||
230 | #endif /* CONFIG_S5P_DEV_FIMC1 */ | ||
231 | |||
232 | #ifdef CONFIG_S5P_DEV_FIMC2 | ||
233 | static struct resource s5p_fimc2_resource[] = { | ||
234 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K), | ||
235 | [1] = DEFINE_RES_IRQ(IRQ_FIMC2), | ||
236 | }; | ||
237 | |||
238 | struct platform_device s5p_device_fimc2 = { | ||
239 | .name = "s5p-fimc", | ||
240 | .id = 2, | ||
241 | .num_resources = ARRAY_SIZE(s5p_fimc2_resource), | ||
242 | .resource = s5p_fimc2_resource, | ||
243 | .dev = { | ||
244 | .dma_mask = &samsung_device_dma_mask, | ||
245 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
246 | }, | ||
247 | }; | ||
248 | #endif /* CONFIG_S5P_DEV_FIMC2 */ | ||
249 | |||
250 | #ifdef CONFIG_S5P_DEV_FIMC3 | ||
251 | static struct resource s5p_fimc3_resource[] = { | ||
252 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K), | ||
253 | [1] = DEFINE_RES_IRQ(IRQ_FIMC3), | ||
254 | }; | ||
255 | |||
256 | struct platform_device s5p_device_fimc3 = { | ||
257 | .name = "s5p-fimc", | ||
258 | .id = 3, | ||
259 | .num_resources = ARRAY_SIZE(s5p_fimc3_resource), | ||
260 | .resource = s5p_fimc3_resource, | ||
261 | .dev = { | ||
262 | .dma_mask = &samsung_device_dma_mask, | ||
263 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
264 | }, | ||
265 | }; | ||
266 | #endif /* CONFIG_S5P_DEV_FIMC3 */ | ||
267 | |||
268 | /* FIMD0 */ | ||
269 | |||
270 | #ifdef CONFIG_S5P_DEV_FIMD0 | ||
271 | static struct resource s5p_fimd0_resource[] = { | ||
272 | [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K), | ||
273 | [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC), | ||
274 | [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO), | ||
275 | [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM), | ||
276 | }; | ||
277 | |||
278 | struct platform_device s5p_device_fimd0 = { | ||
279 | .name = "s5p-fb", | ||
280 | .id = 0, | ||
281 | .num_resources = ARRAY_SIZE(s5p_fimd0_resource), | ||
282 | .resource = s5p_fimd0_resource, | ||
283 | .dev = { | ||
284 | .dma_mask = &samsung_device_dma_mask, | ||
285 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
286 | }, | ||
287 | }; | ||
288 | |||
289 | void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd) | ||
290 | { | ||
291 | s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata), | ||
292 | &s5p_device_fimd0); | ||
293 | } | ||
294 | #endif /* CONFIG_S5P_DEV_FIMD0 */ | ||
295 | |||
296 | /* HWMON */ | ||
297 | |||
298 | #ifdef CONFIG_S3C_DEV_HWMON | ||
299 | struct platform_device s3c_device_hwmon = { | ||
300 | .name = "s3c-hwmon", | ||
301 | .id = -1, | ||
302 | .dev.parent = &s3c_device_adc.dev, | ||
303 | }; | ||
304 | |||
305 | void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd) | ||
306 | { | ||
307 | s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata), | ||
308 | &s3c_device_hwmon); | ||
309 | } | ||
310 | #endif /* CONFIG_S3C_DEV_HWMON */ | ||
311 | |||
312 | /* HSMMC */ | ||
313 | |||
314 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
315 | static struct resource s3c_hsmmc_resource[] = { | ||
316 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K), | ||
317 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC0), | ||
318 | }; | ||
319 | |||
320 | struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = { | ||
321 | .max_width = 4, | ||
322 | .host_caps = (MMC_CAP_4_BIT_DATA | | ||
323 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | ||
324 | .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL, | ||
325 | }; | ||
326 | |||
327 | struct platform_device s3c_device_hsmmc0 = { | ||
328 | .name = "s3c-sdhci", | ||
329 | .id = 0, | ||
330 | .num_resources = ARRAY_SIZE(s3c_hsmmc_resource), | ||
331 | .resource = s3c_hsmmc_resource, | ||
332 | .dev = { | ||
333 | .dma_mask = &samsung_device_dma_mask, | ||
334 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
335 | .platform_data = &s3c_hsmmc0_def_platdata, | ||
336 | }, | ||
337 | }; | ||
338 | |||
339 | void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd) | ||
340 | { | ||
341 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata); | ||
342 | } | ||
343 | #endif /* CONFIG_S3C_DEV_HSMMC */ | ||
344 | |||
345 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
346 | static struct resource s3c_hsmmc1_resource[] = { | ||
347 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K), | ||
348 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC1), | ||
349 | }; | ||
350 | |||
351 | struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = { | ||
352 | .max_width = 4, | ||
353 | .host_caps = (MMC_CAP_4_BIT_DATA | | ||
354 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | ||
355 | .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL, | ||
356 | }; | ||
357 | |||
358 | struct platform_device s3c_device_hsmmc1 = { | ||
359 | .name = "s3c-sdhci", | ||
360 | .id = 1, | ||
361 | .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource), | ||
362 | .resource = s3c_hsmmc1_resource, | ||
363 | .dev = { | ||
364 | .dma_mask = &samsung_device_dma_mask, | ||
365 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
366 | .platform_data = &s3c_hsmmc1_def_platdata, | ||
367 | }, | ||
368 | }; | ||
369 | |||
370 | void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd) | ||
371 | { | ||
372 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata); | ||
373 | } | ||
374 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | ||
375 | |||
376 | /* HSMMC2 */ | ||
377 | |||
378 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
379 | static struct resource s3c_hsmmc2_resource[] = { | ||
380 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K), | ||
381 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC2), | ||
382 | }; | ||
383 | |||
384 | struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = { | ||
385 | .max_width = 4, | ||
386 | .host_caps = (MMC_CAP_4_BIT_DATA | | ||
387 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | ||
388 | .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL, | ||
389 | }; | ||
390 | |||
391 | struct platform_device s3c_device_hsmmc2 = { | ||
392 | .name = "s3c-sdhci", | ||
393 | .id = 2, | ||
394 | .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource), | ||
395 | .resource = s3c_hsmmc2_resource, | ||
396 | .dev = { | ||
397 | .dma_mask = &samsung_device_dma_mask, | ||
398 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
399 | .platform_data = &s3c_hsmmc2_def_platdata, | ||
400 | }, | ||
401 | }; | ||
402 | |||
403 | void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd) | ||
404 | { | ||
405 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata); | ||
406 | } | ||
407 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | ||
408 | |||
409 | #ifdef CONFIG_S3C_DEV_HSMMC3 | ||
410 | static struct resource s3c_hsmmc3_resource[] = { | ||
411 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K), | ||
412 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC3), | ||
413 | }; | ||
414 | |||
415 | struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = { | ||
416 | .max_width = 4, | ||
417 | .host_caps = (MMC_CAP_4_BIT_DATA | | ||
418 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | ||
419 | .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL, | ||
420 | }; | ||
421 | |||
422 | struct platform_device s3c_device_hsmmc3 = { | ||
423 | .name = "s3c-sdhci", | ||
424 | .id = 3, | ||
425 | .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource), | ||
426 | .resource = s3c_hsmmc3_resource, | ||
427 | .dev = { | ||
428 | .dma_mask = &samsung_device_dma_mask, | ||
429 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
430 | .platform_data = &s3c_hsmmc3_def_platdata, | ||
431 | }, | ||
432 | }; | ||
433 | |||
434 | void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd) | ||
435 | { | ||
436 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata); | ||
437 | } | ||
438 | #endif /* CONFIG_S3C_DEV_HSMMC3 */ | ||
439 | |||
440 | /* I2C */ | ||
441 | |||
442 | static struct resource s3c_i2c0_resource[] = { | ||
443 | [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K), | ||
444 | [1] = DEFINE_RES_IRQ(IRQ_IIC), | ||
445 | }; | ||
446 | |||
447 | struct platform_device s3c_device_i2c0 = { | ||
448 | .name = "s3c2410-i2c", | ||
449 | #ifdef CONFIG_S3C_DEV_I2C1 | ||
450 | .id = 0, | ||
451 | #else | ||
452 | .id = -1, | ||
453 | #endif | ||
454 | .num_resources = ARRAY_SIZE(s3c_i2c0_resource), | ||
455 | .resource = s3c_i2c0_resource, | ||
456 | }; | ||
457 | |||
458 | struct s3c2410_platform_i2c default_i2c_data __initdata = { | ||
459 | .flags = 0, | ||
460 | .slave_addr = 0x10, | ||
461 | .frequency = 100*1000, | ||
462 | .sda_delay = 100, | ||
463 | }; | ||
464 | |||
465 | void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd) | ||
466 | { | ||
467 | struct s3c2410_platform_i2c *npd; | ||
468 | |||
469 | if (!pd) | ||
470 | pd = &default_i2c_data; | ||
471 | |||
472 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
473 | &s3c_device_i2c0); | ||
474 | |||
475 | if (!npd->cfg_gpio) | ||
476 | npd->cfg_gpio = s3c_i2c0_cfg_gpio; | ||
477 | } | ||
478 | |||
479 | #ifdef CONFIG_S3C_DEV_I2C1 | ||
480 | static struct resource s3c_i2c1_resource[] = { | ||
481 | [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K), | ||
482 | [1] = DEFINE_RES_IRQ(IRQ_IIC1), | ||
483 | }; | ||
484 | |||
485 | struct platform_device s3c_device_i2c1 = { | ||
486 | .name = "s3c2410-i2c", | ||
487 | .id = 1, | ||
488 | .num_resources = ARRAY_SIZE(s3c_i2c1_resource), | ||
489 | .resource = s3c_i2c1_resource, | ||
490 | }; | ||
491 | |||
492 | void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd) | ||
493 | { | ||
494 | struct s3c2410_platform_i2c *npd; | ||
495 | |||
496 | if (!pd) { | ||
497 | pd = &default_i2c_data; | ||
498 | pd->bus_num = 1; | ||
499 | } | ||
500 | |||
501 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
502 | &s3c_device_i2c1); | ||
503 | |||
504 | if (!npd->cfg_gpio) | ||
505 | npd->cfg_gpio = s3c_i2c1_cfg_gpio; | ||
506 | } | ||
507 | #endif /* CONFIG_S3C_DEV_I2C1 */ | ||
508 | |||
509 | #ifdef CONFIG_S3C_DEV_I2C2 | ||
510 | static struct resource s3c_i2c2_resource[] = { | ||
511 | [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K), | ||
512 | [1] = DEFINE_RES_IRQ(IRQ_IIC2), | ||
513 | }; | ||
514 | |||
515 | struct platform_device s3c_device_i2c2 = { | ||
516 | .name = "s3c2410-i2c", | ||
517 | .id = 2, | ||
518 | .num_resources = ARRAY_SIZE(s3c_i2c2_resource), | ||
519 | .resource = s3c_i2c2_resource, | ||
520 | }; | ||
521 | |||
522 | void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd) | ||
523 | { | ||
524 | struct s3c2410_platform_i2c *npd; | ||
525 | |||
526 | if (!pd) { | ||
527 | pd = &default_i2c_data; | ||
528 | pd->bus_num = 2; | ||
529 | } | ||
530 | |||
531 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
532 | &s3c_device_i2c2); | ||
533 | |||
534 | if (!npd->cfg_gpio) | ||
535 | npd->cfg_gpio = s3c_i2c2_cfg_gpio; | ||
536 | } | ||
537 | #endif /* CONFIG_S3C_DEV_I2C2 */ | ||
538 | |||
539 | #ifdef CONFIG_S3C_DEV_I2C3 | ||
540 | static struct resource s3c_i2c3_resource[] = { | ||
541 | [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K), | ||
542 | [1] = DEFINE_RES_IRQ(IRQ_IIC3), | ||
543 | }; | ||
544 | |||
545 | struct platform_device s3c_device_i2c3 = { | ||
546 | .name = "s3c2440-i2c", | ||
547 | .id = 3, | ||
548 | .num_resources = ARRAY_SIZE(s3c_i2c3_resource), | ||
549 | .resource = s3c_i2c3_resource, | ||
550 | }; | ||
551 | |||
552 | void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd) | ||
553 | { | ||
554 | struct s3c2410_platform_i2c *npd; | ||
555 | |||
556 | if (!pd) { | ||
557 | pd = &default_i2c_data; | ||
558 | pd->bus_num = 3; | ||
559 | } | ||
560 | |||
561 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
562 | &s3c_device_i2c3); | ||
563 | |||
564 | if (!npd->cfg_gpio) | ||
565 | npd->cfg_gpio = s3c_i2c3_cfg_gpio; | ||
566 | } | ||
567 | #endif /*CONFIG_S3C_DEV_I2C3 */ | ||
568 | |||
569 | #ifdef CONFIG_S3C_DEV_I2C4 | ||
570 | static struct resource s3c_i2c4_resource[] = { | ||
571 | [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K), | ||
572 | [1] = DEFINE_RES_IRQ(IRQ_IIC4), | ||
573 | }; | ||
574 | |||
575 | struct platform_device s3c_device_i2c4 = { | ||
576 | .name = "s3c2440-i2c", | ||
577 | .id = 4, | ||
578 | .num_resources = ARRAY_SIZE(s3c_i2c4_resource), | ||
579 | .resource = s3c_i2c4_resource, | ||
580 | }; | ||
581 | |||
582 | void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd) | ||
583 | { | ||
584 | struct s3c2410_platform_i2c *npd; | ||
585 | |||
586 | if (!pd) { | ||
587 | pd = &default_i2c_data; | ||
588 | pd->bus_num = 4; | ||
589 | } | ||
590 | |||
591 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
592 | &s3c_device_i2c4); | ||
593 | |||
594 | if (!npd->cfg_gpio) | ||
595 | npd->cfg_gpio = s3c_i2c4_cfg_gpio; | ||
596 | } | ||
597 | #endif /*CONFIG_S3C_DEV_I2C4 */ | ||
598 | |||
599 | #ifdef CONFIG_S3C_DEV_I2C5 | ||
600 | static struct resource s3c_i2c5_resource[] = { | ||
601 | [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K), | ||
602 | [1] = DEFINE_RES_IRQ(IRQ_IIC5), | ||
603 | }; | ||
604 | |||
605 | struct platform_device s3c_device_i2c5 = { | ||
606 | .name = "s3c2440-i2c", | ||
607 | .id = 5, | ||
608 | .num_resources = ARRAY_SIZE(s3c_i2c5_resource), | ||
609 | .resource = s3c_i2c5_resource, | ||
610 | }; | ||
611 | |||
612 | void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd) | ||
613 | { | ||
614 | struct s3c2410_platform_i2c *npd; | ||
615 | |||
616 | if (!pd) { | ||
617 | pd = &default_i2c_data; | ||
618 | pd->bus_num = 5; | ||
619 | } | ||
620 | |||
621 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
622 | &s3c_device_i2c5); | ||
623 | |||
624 | if (!npd->cfg_gpio) | ||
625 | npd->cfg_gpio = s3c_i2c5_cfg_gpio; | ||
626 | } | ||
627 | #endif /*CONFIG_S3C_DEV_I2C5 */ | ||
628 | |||
629 | #ifdef CONFIG_S3C_DEV_I2C6 | ||
630 | static struct resource s3c_i2c6_resource[] = { | ||
631 | [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K), | ||
632 | [1] = DEFINE_RES_IRQ(IRQ_IIC6), | ||
633 | }; | ||
634 | |||
635 | struct platform_device s3c_device_i2c6 = { | ||
636 | .name = "s3c2440-i2c", | ||
637 | .id = 6, | ||
638 | .num_resources = ARRAY_SIZE(s3c_i2c6_resource), | ||
639 | .resource = s3c_i2c6_resource, | ||
640 | }; | ||
641 | |||
642 | void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd) | ||
643 | { | ||
644 | struct s3c2410_platform_i2c *npd; | ||
645 | |||
646 | if (!pd) { | ||
647 | pd = &default_i2c_data; | ||
648 | pd->bus_num = 6; | ||
649 | } | ||
650 | |||
651 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
652 | &s3c_device_i2c6); | ||
653 | |||
654 | if (!npd->cfg_gpio) | ||
655 | npd->cfg_gpio = s3c_i2c6_cfg_gpio; | ||
656 | } | ||
657 | #endif /* CONFIG_S3C_DEV_I2C6 */ | ||
658 | |||
659 | #ifdef CONFIG_S3C_DEV_I2C7 | ||
660 | static struct resource s3c_i2c7_resource[] = { | ||
661 | [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K), | ||
662 | [1] = DEFINE_RES_IRQ(IRQ_IIC7), | ||
663 | }; | ||
664 | |||
665 | struct platform_device s3c_device_i2c7 = { | ||
666 | .name = "s3c2440-i2c", | ||
667 | .id = 7, | ||
668 | .num_resources = ARRAY_SIZE(s3c_i2c7_resource), | ||
669 | .resource = s3c_i2c7_resource, | ||
670 | }; | ||
671 | |||
672 | void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd) | ||
673 | { | ||
674 | struct s3c2410_platform_i2c *npd; | ||
675 | |||
676 | if (!pd) { | ||
677 | pd = &default_i2c_data; | ||
678 | pd->bus_num = 7; | ||
679 | } | ||
680 | |||
681 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
682 | &s3c_device_i2c7); | ||
683 | |||
684 | if (!npd->cfg_gpio) | ||
685 | npd->cfg_gpio = s3c_i2c7_cfg_gpio; | ||
686 | } | ||
687 | #endif /* CONFIG_S3C_DEV_I2C7 */ | ||
688 | |||
689 | /* I2C HDMIPHY */ | ||
690 | |||
691 | #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY | ||
692 | static struct resource s5p_i2c_resource[] = { | ||
693 | [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K), | ||
694 | [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY), | ||
695 | }; | ||
696 | |||
697 | struct platform_device s5p_device_i2c_hdmiphy = { | ||
698 | .name = "s3c2440-hdmiphy-i2c", | ||
699 | .id = -1, | ||
700 | .num_resources = ARRAY_SIZE(s5p_i2c_resource), | ||
701 | .resource = s5p_i2c_resource, | ||
702 | }; | ||
703 | |||
704 | void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd) | ||
705 | { | ||
706 | struct s3c2410_platform_i2c *npd; | ||
707 | |||
708 | if (!pd) { | ||
709 | pd = &default_i2c_data; | ||
710 | |||
711 | if (soc_is_exynos4210()) | ||
712 | pd->bus_num = 8; | ||
713 | else if (soc_is_s5pv210()) | ||
714 | pd->bus_num = 3; | ||
715 | else | ||
716 | pd->bus_num = 0; | ||
717 | } | ||
718 | |||
719 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | ||
720 | &s5p_device_i2c_hdmiphy); | ||
721 | } | ||
722 | #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */ | ||
723 | |||
724 | /* I2S */ | ||
725 | |||
726 | #ifdef CONFIG_PLAT_S3C24XX | ||
727 | static struct resource s3c_iis_resource[] = { | ||
728 | [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS), | ||
729 | }; | ||
730 | |||
731 | struct platform_device s3c_device_iis = { | ||
732 | .name = "s3c24xx-iis", | ||
733 | .id = -1, | ||
734 | .num_resources = ARRAY_SIZE(s3c_iis_resource), | ||
735 | .resource = s3c_iis_resource, | ||
736 | .dev = { | ||
737 | .dma_mask = &samsung_device_dma_mask, | ||
738 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
739 | } | ||
740 | }; | ||
741 | #endif /* CONFIG_PLAT_S3C24XX */ | ||
742 | |||
743 | #ifdef CONFIG_CPU_S3C2440 | ||
744 | struct platform_device s3c2412_device_iis = { | ||
745 | .name = "s3c2412-iis", | ||
746 | .id = -1, | ||
747 | .dev = { | ||
748 | .dma_mask = &samsung_device_dma_mask, | ||
749 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
750 | } | ||
751 | }; | ||
752 | #endif /* CONFIG_CPU_S3C2440 */ | ||
753 | |||
754 | /* IDE CFCON */ | ||
755 | |||
756 | #ifdef CONFIG_SAMSUNG_DEV_IDE | ||
757 | static struct resource s3c_cfcon_resource[] = { | ||
758 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K), | ||
759 | [1] = DEFINE_RES_IRQ(IRQ_CFCON), | ||
760 | }; | ||
761 | |||
762 | struct platform_device s3c_device_cfcon = { | ||
763 | .id = 0, | ||
764 | .num_resources = ARRAY_SIZE(s3c_cfcon_resource), | ||
765 | .resource = s3c_cfcon_resource, | ||
766 | }; | ||
767 | |||
768 | void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata) | ||
769 | { | ||
770 | s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata), | ||
771 | &s3c_device_cfcon); | ||
772 | } | ||
773 | #endif /* CONFIG_SAMSUNG_DEV_IDE */ | ||
774 | |||
775 | /* KEYPAD */ | ||
776 | |||
777 | #ifdef CONFIG_SAMSUNG_DEV_KEYPAD | ||
778 | static struct resource samsung_keypad_resources[] = { | ||
779 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32), | ||
780 | [1] = DEFINE_RES_IRQ(IRQ_KEYPAD), | ||
781 | }; | ||
782 | |||
783 | struct platform_device samsung_device_keypad = { | ||
784 | .name = "samsung-keypad", | ||
785 | .id = -1, | ||
786 | .num_resources = ARRAY_SIZE(samsung_keypad_resources), | ||
787 | .resource = samsung_keypad_resources, | ||
788 | }; | ||
789 | |||
790 | void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd) | ||
791 | { | ||
792 | struct samsung_keypad_platdata *npd; | ||
793 | |||
794 | npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata), | ||
795 | &samsung_device_keypad); | ||
796 | |||
797 | if (!npd->cfg_gpio) | ||
798 | npd->cfg_gpio = samsung_keypad_cfg_gpio; | ||
799 | } | ||
800 | #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */ | ||
801 | |||
802 | /* LCD Controller */ | ||
803 | |||
804 | #ifdef CONFIG_PLAT_S3C24XX | ||
805 | static struct resource s3c_lcd_resource[] = { | ||
806 | [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD), | ||
807 | [1] = DEFINE_RES_IRQ(IRQ_LCD), | ||
808 | }; | ||
809 | |||
810 | struct platform_device s3c_device_lcd = { | ||
811 | .name = "s3c2410-lcd", | ||
812 | .id = -1, | ||
813 | .num_resources = ARRAY_SIZE(s3c_lcd_resource), | ||
814 | .resource = s3c_lcd_resource, | ||
815 | .dev = { | ||
816 | .dma_mask = &samsung_device_dma_mask, | ||
817 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
818 | } | ||
819 | }; | ||
820 | |||
821 | void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) | ||
822 | { | ||
823 | struct s3c2410fb_mach_info *npd; | ||
824 | |||
825 | npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd); | ||
826 | if (npd) { | ||
827 | npd->displays = kmemdup(pd->displays, | ||
828 | sizeof(struct s3c2410fb_display) * npd->num_displays, | ||
829 | GFP_KERNEL); | ||
830 | if (!npd->displays) | ||
831 | printk(KERN_ERR "no memory for LCD display data\n"); | ||
832 | } else { | ||
833 | printk(KERN_ERR "no memory for LCD platform data\n"); | ||
834 | } | ||
835 | } | ||
836 | #endif /* CONFIG_PLAT_S3C24XX */ | ||
837 | |||
838 | /* MFC */ | ||
839 | |||
840 | #ifdef CONFIG_S5P_DEV_MFC | ||
841 | static struct resource s5p_mfc_resource[] = { | ||
842 | [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K), | ||
843 | [1] = DEFINE_RES_IRQ(IRQ_MFC), | ||
844 | }; | ||
845 | |||
846 | struct platform_device s5p_device_mfc = { | ||
847 | .name = "s5p-mfc", | ||
848 | .id = -1, | ||
849 | .num_resources = ARRAY_SIZE(s5p_mfc_resource), | ||
850 | .resource = s5p_mfc_resource, | ||
851 | }; | ||
852 | |||
853 | /* | ||
854 | * MFC hardware has 2 memory interfaces which are modelled as two separate | ||
855 | * platform devices to let dma-mapping distinguish between them. | ||
856 | * | ||
857 | * MFC parent device (s5p_device_mfc) must be registered before memory | ||
858 | * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r). | ||
859 | */ | ||
860 | |||
861 | struct platform_device s5p_device_mfc_l = { | ||
862 | .name = "s5p-mfc-l", | ||
863 | .id = -1, | ||
864 | .dev = { | ||
865 | .parent = &s5p_device_mfc.dev, | ||
866 | .dma_mask = &samsung_device_dma_mask, | ||
867 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
868 | }, | ||
869 | }; | ||
870 | |||
871 | struct platform_device s5p_device_mfc_r = { | ||
872 | .name = "s5p-mfc-r", | ||
873 | .id = -1, | ||
874 | .dev = { | ||
875 | .parent = &s5p_device_mfc.dev, | ||
876 | .dma_mask = &samsung_device_dma_mask, | ||
877 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
878 | }, | ||
879 | }; | ||
880 | #endif /* CONFIG_S5P_DEV_MFC */ | ||
881 | |||
882 | /* MIPI CSIS */ | ||
883 | |||
884 | #ifdef CONFIG_S5P_DEV_CSIS0 | ||
885 | static struct resource s5p_mipi_csis0_resource[] = { | ||
886 | [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_4K), | ||
887 | [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0), | ||
888 | }; | ||
889 | |||
890 | struct platform_device s5p_device_mipi_csis0 = { | ||
891 | .name = "s5p-mipi-csis", | ||
892 | .id = 0, | ||
893 | .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource), | ||
894 | .resource = s5p_mipi_csis0_resource, | ||
895 | }; | ||
896 | #endif /* CONFIG_S5P_DEV_CSIS0 */ | ||
897 | |||
898 | #ifdef CONFIG_S5P_DEV_CSIS1 | ||
899 | static struct resource s5p_mipi_csis1_resource[] = { | ||
900 | [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_4K), | ||
901 | [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1), | ||
902 | }; | ||
903 | |||
904 | struct platform_device s5p_device_mipi_csis1 = { | ||
905 | .name = "s5p-mipi-csis", | ||
906 | .id = 1, | ||
907 | .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource), | ||
908 | .resource = s5p_mipi_csis1_resource, | ||
909 | }; | ||
910 | #endif | ||
911 | |||
912 | /* NAND */ | ||
913 | |||
914 | #ifdef CONFIG_S3C_DEV_NAND | ||
915 | static struct resource s3c_nand_resource[] = { | ||
916 | [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M), | ||
917 | }; | ||
918 | |||
919 | struct platform_device s3c_device_nand = { | ||
920 | .name = "s3c2410-nand", | ||
921 | .id = -1, | ||
922 | .num_resources = ARRAY_SIZE(s3c_nand_resource), | ||
923 | .resource = s3c_nand_resource, | ||
924 | }; | ||
925 | |||
926 | /* | ||
927 | * s3c_nand_copy_set() - copy nand set data | ||
928 | * @set: The new structure, directly copied from the old. | ||
929 | * | ||
930 | * Copy all the fields from the NAND set field from what is probably __initdata | ||
931 | * to new kernel memory. The code returns 0 if the copy happened correctly or | ||
932 | * an error code for the calling function to display. | ||
933 | * | ||
934 | * Note, we currently do not try and look to see if we've already copied the | ||
935 | * data in a previous set. | ||
936 | */ | ||
937 | static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set) | ||
938 | { | ||
939 | void *ptr; | ||
940 | int size; | ||
941 | |||
942 | size = sizeof(struct mtd_partition) * set->nr_partitions; | ||
943 | if (size) { | ||
944 | ptr = kmemdup(set->partitions, size, GFP_KERNEL); | ||
945 | set->partitions = ptr; | ||
946 | |||
947 | if (!ptr) | ||
948 | return -ENOMEM; | ||
949 | } | ||
950 | |||
951 | if (set->nr_map && set->nr_chips) { | ||
952 | size = sizeof(int) * set->nr_chips; | ||
953 | ptr = kmemdup(set->nr_map, size, GFP_KERNEL); | ||
954 | set->nr_map = ptr; | ||
955 | |||
956 | if (!ptr) | ||
957 | return -ENOMEM; | ||
958 | } | ||
959 | |||
960 | if (set->ecc_layout) { | ||
961 | ptr = kmemdup(set->ecc_layout, | ||
962 | sizeof(struct nand_ecclayout), GFP_KERNEL); | ||
963 | set->ecc_layout = ptr; | ||
964 | |||
965 | if (!ptr) | ||
966 | return -ENOMEM; | ||
967 | } | ||
968 | |||
969 | return 0; | ||
970 | } | ||
971 | |||
972 | void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) | ||
973 | { | ||
974 | struct s3c2410_platform_nand *npd; | ||
975 | int size; | ||
976 | int ret; | ||
977 | |||
978 | /* note, if we get a failure in allocation, we simply drop out of the | ||
979 | * function. If there is so little memory available at initialisation | ||
980 | * time then there is little chance the system is going to run. | ||
981 | */ | ||
982 | |||
983 | npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand), | ||
984 | &s3c_device_nand); | ||
985 | if (!npd) | ||
986 | return; | ||
987 | |||
988 | /* now see if we need to copy any of the nand set data */ | ||
989 | |||
990 | size = sizeof(struct s3c2410_nand_set) * npd->nr_sets; | ||
991 | if (size) { | ||
992 | struct s3c2410_nand_set *from = npd->sets; | ||
993 | struct s3c2410_nand_set *to; | ||
994 | int i; | ||
995 | |||
996 | to = kmemdup(from, size, GFP_KERNEL); | ||
997 | npd->sets = to; /* set, even if we failed */ | ||
998 | |||
999 | if (!to) { | ||
1000 | printk(KERN_ERR "%s: no memory for sets\n", __func__); | ||
1001 | return; | ||
1002 | } | ||
1003 | |||
1004 | for (i = 0; i < npd->nr_sets; i++) { | ||
1005 | ret = s3c_nand_copy_set(to); | ||
1006 | if (ret) { | ||
1007 | printk(KERN_ERR "%s: failed to copy set %d\n", | ||
1008 | __func__, i); | ||
1009 | return; | ||
1010 | } | ||
1011 | to++; | ||
1012 | } | ||
1013 | } | ||
1014 | } | ||
1015 | #endif /* CONFIG_S3C_DEV_NAND */ | ||
1016 | |||
1017 | /* ONENAND */ | ||
1018 | |||
1019 | #ifdef CONFIG_S3C_DEV_ONENAND | ||
1020 | static struct resource s3c_onenand_resources[] = { | ||
1021 | [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K), | ||
1022 | [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF), | ||
1023 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND), | ||
1024 | }; | ||
1025 | |||
1026 | struct platform_device s3c_device_onenand = { | ||
1027 | .name = "samsung-onenand", | ||
1028 | .id = 0, | ||
1029 | .num_resources = ARRAY_SIZE(s3c_onenand_resources), | ||
1030 | .resource = s3c_onenand_resources, | ||
1031 | }; | ||
1032 | #endif /* CONFIG_S3C_DEV_ONENAND */ | ||
1033 | |||
1034 | #ifdef CONFIG_S3C64XX_DEV_ONENAND1 | ||
1035 | static struct resource s3c64xx_onenand1_resources[] = { | ||
1036 | [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K), | ||
1037 | [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF), | ||
1038 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND1), | ||
1039 | }; | ||
1040 | |||
1041 | struct platform_device s3c64xx_device_onenand1 = { | ||
1042 | .name = "samsung-onenand", | ||
1043 | .id = 1, | ||
1044 | .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources), | ||
1045 | .resource = s3c64xx_onenand1_resources, | ||
1046 | }; | ||
1047 | |||
1048 | void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata) | ||
1049 | { | ||
1050 | s3c_set_platdata(pdata, sizeof(struct onenand_platform_data), | ||
1051 | &s3c64xx_device_onenand1); | ||
1052 | } | ||
1053 | #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */ | ||
1054 | |||
1055 | #ifdef CONFIG_S5P_DEV_ONENAND | ||
1056 | static struct resource s5p_onenand_resources[] = { | ||
1057 | [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K), | ||
1058 | [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K), | ||
1059 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI), | ||
1060 | }; | ||
1061 | |||
1062 | struct platform_device s5p_device_onenand = { | ||
1063 | .name = "s5pc110-onenand", | ||
1064 | .id = -1, | ||
1065 | .num_resources = ARRAY_SIZE(s5p_onenand_resources), | ||
1066 | .resource = s5p_onenand_resources, | ||
1067 | }; | ||
1068 | #endif /* CONFIG_S5P_DEV_ONENAND */ | ||
1069 | |||
1070 | /* PMU */ | ||
1071 | |||
1072 | #ifdef CONFIG_PLAT_S5P | ||
1073 | static struct resource s5p_pmu_resource[] = { | ||
1074 | DEFINE_RES_IRQ(IRQ_PMU) | ||
1075 | }; | ||
1076 | |||
1077 | struct platform_device s5p_device_pmu = { | ||
1078 | .name = "arm-pmu", | ||
1079 | .id = ARM_PMU_DEVICE_CPU, | ||
1080 | .num_resources = ARRAY_SIZE(s5p_pmu_resource), | ||
1081 | .resource = s5p_pmu_resource, | ||
1082 | }; | ||
1083 | |||
1084 | static int __init s5p_pmu_init(void) | ||
1085 | { | ||
1086 | platform_device_register(&s5p_device_pmu); | ||
1087 | return 0; | ||
1088 | } | ||
1089 | arch_initcall(s5p_pmu_init); | ||
1090 | #endif /* CONFIG_PLAT_S5P */ | ||
1091 | |||
1092 | /* PWM Timer */ | ||
1093 | |||
1094 | #ifdef CONFIG_SAMSUNG_DEV_PWM | ||
1095 | |||
1096 | #define TIMER_RESOURCE_SIZE (1) | ||
1097 | |||
1098 | #define TIMER_RESOURCE(_tmr, _irq) \ | ||
1099 | (struct resource [TIMER_RESOURCE_SIZE]) { \ | ||
1100 | [0] = { \ | ||
1101 | .start = _irq, \ | ||
1102 | .end = _irq, \ | ||
1103 | .flags = IORESOURCE_IRQ \ | ||
1104 | } \ | ||
1105 | } | ||
1106 | |||
1107 | #define DEFINE_S3C_TIMER(_tmr_no, _irq) \ | ||
1108 | .name = "s3c24xx-pwm", \ | ||
1109 | .id = _tmr_no, \ | ||
1110 | .num_resources = TIMER_RESOURCE_SIZE, \ | ||
1111 | .resource = TIMER_RESOURCE(_tmr_no, _irq), \ | ||
1112 | |||
1113 | /* | ||
1114 | * since we already have an static mapping for the timer, | ||
1115 | * we do not bother setting any IO resource for the base. | ||
1116 | */ | ||
1117 | |||
1118 | struct platform_device s3c_device_timer[] = { | ||
1119 | [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) }, | ||
1120 | [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) }, | ||
1121 | [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) }, | ||
1122 | [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) }, | ||
1123 | [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) }, | ||
1124 | }; | ||
1125 | #endif /* CONFIG_SAMSUNG_DEV_PWM */ | ||
1126 | |||
1127 | /* RTC */ | ||
1128 | |||
1129 | #ifdef CONFIG_PLAT_S3C24XX | ||
1130 | static struct resource s3c_rtc_resource[] = { | ||
1131 | [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256), | ||
1132 | [1] = DEFINE_RES_IRQ(IRQ_RTC), | ||
1133 | [2] = DEFINE_RES_IRQ(IRQ_TICK), | ||
1134 | }; | ||
1135 | |||
1136 | struct platform_device s3c_device_rtc = { | ||
1137 | .name = "s3c2410-rtc", | ||
1138 | .id = -1, | ||
1139 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | ||
1140 | .resource = s3c_rtc_resource, | ||
1141 | }; | ||
1142 | #endif /* CONFIG_PLAT_S3C24XX */ | ||
1143 | |||
1144 | #ifdef CONFIG_S3C_DEV_RTC | ||
1145 | static struct resource s3c_rtc_resource[] = { | ||
1146 | [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256), | ||
1147 | [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM), | ||
1148 | [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC), | ||
1149 | }; | ||
1150 | |||
1151 | struct platform_device s3c_device_rtc = { | ||
1152 | .name = "s3c64xx-rtc", | ||
1153 | .id = -1, | ||
1154 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | ||
1155 | .resource = s3c_rtc_resource, | ||
1156 | }; | ||
1157 | #endif /* CONFIG_S3C_DEV_RTC */ | ||
1158 | |||
1159 | /* SDI */ | ||
1160 | |||
1161 | #ifdef CONFIG_PLAT_S3C24XX | ||
1162 | static struct resource s3c_sdi_resource[] = { | ||
1163 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI), | ||
1164 | [1] = DEFINE_RES_IRQ(IRQ_SDI), | ||
1165 | }; | ||
1166 | |||
1167 | struct platform_device s3c_device_sdi = { | ||
1168 | .name = "s3c2410-sdi", | ||
1169 | .id = -1, | ||
1170 | .num_resources = ARRAY_SIZE(s3c_sdi_resource), | ||
1171 | .resource = s3c_sdi_resource, | ||
1172 | }; | ||
1173 | |||
1174 | void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) | ||
1175 | { | ||
1176 | s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata), | ||
1177 | &s3c_device_sdi); | ||
1178 | } | ||
1179 | #endif /* CONFIG_PLAT_S3C24XX */ | ||
1180 | |||
1181 | /* SPI */ | ||
1182 | |||
1183 | #ifdef CONFIG_PLAT_S3C24XX | ||
1184 | static struct resource s3c_spi0_resource[] = { | ||
1185 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32), | ||
1186 | [1] = DEFINE_RES_IRQ(IRQ_SPI0), | ||
1187 | }; | ||
1188 | |||
1189 | struct platform_device s3c_device_spi0 = { | ||
1190 | .name = "s3c2410-spi", | ||
1191 | .id = 0, | ||
1192 | .num_resources = ARRAY_SIZE(s3c_spi0_resource), | ||
1193 | .resource = s3c_spi0_resource, | ||
1194 | .dev = { | ||
1195 | .dma_mask = &samsung_device_dma_mask, | ||
1196 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1197 | } | ||
1198 | }; | ||
1199 | |||
1200 | static struct resource s3c_spi1_resource[] = { | ||
1201 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32), | ||
1202 | [1] = DEFINE_RES_IRQ(IRQ_SPI1), | ||
1203 | }; | ||
1204 | |||
1205 | struct platform_device s3c_device_spi1 = { | ||
1206 | .name = "s3c2410-spi", | ||
1207 | .id = 1, | ||
1208 | .num_resources = ARRAY_SIZE(s3c_spi1_resource), | ||
1209 | .resource = s3c_spi1_resource, | ||
1210 | .dev = { | ||
1211 | .dma_mask = &samsung_device_dma_mask, | ||
1212 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1213 | } | ||
1214 | }; | ||
1215 | #endif /* CONFIG_PLAT_S3C24XX */ | ||
1216 | |||
1217 | /* Touchscreen */ | ||
1218 | |||
1219 | #ifdef CONFIG_PLAT_S3C24XX | ||
1220 | static struct resource s3c_ts_resource[] = { | ||
1221 | [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), | ||
1222 | [1] = DEFINE_RES_IRQ(IRQ_TC), | ||
1223 | }; | ||
1224 | |||
1225 | struct platform_device s3c_device_ts = { | ||
1226 | .name = "s3c2410-ts", | ||
1227 | .id = -1, | ||
1228 | .dev.parent = &s3c_device_adc.dev, | ||
1229 | .num_resources = ARRAY_SIZE(s3c_ts_resource), | ||
1230 | .resource = s3c_ts_resource, | ||
1231 | }; | ||
1232 | |||
1233 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info) | ||
1234 | { | ||
1235 | s3c_set_platdata(hard_s3c2410ts_info, | ||
1236 | sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts); | ||
1237 | } | ||
1238 | #endif /* CONFIG_PLAT_S3C24XX */ | ||
1239 | |||
1240 | #ifdef CONFIG_SAMSUNG_DEV_TS | ||
1241 | static struct resource s3c_ts_resource[] = { | ||
1242 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), | ||
1243 | [1] = DEFINE_RES_IRQ(IRQ_TC), | ||
1244 | }; | ||
1245 | |||
1246 | static struct s3c2410_ts_mach_info default_ts_data __initdata = { | ||
1247 | .delay = 10000, | ||
1248 | .presc = 49, | ||
1249 | .oversampling_shift = 2, | ||
1250 | }; | ||
1251 | |||
1252 | struct platform_device s3c_device_ts = { | ||
1253 | .name = "s3c64xx-ts", | ||
1254 | .id = -1, | ||
1255 | .num_resources = ARRAY_SIZE(s3c_ts_resource), | ||
1256 | .resource = s3c_ts_resource, | ||
1257 | }; | ||
1258 | |||
1259 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) | ||
1260 | { | ||
1261 | if (!pd) | ||
1262 | pd = &default_ts_data; | ||
1263 | |||
1264 | s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info), | ||
1265 | &s3c_device_ts); | ||
1266 | } | ||
1267 | #endif /* CONFIG_SAMSUNG_DEV_TS */ | ||
1268 | |||
1269 | /* TV */ | ||
1270 | |||
1271 | #ifdef CONFIG_S5P_DEV_TV | ||
1272 | |||
1273 | static struct resource s5p_hdmi_resources[] = { | ||
1274 | [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M), | ||
1275 | [1] = DEFINE_RES_IRQ(IRQ_HDMI), | ||
1276 | }; | ||
1277 | |||
1278 | struct platform_device s5p_device_hdmi = { | ||
1279 | .name = "s5p-hdmi", | ||
1280 | .id = -1, | ||
1281 | .num_resources = ARRAY_SIZE(s5p_hdmi_resources), | ||
1282 | .resource = s5p_hdmi_resources, | ||
1283 | }; | ||
1284 | |||
1285 | static struct resource s5p_sdo_resources[] = { | ||
1286 | [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K), | ||
1287 | [1] = DEFINE_RES_IRQ(IRQ_SDO), | ||
1288 | }; | ||
1289 | |||
1290 | struct platform_device s5p_device_sdo = { | ||
1291 | .name = "s5p-sdo", | ||
1292 | .id = -1, | ||
1293 | .num_resources = ARRAY_SIZE(s5p_sdo_resources), | ||
1294 | .resource = s5p_sdo_resources, | ||
1295 | }; | ||
1296 | |||
1297 | static struct resource s5p_mixer_resources[] = { | ||
1298 | [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"), | ||
1299 | [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"), | ||
1300 | [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"), | ||
1301 | }; | ||
1302 | |||
1303 | struct platform_device s5p_device_mixer = { | ||
1304 | .name = "s5p-mixer", | ||
1305 | .id = -1, | ||
1306 | .num_resources = ARRAY_SIZE(s5p_mixer_resources), | ||
1307 | .resource = s5p_mixer_resources, | ||
1308 | .dev = { | ||
1309 | .dma_mask = &samsung_device_dma_mask, | ||
1310 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1311 | } | ||
1312 | }; | ||
1313 | #endif /* CONFIG_S5P_DEV_TV */ | ||
1314 | |||
1315 | /* USB */ | ||
1316 | |||
1317 | #ifdef CONFIG_S3C_DEV_USB_HOST | ||
1318 | static struct resource s3c_usb_resource[] = { | ||
1319 | [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256), | ||
1320 | [1] = DEFINE_RES_IRQ(IRQ_USBH), | ||
1321 | }; | ||
1322 | |||
1323 | struct platform_device s3c_device_ohci = { | ||
1324 | .name = "s3c2410-ohci", | ||
1325 | .id = -1, | ||
1326 | .num_resources = ARRAY_SIZE(s3c_usb_resource), | ||
1327 | .resource = s3c_usb_resource, | ||
1328 | .dev = { | ||
1329 | .dma_mask = &samsung_device_dma_mask, | ||
1330 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1331 | } | ||
1332 | }; | ||
1333 | |||
1334 | /* | ||
1335 | * s3c_ohci_set_platdata - initialise OHCI device platform data | ||
1336 | * @info: The platform data. | ||
1337 | * | ||
1338 | * This call copies the @info passed in and sets the device .platform_data | ||
1339 | * field to that copy. The @info is copied so that the original can be marked | ||
1340 | * __initdata. | ||
1341 | */ | ||
1342 | |||
1343 | void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info) | ||
1344 | { | ||
1345 | s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info), | ||
1346 | &s3c_device_ohci); | ||
1347 | } | ||
1348 | #endif /* CONFIG_S3C_DEV_USB_HOST */ | ||
1349 | |||
1350 | /* USB Device (Gadget) */ | ||
1351 | |||
1352 | #ifdef CONFIG_PLAT_S3C24XX | ||
1353 | static struct resource s3c_usbgadget_resource[] = { | ||
1354 | [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV), | ||
1355 | [1] = DEFINE_RES_IRQ(IRQ_USBD), | ||
1356 | }; | ||
1357 | |||
1358 | struct platform_device s3c_device_usbgadget = { | ||
1359 | .name = "s3c2410-usbgadget", | ||
1360 | .id = -1, | ||
1361 | .num_resources = ARRAY_SIZE(s3c_usbgadget_resource), | ||
1362 | .resource = s3c_usbgadget_resource, | ||
1363 | }; | ||
1364 | |||
1365 | void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd) | ||
1366 | { | ||
1367 | s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget); | ||
1368 | } | ||
1369 | #endif /* CONFIG_PLAT_S3C24XX */ | ||
1370 | |||
1371 | /* USB EHCI Host Controller */ | ||
1372 | |||
1373 | #ifdef CONFIG_S5P_DEV_USB_EHCI | ||
1374 | static struct resource s5p_ehci_resource[] = { | ||
1375 | [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256), | ||
1376 | [1] = DEFINE_RES_IRQ(IRQ_USB_HOST), | ||
1377 | }; | ||
1378 | |||
1379 | struct platform_device s5p_device_ehci = { | ||
1380 | .name = "s5p-ehci", | ||
1381 | .id = -1, | ||
1382 | .num_resources = ARRAY_SIZE(s5p_ehci_resource), | ||
1383 | .resource = s5p_ehci_resource, | ||
1384 | .dev = { | ||
1385 | .dma_mask = &samsung_device_dma_mask, | ||
1386 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1387 | } | ||
1388 | }; | ||
1389 | |||
1390 | void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd) | ||
1391 | { | ||
1392 | struct s5p_ehci_platdata *npd; | ||
1393 | |||
1394 | npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata), | ||
1395 | &s5p_device_ehci); | ||
1396 | |||
1397 | if (!npd->phy_init) | ||
1398 | npd->phy_init = s5p_usb_phy_init; | ||
1399 | if (!npd->phy_exit) | ||
1400 | npd->phy_exit = s5p_usb_phy_exit; | ||
1401 | } | ||
1402 | #endif /* CONFIG_S5P_DEV_USB_EHCI */ | ||
1403 | |||
1404 | /* USB HSOTG */ | ||
1405 | |||
1406 | #ifdef CONFIG_S3C_DEV_USB_HSOTG | ||
1407 | static struct resource s3c_usb_hsotg_resources[] = { | ||
1408 | [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K), | ||
1409 | [1] = DEFINE_RES_IRQ(IRQ_OTG), | ||
1410 | }; | ||
1411 | |||
1412 | struct platform_device s3c_device_usb_hsotg = { | ||
1413 | .name = "s3c-hsotg", | ||
1414 | .id = -1, | ||
1415 | .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources), | ||
1416 | .resource = s3c_usb_hsotg_resources, | ||
1417 | .dev = { | ||
1418 | .dma_mask = &samsung_device_dma_mask, | ||
1419 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1420 | }, | ||
1421 | }; | ||
1422 | #endif /* CONFIG_S3C_DEV_USB_HSOTG */ | ||
1423 | |||
1424 | /* USB High Spped 2.0 Device (Gadget) */ | ||
1425 | |||
1426 | #ifdef CONFIG_PLAT_S3C24XX | ||
1427 | static struct resource s3c_hsudc_resource[] = { | ||
1428 | [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC), | ||
1429 | [1] = DEFINE_RES_IRQ(IRQ_USBD), | ||
1430 | }; | ||
1431 | |||
1432 | struct platform_device s3c_device_usb_hsudc = { | ||
1433 | .name = "s3c-hsudc", | ||
1434 | .id = -1, | ||
1435 | .num_resources = ARRAY_SIZE(s3c_hsudc_resource), | ||
1436 | .resource = s3c_hsudc_resource, | ||
1437 | .dev = { | ||
1438 | .dma_mask = &samsung_device_dma_mask, | ||
1439 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1440 | }, | ||
1441 | }; | ||
1442 | |||
1443 | void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd) | ||
1444 | { | ||
1445 | s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc); | ||
1446 | } | ||
1447 | #endif /* CONFIG_PLAT_S3C24XX */ | ||
1448 | |||
1449 | /* WDT */ | ||
1450 | |||
1451 | #ifdef CONFIG_S3C_DEV_WDT | ||
1452 | static struct resource s3c_wdt_resource[] = { | ||
1453 | [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K), | ||
1454 | [1] = DEFINE_RES_IRQ(IRQ_WDT), | ||
1455 | }; | ||
1456 | |||
1457 | struct platform_device s3c_device_wdt = { | ||
1458 | .name = "s3c2410-wdt", | ||
1459 | .id = -1, | ||
1460 | .num_resources = ARRAY_SIZE(s3c_wdt_resource), | ||
1461 | .resource = s3c_wdt_resource, | ||
1462 | }; | ||
1463 | #endif /* CONFIG_S3C_DEV_WDT */ | ||
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c new file mode 100644 index 00000000000..6e3d9abc9e2 --- /dev/null +++ b/arch/arm/plat-samsung/dma-ops.c | |||
@@ -0,0 +1,131 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dma-ops.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Samsung DMA Operations | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/errno.h> | ||
15 | #include <linux/amba/pl330.h> | ||
16 | #include <linux/scatterlist.h> | ||
17 | |||
18 | #include <mach/dma.h> | ||
19 | |||
20 | static inline bool pl330_filter(struct dma_chan *chan, void *param) | ||
21 | { | ||
22 | struct dma_pl330_peri *peri = chan->private; | ||
23 | return peri->peri_id == (unsigned)param; | ||
24 | } | ||
25 | |||
26 | static unsigned samsung_dmadev_request(enum dma_ch dma_ch, | ||
27 | struct samsung_dma_info *info) | ||
28 | { | ||
29 | struct dma_chan *chan; | ||
30 | dma_cap_mask_t mask; | ||
31 | struct dma_slave_config slave_config; | ||
32 | |||
33 | dma_cap_zero(mask); | ||
34 | dma_cap_set(info->cap, mask); | ||
35 | |||
36 | chan = dma_request_channel(mask, pl330_filter, (void *)dma_ch); | ||
37 | |||
38 | if (info->direction == DMA_FROM_DEVICE) { | ||
39 | memset(&slave_config, 0, sizeof(struct dma_slave_config)); | ||
40 | slave_config.direction = info->direction; | ||
41 | slave_config.src_addr = info->fifo; | ||
42 | slave_config.src_addr_width = info->width; | ||
43 | slave_config.src_maxburst = 1; | ||
44 | dmaengine_slave_config(chan, &slave_config); | ||
45 | } else if (info->direction == DMA_TO_DEVICE) { | ||
46 | memset(&slave_config, 0, sizeof(struct dma_slave_config)); | ||
47 | slave_config.direction = info->direction; | ||
48 | slave_config.dst_addr = info->fifo; | ||
49 | slave_config.dst_addr_width = info->width; | ||
50 | slave_config.dst_maxburst = 1; | ||
51 | dmaengine_slave_config(chan, &slave_config); | ||
52 | } | ||
53 | |||
54 | return (unsigned)chan; | ||
55 | } | ||
56 | |||
57 | static int samsung_dmadev_release(unsigned ch, | ||
58 | struct s3c2410_dma_client *client) | ||
59 | { | ||
60 | dma_release_channel((struct dma_chan *)ch); | ||
61 | |||
62 | return 0; | ||
63 | } | ||
64 | |||
65 | static int samsung_dmadev_prepare(unsigned ch, | ||
66 | struct samsung_dma_prep_info *info) | ||
67 | { | ||
68 | struct scatterlist sg; | ||
69 | struct dma_chan *chan = (struct dma_chan *)ch; | ||
70 | struct dma_async_tx_descriptor *desc; | ||
71 | |||
72 | switch (info->cap) { | ||
73 | case DMA_SLAVE: | ||
74 | sg_init_table(&sg, 1); | ||
75 | sg_dma_len(&sg) = info->len; | ||
76 | sg_set_page(&sg, pfn_to_page(PFN_DOWN(info->buf)), | ||
77 | info->len, offset_in_page(info->buf)); | ||
78 | sg_dma_address(&sg) = info->buf; | ||
79 | |||
80 | desc = chan->device->device_prep_slave_sg(chan, | ||
81 | &sg, 1, info->direction, DMA_PREP_INTERRUPT); | ||
82 | break; | ||
83 | case DMA_CYCLIC: | ||
84 | desc = chan->device->device_prep_dma_cyclic(chan, | ||
85 | info->buf, info->len, info->period, info->direction); | ||
86 | break; | ||
87 | default: | ||
88 | dev_err(&chan->dev->device, "unsupported format\n"); | ||
89 | return -EFAULT; | ||
90 | } | ||
91 | |||
92 | if (!desc) { | ||
93 | dev_err(&chan->dev->device, "cannot prepare cyclic dma\n"); | ||
94 | return -EFAULT; | ||
95 | } | ||
96 | |||
97 | desc->callback = info->fp; | ||
98 | desc->callback_param = info->fp_param; | ||
99 | |||
100 | dmaengine_submit((struct dma_async_tx_descriptor *)desc); | ||
101 | |||
102 | return 0; | ||
103 | } | ||
104 | |||
105 | static inline int samsung_dmadev_trigger(unsigned ch) | ||
106 | { | ||
107 | dma_async_issue_pending((struct dma_chan *)ch); | ||
108 | |||
109 | return 0; | ||
110 | } | ||
111 | |||
112 | static inline int samsung_dmadev_flush(unsigned ch) | ||
113 | { | ||
114 | return dmaengine_terminate_all((struct dma_chan *)ch); | ||
115 | } | ||
116 | |||
117 | struct samsung_dma_ops dmadev_ops = { | ||
118 | .request = samsung_dmadev_request, | ||
119 | .release = samsung_dmadev_release, | ||
120 | .prepare = samsung_dmadev_prepare, | ||
121 | .trigger = samsung_dmadev_trigger, | ||
122 | .started = NULL, | ||
123 | .flush = samsung_dmadev_flush, | ||
124 | .stop = samsung_dmadev_flush, | ||
125 | }; | ||
126 | |||
127 | void *samsung_dmadev_get_ops(void) | ||
128 | { | ||
129 | return &dmadev_ops; | ||
130 | } | ||
131 | EXPORT_SYMBOL(samsung_dmadev_get_ops); | ||
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c deleted file mode 100644 index 1c0b0401594..00000000000 --- a/arch/arm/plat-samsung/gpio-config.c +++ /dev/null | |||
@@ -1,431 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c/gpio-config.c | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008-2010 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C series GPIO configuration core | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/module.h> | ||
17 | #include <linux/gpio.h> | ||
18 | #include <linux/io.h> | ||
19 | |||
20 | #include <plat/gpio-core.h> | ||
21 | #include <plat/gpio-cfg.h> | ||
22 | #include <plat/gpio-cfg-helpers.h> | ||
23 | |||
24 | int s3c_gpio_cfgpin(unsigned int pin, unsigned int config) | ||
25 | { | ||
26 | struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | ||
27 | unsigned long flags; | ||
28 | int offset; | ||
29 | int ret; | ||
30 | |||
31 | if (!chip) | ||
32 | return -EINVAL; | ||
33 | |||
34 | offset = pin - chip->chip.base; | ||
35 | |||
36 | s3c_gpio_lock(chip, flags); | ||
37 | ret = s3c_gpio_do_setcfg(chip, offset, config); | ||
38 | s3c_gpio_unlock(chip, flags); | ||
39 | |||
40 | return ret; | ||
41 | } | ||
42 | EXPORT_SYMBOL(s3c_gpio_cfgpin); | ||
43 | |||
44 | int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr, | ||
45 | unsigned int cfg) | ||
46 | { | ||
47 | int ret; | ||
48 | |||
49 | for (; nr > 0; nr--, start++) { | ||
50 | ret = s3c_gpio_cfgpin(start, cfg); | ||
51 | if (ret != 0) | ||
52 | return ret; | ||
53 | } | ||
54 | |||
55 | return 0; | ||
56 | } | ||
57 | EXPORT_SYMBOL_GPL(s3c_gpio_cfgpin_range); | ||
58 | |||
59 | int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr, | ||
60 | unsigned int cfg, s3c_gpio_pull_t pull) | ||
61 | { | ||
62 | int ret; | ||
63 | |||
64 | for (; nr > 0; nr--, start++) { | ||
65 | s3c_gpio_setpull(start, pull); | ||
66 | ret = s3c_gpio_cfgpin(start, cfg); | ||
67 | if (ret != 0) | ||
68 | return ret; | ||
69 | } | ||
70 | |||
71 | return 0; | ||
72 | } | ||
73 | EXPORT_SYMBOL_GPL(s3c_gpio_cfgall_range); | ||
74 | |||
75 | unsigned s3c_gpio_getcfg(unsigned int pin) | ||
76 | { | ||
77 | struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | ||
78 | unsigned long flags; | ||
79 | unsigned ret = 0; | ||
80 | int offset; | ||
81 | |||
82 | if (chip) { | ||
83 | offset = pin - chip->chip.base; | ||
84 | |||
85 | s3c_gpio_lock(chip, flags); | ||
86 | ret = s3c_gpio_do_getcfg(chip, offset); | ||
87 | s3c_gpio_unlock(chip, flags); | ||
88 | } | ||
89 | |||
90 | return ret; | ||
91 | } | ||
92 | EXPORT_SYMBOL(s3c_gpio_getcfg); | ||
93 | |||
94 | |||
95 | int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull) | ||
96 | { | ||
97 | struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | ||
98 | unsigned long flags; | ||
99 | int offset, ret; | ||
100 | |||
101 | if (!chip) | ||
102 | return -EINVAL; | ||
103 | |||
104 | offset = pin - chip->chip.base; | ||
105 | |||
106 | s3c_gpio_lock(chip, flags); | ||
107 | ret = s3c_gpio_do_setpull(chip, offset, pull); | ||
108 | s3c_gpio_unlock(chip, flags); | ||
109 | |||
110 | return ret; | ||
111 | } | ||
112 | EXPORT_SYMBOL(s3c_gpio_setpull); | ||
113 | |||
114 | s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin) | ||
115 | { | ||
116 | struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | ||
117 | unsigned long flags; | ||
118 | int offset; | ||
119 | u32 pup = 0; | ||
120 | |||
121 | if (chip) { | ||
122 | offset = pin - chip->chip.base; | ||
123 | |||
124 | s3c_gpio_lock(chip, flags); | ||
125 | pup = s3c_gpio_do_getpull(chip, offset); | ||
126 | s3c_gpio_unlock(chip, flags); | ||
127 | } | ||
128 | |||
129 | return (__force s3c_gpio_pull_t)pup; | ||
130 | } | ||
131 | EXPORT_SYMBOL(s3c_gpio_getpull); | ||
132 | |||
133 | #ifdef CONFIG_S3C_GPIO_CFG_S3C24XX | ||
134 | int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip, | ||
135 | unsigned int off, unsigned int cfg) | ||
136 | { | ||
137 | void __iomem *reg = chip->base; | ||
138 | unsigned int shift = off; | ||
139 | u32 con; | ||
140 | |||
141 | if (s3c_gpio_is_cfg_special(cfg)) { | ||
142 | cfg &= 0xf; | ||
143 | |||
144 | /* Map output to 0, and SFN2 to 1 */ | ||
145 | cfg -= 1; | ||
146 | if (cfg > 1) | ||
147 | return -EINVAL; | ||
148 | |||
149 | cfg <<= shift; | ||
150 | } | ||
151 | |||
152 | con = __raw_readl(reg); | ||
153 | con &= ~(0x1 << shift); | ||
154 | con |= cfg; | ||
155 | __raw_writel(con, reg); | ||
156 | |||
157 | return 0; | ||
158 | } | ||
159 | |||
160 | unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip, | ||
161 | unsigned int off) | ||
162 | { | ||
163 | u32 con; | ||
164 | |||
165 | con = __raw_readl(chip->base); | ||
166 | con >>= off; | ||
167 | con &= 1; | ||
168 | con++; | ||
169 | |||
170 | return S3C_GPIO_SFN(con); | ||
171 | } | ||
172 | |||
173 | int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip, | ||
174 | unsigned int off, unsigned int cfg) | ||
175 | { | ||
176 | void __iomem *reg = chip->base; | ||
177 | unsigned int shift = off * 2; | ||
178 | u32 con; | ||
179 | |||
180 | if (s3c_gpio_is_cfg_special(cfg)) { | ||
181 | cfg &= 0xf; | ||
182 | if (cfg > 3) | ||
183 | return -EINVAL; | ||
184 | |||
185 | cfg <<= shift; | ||
186 | } | ||
187 | |||
188 | con = __raw_readl(reg); | ||
189 | con &= ~(0x3 << shift); | ||
190 | con |= cfg; | ||
191 | __raw_writel(con, reg); | ||
192 | |||
193 | return 0; | ||
194 | } | ||
195 | |||
196 | unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip, | ||
197 | unsigned int off) | ||
198 | { | ||
199 | u32 con; | ||
200 | |||
201 | con = __raw_readl(chip->base); | ||
202 | con >>= off * 2; | ||
203 | con &= 3; | ||
204 | |||
205 | /* this conversion works for IN and OUT as well as special mode */ | ||
206 | return S3C_GPIO_SPECIAL(con); | ||
207 | } | ||
208 | #endif | ||
209 | |||
210 | #ifdef CONFIG_S3C_GPIO_CFG_S3C64XX | ||
211 | int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, | ||
212 | unsigned int off, unsigned int cfg) | ||
213 | { | ||
214 | void __iomem *reg = chip->base; | ||
215 | unsigned int shift = (off & 7) * 4; | ||
216 | u32 con; | ||
217 | |||
218 | if (off < 8 && chip->chip.ngpio > 8) | ||
219 | reg -= 4; | ||
220 | |||
221 | if (s3c_gpio_is_cfg_special(cfg)) { | ||
222 | cfg &= 0xf; | ||
223 | cfg <<= shift; | ||
224 | } | ||
225 | |||
226 | con = __raw_readl(reg); | ||
227 | con &= ~(0xf << shift); | ||
228 | con |= cfg; | ||
229 | __raw_writel(con, reg); | ||
230 | |||
231 | return 0; | ||
232 | } | ||
233 | |||
234 | unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, | ||
235 | unsigned int off) | ||
236 | { | ||
237 | void __iomem *reg = chip->base; | ||
238 | unsigned int shift = (off & 7) * 4; | ||
239 | u32 con; | ||
240 | |||
241 | if (off < 8 && chip->chip.ngpio > 8) | ||
242 | reg -= 4; | ||
243 | |||
244 | con = __raw_readl(reg); | ||
245 | con >>= shift; | ||
246 | con &= 0xf; | ||
247 | |||
248 | /* this conversion works for IN and OUT as well as special mode */ | ||
249 | return S3C_GPIO_SPECIAL(con); | ||
250 | } | ||
251 | |||
252 | #endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */ | ||
253 | |||
254 | #ifdef CONFIG_S3C_GPIO_PULL_UPDOWN | ||
255 | int s3c_gpio_setpull_updown(struct s3c_gpio_chip *chip, | ||
256 | unsigned int off, s3c_gpio_pull_t pull) | ||
257 | { | ||
258 | void __iomem *reg = chip->base + 0x08; | ||
259 | int shift = off * 2; | ||
260 | u32 pup; | ||
261 | |||
262 | pup = __raw_readl(reg); | ||
263 | pup &= ~(3 << shift); | ||
264 | pup |= pull << shift; | ||
265 | __raw_writel(pup, reg); | ||
266 | |||
267 | return 0; | ||
268 | } | ||
269 | |||
270 | s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip, | ||
271 | unsigned int off) | ||
272 | { | ||
273 | void __iomem *reg = chip->base + 0x08; | ||
274 | int shift = off * 2; | ||
275 | u32 pup = __raw_readl(reg); | ||
276 | |||
277 | pup >>= shift; | ||
278 | pup &= 0x3; | ||
279 | return (__force s3c_gpio_pull_t)pup; | ||
280 | } | ||
281 | |||
282 | #ifdef CONFIG_S3C_GPIO_PULL_S3C2443 | ||
283 | int s3c_gpio_setpull_s3c2443(struct s3c_gpio_chip *chip, | ||
284 | unsigned int off, s3c_gpio_pull_t pull) | ||
285 | { | ||
286 | switch (pull) { | ||
287 | case S3C_GPIO_PULL_NONE: | ||
288 | pull = 0x01; | ||
289 | break; | ||
290 | case S3C_GPIO_PULL_UP: | ||
291 | pull = 0x00; | ||
292 | break; | ||
293 | case S3C_GPIO_PULL_DOWN: | ||
294 | pull = 0x02; | ||
295 | break; | ||
296 | } | ||
297 | return s3c_gpio_setpull_updown(chip, off, pull); | ||
298 | } | ||
299 | |||
300 | s3c_gpio_pull_t s3c_gpio_getpull_s3c2443(struct s3c_gpio_chip *chip, | ||
301 | unsigned int off) | ||
302 | { | ||
303 | s3c_gpio_pull_t pull; | ||
304 | |||
305 | pull = s3c_gpio_getpull_updown(chip, off); | ||
306 | |||
307 | switch (pull) { | ||
308 | case 0x00: | ||
309 | pull = S3C_GPIO_PULL_UP; | ||
310 | break; | ||
311 | case 0x01: | ||
312 | case 0x03: | ||
313 | pull = S3C_GPIO_PULL_NONE; | ||
314 | break; | ||
315 | case 0x02: | ||
316 | pull = S3C_GPIO_PULL_DOWN; | ||
317 | break; | ||
318 | } | ||
319 | |||
320 | return pull; | ||
321 | } | ||
322 | #endif | ||
323 | #endif | ||
324 | |||
325 | #if defined(CONFIG_S3C_GPIO_PULL_UP) || defined(CONFIG_S3C_GPIO_PULL_DOWN) | ||
326 | static int s3c_gpio_setpull_1(struct s3c_gpio_chip *chip, | ||
327 | unsigned int off, s3c_gpio_pull_t pull, | ||
328 | s3c_gpio_pull_t updown) | ||
329 | { | ||
330 | void __iomem *reg = chip->base + 0x08; | ||
331 | u32 pup = __raw_readl(reg); | ||
332 | |||
333 | if (pull == updown) | ||
334 | pup &= ~(1 << off); | ||
335 | else if (pull == S3C_GPIO_PULL_NONE) | ||
336 | pup |= (1 << off); | ||
337 | else | ||
338 | return -EINVAL; | ||
339 | |||
340 | __raw_writel(pup, reg); | ||
341 | return 0; | ||
342 | } | ||
343 | |||
344 | static s3c_gpio_pull_t s3c_gpio_getpull_1(struct s3c_gpio_chip *chip, | ||
345 | unsigned int off, s3c_gpio_pull_t updown) | ||
346 | { | ||
347 | void __iomem *reg = chip->base + 0x08; | ||
348 | u32 pup = __raw_readl(reg); | ||
349 | |||
350 | pup &= (1 << off); | ||
351 | return pup ? S3C_GPIO_PULL_NONE : updown; | ||
352 | } | ||
353 | #endif /* CONFIG_S3C_GPIO_PULL_UP || CONFIG_S3C_GPIO_PULL_DOWN */ | ||
354 | |||
355 | #ifdef CONFIG_S3C_GPIO_PULL_UP | ||
356 | s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip, | ||
357 | unsigned int off) | ||
358 | { | ||
359 | return s3c_gpio_getpull_1(chip, off, S3C_GPIO_PULL_UP); | ||
360 | } | ||
361 | |||
362 | int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip, | ||
363 | unsigned int off, s3c_gpio_pull_t pull) | ||
364 | { | ||
365 | return s3c_gpio_setpull_1(chip, off, pull, S3C_GPIO_PULL_UP); | ||
366 | } | ||
367 | #endif /* CONFIG_S3C_GPIO_PULL_UP */ | ||
368 | |||
369 | #ifdef CONFIG_S3C_GPIO_PULL_DOWN | ||
370 | s3c_gpio_pull_t s3c_gpio_getpull_1down(struct s3c_gpio_chip *chip, | ||
371 | unsigned int off) | ||
372 | { | ||
373 | return s3c_gpio_getpull_1(chip, off, S3C_GPIO_PULL_DOWN); | ||
374 | } | ||
375 | |||
376 | int s3c_gpio_setpull_1down(struct s3c_gpio_chip *chip, | ||
377 | unsigned int off, s3c_gpio_pull_t pull) | ||
378 | { | ||
379 | return s3c_gpio_setpull_1(chip, off, pull, S3C_GPIO_PULL_DOWN); | ||
380 | } | ||
381 | #endif /* CONFIG_S3C_GPIO_PULL_DOWN */ | ||
382 | |||
383 | #ifdef CONFIG_S5P_GPIO_DRVSTR | ||
384 | s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin) | ||
385 | { | ||
386 | struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | ||
387 | unsigned int off; | ||
388 | void __iomem *reg; | ||
389 | int shift; | ||
390 | u32 drvstr; | ||
391 | |||
392 | if (!chip) | ||
393 | return -EINVAL; | ||
394 | |||
395 | off = pin - chip->chip.base; | ||
396 | shift = off * 2; | ||
397 | reg = chip->base + 0x0C; | ||
398 | |||
399 | drvstr = __raw_readl(reg); | ||
400 | drvstr = drvstr >> shift; | ||
401 | drvstr &= 0x3; | ||
402 | |||
403 | return (__force s5p_gpio_drvstr_t)drvstr; | ||
404 | } | ||
405 | EXPORT_SYMBOL(s5p_gpio_get_drvstr); | ||
406 | |||
407 | int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr) | ||
408 | { | ||
409 | struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | ||
410 | unsigned int off; | ||
411 | void __iomem *reg; | ||
412 | int shift; | ||
413 | u32 tmp; | ||
414 | |||
415 | if (!chip) | ||
416 | return -EINVAL; | ||
417 | |||
418 | off = pin - chip->chip.base; | ||
419 | shift = off * 2; | ||
420 | reg = chip->base + 0x0C; | ||
421 | |||
422 | tmp = __raw_readl(reg); | ||
423 | tmp &= ~(0x3 << shift); | ||
424 | tmp |= drvstr << shift; | ||
425 | |||
426 | __raw_writel(tmp, reg); | ||
427 | |||
428 | return 0; | ||
429 | } | ||
430 | EXPORT_SYMBOL(s5p_gpio_set_drvstr); | ||
431 | #endif /* CONFIG_S5P_GPIO_DRVSTR */ | ||
diff --git a/arch/arm/plat-samsung/gpio.c b/arch/arm/plat-samsung/gpio.c deleted file mode 100644 index 7743c4b8b2f..00000000000 --- a/arch/arm/plat-samsung/gpio.c +++ /dev/null | |||
@@ -1,167 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c/gpio.c | ||
2 | * | ||
3 | * Copyright 2008 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * S3C series GPIO core | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/io.h> | ||
17 | #include <linux/gpio.h> | ||
18 | #include <linux/spinlock.h> | ||
19 | |||
20 | #include <plat/gpio-core.h> | ||
21 | |||
22 | #ifdef CONFIG_S3C_GPIO_TRACK | ||
23 | struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END]; | ||
24 | |||
25 | static __init void s3c_gpiolib_track(struct s3c_gpio_chip *chip) | ||
26 | { | ||
27 | unsigned int gpn; | ||
28 | int i; | ||
29 | |||
30 | gpn = chip->chip.base; | ||
31 | for (i = 0; i < chip->chip.ngpio; i++, gpn++) { | ||
32 | BUG_ON(gpn >= ARRAY_SIZE(s3c_gpios)); | ||
33 | s3c_gpios[gpn] = chip; | ||
34 | } | ||
35 | } | ||
36 | #endif /* CONFIG_S3C_GPIO_TRACK */ | ||
37 | |||
38 | /* Default routines for controlling GPIO, based on the original S3C24XX | ||
39 | * GPIO functions which deal with the case where each gpio bank of the | ||
40 | * chip is as following: | ||
41 | * | ||
42 | * base + 0x00: Control register, 2 bits per gpio | ||
43 | * gpio n: 2 bits starting at (2*n) | ||
44 | * 00 = input, 01 = output, others mean special-function | ||
45 | * base + 0x04: Data register, 1 bit per gpio | ||
46 | * bit n: data bit n | ||
47 | */ | ||
48 | |||
49 | static int s3c_gpiolib_input(struct gpio_chip *chip, unsigned offset) | ||
50 | { | ||
51 | struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); | ||
52 | void __iomem *base = ourchip->base; | ||
53 | unsigned long flags; | ||
54 | unsigned long con; | ||
55 | |||
56 | s3c_gpio_lock(ourchip, flags); | ||
57 | |||
58 | con = __raw_readl(base + 0x00); | ||
59 | con &= ~(3 << (offset * 2)); | ||
60 | |||
61 | __raw_writel(con, base + 0x00); | ||
62 | |||
63 | s3c_gpio_unlock(ourchip, flags); | ||
64 | return 0; | ||
65 | } | ||
66 | |||
67 | static int s3c_gpiolib_output(struct gpio_chip *chip, | ||
68 | unsigned offset, int value) | ||
69 | { | ||
70 | struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); | ||
71 | void __iomem *base = ourchip->base; | ||
72 | unsigned long flags; | ||
73 | unsigned long dat; | ||
74 | unsigned long con; | ||
75 | |||
76 | s3c_gpio_lock(ourchip, flags); | ||
77 | |||
78 | dat = __raw_readl(base + 0x04); | ||
79 | dat &= ~(1 << offset); | ||
80 | if (value) | ||
81 | dat |= 1 << offset; | ||
82 | __raw_writel(dat, base + 0x04); | ||
83 | |||
84 | con = __raw_readl(base + 0x00); | ||
85 | con &= ~(3 << (offset * 2)); | ||
86 | con |= 1 << (offset * 2); | ||
87 | |||
88 | __raw_writel(con, base + 0x00); | ||
89 | __raw_writel(dat, base + 0x04); | ||
90 | |||
91 | s3c_gpio_unlock(ourchip, flags); | ||
92 | return 0; | ||
93 | } | ||
94 | |||
95 | static void s3c_gpiolib_set(struct gpio_chip *chip, | ||
96 | unsigned offset, int value) | ||
97 | { | ||
98 | struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); | ||
99 | void __iomem *base = ourchip->base; | ||
100 | unsigned long flags; | ||
101 | unsigned long dat; | ||
102 | |||
103 | s3c_gpio_lock(ourchip, flags); | ||
104 | |||
105 | dat = __raw_readl(base + 0x04); | ||
106 | dat &= ~(1 << offset); | ||
107 | if (value) | ||
108 | dat |= 1 << offset; | ||
109 | __raw_writel(dat, base + 0x04); | ||
110 | |||
111 | s3c_gpio_unlock(ourchip, flags); | ||
112 | } | ||
113 | |||
114 | static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset) | ||
115 | { | ||
116 | struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); | ||
117 | unsigned long val; | ||
118 | |||
119 | val = __raw_readl(ourchip->base + 0x04); | ||
120 | val >>= offset; | ||
121 | val &= 1; | ||
122 | |||
123 | return val; | ||
124 | } | ||
125 | |||
126 | __init void s3c_gpiolib_add(struct s3c_gpio_chip *chip) | ||
127 | { | ||
128 | struct gpio_chip *gc = &chip->chip; | ||
129 | int ret; | ||
130 | |||
131 | BUG_ON(!chip->base); | ||
132 | BUG_ON(!gc->label); | ||
133 | BUG_ON(!gc->ngpio); | ||
134 | |||
135 | spin_lock_init(&chip->lock); | ||
136 | |||
137 | if (!gc->direction_input) | ||
138 | gc->direction_input = s3c_gpiolib_input; | ||
139 | if (!gc->direction_output) | ||
140 | gc->direction_output = s3c_gpiolib_output; | ||
141 | if (!gc->set) | ||
142 | gc->set = s3c_gpiolib_set; | ||
143 | if (!gc->get) | ||
144 | gc->get = s3c_gpiolib_get; | ||
145 | |||
146 | #ifdef CONFIG_PM | ||
147 | if (chip->pm != NULL) { | ||
148 | if (!chip->pm->save || !chip->pm->resume) | ||
149 | printk(KERN_ERR "gpio: %s has missing PM functions\n", | ||
150 | gc->label); | ||
151 | } else | ||
152 | printk(KERN_ERR "gpio: %s has no PM function\n", gc->label); | ||
153 | #endif | ||
154 | |||
155 | /* gpiochip_add() prints own failure message on error. */ | ||
156 | ret = gpiochip_add(gc); | ||
157 | if (ret >= 0) | ||
158 | s3c_gpiolib_track(chip); | ||
159 | } | ||
160 | |||
161 | int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) | ||
162 | { | ||
163 | struct s3c_gpio_chip *s3c_chip = container_of(chip, | ||
164 | struct s3c_gpio_chip, chip); | ||
165 | |||
166 | return s3c_chip->irq_base + offset; | ||
167 | } | ||
diff --git a/arch/arm/plat-samsung/include/plat/adc-core.h b/arch/arm/plat-samsung/include/plat/adc-core.h index a281568d585..a927bee5535 100644 --- a/arch/arm/plat-samsung/include/plat/adc-core.h +++ b/arch/arm/plat-samsung/include/plat/adc-core.h | |||
@@ -20,7 +20,7 @@ | |||
20 | /* re-define device name depending on support. */ | 20 | /* re-define device name depending on support. */ |
21 | static inline void s3c_adc_setname(char *name) | 21 | static inline void s3c_adc_setname(char *name) |
22 | { | 22 | { |
23 | #ifdef CONFIG_SAMSUNG_DEV_ADC | 23 | #if defined(CONFIG_SAMSUNG_DEV_ADC) || defined(CONFIG_PLAT_S3C24XX) |
24 | s3c_device_adc.name = name; | 24 | s3c_device_adc.name = name; |
25 | #endif | 25 | #endif |
26 | } | 26 | } |
diff --git a/arch/arm/plat-s3c24xx/include/plat/audio-simtec.h b/arch/arm/plat-samsung/include/plat/audio-simtec.h index de5e88fdcb3..5345364e742 100644 --- a/arch/arm/plat-s3c24xx/include/plat/audio-simtec.h +++ b/arch/arm/plat-samsung/include/plat/audio-simtec.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* arch/arm/plat-s3c24xx/include/plat/audio-simtec.h | 1 | /* arch/arm/plat-samsung/include/plat/audio-simtec.h |
2 | * | 2 | * |
3 | * Copyright 2008 Simtec Electronics | 3 | * Copyright 2008 Simtec Electronics |
4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
diff --git a/arch/arm/plat-s5p/include/plat/camport.h b/arch/arm/plat-samsung/include/plat/camport.h index 71688c8ba28..a5708bf84b3 100644 --- a/arch/arm/plat-s5p/include/plat/camport.h +++ b/arch/arm/plat-samsung/include/plat/camport.h | |||
@@ -8,8 +8,8 @@ | |||
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #ifndef PLAT_S5P_CAMPORT_H_ | 11 | #ifndef __PLAT_SAMSUNG_CAMPORT_H_ |
12 | #define PLAT_S5P_CAMPORT_H_ __FILE__ | 12 | #define __PLAT_SAMSUNG_CAMPORT_H_ __FILE__ |
13 | 13 | ||
14 | enum s5p_camport_id { | 14 | enum s5p_camport_id { |
15 | S5P_CAMPORT_A, | 15 | S5P_CAMPORT_A, |
@@ -25,4 +25,4 @@ enum s5p_camport_id { | |||
25 | int s5pv210_fimc_setup_gpio(enum s5p_camport_id id); | 25 | int s5pv210_fimc_setup_gpio(enum s5p_camport_id id); |
26 | int exynos4_fimc_setup_gpio(enum s5p_camport_id id); | 26 | int exynos4_fimc_setup_gpio(enum s5p_camport_id id); |
27 | 27 | ||
28 | #endif | 28 | #endif /* __PLAT_SAMSUNG_CAMPORT_H */ |
diff --git a/arch/arm/plat-s3c24xx/include/plat/common-smdk.h b/arch/arm/plat-samsung/include/plat/common-smdk.h index 58d9094c935..ba028f1ed30 100644 --- a/arch/arm/plat-s3c24xx/include/plat/common-smdk.h +++ b/arch/arm/plat-samsung/include/plat/common-smdk.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/common-smdk.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/common-smdk.h |
2 | * | 2 | * |
3 | * Copyright (c) 2006 Simtec Electronics | 3 | * Copyright (c) 2006 Simtec Electronics |
4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h index d623235ae96..dac4760c0f0 100644 --- a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h +++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* arch/arm/plat-s3c/include/plat/cpu-freq.h | 1 | /* arch/arm/plat-samsung/include/plat/cpu-freq-core.h |
2 | * | 2 | * |
3 | * Copyright (c) 2006-2009 Simtec Electronics | 3 | * Copyright (c) 2006-2009 Simtec Electronics |
4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
@@ -195,7 +195,8 @@ struct s3c_cpufreq_info { | |||
195 | 195 | ||
196 | extern int s3c_cpufreq_register(struct s3c_cpufreq_info *info); | 196 | extern int s3c_cpufreq_register(struct s3c_cpufreq_info *info); |
197 | 197 | ||
198 | extern int s3c_plltab_register(struct cpufreq_frequency_table *plls, unsigned int plls_no); | 198 | extern int s3c_plltab_register(struct cpufreq_frequency_table *plls, |
199 | unsigned int plls_no); | ||
199 | 200 | ||
200 | /* exports and utilities for debugfs */ | 201 | /* exports and utilities for debugfs */ |
201 | extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void); | 202 | extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void); |
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index 54f370f0fc0..40fd7b6b5e6 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h | |||
@@ -25,7 +25,6 @@ extern unsigned long samsung_cpu_id; | |||
25 | 25 | ||
26 | #define S3C6400_CPU_ID 0x36400000 | 26 | #define S3C6400_CPU_ID 0x36400000 |
27 | #define S3C6410_CPU_ID 0x36410000 | 27 | #define S3C6410_CPU_ID 0x36410000 |
28 | #define S3C64XX_CPU_ID (S3C6400_CPU_ID & S3C6410_CPU_ID) | ||
29 | #define S3C64XX_CPU_MASK 0xFFFFF000 | 28 | #define S3C64XX_CPU_MASK 0xFFFFF000 |
30 | 29 | ||
31 | #define S5P6440_CPU_ID 0x56440000 | 30 | #define S5P6440_CPU_ID 0x56440000 |
@@ -50,7 +49,8 @@ static inline int is_samsung_##name(void) \ | |||
50 | } | 49 | } |
51 | 50 | ||
52 | IS_SAMSUNG_CPU(s3c24xx, S3C24XX_CPU_ID, S3C24XX_CPU_MASK) | 51 | IS_SAMSUNG_CPU(s3c24xx, S3C24XX_CPU_ID, S3C24XX_CPU_MASK) |
53 | IS_SAMSUNG_CPU(s3c64xx, S3C64XX_CPU_ID, S3C64XX_CPU_MASK) | 52 | IS_SAMSUNG_CPU(s3c6400, S3C6400_CPU_ID, S3C64XX_CPU_MASK) |
53 | IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK) | ||
54 | IS_SAMSUNG_CPU(s5p6440, S5P6440_CPU_ID, S5P64XX_CPU_MASK) | 54 | IS_SAMSUNG_CPU(s5p6440, S5P6440_CPU_ID, S5P64XX_CPU_MASK) |
55 | IS_SAMSUNG_CPU(s5p6450, S5P6450_CPU_ID, S5P64XX_CPU_MASK) | 55 | IS_SAMSUNG_CPU(s5p6450, S5P6450_CPU_ID, S5P64XX_CPU_MASK) |
56 | IS_SAMSUNG_CPU(s5pc100, S5PC100_CPU_ID, S5PC100_CPU_MASK) | 56 | IS_SAMSUNG_CPU(s5pc100, S5PC100_CPU_ID, S5PC100_CPU_MASK) |
@@ -69,7 +69,7 @@ IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK) | |||
69 | #endif | 69 | #endif |
70 | 70 | ||
71 | #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) | 71 | #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) |
72 | # define soc_is_s3c64xx() is_samsung_s3c64xx() | 72 | # define soc_is_s3c64xx() (is_samsung_s3c6400() || is_samsung_s3c6410()) |
73 | #else | 73 | #else |
74 | # define soc_is_s3c64xx() 0 | 74 | # define soc_is_s3c64xx() 0 |
75 | #endif | 75 | #endif |
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index 24ebb1e1de4..ab633c9c2ae 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
@@ -30,30 +30,24 @@ extern struct s3c24xx_uart_resources s5p_uart_resources[]; | |||
30 | extern struct platform_device *s3c24xx_uart_devs[]; | 30 | extern struct platform_device *s3c24xx_uart_devs[]; |
31 | extern struct platform_device *s3c24xx_uart_src[]; | 31 | extern struct platform_device *s3c24xx_uart_src[]; |
32 | 32 | ||
33 | extern struct platform_device s3c_device_timer[]; | 33 | extern struct platform_device s3c64xx_device_ac97; |
34 | |||
35 | extern struct platform_device s3c64xx_device_iis0; | 34 | extern struct platform_device s3c64xx_device_iis0; |
36 | extern struct platform_device s3c64xx_device_iis1; | 35 | extern struct platform_device s3c64xx_device_iis1; |
37 | extern struct platform_device s3c64xx_device_iisv4; | 36 | extern struct platform_device s3c64xx_device_iisv4; |
38 | 37 | extern struct platform_device s3c64xx_device_onenand1; | |
39 | extern struct platform_device s3c64xx_device_spi0; | ||
40 | extern struct platform_device s3c64xx_device_spi1; | ||
41 | |||
42 | extern struct platform_device samsung_asoc_dma; | ||
43 | extern struct platform_device samsung_asoc_idma; | ||
44 | |||
45 | extern struct platform_device s3c64xx_device_pcm0; | 38 | extern struct platform_device s3c64xx_device_pcm0; |
46 | extern struct platform_device s3c64xx_device_pcm1; | 39 | extern struct platform_device s3c64xx_device_pcm1; |
40 | extern struct platform_device s3c64xx_device_spi0; | ||
41 | extern struct platform_device s3c64xx_device_spi1; | ||
47 | 42 | ||
48 | extern struct platform_device s3c64xx_device_ac97; | 43 | extern struct platform_device s3c_device_adc; |
49 | 44 | extern struct platform_device s3c_device_cfcon; | |
50 | extern struct platform_device s3c_device_ts; | ||
51 | |||
52 | extern struct platform_device s3c_device_fb; | 45 | extern struct platform_device s3c_device_fb; |
53 | extern struct platform_device s5p_device_fimd0; | 46 | extern struct platform_device s3c_device_hwmon; |
54 | extern struct platform_device s3c_device_ohci; | 47 | extern struct platform_device s3c_device_hsmmc0; |
55 | extern struct platform_device s3c_device_lcd; | 48 | extern struct platform_device s3c_device_hsmmc1; |
56 | extern struct platform_device s3c_device_wdt; | 49 | extern struct platform_device s3c_device_hsmmc2; |
50 | extern struct platform_device s3c_device_hsmmc3; | ||
57 | extern struct platform_device s3c_device_i2c0; | 51 | extern struct platform_device s3c_device_i2c0; |
58 | extern struct platform_device s3c_device_i2c1; | 52 | extern struct platform_device s3c_device_i2c1; |
59 | extern struct platform_device s3c_device_i2c2; | 53 | extern struct platform_device s3c_device_i2c2; |
@@ -62,93 +56,90 @@ extern struct platform_device s3c_device_i2c4; | |||
62 | extern struct platform_device s3c_device_i2c5; | 56 | extern struct platform_device s3c_device_i2c5; |
63 | extern struct platform_device s3c_device_i2c6; | 57 | extern struct platform_device s3c_device_i2c6; |
64 | extern struct platform_device s3c_device_i2c7; | 58 | extern struct platform_device s3c_device_i2c7; |
59 | extern struct platform_device s3c_device_iis; | ||
60 | extern struct platform_device s3c_device_lcd; | ||
61 | extern struct platform_device s3c_device_nand; | ||
62 | extern struct platform_device s3c_device_ohci; | ||
63 | extern struct platform_device s3c_device_onenand; | ||
65 | extern struct platform_device s3c_device_rtc; | 64 | extern struct platform_device s3c_device_rtc; |
66 | extern struct platform_device s3c_device_adc; | ||
67 | extern struct platform_device s3c_device_sdi; | 65 | extern struct platform_device s3c_device_sdi; |
68 | extern struct platform_device s3c_device_iis; | ||
69 | extern struct platform_device s3c_device_hwmon; | ||
70 | extern struct platform_device s3c_device_hsmmc0; | ||
71 | extern struct platform_device s3c_device_hsmmc1; | ||
72 | extern struct platform_device s3c_device_hsmmc2; | ||
73 | extern struct platform_device s3c_device_hsmmc3; | ||
74 | extern struct platform_device s3c_device_cfcon; | ||
75 | |||
76 | extern struct platform_device s3c_device_spi0; | 66 | extern struct platform_device s3c_device_spi0; |
77 | extern struct platform_device s3c_device_spi1; | 67 | extern struct platform_device s3c_device_spi1; |
78 | 68 | extern struct platform_device s3c_device_ts; | |
79 | extern struct platform_device s5pc100_device_spi0; | 69 | extern struct platform_device s3c_device_timer[]; |
80 | extern struct platform_device s5pc100_device_spi1; | ||
81 | extern struct platform_device s5pc100_device_spi2; | ||
82 | extern struct platform_device s5pv210_device_spi0; | ||
83 | extern struct platform_device s5pv210_device_spi1; | ||
84 | extern struct platform_device s5p64x0_device_spi0; | ||
85 | extern struct platform_device s5p64x0_device_spi1; | ||
86 | |||
87 | extern struct platform_device s3c_device_hwmon; | ||
88 | |||
89 | extern struct platform_device s3c_device_nand; | ||
90 | extern struct platform_device s3c_device_onenand; | ||
91 | extern struct platform_device s3c64xx_device_onenand1; | ||
92 | extern struct platform_device s5p_device_onenand; | ||
93 | |||
94 | extern struct platform_device s3c_device_usbgadget; | 70 | extern struct platform_device s3c_device_usbgadget; |
95 | extern struct platform_device s3c_device_usb_hsudc; | ||
96 | extern struct platform_device s3c_device_usb_hsotg; | 71 | extern struct platform_device s3c_device_usb_hsotg; |
72 | extern struct platform_device s3c_device_usb_hsudc; | ||
73 | extern struct platform_device s3c_device_wdt; | ||
97 | 74 | ||
98 | extern struct platform_device s5pv210_device_ac97; | 75 | extern struct platform_device s5p_device_ehci; |
99 | extern struct platform_device s5pv210_device_pcm0; | 76 | extern struct platform_device s5p_device_fimc0; |
100 | extern struct platform_device s5pv210_device_pcm1; | 77 | extern struct platform_device s5p_device_fimc1; |
101 | extern struct platform_device s5pv210_device_pcm2; | 78 | extern struct platform_device s5p_device_fimc2; |
102 | extern struct platform_device s5pv210_device_iis0; | 79 | extern struct platform_device s5p_device_fimc3; |
103 | extern struct platform_device s5pv210_device_iis1; | 80 | extern struct platform_device s5p_device_fimc_md; |
104 | extern struct platform_device s5pv210_device_iis2; | 81 | extern struct platform_device s5p_device_fimd0; |
105 | extern struct platform_device s5pv210_device_spdif; | 82 | extern struct platform_device s5p_device_hdmi; |
106 | 83 | extern struct platform_device s5p_device_i2c_hdmiphy; | |
107 | extern struct platform_device exynos4_device_ac97; | 84 | extern struct platform_device s5p_device_mfc; |
108 | extern struct platform_device exynos4_device_pcm0; | 85 | extern struct platform_device s5p_device_mfc_l; |
109 | extern struct platform_device exynos4_device_pcm1; | 86 | extern struct platform_device s5p_device_mfc_r; |
110 | extern struct platform_device exynos4_device_pcm2; | 87 | extern struct platform_device s5p_device_mipi_csis0; |
111 | extern struct platform_device exynos4_device_i2s0; | 88 | extern struct platform_device s5p_device_mipi_csis1; |
112 | extern struct platform_device exynos4_device_i2s1; | 89 | extern struct platform_device s5p_device_mixer; |
113 | extern struct platform_device exynos4_device_i2s2; | 90 | extern struct platform_device s5p_device_onenand; |
114 | extern struct platform_device exynos4_device_spdif; | 91 | extern struct platform_device s5p_device_sdo; |
115 | extern struct platform_device exynos4_device_pd[]; | ||
116 | extern struct platform_device exynos4_device_ahci; | ||
117 | extern struct platform_device exynos4_device_dwmci; | ||
118 | 92 | ||
119 | extern struct platform_device s5p6440_device_pcm; | ||
120 | extern struct platform_device s5p6440_device_iis; | 93 | extern struct platform_device s5p6440_device_iis; |
94 | extern struct platform_device s5p6440_device_pcm; | ||
121 | 95 | ||
122 | extern struct platform_device s5p6450_device_iis0; | 96 | extern struct platform_device s5p6450_device_iis0; |
123 | extern struct platform_device s5p6450_device_iis1; | 97 | extern struct platform_device s5p6450_device_iis1; |
124 | extern struct platform_device s5p6450_device_iis2; | 98 | extern struct platform_device s5p6450_device_iis2; |
125 | extern struct platform_device s5p6450_device_pcm0; | 99 | extern struct platform_device s5p6450_device_pcm0; |
126 | 100 | ||
101 | extern struct platform_device s5p64x0_device_spi0; | ||
102 | extern struct platform_device s5p64x0_device_spi1; | ||
103 | |||
127 | extern struct platform_device s5pc100_device_ac97; | 104 | extern struct platform_device s5pc100_device_ac97; |
128 | extern struct platform_device s5pc100_device_pcm0; | ||
129 | extern struct platform_device s5pc100_device_pcm1; | ||
130 | extern struct platform_device s5pc100_device_iis0; | 105 | extern struct platform_device s5pc100_device_iis0; |
131 | extern struct platform_device s5pc100_device_iis1; | 106 | extern struct platform_device s5pc100_device_iis1; |
132 | extern struct platform_device s5pc100_device_iis2; | 107 | extern struct platform_device s5pc100_device_iis2; |
108 | extern struct platform_device s5pc100_device_pcm0; | ||
109 | extern struct platform_device s5pc100_device_pcm1; | ||
133 | extern struct platform_device s5pc100_device_spdif; | 110 | extern struct platform_device s5pc100_device_spdif; |
111 | extern struct platform_device s5pc100_device_spi0; | ||
112 | extern struct platform_device s5pc100_device_spi1; | ||
113 | extern struct platform_device s5pc100_device_spi2; | ||
134 | 114 | ||
135 | extern struct platform_device samsung_device_keypad; | 115 | extern struct platform_device s5pv210_device_ac97; |
136 | 116 | extern struct platform_device s5pv210_device_iis0; | |
137 | extern struct platform_device s5p_device_fimc0; | 117 | extern struct platform_device s5pv210_device_iis1; |
138 | extern struct platform_device s5p_device_fimc1; | 118 | extern struct platform_device s5pv210_device_iis2; |
139 | extern struct platform_device s5p_device_fimc2; | 119 | extern struct platform_device s5pv210_device_pcm0; |
140 | extern struct platform_device s5p_device_fimc3; | 120 | extern struct platform_device s5pv210_device_pcm1; |
141 | 121 | extern struct platform_device s5pv210_device_pcm2; | |
142 | extern struct platform_device s5p_device_mfc; | 122 | extern struct platform_device s5pv210_device_spdif; |
143 | extern struct platform_device s5p_device_mfc_l; | 123 | extern struct platform_device s5pv210_device_spi0; |
144 | extern struct platform_device s5p_device_mfc_r; | 124 | extern struct platform_device s5pv210_device_spi1; |
145 | extern struct platform_device s5p_device_mipi_csis0; | ||
146 | extern struct platform_device s5p_device_mipi_csis1; | ||
147 | |||
148 | extern struct platform_device s5p_device_ehci; | ||
149 | 125 | ||
126 | extern struct platform_device exynos4_device_ac97; | ||
127 | extern struct platform_device exynos4_device_ahci; | ||
128 | extern struct platform_device exynos4_device_dwmci; | ||
129 | extern struct platform_device exynos4_device_i2s0; | ||
130 | extern struct platform_device exynos4_device_i2s1; | ||
131 | extern struct platform_device exynos4_device_i2s2; | ||
132 | extern struct platform_device exynos4_device_pcm0; | ||
133 | extern struct platform_device exynos4_device_pcm1; | ||
134 | extern struct platform_device exynos4_device_pcm2; | ||
135 | extern struct platform_device exynos4_device_pd[]; | ||
136 | extern struct platform_device exynos4_device_spdif; | ||
150 | extern struct platform_device exynos4_device_sysmmu; | 137 | extern struct platform_device exynos4_device_sysmmu; |
151 | 138 | ||
139 | extern struct platform_device samsung_asoc_dma; | ||
140 | extern struct platform_device samsung_asoc_idma; | ||
141 | extern struct platform_device samsung_device_keypad; | ||
142 | |||
152 | /* s3c2440 specific devices */ | 143 | /* s3c2440 specific devices */ |
153 | 144 | ||
154 | #ifdef CONFIG_CPU_S3C2440 | 145 | #ifdef CONFIG_CPU_S3C2440 |
diff --git a/arch/arm/plat-samsung/include/plat/dma-ops.h b/arch/arm/plat-samsung/include/plat/dma-ops.h new file mode 100644 index 00000000000..4c1a363526c --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/dma-ops.h | |||
@@ -0,0 +1,63 @@ | |||
1 | /* arch/arm/plat-samsung/include/plat/dma-ops.h | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Samsung DMA support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __SAMSUNG_DMA_OPS_H_ | ||
14 | #define __SAMSUNG_DMA_OPS_H_ __FILE__ | ||
15 | |||
16 | #include <linux/dmaengine.h> | ||
17 | |||
18 | struct samsung_dma_prep_info { | ||
19 | enum dma_transaction_type cap; | ||
20 | enum dma_data_direction direction; | ||
21 | dma_addr_t buf; | ||
22 | unsigned long period; | ||
23 | unsigned long len; | ||
24 | void (*fp)(void *data); | ||
25 | void *fp_param; | ||
26 | }; | ||
27 | |||
28 | struct samsung_dma_info { | ||
29 | enum dma_transaction_type cap; | ||
30 | enum dma_data_direction direction; | ||
31 | enum dma_slave_buswidth width; | ||
32 | dma_addr_t fifo; | ||
33 | struct s3c2410_dma_client *client; | ||
34 | }; | ||
35 | |||
36 | struct samsung_dma_ops { | ||
37 | unsigned (*request)(enum dma_ch ch, struct samsung_dma_info *info); | ||
38 | int (*release)(unsigned ch, struct s3c2410_dma_client *client); | ||
39 | int (*prepare)(unsigned ch, struct samsung_dma_prep_info *info); | ||
40 | int (*trigger)(unsigned ch); | ||
41 | int (*started)(unsigned ch); | ||
42 | int (*flush)(unsigned ch); | ||
43 | int (*stop)(unsigned ch); | ||
44 | }; | ||
45 | |||
46 | extern void *samsung_dmadev_get_ops(void); | ||
47 | extern void *s3c_dma_get_ops(void); | ||
48 | |||
49 | static inline void *__samsung_dma_get_ops(void) | ||
50 | { | ||
51 | if (samsung_dma_is_dmadev()) | ||
52 | return samsung_dmadev_get_ops(); | ||
53 | else | ||
54 | return s3c_dma_get_ops(); | ||
55 | } | ||
56 | |||
57 | /* | ||
58 | * samsung_dma_get_ops | ||
59 | * get the set of samsung dma operations | ||
60 | */ | ||
61 | #define samsung_dma_get_ops() __samsung_dma_get_ops() | ||
62 | |||
63 | #endif /* __SAMSUNG_DMA_OPS_H_ */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h index 81074421312..2e55e595867 100644 --- a/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h +++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h | |||
@@ -8,11 +8,8 @@ | |||
8 | * (at your option) any later version. | 8 | * (at your option) any later version. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #ifndef __S3C_DMA_PL330_H_ | 11 | #ifndef __DMA_PL330_H_ |
12 | #define __S3C_DMA_PL330_H_ | 12 | #define __DMA_PL330_H_ __FILE__ |
13 | |||
14 | #define S3C2410_DMAF_AUTOSTART (1 << 0) | ||
15 | #define S3C2410_DMAF_CIRCULAR (1 << 1) | ||
16 | 13 | ||
17 | /* | 14 | /* |
18 | * PL330 can assign any channel to communicate with | 15 | * PL330 can assign any channel to communicate with |
@@ -20,7 +17,7 @@ | |||
20 | * For the sake of consistency across client drivers, | 17 | * For the sake of consistency across client drivers, |
21 | * We keep the channel names unchanged and only add | 18 | * We keep the channel names unchanged and only add |
22 | * missing peripherals are added. | 19 | * missing peripherals are added. |
23 | * Order is not important since S3C PL330 API driver | 20 | * Order is not important since DMA PL330 API driver |
24 | * use these just as IDs. | 21 | * use these just as IDs. |
25 | */ | 22 | */ |
26 | enum dma_ch { | 23 | enum dma_ch { |
@@ -88,11 +85,20 @@ enum dma_ch { | |||
88 | DMACH_MAX, | 85 | DMACH_MAX, |
89 | }; | 86 | }; |
90 | 87 | ||
91 | static inline bool s3c_dma_has_circular(void) | 88 | struct s3c2410_dma_client { |
89 | char *name; | ||
90 | }; | ||
91 | |||
92 | static inline bool samsung_dma_has_circular(void) | ||
93 | { | ||
94 | return true; | ||
95 | } | ||
96 | |||
97 | static inline bool samsung_dma_is_dmadev(void) | ||
92 | { | 98 | { |
93 | return true; | 99 | return true; |
94 | } | 100 | } |
95 | 101 | ||
96 | #include <plat/dma.h> | 102 | #include <plat/dma-ops.h> |
97 | 103 | ||
98 | #endif /* __S3C_DMA_PL330_H_ */ | 104 | #endif /* __DMA_PL330_H_ */ |
diff --git a/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h index ab9bce637cb..1c1ed548125 100644 --- a/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h +++ b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h | |||
@@ -41,7 +41,7 @@ struct s3c24xx_dma_selection { | |||
41 | 41 | ||
42 | void (*direction)(struct s3c2410_dma_chan *chan, | 42 | void (*direction)(struct s3c2410_dma_chan *chan, |
43 | struct s3c24xx_dma_map *map, | 43 | struct s3c24xx_dma_map *map, |
44 | enum s3c2410_dmasrc dir); | 44 | enum dma_data_direction dir); |
45 | }; | 45 | }; |
46 | 46 | ||
47 | extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel); | 47 | extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel); |
diff --git a/arch/arm/plat-samsung/include/plat/dma.h b/arch/arm/plat-samsung/include/plat/dma.h index 8c273b7a6f5..b9061128abd 100644 --- a/arch/arm/plat-samsung/include/plat/dma.h +++ b/arch/arm/plat-samsung/include/plat/dma.h | |||
@@ -10,17 +10,14 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/dma-mapping.h> | ||
14 | |||
13 | enum s3c2410_dma_buffresult { | 15 | enum s3c2410_dma_buffresult { |
14 | S3C2410_RES_OK, | 16 | S3C2410_RES_OK, |
15 | S3C2410_RES_ERR, | 17 | S3C2410_RES_ERR, |
16 | S3C2410_RES_ABORT | 18 | S3C2410_RES_ABORT |
17 | }; | 19 | }; |
18 | 20 | ||
19 | enum s3c2410_dmasrc { | ||
20 | S3C2410_DMASRC_HW, /* source is memory */ | ||
21 | S3C2410_DMASRC_MEM /* source is hardware */ | ||
22 | }; | ||
23 | |||
24 | /* enum s3c2410_chan_op | 21 | /* enum s3c2410_chan_op |
25 | * | 22 | * |
26 | * operation codes passed to the DMA code by the user, and also used | 23 | * operation codes passed to the DMA code by the user, and also used |
@@ -112,7 +109,7 @@ extern int s3c2410_dma_config(enum dma_ch channel, int xferunit); | |||
112 | */ | 109 | */ |
113 | 110 | ||
114 | extern int s3c2410_dma_devconfig(enum dma_ch channel, | 111 | extern int s3c2410_dma_devconfig(enum dma_ch channel, |
115 | enum s3c2410_dmasrc source, unsigned long devaddr); | 112 | enum dma_data_direction source, unsigned long devaddr); |
116 | 113 | ||
117 | /* s3c2410_dma_getposition | 114 | /* s3c2410_dma_getposition |
118 | * | 115 | * |
@@ -126,3 +123,4 @@ extern int s3c2410_dma_set_opfn(enum dma_ch, s3c2410_dma_opfn_t rtn); | |||
126 | extern int s3c2410_dma_set_buffdone_fn(enum dma_ch, s3c2410_dma_cbfn_t rtn); | 123 | extern int s3c2410_dma_set_buffdone_fn(enum dma_ch, s3c2410_dma_cbfn_t rtn); |
127 | 124 | ||
128 | 125 | ||
126 | #include <plat/dma-ops.h> | ||
diff --git a/arch/arm/plat-s5p/include/plat/ehci.h b/arch/arm/plat-samsung/include/plat/ehci.h index 6ae6810c756..5f28cae1858 100644 --- a/arch/arm/plat-s5p/include/plat/ehci.h +++ b/arch/arm/plat-samsung/include/plat/ehci.h | |||
@@ -8,8 +8,8 @@ | |||
8 | * option) any later version. | 8 | * option) any later version. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #ifndef __PLAT_S5P_EHCI_H | 11 | #ifndef __PLAT_SAMSUNG_EHCI_H |
12 | #define __PLAT_S5P_EHCI_H | 12 | #define __PLAT_SAMSUNG_EHCI_H __FILE__ |
13 | 13 | ||
14 | struct s5p_ehci_platdata { | 14 | struct s5p_ehci_platdata { |
15 | int (*phy_init)(struct platform_device *pdev, int type); | 15 | int (*phy_init)(struct platform_device *pdev, int type); |
@@ -18,4 +18,4 @@ struct s5p_ehci_platdata { | |||
18 | 18 | ||
19 | extern void s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd); | 19 | extern void s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd); |
20 | 20 | ||
21 | #endif /* __PLAT_S5P_EHCI_H */ | 21 | #endif /* __PLAT_SAMSUNG_EHCI_H */ |
diff --git a/arch/arm/plat-s5p/include/plat/exynos4.h b/arch/arm/plat-samsung/include/plat/exynos4.h index f680a143e38..f546e88ebc9 100644 --- a/arch/arm/plat-s5p/include/plat/exynos4.h +++ b/arch/arm/plat-samsung/include/plat/exynos4.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/arch/arm/plat-s5p/include/plat/exynos4.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/exynos4.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
@@ -18,8 +18,8 @@ extern void exynos4210_register_clocks(void); | |||
18 | extern void exynos4212_register_clocks(void); | 18 | extern void exynos4212_register_clocks(void); |
19 | extern void exynos4_setup_clocks(void); | 19 | extern void exynos4_setup_clocks(void); |
20 | 20 | ||
21 | #ifdef CONFIG_ARCH_EXYNOS4 | 21 | #ifdef CONFIG_ARCH_EXYNOS |
22 | extern int exynos4_init(void); | 22 | extern int exynos_init(void); |
23 | extern void exynos4_init_irq(void); | 23 | extern void exynos4_init_irq(void); |
24 | extern void exynos4_map_io(void); | 24 | extern void exynos4_map_io(void); |
25 | extern void exynos4_init_clocks(int xtal); | 25 | extern void exynos4_init_clocks(int xtal); |
@@ -31,5 +31,5 @@ extern struct sys_timer exynos4_timer; | |||
31 | #define exynos4_init_clocks NULL | 31 | #define exynos4_init_clocks NULL |
32 | #define exynos4_init_uarts NULL | 32 | #define exynos4_init_uarts NULL |
33 | #define exynos4_map_io NULL | 33 | #define exynos4_map_io NULL |
34 | #define exynos4_init NULL | 34 | #define exynos_init NULL |
35 | #endif | 35 | #endif |
diff --git a/arch/arm/plat-samsung/include/plat/fb-s3c2410.h b/arch/arm/plat-samsung/include/plat/fb-s3c2410.h new file mode 100644 index 00000000000..4e5d9588b5b --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/fb-s3c2410.h | |||
@@ -0,0 +1,72 @@ | |||
1 | /* arch/arm/plat-samsung/include/plat/fb-s3c2410.h | ||
2 | * | ||
3 | * Copyright (c) 2004 Arnaud Patard <arnaud.patard@rtp-net.org> | ||
4 | * | ||
5 | * Inspired by pxafb.h | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_PLAT_FB_S3C2410_H | ||
13 | #define __ASM_PLAT_FB_S3C2410_H __FILE__ | ||
14 | |||
15 | struct s3c2410fb_hw { | ||
16 | unsigned long lcdcon1; | ||
17 | unsigned long lcdcon2; | ||
18 | unsigned long lcdcon3; | ||
19 | unsigned long lcdcon4; | ||
20 | unsigned long lcdcon5; | ||
21 | }; | ||
22 | |||
23 | /* LCD description */ | ||
24 | struct s3c2410fb_display { | ||
25 | /* LCD type */ | ||
26 | unsigned type; | ||
27 | |||
28 | /* Screen size */ | ||
29 | unsigned short width; | ||
30 | unsigned short height; | ||
31 | |||
32 | /* Screen info */ | ||
33 | unsigned short xres; | ||
34 | unsigned short yres; | ||
35 | unsigned short bpp; | ||
36 | |||
37 | unsigned pixclock; /* pixclock in picoseconds */ | ||
38 | unsigned short left_margin; /* value in pixels (TFT) or HCLKs (STN) */ | ||
39 | unsigned short right_margin; /* value in pixels (TFT) or HCLKs (STN) */ | ||
40 | unsigned short hsync_len; /* value in pixels (TFT) or HCLKs (STN) */ | ||
41 | unsigned short upper_margin; /* value in lines (TFT) or 0 (STN) */ | ||
42 | unsigned short lower_margin; /* value in lines (TFT) or 0 (STN) */ | ||
43 | unsigned short vsync_len; /* value in lines (TFT) or 0 (STN) */ | ||
44 | |||
45 | /* lcd configuration registers */ | ||
46 | unsigned long lcdcon5; | ||
47 | }; | ||
48 | |||
49 | struct s3c2410fb_mach_info { | ||
50 | |||
51 | struct s3c2410fb_display *displays; /* attached diplays info */ | ||
52 | unsigned num_displays; /* number of defined displays */ | ||
53 | unsigned default_display; | ||
54 | |||
55 | /* GPIOs */ | ||
56 | |||
57 | unsigned long gpcup; | ||
58 | unsigned long gpcup_mask; | ||
59 | unsigned long gpccon; | ||
60 | unsigned long gpccon_mask; | ||
61 | unsigned long gpdup; | ||
62 | unsigned long gpdup_mask; | ||
63 | unsigned long gpdcon; | ||
64 | unsigned long gpdcon_mask; | ||
65 | |||
66 | /* lpc3600 control register */ | ||
67 | unsigned long lpcsel; | ||
68 | }; | ||
69 | |||
70 | extern void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *); | ||
71 | |||
72 | #endif /* __ASM_PLAT_FB_S3C2410_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h index 01f10e4d00c..0fedf47fa50 100644 --- a/arch/arm/plat-samsung/include/plat/fb.h +++ b/arch/arm/plat-samsung/include/plat/fb.h | |||
@@ -109,4 +109,11 @@ extern void s5pv210_fb_gpio_setup_24bpp(void); | |||
109 | */ | 109 | */ |
110 | extern void exynos4_fimd0_gpio_setup_24bpp(void); | 110 | extern void exynos4_fimd0_gpio_setup_24bpp(void); |
111 | 111 | ||
112 | /** | ||
113 | * s5p64x0_fb_gpio_setup_24bpp() - S5P6440/S5P6450 setup function for 24bpp LCD | ||
114 | * | ||
115 | * Initialise the GPIO for an 24bpp LCD display on the RGB interface. | ||
116 | */ | ||
117 | extern void s5p64x0_fb_gpio_setup_24bpp(void); | ||
118 | |||
112 | #endif /* __PLAT_S3C_FB_H */ | 119 | #endif /* __PLAT_S3C_FB_H */ |
diff --git a/arch/arm/plat-s3c24xx/include/plat/fiq.h b/arch/arm/plat-samsung/include/plat/fiq.h index 8521b8372c5..535d06a3562 100644 --- a/arch/arm/plat-s3c24xx/include/plat/fiq.h +++ b/arch/arm/plat-samsung/include/plat/fiq.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/fiq.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/fiq.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Simtec Electronics | 3 | * Copyright (c) 2009 Simtec Electronics |
4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h index 9a4e53d5296..a181d7ce81c 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h | |||
@@ -1,11 +1,11 @@ | |||
1 | /* linux/arch/arm/plat-s3c/include/plat/gpio-cfg-helper.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/gpio-cfg-helper.h |
2 | * | 2 | * |
3 | * Copyright 2008 Openmoko, Inc. | 3 | * Copyright 2008 Openmoko, Inc. |
4 | * Copyright 2008 Simtec Electronics | 4 | * Copyright 2008 Simtec Electronics |
5 | * http://armlinux.simtec.co.uk/ | 5 | * http://armlinux.simtec.co.uk/ |
6 | * Ben Dooks <ben@simtec.co.uk> | 6 | * Ben Dooks <ben@simtec.co.uk> |
7 | * | 7 | * |
8 | * S3C Platform - GPIO pin configuration helper definitions | 8 | * Samsung Platform - GPIO pin configuration helper definitions |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License version 2 as | 11 | * it under the terms of the GNU General Public License version 2 as |
@@ -24,120 +24,30 @@ | |||
24 | * by disabling interrupts. | 24 | * by disabling interrupts. |
25 | */ | 25 | */ |
26 | 26 | ||
27 | static inline int s3c_gpio_do_setcfg(struct s3c_gpio_chip *chip, | 27 | static inline int samsung_gpio_do_setcfg(struct samsung_gpio_chip *chip, |
28 | unsigned int off, unsigned int config) | 28 | unsigned int off, unsigned int config) |
29 | { | 29 | { |
30 | return (chip->config->set_config)(chip, off, config); | 30 | return (chip->config->set_config)(chip, off, config); |
31 | } | 31 | } |
32 | 32 | ||
33 | static inline unsigned s3c_gpio_do_getcfg(struct s3c_gpio_chip *chip, | 33 | static inline unsigned samsung_gpio_do_getcfg(struct samsung_gpio_chip *chip, |
34 | unsigned int off) | 34 | unsigned int off) |
35 | { | 35 | { |
36 | return (chip->config->get_config)(chip, off); | 36 | return (chip->config->get_config)(chip, off); |
37 | } | 37 | } |
38 | 38 | ||
39 | static inline int s3c_gpio_do_setpull(struct s3c_gpio_chip *chip, | 39 | static inline int samsung_gpio_do_setpull(struct samsung_gpio_chip *chip, |
40 | unsigned int off, s3c_gpio_pull_t pull) | 40 | unsigned int off, samsung_gpio_pull_t pull) |
41 | { | 41 | { |
42 | return (chip->config->set_pull)(chip, off, pull); | 42 | return (chip->config->set_pull)(chip, off, pull); |
43 | } | 43 | } |
44 | 44 | ||
45 | static inline s3c_gpio_pull_t s3c_gpio_do_getpull(struct s3c_gpio_chip *chip, | 45 | static inline samsung_gpio_pull_t samsung_gpio_do_getpull(struct samsung_gpio_chip *chip, |
46 | unsigned int off) | 46 | unsigned int off) |
47 | { | 47 | { |
48 | return chip->config->get_pull(chip, off); | 48 | return chip->config->get_pull(chip, off); |
49 | } | 49 | } |
50 | 50 | ||
51 | /** | ||
52 | * s3c_gpio_setcfg_s3c24xx - S3C24XX style GPIO configuration. | ||
53 | * @chip: The gpio chip that is being configured. | ||
54 | * @off: The offset for the GPIO being configured. | ||
55 | * @cfg: The configuration value to set. | ||
56 | * | ||
57 | * This helper deal with the GPIO cases where the control register | ||
58 | * has two bits of configuration per gpio, which have the following | ||
59 | * functions: | ||
60 | * 00 = input | ||
61 | * 01 = output | ||
62 | * 1x = special function | ||
63 | */ | ||
64 | extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip, | ||
65 | unsigned int off, unsigned int cfg); | ||
66 | |||
67 | /** | ||
68 | * s3c_gpio_getcfg_s3c24xx - S3C24XX style GPIO configuration read. | ||
69 | * @chip: The gpio chip that is being configured. | ||
70 | * @off: The offset for the GPIO being configured. | ||
71 | * | ||
72 | * The reverse of s3c_gpio_setcfg_s3c24xx(). Will return a value whicg | ||
73 | * could be directly passed back to s3c_gpio_setcfg_s3c24xx(), from the | ||
74 | * S3C_GPIO_SPECIAL() macro. | ||
75 | */ | ||
76 | unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip, | ||
77 | unsigned int off); | ||
78 | |||
79 | /** | ||
80 | * s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A) | ||
81 | * @chip: The gpio chip that is being configured. | ||
82 | * @off: The offset for the GPIO being configured. | ||
83 | * @cfg: The configuration value to set. | ||
84 | * | ||
85 | * This helper deal with the GPIO cases where the control register | ||
86 | * has one bit of configuration for the gpio, where setting the bit | ||
87 | * means the pin is in special function mode and unset means output. | ||
88 | */ | ||
89 | extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip, | ||
90 | unsigned int off, unsigned int cfg); | ||
91 | |||
92 | |||
93 | /** | ||
94 | * s3c_gpio_getcfg_s3c24xx_a - S3C24XX style GPIO configuration read (Bank A) | ||
95 | * @chip: The gpio chip that is being configured. | ||
96 | * @off: The offset for the GPIO being configured. | ||
97 | * | ||
98 | * The reverse of s3c_gpio_setcfg_s3c24xx_a() turning an GPIO into a usable | ||
99 | * GPIO configuration value. | ||
100 | * | ||
101 | * @sa s3c_gpio_getcfg_s3c24xx | ||
102 | * @sa s3c_gpio_getcfg_s3c64xx_4bit | ||
103 | */ | ||
104 | extern unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip, | ||
105 | unsigned int off); | ||
106 | |||
107 | /** | ||
108 | * s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config. | ||
109 | * @chip: The gpio chip that is being configured. | ||
110 | * @off: The offset for the GPIO being configured. | ||
111 | * @cfg: The configuration value to set. | ||
112 | * | ||
113 | * This helper deal with the GPIO cases where the control register has 4 bits | ||
114 | * of control per GPIO, generally in the form of: | ||
115 | * 0000 = Input | ||
116 | * 0001 = Output | ||
117 | * others = Special functions (dependent on bank) | ||
118 | * | ||
119 | * Note, since the code to deal with the case where there are two control | ||
120 | * registers instead of one, we do not have a separate set of functions for | ||
121 | * each case. | ||
122 | */ | ||
123 | extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, | ||
124 | unsigned int off, unsigned int cfg); | ||
125 | |||
126 | |||
127 | /** | ||
128 | * s3c_gpio_getcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config read. | ||
129 | * @chip: The gpio chip that is being configured. | ||
130 | * @off: The offset for the GPIO being configured. | ||
131 | * | ||
132 | * The reverse of s3c_gpio_setcfg_s3c64xx_4bit(), turning a gpio configuration | ||
133 | * register setting into a value the software can use, such as could be passed | ||
134 | * to s3c_gpio_setcfg_s3c64xx_4bit(). | ||
135 | * | ||
136 | * @sa s3c_gpio_getcfg_s3c24xx | ||
137 | */ | ||
138 | extern unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, | ||
139 | unsigned int off); | ||
140 | |||
141 | /* Pull-{up,down} resistor controls. | 51 | /* Pull-{up,down} resistor controls. |
142 | * | 52 | * |
143 | * S3C2410,S3C2440 = Pull-UP, | 53 | * S3C2410,S3C2440 = Pull-UP, |
@@ -147,7 +57,7 @@ extern unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, | |||
147 | */ | 57 | */ |
148 | 58 | ||
149 | /** | 59 | /** |
150 | * s3c_gpio_setpull_1up() - Pull configuration for choice of up or none. | 60 | * s3c24xx_gpio_setpull_1up() - Pull configuration for choice of up or none. |
151 | * @chip: The gpio chip that is being configured. | 61 | * @chip: The gpio chip that is being configured. |
152 | * @off: The offset for the GPIO being configured. | 62 | * @off: The offset for the GPIO being configured. |
153 | * @param: pull: The pull mode being requested. | 63 | * @param: pull: The pull mode being requested. |
@@ -155,11 +65,11 @@ extern unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, | |||
155 | * This is a helper function for the case where we have GPIOs with one | 65 | * This is a helper function for the case where we have GPIOs with one |
156 | * bit configuring the presence of a pull-up resistor. | 66 | * bit configuring the presence of a pull-up resistor. |
157 | */ | 67 | */ |
158 | extern int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip, | 68 | extern int s3c24xx_gpio_setpull_1up(struct samsung_gpio_chip *chip, |
159 | unsigned int off, s3c_gpio_pull_t pull); | 69 | unsigned int off, samsung_gpio_pull_t pull); |
160 | 70 | ||
161 | /** | 71 | /** |
162 | * s3c_gpio_setpull_1down() - Pull configuration for choice of down or none | 72 | * s3c24xx_gpio_setpull_1down() - Pull configuration for choice of down or none |
163 | * @chip: The gpio chip that is being configured | 73 | * @chip: The gpio chip that is being configured |
164 | * @off: The offset for the GPIO being configured | 74 | * @off: The offset for the GPIO being configured |
165 | * @param: pull: The pull mode being requested | 75 | * @param: pull: The pull mode being requested |
@@ -167,11 +77,13 @@ extern int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip, | |||
167 | * This is a helper function for the case where we have GPIOs with one | 77 | * This is a helper function for the case where we have GPIOs with one |
168 | * bit configuring the presence of a pull-down resistor. | 78 | * bit configuring the presence of a pull-down resistor. |
169 | */ | 79 | */ |
170 | extern int s3c_gpio_setpull_1down(struct s3c_gpio_chip *chip, | 80 | extern int s3c24xx_gpio_setpull_1down(struct samsung_gpio_chip *chip, |
171 | unsigned int off, s3c_gpio_pull_t pull); | 81 | unsigned int off, samsung_gpio_pull_t pull); |
172 | 82 | ||
173 | /** | 83 | /** |
174 | * s3c_gpio_setpull_upown() - Pull configuration for choice of up, down or none | 84 | * samsung_gpio_setpull_upown() - Pull configuration for choice of up, |
85 | * down or none | ||
86 | * | ||
175 | * @chip: The gpio chip that is being configured. | 87 | * @chip: The gpio chip that is being configured. |
176 | * @off: The offset for the GPIO being configured. | 88 | * @off: The offset for the GPIO being configured. |
177 | * @param: pull: The pull mode being requested. | 89 | * @param: pull: The pull mode being requested. |
@@ -183,45 +95,46 @@ extern int s3c_gpio_setpull_1down(struct s3c_gpio_chip *chip, | |||
183 | * 01 = Pull-up resistor connected | 95 | * 01 = Pull-up resistor connected |
184 | * 10 = Pull-down resistor connected | 96 | * 10 = Pull-down resistor connected |
185 | */ | 97 | */ |
186 | extern int s3c_gpio_setpull_updown(struct s3c_gpio_chip *chip, | 98 | extern int samsung_gpio_setpull_updown(struct samsung_gpio_chip *chip, |
187 | unsigned int off, s3c_gpio_pull_t pull); | 99 | unsigned int off, samsung_gpio_pull_t pull); |
188 | |||
189 | 100 | ||
190 | /** | 101 | /** |
191 | * s3c_gpio_getpull_updown() - Get configuration for choice of up, down or none | 102 | * samsung_gpio_getpull_updown() - Get configuration for choice of up, |
103 | * down or none | ||
104 | * | ||
192 | * @chip: The gpio chip that the GPIO pin belongs to | 105 | * @chip: The gpio chip that the GPIO pin belongs to |
193 | * @off: The offset to the pin to get the configuration of. | 106 | * @off: The offset to the pin to get the configuration of. |
194 | * | 107 | * |
195 | * This helper function reads the state of the pull-{up,down} resistor for the | 108 | * This helper function reads the state of the pull-{up,down} resistor |
196 | * given GPIO in the same case as s3c_gpio_setpull_upown. | 109 | * for the given GPIO in the same case as samsung_gpio_setpull_upown. |
197 | */ | 110 | */ |
198 | extern s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip, | 111 | extern samsung_gpio_pull_t samsung_gpio_getpull_updown(struct samsung_gpio_chip *chip, |
199 | unsigned int off); | 112 | unsigned int off); |
200 | 113 | ||
201 | /** | 114 | /** |
202 | * s3c_gpio_getpull_1up() - Get configuration for choice of up or none | 115 | * s3c24xx_gpio_getpull_1up() - Get configuration for choice of up or none |
203 | * @chip: The gpio chip that the GPIO pin belongs to | 116 | * @chip: The gpio chip that the GPIO pin belongs to |
204 | * @off: The offset to the pin to get the configuration of. | 117 | * @off: The offset to the pin to get the configuration of. |
205 | * | 118 | * |
206 | * This helper function reads the state of the pull-up resistor for the | 119 | * This helper function reads the state of the pull-up resistor for the |
207 | * given GPIO in the same case as s3c_gpio_setpull_1up. | 120 | * given GPIO in the same case as s3c24xx_gpio_setpull_1up. |
208 | */ | 121 | */ |
209 | extern s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip, | 122 | extern samsung_gpio_pull_t s3c24xx_gpio_getpull_1up(struct samsung_gpio_chip *chip, |
210 | unsigned int off); | 123 | unsigned int off); |
211 | 124 | ||
212 | /** | 125 | /** |
213 | * s3c_gpio_getpull_1down() - Get configuration for choice of down or none | 126 | * s3c24xx_gpio_getpull_1down() - Get configuration for choice of down or none |
214 | * @chip: The gpio chip that the GPIO pin belongs to | 127 | * @chip: The gpio chip that the GPIO pin belongs to |
215 | * @off: The offset to the pin to get the configuration of. | 128 | * @off: The offset to the pin to get the configuration of. |
216 | * | 129 | * |
217 | * This helper function reads the state of the pull-down resistor for the | 130 | * This helper function reads the state of the pull-down resistor for the |
218 | * given GPIO in the same case as s3c_gpio_setpull_1down. | 131 | * given GPIO in the same case as s3c24xx_gpio_setpull_1down. |
219 | */ | 132 | */ |
220 | extern s3c_gpio_pull_t s3c_gpio_getpull_1down(struct s3c_gpio_chip *chip, | 133 | extern samsung_gpio_pull_t s3c24xx_gpio_getpull_1down(struct samsung_gpio_chip *chip, |
221 | unsigned int off); | 134 | unsigned int off); |
222 | 135 | ||
223 | /** | 136 | /** |
224 | * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443. | 137 | * s3c2443_gpio_setpull() - Pull configuration for s3c2443. |
225 | * @chip: The gpio chip that is being configured. | 138 | * @chip: The gpio chip that is being configured. |
226 | * @off: The offset for the GPIO being configured. | 139 | * @off: The offset for the GPIO being configured. |
227 | * @param: pull: The pull mode being requested. | 140 | * @param: pull: The pull mode being requested. |
@@ -233,19 +146,18 @@ extern s3c_gpio_pull_t s3c_gpio_getpull_1down(struct s3c_gpio_chip *chip, | |||
233 | * 10 = Pull-down resistor connected | 146 | * 10 = Pull-down resistor connected |
234 | * x1 = No pull up resistor | 147 | * x1 = No pull up resistor |
235 | */ | 148 | */ |
236 | extern int s3c_gpio_setpull_s3c2443(struct s3c_gpio_chip *chip, | 149 | extern int s3c2443_gpio_setpull(struct samsung_gpio_chip *chip, |
237 | unsigned int off, s3c_gpio_pull_t pull); | 150 | unsigned int off, samsung_gpio_pull_t pull); |
238 | 151 | ||
239 | /** | 152 | /** |
240 | * s3c_gpio_getpull_s3c2443() - Get configuration for s3c2443 pull resistors | 153 | * s3c2443_gpio_getpull() - Get configuration for s3c2443 pull resistors |
241 | * @chip: The gpio chip that the GPIO pin belongs to. | 154 | * @chip: The gpio chip that the GPIO pin belongs to. |
242 | * @off: The offset to the pin to get the configuration of. | 155 | * @off: The offset to the pin to get the configuration of. |
243 | * | 156 | * |
244 | * This helper function reads the state of the pull-{up,down} resistor for the | 157 | * This helper function reads the state of the pull-{up,down} resistor for the |
245 | * given GPIO in the same case as s3c_gpio_setpull_upown. | 158 | * given GPIO in the same case as samsung_gpio_setpull_upown. |
246 | */ | 159 | */ |
247 | extern s3c_gpio_pull_t s3c_gpio_getpull_s3c2443(struct s3c_gpio_chip *chip, | 160 | extern samsung_gpio_pull_t s3c2443_gpio_getpull(struct samsung_gpio_chip *chip, |
248 | unsigned int off); | 161 | unsigned int off); |
249 | 162 | ||
250 | #endif /* __PLAT_GPIO_CFG_HELPERS_H */ | 163 | #endif /* __PLAT_GPIO_CFG_HELPERS_H */ |
251 | |||
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index 1762dcb4cb9..d48245bb02b 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h | |||
@@ -24,14 +24,14 @@ | |||
24 | #ifndef __PLAT_GPIO_CFG_H | 24 | #ifndef __PLAT_GPIO_CFG_H |
25 | #define __PLAT_GPIO_CFG_H __FILE__ | 25 | #define __PLAT_GPIO_CFG_H __FILE__ |
26 | 26 | ||
27 | typedef unsigned int __bitwise__ s3c_gpio_pull_t; | 27 | typedef unsigned int __bitwise__ samsung_gpio_pull_t; |
28 | typedef unsigned int __bitwise__ s5p_gpio_drvstr_t; | 28 | typedef unsigned int __bitwise__ s5p_gpio_drvstr_t; |
29 | 29 | ||
30 | /* forward declaration if gpio-core.h hasn't been included */ | 30 | /* forward declaration if gpio-core.h hasn't been included */ |
31 | struct s3c_gpio_chip; | 31 | struct samsung_gpio_chip; |
32 | 32 | ||
33 | /** | 33 | /** |
34 | * struct s3c_gpio_cfg GPIO configuration | 34 | * struct samsung_gpio_cfg GPIO configuration |
35 | * @cfg_eint: Configuration setting when used for external interrupt source | 35 | * @cfg_eint: Configuration setting when used for external interrupt source |
36 | * @get_pull: Read the current pull configuration for the GPIO | 36 | * @get_pull: Read the current pull configuration for the GPIO |
37 | * @set_pull: Set the current pull configuraiton for the GPIO | 37 | * @set_pull: Set the current pull configuraiton for the GPIO |
@@ -44,20 +44,20 @@ struct s3c_gpio_chip; | |||
44 | * per-bank configuration information that other systems such as the | 44 | * per-bank configuration information that other systems such as the |
45 | * external interrupt code will need. | 45 | * external interrupt code will need. |
46 | * | 46 | * |
47 | * @sa s3c_gpio_cfgpin | 47 | * @sa samsung_gpio_cfgpin |
48 | * @sa s3c_gpio_getcfg | 48 | * @sa s3c_gpio_getcfg |
49 | * @sa s3c_gpio_setpull | 49 | * @sa s3c_gpio_setpull |
50 | * @sa s3c_gpio_getpull | 50 | * @sa s3c_gpio_getpull |
51 | */ | 51 | */ |
52 | struct s3c_gpio_cfg { | 52 | struct samsung_gpio_cfg { |
53 | unsigned int cfg_eint; | 53 | unsigned int cfg_eint; |
54 | 54 | ||
55 | s3c_gpio_pull_t (*get_pull)(struct s3c_gpio_chip *chip, unsigned offs); | 55 | samsung_gpio_pull_t (*get_pull)(struct samsung_gpio_chip *chip, unsigned offs); |
56 | int (*set_pull)(struct s3c_gpio_chip *chip, unsigned offs, | 56 | int (*set_pull)(struct samsung_gpio_chip *chip, unsigned offs, |
57 | s3c_gpio_pull_t pull); | 57 | samsung_gpio_pull_t pull); |
58 | 58 | ||
59 | unsigned (*get_config)(struct s3c_gpio_chip *chip, unsigned offs); | 59 | unsigned (*get_config)(struct samsung_gpio_chip *chip, unsigned offs); |
60 | int (*set_config)(struct s3c_gpio_chip *chip, unsigned offs, | 60 | int (*set_config)(struct samsung_gpio_chip *chip, unsigned offs, |
61 | unsigned config); | 61 | unsigned config); |
62 | }; | 62 | }; |
63 | 63 | ||
@@ -69,7 +69,7 @@ struct s3c_gpio_cfg { | |||
69 | #define S3C_GPIO_OUTPUT (S3C_GPIO_SPECIAL(1)) | 69 | #define S3C_GPIO_OUTPUT (S3C_GPIO_SPECIAL(1)) |
70 | #define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x)) | 70 | #define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x)) |
71 | 71 | ||
72 | #define s3c_gpio_is_cfg_special(_cfg) \ | 72 | #define samsung_gpio_is_cfg_special(_cfg) \ |
73 | (((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK) | 73 | (((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK) |
74 | 74 | ||
75 | /** | 75 | /** |
@@ -128,9 +128,9 @@ extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr, | |||
128 | * up or down settings, and it may be dependent on the chip that is being | 128 | * up or down settings, and it may be dependent on the chip that is being |
129 | * used to whether the particular mode is available. | 129 | * used to whether the particular mode is available. |
130 | */ | 130 | */ |
131 | #define S3C_GPIO_PULL_NONE ((__force s3c_gpio_pull_t)0x00) | 131 | #define S3C_GPIO_PULL_NONE ((__force samsung_gpio_pull_t)0x00) |
132 | #define S3C_GPIO_PULL_DOWN ((__force s3c_gpio_pull_t)0x01) | 132 | #define S3C_GPIO_PULL_DOWN ((__force samsung_gpio_pull_t)0x01) |
133 | #define S3C_GPIO_PULL_UP ((__force s3c_gpio_pull_t)0x02) | 133 | #define S3C_GPIO_PULL_UP ((__force samsung_gpio_pull_t)0x02) |
134 | 134 | ||
135 | /** | 135 | /** |
136 | * s3c_gpio_setpull() - set the state of a gpio pin pull resistor | 136 | * s3c_gpio_setpull() - set the state of a gpio pin pull resistor |
@@ -143,7 +143,7 @@ extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr, | |||
143 | * | 143 | * |
144 | * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP. | 144 | * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP. |
145 | */ | 145 | */ |
146 | extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull); | 146 | extern int s3c_gpio_setpull(unsigned int pin, samsung_gpio_pull_t pull); |
147 | 147 | ||
148 | /** | 148 | /** |
149 | * s3c_gpio_getpull() - get the pull resistor state of a gpio pin | 149 | * s3c_gpio_getpull() - get the pull resistor state of a gpio pin |
@@ -151,7 +151,7 @@ extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull); | |||
151 | * | 151 | * |
152 | * Read the pull resistor value for the specified pin. | 152 | * Read the pull resistor value for the specified pin. |
153 | */ | 153 | */ |
154 | extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); | 154 | extern samsung_gpio_pull_t s3c_gpio_getpull(unsigned int pin); |
155 | 155 | ||
156 | /* configure `all` aspects of an gpio */ | 156 | /* configure `all` aspects of an gpio */ |
157 | 157 | ||
@@ -170,7 +170,7 @@ extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); | |||
170 | * @sa s3c_gpio_cfgpin_range | 170 | * @sa s3c_gpio_cfgpin_range |
171 | */ | 171 | */ |
172 | extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr, | 172 | extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr, |
173 | unsigned int cfg, s3c_gpio_pull_t pull); | 173 | unsigned int cfg, samsung_gpio_pull_t pull); |
174 | 174 | ||
175 | static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size, | 175 | static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size, |
176 | unsigned int cfg) | 176 | unsigned int cfg) |
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h index 8cad4cf19c3..1fe6917f6a2 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-core.h +++ b/arch/arm/plat-samsung/include/plat/gpio-core.h | |||
@@ -25,22 +25,22 @@ | |||
25 | * specific code. | 25 | * specific code. |
26 | */ | 26 | */ |
27 | 27 | ||
28 | struct s3c_gpio_chip; | 28 | struct samsung_gpio_chip; |
29 | 29 | ||
30 | /** | 30 | /** |
31 | * struct s3c_gpio_pm - power management (suspend/resume) information | 31 | * struct samsung_gpio_pm - power management (suspend/resume) information |
32 | * @save: Routine to save the state of the GPIO block | 32 | * @save: Routine to save the state of the GPIO block |
33 | * @resume: Routine to resume the GPIO block. | 33 | * @resume: Routine to resume the GPIO block. |
34 | */ | 34 | */ |
35 | struct s3c_gpio_pm { | 35 | struct samsung_gpio_pm { |
36 | void (*save)(struct s3c_gpio_chip *chip); | 36 | void (*save)(struct samsung_gpio_chip *chip); |
37 | void (*resume)(struct s3c_gpio_chip *chip); | 37 | void (*resume)(struct samsung_gpio_chip *chip); |
38 | }; | 38 | }; |
39 | 39 | ||
40 | struct s3c_gpio_cfg; | 40 | struct samsung_gpio_cfg; |
41 | 41 | ||
42 | /** | 42 | /** |
43 | * struct s3c_gpio_chip - wrapper for specific implementation of gpio | 43 | * struct samsung_gpio_chip - wrapper for specific implementation of gpio |
44 | * @chip: The chip structure to be exported via gpiolib. | 44 | * @chip: The chip structure to be exported via gpiolib. |
45 | * @base: The base pointer to the gpio configuration registers. | 45 | * @base: The base pointer to the gpio configuration registers. |
46 | * @group: The group register number for gpio interrupt support. | 46 | * @group: The group register number for gpio interrupt support. |
@@ -60,10 +60,10 @@ struct s3c_gpio_cfg; | |||
60 | * CPU cores trying to get one lock for different GPIO banks, where each | 60 | * CPU cores trying to get one lock for different GPIO banks, where each |
61 | * bank of GPIO has its own register space and configuration registers. | 61 | * bank of GPIO has its own register space and configuration registers. |
62 | */ | 62 | */ |
63 | struct s3c_gpio_chip { | 63 | struct samsung_gpio_chip { |
64 | struct gpio_chip chip; | 64 | struct gpio_chip chip; |
65 | struct s3c_gpio_cfg *config; | 65 | struct samsung_gpio_cfg *config; |
66 | struct s3c_gpio_pm *pm; | 66 | struct samsung_gpio_pm *pm; |
67 | void __iomem *base; | 67 | void __iomem *base; |
68 | int irq_base; | 68 | int irq_base; |
69 | int group; | 69 | int group; |
@@ -73,58 +73,11 @@ struct s3c_gpio_chip { | |||
73 | #endif | 73 | #endif |
74 | }; | 74 | }; |
75 | 75 | ||
76 | static inline struct s3c_gpio_chip *to_s3c_gpio(struct gpio_chip *gpc) | 76 | static inline struct samsung_gpio_chip *to_samsung_gpio(struct gpio_chip *gpc) |
77 | { | 77 | { |
78 | return container_of(gpc, struct s3c_gpio_chip, chip); | 78 | return container_of(gpc, struct samsung_gpio_chip, chip); |
79 | } | 79 | } |
80 | 80 | ||
81 | /** s3c_gpiolib_add() - add the s3c specific version of a gpio_chip. | ||
82 | * @chip: The chip to register | ||
83 | * | ||
84 | * This is a wrapper to gpiochip_add() that takes our specific gpio chip | ||
85 | * information and makes the necessary alterations for the platform and | ||
86 | * notes the information for use with the configuration systems and any | ||
87 | * other parts of the system. | ||
88 | */ | ||
89 | extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip); | ||
90 | |||
91 | /* CONFIG_S3C_GPIO_TRACK enables the tracking of the s3c specific gpios | ||
92 | * for use with the configuration calls, and other parts of the s3c gpiolib | ||
93 | * support code. | ||
94 | * | ||
95 | * Not all s3c support code will need this, as some configurations of cpu | ||
96 | * may only support one or two different configuration options and have an | ||
97 | * easy gpio to s3c_gpio_chip mapping function. If this is the case, then | ||
98 | * the machine support file should provide its own s3c_gpiolib_getchip() | ||
99 | * and any other necessary functions. | ||
100 | */ | ||
101 | |||
102 | /** | ||
103 | * samsung_gpiolib_add_4bit_chips - 4bit single register GPIO config. | ||
104 | * @chip: The gpio chip that is being configured. | ||
105 | * @nr_chips: The no of chips (gpio ports) for the GPIO being configured. | ||
106 | * | ||
107 | * This helper deal with the GPIO cases where the control register has 4 bits | ||
108 | * of control per GPIO, generally in the form of: | ||
109 | * 0000 = Input | ||
110 | * 0001 = Output | ||
111 | * others = Special functions (dependent on bank) | ||
112 | * | ||
113 | * Note, since the code to deal with the case where there are two control | ||
114 | * registers instead of one, we do not have a separate set of function | ||
115 | * (samsung_gpiolib_add_4bit2_chips)for each case. | ||
116 | */ | ||
117 | extern void samsung_gpiolib_add_4bit_chips(struct s3c_gpio_chip *chip, | ||
118 | int nr_chips); | ||
119 | extern void samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip, | ||
120 | int nr_chips); | ||
121 | extern void samsung_gpiolib_add_2bit_chips(struct s3c_gpio_chip *chip, | ||
122 | int nr_chips); | ||
123 | |||
124 | extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip); | ||
125 | extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip); | ||
126 | |||
127 | |||
128 | /** | 81 | /** |
129 | * samsung_gpiolib_to_irq - convert gpio pin to irq number | 82 | * samsung_gpiolib_to_irq - convert gpio pin to irq number |
130 | * @chip: The gpio chip that the pin belongs to. | 83 | * @chip: The gpio chip that the pin belongs to. |
@@ -136,36 +89,36 @@ extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip); | |||
136 | extern int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset); | 89 | extern int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset); |
137 | 90 | ||
138 | /* exported for core SoC support to change */ | 91 | /* exported for core SoC support to change */ |
139 | extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default; | 92 | extern struct samsung_gpio_cfg s3c24xx_gpiocfg_default; |
140 | 93 | ||
141 | #ifdef CONFIG_S3C_GPIO_TRACK | 94 | #ifdef CONFIG_S3C_GPIO_TRACK |
142 | extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END]; | 95 | extern struct samsung_gpio_chip *s3c_gpios[S3C_GPIO_END]; |
143 | 96 | ||
144 | static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int chip) | 97 | static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int chip) |
145 | { | 98 | { |
146 | return (chip < S3C_GPIO_END) ? s3c_gpios[chip] : NULL; | 99 | return (chip < S3C_GPIO_END) ? s3c_gpios[chip] : NULL; |
147 | } | 100 | } |
148 | #else | 101 | #else |
149 | /* machine specific code should provide s3c_gpiolib_getchip */ | 102 | /* machine specific code should provide samsung_gpiolib_getchip */ |
150 | 103 | ||
151 | #include <mach/gpio-track.h> | 104 | #include <mach/gpio-track.h> |
152 | 105 | ||
153 | static inline void s3c_gpiolib_track(struct s3c_gpio_chip *chip) { } | 106 | static inline void s3c_gpiolib_track(struct samsung_gpio_chip *chip) { } |
154 | #endif | 107 | #endif |
155 | 108 | ||
156 | #ifdef CONFIG_PM | 109 | #ifdef CONFIG_PM |
157 | extern struct s3c_gpio_pm s3c_gpio_pm_1bit; | 110 | extern struct samsung_gpio_pm samsung_gpio_pm_1bit; |
158 | extern struct s3c_gpio_pm s3c_gpio_pm_2bit; | 111 | extern struct samsung_gpio_pm samsung_gpio_pm_2bit; |
159 | extern struct s3c_gpio_pm s3c_gpio_pm_4bit; | 112 | extern struct samsung_gpio_pm samsung_gpio_pm_4bit; |
160 | #define __gpio_pm(x) x | 113 | #define __gpio_pm(x) x |
161 | #else | 114 | #else |
162 | #define s3c_gpio_pm_1bit NULL | 115 | #define samsung_gpio_pm_1bit NULL |
163 | #define s3c_gpio_pm_2bit NULL | 116 | #define samsung_gpio_pm_2bit NULL |
164 | #define s3c_gpio_pm_4bit NULL | 117 | #define samsung_gpio_pm_4bit NULL |
165 | #define __gpio_pm(x) NULL | 118 | #define __gpio_pm(x) NULL |
166 | 119 | ||
167 | #endif /* CONFIG_PM */ | 120 | #endif /* CONFIG_PM */ |
168 | 121 | ||
169 | /* locking wrappers to deal with multiple access to the same gpio bank */ | 122 | /* locking wrappers to deal with multiple access to the same gpio bank */ |
170 | #define s3c_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl) | 123 | #define samsung_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl) |
171 | #define s3c_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl) | 124 | #define samsung_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl) |
diff --git a/arch/arm/plat-samsung/include/plat/gpio-fns.h b/arch/arm/plat-samsung/include/plat/gpio-fns.h new file mode 100644 index 00000000000..bab13920176 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/gpio-fns.h | |||
@@ -0,0 +1,98 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/gpio-fns.h | ||
2 | * | ||
3 | * Copyright (c) 2003-2009 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C2410 - hardware | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __MACH_GPIO_FNS_H | ||
14 | #define __MACH_GPIO_FNS_H __FILE__ | ||
15 | |||
16 | /* These functions are in the to-be-removed category and it is strongly | ||
17 | * encouraged not to use these in new code. They will be marked deprecated | ||
18 | * very soon. | ||
19 | * | ||
20 | * Most of the functionality can be either replaced by the gpiocfg calls | ||
21 | * for the s3c platform or by the generic GPIOlib API. | ||
22 | * | ||
23 | * As of 2.6.35-rc, these will be removed, with the few drivers using them | ||
24 | * either replaced or given a wrapper until the calls can be removed. | ||
25 | */ | ||
26 | |||
27 | #include <plat/gpio-cfg.h> | ||
28 | |||
29 | static inline void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int cfg) | ||
30 | { | ||
31 | /* 1:1 mapping between cfgpin and setcfg calls at the moment */ | ||
32 | s3c_gpio_cfgpin(pin, cfg); | ||
33 | } | ||
34 | |||
35 | /* external functions for GPIO support | ||
36 | * | ||
37 | * These allow various different clients to access the same GPIO | ||
38 | * registers without conflicting. If your driver only owns the entire | ||
39 | * GPIO register, then it is safe to ioremap/__raw_{read|write} to it. | ||
40 | */ | ||
41 | |||
42 | extern unsigned int s3c2410_gpio_getcfg(unsigned int pin); | ||
43 | |||
44 | /* s3c2410_gpio_getirq | ||
45 | * | ||
46 | * turn the given pin number into the corresponding IRQ number | ||
47 | * | ||
48 | * returns: | ||
49 | * < 0 = no interrupt for this pin | ||
50 | * >=0 = interrupt number for the pin | ||
51 | */ | ||
52 | |||
53 | extern int s3c2410_gpio_getirq(unsigned int pin); | ||
54 | |||
55 | /* s3c2410_gpio_irqfilter | ||
56 | * | ||
57 | * set the irq filtering on the given pin | ||
58 | * | ||
59 | * on = 0 => disable filtering | ||
60 | * 1 => enable filtering | ||
61 | * | ||
62 | * config = S3C2410_EINTFLT_PCLK or S3C2410_EINTFLT_EXTCLK orred with | ||
63 | * width of filter (0 through 63) | ||
64 | * | ||
65 | * | ||
66 | */ | ||
67 | |||
68 | extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, | ||
69 | unsigned int config); | ||
70 | |||
71 | /* s3c2410_gpio_pullup | ||
72 | * | ||
73 | * This call should be replaced with s3c_gpio_setpull(). | ||
74 | * | ||
75 | * As a note, there is currently no distinction between pull-up and pull-down | ||
76 | * in the s3c24xx series devices with only an on/off configuration. | ||
77 | */ | ||
78 | |||
79 | /* s3c2410_gpio_pullup | ||
80 | * | ||
81 | * configure the pull-up control on the given pin | ||
82 | * | ||
83 | * to = 1 => disable the pull-up | ||
84 | * 0 => enable the pull-up | ||
85 | * | ||
86 | * eg; | ||
87 | * | ||
88 | * s3c2410_gpio_pullup(S3C2410_GPB(0), 0); | ||
89 | * s3c2410_gpio_pullup(S3C2410_GPE(8), 0); | ||
90 | */ | ||
91 | |||
92 | extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to); | ||
93 | |||
94 | extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to); | ||
95 | |||
96 | extern unsigned int s3c2410_gpio_getpin(unsigned int pin); | ||
97 | |||
98 | #endif /* __MACH_GPIO_FNS_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/iic.h b/arch/arm/plat-samsung/include/plat/iic.h index 56b0059439e..51d52e767a1 100644 --- a/arch/arm/plat-samsung/include/plat/iic.h +++ b/arch/arm/plat-samsung/include/plat/iic.h | |||
@@ -60,6 +60,7 @@ extern void s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *i2c); | |||
60 | extern void s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *i2c); | 60 | extern void s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *i2c); |
61 | extern void s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *i2c); | 61 | extern void s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *i2c); |
62 | extern void s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *i2c); | 62 | extern void s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *i2c); |
63 | extern void s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *i2c); | ||
63 | 64 | ||
64 | /* defined by architecture to configure gpio */ | 65 | /* defined by architecture to configure gpio */ |
65 | extern void s3c_i2c0_cfg_gpio(struct platform_device *dev); | 66 | extern void s3c_i2c0_cfg_gpio(struct platform_device *dev); |
diff --git a/arch/arm/plat-s3c24xx/include/plat/irq.h b/arch/arm/plat-samsung/include/plat/irq.h index ec087d6054b..e21a89bc26c 100644 --- a/arch/arm/plat-s3c24xx/include/plat/irq.h +++ b/arch/arm/plat-samsung/include/plat/irq.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/irq.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/irq.h |
2 | * | 2 | * |
3 | * Copyright (c) 2004-2005 Simtec Electronics | 3 | * Copyright (c) 2004-2005 Simtec Electronics |
4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
@@ -25,9 +25,9 @@ | |||
25 | extern struct irq_chip s3c_irq_level_chip; | 25 | extern struct irq_chip s3c_irq_level_chip; |
26 | extern struct irq_chip s3c_irq_chip; | 26 | extern struct irq_chip s3c_irq_chip; |
27 | 27 | ||
28 | static inline void | 28 | static inline void s3c_irqsub_mask(unsigned int irqno, |
29 | s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit, | 29 | unsigned int parentbit, |
30 | int subcheck) | 30 | int subcheck) |
31 | { | 31 | { |
32 | unsigned long mask; | 32 | unsigned long mask; |
33 | unsigned long submask; | 33 | unsigned long submask; |
@@ -39,17 +39,16 @@ s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit, | |||
39 | 39 | ||
40 | /* check to see if we need to mask the parent IRQ */ | 40 | /* check to see if we need to mask the parent IRQ */ |
41 | 41 | ||
42 | if ((submask & subcheck) == subcheck) { | 42 | if ((submask & subcheck) == subcheck) |
43 | __raw_writel(mask | parentbit, S3C2410_INTMSK); | 43 | __raw_writel(mask | parentbit, S3C2410_INTMSK); |
44 | } | ||
45 | 44 | ||
46 | /* write back masks */ | 45 | /* write back masks */ |
47 | __raw_writel(submask, S3C2410_INTSUBMSK); | 46 | __raw_writel(submask, S3C2410_INTSUBMSK); |
48 | 47 | ||
49 | } | 48 | } |
50 | 49 | ||
51 | static inline void | 50 | static inline void s3c_irqsub_unmask(unsigned int irqno, |
52 | s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit) | 51 | unsigned int parentbit) |
53 | { | 52 | { |
54 | unsigned long mask; | 53 | unsigned long mask; |
55 | unsigned long submask; | 54 | unsigned long submask; |
@@ -66,8 +65,9 @@ s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit) | |||
66 | } | 65 | } |
67 | 66 | ||
68 | 67 | ||
69 | static inline void | 68 | static inline void s3c_irqsub_maskack(unsigned int irqno, |
70 | s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group) | 69 | unsigned int parentmask, |
70 | unsigned int group) | ||
71 | { | 71 | { |
72 | unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0); | 72 | unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0); |
73 | 73 | ||
@@ -86,8 +86,9 @@ s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int gro | |||
86 | } | 86 | } |
87 | } | 87 | } |
88 | 88 | ||
89 | static inline void | 89 | static inline void s3c_irqsub_ack(unsigned int irqno, |
90 | s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group) | 90 | unsigned int parentmask, |
91 | unsigned int group) | ||
91 | { | 92 | { |
92 | unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0); | 93 | unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0); |
93 | 94 | ||
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h index 144dbfc6506..08d1a7ef97b 100644 --- a/arch/arm/plat-s5p/include/plat/irqs.h +++ b/arch/arm/plat-samsung/include/plat/irqs.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/arch/arm/plat-s5p/include/plat/irqs.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/irqs.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
@@ -10,8 +10,8 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #ifndef __ASM_PLAT_S5P_IRQS_H | 13 | #ifndef __PLAT_SAMSUNG_IRQS_H |
14 | #define __ASM_PLAT_S5P_IRQS_H __FILE__ | 14 | #define __PLAT_SAMSUNG_IRQS_H __FILE__ |
15 | 15 | ||
16 | /* we keep the first set of CPU IRQs out of the range of | 16 | /* we keep the first set of CPU IRQs out of the range of |
17 | * the ISA space, so that the PC104 has them to itself | 17 | * the ISA space, so that the PC104 has them to itself |
@@ -77,4 +77,4 @@ | |||
77 | #define S5P_IRQ_TYPE_EDGE_RISING (0x03) | 77 | #define S5P_IRQ_TYPE_EDGE_RISING (0x03) |
78 | #define S5P_IRQ_TYPE_EDGE_BOTH (0x04) | 78 | #define S5P_IRQ_TYPE_EDGE_BOTH (0x04) |
79 | 79 | ||
80 | #endif /* __ASM_PLAT_S5P_IRQS_H */ | 80 | #endif /* __PLAT_SAMSUNG_IRQS_H */ |
diff --git a/arch/arm/plat-s3c24xx/include/plat/mci.h b/arch/arm/plat-samsung/include/plat/mci.h index 2ac2b21ec49..c42d3171194 100644 --- a/arch/arm/plat-s3c24xx/include/plat/mci.h +++ b/arch/arm/plat-samsung/include/plat/mci.h | |||
@@ -27,11 +27,11 @@ | |||
27 | * to a non-zero value, otherwise the default of 3.2-3.4V is used. | 27 | * to a non-zero value, otherwise the default of 3.2-3.4V is used. |
28 | */ | 28 | */ |
29 | struct s3c24xx_mci_pdata { | 29 | struct s3c24xx_mci_pdata { |
30 | unsigned int no_wprotect : 1; | 30 | unsigned int no_wprotect:1; |
31 | unsigned int no_detect : 1; | 31 | unsigned int no_detect:1; |
32 | unsigned int wprotect_invert : 1; | 32 | unsigned int wprotect_invert:1; |
33 | unsigned int detect_invert : 1; /* set => detect active high. */ | 33 | unsigned int detect_invert:1; /* set => detect active high */ |
34 | unsigned int use_dma : 1; | 34 | unsigned int use_dma:1; |
35 | 35 | ||
36 | unsigned int gpio_detect; | 36 | unsigned int gpio_detect; |
37 | unsigned int gpio_wprotect; | 37 | unsigned int gpio_wprotect; |
diff --git a/arch/arm/plat-s5p/include/plat/mfc.h b/arch/arm/plat-samsung/include/plat/mfc.h index 6697f8cb294..ac13227272f 100644 --- a/arch/arm/plat-s5p/include/plat/mfc.h +++ b/arch/arm/plat-samsung/include/plat/mfc.h | |||
@@ -7,8 +7,8 @@ | |||
7 | * option) any later version. | 7 | * option) any later version. |
8 | */ | 8 | */ |
9 | 9 | ||
10 | #ifndef __PLAT_S5P_MFC_H | 10 | #ifndef __PLAT_SAMSUNG_MFC_H |
11 | #define __PLAT_S5P_MFC_H | 11 | #define __PLAT_SAMSUNG_MFC_H __FILE__ |
12 | 12 | ||
13 | /** | 13 | /** |
14 | * s5p_mfc_reserve_mem - function to early reserve memory for MFC driver | 14 | * s5p_mfc_reserve_mem - function to early reserve memory for MFC driver |
@@ -24,4 +24,4 @@ | |||
24 | void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize, | 24 | void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize, |
25 | phys_addr_t lbase, unsigned int lsize); | 25 | phys_addr_t lbase, unsigned int lsize); |
26 | 26 | ||
27 | #endif /* __PLAT_S5P_MFC_H */ | 27 | #endif /* __PLAT_SAMSUNG_MFC_H */ |
diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-samsung/include/plat/mipi_csis.h index 9bd254c5ed2..c45b1e8d4c2 100644 --- a/arch/arm/plat-s5p/include/plat/mipi_csis.h +++ b/arch/arm/plat-samsung/include/plat/mipi_csis.h | |||
@@ -8,8 +8,8 @@ | |||
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #ifndef PLAT_S5P_MIPI_CSIS_H_ | 11 | #ifndef __PLAT_SAMSUNG_MIPI_CSIS_H_ |
12 | #define PLAT_S5P_MIPI_CSIS_H_ __FILE__ | 12 | #define __PLAT_SAMSUNG_MIPI_CSIS_H_ __FILE__ |
13 | 13 | ||
14 | struct platform_device; | 14 | struct platform_device; |
15 | 15 | ||
@@ -40,4 +40,4 @@ struct s5p_platform_mipi_csis { | |||
40 | */ | 40 | */ |
41 | int s5p_csis_phy_enable(struct platform_device *pdev, bool on); | 41 | int s5p_csis_phy_enable(struct platform_device *pdev, bool on); |
42 | 42 | ||
43 | #endif /* PLAT_S5P_MIPI_CSIS_H_ */ | 43 | #endif /* __PLAT_SAMSUNG_MIPI_CSIS_H_ */ |
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-samsung/include/plat/pll.h index 3e21b9444cc..357af7c1c66 100644 --- a/arch/arm/plat-s5p/include/plat/pll.h +++ b/arch/arm/plat-samsung/include/plat/pll.h | |||
@@ -1,11 +1,14 @@ | |||
1 | /* arch/arm/plat-s5p/include/plat/pll.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/pll.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
5 | * | 5 | * |
6 | * S5P PLL code | 6 | * Copyright 2008 Openmoko, Inc. |
7 | * Copyright 2008 Simtec Electronics | ||
8 | * Ben Dooks <ben@simtec.co.uk> | ||
9 | * http://armlinux.simtec.co.uk/ | ||
7 | * | 10 | * |
8 | * Based on arch/arm/plat-s3c64xx/include/plat/pll.h | 11 | * Samsung PLL codes |
9 | * | 12 | * |
10 | * This program is free software; you can redistribute it and/or modify | 13 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License version 2 as | 14 | * it under the terms of the GNU General Public License version 2 as |
@@ -14,6 +17,111 @@ | |||
14 | 17 | ||
15 | #include <asm/div64.h> | 18 | #include <asm/div64.h> |
16 | 19 | ||
20 | #define S3C24XX_PLL_MDIV_MASK (0xFF) | ||
21 | #define S3C24XX_PLL_PDIV_MASK (0x1F) | ||
22 | #define S3C24XX_PLL_SDIV_MASK (0x3) | ||
23 | #define S3C24XX_PLL_MDIV_SHIFT (12) | ||
24 | #define S3C24XX_PLL_PDIV_SHIFT (4) | ||
25 | #define S3C24XX_PLL_SDIV_SHIFT (0) | ||
26 | |||
27 | static inline unsigned int s3c24xx_get_pll(unsigned int pllval, | ||
28 | unsigned int baseclk) | ||
29 | { | ||
30 | unsigned int mdiv, pdiv, sdiv; | ||
31 | uint64_t fvco; | ||
32 | |||
33 | mdiv = (pllval >> S3C24XX_PLL_MDIV_SHIFT) & S3C24XX_PLL_MDIV_MASK; | ||
34 | pdiv = (pllval >> S3C24XX_PLL_PDIV_SHIFT) & S3C24XX_PLL_PDIV_MASK; | ||
35 | sdiv = (pllval >> S3C24XX_PLL_SDIV_SHIFT) & S3C24XX_PLL_SDIV_MASK; | ||
36 | |||
37 | fvco = (uint64_t)baseclk * (mdiv + 8); | ||
38 | do_div(fvco, (pdiv + 2) << sdiv); | ||
39 | |||
40 | return (unsigned int)fvco; | ||
41 | } | ||
42 | |||
43 | #define S3C2416_PLL_MDIV_MASK (0x3FF) | ||
44 | #define S3C2416_PLL_PDIV_MASK (0x3F) | ||
45 | #define S3C2416_PLL_SDIV_MASK (0x7) | ||
46 | #define S3C2416_PLL_MDIV_SHIFT (14) | ||
47 | #define S3C2416_PLL_PDIV_SHIFT (5) | ||
48 | #define S3C2416_PLL_SDIV_SHIFT (0) | ||
49 | |||
50 | static inline unsigned int s3c2416_get_pll(unsigned int pllval, | ||
51 | unsigned int baseclk) | ||
52 | { | ||
53 | unsigned int mdiv, pdiv, sdiv; | ||
54 | uint64_t fvco; | ||
55 | |||
56 | mdiv = (pllval >> S3C2416_PLL_MDIV_SHIFT) & S3C2416_PLL_MDIV_MASK; | ||
57 | pdiv = (pllval >> S3C2416_PLL_PDIV_SHIFT) & S3C2416_PLL_PDIV_MASK; | ||
58 | sdiv = (pllval >> S3C2416_PLL_SDIV_SHIFT) & S3C2416_PLL_SDIV_MASK; | ||
59 | |||
60 | fvco = (uint64_t)baseclk * mdiv; | ||
61 | do_div(fvco, (pdiv << sdiv)); | ||
62 | |||
63 | return (unsigned int)fvco; | ||
64 | } | ||
65 | |||
66 | #define S3C6400_PLL_MDIV_MASK (0x3FF) | ||
67 | #define S3C6400_PLL_PDIV_MASK (0x3F) | ||
68 | #define S3C6400_PLL_SDIV_MASK (0x7) | ||
69 | #define S3C6400_PLL_MDIV_SHIFT (16) | ||
70 | #define S3C6400_PLL_PDIV_SHIFT (8) | ||
71 | #define S3C6400_PLL_SDIV_SHIFT (0) | ||
72 | |||
73 | static inline unsigned long s3c6400_get_pll(unsigned long baseclk, | ||
74 | u32 pllcon) | ||
75 | { | ||
76 | u32 mdiv, pdiv, sdiv; | ||
77 | u64 fvco = baseclk; | ||
78 | |||
79 | mdiv = (pllcon >> S3C6400_PLL_MDIV_SHIFT) & S3C6400_PLL_MDIV_MASK; | ||
80 | pdiv = (pllcon >> S3C6400_PLL_PDIV_SHIFT) & S3C6400_PLL_PDIV_MASK; | ||
81 | sdiv = (pllcon >> S3C6400_PLL_SDIV_SHIFT) & S3C6400_PLL_SDIV_MASK; | ||
82 | |||
83 | fvco *= mdiv; | ||
84 | do_div(fvco, (pdiv << sdiv)); | ||
85 | |||
86 | return (unsigned long)fvco; | ||
87 | } | ||
88 | |||
89 | #define PLL6553X_MDIV_MASK (0x7F) | ||
90 | #define PLL6553X_PDIV_MASK (0x1F) | ||
91 | #define PLL6553X_SDIV_MASK (0x3) | ||
92 | #define PLL6553X_KDIV_MASK (0xFFFF) | ||
93 | #define PLL6553X_MDIV_SHIFT (16) | ||
94 | #define PLL6553X_PDIV_SHIFT (8) | ||
95 | #define PLL6553X_SDIV_SHIFT (0) | ||
96 | |||
97 | static inline unsigned long s3c_get_pll6553x(unsigned long baseclk, | ||
98 | u32 pll_con0, u32 pll_con1) | ||
99 | { | ||
100 | unsigned long result; | ||
101 | u32 mdiv, pdiv, sdiv, kdiv; | ||
102 | u64 tmp; | ||
103 | |||
104 | mdiv = (pll_con0 >> PLL6553X_MDIV_SHIFT) & PLL6553X_MDIV_MASK; | ||
105 | pdiv = (pll_con0 >> PLL6553X_PDIV_SHIFT) & PLL6553X_PDIV_MASK; | ||
106 | sdiv = (pll_con0 >> PLL6553X_SDIV_SHIFT) & PLL6553X_SDIV_MASK; | ||
107 | kdiv = pll_con1 & PLL6553X_KDIV_MASK; | ||
108 | |||
109 | /* | ||
110 | * We need to multiple baseclk by mdiv (the integer part) and kdiv | ||
111 | * which is in 2^16ths, so shift mdiv up (does not overflow) and | ||
112 | * add kdiv before multiplying. The use of tmp is to avoid any | ||
113 | * overflows before shifting bac down into result when multipling | ||
114 | * by the mdiv and kdiv pair. | ||
115 | */ | ||
116 | |||
117 | tmp = baseclk; | ||
118 | tmp *= (mdiv << 16) + kdiv; | ||
119 | do_div(tmp, (pdiv << sdiv)); | ||
120 | result = tmp >> 16; | ||
121 | |||
122 | return result; | ||
123 | } | ||
124 | |||
17 | #define PLL35XX_MDIV_MASK (0x3FF) | 125 | #define PLL35XX_MDIV_MASK (0x3FF) |
18 | #define PLL35XX_PDIV_MASK (0x3F) | 126 | #define PLL35XX_PDIV_MASK (0x3F) |
19 | #define PLL35XX_SDIV_MASK (0x7) | 127 | #define PLL35XX_SDIV_MASK (0x7) |
@@ -97,15 +205,24 @@ static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con, | |||
97 | return (unsigned long)fvco; | 205 | return (unsigned long)fvco; |
98 | } | 206 | } |
99 | 207 | ||
100 | #define PLL46XX_KDIV_MASK (0xFFFF) | 208 | /* CON0 bit-fields */ |
101 | #define PLL4650C_KDIV_MASK (0xFFF) | ||
102 | #define PLL46XX_MDIV_MASK (0x1FF) | 209 | #define PLL46XX_MDIV_MASK (0x1FF) |
103 | #define PLL46XX_PDIV_MASK (0x3F) | 210 | #define PLL46XX_PDIV_MASK (0x3F) |
104 | #define PLL46XX_SDIV_MASK (0x7) | 211 | #define PLL46XX_SDIV_MASK (0x7) |
212 | #define PLL46XX_LOCKED_SHIFT (29) | ||
105 | #define PLL46XX_MDIV_SHIFT (16) | 213 | #define PLL46XX_MDIV_SHIFT (16) |
106 | #define PLL46XX_PDIV_SHIFT (8) | 214 | #define PLL46XX_PDIV_SHIFT (8) |
107 | #define PLL46XX_SDIV_SHIFT (0) | 215 | #define PLL46XX_SDIV_SHIFT (0) |
108 | 216 | ||
217 | /* CON1 bit-fields */ | ||
218 | #define PLL46XX_MRR_MASK (0x1F) | ||
219 | #define PLL46XX_MFR_MASK (0x3F) | ||
220 | #define PLL46XX_KDIV_MASK (0xFFFF) | ||
221 | #define PLL4650C_KDIV_MASK (0xFFF) | ||
222 | #define PLL46XX_MRR_SHIFT (24) | ||
223 | #define PLL46XX_MFR_SHIFT (16) | ||
224 | #define PLL46XX_KDIV_SHIFT (0) | ||
225 | |||
109 | enum pll46xx_type_t { | 226 | enum pll46xx_type_t { |
110 | pll_4600, | 227 | pll_4600, |
111 | pll_4650, | 228 | pll_4650, |
@@ -123,6 +240,7 @@ static inline unsigned long s5p_get_pll46xx(unsigned long baseclk, | |||
123 | mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK; | 240 | mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK; |
124 | pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK; | 241 | pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK; |
125 | sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK; | 242 | sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK; |
243 | kdiv = pll_con1 & PLL46XX_KDIV_MASK; | ||
126 | 244 | ||
127 | if (pll_type == pll_4650c) | 245 | if (pll_type == pll_4650c) |
128 | kdiv = pll_con1 & PLL4650C_KDIV_MASK; | 246 | kdiv = pll_con1 & PLL4650C_KDIV_MASK; |
@@ -148,6 +266,7 @@ static inline unsigned long s5p_get_pll46xx(unsigned long baseclk, | |||
148 | #define PLL90XX_PDIV_MASK (0x3F) | 266 | #define PLL90XX_PDIV_MASK (0x3F) |
149 | #define PLL90XX_SDIV_MASK (0x7) | 267 | #define PLL90XX_SDIV_MASK (0x7) |
150 | #define PLL90XX_KDIV_MASK (0xffff) | 268 | #define PLL90XX_KDIV_MASK (0xffff) |
269 | #define PLL90XX_LOCKED_SHIFT (29) | ||
151 | #define PLL90XX_MDIV_SHIFT (16) | 270 | #define PLL90XX_MDIV_SHIFT (16) |
152 | #define PLL90XX_PDIV_SHIFT (8) | 271 | #define PLL90XX_PDIV_SHIFT (8) |
153 | #define PLL90XX_SDIV_SHIFT (0) | 272 | #define PLL90XX_SDIV_SHIFT (0) |
@@ -165,7 +284,8 @@ static inline unsigned long s5p_get_pll90xx(unsigned long baseclk, | |||
165 | sdiv = (pll_con >> PLL90XX_SDIV_SHIFT) & PLL90XX_SDIV_MASK; | 284 | sdiv = (pll_con >> PLL90XX_SDIV_SHIFT) & PLL90XX_SDIV_MASK; |
166 | kdiv = pll_conk & PLL90XX_KDIV_MASK; | 285 | kdiv = pll_conk & PLL90XX_KDIV_MASK; |
167 | 286 | ||
168 | /* We need to multiple baseclk by mdiv (the integer part) and kdiv | 287 | /* |
288 | * We need to multiple baseclk by mdiv (the integer part) and kdiv | ||
169 | * which is in 2^16ths, so shift mdiv up (does not overflow) and | 289 | * which is in 2^16ths, so shift mdiv up (does not overflow) and |
170 | * add kdiv before multiplying. The use of tmp is to avoid any | 290 | * add kdiv before multiplying. The use of tmp is to avoid any |
171 | * overflows before shifting bac down into result when multipling | 291 | * overflows before shifting bac down into result when multipling |
diff --git a/arch/arm/plat-samsung/include/plat/pll6553x.h b/arch/arm/plat-samsung/include/plat/pll6553x.h deleted file mode 100644 index b8b7e1d884f..00000000000 --- a/arch/arm/plat-samsung/include/plat/pll6553x.h +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | /* arch/arm/plat-samsung/include/plat/pll6553x.h | ||
2 | * partially from arch/arm/mach-s3c64xx/include/mach/pll.h | ||
3 | * | ||
4 | * Copyright 2008 Openmoko, Inc. | ||
5 | * Copyright 2008 Simtec Electronics | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * http://armlinux.simtec.co.uk/ | ||
8 | * | ||
9 | * Samsung PLL6553x PLL code | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License version 2 as | ||
13 | * published by the Free Software Foundation. | ||
14 | */ | ||
15 | |||
16 | /* S3C6400 and compatible (S3C2416, etc.) EPLL code */ | ||
17 | |||
18 | #define PLL6553X_MDIV_MASK ((1 << (23-16)) - 1) | ||
19 | #define PLL6553X_PDIV_MASK ((1 << (13-8)) - 1) | ||
20 | #define PLL6553X_SDIV_MASK ((1 << (2-0)) - 1) | ||
21 | #define PLL6553X_MDIV_SHIFT (16) | ||
22 | #define PLL6553X_PDIV_SHIFT (8) | ||
23 | #define PLL6553X_SDIV_SHIFT (0) | ||
24 | #define PLL6553X_KDIV_MASK (0xffff) | ||
25 | |||
26 | static inline unsigned long s3c_get_pll6553x(unsigned long baseclk, | ||
27 | u32 pll0, u32 pll1) | ||
28 | { | ||
29 | unsigned long result; | ||
30 | u32 mdiv, pdiv, sdiv, kdiv; | ||
31 | u64 tmp; | ||
32 | |||
33 | mdiv = (pll0 >> PLL6553X_MDIV_SHIFT) & PLL6553X_MDIV_MASK; | ||
34 | pdiv = (pll0 >> PLL6553X_PDIV_SHIFT) & PLL6553X_PDIV_MASK; | ||
35 | sdiv = (pll0 >> PLL6553X_SDIV_SHIFT) & PLL6553X_SDIV_MASK; | ||
36 | kdiv = pll1 & PLL6553X_KDIV_MASK; | ||
37 | |||
38 | /* We need to multiple baseclk by mdiv (the integer part) and kdiv | ||
39 | * which is in 2^16ths, so shift mdiv up (does not overflow) and | ||
40 | * add kdiv before multiplying. The use of tmp is to avoid any | ||
41 | * overflows before shifting bac down into result when multipling | ||
42 | * by the mdiv and kdiv pair. | ||
43 | */ | ||
44 | |||
45 | tmp = baseclk; | ||
46 | tmp *= (mdiv << 16) + kdiv; | ||
47 | do_div(tmp, (pdiv << sdiv)); | ||
48 | result = tmp >> 16; | ||
49 | |||
50 | return result; | ||
51 | } | ||
diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h index f6749916d19..dcf68709f9c 100644 --- a/arch/arm/plat-samsung/include/plat/pm.h +++ b/arch/arm/plat-samsung/include/plat/pm.h | |||
@@ -165,20 +165,20 @@ extern void s3c_pm_check_store(void); | |||
165 | extern void s3c_pm_configure_extint(void); | 165 | extern void s3c_pm_configure_extint(void); |
166 | 166 | ||
167 | /** | 167 | /** |
168 | * s3c_pm_restore_gpios() - restore the state of the gpios after sleep. | 168 | * samsung_pm_restore_gpios() - restore the state of the gpios after sleep. |
169 | * | 169 | * |
170 | * Restore the state of the GPIO pins after sleep, which may involve ensuring | 170 | * Restore the state of the GPIO pins after sleep, which may involve ensuring |
171 | * that we do not glitch the state of the pins from that the bootloader's | 171 | * that we do not glitch the state of the pins from that the bootloader's |
172 | * resume code has done. | 172 | * resume code has done. |
173 | */ | 173 | */ |
174 | extern void s3c_pm_restore_gpios(void); | 174 | extern void samsung_pm_restore_gpios(void); |
175 | 175 | ||
176 | /** | 176 | /** |
177 | * s3c_pm_save_gpios() - save the state of the GPIOs for restoring after sleep. | 177 | * samsung_pm_save_gpios() - save the state of the GPIOs for restoring after sleep. |
178 | * | 178 | * |
179 | * Save the GPIO states for resotration on resume. See s3c_pm_restore_gpios(). | 179 | * Save the GPIO states for resotration on resume. See samsung_pm_restore_gpios(). |
180 | */ | 180 | */ |
181 | extern void s3c_pm_save_gpios(void); | 181 | extern void samsung_pm_save_gpios(void); |
182 | 182 | ||
183 | extern void s3c_pm_save_core(void); | 183 | extern void s3c_pm_save_core(void); |
184 | extern void s3c_pm_restore_core(void); | 184 | extern void s3c_pm_restore_core(void); |
diff --git a/arch/arm/mach-exynos4/include/mach/pwm-clock.h b/arch/arm/plat-samsung/include/plat/pwm-clock.h index 8e12090287b..bf6a60eb623 100644 --- a/arch/arm/mach-exynos4/include/mach/pwm-clock.h +++ b/arch/arm/plat-samsung/include/plat/pwm-clock.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/include/mach/pwm-clock.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/pwm-clock.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
@@ -8,17 +8,15 @@ | |||
8 | * Ben Dooks <ben@simtec.co.uk> | 8 | * Ben Dooks <ben@simtec.co.uk> |
9 | * http://armlinux.simtec.co.uk/ | 9 | * http://armlinux.simtec.co.uk/ |
10 | * | 10 | * |
11 | * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h | 11 | * SAMSUNG - pwm clock and timer support |
12 | * | ||
13 | * EXYNOS4 - pwm clock and timer support | ||
14 | * | 12 | * |
15 | * This program is free software; you can redistribute it and/or modify | 13 | * This program is free software; you can redistribute it and/or modify |
16 | * it under the terms of the GNU General Public License version 2 as | 14 | * it under the terms of the GNU General Public License version 2 as |
17 | * published by the Free Software Foundation. | 15 | * published by the Free Software Foundation. |
18 | */ | 16 | */ |
19 | 17 | ||
20 | #ifndef __ASM_ARCH_PWMCLK_H | 18 | #ifndef __ASM_PLAT_PWM_CLOCK_H |
21 | #define __ASM_ARCH_PWMCLK_H __FILE__ | 19 | #define __ASM_PLAT_PWM_CLOCK_H __FILE__ |
22 | 20 | ||
23 | /** | 21 | /** |
24 | * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk | 22 | * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk |
@@ -29,7 +27,14 @@ | |||
29 | */ | 27 | */ |
30 | static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) | 28 | static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) |
31 | { | 29 | { |
32 | return tcfg == S3C64XX_TCFG1_MUX_TCLK; | 30 | if (soc_is_s3c24xx()) |
31 | return tcfg == S3C2410_TCFG1_MUX_TCLK; | ||
32 | else if (soc_is_s3c64xx() || soc_is_s5pc100()) | ||
33 | return tcfg >= S3C64XX_TCFG1_MUX_TCLK; | ||
34 | else if (soc_is_s5p6440() || soc_is_s5p6450()) | ||
35 | return 0; | ||
36 | else | ||
37 | return tcfg == S3C64XX_TCFG1_MUX_TCLK; | ||
33 | } | 38 | } |
34 | 39 | ||
35 | /** | 40 | /** |
@@ -41,7 +46,10 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) | |||
41 | */ | 46 | */ |
42 | static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) | 47 | static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) |
43 | { | 48 | { |
44 | return 1 << tcfg1; | 49 | if (soc_is_s3c24xx()) |
50 | return 1 << (tcfg1 + 1); | ||
51 | else | ||
52 | return 1 << tcfg1; | ||
45 | } | 53 | } |
46 | 54 | ||
47 | /** | 55 | /** |
@@ -51,7 +59,10 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) | |||
51 | */ | 59 | */ |
52 | static inline unsigned int pwm_tdiv_has_div1(void) | 60 | static inline unsigned int pwm_tdiv_has_div1(void) |
53 | { | 61 | { |
54 | return 1; | 62 | if (soc_is_s3c24xx()) |
63 | return 0; | ||
64 | else | ||
65 | return 1; | ||
55 | } | 66 | } |
56 | 67 | ||
57 | /** | 68 | /** |
@@ -62,9 +73,9 @@ static inline unsigned int pwm_tdiv_has_div1(void) | |||
62 | */ | 73 | */ |
63 | static inline unsigned long pwm_tdiv_div_bits(unsigned int div) | 74 | static inline unsigned long pwm_tdiv_div_bits(unsigned int div) |
64 | { | 75 | { |
65 | return ilog2(div); | 76 | if (soc_is_s3c24xx()) |
77 | return ilog2(div) - 1; | ||
78 | else | ||
79 | return ilog2(div); | ||
66 | } | 80 | } |
67 | 81 | #endif /* __ASM_PLAT_PWM_CLOCK_H */ | |
68 | #define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK | ||
69 | |||
70 | #endif /* __ASM_ARCH_PWMCLK_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/regs-adc.h b/arch/arm/plat-samsung/include/plat/regs-adc.h index 035e8c38d69..70612100120 100644 --- a/arch/arm/plat-samsung/include/plat/regs-adc.h +++ b/arch/arm/plat-samsung/include/plat/regs-adc.h | |||
@@ -20,6 +20,7 @@ | |||
20 | #define S3C2410_ADCDAT0 S3C2410_ADCREG(0x0C) | 20 | #define S3C2410_ADCDAT0 S3C2410_ADCREG(0x0C) |
21 | #define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10) | 21 | #define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10) |
22 | #define S3C64XX_ADCUPDN S3C2410_ADCREG(0x14) | 22 | #define S3C64XX_ADCUPDN S3C2410_ADCREG(0x14) |
23 | #define S3C2443_ADCMUX S3C2410_ADCREG(0x18) | ||
23 | #define S3C64XX_ADCCLRINT S3C2410_ADCREG(0x18) | 24 | #define S3C64XX_ADCCLRINT S3C2410_ADCREG(0x18) |
24 | #define S5P_ADCMUX S3C2410_ADCREG(0x1C) | 25 | #define S5P_ADCMUX S3C2410_ADCREG(0x1C) |
25 | #define S3C64XX_ADCCLRINTPNDNUP S3C2410_ADCREG(0x20) | 26 | #define S3C64XX_ADCCLRINTPNDNUP S3C2410_ADCREG(0x20) |
@@ -33,6 +34,7 @@ | |||
33 | #define S3C2410_ADCCON_PRSCVLMASK (0xFF<<6) | 34 | #define S3C2410_ADCCON_PRSCVLMASK (0xFF<<6) |
34 | #define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3) | 35 | #define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3) |
35 | #define S3C2410_ADCCON_MUXMASK (0x7<<3) | 36 | #define S3C2410_ADCCON_MUXMASK (0x7<<3) |
37 | #define S3C2416_ADCCON_RESSEL (1 << 3) | ||
36 | #define S3C2410_ADCCON_STDBM (1<<2) | 38 | #define S3C2410_ADCCON_STDBM (1<<2) |
37 | #define S3C2410_ADCCON_READ_START (1<<1) | 39 | #define S3C2410_ADCCON_READ_START (1<<1) |
38 | #define S3C2410_ADCCON_ENABLE_START (1<<0) | 40 | #define S3C2410_ADCCON_ENABLE_START (1<<0) |
@@ -40,6 +42,7 @@ | |||
40 | 42 | ||
41 | 43 | ||
42 | /* ADCTSC Register Bits */ | 44 | /* ADCTSC Register Bits */ |
45 | #define S3C2443_ADCTSC_UD_SEN (1 << 8) | ||
43 | #define S3C2410_ADCTSC_YM_SEN (1<<7) | 46 | #define S3C2410_ADCTSC_YM_SEN (1<<7) |
44 | #define S3C2410_ADCTSC_YP_SEN (1<<6) | 47 | #define S3C2410_ADCTSC_YP_SEN (1<<6) |
45 | #define S3C2410_ADCTSC_XM_SEN (1<<5) | 48 | #define S3C2410_ADCTSC_XM_SEN (1<<5) |
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-dma.h b/arch/arm/plat-samsung/include/plat/regs-dma.h index 1b0f4c36d38..178bccbe480 100644 --- a/arch/arm/plat-s3c24xx/include/plat/regs-dma.h +++ b/arch/arm/plat-samsung/include/plat/regs-dma.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/dma.h | 1 | /* arch/arm/plat-samsung/include/plat/regs-dma.h |
2 | * | 2 | * |
3 | * Copyright (C) 2003-2006 Simtec Electronics | 3 | * Copyright (C) 2003-2006 Simtec Electronics |
4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
@@ -10,7 +10,8 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | /* DMA Register definitions */ | 13 | #ifndef __ASM_PLAT_REGS_DMA_H |
14 | #define __ASM_PLAT_REGS_DMA_H __FILE__ | ||
14 | 15 | ||
15 | #define S3C2410_DMA_DISRC (0x00) | 16 | #define S3C2410_DMA_DISRC (0x00) |
16 | #define S3C2410_DMA_DISRCC (0x04) | 17 | #define S3C2410_DMA_DISRCC (0x04) |
@@ -24,74 +25,75 @@ | |||
24 | #define S3C2412_DMA_DMAREQSEL (0x24) | 25 | #define S3C2412_DMA_DMAREQSEL (0x24) |
25 | #define S3C2443_DMA_DMAREQSEL (0x24) | 26 | #define S3C2443_DMA_DMAREQSEL (0x24) |
26 | 27 | ||
27 | #define S3C2410_DISRCC_INC (1<<0) | 28 | #define S3C2410_DISRCC_INC (1 << 0) |
28 | #define S3C2410_DISRCC_APB (1<<1) | 29 | #define S3C2410_DISRCC_APB (1 << 1) |
29 | 30 | ||
30 | #define S3C2410_DMASKTRIG_STOP (1<<2) | 31 | #define S3C2410_DMASKTRIG_STOP (1 << 2) |
31 | #define S3C2410_DMASKTRIG_ON (1<<1) | 32 | #define S3C2410_DMASKTRIG_ON (1 << 1) |
32 | #define S3C2410_DMASKTRIG_SWTRIG (1<<0) | 33 | #define S3C2410_DMASKTRIG_SWTRIG (1 << 0) |
33 | 34 | ||
34 | #define S3C2410_DCON_DEMAND (0<<31) | 35 | #define S3C2410_DCON_DEMAND (0 << 31) |
35 | #define S3C2410_DCON_HANDSHAKE (1<<31) | 36 | #define S3C2410_DCON_HANDSHAKE (1 << 31) |
36 | #define S3C2410_DCON_SYNC_PCLK (0<<30) | 37 | #define S3C2410_DCON_SYNC_PCLK (0 << 30) |
37 | #define S3C2410_DCON_SYNC_HCLK (1<<30) | 38 | #define S3C2410_DCON_SYNC_HCLK (1 << 30) |
38 | 39 | ||
39 | #define S3C2410_DCON_INTREQ (1<<29) | 40 | #define S3C2410_DCON_INTREQ (1 << 29) |
40 | 41 | ||
41 | #define S3C2410_DCON_CH0_XDREQ0 (0<<24) | 42 | #define S3C2410_DCON_CH0_XDREQ0 (0 << 24) |
42 | #define S3C2410_DCON_CH0_UART0 (1<<24) | 43 | #define S3C2410_DCON_CH0_UART0 (1 << 24) |
43 | #define S3C2410_DCON_CH0_SDI (2<<24) | 44 | #define S3C2410_DCON_CH0_SDI (2 << 24) |
44 | #define S3C2410_DCON_CH0_TIMER (3<<24) | 45 | #define S3C2410_DCON_CH0_TIMER (3 << 24) |
45 | #define S3C2410_DCON_CH0_USBEP1 (4<<24) | 46 | #define S3C2410_DCON_CH0_USBEP1 (4 << 24) |
46 | 47 | ||
47 | #define S3C2410_DCON_CH1_XDREQ1 (0<<24) | 48 | #define S3C2410_DCON_CH1_XDREQ1 (0 << 24) |
48 | #define S3C2410_DCON_CH1_UART1 (1<<24) | 49 | #define S3C2410_DCON_CH1_UART1 (1 << 24) |
49 | #define S3C2410_DCON_CH1_I2SSDI (2<<24) | 50 | #define S3C2410_DCON_CH1_I2SSDI (2 << 24) |
50 | #define S3C2410_DCON_CH1_SPI (3<<24) | 51 | #define S3C2410_DCON_CH1_SPI (3 << 24) |
51 | #define S3C2410_DCON_CH1_USBEP2 (4<<24) | 52 | #define S3C2410_DCON_CH1_USBEP2 (4 << 24) |
52 | 53 | ||
53 | #define S3C2410_DCON_CH2_I2SSDO (0<<24) | 54 | #define S3C2410_DCON_CH2_I2SSDO (0 << 24) |
54 | #define S3C2410_DCON_CH2_I2SSDI (1<<24) | 55 | #define S3C2410_DCON_CH2_I2SSDI (1 << 24) |
55 | #define S3C2410_DCON_CH2_SDI (2<<24) | 56 | #define S3C2410_DCON_CH2_SDI (2 << 24) |
56 | #define S3C2410_DCON_CH2_TIMER (3<<24) | 57 | #define S3C2410_DCON_CH2_TIMER (3 << 24) |
57 | #define S3C2410_DCON_CH2_USBEP3 (4<<24) | 58 | #define S3C2410_DCON_CH2_USBEP3 (4 << 24) |
58 | 59 | ||
59 | #define S3C2410_DCON_CH3_UART2 (0<<24) | 60 | #define S3C2410_DCON_CH3_UART2 (0 << 24) |
60 | #define S3C2410_DCON_CH3_SDI (1<<24) | 61 | #define S3C2410_DCON_CH3_SDI (1 << 24) |
61 | #define S3C2410_DCON_CH3_SPI (2<<24) | 62 | #define S3C2410_DCON_CH3_SPI (2 << 24) |
62 | #define S3C2410_DCON_CH3_TIMER (3<<24) | 63 | #define S3C2410_DCON_CH3_TIMER (3 << 24) |
63 | #define S3C2410_DCON_CH3_USBEP4 (4<<24) | 64 | #define S3C2410_DCON_CH3_USBEP4 (4 << 24) |
64 | 65 | ||
65 | #define S3C2410_DCON_SRCSHIFT (24) | 66 | #define S3C2410_DCON_SRCSHIFT (24) |
66 | #define S3C2410_DCON_SRCMASK (7<<24) | 67 | #define S3C2410_DCON_SRCMASK (7 << 24) |
67 | 68 | ||
68 | #define S3C2410_DCON_BYTE (0<<20) | 69 | #define S3C2410_DCON_BYTE (0 << 20) |
69 | #define S3C2410_DCON_HALFWORD (1<<20) | 70 | #define S3C2410_DCON_HALFWORD (1 << 20) |
70 | #define S3C2410_DCON_WORD (2<<20) | 71 | #define S3C2410_DCON_WORD (2 << 20) |
71 | 72 | ||
72 | #define S3C2410_DCON_AUTORELOAD (0<<22) | 73 | #define S3C2410_DCON_AUTORELOAD (0 << 22) |
73 | #define S3C2410_DCON_NORELOAD (1<<22) | 74 | #define S3C2410_DCON_NORELOAD (1 << 22) |
74 | #define S3C2410_DCON_HWTRIG (1<<23) | 75 | #define S3C2410_DCON_HWTRIG (1 << 23) |
75 | 76 | ||
76 | #ifdef CONFIG_CPU_S3C2440 | 77 | #ifdef CONFIG_CPU_S3C2440 |
77 | #define S3C2440_DIDSTC_CHKINT (1<<2) | ||
78 | 78 | ||
79 | #define S3C2440_DCON_CH0_I2SSDO (5<<24) | 79 | #define S3C2440_DIDSTC_CHKINT (1 << 2) |
80 | #define S3C2440_DCON_CH0_PCMIN (6<<24) | ||
81 | 80 | ||
82 | #define S3C2440_DCON_CH1_PCMOUT (5<<24) | 81 | #define S3C2440_DCON_CH0_I2SSDO (5 << 24) |
83 | #define S3C2440_DCON_CH1_SDI (6<<24) | 82 | #define S3C2440_DCON_CH0_PCMIN (6 << 24) |
84 | 83 | ||
85 | #define S3C2440_DCON_CH2_PCMIN (5<<24) | 84 | #define S3C2440_DCON_CH1_PCMOUT (5 << 24) |
86 | #define S3C2440_DCON_CH2_MICIN (6<<24) | 85 | #define S3C2440_DCON_CH1_SDI (6 << 24) |
87 | 86 | ||
88 | #define S3C2440_DCON_CH3_MICIN (5<<24) | 87 | #define S3C2440_DCON_CH2_PCMIN (5 << 24) |
89 | #define S3C2440_DCON_CH3_PCMOUT (6<<24) | 88 | #define S3C2440_DCON_CH2_MICIN (6 << 24) |
90 | #endif | 89 | |
90 | #define S3C2440_DCON_CH3_MICIN (5 << 24) | ||
91 | #define S3C2440_DCON_CH3_PCMOUT (6 << 24) | ||
92 | #endif /* CONFIG_CPU_S3C2440 */ | ||
91 | 93 | ||
92 | #ifdef CONFIG_CPU_S3C2412 | 94 | #ifdef CONFIG_CPU_S3C2412 |
93 | 95 | ||
94 | #define S3C2412_DMAREQSEL_SRC(x) ((x)<<1) | 96 | #define S3C2412_DMAREQSEL_SRC(x) ((x) << 1) |
95 | 97 | ||
96 | #define S3C2412_DMAREQSEL_HW (1) | 98 | #define S3C2412_DMAREQSEL_HW (1) |
97 | 99 | ||
@@ -115,10 +117,11 @@ | |||
115 | #define S3C2412_DMAREQSEL_UART1_1 S3C2412_DMAREQSEL_SRC(22) | 117 | #define S3C2412_DMAREQSEL_UART1_1 S3C2412_DMAREQSEL_SRC(22) |
116 | #define S3C2412_DMAREQSEL_UART2_0 S3C2412_DMAREQSEL_SRC(23) | 118 | #define S3C2412_DMAREQSEL_UART2_0 S3C2412_DMAREQSEL_SRC(23) |
117 | #define S3C2412_DMAREQSEL_UART2_1 S3C2412_DMAREQSEL_SRC(24) | 119 | #define S3C2412_DMAREQSEL_UART2_1 S3C2412_DMAREQSEL_SRC(24) |
120 | #endif /* CONFIG_CPU_S3C2412 */ | ||
118 | 121 | ||
119 | #endif | 122 | #ifdef CONFIG_CPU_S3C2443 |
120 | 123 | ||
121 | #define S3C2443_DMAREQSEL_SRC(x) ((x)<<1) | 124 | #define S3C2443_DMAREQSEL_SRC(x) ((x) << 1) |
122 | 125 | ||
123 | #define S3C2443_DMAREQSEL_HW (1) | 126 | #define S3C2443_DMAREQSEL_HW (1) |
124 | 127 | ||
@@ -141,5 +144,8 @@ | |||
141 | #define S3C2443_DMAREQSEL_UART3_0 S3C2443_DMAREQSEL_SRC(25) | 144 | #define S3C2443_DMAREQSEL_UART3_0 S3C2443_DMAREQSEL_SRC(25) |
142 | #define S3C2443_DMAREQSEL_UART3_1 S3C2443_DMAREQSEL_SRC(26) | 145 | #define S3C2443_DMAREQSEL_UART3_1 S3C2443_DMAREQSEL_SRC(26) |
143 | #define S3C2443_DMAREQSEL_PCMOUT S3C2443_DMAREQSEL_SRC(27) | 146 | #define S3C2443_DMAREQSEL_PCMOUT S3C2443_DMAREQSEL_SRC(27) |
144 | #define S3C2443_DMAREQSEL_PCMIN S3C2443_DMAREQSEL_SRC(28) | 147 | #define S3C2443_DMAREQSEL_PCMIN S3C2443_DMAREQSEL_SRC(28) |
145 | #define S3C2443_DMAREQSEL_MICIN S3C2443_DMAREQSEL_SRC(29) | 148 | #define S3C2443_DMAREQSEL_MICIN S3C2443_DMAREQSEL_SRC(29) |
149 | #endif /* CONFIG_CPU_S3C2443 */ | ||
150 | |||
151 | #endif /* __ASM_PLAT_REGS_DMA_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/regs-iis.h b/arch/arm/plat-samsung/include/plat/regs-iis.h new file mode 100644 index 00000000000..a18d35e7a73 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/regs-iis.h | |||
@@ -0,0 +1,70 @@ | |||
1 | /* arch/arm/plat-samsung/include/plat/regs-iis.h | ||
2 | * | ||
3 | * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> | ||
4 | * http://www.simtec.co.uk/products/SWLINUX/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * S3C2410 IIS register definition | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_IIS_H | ||
14 | #define __ASM_ARCH_REGS_IIS_H | ||
15 | |||
16 | #define S3C2410_IISCON (0x00) | ||
17 | |||
18 | #define S3C2410_IISCON_LRINDEX (1 << 8) | ||
19 | #define S3C2410_IISCON_TXFIFORDY (1 << 7) | ||
20 | #define S3C2410_IISCON_RXFIFORDY (1 << 6) | ||
21 | #define S3C2410_IISCON_TXDMAEN (1 << 5) | ||
22 | #define S3C2410_IISCON_RXDMAEN (1 << 4) | ||
23 | #define S3C2410_IISCON_TXIDLE (1 << 3) | ||
24 | #define S3C2410_IISCON_RXIDLE (1 << 2) | ||
25 | #define S3C2410_IISCON_PSCEN (1 << 1) | ||
26 | #define S3C2410_IISCON_IISEN (1 << 0) | ||
27 | |||
28 | #define S3C2410_IISMOD (0x04) | ||
29 | |||
30 | #define S3C2440_IISMOD_MPLL (1 << 9) | ||
31 | #define S3C2410_IISMOD_SLAVE (1 << 8) | ||
32 | #define S3C2410_IISMOD_NOXFER (0 << 6) | ||
33 | #define S3C2410_IISMOD_RXMODE (1 << 6) | ||
34 | #define S3C2410_IISMOD_TXMODE (2 << 6) | ||
35 | #define S3C2410_IISMOD_TXRXMODE (3 << 6) | ||
36 | #define S3C2410_IISMOD_LR_LLOW (0 << 5) | ||
37 | #define S3C2410_IISMOD_LR_RLOW (1 << 5) | ||
38 | #define S3C2410_IISMOD_IIS (0 << 4) | ||
39 | #define S3C2410_IISMOD_MSB (1 << 4) | ||
40 | #define S3C2410_IISMOD_8BIT (0 << 3) | ||
41 | #define S3C2410_IISMOD_16BIT (1 << 3) | ||
42 | #define S3C2410_IISMOD_BITMASK (1 << 3) | ||
43 | #define S3C2410_IISMOD_256FS (0 << 2) | ||
44 | #define S3C2410_IISMOD_384FS (1 << 2) | ||
45 | #define S3C2410_IISMOD_16FS (0 << 0) | ||
46 | #define S3C2410_IISMOD_32FS (1 << 0) | ||
47 | #define S3C2410_IISMOD_48FS (2 << 0) | ||
48 | #define S3C2410_IISMOD_FS_MASK (3 << 0) | ||
49 | |||
50 | #define S3C2410_IISPSR (0x08) | ||
51 | |||
52 | #define S3C2410_IISPSR_INTMASK (31 << 5) | ||
53 | #define S3C2410_IISPSR_INTSHIFT (5) | ||
54 | #define S3C2410_IISPSR_EXTMASK (31 << 0) | ||
55 | #define S3C2410_IISPSR_EXTSHFIT (0) | ||
56 | |||
57 | #define S3C2410_IISFCON (0x0c) | ||
58 | |||
59 | #define S3C2410_IISFCON_TXDMA (1 << 15) | ||
60 | #define S3C2410_IISFCON_RXDMA (1 << 14) | ||
61 | #define S3C2410_IISFCON_TXENABLE (1 << 13) | ||
62 | #define S3C2410_IISFCON_RXENABLE (1 << 12) | ||
63 | #define S3C2410_IISFCON_TXMASK (0x3f << 6) | ||
64 | #define S3C2410_IISFCON_TXSHIFT (6) | ||
65 | #define S3C2410_IISFCON_RXMASK (0x3f) | ||
66 | #define S3C2410_IISFCON_RXSHIFT (0) | ||
67 | |||
68 | #define S3C2410_IISFIFO (0x10) | ||
69 | |||
70 | #endif /* __ASM_ARCH_REGS_IIS_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/regs-spi.h b/arch/arm/plat-samsung/include/plat/regs-spi.h new file mode 100644 index 00000000000..552fe7cfe28 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/regs-spi.h | |||
@@ -0,0 +1,48 @@ | |||
1 | /* arch/arm/plat-samsung/include/plat/regs-spi.h | ||
2 | * | ||
3 | * Copyright (c) 2004 Fetron GmbH | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | * S3C2410 SPI register definition | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_ARCH_REGS_SPI_H | ||
13 | #define __ASM_ARCH_REGS_SPI_H | ||
14 | |||
15 | #define S3C2410_SPI1 (0x20) | ||
16 | #define S3C2412_SPI1 (0x100) | ||
17 | |||
18 | #define S3C2410_SPCON (0x00) | ||
19 | |||
20 | #define S3C2410_SPCON_SMOD_DMA (2 << 5) /* DMA mode */ | ||
21 | #define S3C2410_SPCON_SMOD_INT (1 << 5) /* interrupt mode */ | ||
22 | #define S3C2410_SPCON_SMOD_POLL (0 << 5) /* polling mode */ | ||
23 | #define S3C2410_SPCON_ENSCK (1 << 4) /* Enable SCK */ | ||
24 | #define S3C2410_SPCON_MSTR (1 << 3) /* Master:1, Slave:0 select */ | ||
25 | #define S3C2410_SPCON_CPOL_HIGH (1 << 2) /* Clock polarity select */ | ||
26 | #define S3C2410_SPCON_CPOL_LOW (0 << 2) /* Clock polarity select */ | ||
27 | |||
28 | #define S3C2410_SPCON_CPHA_FMTB (1 << 1) /* Clock Phase Select */ | ||
29 | #define S3C2410_SPCON_CPHA_FMTA (0 << 1) /* Clock Phase Select */ | ||
30 | |||
31 | #define S3C2410_SPSTA (0x04) | ||
32 | |||
33 | #define S3C2410_SPSTA_DCOL (1 << 2) /* Data Collision Error */ | ||
34 | #define S3C2410_SPSTA_MULD (1 << 1) /* Multi Master Error */ | ||
35 | #define S3C2410_SPSTA_READY (1 << 0) /* Data Tx/Rx ready */ | ||
36 | #define S3C2412_SPSTA_READY_ORG (1 << 3) | ||
37 | |||
38 | #define S3C2410_SPPIN (0x08) | ||
39 | |||
40 | #define S3C2410_SPPIN_ENMUL (1 << 2) /* Multi Master Error detect */ | ||
41 | #define S3C2410_SPPIN_RESERVED (1 << 1) | ||
42 | #define S3C2410_SPPIN_KEEP (1 << 0) /* Master Out keep */ | ||
43 | |||
44 | #define S3C2410_SPPRE (0x0C) | ||
45 | #define S3C2410_SPTDAT (0x10) | ||
46 | #define S3C2410_SPRDAT (0x14) | ||
47 | |||
48 | #endif /* __ASM_ARCH_REGS_SPI_H */ | ||
diff --git a/arch/arm/plat-s5p/include/plat/regs-srom.h b/arch/arm/plat-samsung/include/plat/regs-srom.h index f121ab5e76c..9b6729c81cd 100644 --- a/arch/arm/plat-s5p/include/plat/regs-srom.h +++ b/arch/arm/plat-samsung/include/plat/regs-srom.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/arch/arm/plat-s5p/include/plat/regs-srom.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/regs-srom.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
@@ -10,8 +10,8 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #ifndef __ASM_PLAT_S5P_REGS_SROM_H | 13 | #ifndef __PLAT_SAMSUNG_REGS_SROM_H |
14 | #define __ASM_PLAT_S5P_REGS_SROM_H __FILE__ | 14 | #define __PLAT_SAMSUNG_REGS_SROM_H __FILE__ |
15 | 15 | ||
16 | #include <mach/map.h> | 16 | #include <mach/map.h> |
17 | 17 | ||
@@ -51,4 +51,4 @@ | |||
51 | #define S5P_SROM_BCX__TCOS__SHIFT 24 | 51 | #define S5P_SROM_BCX__TCOS__SHIFT 24 |
52 | #define S5P_SROM_BCX__TACS__SHIFT 28 | 52 | #define S5P_SROM_BCX__TACS__SHIFT 28 |
53 | 53 | ||
54 | #endif /* __ASM_PLAT_S5P_REGS_SROM_H */ | 54 | #endif /* __PLAT_SAMSUNG_REGS_SROM_H */ |
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-udc.h b/arch/arm/plat-samsung/include/plat/regs-udc.h index f0dd4a41b37..4003d3dab4e 100644 --- a/arch/arm/plat-s3c24xx/include/plat/regs-udc.h +++ b/arch/arm/plat-samsung/include/plat/regs-udc.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/regs-udc.h | 1 | /* arch/arm/plat-samsung/include/plat/regs-udc.h |
2 | * | 2 | * |
3 | * Copyright (C) 2004 Herbert Poetzl <herbert@13thfloor.at> | 3 | * Copyright (C) 2004 Herbert Poetzl <herbert@13thfloor.at> |
4 | * | 4 | * |
@@ -75,79 +75,77 @@ | |||
75 | #define S3C2410_UDC_OUT_FIFO_CNT1_REG S3C2410_USBDREG(0x0198) | 75 | #define S3C2410_UDC_OUT_FIFO_CNT1_REG S3C2410_USBDREG(0x0198) |
76 | #define S3C2410_UDC_OUT_FIFO_CNT2_REG S3C2410_USBDREG(0x019c) | 76 | #define S3C2410_UDC_OUT_FIFO_CNT2_REG S3C2410_USBDREG(0x019c) |
77 | 77 | ||
78 | #define S3C2410_UDC_FUNCADDR_UPDATE (1<<7) | 78 | #define S3C2410_UDC_FUNCADDR_UPDATE (1 << 7) |
79 | 79 | ||
80 | #define S3C2410_UDC_PWR_ISOUP (1<<7) // R/W | 80 | #define S3C2410_UDC_PWR_ISOUP (1 << 7) /* R/W */ |
81 | #define S3C2410_UDC_PWR_RESET (1<<3) // R | 81 | #define S3C2410_UDC_PWR_RESET (1 << 3) /* R */ |
82 | #define S3C2410_UDC_PWR_RESUME (1<<2) // R/W | 82 | #define S3C2410_UDC_PWR_RESUME (1 << 2) /* R/W */ |
83 | #define S3C2410_UDC_PWR_SUSPEND (1<<1) // R | 83 | #define S3C2410_UDC_PWR_SUSPEND (1 << 1) /* R */ |
84 | #define S3C2410_UDC_PWR_ENSUSPEND (1<<0) // R/W | 84 | #define S3C2410_UDC_PWR_ENSUSPEND (1 << 0) /* R/W */ |
85 | 85 | ||
86 | #define S3C2410_UDC_PWR_DEFAULT 0x00 | 86 | #define S3C2410_UDC_PWR_DEFAULT (0x00) |
87 | 87 | ||
88 | #define S3C2410_UDC_INT_EP4 (1<<4) // R/W (clear only) | 88 | #define S3C2410_UDC_INT_EP4 (1 << 4) /* R/W (clear only) */ |
89 | #define S3C2410_UDC_INT_EP3 (1<<3) // R/W (clear only) | 89 | #define S3C2410_UDC_INT_EP3 (1 << 3) /* R/W (clear only) */ |
90 | #define S3C2410_UDC_INT_EP2 (1<<2) // R/W (clear only) | 90 | #define S3C2410_UDC_INT_EP2 (1 << 2) /* R/W (clear only) */ |
91 | #define S3C2410_UDC_INT_EP1 (1<<1) // R/W (clear only) | 91 | #define S3C2410_UDC_INT_EP1 (1 << 1) /* R/W (clear only) */ |
92 | #define S3C2410_UDC_INT_EP0 (1<<0) // R/W (clear only) | 92 | #define S3C2410_UDC_INT_EP0 (1 << 0) /* R/W (clear only) */ |
93 | 93 | ||
94 | #define S3C2410_UDC_USBINT_RESET (1<<2) // R/W (clear only) | 94 | #define S3C2410_UDC_USBINT_RESET (1 << 2) /* R/W (clear only) */ |
95 | #define S3C2410_UDC_USBINT_RESUME (1<<1) // R/W (clear only) | 95 | #define S3C2410_UDC_USBINT_RESUME (1 << 1) /* R/W (clear only) */ |
96 | #define S3C2410_UDC_USBINT_SUSPEND (1<<0) // R/W (clear only) | 96 | #define S3C2410_UDC_USBINT_SUSPEND (1 << 0) /* R/W (clear only) */ |
97 | 97 | ||
98 | #define S3C2410_UDC_INTE_EP4 (1<<4) // R/W | 98 | #define S3C2410_UDC_INTE_EP4 (1 << 4) /* R/W */ |
99 | #define S3C2410_UDC_INTE_EP3 (1<<3) // R/W | 99 | #define S3C2410_UDC_INTE_EP3 (1 << 3) /* R/W */ |
100 | #define S3C2410_UDC_INTE_EP2 (1<<2) // R/W | 100 | #define S3C2410_UDC_INTE_EP2 (1 << 2) /* R/W */ |
101 | #define S3C2410_UDC_INTE_EP1 (1<<1) // R/W | 101 | #define S3C2410_UDC_INTE_EP1 (1 << 1) /* R/W */ |
102 | #define S3C2410_UDC_INTE_EP0 (1<<0) // R/W | 102 | #define S3C2410_UDC_INTE_EP0 (1 << 0) /* R/W */ |
103 | |||
104 | #define S3C2410_UDC_USBINTE_RESET (1<<2) // R/W | ||
105 | #define S3C2410_UDC_USBINTE_SUSPEND (1<<0) // R/W | ||
106 | 103 | ||
104 | #define S3C2410_UDC_USBINTE_RESET (1 << 2) /* R/W */ | ||
105 | #define S3C2410_UDC_USBINTE_SUSPEND (1 << 0) /* R/W */ | ||
107 | 106 | ||
108 | #define S3C2410_UDC_INDEX_EP0 (0x00) | 107 | #define S3C2410_UDC_INDEX_EP0 (0x00) |
109 | #define S3C2410_UDC_INDEX_EP1 (0x01) // ?? | 108 | #define S3C2410_UDC_INDEX_EP1 (0x01) |
110 | #define S3C2410_UDC_INDEX_EP2 (0x02) // ?? | 109 | #define S3C2410_UDC_INDEX_EP2 (0x02) |
111 | #define S3C2410_UDC_INDEX_EP3 (0x03) // ?? | 110 | #define S3C2410_UDC_INDEX_EP3 (0x03) |
112 | #define S3C2410_UDC_INDEX_EP4 (0x04) // ?? | 111 | #define S3C2410_UDC_INDEX_EP4 (0x04) |
113 | 112 | ||
114 | #define S3C2410_UDC_ICSR1_CLRDT (1<<6) // R/W | 113 | #define S3C2410_UDC_ICSR1_CLRDT (1 << 6) /* R/W */ |
115 | #define S3C2410_UDC_ICSR1_SENTSTL (1<<5) // R/W (clear only) | 114 | #define S3C2410_UDC_ICSR1_SENTSTL (1 << 5) /* R/W (clear only) */ |
116 | #define S3C2410_UDC_ICSR1_SENDSTL (1<<4) // R/W | 115 | #define S3C2410_UDC_ICSR1_SENDSTL (1 << 4) /* R/W */ |
117 | #define S3C2410_UDC_ICSR1_FFLUSH (1<<3) // W (set only) | 116 | #define S3C2410_UDC_ICSR1_FFLUSH (1 << 3) /* W (set only) */ |
118 | #define S3C2410_UDC_ICSR1_UNDRUN (1<<2) // R/W (clear only) | 117 | #define S3C2410_UDC_ICSR1_UNDRUN (1 << 2) /* R/W (clear only) */ |
119 | #define S3C2410_UDC_ICSR1_PKTRDY (1<<0) // R/W (set only) | 118 | #define S3C2410_UDC_ICSR1_PKTRDY (1 << 0) /* R/W (set only) */ |
120 | 119 | ||
121 | #define S3C2410_UDC_ICSR2_AUTOSET (1<<7) // R/W | 120 | #define S3C2410_UDC_ICSR2_AUTOSET (1 << 7) /* R/W */ |
122 | #define S3C2410_UDC_ICSR2_ISO (1<<6) // R/W | 121 | #define S3C2410_UDC_ICSR2_ISO (1 << 6) /* R/W */ |
123 | #define S3C2410_UDC_ICSR2_MODEIN (1<<5) // R/W | 122 | #define S3C2410_UDC_ICSR2_MODEIN (1 << 5) /* R/W */ |
124 | #define S3C2410_UDC_ICSR2_DMAIEN (1<<4) // R/W | 123 | #define S3C2410_UDC_ICSR2_DMAIEN (1 << 4) /* R/W */ |
125 | 124 | ||
126 | #define S3C2410_UDC_OCSR1_CLRDT (1<<7) // R/W | 125 | #define S3C2410_UDC_OCSR1_CLRDT (1 << 7) /* R/W */ |
127 | #define S3C2410_UDC_OCSR1_SENTSTL (1<<6) // R/W (clear only) | 126 | #define S3C2410_UDC_OCSR1_SENTSTL (1 << 6) /* R/W (clear only) */ |
128 | #define S3C2410_UDC_OCSR1_SENDSTL (1<<5) // R/W | 127 | #define S3C2410_UDC_OCSR1_SENDSTL (1 << 5) /* R/W */ |
129 | #define S3C2410_UDC_OCSR1_FFLUSH (1<<4) // R/W | 128 | #define S3C2410_UDC_OCSR1_FFLUSH (1 << 4) /* R/W */ |
130 | #define S3C2410_UDC_OCSR1_DERROR (1<<3) // R | 129 | #define S3C2410_UDC_OCSR1_DERROR (1 << 3) /* R */ |
131 | #define S3C2410_UDC_OCSR1_OVRRUN (1<<2) // R/W (clear only) | 130 | #define S3C2410_UDC_OCSR1_OVRRUN (1 << 2) /* R/W (clear only) */ |
132 | #define S3C2410_UDC_OCSR1_PKTRDY (1<<0) // R/W (clear only) | 131 | #define S3C2410_UDC_OCSR1_PKTRDY (1 << 0) /* R/W (clear only) */ |
133 | 132 | ||
134 | #define S3C2410_UDC_OCSR2_AUTOCLR (1<<7) // R/W | 133 | #define S3C2410_UDC_OCSR2_AUTOCLR (1 << 7) /* R/W */ |
135 | #define S3C2410_UDC_OCSR2_ISO (1<<6) // R/W | 134 | #define S3C2410_UDC_OCSR2_ISO (1 << 6) /* R/W */ |
136 | #define S3C2410_UDC_OCSR2_DMAIEN (1<<5) // R/W | 135 | #define S3C2410_UDC_OCSR2_DMAIEN (1 << 5) /* R/W */ |
137 | 136 | ||
138 | #define S3C2410_UDC_EP0_CSR_OPKRDY (1<<0) | 137 | #define S3C2410_UDC_EP0_CSR_OPKRDY (1 << 0) |
139 | #define S3C2410_UDC_EP0_CSR_IPKRDY (1<<1) | 138 | #define S3C2410_UDC_EP0_CSR_IPKRDY (1 << 1) |
140 | #define S3C2410_UDC_EP0_CSR_SENTSTL (1<<2) | 139 | #define S3C2410_UDC_EP0_CSR_SENTSTL (1 << 2) |
141 | #define S3C2410_UDC_EP0_CSR_DE (1<<3) | 140 | #define S3C2410_UDC_EP0_CSR_DE (1 << 3) |
142 | #define S3C2410_UDC_EP0_CSR_SE (1<<4) | 141 | #define S3C2410_UDC_EP0_CSR_SE (1 << 4) |
143 | #define S3C2410_UDC_EP0_CSR_SENDSTL (1<<5) | 142 | #define S3C2410_UDC_EP0_CSR_SENDSTL (1 << 5) |
144 | #define S3C2410_UDC_EP0_CSR_SOPKTRDY (1<<6) | 143 | #define S3C2410_UDC_EP0_CSR_SOPKTRDY (1 << 6) |
145 | #define S3C2410_UDC_EP0_CSR_SSE (1<<7) | 144 | #define S3C2410_UDC_EP0_CSR_SSE (1 << 7) |
146 | 145 | ||
147 | #define S3C2410_UDC_MAXP_8 (1<<0) | 146 | #define S3C2410_UDC_MAXP_8 (1 << 0) |
148 | #define S3C2410_UDC_MAXP_16 (1<<1) | 147 | #define S3C2410_UDC_MAXP_16 (1 << 1) |
149 | #define S3C2410_UDC_MAXP_32 (1<<2) | 148 | #define S3C2410_UDC_MAXP_32 (1 << 2) |
150 | #define S3C2410_UDC_MAXP_64 (1<<3) | 149 | #define S3C2410_UDC_MAXP_64 (1 << 3) |
151 | |||
152 | 150 | ||
153 | #endif | 151 | #endif |
diff --git a/arch/arm/plat-s5p/include/plat/reset.h b/arch/arm/plat-samsung/include/plat/reset.h index 335e97812ee..32ca5179c6e 100644 --- a/arch/arm/plat-s5p/include/plat/reset.h +++ b/arch/arm/plat-samsung/include/plat/reset.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/arch/arm/plat-s5p/include/plat/reset.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/reset.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
@@ -8,9 +8,9 @@ | |||
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #ifndef __ASM_PLAT_S5P_RESET_H | 11 | #ifndef __PLAT_SAMSUNG_RESET_H |
12 | #define __ASM_PLAT_S5P_RESET_H __FILE__ | 12 | #define __PLAT_SAMSUNG_RESET_H __FILE__ |
13 | 13 | ||
14 | extern void (*s5p_reset_hook)(void); | 14 | extern void (*s5p_reset_hook)(void); |
15 | 15 | ||
16 | #endif /* __ASM_PLAT_S5P_RESET_H */ | 16 | #endif /* __PLAT_SAMSUNG_RESET_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/s3c-pl330-pdata.h b/arch/arm/plat-samsung/include/plat/s3c-pl330-pdata.h deleted file mode 100644 index bf5e2a9d408..00000000000 --- a/arch/arm/plat-samsung/include/plat/s3c-pl330-pdata.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/s3c-pl330-pdata.h | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef __S3C_PL330_PDATA_H | ||
13 | #define __S3C_PL330_PDATA_H | ||
14 | |||
15 | #include <plat/s3c-dma-pl330.h> | ||
16 | |||
17 | /* | ||
18 | * Every PL330 DMAC has max 32 peripheral interfaces, | ||
19 | * of which some may be not be really used in your | ||
20 | * DMAC's configuration. | ||
21 | * Populate this array of 32 peri i/fs with relevant | ||
22 | * channel IDs for used peri i/f and DMACH_MAX for | ||
23 | * those unused. | ||
24 | * | ||
25 | * The platforms just need to provide this info | ||
26 | * to the S3C DMA API driver for PL330. | ||
27 | */ | ||
28 | struct s3c_pl330_platdata { | ||
29 | enum dma_ch peri[32]; | ||
30 | }; | ||
31 | |||
32 | #endif /* __S3C_PL330_PDATA_H */ | ||
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2410.h b/arch/arm/plat-samsung/include/plat/s3c2410.h index 82ab4aad1bb..3986497dd3f 100644 --- a/arch/arm/plat-s3c24xx/include/plat/s3c2410.h +++ b/arch/arm/plat-samsung/include/plat/s3c2410.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/s3c2410.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/s3c2410.h |
2 | * | 2 | * |
3 | * Copyright (c) 2004 Simtec Electronics | 3 | * Copyright (c) 2004 Simtec Electronics |
4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2412.h b/arch/arm/plat-samsung/include/plat/s3c2412.h index bb15d3b68be..5bcfd143ba1 100644 --- a/arch/arm/plat-s3c24xx/include/plat/s3c2412.h +++ b/arch/arm/plat-samsung/include/plat/s3c2412.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/s3c2412.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/s3c2412.h |
2 | * | 2 | * |
3 | * Copyright (c) 2006 Simtec Electronics | 3 | * Copyright (c) 2006 Simtec Electronics |
4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2416.h b/arch/arm/plat-samsung/include/plat/s3c2416.h index dc3c0907d22..a764f8503f5 100644 --- a/arch/arm/plat-s3c24xx/include/plat/s3c2416.h +++ b/arch/arm/plat-samsung/include/plat/s3c2416.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/s3c2443.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/s3c2416.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com> | 3 | * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com> |
4 | * | 4 | * |
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2443.h b/arch/arm/plat-samsung/include/plat/s3c2443.h index a19715feb79..7fae1a05069 100644 --- a/arch/arm/plat-s3c24xx/include/plat/s3c2443.h +++ b/arch/arm/plat-samsung/include/plat/s3c2443.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/s3c2443.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/s3c2443.h |
2 | * | 2 | * |
3 | * Copyright (c) 2004-2005 Simtec Electronics | 3 | * Copyright (c) 2004-2005 Simtec Electronics |
4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
@@ -37,10 +37,11 @@ extern int s3c2443_baseclk_add(void); | |||
37 | struct clk; /* some files don't need clk.h otherwise */ | 37 | struct clk; /* some files don't need clk.h otherwise */ |
38 | 38 | ||
39 | typedef unsigned int (*pll_fn)(unsigned int reg, unsigned int base); | 39 | typedef unsigned int (*pll_fn)(unsigned int reg, unsigned int base); |
40 | typedef unsigned int (*fdiv_fn)(unsigned long clkcon0); | ||
41 | 40 | ||
42 | extern void s3c2443_common_setup_clocks(pll_fn get_mpll, fdiv_fn fdiv); | 41 | extern void s3c2443_common_setup_clocks(pll_fn get_mpll); |
43 | extern void s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, fdiv_fn fdiv); | 42 | extern void s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, |
43 | unsigned int *divs, int nr_divs, | ||
44 | int divmask); | ||
44 | 45 | ||
45 | extern int s3c2443_clkcon_enable_h(struct clk *clk, int enable); | 46 | extern int s3c2443_clkcon_enable_h(struct clk *clk, int enable); |
46 | extern int s3c2443_clkcon_enable_p(struct clk *clk, int enable); | 47 | extern int s3c2443_clkcon_enable_p(struct clk *clk, int enable); |
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c244x.h b/arch/arm/plat-samsung/include/plat/s3c244x.h index 89e8d0a25f8..ea0c961b760 100644 --- a/arch/arm/plat-s3c24xx/include/plat/s3c244x.h +++ b/arch/arm/plat-samsung/include/plat/s3c244x.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/include/plat/s3c244x.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/s3c244x.h |
2 | * | 2 | * |
3 | * Copyright (c) 2004-2005 Simtec Electronics | 3 | * Copyright (c) 2004-2005 Simtec Electronics |
4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
diff --git a/arch/arm/mach-s3c64xx/include/mach/s3c6400.h b/arch/arm/plat-samsung/include/plat/s3c6400.h index f86958d0535..37d428aaaeb 100644 --- a/arch/arm/mach-s3c64xx/include/mach/s3c6400.h +++ b/arch/arm/plat-samsung/include/plat/s3c6400.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* arch/arm/mach-s3c64xx/include/macht/s3c6400.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/s3c6400.h |
2 | * | 2 | * |
3 | * Copyright 2008 Openmoko, Inc. | 3 | * Copyright 2008 Openmoko, Inc. |
4 | * Copyright 2008 Simtec Electronics | 4 | * Copyright 2008 Simtec Electronics |
diff --git a/arch/arm/mach-s3c64xx/include/mach/s3c6410.h b/arch/arm/plat-samsung/include/plat/s3c6410.h index 24f1141ffcb..20a6675b9d1 100644 --- a/arch/arm/mach-s3c64xx/include/mach/s3c6410.h +++ b/arch/arm/plat-samsung/include/plat/s3c6410.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* arch/arm/mach-s3c64xx/include/mach/s3c6410.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/s3c6410.h |
2 | * | 2 | * |
3 | * Copyright 2008 Openmoko, Inc. | 3 | * Copyright 2008 Openmoko, Inc. |
4 | * Copyright 2008 Simtec Electronics | 4 | * Copyright 2008 Simtec Electronics |
diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-samsung/include/plat/s5p-clock.h index 769b5bdfb04..984bf9e7bc8 100644 --- a/arch/arm/plat-s5p/include/plat/s5p-clock.h +++ b/arch/arm/plat-samsung/include/plat/s5p-clock.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/arch/arm/plat-s5p/include/plat/s5p-clock.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/s5p-clock.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
diff --git a/arch/arm/plat-s5p/include/plat/s5p-time.h b/arch/arm/plat-samsung/include/plat/s5p-time.h index 575e88109db..3a70aebc920 100644 --- a/arch/arm/plat-s5p/include/plat/s5p-time.h +++ b/arch/arm/plat-samsung/include/plat/s5p-time.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/arch/arm/plat-s5p/include/plat/s5p-time.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/s5p-time.h |
2 | * | 2 | * |
3 | * Copyright 2011 Samsung Electronics Co., Ltd. | 3 | * Copyright 2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
diff --git a/arch/arm/plat-s5p/include/plat/s5p6440.h b/arch/arm/plat-samsung/include/plat/s5p6440.h index 528585d2caf..bf85ebbb4fb 100644 --- a/arch/arm/plat-s5p/include/plat/s5p6440.h +++ b/arch/arm/plat-samsung/include/plat/s5p6440.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* arch/arm/plat-s5p/include/plat/s5p6440.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/s5p6440.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
diff --git a/arch/arm/plat-s5p/include/plat/s5p6450.h b/arch/arm/plat-samsung/include/plat/s5p6450.h index 640a41c26be..da25f9a1c54 100644 --- a/arch/arm/plat-s5p/include/plat/s5p6450.h +++ b/arch/arm/plat-samsung/include/plat/s5p6450.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* arch/arm/plat-s5p/include/plat/s5p6450.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/s5p6450.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
diff --git a/arch/arm/plat-s5p/include/plat/s5pc100.h b/arch/arm/plat-samsung/include/plat/s5pc100.h index 5f6099dd7ca..9a21aeaaf45 100644 --- a/arch/arm/plat-s5p/include/plat/s5pc100.h +++ b/arch/arm/plat-samsung/include/plat/s5pc100.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* arch/arm/plat-s5p/include/plat/s5pc100.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/s5pc100.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
diff --git a/arch/arm/plat-s5p/include/plat/s5pv210.h b/arch/arm/plat-samsung/include/plat/s5pv210.h index 6c93a0c7810..b4bc6be7707 100644 --- a/arch/arm/plat-s5p/include/plat/s5pv210.h +++ b/arch/arm/plat-samsung/include/plat/s5pv210.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/arch/arm/plat-s5p/include/plat/s5pv210.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/s5pv210.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index 4a6552066c7..e7b3c752e91 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h | |||
@@ -55,10 +55,6 @@ enum clk_types { | |||
55 | * cd_type == S3C_SDHCI_CD_GPIO | 55 | * cd_type == S3C_SDHCI_CD_GPIO |
56 | * @ext_cd_gpio_invert: invert values for external CD gpio line | 56 | * @ext_cd_gpio_invert: invert values for external CD gpio line |
57 | * @cfg_gpio: Configure the GPIO for a specific card bit-width | 57 | * @cfg_gpio: Configure the GPIO for a specific card bit-width |
58 | * @cfg_card: Configure the interface for a specific card and speed. This | ||
59 | * is necessary the controllers and/or GPIO blocks require the | ||
60 | * changing of driver-strength and other controls dependent on | ||
61 | * the card and speed of operation. | ||
62 | * | 58 | * |
63 | * Initialisation data specific to either the machine or the platform | 59 | * Initialisation data specific to either the machine or the platform |
64 | * for the device driver to use or call-back when configuring gpio or | 60 | * for the device driver to use or call-back when configuring gpio or |
@@ -80,10 +76,6 @@ struct s3c_sdhci_platdata { | |||
80 | int state)); | 76 | int state)); |
81 | 77 | ||
82 | void (*cfg_gpio)(struct platform_device *dev, int width); | 78 | void (*cfg_gpio)(struct platform_device *dev, int width); |
83 | void (*cfg_card)(struct platform_device *dev, | ||
84 | void __iomem *regbase, | ||
85 | struct mmc_ios *ios, | ||
86 | struct mmc_card *card); | ||
87 | }; | 79 | }; |
88 | 80 | ||
89 | /* s3c_sdhci_set_platdata() - common helper for setting SDHCI platform data | 81 | /* s3c_sdhci_set_platdata() - common helper for setting SDHCI platform data |
@@ -139,17 +131,11 @@ extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w); | |||
139 | #ifdef CONFIG_S3C2416_SETUP_SDHCI | 131 | #ifdef CONFIG_S3C2416_SETUP_SDHCI |
140 | extern char *s3c2416_hsmmc_clksrcs[4]; | 132 | extern char *s3c2416_hsmmc_clksrcs[4]; |
141 | 133 | ||
142 | extern void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev, | ||
143 | void __iomem *r, | ||
144 | struct mmc_ios *ios, | ||
145 | struct mmc_card *card); | ||
146 | |||
147 | static inline void s3c2416_default_sdhci0(void) | 134 | static inline void s3c2416_default_sdhci0(void) |
148 | { | 135 | { |
149 | #ifdef CONFIG_S3C_DEV_HSMMC | 136 | #ifdef CONFIG_S3C_DEV_HSMMC |
150 | s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs; | 137 | s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs; |
151 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; | 138 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; |
152 | s3c_hsmmc0_def_platdata.cfg_card = s3c2416_setup_sdhci_cfg_card; | ||
153 | #endif /* CONFIG_S3C_DEV_HSMMC */ | 139 | #endif /* CONFIG_S3C_DEV_HSMMC */ |
154 | } | 140 | } |
155 | 141 | ||
@@ -158,7 +144,6 @@ static inline void s3c2416_default_sdhci1(void) | |||
158 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 144 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
159 | s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs; | 145 | s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs; |
160 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; | 146 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; |
161 | s3c_hsmmc1_def_platdata.cfg_card = s3c2416_setup_sdhci_cfg_card; | ||
162 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | 147 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ |
163 | } | 148 | } |
164 | 149 | ||
@@ -172,17 +157,11 @@ static inline void s3c2416_default_sdhci1(void) { } | |||
172 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI | 157 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI |
173 | extern char *s3c64xx_hsmmc_clksrcs[4]; | 158 | extern char *s3c64xx_hsmmc_clksrcs[4]; |
174 | 159 | ||
175 | extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, | ||
176 | void __iomem *r, | ||
177 | struct mmc_ios *ios, | ||
178 | struct mmc_card *card); | ||
179 | |||
180 | static inline void s3c6400_default_sdhci0(void) | 160 | static inline void s3c6400_default_sdhci0(void) |
181 | { | 161 | { |
182 | #ifdef CONFIG_S3C_DEV_HSMMC | 162 | #ifdef CONFIG_S3C_DEV_HSMMC |
183 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 163 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
184 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 164 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
185 | s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | ||
186 | #endif | 165 | #endif |
187 | } | 166 | } |
188 | 167 | ||
@@ -191,7 +170,6 @@ static inline void s3c6400_default_sdhci1(void) | |||
191 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 170 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
192 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 171 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
193 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 172 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
194 | s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | ||
195 | #endif | 173 | #endif |
196 | } | 174 | } |
197 | 175 | ||
@@ -200,21 +178,14 @@ static inline void s3c6400_default_sdhci2(void) | |||
200 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 178 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
201 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 179 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
202 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 180 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
203 | s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | ||
204 | #endif | 181 | #endif |
205 | } | 182 | } |
206 | 183 | ||
207 | extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev, | ||
208 | void __iomem *r, | ||
209 | struct mmc_ios *ios, | ||
210 | struct mmc_card *card); | ||
211 | |||
212 | static inline void s3c6410_default_sdhci0(void) | 184 | static inline void s3c6410_default_sdhci0(void) |
213 | { | 185 | { |
214 | #ifdef CONFIG_S3C_DEV_HSMMC | 186 | #ifdef CONFIG_S3C_DEV_HSMMC |
215 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 187 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
216 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 188 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
217 | s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; | ||
218 | #endif | 189 | #endif |
219 | } | 190 | } |
220 | 191 | ||
@@ -223,7 +194,6 @@ static inline void s3c6410_default_sdhci1(void) | |||
223 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 194 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
224 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 195 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
225 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 196 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
226 | s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; | ||
227 | #endif | 197 | #endif |
228 | } | 198 | } |
229 | 199 | ||
@@ -232,7 +202,6 @@ static inline void s3c6410_default_sdhci2(void) | |||
232 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 202 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
233 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 203 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
234 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 204 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
235 | s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; | ||
236 | #endif | 205 | #endif |
237 | } | 206 | } |
238 | 207 | ||
@@ -251,17 +220,11 @@ static inline void s3c6400_default_sdhci2(void) { } | |||
251 | #ifdef CONFIG_S5PC100_SETUP_SDHCI | 220 | #ifdef CONFIG_S5PC100_SETUP_SDHCI |
252 | extern char *s5pc100_hsmmc_clksrcs[4]; | 221 | extern char *s5pc100_hsmmc_clksrcs[4]; |
253 | 222 | ||
254 | extern void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev, | ||
255 | void __iomem *r, | ||
256 | struct mmc_ios *ios, | ||
257 | struct mmc_card *card); | ||
258 | |||
259 | static inline void s5pc100_default_sdhci0(void) | 223 | static inline void s5pc100_default_sdhci0(void) |
260 | { | 224 | { |
261 | #ifdef CONFIG_S3C_DEV_HSMMC | 225 | #ifdef CONFIG_S3C_DEV_HSMMC |
262 | s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | 226 | s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; |
263 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; | 227 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; |
264 | s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | ||
265 | #endif | 228 | #endif |
266 | } | 229 | } |
267 | 230 | ||
@@ -270,7 +233,6 @@ static inline void s5pc100_default_sdhci1(void) | |||
270 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 233 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
271 | s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | 234 | s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; |
272 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; | 235 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; |
273 | s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | ||
274 | #endif | 236 | #endif |
275 | } | 237 | } |
276 | 238 | ||
@@ -279,7 +241,6 @@ static inline void s5pc100_default_sdhci2(void) | |||
279 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 241 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
280 | s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | 242 | s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; |
281 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; | 243 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; |
282 | s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | ||
283 | #endif | 244 | #endif |
284 | } | 245 | } |
285 | 246 | ||
@@ -295,17 +256,11 @@ static inline void s5pc100_default_sdhci2(void) { } | |||
295 | #ifdef CONFIG_S5PV210_SETUP_SDHCI | 256 | #ifdef CONFIG_S5PV210_SETUP_SDHCI |
296 | extern char *s5pv210_hsmmc_clksrcs[4]; | 257 | extern char *s5pv210_hsmmc_clksrcs[4]; |
297 | 258 | ||
298 | extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | ||
299 | void __iomem *r, | ||
300 | struct mmc_ios *ios, | ||
301 | struct mmc_card *card); | ||
302 | |||
303 | static inline void s5pv210_default_sdhci0(void) | 259 | static inline void s5pv210_default_sdhci0(void) |
304 | { | 260 | { |
305 | #ifdef CONFIG_S3C_DEV_HSMMC | 261 | #ifdef CONFIG_S3C_DEV_HSMMC |
306 | s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | 262 | s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; |
307 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; | 263 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; |
308 | s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
309 | #endif | 264 | #endif |
310 | } | 265 | } |
311 | 266 | ||
@@ -314,7 +269,6 @@ static inline void s5pv210_default_sdhci1(void) | |||
314 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 269 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
315 | s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | 270 | s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; |
316 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; | 271 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; |
317 | s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
318 | #endif | 272 | #endif |
319 | } | 273 | } |
320 | 274 | ||
@@ -323,7 +277,6 @@ static inline void s5pv210_default_sdhci2(void) | |||
323 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 277 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
324 | s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | 278 | s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; |
325 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; | 279 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; |
326 | s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
327 | #endif | 280 | #endif |
328 | } | 281 | } |
329 | 282 | ||
@@ -332,7 +285,6 @@ static inline void s5pv210_default_sdhci3(void) | |||
332 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 285 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
333 | s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | 286 | s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs; |
334 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; | 287 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; |
335 | s3c_hsmmc3_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
336 | #endif | 288 | #endif |
337 | } | 289 | } |
338 | 290 | ||
@@ -348,17 +300,11 @@ static inline void s5pv210_default_sdhci3(void) { } | |||
348 | #ifdef CONFIG_EXYNOS4_SETUP_SDHCI | 300 | #ifdef CONFIG_EXYNOS4_SETUP_SDHCI |
349 | extern char *exynos4_hsmmc_clksrcs[4]; | 301 | extern char *exynos4_hsmmc_clksrcs[4]; |
350 | 302 | ||
351 | extern void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, | ||
352 | void __iomem *r, | ||
353 | struct mmc_ios *ios, | ||
354 | struct mmc_card *card); | ||
355 | |||
356 | static inline void exynos4_default_sdhci0(void) | 303 | static inline void exynos4_default_sdhci0(void) |
357 | { | 304 | { |
358 | #ifdef CONFIG_S3C_DEV_HSMMC | 305 | #ifdef CONFIG_S3C_DEV_HSMMC |
359 | s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs; | 306 | s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs; |
360 | s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; | 307 | s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; |
361 | s3c_hsmmc0_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card; | ||
362 | #endif | 308 | #endif |
363 | } | 309 | } |
364 | 310 | ||
@@ -367,7 +313,6 @@ static inline void exynos4_default_sdhci1(void) | |||
367 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 313 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
368 | s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs; | 314 | s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs; |
369 | s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; | 315 | s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; |
370 | s3c_hsmmc1_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card; | ||
371 | #endif | 316 | #endif |
372 | } | 317 | } |
373 | 318 | ||
@@ -376,7 +321,6 @@ static inline void exynos4_default_sdhci2(void) | |||
376 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 321 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
377 | s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs; | 322 | s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs; |
378 | s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; | 323 | s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; |
379 | s3c_hsmmc2_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card; | ||
380 | #endif | 324 | #endif |
381 | } | 325 | } |
382 | 326 | ||
@@ -385,7 +329,6 @@ static inline void exynos4_default_sdhci3(void) | |||
385 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 329 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
386 | s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs; | 330 | s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs; |
387 | s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; | 331 | s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; |
388 | s3c_hsmmc3_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card; | ||
389 | #endif | 332 | #endif |
390 | } | 333 | } |
391 | 334 | ||
diff --git a/arch/arm/plat-s5p/include/plat/sysmmu.h b/arch/arm/plat-samsung/include/plat/sysmmu.h index bf5283c2a19..5fe8ee01a5b 100644 --- a/arch/arm/plat-s5p/include/plat/sysmmu.h +++ b/arch/arm/plat-samsung/include/plat/sysmmu.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/arch/arm/plat-s5p/include/plat/sysmmu.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/sysmmu.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
@@ -10,8 +10,8 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #ifndef __ASM__PLAT_SYSMMU_H | 13 | #ifndef __PLAT_SAMSUNG_SYSMMU_H |
14 | #define __ASM__PLAT_SYSMMU_H __FILE__ | 14 | #define __PLAT_SAMSUNG_SYSMMU_H __FILE__ |
15 | 15 | ||
16 | enum S5P_SYSMMU_INTERRUPT_TYPE { | 16 | enum S5P_SYSMMU_INTERRUPT_TYPE { |
17 | SYSMMU_PAGEFAULT, | 17 | SYSMMU_PAGEFAULT, |
diff --git a/arch/arm/plat-s5p/include/plat/system-reset.h b/arch/arm/plat-samsung/include/plat/system-reset.h index f307f34e642..a448e990964 100644 --- a/arch/arm/plat-s5p/include/plat/system-reset.h +++ b/arch/arm/plat-samsung/include/plat/system-reset.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/arch/arm/plat-s5p/include/plat/system-reset.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/system-reset.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
diff --git a/arch/arm/plat-samsung/include/plat/tv-core.h b/arch/arm/plat-samsung/include/plat/tv-core.h new file mode 100644 index 00000000000..3bc34f3ce28 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/tv-core.h | |||
@@ -0,0 +1,44 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-samsung/include/plat/tv.h | ||
3 | * | ||
4 | * Copyright 2011 Samsung Electronics Co., Ltd. | ||
5 | * Tomasz Stanislawski <t.stanislaws@samsung.com> | ||
6 | * | ||
7 | * Samsung TV driver core functions | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #ifndef __SAMSUNG_PLAT_TV_H | ||
15 | #define __SAMSUNG_PLAT_TV_H __FILE__ | ||
16 | |||
17 | /* | ||
18 | * These functions are only for use with the core support code, such as | ||
19 | * the CPU-specific initialization code. | ||
20 | */ | ||
21 | |||
22 | /* Re-define device name to differentiate the subsystem in various SoCs. */ | ||
23 | static inline void s5p_hdmi_setname(char *name) | ||
24 | { | ||
25 | #ifdef CONFIG_S5P_DEV_TV | ||
26 | s5p_device_hdmi.name = name; | ||
27 | #endif | ||
28 | } | ||
29 | |||
30 | static inline void s5p_mixer_setname(char *name) | ||
31 | { | ||
32 | #ifdef CONFIG_S5P_DEV_TV | ||
33 | s5p_device_mixer.name = name; | ||
34 | #endif | ||
35 | } | ||
36 | |||
37 | static inline void s5p_sdo_setname(char *name) | ||
38 | { | ||
39 | #ifdef CONFIG_S5P_DEV_TV | ||
40 | s5p_device_sdo.name = name; | ||
41 | #endif | ||
42 | } | ||
43 | |||
44 | #endif /* __SAMSUNG_PLAT_TV_H */ | ||
diff --git a/arch/arm/plat-s3c24xx/include/plat/udc.h b/arch/arm/plat-samsung/include/plat/udc.h index f6388424250..8c22d586bef 100644 --- a/arch/arm/plat-s3c24xx/include/plat/udc.h +++ b/arch/arm/plat-samsung/include/plat/udc.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/udc.h | 1 | /* arch/arm/plat-samsung/include/plat/udc.h |
2 | * | 2 | * |
3 | * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org> | 3 | * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org> |
4 | * | 4 | * |
@@ -26,7 +26,7 @@ enum s3c2410_udc_cmd_e { | |||
26 | 26 | ||
27 | struct s3c2410_udc_mach_info { | 27 | struct s3c2410_udc_mach_info { |
28 | void (*udc_command)(enum s3c2410_udc_cmd_e); | 28 | void (*udc_command)(enum s3c2410_udc_cmd_e); |
29 | void (*vbus_draw)(unsigned int ma); | 29 | void (*vbus_draw)(unsigned int ma); |
30 | 30 | ||
31 | unsigned int pullup_pin; | 31 | unsigned int pullup_pin; |
32 | unsigned int pullup_pin_inverted; | 32 | unsigned int pullup_pin_inverted; |
diff --git a/arch/arm/plat-s5p/include/plat/usb-phy.h b/arch/arm/plat-samsung/include/plat/usb-phy.h index 6dd6bcfca3c..959bcdb03a2 100644 --- a/arch/arm/plat-s5p/include/plat/usb-phy.h +++ b/arch/arm/plat-samsung/include/plat/usb-phy.h | |||
@@ -8,8 +8,8 @@ | |||
8 | * option) any later version. | 8 | * option) any later version. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #ifndef __PLAT_S5P_USB_PHY_H | 11 | #ifndef __PLAT_SAMSUNG_USB_PHY_H |
12 | #define __PLAT_S5P_USB_PHY_H | 12 | #define __PLAT_SAMSUNG_USB_PHY_H __FILE__ |
13 | 13 | ||
14 | enum s5p_usb_phy_type { | 14 | enum s5p_usb_phy_type { |
15 | S5P_USB_PHY_DEVICE, | 15 | S5P_USB_PHY_DEVICE, |
@@ -19,4 +19,4 @@ enum s5p_usb_phy_type { | |||
19 | extern int s5p_usb_phy_init(struct platform_device *pdev, int type); | 19 | extern int s5p_usb_phy_init(struct platform_device *pdev, int type); |
20 | extern int s5p_usb_phy_exit(struct platform_device *pdev, int type); | 20 | extern int s5p_usb_phy_exit(struct platform_device *pdev, int type); |
21 | 21 | ||
22 | #endif /* __PLAT_S5P_REGS_USB_PHY_H */ | 22 | #endif /* __PLAT_SAMSUNG_USB_PHY_H */ |
diff --git a/arch/arm/plat-samsung/platformdata.c b/arch/arm/plat-samsung/platformdata.c index 6de1a382592..ceb9fa3a80c 100644 --- a/arch/arm/plat-samsung/platformdata.c +++ b/arch/arm/plat-samsung/platformdata.c | |||
@@ -10,6 +10,7 @@ | |||
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
13 | #include <linux/slab.h> | ||
13 | #include <linux/string.h> | 14 | #include <linux/string.h> |
14 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
15 | 16 | ||
@@ -50,8 +51,6 @@ void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd, | |||
50 | set->max_width = pd->max_width; | 51 | set->max_width = pd->max_width; |
51 | if (pd->cfg_gpio) | 52 | if (pd->cfg_gpio) |
52 | set->cfg_gpio = pd->cfg_gpio; | 53 | set->cfg_gpio = pd->cfg_gpio; |
53 | if (pd->cfg_card) | ||
54 | set->cfg_card = pd->cfg_card; | ||
55 | if (pd->host_caps) | 54 | if (pd->host_caps) |
56 | set->host_caps |= pd->host_caps; | 55 | set->host_caps |= pd->host_caps; |
57 | if (pd->clk_type) | 56 | if (pd->clk_type) |
diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c index 96528200eb7..4be016eaa6d 100644 --- a/arch/arm/plat-samsung/pm-gpio.c +++ b/arch/arm/plat-samsung/pm-gpio.c | |||
@@ -28,13 +28,13 @@ | |||
28 | #define OFFS_DAT (0x04) | 28 | #define OFFS_DAT (0x04) |
29 | #define OFFS_UP (0x08) | 29 | #define OFFS_UP (0x08) |
30 | 30 | ||
31 | static void s3c_gpio_pm_1bit_save(struct s3c_gpio_chip *chip) | 31 | static void samsung_gpio_pm_1bit_save(struct samsung_gpio_chip *chip) |
32 | { | 32 | { |
33 | chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON); | 33 | chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON); |
34 | chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT); | 34 | chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT); |
35 | } | 35 | } |
36 | 36 | ||
37 | static void s3c_gpio_pm_1bit_resume(struct s3c_gpio_chip *chip) | 37 | static void samsung_gpio_pm_1bit_resume(struct samsung_gpio_chip *chip) |
38 | { | 38 | { |
39 | void __iomem *base = chip->base; | 39 | void __iomem *base = chip->base; |
40 | u32 old_gpcon = __raw_readl(base + OFFS_CON); | 40 | u32 old_gpcon = __raw_readl(base + OFFS_CON); |
@@ -60,12 +60,12 @@ static void s3c_gpio_pm_1bit_resume(struct s3c_gpio_chip *chip) | |||
60 | chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); | 60 | chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); |
61 | } | 61 | } |
62 | 62 | ||
63 | struct s3c_gpio_pm s3c_gpio_pm_1bit = { | 63 | struct samsung_gpio_pm samsung_gpio_pm_1bit = { |
64 | .save = s3c_gpio_pm_1bit_save, | 64 | .save = samsung_gpio_pm_1bit_save, |
65 | .resume = s3c_gpio_pm_1bit_resume, | 65 | .resume = samsung_gpio_pm_1bit_resume, |
66 | }; | 66 | }; |
67 | 67 | ||
68 | static void s3c_gpio_pm_2bit_save(struct s3c_gpio_chip *chip) | 68 | static void samsung_gpio_pm_2bit_save(struct samsung_gpio_chip *chip) |
69 | { | 69 | { |
70 | chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON); | 70 | chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON); |
71 | chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT); | 71 | chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT); |
@@ -95,7 +95,7 @@ static inline int is_out(unsigned long con) | |||
95 | } | 95 | } |
96 | 96 | ||
97 | /** | 97 | /** |
98 | * s3c_gpio_pm_2bit_resume() - restore the given GPIO bank | 98 | * samsung_gpio_pm_2bit_resume() - restore the given GPIO bank |
99 | * @chip: The chip information to resume. | 99 | * @chip: The chip information to resume. |
100 | * | 100 | * |
101 | * Restore one of the GPIO banks that was saved during suspend. This is | 101 | * Restore one of the GPIO banks that was saved during suspend. This is |
@@ -121,7 +121,7 @@ static inline int is_out(unsigned long con) | |||
121 | * [1] this assumes that writing to a pin DAT whilst in SFN will set the | 121 | * [1] this assumes that writing to a pin DAT whilst in SFN will set the |
122 | * state for when it is next output. | 122 | * state for when it is next output. |
123 | */ | 123 | */ |
124 | static void s3c_gpio_pm_2bit_resume(struct s3c_gpio_chip *chip) | 124 | static void samsung_gpio_pm_2bit_resume(struct samsung_gpio_chip *chip) |
125 | { | 125 | { |
126 | void __iomem *base = chip->base; | 126 | void __iomem *base = chip->base; |
127 | u32 old_gpcon = __raw_readl(base + OFFS_CON); | 127 | u32 old_gpcon = __raw_readl(base + OFFS_CON); |
@@ -187,13 +187,13 @@ static void s3c_gpio_pm_2bit_resume(struct s3c_gpio_chip *chip) | |||
187 | chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); | 187 | chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); |
188 | } | 188 | } |
189 | 189 | ||
190 | struct s3c_gpio_pm s3c_gpio_pm_2bit = { | 190 | struct samsung_gpio_pm samsung_gpio_pm_2bit = { |
191 | .save = s3c_gpio_pm_2bit_save, | 191 | .save = samsung_gpio_pm_2bit_save, |
192 | .resume = s3c_gpio_pm_2bit_resume, | 192 | .resume = samsung_gpio_pm_2bit_resume, |
193 | }; | 193 | }; |
194 | 194 | ||
195 | #if defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_PLAT_S5P) | 195 | #if defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_PLAT_S5P) |
196 | static void s3c_gpio_pm_4bit_save(struct s3c_gpio_chip *chip) | 196 | static void samsung_gpio_pm_4bit_save(struct samsung_gpio_chip *chip) |
197 | { | 197 | { |
198 | chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON); | 198 | chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON); |
199 | chip->pm_save[2] = __raw_readl(chip->base + OFFS_DAT); | 199 | chip->pm_save[2] = __raw_readl(chip->base + OFFS_DAT); |
@@ -203,7 +203,7 @@ static void s3c_gpio_pm_4bit_save(struct s3c_gpio_chip *chip) | |||
203 | chip->pm_save[0] = __raw_readl(chip->base - 4); | 203 | chip->pm_save[0] = __raw_readl(chip->base - 4); |
204 | } | 204 | } |
205 | 205 | ||
206 | static u32 s3c_gpio_pm_4bit_mask(u32 old_gpcon, u32 gps_gpcon) | 206 | static u32 samsung_gpio_pm_4bit_mask(u32 old_gpcon, u32 gps_gpcon) |
207 | { | 207 | { |
208 | u32 old, new, mask; | 208 | u32 old, new, mask; |
209 | u32 change_mask = 0x0; | 209 | u32 change_mask = 0x0; |
@@ -242,14 +242,14 @@ static u32 s3c_gpio_pm_4bit_mask(u32 old_gpcon, u32 gps_gpcon) | |||
242 | return change_mask; | 242 | return change_mask; |
243 | } | 243 | } |
244 | 244 | ||
245 | static void s3c_gpio_pm_4bit_con(struct s3c_gpio_chip *chip, int index) | 245 | static void samsung_gpio_pm_4bit_con(struct samsung_gpio_chip *chip, int index) |
246 | { | 246 | { |
247 | void __iomem *con = chip->base + (index * 4); | 247 | void __iomem *con = chip->base + (index * 4); |
248 | u32 old_gpcon = __raw_readl(con); | 248 | u32 old_gpcon = __raw_readl(con); |
249 | u32 gps_gpcon = chip->pm_save[index + 1]; | 249 | u32 gps_gpcon = chip->pm_save[index + 1]; |
250 | u32 gpcon, mask; | 250 | u32 gpcon, mask; |
251 | 251 | ||
252 | mask = s3c_gpio_pm_4bit_mask(old_gpcon, gps_gpcon); | 252 | mask = samsung_gpio_pm_4bit_mask(old_gpcon, gps_gpcon); |
253 | 253 | ||
254 | gpcon = old_gpcon & ~mask; | 254 | gpcon = old_gpcon & ~mask; |
255 | gpcon |= gps_gpcon & mask; | 255 | gpcon |= gps_gpcon & mask; |
@@ -257,7 +257,7 @@ static void s3c_gpio_pm_4bit_con(struct s3c_gpio_chip *chip, int index) | |||
257 | __raw_writel(gpcon, con); | 257 | __raw_writel(gpcon, con); |
258 | } | 258 | } |
259 | 259 | ||
260 | static void s3c_gpio_pm_4bit_resume(struct s3c_gpio_chip *chip) | 260 | static void samsung_gpio_pm_4bit_resume(struct samsung_gpio_chip *chip) |
261 | { | 261 | { |
262 | void __iomem *base = chip->base; | 262 | void __iomem *base = chip->base; |
263 | u32 old_gpcon[2]; | 263 | u32 old_gpcon[2]; |
@@ -269,10 +269,10 @@ static void s3c_gpio_pm_4bit_resume(struct s3c_gpio_chip *chip) | |||
269 | old_gpcon[0] = 0; | 269 | old_gpcon[0] = 0; |
270 | old_gpcon[1] = __raw_readl(base + OFFS_CON); | 270 | old_gpcon[1] = __raw_readl(base + OFFS_CON); |
271 | 271 | ||
272 | s3c_gpio_pm_4bit_con(chip, 0); | 272 | samsung_gpio_pm_4bit_con(chip, 0); |
273 | if (chip->chip.ngpio > 8) { | 273 | if (chip->chip.ngpio > 8) { |
274 | old_gpcon[0] = __raw_readl(base - 4); | 274 | old_gpcon[0] = __raw_readl(base - 4); |
275 | s3c_gpio_pm_4bit_con(chip, -1); | 275 | samsung_gpio_pm_4bit_con(chip, -1); |
276 | } | 276 | } |
277 | 277 | ||
278 | /* Now change the configurations that require DAT,CON */ | 278 | /* Now change the configurations that require DAT,CON */ |
@@ -298,19 +298,19 @@ static void s3c_gpio_pm_4bit_resume(struct s3c_gpio_chip *chip) | |||
298 | old_gpdat, gps_gpdat); | 298 | old_gpdat, gps_gpdat); |
299 | } | 299 | } |
300 | 300 | ||
301 | struct s3c_gpio_pm s3c_gpio_pm_4bit = { | 301 | struct samsung_gpio_pm samsung_gpio_pm_4bit = { |
302 | .save = s3c_gpio_pm_4bit_save, | 302 | .save = samsung_gpio_pm_4bit_save, |
303 | .resume = s3c_gpio_pm_4bit_resume, | 303 | .resume = samsung_gpio_pm_4bit_resume, |
304 | }; | 304 | }; |
305 | #endif /* CONFIG_ARCH_S3C64XX || CONFIG_PLAT_S5P */ | 305 | #endif /* CONFIG_ARCH_S3C64XX || CONFIG_PLAT_S5P */ |
306 | 306 | ||
307 | /** | 307 | /** |
308 | * s3c_pm_save_gpio() - save gpio chip data for suspend | 308 | * samsung_pm_save_gpio() - save gpio chip data for suspend |
309 | * @ourchip: The chip for suspend. | 309 | * @ourchip: The chip for suspend. |
310 | */ | 310 | */ |
311 | static void s3c_pm_save_gpio(struct s3c_gpio_chip *ourchip) | 311 | static void samsung_pm_save_gpio(struct samsung_gpio_chip *ourchip) |
312 | { | 312 | { |
313 | struct s3c_gpio_pm *pm = ourchip->pm; | 313 | struct samsung_gpio_pm *pm = ourchip->pm; |
314 | 314 | ||
315 | if (pm == NULL || pm->save == NULL) | 315 | if (pm == NULL || pm->save == NULL) |
316 | S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label); | 316 | S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label); |
@@ -319,24 +319,24 @@ static void s3c_pm_save_gpio(struct s3c_gpio_chip *ourchip) | |||
319 | } | 319 | } |
320 | 320 | ||
321 | /** | 321 | /** |
322 | * s3c_pm_save_gpios() - Save the state of the GPIO banks. | 322 | * samsung_pm_save_gpios() - Save the state of the GPIO banks. |
323 | * | 323 | * |
324 | * For all the GPIO banks, save the state of each one ready for going | 324 | * For all the GPIO banks, save the state of each one ready for going |
325 | * into a suspend mode. | 325 | * into a suspend mode. |
326 | */ | 326 | */ |
327 | void s3c_pm_save_gpios(void) | 327 | void samsung_pm_save_gpios(void) |
328 | { | 328 | { |
329 | struct s3c_gpio_chip *ourchip; | 329 | struct samsung_gpio_chip *ourchip; |
330 | unsigned int gpio_nr; | 330 | unsigned int gpio_nr; |
331 | 331 | ||
332 | for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { | 332 | for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { |
333 | ourchip = s3c_gpiolib_getchip(gpio_nr); | 333 | ourchip = samsung_gpiolib_getchip(gpio_nr); |
334 | if (!ourchip) { | 334 | if (!ourchip) { |
335 | gpio_nr++; | 335 | gpio_nr++; |
336 | continue; | 336 | continue; |
337 | } | 337 | } |
338 | 338 | ||
339 | s3c_pm_save_gpio(ourchip); | 339 | samsung_pm_save_gpio(ourchip); |
340 | 340 | ||
341 | S3C_PMDBG("%s: save %08x,%08x,%08x,%08x\n", | 341 | S3C_PMDBG("%s: save %08x,%08x,%08x,%08x\n", |
342 | ourchip->chip.label, | 342 | ourchip->chip.label, |
@@ -351,12 +351,12 @@ void s3c_pm_save_gpios(void) | |||
351 | } | 351 | } |
352 | 352 | ||
353 | /** | 353 | /** |
354 | * s3c_pm_resume_gpio() - restore gpio chip data after suspend | 354 | * samsung_pm_resume_gpio() - restore gpio chip data after suspend |
355 | * @ourchip: The suspended chip. | 355 | * @ourchip: The suspended chip. |
356 | */ | 356 | */ |
357 | static void s3c_pm_resume_gpio(struct s3c_gpio_chip *ourchip) | 357 | static void samsung_pm_resume_gpio(struct samsung_gpio_chip *ourchip) |
358 | { | 358 | { |
359 | struct s3c_gpio_pm *pm = ourchip->pm; | 359 | struct samsung_gpio_pm *pm = ourchip->pm; |
360 | 360 | ||
361 | if (pm == NULL || pm->resume == NULL) | 361 | if (pm == NULL || pm->resume == NULL) |
362 | S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label); | 362 | S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label); |
@@ -364,19 +364,19 @@ static void s3c_pm_resume_gpio(struct s3c_gpio_chip *ourchip) | |||
364 | pm->resume(ourchip); | 364 | pm->resume(ourchip); |
365 | } | 365 | } |
366 | 366 | ||
367 | void s3c_pm_restore_gpios(void) | 367 | void samsung_pm_restore_gpios(void) |
368 | { | 368 | { |
369 | struct s3c_gpio_chip *ourchip; | 369 | struct samsung_gpio_chip *ourchip; |
370 | unsigned int gpio_nr; | 370 | unsigned int gpio_nr; |
371 | 371 | ||
372 | for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { | 372 | for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { |
373 | ourchip = s3c_gpiolib_getchip(gpio_nr); | 373 | ourchip = samsung_gpiolib_getchip(gpio_nr); |
374 | if (!ourchip) { | 374 | if (!ourchip) { |
375 | gpio_nr++; | 375 | gpio_nr++; |
376 | continue; | 376 | continue; |
377 | } | 377 | } |
378 | 378 | ||
379 | s3c_pm_resume_gpio(ourchip); | 379 | samsung_pm_resume_gpio(ourchip); |
380 | 380 | ||
381 | gpio_nr += ourchip->chip.ngpio; | 381 | gpio_nr += ourchip->chip.ngpio; |
382 | gpio_nr += CONFIG_S3C_GPIO_SPACE; | 382 | gpio_nr += CONFIG_S3C_GPIO_SPACE; |
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c index ae6f99834cd..64ab65f0fdb 100644 --- a/arch/arm/plat-samsung/pm.c +++ b/arch/arm/plat-samsung/pm.c | |||
@@ -268,8 +268,8 @@ static int s3c_pm_enter(suspend_state_t state) | |||
268 | 268 | ||
269 | /* save all necessary core registers not covered by the drivers */ | 269 | /* save all necessary core registers not covered by the drivers */ |
270 | 270 | ||
271 | s3c_pm_save_gpios(); | 271 | samsung_pm_save_gpios(); |
272 | s3c_pm_saved_gpios(); | 272 | samsung_pm_saved_gpios(); |
273 | s3c_pm_save_uarts(); | 273 | s3c_pm_save_uarts(); |
274 | s3c_pm_save_core(); | 274 | s3c_pm_save_core(); |
275 | 275 | ||
@@ -306,7 +306,7 @@ static int s3c_pm_enter(suspend_state_t state) | |||
306 | 306 | ||
307 | s3c_pm_restore_core(); | 307 | s3c_pm_restore_core(); |
308 | s3c_pm_restore_uarts(); | 308 | s3c_pm_restore_uarts(); |
309 | s3c_pm_restore_gpios(); | 309 | samsung_pm_restore_gpios(); |
310 | s3c_pm_restored_gpios(); | 310 | s3c_pm_restored_gpios(); |
311 | 311 | ||
312 | s3c_pm_debug_init(); | 312 | s3c_pm_debug_init(); |
diff --git a/arch/arm/plat-samsung/pwm-clock.c b/arch/arm/plat-samsung/pwm-clock.c index f1bba88ed2f..a35ff3bcffe 100644 --- a/arch/arm/plat-samsung/pwm-clock.c +++ b/arch/arm/plat-samsung/pwm-clock.c | |||
@@ -27,7 +27,7 @@ | |||
27 | #include <plat/cpu.h> | 27 | #include <plat/cpu.h> |
28 | 28 | ||
29 | #include <plat/regs-timer.h> | 29 | #include <plat/regs-timer.h> |
30 | #include <mach/pwm-clock.h> | 30 | #include <plat/pwm-clock.h> |
31 | 31 | ||
32 | /* Each of the timers 0 through 5 go through the following | 32 | /* Each of the timers 0 through 5 go through the following |
33 | * clock tree, with the inputs depending on the timers. | 33 | * clock tree, with the inputs depending on the timers. |
@@ -339,8 +339,17 @@ static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent) | |||
339 | unsigned long bits; | 339 | unsigned long bits; |
340 | unsigned long shift = S3C2410_TCFG1_SHIFT(id); | 340 | unsigned long shift = S3C2410_TCFG1_SHIFT(id); |
341 | 341 | ||
342 | unsigned long mux_tclk; | ||
343 | |||
344 | if (soc_is_s3c24xx()) | ||
345 | mux_tclk = S3C2410_TCFG1_MUX_TCLK; | ||
346 | else if (soc_is_s5p6440() || soc_is_s5p6450()) | ||
347 | mux_tclk = 0; | ||
348 | else | ||
349 | mux_tclk = S3C64XX_TCFG1_MUX_TCLK; | ||
350 | |||
342 | if (parent == s3c24xx_pwmclk_tclk(id)) | 351 | if (parent == s3c24xx_pwmclk_tclk(id)) |
343 | bits = S3C_TCFG1_MUX_TCLK << shift; | 352 | bits = mux_tclk << shift; |
344 | else if (parent == s3c24xx_pwmclk_tdiv(id)) | 353 | else if (parent == s3c24xx_pwmclk_tdiv(id)) |
345 | bits = clk_pwm_tdiv_bits(to_tdiv(parent)) << shift; | 354 | bits = clk_pwm_tdiv_bits(to_tdiv(parent)) << shift; |
346 | else | 355 | else |
diff --git a/arch/arm/plat-samsung/pwm.c b/arch/arm/plat-samsung/pwm.c index f37457c5206..dc1185dcf80 100644 --- a/arch/arm/plat-samsung/pwm.c +++ b/arch/arm/plat-samsung/pwm.c | |||
@@ -299,6 +299,9 @@ static int s3c_pwm_probe(struct platform_device *pdev) | |||
299 | goto err_clk_tin; | 299 | goto err_clk_tin; |
300 | } | 300 | } |
301 | 301 | ||
302 | clk_enable(pwm->clk); | ||
303 | clk_enable(pwm->clk_div); | ||
304 | |||
302 | local_irq_save(flags); | 305 | local_irq_save(flags); |
303 | 306 | ||
304 | tcon = __raw_readl(S3C2410_TCON); | 307 | tcon = __raw_readl(S3C2410_TCON); |
@@ -326,6 +329,8 @@ static int s3c_pwm_probe(struct platform_device *pdev) | |||
326 | return 0; | 329 | return 0; |
327 | 330 | ||
328 | err_clk_tdiv: | 331 | err_clk_tdiv: |
332 | clk_disable(pwm->clk_div); | ||
333 | clk_disable(pwm->clk); | ||
329 | clk_put(pwm->clk_div); | 334 | clk_put(pwm->clk_div); |
330 | 335 | ||
331 | err_clk_tin: | 336 | err_clk_tin: |
@@ -340,6 +345,8 @@ static int __devexit s3c_pwm_remove(struct platform_device *pdev) | |||
340 | { | 345 | { |
341 | struct pwm_device *pwm = platform_get_drvdata(pdev); | 346 | struct pwm_device *pwm = platform_get_drvdata(pdev); |
342 | 347 | ||
348 | clk_disable(pwm->clk_div); | ||
349 | clk_disable(pwm->clk); | ||
343 | clk_put(pwm->clk_div); | 350 | clk_put(pwm->clk_div); |
344 | clk_put(pwm->clk); | 351 | clk_put(pwm->clk); |
345 | kfree(pwm); | 352 | kfree(pwm); |
diff --git a/arch/arm/plat-samsung/s3c-dma-ops.c b/arch/arm/plat-samsung/s3c-dma-ops.c new file mode 100644 index 00000000000..582333c7058 --- /dev/null +++ b/arch/arm/plat-samsung/s3c-dma-ops.c | |||
@@ -0,0 +1,130 @@ | |||
1 | /* linux/arch/arm/plat-samsung/s3c-dma-ops.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Samsung S3C-DMA Operations | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/errno.h> | ||
15 | #include <linux/slab.h> | ||
16 | #include <linux/types.h> | ||
17 | |||
18 | #include <mach/dma.h> | ||
19 | |||
20 | struct cb_data { | ||
21 | void (*fp) (void *); | ||
22 | void *fp_param; | ||
23 | unsigned ch; | ||
24 | struct list_head node; | ||
25 | }; | ||
26 | |||
27 | static LIST_HEAD(dma_list); | ||
28 | |||
29 | static void s3c_dma_cb(struct s3c2410_dma_chan *channel, void *param, | ||
30 | int size, enum s3c2410_dma_buffresult res) | ||
31 | { | ||
32 | struct cb_data *data = param; | ||
33 | |||
34 | data->fp(data->fp_param); | ||
35 | } | ||
36 | |||
37 | static unsigned s3c_dma_request(enum dma_ch dma_ch, | ||
38 | struct samsung_dma_info *info) | ||
39 | { | ||
40 | struct cb_data *data; | ||
41 | |||
42 | if (s3c2410_dma_request(dma_ch, info->client, NULL) < 0) { | ||
43 | s3c2410_dma_free(dma_ch, info->client); | ||
44 | return 0; | ||
45 | } | ||
46 | |||
47 | data = kzalloc(sizeof(struct cb_data), GFP_KERNEL); | ||
48 | data->ch = dma_ch; | ||
49 | list_add_tail(&data->node, &dma_list); | ||
50 | |||
51 | s3c2410_dma_devconfig(dma_ch, info->direction, info->fifo); | ||
52 | |||
53 | if (info->cap == DMA_CYCLIC) | ||
54 | s3c2410_dma_setflags(dma_ch, S3C2410_DMAF_CIRCULAR); | ||
55 | |||
56 | s3c2410_dma_config(dma_ch, info->width); | ||
57 | |||
58 | return (unsigned)dma_ch; | ||
59 | } | ||
60 | |||
61 | static int s3c_dma_release(unsigned ch, struct s3c2410_dma_client *client) | ||
62 | { | ||
63 | struct cb_data *data; | ||
64 | |||
65 | list_for_each_entry(data, &dma_list, node) | ||
66 | if (data->ch == ch) | ||
67 | break; | ||
68 | list_del(&data->node); | ||
69 | |||
70 | s3c2410_dma_free(ch, client); | ||
71 | kfree(data); | ||
72 | |||
73 | return 0; | ||
74 | } | ||
75 | |||
76 | static int s3c_dma_prepare(unsigned ch, struct samsung_dma_prep_info *info) | ||
77 | { | ||
78 | struct cb_data *data; | ||
79 | int len = (info->cap == DMA_CYCLIC) ? info->period : info->len; | ||
80 | |||
81 | list_for_each_entry(data, &dma_list, node) | ||
82 | if (data->ch == ch) | ||
83 | break; | ||
84 | |||
85 | if (!data->fp) { | ||
86 | s3c2410_dma_set_buffdone_fn(ch, s3c_dma_cb); | ||
87 | data->fp = info->fp; | ||
88 | data->fp_param = info->fp_param; | ||
89 | } | ||
90 | |||
91 | s3c2410_dma_enqueue(ch, (void *)data, info->buf, len); | ||
92 | |||
93 | return 0; | ||
94 | } | ||
95 | |||
96 | static inline int s3c_dma_trigger(unsigned ch) | ||
97 | { | ||
98 | return s3c2410_dma_ctrl(ch, S3C2410_DMAOP_START); | ||
99 | } | ||
100 | |||
101 | static inline int s3c_dma_started(unsigned ch) | ||
102 | { | ||
103 | return s3c2410_dma_ctrl(ch, S3C2410_DMAOP_STARTED); | ||
104 | } | ||
105 | |||
106 | static inline int s3c_dma_flush(unsigned ch) | ||
107 | { | ||
108 | return s3c2410_dma_ctrl(ch, S3C2410_DMAOP_FLUSH); | ||
109 | } | ||
110 | |||
111 | static inline int s3c_dma_stop(unsigned ch) | ||
112 | { | ||
113 | return s3c2410_dma_ctrl(ch, S3C2410_DMAOP_STOP); | ||
114 | } | ||
115 | |||
116 | static struct samsung_dma_ops s3c_dma_ops = { | ||
117 | .request = s3c_dma_request, | ||
118 | .release = s3c_dma_release, | ||
119 | .prepare = s3c_dma_prepare, | ||
120 | .trigger = s3c_dma_trigger, | ||
121 | .started = s3c_dma_started, | ||
122 | .flush = s3c_dma_flush, | ||
123 | .stop = s3c_dma_stop, | ||
124 | }; | ||
125 | |||
126 | void *s3c_dma_get_ops(void) | ||
127 | { | ||
128 | return &s3c_dma_ops; | ||
129 | } | ||
130 | EXPORT_SYMBOL(s3c_dma_get_ops); | ||
diff --git a/arch/arm/plat-samsung/s3c-pl330.c b/arch/arm/plat-samsung/s3c-pl330.c deleted file mode 100644 index f85638c6f5a..00000000000 --- a/arch/arm/plat-samsung/s3c-pl330.c +++ /dev/null | |||
@@ -1,1244 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/s3c-pl330.c | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/init.h> | ||
13 | #include <linux/module.h> | ||
14 | #include <linux/interrupt.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <linux/slab.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | #include <linux/clk.h> | ||
19 | #include <linux/err.h> | ||
20 | |||
21 | #include <asm/hardware/pl330.h> | ||
22 | |||
23 | #include <plat/s3c-pl330-pdata.h> | ||
24 | |||
25 | /** | ||
26 | * struct s3c_pl330_dmac - Logical representation of a PL330 DMAC. | ||
27 | * @busy_chan: Number of channels currently busy. | ||
28 | * @peri: List of IDs of peripherals this DMAC can work with. | ||
29 | * @node: To attach to the global list of DMACs. | ||
30 | * @pi: PL330 configuration info for the DMAC. | ||
31 | * @kmcache: Pool to quickly allocate xfers for all channels in the dmac. | ||
32 | * @clk: Pointer of DMAC operation clock. | ||
33 | */ | ||
34 | struct s3c_pl330_dmac { | ||
35 | unsigned busy_chan; | ||
36 | enum dma_ch *peri; | ||
37 | struct list_head node; | ||
38 | struct pl330_info *pi; | ||
39 | struct kmem_cache *kmcache; | ||
40 | struct clk *clk; | ||
41 | }; | ||
42 | |||
43 | /** | ||
44 | * struct s3c_pl330_xfer - A request submitted by S3C DMA clients. | ||
45 | * @token: Xfer ID provided by the client. | ||
46 | * @node: To attach to the list of xfers on a channel. | ||
47 | * @px: Xfer for PL330 core. | ||
48 | * @chan: Owner channel of this xfer. | ||
49 | */ | ||
50 | struct s3c_pl330_xfer { | ||
51 | void *token; | ||
52 | struct list_head node; | ||
53 | struct pl330_xfer px; | ||
54 | struct s3c_pl330_chan *chan; | ||
55 | }; | ||
56 | |||
57 | /** | ||
58 | * struct s3c_pl330_chan - Logical channel to communicate with | ||
59 | * a Physical peripheral. | ||
60 | * @pl330_chan_id: Token of a hardware channel thread of PL330 DMAC. | ||
61 | * NULL if the channel is available to be acquired. | ||
62 | * @id: ID of the peripheral that this channel can communicate with. | ||
63 | * @options: Options specified by the client. | ||
64 | * @sdaddr: Address provided via s3c2410_dma_devconfig. | ||
65 | * @node: To attach to the global list of channels. | ||
66 | * @lrq: Pointer to the last submitted pl330_req to PL330 core. | ||
67 | * @xfer_list: To manage list of xfers enqueued. | ||
68 | * @req: Two requests to communicate with the PL330 engine. | ||
69 | * @callback_fn: Callback function to the client. | ||
70 | * @rqcfg: Channel configuration for the xfers. | ||
71 | * @xfer_head: Pointer to the xfer to be next executed. | ||
72 | * @dmac: Pointer to the DMAC that manages this channel, NULL if the | ||
73 | * channel is available to be acquired. | ||
74 | * @client: Client of this channel. NULL if the | ||
75 | * channel is available to be acquired. | ||
76 | */ | ||
77 | struct s3c_pl330_chan { | ||
78 | void *pl330_chan_id; | ||
79 | enum dma_ch id; | ||
80 | unsigned int options; | ||
81 | unsigned long sdaddr; | ||
82 | struct list_head node; | ||
83 | struct pl330_req *lrq; | ||
84 | struct list_head xfer_list; | ||
85 | struct pl330_req req[2]; | ||
86 | s3c2410_dma_cbfn_t callback_fn; | ||
87 | struct pl330_reqcfg rqcfg; | ||
88 | struct s3c_pl330_xfer *xfer_head; | ||
89 | struct s3c_pl330_dmac *dmac; | ||
90 | struct s3c2410_dma_client *client; | ||
91 | }; | ||
92 | |||
93 | /* All DMACs in the platform */ | ||
94 | static LIST_HEAD(dmac_list); | ||
95 | |||
96 | /* All channels to peripherals in the platform */ | ||
97 | static LIST_HEAD(chan_list); | ||
98 | |||
99 | /* | ||
100 | * Since we add resources(DMACs and Channels) to the global pool, | ||
101 | * we need to guard access to the resources using a global lock | ||
102 | */ | ||
103 | static DEFINE_SPINLOCK(res_lock); | ||
104 | |||
105 | /* Returns the channel with ID 'id' in the chan_list */ | ||
106 | static struct s3c_pl330_chan *id_to_chan(const enum dma_ch id) | ||
107 | { | ||
108 | struct s3c_pl330_chan *ch; | ||
109 | |||
110 | list_for_each_entry(ch, &chan_list, node) | ||
111 | if (ch->id == id) | ||
112 | return ch; | ||
113 | |||
114 | return NULL; | ||
115 | } | ||
116 | |||
117 | /* Allocate a new channel with ID 'id' and add to chan_list */ | ||
118 | static void chan_add(const enum dma_ch id) | ||
119 | { | ||
120 | struct s3c_pl330_chan *ch = id_to_chan(id); | ||
121 | |||
122 | /* Return if the channel already exists */ | ||
123 | if (ch) | ||
124 | return; | ||
125 | |||
126 | ch = kmalloc(sizeof(*ch), GFP_KERNEL); | ||
127 | /* Return silently to work with other channels */ | ||
128 | if (!ch) | ||
129 | return; | ||
130 | |||
131 | ch->id = id; | ||
132 | ch->dmac = NULL; | ||
133 | |||
134 | list_add_tail(&ch->node, &chan_list); | ||
135 | } | ||
136 | |||
137 | /* If the channel is not yet acquired by any client */ | ||
138 | static bool chan_free(struct s3c_pl330_chan *ch) | ||
139 | { | ||
140 | if (!ch) | ||
141 | return false; | ||
142 | |||
143 | /* Channel points to some DMAC only when it's acquired */ | ||
144 | return ch->dmac ? false : true; | ||
145 | } | ||
146 | |||
147 | /* | ||
148 | * Returns 0 is peripheral i/f is invalid or not present on the dmac. | ||
149 | * Index + 1, otherwise. | ||
150 | */ | ||
151 | static unsigned iface_of_dmac(struct s3c_pl330_dmac *dmac, enum dma_ch ch_id) | ||
152 | { | ||
153 | enum dma_ch *id = dmac->peri; | ||
154 | int i; | ||
155 | |||
156 | /* Discount invalid markers */ | ||
157 | if (ch_id == DMACH_MAX) | ||
158 | return 0; | ||
159 | |||
160 | for (i = 0; i < PL330_MAX_PERI; i++) | ||
161 | if (id[i] == ch_id) | ||
162 | return i + 1; | ||
163 | |||
164 | return 0; | ||
165 | } | ||
166 | |||
167 | /* If all channel threads of the DMAC are busy */ | ||
168 | static inline bool dmac_busy(struct s3c_pl330_dmac *dmac) | ||
169 | { | ||
170 | struct pl330_info *pi = dmac->pi; | ||
171 | |||
172 | return (dmac->busy_chan < pi->pcfg.num_chan) ? false : true; | ||
173 | } | ||
174 | |||
175 | /* | ||
176 | * Returns the number of free channels that | ||
177 | * can be handled by this dmac only. | ||
178 | */ | ||
179 | static unsigned ch_onlyby_dmac(struct s3c_pl330_dmac *dmac) | ||
180 | { | ||
181 | enum dma_ch *id = dmac->peri; | ||
182 | struct s3c_pl330_dmac *d; | ||
183 | struct s3c_pl330_chan *ch; | ||
184 | unsigned found, count = 0; | ||
185 | enum dma_ch p; | ||
186 | int i; | ||
187 | |||
188 | for (i = 0; i < PL330_MAX_PERI; i++) { | ||
189 | p = id[i]; | ||
190 | ch = id_to_chan(p); | ||
191 | |||
192 | if (p == DMACH_MAX || !chan_free(ch)) | ||
193 | continue; | ||
194 | |||
195 | found = 0; | ||
196 | list_for_each_entry(d, &dmac_list, node) { | ||
197 | if (d != dmac && iface_of_dmac(d, ch->id)) { | ||
198 | found = 1; | ||
199 | break; | ||
200 | } | ||
201 | } | ||
202 | if (!found) | ||
203 | count++; | ||
204 | } | ||
205 | |||
206 | return count; | ||
207 | } | ||
208 | |||
209 | /* | ||
210 | * Measure of suitability of 'dmac' handling 'ch' | ||
211 | * | ||
212 | * 0 indicates 'dmac' can not handle 'ch' either | ||
213 | * because it is not supported by the hardware or | ||
214 | * because all dmac channels are currently busy. | ||
215 | * | ||
216 | * >0 vlaue indicates 'dmac' has the capability. | ||
217 | * The bigger the value the more suitable the dmac. | ||
218 | */ | ||
219 | #define MAX_SUIT UINT_MAX | ||
220 | #define MIN_SUIT 0 | ||
221 | |||
222 | static unsigned suitablility(struct s3c_pl330_dmac *dmac, | ||
223 | struct s3c_pl330_chan *ch) | ||
224 | { | ||
225 | struct pl330_info *pi = dmac->pi; | ||
226 | enum dma_ch *id = dmac->peri; | ||
227 | struct s3c_pl330_dmac *d; | ||
228 | unsigned s; | ||
229 | int i; | ||
230 | |||
231 | s = MIN_SUIT; | ||
232 | /* If all the DMAC channel threads are busy */ | ||
233 | if (dmac_busy(dmac)) | ||
234 | return s; | ||
235 | |||
236 | for (i = 0; i < PL330_MAX_PERI; i++) | ||
237 | if (id[i] == ch->id) | ||
238 | break; | ||
239 | |||
240 | /* If the 'dmac' can't talk to 'ch' */ | ||
241 | if (i == PL330_MAX_PERI) | ||
242 | return s; | ||
243 | |||
244 | s = MAX_SUIT; | ||
245 | list_for_each_entry(d, &dmac_list, node) { | ||
246 | /* | ||
247 | * If some other dmac can talk to this | ||
248 | * peri and has some channel free. | ||
249 | */ | ||
250 | if (d != dmac && iface_of_dmac(d, ch->id) && !dmac_busy(d)) { | ||
251 | s = 0; | ||
252 | break; | ||
253 | } | ||
254 | } | ||
255 | if (s) | ||
256 | return s; | ||
257 | |||
258 | s = 100; | ||
259 | |||
260 | /* Good if free chans are more, bad otherwise */ | ||
261 | s += (pi->pcfg.num_chan - dmac->busy_chan) - ch_onlyby_dmac(dmac); | ||
262 | |||
263 | return s; | ||
264 | } | ||
265 | |||
266 | /* More than one DMAC may have capability to transfer data with the | ||
267 | * peripheral. This function assigns most suitable DMAC to manage the | ||
268 | * channel and hence communicate with the peripheral. | ||
269 | */ | ||
270 | static struct s3c_pl330_dmac *map_chan_to_dmac(struct s3c_pl330_chan *ch) | ||
271 | { | ||
272 | struct s3c_pl330_dmac *d, *dmac = NULL; | ||
273 | unsigned sn, sl = MIN_SUIT; | ||
274 | |||
275 | list_for_each_entry(d, &dmac_list, node) { | ||
276 | sn = suitablility(d, ch); | ||
277 | |||
278 | if (sn == MAX_SUIT) | ||
279 | return d; | ||
280 | |||
281 | if (sn > sl) | ||
282 | dmac = d; | ||
283 | } | ||
284 | |||
285 | return dmac; | ||
286 | } | ||
287 | |||
288 | /* Acquire the channel for peripheral 'id' */ | ||
289 | static struct s3c_pl330_chan *chan_acquire(const enum dma_ch id) | ||
290 | { | ||
291 | struct s3c_pl330_chan *ch = id_to_chan(id); | ||
292 | struct s3c_pl330_dmac *dmac; | ||
293 | |||
294 | /* If the channel doesn't exist or is already acquired */ | ||
295 | if (!ch || !chan_free(ch)) { | ||
296 | ch = NULL; | ||
297 | goto acq_exit; | ||
298 | } | ||
299 | |||
300 | dmac = map_chan_to_dmac(ch); | ||
301 | /* If couldn't map */ | ||
302 | if (!dmac) { | ||
303 | ch = NULL; | ||
304 | goto acq_exit; | ||
305 | } | ||
306 | |||
307 | dmac->busy_chan++; | ||
308 | ch->dmac = dmac; | ||
309 | |||
310 | acq_exit: | ||
311 | return ch; | ||
312 | } | ||
313 | |||
314 | /* Delete xfer from the queue */ | ||
315 | static inline void del_from_queue(struct s3c_pl330_xfer *xfer) | ||
316 | { | ||
317 | struct s3c_pl330_xfer *t; | ||
318 | struct s3c_pl330_chan *ch; | ||
319 | int found; | ||
320 | |||
321 | if (!xfer) | ||
322 | return; | ||
323 | |||
324 | ch = xfer->chan; | ||
325 | |||
326 | /* Make sure xfer is in the queue */ | ||
327 | found = 0; | ||
328 | list_for_each_entry(t, &ch->xfer_list, node) | ||
329 | if (t == xfer) { | ||
330 | found = 1; | ||
331 | break; | ||
332 | } | ||
333 | |||
334 | if (!found) | ||
335 | return; | ||
336 | |||
337 | /* If xfer is last entry in the queue */ | ||
338 | if (xfer->node.next == &ch->xfer_list) | ||
339 | t = list_entry(ch->xfer_list.next, | ||
340 | struct s3c_pl330_xfer, node); | ||
341 | else | ||
342 | t = list_entry(xfer->node.next, | ||
343 | struct s3c_pl330_xfer, node); | ||
344 | |||
345 | /* If there was only one node left */ | ||
346 | if (t == xfer) | ||
347 | ch->xfer_head = NULL; | ||
348 | else if (ch->xfer_head == xfer) | ||
349 | ch->xfer_head = t; | ||
350 | |||
351 | list_del(&xfer->node); | ||
352 | } | ||
353 | |||
354 | /* Provides pointer to the next xfer in the queue. | ||
355 | * If CIRCULAR option is set, the list is left intact, | ||
356 | * otherwise the xfer is removed from the list. | ||
357 | * Forced delete 'pluck' can be set to override the CIRCULAR option. | ||
358 | */ | ||
359 | static struct s3c_pl330_xfer *get_from_queue(struct s3c_pl330_chan *ch, | ||
360 | int pluck) | ||
361 | { | ||
362 | struct s3c_pl330_xfer *xfer = ch->xfer_head; | ||
363 | |||
364 | if (!xfer) | ||
365 | return NULL; | ||
366 | |||
367 | /* If xfer is last entry in the queue */ | ||
368 | if (xfer->node.next == &ch->xfer_list) | ||
369 | ch->xfer_head = list_entry(ch->xfer_list.next, | ||
370 | struct s3c_pl330_xfer, node); | ||
371 | else | ||
372 | ch->xfer_head = list_entry(xfer->node.next, | ||
373 | struct s3c_pl330_xfer, node); | ||
374 | |||
375 | if (pluck || !(ch->options & S3C2410_DMAF_CIRCULAR)) | ||
376 | del_from_queue(xfer); | ||
377 | |||
378 | return xfer; | ||
379 | } | ||
380 | |||
381 | static inline void add_to_queue(struct s3c_pl330_chan *ch, | ||
382 | struct s3c_pl330_xfer *xfer, int front) | ||
383 | { | ||
384 | struct pl330_xfer *xt; | ||
385 | |||
386 | /* If queue empty */ | ||
387 | if (ch->xfer_head == NULL) | ||
388 | ch->xfer_head = xfer; | ||
389 | |||
390 | xt = &ch->xfer_head->px; | ||
391 | /* If the head already submitted (CIRCULAR head) */ | ||
392 | if (ch->options & S3C2410_DMAF_CIRCULAR && | ||
393 | (xt == ch->req[0].x || xt == ch->req[1].x)) | ||
394 | ch->xfer_head = xfer; | ||
395 | |||
396 | /* If this is a resubmission, it should go at the head */ | ||
397 | if (front) { | ||
398 | ch->xfer_head = xfer; | ||
399 | list_add(&xfer->node, &ch->xfer_list); | ||
400 | } else { | ||
401 | list_add_tail(&xfer->node, &ch->xfer_list); | ||
402 | } | ||
403 | } | ||
404 | |||
405 | static inline void _finish_off(struct s3c_pl330_xfer *xfer, | ||
406 | enum s3c2410_dma_buffresult res, int ffree) | ||
407 | { | ||
408 | struct s3c_pl330_chan *ch; | ||
409 | |||
410 | if (!xfer) | ||
411 | return; | ||
412 | |||
413 | ch = xfer->chan; | ||
414 | |||
415 | /* Do callback */ | ||
416 | if (ch->callback_fn) | ||
417 | ch->callback_fn(NULL, xfer->token, xfer->px.bytes, res); | ||
418 | |||
419 | /* Force Free or if buffer is not needed anymore */ | ||
420 | if (ffree || !(ch->options & S3C2410_DMAF_CIRCULAR)) | ||
421 | kmem_cache_free(ch->dmac->kmcache, xfer); | ||
422 | } | ||
423 | |||
424 | static inline int s3c_pl330_submit(struct s3c_pl330_chan *ch, | ||
425 | struct pl330_req *r) | ||
426 | { | ||
427 | struct s3c_pl330_xfer *xfer; | ||
428 | int ret = 0; | ||
429 | |||
430 | /* If already submitted */ | ||
431 | if (r->x) | ||
432 | return 0; | ||
433 | |||
434 | xfer = get_from_queue(ch, 0); | ||
435 | if (xfer) { | ||
436 | r->x = &xfer->px; | ||
437 | |||
438 | /* Use max bandwidth for M<->M xfers */ | ||
439 | if (r->rqtype == MEMTOMEM) { | ||
440 | struct pl330_info *pi = xfer->chan->dmac->pi; | ||
441 | int burst = 1 << ch->rqcfg.brst_size; | ||
442 | u32 bytes = r->x->bytes; | ||
443 | int bl; | ||
444 | |||
445 | bl = pi->pcfg.data_bus_width / 8; | ||
446 | bl *= pi->pcfg.data_buf_dep; | ||
447 | bl /= burst; | ||
448 | |||
449 | /* src/dst_burst_len can't be more than 16 */ | ||
450 | if (bl > 16) | ||
451 | bl = 16; | ||
452 | |||
453 | while (bl > 1) { | ||
454 | if (!(bytes % (bl * burst))) | ||
455 | break; | ||
456 | bl--; | ||
457 | } | ||
458 | |||
459 | ch->rqcfg.brst_len = bl; | ||
460 | } else { | ||
461 | ch->rqcfg.brst_len = 1; | ||
462 | } | ||
463 | |||
464 | ret = pl330_submit_req(ch->pl330_chan_id, r); | ||
465 | |||
466 | /* If submission was successful */ | ||
467 | if (!ret) { | ||
468 | ch->lrq = r; /* latest submitted req */ | ||
469 | return 0; | ||
470 | } | ||
471 | |||
472 | r->x = NULL; | ||
473 | |||
474 | /* If both of the PL330 ping-pong buffers filled */ | ||
475 | if (ret == -EAGAIN) { | ||
476 | dev_err(ch->dmac->pi->dev, "%s:%d!\n", | ||
477 | __func__, __LINE__); | ||
478 | /* Queue back again */ | ||
479 | add_to_queue(ch, xfer, 1); | ||
480 | ret = 0; | ||
481 | } else { | ||
482 | dev_err(ch->dmac->pi->dev, "%s:%d!\n", | ||
483 | __func__, __LINE__); | ||
484 | _finish_off(xfer, S3C2410_RES_ERR, 0); | ||
485 | } | ||
486 | } | ||
487 | |||
488 | return ret; | ||
489 | } | ||
490 | |||
491 | static void s3c_pl330_rq(struct s3c_pl330_chan *ch, | ||
492 | struct pl330_req *r, enum pl330_op_err err) | ||
493 | { | ||
494 | unsigned long flags; | ||
495 | struct s3c_pl330_xfer *xfer; | ||
496 | struct pl330_xfer *xl = r->x; | ||
497 | enum s3c2410_dma_buffresult res; | ||
498 | |||
499 | spin_lock_irqsave(&res_lock, flags); | ||
500 | |||
501 | r->x = NULL; | ||
502 | |||
503 | s3c_pl330_submit(ch, r); | ||
504 | |||
505 | spin_unlock_irqrestore(&res_lock, flags); | ||
506 | |||
507 | /* Map result to S3C DMA API */ | ||
508 | if (err == PL330_ERR_NONE) | ||
509 | res = S3C2410_RES_OK; | ||
510 | else if (err == PL330_ERR_ABORT) | ||
511 | res = S3C2410_RES_ABORT; | ||
512 | else | ||
513 | res = S3C2410_RES_ERR; | ||
514 | |||
515 | /* If last request had some xfer */ | ||
516 | if (xl) { | ||
517 | xfer = container_of(xl, struct s3c_pl330_xfer, px); | ||
518 | _finish_off(xfer, res, 0); | ||
519 | } else { | ||
520 | dev_info(ch->dmac->pi->dev, "%s:%d No Xfer?!\n", | ||
521 | __func__, __LINE__); | ||
522 | } | ||
523 | } | ||
524 | |||
525 | static void s3c_pl330_rq0(void *token, enum pl330_op_err err) | ||
526 | { | ||
527 | struct pl330_req *r = token; | ||
528 | struct s3c_pl330_chan *ch = container_of(r, | ||
529 | struct s3c_pl330_chan, req[0]); | ||
530 | s3c_pl330_rq(ch, r, err); | ||
531 | } | ||
532 | |||
533 | static void s3c_pl330_rq1(void *token, enum pl330_op_err err) | ||
534 | { | ||
535 | struct pl330_req *r = token; | ||
536 | struct s3c_pl330_chan *ch = container_of(r, | ||
537 | struct s3c_pl330_chan, req[1]); | ||
538 | s3c_pl330_rq(ch, r, err); | ||
539 | } | ||
540 | |||
541 | /* Release an acquired channel */ | ||
542 | static void chan_release(struct s3c_pl330_chan *ch) | ||
543 | { | ||
544 | struct s3c_pl330_dmac *dmac; | ||
545 | |||
546 | if (chan_free(ch)) | ||
547 | return; | ||
548 | |||
549 | dmac = ch->dmac; | ||
550 | ch->dmac = NULL; | ||
551 | dmac->busy_chan--; | ||
552 | } | ||
553 | |||
554 | int s3c2410_dma_ctrl(enum dma_ch id, enum s3c2410_chan_op op) | ||
555 | { | ||
556 | struct s3c_pl330_xfer *xfer; | ||
557 | enum pl330_chan_op pl330op; | ||
558 | struct s3c_pl330_chan *ch; | ||
559 | unsigned long flags; | ||
560 | int idx, ret; | ||
561 | |||
562 | spin_lock_irqsave(&res_lock, flags); | ||
563 | |||
564 | ch = id_to_chan(id); | ||
565 | |||
566 | if (!ch || chan_free(ch)) { | ||
567 | ret = -EINVAL; | ||
568 | goto ctrl_exit; | ||
569 | } | ||
570 | |||
571 | switch (op) { | ||
572 | case S3C2410_DMAOP_START: | ||
573 | /* Make sure both reqs are enqueued */ | ||
574 | idx = (ch->lrq == &ch->req[0]) ? 1 : 0; | ||
575 | s3c_pl330_submit(ch, &ch->req[idx]); | ||
576 | s3c_pl330_submit(ch, &ch->req[1 - idx]); | ||
577 | pl330op = PL330_OP_START; | ||
578 | break; | ||
579 | |||
580 | case S3C2410_DMAOP_STOP: | ||
581 | pl330op = PL330_OP_ABORT; | ||
582 | break; | ||
583 | |||
584 | case S3C2410_DMAOP_FLUSH: | ||
585 | pl330op = PL330_OP_FLUSH; | ||
586 | break; | ||
587 | |||
588 | case S3C2410_DMAOP_PAUSE: | ||
589 | case S3C2410_DMAOP_RESUME: | ||
590 | case S3C2410_DMAOP_TIMEOUT: | ||
591 | case S3C2410_DMAOP_STARTED: | ||
592 | spin_unlock_irqrestore(&res_lock, flags); | ||
593 | return 0; | ||
594 | |||
595 | default: | ||
596 | spin_unlock_irqrestore(&res_lock, flags); | ||
597 | return -EINVAL; | ||
598 | } | ||
599 | |||
600 | ret = pl330_chan_ctrl(ch->pl330_chan_id, pl330op); | ||
601 | |||
602 | if (pl330op == PL330_OP_START) { | ||
603 | spin_unlock_irqrestore(&res_lock, flags); | ||
604 | return ret; | ||
605 | } | ||
606 | |||
607 | idx = (ch->lrq == &ch->req[0]) ? 1 : 0; | ||
608 | |||
609 | /* Abort the current xfer */ | ||
610 | if (ch->req[idx].x) { | ||
611 | xfer = container_of(ch->req[idx].x, | ||
612 | struct s3c_pl330_xfer, px); | ||
613 | |||
614 | /* Drop xfer during FLUSH */ | ||
615 | if (pl330op == PL330_OP_FLUSH) | ||
616 | del_from_queue(xfer); | ||
617 | |||
618 | ch->req[idx].x = NULL; | ||
619 | |||
620 | spin_unlock_irqrestore(&res_lock, flags); | ||
621 | _finish_off(xfer, S3C2410_RES_ABORT, | ||
622 | pl330op == PL330_OP_FLUSH ? 1 : 0); | ||
623 | spin_lock_irqsave(&res_lock, flags); | ||
624 | } | ||
625 | |||
626 | /* Flush the whole queue */ | ||
627 | if (pl330op == PL330_OP_FLUSH) { | ||
628 | |||
629 | if (ch->req[1 - idx].x) { | ||
630 | xfer = container_of(ch->req[1 - idx].x, | ||
631 | struct s3c_pl330_xfer, px); | ||
632 | |||
633 | del_from_queue(xfer); | ||
634 | |||
635 | ch->req[1 - idx].x = NULL; | ||
636 | |||
637 | spin_unlock_irqrestore(&res_lock, flags); | ||
638 | _finish_off(xfer, S3C2410_RES_ABORT, 1); | ||
639 | spin_lock_irqsave(&res_lock, flags); | ||
640 | } | ||
641 | |||
642 | /* Finish off the remaining in the queue */ | ||
643 | xfer = ch->xfer_head; | ||
644 | while (xfer) { | ||
645 | |||
646 | del_from_queue(xfer); | ||
647 | |||
648 | spin_unlock_irqrestore(&res_lock, flags); | ||
649 | _finish_off(xfer, S3C2410_RES_ABORT, 1); | ||
650 | spin_lock_irqsave(&res_lock, flags); | ||
651 | |||
652 | xfer = ch->xfer_head; | ||
653 | } | ||
654 | } | ||
655 | |||
656 | ctrl_exit: | ||
657 | spin_unlock_irqrestore(&res_lock, flags); | ||
658 | |||
659 | return ret; | ||
660 | } | ||
661 | EXPORT_SYMBOL(s3c2410_dma_ctrl); | ||
662 | |||
663 | int s3c2410_dma_enqueue(enum dma_ch id, void *token, | ||
664 | dma_addr_t addr, int size) | ||
665 | { | ||
666 | struct s3c_pl330_chan *ch; | ||
667 | struct s3c_pl330_xfer *xfer; | ||
668 | unsigned long flags; | ||
669 | int idx, ret = 0; | ||
670 | |||
671 | spin_lock_irqsave(&res_lock, flags); | ||
672 | |||
673 | ch = id_to_chan(id); | ||
674 | |||
675 | /* Error if invalid or free channel */ | ||
676 | if (!ch || chan_free(ch)) { | ||
677 | ret = -EINVAL; | ||
678 | goto enq_exit; | ||
679 | } | ||
680 | |||
681 | /* Error if size is unaligned */ | ||
682 | if (ch->rqcfg.brst_size && size % (1 << ch->rqcfg.brst_size)) { | ||
683 | ret = -EINVAL; | ||
684 | goto enq_exit; | ||
685 | } | ||
686 | |||
687 | xfer = kmem_cache_alloc(ch->dmac->kmcache, GFP_ATOMIC); | ||
688 | if (!xfer) { | ||
689 | ret = -ENOMEM; | ||
690 | goto enq_exit; | ||
691 | } | ||
692 | |||
693 | xfer->token = token; | ||
694 | xfer->chan = ch; | ||
695 | xfer->px.bytes = size; | ||
696 | xfer->px.next = NULL; /* Single request */ | ||
697 | |||
698 | /* For S3C DMA API, direction is always fixed for all xfers */ | ||
699 | if (ch->req[0].rqtype == MEMTODEV) { | ||
700 | xfer->px.src_addr = addr; | ||
701 | xfer->px.dst_addr = ch->sdaddr; | ||
702 | } else { | ||
703 | xfer->px.src_addr = ch->sdaddr; | ||
704 | xfer->px.dst_addr = addr; | ||
705 | } | ||
706 | |||
707 | add_to_queue(ch, xfer, 0); | ||
708 | |||
709 | /* Try submitting on either request */ | ||
710 | idx = (ch->lrq == &ch->req[0]) ? 1 : 0; | ||
711 | |||
712 | if (!ch->req[idx].x) | ||
713 | s3c_pl330_submit(ch, &ch->req[idx]); | ||
714 | else | ||
715 | s3c_pl330_submit(ch, &ch->req[1 - idx]); | ||
716 | |||
717 | spin_unlock_irqrestore(&res_lock, flags); | ||
718 | |||
719 | if (ch->options & S3C2410_DMAF_AUTOSTART) | ||
720 | s3c2410_dma_ctrl(id, S3C2410_DMAOP_START); | ||
721 | |||
722 | return 0; | ||
723 | |||
724 | enq_exit: | ||
725 | spin_unlock_irqrestore(&res_lock, flags); | ||
726 | |||
727 | return ret; | ||
728 | } | ||
729 | EXPORT_SYMBOL(s3c2410_dma_enqueue); | ||
730 | |||
731 | int s3c2410_dma_request(enum dma_ch id, | ||
732 | struct s3c2410_dma_client *client, | ||
733 | void *dev) | ||
734 | { | ||
735 | struct s3c_pl330_dmac *dmac; | ||
736 | struct s3c_pl330_chan *ch; | ||
737 | unsigned long flags; | ||
738 | int ret = 0; | ||
739 | |||
740 | spin_lock_irqsave(&res_lock, flags); | ||
741 | |||
742 | ch = chan_acquire(id); | ||
743 | if (!ch) { | ||
744 | ret = -EBUSY; | ||
745 | goto req_exit; | ||
746 | } | ||
747 | |||
748 | dmac = ch->dmac; | ||
749 | |||
750 | ch->pl330_chan_id = pl330_request_channel(dmac->pi); | ||
751 | if (!ch->pl330_chan_id) { | ||
752 | chan_release(ch); | ||
753 | ret = -EBUSY; | ||
754 | goto req_exit; | ||
755 | } | ||
756 | |||
757 | ch->client = client; | ||
758 | ch->options = 0; /* Clear any option */ | ||
759 | ch->callback_fn = NULL; /* Clear any callback */ | ||
760 | ch->lrq = NULL; | ||
761 | |||
762 | ch->rqcfg.brst_size = 2; /* Default word size */ | ||
763 | ch->rqcfg.swap = SWAP_NO; | ||
764 | ch->rqcfg.scctl = SCCTRL0; /* Noncacheable and nonbufferable */ | ||
765 | ch->rqcfg.dcctl = DCCTRL0; /* Noncacheable and nonbufferable */ | ||
766 | ch->rqcfg.privileged = 0; | ||
767 | ch->rqcfg.insnaccess = 0; | ||
768 | |||
769 | /* Set invalid direction */ | ||
770 | ch->req[0].rqtype = DEVTODEV; | ||
771 | ch->req[1].rqtype = ch->req[0].rqtype; | ||
772 | |||
773 | ch->req[0].cfg = &ch->rqcfg; | ||
774 | ch->req[1].cfg = ch->req[0].cfg; | ||
775 | |||
776 | ch->req[0].peri = iface_of_dmac(dmac, id) - 1; /* Original index */ | ||
777 | ch->req[1].peri = ch->req[0].peri; | ||
778 | |||
779 | ch->req[0].token = &ch->req[0]; | ||
780 | ch->req[0].xfer_cb = s3c_pl330_rq0; | ||
781 | ch->req[1].token = &ch->req[1]; | ||
782 | ch->req[1].xfer_cb = s3c_pl330_rq1; | ||
783 | |||
784 | ch->req[0].x = NULL; | ||
785 | ch->req[1].x = NULL; | ||
786 | |||
787 | /* Reset xfer list */ | ||
788 | INIT_LIST_HEAD(&ch->xfer_list); | ||
789 | ch->xfer_head = NULL; | ||
790 | |||
791 | req_exit: | ||
792 | spin_unlock_irqrestore(&res_lock, flags); | ||
793 | |||
794 | return ret; | ||
795 | } | ||
796 | EXPORT_SYMBOL(s3c2410_dma_request); | ||
797 | |||
798 | int s3c2410_dma_free(enum dma_ch id, struct s3c2410_dma_client *client) | ||
799 | { | ||
800 | struct s3c_pl330_chan *ch; | ||
801 | struct s3c_pl330_xfer *xfer; | ||
802 | unsigned long flags; | ||
803 | int ret = 0; | ||
804 | unsigned idx; | ||
805 | |||
806 | spin_lock_irqsave(&res_lock, flags); | ||
807 | |||
808 | ch = id_to_chan(id); | ||
809 | |||
810 | if (!ch || chan_free(ch)) | ||
811 | goto free_exit; | ||
812 | |||
813 | /* Refuse if someone else wanted to free the channel */ | ||
814 | if (ch->client != client) { | ||
815 | ret = -EBUSY; | ||
816 | goto free_exit; | ||
817 | } | ||
818 | |||
819 | /* Stop any active xfer, Flushe the queue and do callbacks */ | ||
820 | pl330_chan_ctrl(ch->pl330_chan_id, PL330_OP_FLUSH); | ||
821 | |||
822 | /* Abort the submitted requests */ | ||
823 | idx = (ch->lrq == &ch->req[0]) ? 1 : 0; | ||
824 | |||
825 | if (ch->req[idx].x) { | ||
826 | xfer = container_of(ch->req[idx].x, | ||
827 | struct s3c_pl330_xfer, px); | ||
828 | |||
829 | ch->req[idx].x = NULL; | ||
830 | del_from_queue(xfer); | ||
831 | |||
832 | spin_unlock_irqrestore(&res_lock, flags); | ||
833 | _finish_off(xfer, S3C2410_RES_ABORT, 1); | ||
834 | spin_lock_irqsave(&res_lock, flags); | ||
835 | } | ||
836 | |||
837 | if (ch->req[1 - idx].x) { | ||
838 | xfer = container_of(ch->req[1 - idx].x, | ||
839 | struct s3c_pl330_xfer, px); | ||
840 | |||
841 | ch->req[1 - idx].x = NULL; | ||
842 | del_from_queue(xfer); | ||
843 | |||
844 | spin_unlock_irqrestore(&res_lock, flags); | ||
845 | _finish_off(xfer, S3C2410_RES_ABORT, 1); | ||
846 | spin_lock_irqsave(&res_lock, flags); | ||
847 | } | ||
848 | |||
849 | /* Pluck and Abort the queued requests in order */ | ||
850 | do { | ||
851 | xfer = get_from_queue(ch, 1); | ||
852 | |||
853 | spin_unlock_irqrestore(&res_lock, flags); | ||
854 | _finish_off(xfer, S3C2410_RES_ABORT, 1); | ||
855 | spin_lock_irqsave(&res_lock, flags); | ||
856 | } while (xfer); | ||
857 | |||
858 | ch->client = NULL; | ||
859 | |||
860 | pl330_release_channel(ch->pl330_chan_id); | ||
861 | |||
862 | ch->pl330_chan_id = NULL; | ||
863 | |||
864 | chan_release(ch); | ||
865 | |||
866 | free_exit: | ||
867 | spin_unlock_irqrestore(&res_lock, flags); | ||
868 | |||
869 | return ret; | ||
870 | } | ||
871 | EXPORT_SYMBOL(s3c2410_dma_free); | ||
872 | |||
873 | int s3c2410_dma_config(enum dma_ch id, int xferunit) | ||
874 | { | ||
875 | struct s3c_pl330_chan *ch; | ||
876 | struct pl330_info *pi; | ||
877 | unsigned long flags; | ||
878 | int i, dbwidth, ret = 0; | ||
879 | |||
880 | spin_lock_irqsave(&res_lock, flags); | ||
881 | |||
882 | ch = id_to_chan(id); | ||
883 | |||
884 | if (!ch || chan_free(ch)) { | ||
885 | ret = -EINVAL; | ||
886 | goto cfg_exit; | ||
887 | } | ||
888 | |||
889 | pi = ch->dmac->pi; | ||
890 | dbwidth = pi->pcfg.data_bus_width / 8; | ||
891 | |||
892 | /* Max size of xfer can be pcfg.data_bus_width */ | ||
893 | if (xferunit > dbwidth) { | ||
894 | ret = -EINVAL; | ||
895 | goto cfg_exit; | ||
896 | } | ||
897 | |||
898 | i = 0; | ||
899 | while (xferunit != (1 << i)) | ||
900 | i++; | ||
901 | |||
902 | /* If valid value */ | ||
903 | if (xferunit == (1 << i)) | ||
904 | ch->rqcfg.brst_size = i; | ||
905 | else | ||
906 | ret = -EINVAL; | ||
907 | |||
908 | cfg_exit: | ||
909 | spin_unlock_irqrestore(&res_lock, flags); | ||
910 | |||
911 | return ret; | ||
912 | } | ||
913 | EXPORT_SYMBOL(s3c2410_dma_config); | ||
914 | |||
915 | /* Options that are supported by this driver */ | ||
916 | #define S3C_PL330_FLAGS (S3C2410_DMAF_CIRCULAR | S3C2410_DMAF_AUTOSTART) | ||
917 | |||
918 | int s3c2410_dma_setflags(enum dma_ch id, unsigned int options) | ||
919 | { | ||
920 | struct s3c_pl330_chan *ch; | ||
921 | unsigned long flags; | ||
922 | int ret = 0; | ||
923 | |||
924 | spin_lock_irqsave(&res_lock, flags); | ||
925 | |||
926 | ch = id_to_chan(id); | ||
927 | |||
928 | if (!ch || chan_free(ch) || options & ~(S3C_PL330_FLAGS)) | ||
929 | ret = -EINVAL; | ||
930 | else | ||
931 | ch->options = options; | ||
932 | |||
933 | spin_unlock_irqrestore(&res_lock, flags); | ||
934 | |||
935 | return 0; | ||
936 | } | ||
937 | EXPORT_SYMBOL(s3c2410_dma_setflags); | ||
938 | |||
939 | int s3c2410_dma_set_buffdone_fn(enum dma_ch id, s3c2410_dma_cbfn_t rtn) | ||
940 | { | ||
941 | struct s3c_pl330_chan *ch; | ||
942 | unsigned long flags; | ||
943 | int ret = 0; | ||
944 | |||
945 | spin_lock_irqsave(&res_lock, flags); | ||
946 | |||
947 | ch = id_to_chan(id); | ||
948 | |||
949 | if (!ch || chan_free(ch)) | ||
950 | ret = -EINVAL; | ||
951 | else | ||
952 | ch->callback_fn = rtn; | ||
953 | |||
954 | spin_unlock_irqrestore(&res_lock, flags); | ||
955 | |||
956 | return ret; | ||
957 | } | ||
958 | EXPORT_SYMBOL(s3c2410_dma_set_buffdone_fn); | ||
959 | |||
960 | int s3c2410_dma_devconfig(enum dma_ch id, enum s3c2410_dmasrc source, | ||
961 | unsigned long address) | ||
962 | { | ||
963 | struct s3c_pl330_chan *ch; | ||
964 | unsigned long flags; | ||
965 | int ret = 0; | ||
966 | |||
967 | spin_lock_irqsave(&res_lock, flags); | ||
968 | |||
969 | ch = id_to_chan(id); | ||
970 | |||
971 | if (!ch || chan_free(ch)) { | ||
972 | ret = -EINVAL; | ||
973 | goto devcfg_exit; | ||
974 | } | ||
975 | |||
976 | switch (source) { | ||
977 | case S3C2410_DMASRC_HW: /* P->M */ | ||
978 | ch->req[0].rqtype = DEVTOMEM; | ||
979 | ch->req[1].rqtype = DEVTOMEM; | ||
980 | ch->rqcfg.src_inc = 0; | ||
981 | ch->rqcfg.dst_inc = 1; | ||
982 | break; | ||
983 | case S3C2410_DMASRC_MEM: /* M->P */ | ||
984 | ch->req[0].rqtype = MEMTODEV; | ||
985 | ch->req[1].rqtype = MEMTODEV; | ||
986 | ch->rqcfg.src_inc = 1; | ||
987 | ch->rqcfg.dst_inc = 0; | ||
988 | break; | ||
989 | default: | ||
990 | ret = -EINVAL; | ||
991 | goto devcfg_exit; | ||
992 | } | ||
993 | |||
994 | ch->sdaddr = address; | ||
995 | |||
996 | devcfg_exit: | ||
997 | spin_unlock_irqrestore(&res_lock, flags); | ||
998 | |||
999 | return ret; | ||
1000 | } | ||
1001 | EXPORT_SYMBOL(s3c2410_dma_devconfig); | ||
1002 | |||
1003 | int s3c2410_dma_getposition(enum dma_ch id, dma_addr_t *src, dma_addr_t *dst) | ||
1004 | { | ||
1005 | struct s3c_pl330_chan *ch = id_to_chan(id); | ||
1006 | struct pl330_chanstatus status; | ||
1007 | int ret; | ||
1008 | |||
1009 | if (!ch || chan_free(ch)) | ||
1010 | return -EINVAL; | ||
1011 | |||
1012 | ret = pl330_chan_status(ch->pl330_chan_id, &status); | ||
1013 | if (ret < 0) | ||
1014 | return ret; | ||
1015 | |||
1016 | *src = status.src_addr; | ||
1017 | *dst = status.dst_addr; | ||
1018 | |||
1019 | return 0; | ||
1020 | } | ||
1021 | EXPORT_SYMBOL(s3c2410_dma_getposition); | ||
1022 | |||
1023 | static irqreturn_t pl330_irq_handler(int irq, void *data) | ||
1024 | { | ||
1025 | if (pl330_update(data)) | ||
1026 | return IRQ_HANDLED; | ||
1027 | else | ||
1028 | return IRQ_NONE; | ||
1029 | } | ||
1030 | |||
1031 | static int pl330_probe(struct platform_device *pdev) | ||
1032 | { | ||
1033 | struct s3c_pl330_dmac *s3c_pl330_dmac; | ||
1034 | struct s3c_pl330_platdata *pl330pd; | ||
1035 | struct pl330_info *pl330_info; | ||
1036 | struct resource *res; | ||
1037 | int i, ret, irq; | ||
1038 | |||
1039 | pl330pd = pdev->dev.platform_data; | ||
1040 | |||
1041 | /* Can't do without the list of _32_ peripherals */ | ||
1042 | if (!pl330pd || !pl330pd->peri) { | ||
1043 | dev_err(&pdev->dev, "platform data missing!\n"); | ||
1044 | return -ENODEV; | ||
1045 | } | ||
1046 | |||
1047 | pl330_info = kzalloc(sizeof(*pl330_info), GFP_KERNEL); | ||
1048 | if (!pl330_info) | ||
1049 | return -ENOMEM; | ||
1050 | |||
1051 | pl330_info->pl330_data = NULL; | ||
1052 | pl330_info->dev = &pdev->dev; | ||
1053 | |||
1054 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1055 | if (!res) { | ||
1056 | ret = -ENODEV; | ||
1057 | goto probe_err1; | ||
1058 | } | ||
1059 | |||
1060 | request_mem_region(res->start, resource_size(res), pdev->name); | ||
1061 | |||
1062 | pl330_info->base = ioremap(res->start, resource_size(res)); | ||
1063 | if (!pl330_info->base) { | ||
1064 | ret = -ENXIO; | ||
1065 | goto probe_err2; | ||
1066 | } | ||
1067 | |||
1068 | irq = platform_get_irq(pdev, 0); | ||
1069 | if (irq < 0) { | ||
1070 | ret = irq; | ||
1071 | goto probe_err3; | ||
1072 | } | ||
1073 | |||
1074 | ret = request_irq(irq, pl330_irq_handler, 0, | ||
1075 | dev_name(&pdev->dev), pl330_info); | ||
1076 | if (ret) | ||
1077 | goto probe_err4; | ||
1078 | |||
1079 | /* Allocate a new DMAC */ | ||
1080 | s3c_pl330_dmac = kmalloc(sizeof(*s3c_pl330_dmac), GFP_KERNEL); | ||
1081 | if (!s3c_pl330_dmac) { | ||
1082 | ret = -ENOMEM; | ||
1083 | goto probe_err5; | ||
1084 | } | ||
1085 | |||
1086 | /* Get operation clock and enable it */ | ||
1087 | s3c_pl330_dmac->clk = clk_get(&pdev->dev, "pdma"); | ||
1088 | if (IS_ERR(s3c_pl330_dmac->clk)) { | ||
1089 | dev_err(&pdev->dev, "Cannot get operation clock.\n"); | ||
1090 | ret = -EINVAL; | ||
1091 | goto probe_err6; | ||
1092 | } | ||
1093 | clk_enable(s3c_pl330_dmac->clk); | ||
1094 | |||
1095 | ret = pl330_add(pl330_info); | ||
1096 | if (ret) | ||
1097 | goto probe_err7; | ||
1098 | |||
1099 | /* Hook the info */ | ||
1100 | s3c_pl330_dmac->pi = pl330_info; | ||
1101 | |||
1102 | /* No busy channels */ | ||
1103 | s3c_pl330_dmac->busy_chan = 0; | ||
1104 | |||
1105 | s3c_pl330_dmac->kmcache = kmem_cache_create(dev_name(&pdev->dev), | ||
1106 | sizeof(struct s3c_pl330_xfer), 0, 0, NULL); | ||
1107 | |||
1108 | if (!s3c_pl330_dmac->kmcache) { | ||
1109 | ret = -ENOMEM; | ||
1110 | goto probe_err8; | ||
1111 | } | ||
1112 | |||
1113 | /* Get the list of peripherals */ | ||
1114 | s3c_pl330_dmac->peri = pl330pd->peri; | ||
1115 | |||
1116 | /* Attach to the list of DMACs */ | ||
1117 | list_add_tail(&s3c_pl330_dmac->node, &dmac_list); | ||
1118 | |||
1119 | /* Create a channel for each peripheral in the DMAC | ||
1120 | * that is, if it doesn't already exist | ||
1121 | */ | ||
1122 | for (i = 0; i < PL330_MAX_PERI; i++) | ||
1123 | if (s3c_pl330_dmac->peri[i] != DMACH_MAX) | ||
1124 | chan_add(s3c_pl330_dmac->peri[i]); | ||
1125 | |||
1126 | printk(KERN_INFO | ||
1127 | "Loaded driver for PL330 DMAC-%d %s\n", pdev->id, pdev->name); | ||
1128 | printk(KERN_INFO | ||
1129 | "\tDBUFF-%ux%ubytes Num_Chans-%u Num_Peri-%u Num_Events-%u\n", | ||
1130 | pl330_info->pcfg.data_buf_dep, | ||
1131 | pl330_info->pcfg.data_bus_width / 8, pl330_info->pcfg.num_chan, | ||
1132 | pl330_info->pcfg.num_peri, pl330_info->pcfg.num_events); | ||
1133 | |||
1134 | return 0; | ||
1135 | |||
1136 | probe_err8: | ||
1137 | pl330_del(pl330_info); | ||
1138 | probe_err7: | ||
1139 | clk_disable(s3c_pl330_dmac->clk); | ||
1140 | clk_put(s3c_pl330_dmac->clk); | ||
1141 | probe_err6: | ||
1142 | kfree(s3c_pl330_dmac); | ||
1143 | probe_err5: | ||
1144 | free_irq(irq, pl330_info); | ||
1145 | probe_err4: | ||
1146 | probe_err3: | ||
1147 | iounmap(pl330_info->base); | ||
1148 | probe_err2: | ||
1149 | release_mem_region(res->start, resource_size(res)); | ||
1150 | probe_err1: | ||
1151 | kfree(pl330_info); | ||
1152 | |||
1153 | return ret; | ||
1154 | } | ||
1155 | |||
1156 | static int pl330_remove(struct platform_device *pdev) | ||
1157 | { | ||
1158 | struct s3c_pl330_dmac *dmac, *d; | ||
1159 | struct s3c_pl330_chan *ch; | ||
1160 | unsigned long flags; | ||
1161 | int del, found; | ||
1162 | |||
1163 | if (!pdev->dev.platform_data) | ||
1164 | return -EINVAL; | ||
1165 | |||
1166 | spin_lock_irqsave(&res_lock, flags); | ||
1167 | |||
1168 | found = 0; | ||
1169 | list_for_each_entry(d, &dmac_list, node) | ||
1170 | if (d->pi->dev == &pdev->dev) { | ||
1171 | found = 1; | ||
1172 | break; | ||
1173 | } | ||
1174 | |||
1175 | if (!found) { | ||
1176 | spin_unlock_irqrestore(&res_lock, flags); | ||
1177 | return 0; | ||
1178 | } | ||
1179 | |||
1180 | dmac = d; | ||
1181 | |||
1182 | /* Remove all Channels that are managed only by this DMAC */ | ||
1183 | list_for_each_entry(ch, &chan_list, node) { | ||
1184 | |||
1185 | /* Only channels that are handled by this DMAC */ | ||
1186 | if (iface_of_dmac(dmac, ch->id)) | ||
1187 | del = 1; | ||
1188 | else | ||
1189 | continue; | ||
1190 | |||
1191 | /* Don't remove if some other DMAC has it too */ | ||
1192 | list_for_each_entry(d, &dmac_list, node) | ||
1193 | if (d != dmac && iface_of_dmac(d, ch->id)) { | ||
1194 | del = 0; | ||
1195 | break; | ||
1196 | } | ||
1197 | |||
1198 | if (del) { | ||
1199 | spin_unlock_irqrestore(&res_lock, flags); | ||
1200 | s3c2410_dma_free(ch->id, ch->client); | ||
1201 | spin_lock_irqsave(&res_lock, flags); | ||
1202 | list_del(&ch->node); | ||
1203 | kfree(ch); | ||
1204 | } | ||
1205 | } | ||
1206 | |||
1207 | /* Disable operation clock */ | ||
1208 | clk_disable(dmac->clk); | ||
1209 | clk_put(dmac->clk); | ||
1210 | |||
1211 | /* Remove the DMAC */ | ||
1212 | list_del(&dmac->node); | ||
1213 | kfree(dmac); | ||
1214 | |||
1215 | spin_unlock_irqrestore(&res_lock, flags); | ||
1216 | |||
1217 | return 0; | ||
1218 | } | ||
1219 | |||
1220 | static struct platform_driver pl330_driver = { | ||
1221 | .driver = { | ||
1222 | .owner = THIS_MODULE, | ||
1223 | .name = "s3c-pl330", | ||
1224 | }, | ||
1225 | .probe = pl330_probe, | ||
1226 | .remove = pl330_remove, | ||
1227 | }; | ||
1228 | |||
1229 | static int __init pl330_init(void) | ||
1230 | { | ||
1231 | return platform_driver_register(&pl330_driver); | ||
1232 | } | ||
1233 | module_init(pl330_init); | ||
1234 | |||
1235 | static void __exit pl330_exit(void) | ||
1236 | { | ||
1237 | platform_driver_unregister(&pl330_driver); | ||
1238 | return; | ||
1239 | } | ||
1240 | module_exit(pl330_exit); | ||
1241 | |||
1242 | MODULE_AUTHOR("Jaswinder Singh <jassi.brar@samsung.com>"); | ||
1243 | MODULE_DESCRIPTION("Driver for PL330 DMA Controller"); | ||
1244 | MODULE_LICENSE("GPL"); | ||
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index 0cbd5a0a933..8f3ccddbdaf 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c | |||
@@ -8,7 +8,6 @@ | |||
8 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
10 | */ | 10 | */ |
11 | #include <linux/module.h> | ||
12 | #include <linux/types.h> | 11 | #include <linux/types.h> |
13 | #include <linux/cpu.h> | 12 | #include <linux/cpu.h> |
14 | #include <linux/cpu_pm.h> | 13 | #include <linux/cpu_pm.h> |