diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-omap2/clock.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock3xxx_data.c | 22 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clockdomain.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clockdomains3xxx_data.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm-regbits-34xx.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cminst44xx.c | 28 | ||||
-rw-r--r-- | arch/arm/mach-omap2/common.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/common.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/powerdomain.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-omap2/powerdomain.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prcm-common.h | 17 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prcm.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prminst44xx.c | 27 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/clkdev_omap.h | 4 |
14 files changed, 76 insertions, 62 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index f57ed5baecc..77db0671d7f 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
@@ -439,7 +439,7 @@ void omap2_clk_disable_unused(struct clk *clk) | |||
439 | clk->ops->disable(clk); | 439 | clk->ops->disable(clk); |
440 | } | 440 | } |
441 | if (clk->clkdm != NULL) | 441 | if (clk->clkdm != NULL) |
442 | pwrdm_clkdm_state_switch(clk->clkdm); | 442 | pwrdm_state_switch(clk->clkdm->pwrdm.ptr); |
443 | } | 443 | } |
444 | #endif | 444 | #endif |
445 | 445 | ||
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 8fe7d709afa..4e1a3b0e8cc 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
@@ -3295,8 +3295,8 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3295 | CLK(NULL, "gfx_l3_ick", &gfx_l3_ick, CK_3430ES1), | 3295 | CLK(NULL, "gfx_l3_ick", &gfx_l3_ick, CK_3430ES1), |
3296 | CLK(NULL, "gfx_cg1_ck", &gfx_cg1_ck, CK_3430ES1), | 3296 | CLK(NULL, "gfx_cg1_ck", &gfx_cg1_ck, CK_3430ES1), |
3297 | CLK(NULL, "gfx_cg2_ck", &gfx_cg2_ck, CK_3430ES1), | 3297 | CLK(NULL, "gfx_cg2_ck", &gfx_cg2_ck, CK_3430ES1), |
3298 | CLK(NULL, "sgx_fck", &sgx_fck, CK_3430ES2PLUS | CK_3517 | CK_36XX), | 3298 | CLK(NULL, "sgx_fck", &sgx_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3299 | CLK(NULL, "sgx_ick", &sgx_ick, CK_3430ES2PLUS | CK_3517 | CK_36XX), | 3299 | CLK(NULL, "sgx_ick", &sgx_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3300 | CLK(NULL, "d2d_26m_fck", &d2d_26m_fck, CK_3430ES1), | 3300 | CLK(NULL, "d2d_26m_fck", &d2d_26m_fck, CK_3430ES1), |
3301 | CLK(NULL, "modem_fck", &modem_fck, CK_34XX | CK_36XX), | 3301 | CLK(NULL, "modem_fck", &modem_fck, CK_34XX | CK_36XX), |
3302 | CLK(NULL, "sad2d_ick", &sad2d_ick, CK_34XX | CK_36XX), | 3302 | CLK(NULL, "sad2d_ick", &sad2d_ick, CK_34XX | CK_36XX), |
@@ -3420,7 +3420,7 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3420 | CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX), | 3420 | CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX), |
3421 | CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX), | 3421 | CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX), |
3422 | CLK(NULL, "uart4_fck", &uart4_fck, CK_36XX), | 3422 | CLK(NULL, "uart4_fck", &uart4_fck, CK_36XX), |
3423 | CLK(NULL, "uart4_fck", &uart4_fck_am35xx, CK_3505 | CK_3517), | 3423 | CLK(NULL, "uart4_fck", &uart4_fck_am35xx, CK_AM35XX), |
3424 | CLK(NULL, "gpt2_fck", &gpt2_fck, CK_3XXX), | 3424 | CLK(NULL, "gpt2_fck", &gpt2_fck, CK_3XXX), |
3425 | CLK(NULL, "gpt3_fck", &gpt3_fck, CK_3XXX), | 3425 | CLK(NULL, "gpt3_fck", &gpt3_fck, CK_3XXX), |
3426 | CLK(NULL, "gpt4_fck", &gpt4_fck, CK_3XXX), | 3426 | CLK(NULL, "gpt4_fck", &gpt4_fck, CK_3XXX), |
@@ -3514,21 +3514,9 @@ int __init omap3xxx_clk_init(void) | |||
3514 | struct omap_clk *c; | 3514 | struct omap_clk *c; |
3515 | u32 cpu_clkflg = 0; | 3515 | u32 cpu_clkflg = 0; |
3516 | 3516 | ||
3517 | /* | 3517 | if (cpu_is_omap3517()) { |
3518 | * 3505 must be tested before 3517, since 3517 returns true | ||
3519 | * for both AM3517 chips and AM3517 family chips, which | ||
3520 | * includes 3505. Unfortunately there's no obvious family | ||
3521 | * test for 3517/3505 :-( | ||
3522 | */ | ||
3523 | if (cpu_is_omap3505()) { | ||
3524 | cpu_mask = RATE_IN_34XX; | ||
3525 | cpu_clkflg = CK_3505; | ||
3526 | } else if (cpu_is_omap3517()) { | ||
3527 | cpu_mask = RATE_IN_34XX; | ||
3528 | cpu_clkflg = CK_3517; | ||
3529 | } else if (cpu_is_omap3505()) { | ||
3530 | cpu_mask = RATE_IN_34XX; | 3518 | cpu_mask = RATE_IN_34XX; |
3531 | cpu_clkflg = CK_3505; | 3519 | cpu_clkflg = CK_AM35XX; |
3532 | } else if (cpu_is_omap3630()) { | 3520 | } else if (cpu_is_omap3630()) { |
3533 | cpu_mask = (RATE_IN_34XX | RATE_IN_36XX); | 3521 | cpu_mask = (RATE_IN_34XX | RATE_IN_36XX); |
3534 | cpu_clkflg = CK_36XX; | 3522 | cpu_clkflg = CK_36XX; |
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index ad07689e156..8664f5a8bfb 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
@@ -840,7 +840,7 @@ void clkdm_allow_idle(struct clockdomain *clkdm) | |||
840 | spin_lock_irqsave(&clkdm->lock, flags); | 840 | spin_lock_irqsave(&clkdm->lock, flags); |
841 | clkdm->_flags |= _CLKDM_FLAG_HWSUP_ENABLED; | 841 | clkdm->_flags |= _CLKDM_FLAG_HWSUP_ENABLED; |
842 | arch_clkdm->clkdm_allow_idle(clkdm); | 842 | arch_clkdm->clkdm_allow_idle(clkdm); |
843 | pwrdm_clkdm_state_switch(clkdm); | 843 | pwrdm_state_switch(clkdm->pwrdm.ptr); |
844 | spin_unlock_irqrestore(&clkdm->lock, flags); | 844 | spin_unlock_irqrestore(&clkdm->lock, flags); |
845 | } | 845 | } |
846 | 846 | ||
@@ -924,8 +924,7 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) | |||
924 | 924 | ||
925 | spin_lock_irqsave(&clkdm->lock, flags); | 925 | spin_lock_irqsave(&clkdm->lock, flags); |
926 | arch_clkdm->clkdm_clk_enable(clkdm); | 926 | arch_clkdm->clkdm_clk_enable(clkdm); |
927 | pwrdm_wait_transition(clkdm->pwrdm.ptr); | 927 | pwrdm_state_switch(clkdm->pwrdm.ptr); |
928 | pwrdm_clkdm_state_switch(clkdm); | ||
929 | spin_unlock_irqrestore(&clkdm->lock, flags); | 928 | spin_unlock_irqrestore(&clkdm->lock, flags); |
930 | 929 | ||
931 | pr_debug("clockdomain: clkdm %s: enabled\n", clkdm->name); | 930 | pr_debug("clockdomain: clkdm %s: enabled\n", clkdm->name); |
@@ -950,7 +949,7 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) | |||
950 | 949 | ||
951 | spin_lock_irqsave(&clkdm->lock, flags); | 950 | spin_lock_irqsave(&clkdm->lock, flags); |
952 | arch_clkdm->clkdm_clk_disable(clkdm); | 951 | arch_clkdm->clkdm_clk_disable(clkdm); |
953 | pwrdm_clkdm_state_switch(clkdm); | 952 | pwrdm_state_switch(clkdm->pwrdm.ptr); |
954 | spin_unlock_irqrestore(&clkdm->lock, flags); | 953 | spin_unlock_irqrestore(&clkdm->lock, flags); |
955 | 954 | ||
956 | pr_debug("clockdomain: clkdm %s: disabled\n", clkdm->name); | 955 | pr_debug("clockdomain: clkdm %s: disabled\n", clkdm->name); |
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c index b84e138d99c..6038adb9771 100644 --- a/arch/arm/mach-omap2/clockdomains3xxx_data.c +++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c | |||
@@ -53,9 +53,9 @@ | |||
53 | * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE | 53 | * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE |
54 | */ | 54 | */ |
55 | static struct clkdm_dep gfx_sgx_3xxx_wkdeps[] = { | 55 | static struct clkdm_dep gfx_sgx_3xxx_wkdeps[] = { |
56 | { .clkdm_name = "iva2_clkdm", }, | 56 | { .clkdm_name = "iva2_clkdm" }, |
57 | { .clkdm_name = "mpu_clkdm", }, | 57 | { .clkdm_name = "mpu_clkdm" }, |
58 | { .clkdm_name = "wkup_clkdm", }, | 58 | { .clkdm_name = "wkup_clkdm" }, |
59 | { NULL }, | 59 | { NULL }, |
60 | }; | 60 | }; |
61 | 61 | ||
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h index b91275908f3..8083a8cdc55 100644 --- a/arch/arm/mach-omap2/cm-regbits-34xx.h +++ b/arch/arm/mach-omap2/cm-regbits-34xx.h | |||
@@ -79,7 +79,7 @@ | |||
79 | 79 | ||
80 | /* CM_CLKSEL1_PLL_IVA2 */ | 80 | /* CM_CLKSEL1_PLL_IVA2 */ |
81 | #define OMAP3430_IVA2_CLK_SRC_SHIFT 19 | 81 | #define OMAP3430_IVA2_CLK_SRC_SHIFT 19 |
82 | #define OMAP3430_IVA2_CLK_SRC_MASK (0x3 << 19) | 82 | #define OMAP3430_IVA2_CLK_SRC_MASK (0x7 << 19) |
83 | #define OMAP3430_IVA2_DPLL_MULT_SHIFT 8 | 83 | #define OMAP3430_IVA2_DPLL_MULT_SHIFT 8 |
84 | #define OMAP3430_IVA2_DPLL_MULT_MASK (0x7ff << 8) | 84 | #define OMAP3430_IVA2_DPLL_MULT_MASK (0x7ff << 8) |
85 | #define OMAP3430_IVA2_DPLL_DIV_SHIFT 0 | 85 | #define OMAP3430_IVA2_DPLL_DIV_SHIFT 0 |
@@ -124,7 +124,7 @@ | |||
124 | 124 | ||
125 | /* CM_CLKSEL1_PLL_MPU */ | 125 | /* CM_CLKSEL1_PLL_MPU */ |
126 | #define OMAP3430_MPU_CLK_SRC_SHIFT 19 | 126 | #define OMAP3430_MPU_CLK_SRC_SHIFT 19 |
127 | #define OMAP3430_MPU_CLK_SRC_MASK (0x3 << 19) | 127 | #define OMAP3430_MPU_CLK_SRC_MASK (0x7 << 19) |
128 | #define OMAP3430_MPU_DPLL_MULT_SHIFT 8 | 128 | #define OMAP3430_MPU_DPLL_MULT_SHIFT 8 |
129 | #define OMAP3430_MPU_DPLL_MULT_MASK (0x7ff << 8) | 129 | #define OMAP3430_MPU_DPLL_MULT_MASK (0x7ff << 8) |
130 | #define OMAP3430_MPU_DPLL_DIV_SHIFT 0 | 130 | #define OMAP3430_MPU_DPLL_DIV_SHIFT 0 |
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index bd8810c3753..8c86d294b1a 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include "prcm44xx.h" | 32 | #include "prcm44xx.h" |
33 | #include "prm44xx.h" | 33 | #include "prm44xx.h" |
34 | #include "prcm_mpu44xx.h" | 34 | #include "prcm_mpu44xx.h" |
35 | #include "prcm-common.h" | ||
35 | 36 | ||
36 | /* | 37 | /* |
37 | * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield: | 38 | * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield: |
@@ -49,14 +50,21 @@ | |||
49 | #define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2 | 50 | #define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2 |
50 | #define CLKCTRL_IDLEST_DISABLED 0x3 | 51 | #define CLKCTRL_IDLEST_DISABLED 0x3 |
51 | 52 | ||
52 | static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { | 53 | static void __iomem *_cm_bases[OMAP4_MAX_PRCM_PARTITIONS]; |
53 | [OMAP4430_INVALID_PRCM_PARTITION] = 0, | 54 | |
54 | [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE, | 55 | /** |
55 | [OMAP4430_CM1_PARTITION] = OMAP4430_CM1_BASE, | 56 | * omap_cm_base_init - Populates the cm partitions |
56 | [OMAP4430_CM2_PARTITION] = OMAP4430_CM2_BASE, | 57 | * |
57 | [OMAP4430_SCRM_PARTITION] = 0, | 58 | * Populates the base addresses of the _cm_bases |
58 | [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE, | 59 | * array used for read/write of cm module registers. |
59 | }; | 60 | */ |
61 | void omap_cm_base_init(void) | ||
62 | { | ||
63 | _cm_bases[OMAP4430_PRM_PARTITION] = prm_base; | ||
64 | _cm_bases[OMAP4430_CM1_PARTITION] = cm_base; | ||
65 | _cm_bases[OMAP4430_CM2_PARTITION] = cm2_base; | ||
66 | _cm_bases[OMAP4430_PRCM_MPU_PARTITION] = prcm_mpu_base; | ||
67 | } | ||
60 | 68 | ||
61 | /* Private functions */ | 69 | /* Private functions */ |
62 | 70 | ||
@@ -106,7 +114,7 @@ u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx) | |||
106 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || | 114 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || |
107 | part == OMAP4430_INVALID_PRCM_PARTITION || | 115 | part == OMAP4430_INVALID_PRCM_PARTITION || |
108 | !_cm_bases[part]); | 116 | !_cm_bases[part]); |
109 | return __raw_readl(OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx)); | 117 | return __raw_readl(_cm_bases[part] + inst + idx); |
110 | } | 118 | } |
111 | 119 | ||
112 | /* Write into a register in a CM instance */ | 120 | /* Write into a register in a CM instance */ |
@@ -115,7 +123,7 @@ void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) | |||
115 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || | 123 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || |
116 | part == OMAP4430_INVALID_PRCM_PARTITION || | 124 | part == OMAP4430_INVALID_PRCM_PARTITION || |
117 | !_cm_bases[part]); | 125 | !_cm_bases[part]); |
118 | __raw_writel(val, OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx)); | 126 | __raw_writel(val, _cm_bases[part] + inst + idx); |
119 | } | 127 | } |
120 | 128 | ||
121 | /* Read-modify-write a register in CM1. Caller must lock */ | 129 | /* Read-modify-write a register in CM1. Caller must lock */ |
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index 1549c11000d..8a6953a34fe 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c | |||
@@ -166,6 +166,7 @@ static struct omap_globals omap4_globals = { | |||
166 | .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE), | 166 | .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE), |
167 | .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), | 167 | .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), |
168 | .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE), | 168 | .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE), |
169 | .prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE), | ||
169 | }; | 170 | }; |
170 | 171 | ||
171 | void __init omap2_set_globals_443x(void) | 172 | void __init omap2_set_globals_443x(void) |
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 57da7f406e2..0672fc54b30 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h | |||
@@ -111,6 +111,7 @@ struct omap_globals { | |||
111 | void __iomem *prm; /* Power and Reset Management */ | 111 | void __iomem *prm; /* Power and Reset Management */ |
112 | void __iomem *cm; /* Clock Management */ | 112 | void __iomem *cm; /* Clock Management */ |
113 | void __iomem *cm2; | 113 | void __iomem *cm2; |
114 | void __iomem *prcm_mpu; | ||
114 | }; | 115 | }; |
115 | 116 | ||
116 | void omap2_set_globals_242x(void); | 117 | void omap2_set_globals_242x(void); |
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 96ad3dbeac3..96114901b93 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c | |||
@@ -981,16 +981,6 @@ int pwrdm_state_switch(struct powerdomain *pwrdm) | |||
981 | return ret; | 981 | return ret; |
982 | } | 982 | } |
983 | 983 | ||
984 | int pwrdm_clkdm_state_switch(struct clockdomain *clkdm) | ||
985 | { | ||
986 | if (clkdm != NULL && clkdm->pwrdm.ptr != NULL) { | ||
987 | pwrdm_wait_transition(clkdm->pwrdm.ptr); | ||
988 | return pwrdm_state_switch(clkdm->pwrdm.ptr); | ||
989 | } | ||
990 | |||
991 | return -EINVAL; | ||
992 | } | ||
993 | |||
994 | int pwrdm_pre_transition(void) | 984 | int pwrdm_pre_transition(void) |
995 | { | 985 | { |
996 | pwrdm_for_each(_pwrdm_pre_transition_cb, NULL); | 986 | pwrdm_for_each(_pwrdm_pre_transition_cb, NULL); |
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index 0d72a8a8ce4..8f88d65c46e 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h | |||
@@ -213,7 +213,6 @@ bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm); | |||
213 | int pwrdm_wait_transition(struct powerdomain *pwrdm); | 213 | int pwrdm_wait_transition(struct powerdomain *pwrdm); |
214 | 214 | ||
215 | int pwrdm_state_switch(struct powerdomain *pwrdm); | 215 | int pwrdm_state_switch(struct powerdomain *pwrdm); |
216 | int pwrdm_clkdm_state_switch(struct clockdomain *clkdm); | ||
217 | int pwrdm_pre_transition(void); | 216 | int pwrdm_pre_transition(void); |
218 | int pwrdm_post_transition(void); | 217 | int pwrdm_post_transition(void); |
219 | int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm); | 218 | int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm); |
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 5aa5435e3ff..6da3ba483ad 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h | |||
@@ -177,6 +177,8 @@ | |||
177 | /* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */ | 177 | /* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */ |
178 | #define OMAP24XX_ST_GPIOS_SHIFT 2 | 178 | #define OMAP24XX_ST_GPIOS_SHIFT 2 |
179 | #define OMAP24XX_ST_GPIOS_MASK (1 << 2) | 179 | #define OMAP24XX_ST_GPIOS_MASK (1 << 2) |
180 | #define OMAP24XX_ST_32KSYNC_SHIFT 1 | ||
181 | #define OMAP24XX_ST_32KSYNC_MASK (1 << 1) | ||
180 | #define OMAP24XX_ST_GPT1_SHIFT 0 | 182 | #define OMAP24XX_ST_GPT1_SHIFT 0 |
181 | #define OMAP24XX_ST_GPT1_MASK (1 << 0) | 183 | #define OMAP24XX_ST_GPT1_MASK (1 << 0) |
182 | 184 | ||
@@ -307,6 +309,8 @@ | |||
307 | #define OMAP3430_ST_SR1_MASK (1 << 6) | 309 | #define OMAP3430_ST_SR1_MASK (1 << 6) |
308 | #define OMAP3430_ST_GPIO1_SHIFT 3 | 310 | #define OMAP3430_ST_GPIO1_SHIFT 3 |
309 | #define OMAP3430_ST_GPIO1_MASK (1 << 3) | 311 | #define OMAP3430_ST_GPIO1_MASK (1 << 3) |
312 | #define OMAP3430_ST_32KSYNC_SHIFT 2 | ||
313 | #define OMAP3430_ST_32KSYNC_MASK (1 << 2) | ||
310 | #define OMAP3430_ST_GPT12_SHIFT 1 | 314 | #define OMAP3430_ST_GPT12_SHIFT 1 |
311 | #define OMAP3430_ST_GPT12_MASK (1 << 1) | 315 | #define OMAP3430_ST_GPT12_MASK (1 << 1) |
312 | #define OMAP3430_ST_GPT1_SHIFT 0 | 316 | #define OMAP3430_ST_GPT1_SHIFT 0 |
@@ -410,6 +414,19 @@ | |||
410 | extern void __iomem *prm_base; | 414 | extern void __iomem *prm_base; |
411 | extern void __iomem *cm_base; | 415 | extern void __iomem *cm_base; |
412 | extern void __iomem *cm2_base; | 416 | extern void __iomem *cm2_base; |
417 | extern void __iomem *prcm_mpu_base; | ||
418 | |||
419 | #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_ARCH_OMAP5) | ||
420 | extern void omap_prm_base_init(void); | ||
421 | extern void omap_cm_base_init(void); | ||
422 | #else | ||
423 | static inline void omap_prm_base_init(void) | ||
424 | { | ||
425 | } | ||
426 | static inline void omap_cm_base_init(void) | ||
427 | { | ||
428 | } | ||
429 | #endif | ||
413 | 430 | ||
414 | /** | 431 | /** |
415 | * struct omap_prcm_irq - describes a PRCM interrupt bit | 432 | * struct omap_prcm_irq - describes a PRCM interrupt bit |
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 626acfad719..480f40a5ee4 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c | |||
@@ -42,6 +42,7 @@ | |||
42 | void __iomem *prm_base; | 42 | void __iomem *prm_base; |
43 | void __iomem *cm_base; | 43 | void __iomem *cm_base; |
44 | void __iomem *cm2_base; | 44 | void __iomem *cm2_base; |
45 | void __iomem *prcm_mpu_base; | ||
45 | 46 | ||
46 | #define MAX_MODULE_ENABLE_WAIT 100000 | 47 | #define MAX_MODULE_ENABLE_WAIT 100000 |
47 | 48 | ||
@@ -155,4 +156,11 @@ void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) | |||
155 | cm_base = omap2_globals->cm; | 156 | cm_base = omap2_globals->cm; |
156 | if (omap2_globals->cm2) | 157 | if (omap2_globals->cm2) |
157 | cm2_base = omap2_globals->cm2; | 158 | cm2_base = omap2_globals->cm2; |
159 | if (omap2_globals->prcm_mpu) | ||
160 | prcm_mpu_base = omap2_globals->prcm_mpu; | ||
161 | |||
162 | if (cpu_is_omap44xx()) { | ||
163 | omap_prm_base_init(); | ||
164 | omap_cm_base_init(); | ||
165 | } | ||
158 | } | 166 | } |
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c index 9b3898a3ac9..c12320c0ae9 100644 --- a/arch/arm/mach-omap2/prminst44xx.c +++ b/arch/arm/mach-omap2/prminst44xx.c | |||
@@ -18,20 +18,26 @@ | |||
18 | 18 | ||
19 | #include "iomap.h" | 19 | #include "iomap.h" |
20 | #include "common.h" | 20 | #include "common.h" |
21 | #include "prcm-common.h" | ||
21 | #include "prm44xx.h" | 22 | #include "prm44xx.h" |
22 | #include "prminst44xx.h" | 23 | #include "prminst44xx.h" |
23 | #include "prm-regbits-44xx.h" | 24 | #include "prm-regbits-44xx.h" |
24 | #include "prcm44xx.h" | 25 | #include "prcm44xx.h" |
25 | #include "prcm_mpu44xx.h" | 26 | #include "prcm_mpu44xx.h" |
26 | 27 | ||
27 | static u32 _prm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { | 28 | static void __iomem *_prm_bases[OMAP4_MAX_PRCM_PARTITIONS]; |
28 | [OMAP4430_INVALID_PRCM_PARTITION] = 0, | 29 | |
29 | [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE, | 30 | /** |
30 | [OMAP4430_CM1_PARTITION] = 0, | 31 | * omap_prm_base_init - Populates the prm partitions |
31 | [OMAP4430_CM2_PARTITION] = 0, | 32 | * |
32 | [OMAP4430_SCRM_PARTITION] = 0, | 33 | * Populates the base addresses of the _prm_bases |
33 | [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE, | 34 | * array used for read/write of prm module registers. |
34 | }; | 35 | */ |
36 | void omap_prm_base_init(void) | ||
37 | { | ||
38 | _prm_bases[OMAP4430_PRM_PARTITION] = prm_base; | ||
39 | _prm_bases[OMAP4430_PRCM_MPU_PARTITION] = prcm_mpu_base; | ||
40 | } | ||
35 | 41 | ||
36 | /* Read a register in a PRM instance */ | 42 | /* Read a register in a PRM instance */ |
37 | u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx) | 43 | u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx) |
@@ -39,8 +45,7 @@ u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx) | |||
39 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || | 45 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || |
40 | part == OMAP4430_INVALID_PRCM_PARTITION || | 46 | part == OMAP4430_INVALID_PRCM_PARTITION || |
41 | !_prm_bases[part]); | 47 | !_prm_bases[part]); |
42 | return __raw_readl(OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst + | 48 | return __raw_readl(_prm_bases[part] + inst + idx); |
43 | idx)); | ||
44 | } | 49 | } |
45 | 50 | ||
46 | /* Write into a register in a PRM instance */ | 51 | /* Write into a register in a PRM instance */ |
@@ -49,7 +54,7 @@ void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) | |||
49 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || | 54 | BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || |
50 | part == OMAP4430_INVALID_PRCM_PARTITION || | 55 | part == OMAP4430_INVALID_PRCM_PARTITION || |
51 | !_prm_bases[part]); | 56 | !_prm_bases[part]); |
52 | __raw_writel(val, OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst + idx)); | 57 | __raw_writel(val, _prm_bases[part] + inst + idx); |
53 | } | 58 | } |
54 | 59 | ||
55 | /* Read-modify-write a register in PRM. Caller must lock */ | 60 | /* Read-modify-write a register in PRM. Caller must lock */ |
diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h index b299b8d201c..d0ed8c443a6 100644 --- a/arch/arm/plat-omap/include/plat/clkdev_omap.h +++ b/arch/arm/plat-omap/include/plat/clkdev_omap.h | |||
@@ -34,8 +34,7 @@ struct omap_clk { | |||
34 | #define CK_243X (1 << 5) /* 243x, 253x */ | 34 | #define CK_243X (1 << 5) /* 243x, 253x */ |
35 | #define CK_3430ES1 (1 << 6) /* 34xxES1 only */ | 35 | #define CK_3430ES1 (1 << 6) /* 34xxES1 only */ |
36 | #define CK_3430ES2PLUS (1 << 7) /* 34xxES2, ES3, non-Sitara 35xx only */ | 36 | #define CK_3430ES2PLUS (1 << 7) /* 34xxES2, ES3, non-Sitara 35xx only */ |
37 | #define CK_3505 (1 << 8) | 37 | #define CK_AM35XX (1 << 9) /* Sitara AM35xx */ |
38 | #define CK_3517 (1 << 9) | ||
39 | #define CK_36XX (1 << 10) /* 36xx/37xx-specific clocks */ | 38 | #define CK_36XX (1 << 10) /* 36xx/37xx-specific clocks */ |
40 | #define CK_443X (1 << 11) | 39 | #define CK_443X (1 << 11) |
41 | #define CK_TI816X (1 << 12) | 40 | #define CK_TI816X (1 << 12) |
@@ -44,7 +43,6 @@ struct omap_clk { | |||
44 | 43 | ||
45 | 44 | ||
46 | #define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS) | 45 | #define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS) |
47 | #define CK_AM35XX (CK_3505 | CK_3517) /* all Sitara AM35xx */ | ||
48 | #define CK_3XXX (CK_34XX | CK_AM35XX | CK_36XX) | 46 | #define CK_3XXX (CK_34XX | CK_AM35XX | CK_36XX) |
49 | 47 | ||
50 | 48 | ||