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-rw-r--r--arch/arm/plat-omap/common.c3
-rw-r--r--arch/arm/plat-omap/counter_32k.c40
-rw-r--r--arch/arm/plat-omap/cpu-omap.c171
-rw-r--r--arch/arm/plat-omap/devices.c5
-rw-r--r--arch/arm/plat-omap/dma.c22
-rw-r--r--arch/arm/plat-omap/include/plat/clkdev_omap.h1
-rw-r--r--arch/arm/plat-omap/include/plat/common.h1
-rw-r--r--arch/arm/plat-omap/include/plat/iommu.h31
-rw-r--r--arch/arm/plat-omap/include/plat/iovmm.h12
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h2
-rw-r--r--arch/arm/plat-omap/include/plat/mmc.h1
-rw-r--r--arch/arm/plat-omap/include/plat/omap-secure.h13
-rw-r--r--arch/arm/plat-omap/include/plat/omap-serial.h37
-rw-r--r--arch/arm/plat-omap/include/plat/omap44xx.h1
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h6
-rw-r--r--arch/arm/plat-omap/include/plat/serial.h13
-rw-r--r--arch/arm/plat-omap/include/plat/sram.h6
-rw-r--r--arch/arm/plat-omap/include/plat/system.h2
-rw-r--r--arch/arm/plat-omap/include/plat/uncompress.h3
-rw-r--r--arch/arm/plat-omap/include/plat/usb.h35
-rw-r--r--arch/arm/plat-omap/sram.c17
21 files changed, 176 insertions, 246 deletions
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 2ee6341fffd..06383b51e65 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -22,6 +22,8 @@
22#include <plat/vram.h> 22#include <plat/vram.h>
23#include <plat/dsp.h> 23#include <plat/dsp.h>
24 24
25#include <plat/omap-secure.h>
26
25 27
26#define NO_LENGTH_CHECK 0xffffffff 28#define NO_LENGTH_CHECK 0xffffffff
27 29
@@ -66,6 +68,7 @@ void __init omap_reserve(void)
66 omapfb_reserve_sdram_memblock(); 68 omapfb_reserve_sdram_memblock();
67 omap_vram_reserve_sdram_memblock(); 69 omap_vram_reserve_sdram_memblock();
68 omap_dsp_reserve_sdram_memblock(); 70 omap_dsp_reserve_sdram_memblock();
71 omap_secure_ram_reserve_memblock();
69} 72}
70 73
71void __init omap_init_consistent_dma_size(void) 74void __init omap_init_consistent_dma_size(void)
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index a6cbb712da5..5f0f2292b7f 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -17,7 +17,6 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/sched.h>
21#include <linux/clocksource.h> 20#include <linux/clocksource.h>
22 21
23#include <asm/sched_clock.h> 22#include <asm/sched_clock.h>
@@ -37,41 +36,9 @@ static void __iomem *timer_32k_base;
37 36
38#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410 37#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
39 38
40/* 39static u32 notrace omap_32k_read_sched_clock(void)
41 * Returns current time from boot in nsecs. It's OK for this to wrap
42 * around for now, as it's just a relative time stamp.
43 */
44static DEFINE_CLOCK_DATA(cd);
45
46/*
47 * Constants generated by clocks_calc_mult_shift(m, s, 32768, NSEC_PER_SEC, 60).
48 * This gives a resolution of about 30us and a wrap period of about 36hrs.
49 */
50#define SC_MULT 4000000000u
51#define SC_SHIFT 17
52
53static inline unsigned long long notrace _omap_32k_sched_clock(void)
54{
55 u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
56 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
57}
58
59#if defined(CONFIG_OMAP_32K_TIMER) && !defined(CONFIG_OMAP_MPU_TIMER)
60unsigned long long notrace sched_clock(void)
61{
62 return _omap_32k_sched_clock();
63}
64#else
65unsigned long long notrace omap_32k_sched_clock(void)
66{
67 return _omap_32k_sched_clock();
68}
69#endif
70
71static void notrace omap_update_sched_clock(void)
72{ 40{
73 u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0; 41 return timer_32k_base ? __raw_readl(timer_32k_base) : 0;
74 update_sched_clock(&cd, cyc, (u32)~0);
75} 42}
76 43
77/** 44/**
@@ -147,8 +114,7 @@ int __init omap_init_clocksource_32k(void)
147 clocksource_mmio_readl_up)) 114 clocksource_mmio_readl_up))
148 printk(err, "32k_counter"); 115 printk(err, "32k_counter");
149 116
150 init_fixed_sched_clock(&cd, omap_update_sched_clock, 32, 117 setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
151 32768, SC_MULT, SC_SHIFT);
152 } 118 }
153 return 0; 119 return 0;
154} 120}
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
deleted file mode 100644
index da4f68dbba1..00000000000
--- a/arch/arm/plat-omap/cpu-omap.c
+++ /dev/null
@@ -1,171 +0,0 @@
1/*
2 * linux/arch/arm/plat-omap/cpu-omap.c
3 *
4 * CPU frequency scaling for OMAP
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
8 *
9 * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15#include <linux/types.h>
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/cpufreq.h>
19#include <linux/delay.h>
20#include <linux/init.h>
21#include <linux/err.h>
22#include <linux/clk.h>
23#include <linux/io.h>
24
25#include <mach/hardware.h>
26#include <plat/clock.h>
27#include <asm/system.h>
28
29#define VERY_HI_RATE 900000000
30
31static struct cpufreq_frequency_table *freq_table;
32
33#ifdef CONFIG_ARCH_OMAP1
34#define MPU_CLK "mpu"
35#else
36#define MPU_CLK "virt_prcm_set"
37#endif
38
39static struct clk *mpu_clk;
40
41/* TODO: Add support for SDRAM timing changes */
42
43static int omap_verify_speed(struct cpufreq_policy *policy)
44{
45 if (freq_table)
46 return cpufreq_frequency_table_verify(policy, freq_table);
47
48 if (policy->cpu)
49 return -EINVAL;
50
51 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
52 policy->cpuinfo.max_freq);
53
54 policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000;
55 policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000;
56 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
57 policy->cpuinfo.max_freq);
58 return 0;
59}
60
61static unsigned int omap_getspeed(unsigned int cpu)
62{
63 unsigned long rate;
64
65 if (cpu)
66 return 0;
67
68 rate = clk_get_rate(mpu_clk) / 1000;
69 return rate;
70}
71
72static int omap_target(struct cpufreq_policy *policy,
73 unsigned int target_freq,
74 unsigned int relation)
75{
76 struct cpufreq_freqs freqs;
77 int ret = 0;
78
79 /* Ensure desired rate is within allowed range. Some govenors
80 * (ondemand) will just pass target_freq=0 to get the minimum. */
81 if (target_freq < policy->min)
82 target_freq = policy->min;
83 if (target_freq > policy->max)
84 target_freq = policy->max;
85
86 freqs.old = omap_getspeed(0);
87 freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000;
88 freqs.cpu = 0;
89
90 if (freqs.old == freqs.new)
91 return ret;
92
93 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
94#ifdef CONFIG_CPU_FREQ_DEBUG
95 printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n",
96 freqs.old, freqs.new);
97#endif
98 ret = clk_set_rate(mpu_clk, freqs.new * 1000);
99 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
100
101 return ret;
102}
103
104static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
105{
106 int result = 0;
107
108 mpu_clk = clk_get(NULL, MPU_CLK);
109 if (IS_ERR(mpu_clk))
110 return PTR_ERR(mpu_clk);
111
112 if (policy->cpu != 0)
113 return -EINVAL;
114
115 policy->cur = policy->min = policy->max = omap_getspeed(0);
116
117 clk_init_cpufreq_table(&freq_table);
118 if (freq_table) {
119 result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
120 if (!result)
121 cpufreq_frequency_table_get_attr(freq_table,
122 policy->cpu);
123 } else {
124 policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000;
125 policy->cpuinfo.max_freq = clk_round_rate(mpu_clk,
126 VERY_HI_RATE) / 1000;
127 }
128
129 /* FIXME: what's the actual transition time? */
130 policy->cpuinfo.transition_latency = 300 * 1000;
131
132 return 0;
133}
134
135static int omap_cpu_exit(struct cpufreq_policy *policy)
136{
137 clk_exit_cpufreq_table(&freq_table);
138 clk_put(mpu_clk);
139 return 0;
140}
141
142static struct freq_attr *omap_cpufreq_attr[] = {
143 &cpufreq_freq_attr_scaling_available_freqs,
144 NULL,
145};
146
147static struct cpufreq_driver omap_driver = {
148 .flags = CPUFREQ_STICKY,
149 .verify = omap_verify_speed,
150 .target = omap_target,
151 .get = omap_getspeed,
152 .init = omap_cpu_init,
153 .exit = omap_cpu_exit,
154 .name = "omap",
155 .attr = omap_cpufreq_attr,
156};
157
158static int __init omap_cpufreq_init(void)
159{
160 return cpufreq_register_driver(&omap_driver);
161}
162
163arch_initcall(omap_cpufreq_init);
164
165/*
166 * if ever we want to remove this, upon cleanup call:
167 *
168 * cpufreq_unregister_driver()
169 * cpufreq_frequency_table_put_attr()
170 */
171
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 19719329a47..60278f47c0b 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -20,6 +20,7 @@
20#include <mach/hardware.h> 20#include <mach/hardware.h>
21#include <asm/mach-types.h> 21#include <asm/mach-types.h>
22#include <asm/mach/map.h> 22#include <asm/mach/map.h>
23#include <asm/memblock.h>
23 24
24#include <plat/tc.h> 25#include <plat/tc.h>
25#include <plat/board.h> 26#include <plat/board.h>
@@ -164,14 +165,12 @@ void __init omap_dsp_reserve_sdram_memblock(void)
164 if (!size) 165 if (!size)
165 return; 166 return;
166 167
167 paddr = memblock_alloc(size, SZ_1M); 168 paddr = arm_memblock_steal(size, SZ_1M);
168 if (!paddr) { 169 if (!paddr) {
169 pr_err("%s: failed to reserve %x bytes\n", 170 pr_err("%s: failed to reserve %x bytes\n",
170 __func__, size); 171 __func__, size);
171 return; 172 return;
172 } 173 }
173 memblock_free(paddr, size);
174 memblock_remove(paddr, size);
175 174
176 omap_dsp_phys_mempool_base = paddr; 175 omap_dsp_phys_mempool_base = paddr;
177} 176}
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index c22217c2ee5..002fb4d96bb 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1034,6 +1034,18 @@ dma_addr_t omap_get_dma_src_pos(int lch)
1034 if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0) 1034 if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0)
1035 offset = p->dma_read(CSAC, lch); 1035 offset = p->dma_read(CSAC, lch);
1036 1036
1037 if (!cpu_is_omap15xx()) {
1038 /*
1039 * CDAC == 0 indicates that the DMA transfer on the channel has
1040 * not been started (no data has been transferred so far).
1041 * Return the programmed source start address in this case.
1042 */
1043 if (likely(p->dma_read(CDAC, lch)))
1044 offset = p->dma_read(CSAC, lch);
1045 else
1046 offset = p->dma_read(CSSA, lch);
1047 }
1048
1037 if (cpu_class_is_omap1()) 1049 if (cpu_class_is_omap1())
1038 offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000); 1050 offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000);
1039 1051
@@ -1062,8 +1074,16 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
1062 * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is 1074 * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
1063 * read before the DMA controller finished disabling the channel. 1075 * read before the DMA controller finished disabling the channel.
1064 */ 1076 */
1065 if (!cpu_is_omap15xx() && offset == 0) 1077 if (!cpu_is_omap15xx() && offset == 0) {
1066 offset = p->dma_read(CDAC, lch); 1078 offset = p->dma_read(CDAC, lch);
1079 /*
1080 * CDAC == 0 indicates that the DMA transfer on the channel has
1081 * not been started (no data has been transferred so far).
1082 * Return the programmed destination start address in this case.
1083 */
1084 if (unlikely(!offset))
1085 offset = p->dma_read(CDSA, lch);
1086 }
1067 1087
1068 if (cpu_class_is_omap1()) 1088 if (cpu_class_is_omap1())
1069 offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000); 1089 offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000);
diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h
index 387a9638991..b299b8d201c 100644
--- a/arch/arm/plat-omap/include/plat/clkdev_omap.h
+++ b/arch/arm/plat-omap/include/plat/clkdev_omap.h
@@ -40,6 +40,7 @@ struct omap_clk {
40#define CK_443X (1 << 11) 40#define CK_443X (1 << 11)
41#define CK_TI816X (1 << 12) 41#define CK_TI816X (1 << 12)
42#define CK_446X (1 << 13) 42#define CK_446X (1 << 13)
43#define CK_1710 (1 << 15) /* 1710 extra for rate selection */
43 44
44 45
45#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS) 46#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS)
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 257f9770b2d..b4d7ec3fbfb 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -31,7 +31,6 @@
31#include <plat/omap_hwmod.h> 31#include <plat/omap_hwmod.h>
32 32
33extern int __init omap_init_clocksource_32k(void); 33extern int __init omap_init_clocksource_32k(void);
34extern unsigned long long notrace omap_32k_sched_clock(void);
35 34
36extern void omap_reserve(void); 35extern void omap_reserve(void);
37extern int omap_dss_reset(struct omap_hwmod *); 36extern int omap_dss_reset(struct omap_hwmod *);
diff --git a/arch/arm/plat-omap/include/plat/iommu.h b/arch/arm/plat-omap/include/plat/iommu.h
index a1d79ee1925..88be3e628b3 100644
--- a/arch/arm/plat-omap/include/plat/iommu.h
+++ b/arch/arm/plat-omap/include/plat/iommu.h
@@ -111,6 +111,32 @@ struct iommu_platform_data {
111 u32 da_end; 111 u32 da_end;
112}; 112};
113 113
114/**
115 * struct iommu_arch_data - omap iommu private data
116 * @name: name of the iommu device
117 * @iommu_dev: handle of the iommu device
118 *
119 * This is an omap iommu private data object, which binds an iommu user
120 * to its iommu device. This object should be placed at the iommu user's
121 * dev_archdata so generic IOMMU API can be used without having to
122 * utilize omap-specific plumbing anymore.
123 */
124struct omap_iommu_arch_data {
125 const char *name;
126 struct omap_iommu *iommu_dev;
127};
128
129/**
130 * dev_to_omap_iommu() - retrieves an omap iommu object from a user device
131 * @dev: iommu client device
132 */
133static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)
134{
135 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
136
137 return arch_data->iommu_dev;
138}
139
114/* IOMMU errors */ 140/* IOMMU errors */
115#define OMAP_IOMMU_ERR_TLB_MISS (1 << 0) 141#define OMAP_IOMMU_ERR_TLB_MISS (1 << 0)
116#define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1) 142#define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1)
@@ -163,8 +189,8 @@ extern int omap_iommu_set_isr(const char *name,
163 void *priv), 189 void *priv),
164 void *isr_priv); 190 void *isr_priv);
165 191
166extern void omap_iommu_save_ctx(struct omap_iommu *obj); 192extern void omap_iommu_save_ctx(struct device *dev);
167extern void omap_iommu_restore_ctx(struct omap_iommu *obj); 193extern void omap_iommu_restore_ctx(struct device *dev);
168 194
169extern int omap_install_iommu_arch(const struct iommu_functions *ops); 195extern int omap_install_iommu_arch(const struct iommu_functions *ops);
170extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops); 196extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);
@@ -176,6 +202,5 @@ extern ssize_t
176omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len); 202omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len);
177extern size_t 203extern size_t
178omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len); 204omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len);
179struct device *omap_find_iommu_device(const char *name);
180 205
181#endif /* __MACH_IOMMU_H */ 206#endif /* __MACH_IOMMU_H */
diff --git a/arch/arm/plat-omap/include/plat/iovmm.h b/arch/arm/plat-omap/include/plat/iovmm.h
index 6af1a91c0f3..498e57cda6c 100644
--- a/arch/arm/plat-omap/include/plat/iovmm.h
+++ b/arch/arm/plat-omap/include/plat/iovmm.h
@@ -72,18 +72,18 @@ struct iovm_struct {
72#define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT)) 72#define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT))
73 73
74 74
75extern struct iovm_struct *omap_find_iovm_area(struct omap_iommu *obj, u32 da); 75extern struct iovm_struct *omap_find_iovm_area(struct device *dev, u32 da);
76extern u32 76extern u32
77omap_iommu_vmap(struct iommu_domain *domain, struct omap_iommu *obj, u32 da, 77omap_iommu_vmap(struct iommu_domain *domain, struct device *dev, u32 da,
78 const struct sg_table *sgt, u32 flags); 78 const struct sg_table *sgt, u32 flags);
79extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain, 79extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain,
80 struct omap_iommu *obj, u32 da); 80 struct device *dev, u32 da);
81extern u32 81extern u32
82omap_iommu_vmalloc(struct iommu_domain *domain, struct omap_iommu *obj, 82omap_iommu_vmalloc(struct iommu_domain *domain, struct device *dev,
83 u32 da, size_t bytes, u32 flags); 83 u32 da, size_t bytes, u32 flags);
84extern void 84extern void
85omap_iommu_vfree(struct iommu_domain *domain, struct omap_iommu *obj, 85omap_iommu_vfree(struct iommu_domain *domain, struct device *dev,
86 const u32 da); 86 const u32 da);
87extern void *omap_da_to_va(struct omap_iommu *obj, u32 da); 87extern void *omap_da_to_va(struct device *dev, u32 da);
88 88
89#endif /* __IOMMU_MMAP_H */ 89#endif /* __IOMMU_MMAP_H */
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index ebda7382c65..2efd6454bce 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -357,7 +357,7 @@
357#define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69 357#define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69
358#define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70 358#define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70
359#define INT_35XX_USBOTG_IRQ 71 359#define INT_35XX_USBOTG_IRQ 71
360#define INT_35XX_UART4 84 360#define INT_35XX_UART4_IRQ 84
361#define INT_35XX_CCDC_VD0_IRQ 88 361#define INT_35XX_CCDC_VD0_IRQ 88
362#define INT_35XX_CCDC_VD1_IRQ 92 362#define INT_35XX_CCDC_VD1_IRQ 92
363#define INT_35XX_CCDC_VD2_IRQ 93 363#define INT_35XX_CCDC_VD2_IRQ 93
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index 94cf70afb23..f75946c3293 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -96,6 +96,7 @@ struct omap_mmc_platform_data {
96 */ 96 */
97 u8 wires; /* Used for the MMC driver on omap1 and 2420 */ 97 u8 wires; /* Used for the MMC driver on omap1 and 2420 */
98 u32 caps; /* Used for the MMC driver on 2430 and later */ 98 u32 caps; /* Used for the MMC driver on 2430 and later */
99 u32 pm_caps; /* PM capabilities of the mmc */
99 100
100 /* 101 /*
101 * nomux means "standard" muxing is wrong on this board, and 102 * nomux means "standard" muxing is wrong on this board, and
diff --git a/arch/arm/plat-omap/include/plat/omap-secure.h b/arch/arm/plat-omap/include/plat/omap-secure.h
new file mode 100644
index 00000000000..64f9d1c7f1b
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/omap-secure.h
@@ -0,0 +1,13 @@
1#ifndef __OMAP_SECURE_H__
2#define __OMAP_SECURE_H__
3
4#include <linux/types.h>
5
6#ifdef CONFIG_ARCH_OMAP2PLUS
7extern int omap_secure_ram_reserve_memblock(void);
8#else
9static inline void omap_secure_ram_reserve_memblock(void)
10{ }
11#endif
12
13#endif /* __OMAP_SECURE_H__ */
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
index 2682043f5a5..9ff444469f3 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -19,6 +19,7 @@
19 19
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/pm_qos.h>
22 23
23#include <plat/mux.h> 24#include <plat/mux.h>
24 25
@@ -33,6 +34,8 @@
33 34
34#define OMAP_MODE13X_SPEED 230400 35#define OMAP_MODE13X_SPEED 230400
35 36
37#define OMAP_UART_SCR_TX_EMPTY 0x08
38
36/* WER = 0x7F 39/* WER = 0x7F
37 * Enable module level wakeup in WER reg 40 * Enable module level wakeup in WER reg
38 */ 41 */
@@ -51,18 +54,27 @@
51 54
52#define OMAP_UART_DMA_CH_FREE -1 55#define OMAP_UART_DMA_CH_FREE -1
53 56
54#define RX_TIMEOUT (3 * HZ)
55#define OMAP_MAX_HSUART_PORTS 4 57#define OMAP_MAX_HSUART_PORTS 4
56 58
57#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA 59#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
58 60
61#define UART_ERRATA_i202_MDR1_ACCESS BIT(0)
62#define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1)
63
59struct omap_uart_port_info { 64struct omap_uart_port_info {
60 bool dma_enabled; /* To specify DMA Mode */ 65 bool dma_enabled; /* To specify DMA Mode */
61 unsigned int uartclk; /* UART clock rate */ 66 unsigned int uartclk; /* UART clock rate */
62 void __iomem *membase; /* ioremap cookie or NULL */
63 resource_size_t mapbase; /* resource base */
64 unsigned long irqflags; /* request_irq flags */
65 upf_t flags; /* UPF_* flags */ 67 upf_t flags; /* UPF_* flags */
68 u32 errata;
69 unsigned int dma_rx_buf_size;
70 unsigned int dma_rx_timeout;
71 unsigned int autosuspend_timeout;
72 unsigned int dma_rx_poll_rate;
73
74 int (*get_context_loss_count)(struct device *);
75 void (*set_forceidle)(struct platform_device *);
76 void (*set_noidle)(struct platform_device *);
77 void (*enable_wakeup)(struct platform_device *, bool);
66}; 78};
67 79
68struct uart_omap_dma { 80struct uart_omap_dma {
@@ -86,8 +98,9 @@ struct uart_omap_dma {
86 spinlock_t rx_lock; 98 spinlock_t rx_lock;
87 /* timer to poll activity on rx dma */ 99 /* timer to poll activity on rx dma */
88 struct timer_list rx_timer; 100 struct timer_list rx_timer;
89 int rx_buf_size; 101 unsigned int rx_buf_size;
90 int rx_timeout; 102 unsigned int rx_poll_rate;
103 unsigned int rx_timeout;
91}; 104};
92 105
93struct uart_omap_port { 106struct uart_omap_port {
@@ -100,6 +113,10 @@ struct uart_omap_port {
100 unsigned char mcr; 113 unsigned char mcr;
101 unsigned char fcr; 114 unsigned char fcr;
102 unsigned char efr; 115 unsigned char efr;
116 unsigned char dll;
117 unsigned char dlh;
118 unsigned char mdr1;
119 unsigned char scr;
103 120
104 int use_dma; 121 int use_dma;
105 /* 122 /*
@@ -111,6 +128,14 @@ struct uart_omap_port {
111 unsigned char msr_saved_flags; 128 unsigned char msr_saved_flags;
112 char name[20]; 129 char name[20];
113 unsigned long port_activity; 130 unsigned long port_activity;
131 u32 context_loss_cnt;
132 u32 errata;
133 u8 wakeups_enabled;
134
135 struct pm_qos_request pm_qos_request;
136 u32 latency;
137 u32 calc_latency;
138 struct work_struct qos_work;
114}; 139};
115 140
116#endif /* __OMAP_SERIAL_H__ */ 141#endif /* __OMAP_SERIAL_H__ */
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h b/arch/arm/plat-omap/include/plat/omap44xx.h
index ea2b8a6306e..c0d478e55c8 100644
--- a/arch/arm/plat-omap/include/plat/omap44xx.h
+++ b/arch/arm/plat-omap/include/plat/omap44xx.h
@@ -45,6 +45,7 @@
45#define OMAP44XX_WKUPGEN_BASE 0x48281000 45#define OMAP44XX_WKUPGEN_BASE 0x48281000
46#define OMAP44XX_MCPDM_BASE 0x40132000 46#define OMAP44XX_MCPDM_BASE 0x40132000
47#define OMAP44XX_MCPDM_L3_BASE 0x49032000 47#define OMAP44XX_MCPDM_L3_BASE 0x49032000
48#define OMAP44XX_SAR_RAM_BASE 0x4a326000
48 49
49#define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000) 50#define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000)
50#define OMAP44XX_HSUSB_OTG_BASE (L4_44XX_BASE + 0xAB000) 51#define OMAP44XX_HSUSB_OTG_BASE (L4_44XX_BASE + 0xAB000)
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 8b372ede17c..647010109af 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -97,6 +97,7 @@ struct omap_hwmod_mux_info {
97 struct omap_device_pad *pads; 97 struct omap_device_pad *pads;
98 int nr_pads_dynamic; 98 int nr_pads_dynamic;
99 struct omap_device_pad **pads_dynamic; 99 struct omap_device_pad **pads_dynamic;
100 int *irqs;
100 bool enabled; 101 bool enabled;
101}; 102};
102 103
@@ -416,10 +417,13 @@ struct omap_hwmod_omap4_prcm {
416 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module 417 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
417 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP 418 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
418 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached 419 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
420 * _HWMOD_SKIP_ENABLE: set if hwmod enabled during init (HWMOD_INIT_NO_IDLE) -
421 * causes the first call to _enable() to only update the pinmux
419 */ 422 */
420#define _HWMOD_NO_MPU_PORT (1 << 0) 423#define _HWMOD_NO_MPU_PORT (1 << 0)
421#define _HWMOD_WAKEUP_ENABLED (1 << 1) 424#define _HWMOD_WAKEUP_ENABLED (1 << 1)
422#define _HWMOD_SYSCONFIG_LOADED (1 << 2) 425#define _HWMOD_SYSCONFIG_LOADED (1 << 2)
426#define _HWMOD_SKIP_ENABLE (1 << 3)
423 427
424/* 428/*
425 * omap_hwmod._state definitions 429 * omap_hwmod._state definitions
@@ -604,6 +608,8 @@ int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
604 608
605int omap_hwmod_no_setup_reset(struct omap_hwmod *oh); 609int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
606 610
611int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx);
612
607/* 613/*
608 * Chip variant-specific hwmod init routines - XXX should be converted 614 * Chip variant-specific hwmod init routines - XXX should be converted
609 * to use initcalls once the initial boot ordering is straightened out 615 * to use initcalls once the initial boot ordering is straightened out
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index 6975ee3f521..198d1e6a4a6 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -2,7 +2,7 @@
2 * arch/arm/plat-omap/include/mach/serial.h 2 * arch/arm/plat-omap/include/mach/serial.h
3 * 3 *
4 * Copyright (C) 2009 Texas Instruments 4 * Copyright (C) 2009 Texas Instruments
5 * Addded OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com> 5 * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * 6 *
7 * This program is distributed in the hope that it will be useful, 7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -44,6 +44,7 @@
44#define OMAP3_UART2_BASE OMAP2_UART2_BASE 44#define OMAP3_UART2_BASE OMAP2_UART2_BASE
45#define OMAP3_UART3_BASE 0x49020000 45#define OMAP3_UART3_BASE 0x49020000
46#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */ 46#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
47#define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */
47 48
48/* OMAP4 serial ports */ 49/* OMAP4 serial ports */
49#define OMAP4_UART1_BASE OMAP2_UART1_BASE 50#define OMAP4_UART1_BASE OMAP2_UART1_BASE
@@ -106,15 +107,13 @@
106#ifndef __ASSEMBLER__ 107#ifndef __ASSEMBLER__
107 108
108struct omap_board_data; 109struct omap_board_data;
110struct omap_uart_port_info;
109 111
110extern void omap_serial_init(void); 112extern void omap_serial_init(void);
111extern void omap_serial_init_port(struct omap_board_data *bdata);
112extern int omap_uart_can_sleep(void); 113extern int omap_uart_can_sleep(void);
113extern void omap_uart_check_wakeup(void); 114extern void omap_serial_board_init(struct omap_uart_port_info *platform_data);
114extern void omap_uart_prepare_suspend(void); 115extern void omap_serial_init_port(struct omap_board_data *bdata,
115extern void omap_uart_prepare_idle(int num); 116 struct omap_uart_port_info *platform_data);
116extern void omap_uart_resume_idle(int num);
117extern void omap_uart_enable_irqs(int enable);
118#endif 117#endif
119 118
120#endif 119#endif
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h
index f500fc34d06..75aa1b2bef5 100644
--- a/arch/arm/plat-omap/include/plat/sram.h
+++ b/arch/arm/plat-omap/include/plat/sram.h
@@ -95,6 +95,10 @@ static inline void omap_push_sram_idle(void) {}
95 */ 95 */
96#define OMAP2_SRAM_PA 0x40200000 96#define OMAP2_SRAM_PA 0x40200000
97#define OMAP3_SRAM_PA 0x40200000 97#define OMAP3_SRAM_PA 0x40200000
98#ifdef CONFIG_OMAP4_ERRATA_I688
99#define OMAP4_SRAM_PA 0x40304000
100#define OMAP4_SRAM_VA 0xfe404000
101#else
98#define OMAP4_SRAM_PA 0x40300000 102#define OMAP4_SRAM_PA 0x40300000
99 103#endif
100#endif 104#endif
diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h
index c5fa9e92900..8e5ebd74b12 100644
--- a/arch/arm/plat-omap/include/plat/system.h
+++ b/arch/arm/plat-omap/include/plat/system.h
@@ -12,6 +12,4 @@ static inline void arch_idle(void)
12 cpu_do_idle(); 12 cpu_do_idle();
13} 13}
14 14
15extern void (*arch_reset)(char, const char *);
16
17#endif 15#endif
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index 7fbc361946b..6ee90495ca4 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -179,6 +179,9 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
179 /* TI8168 base boards using UART3 */ 179 /* TI8168 base boards using UART3 */
180 DEBUG_LL_TI81XX(3, ti8168evm); 180 DEBUG_LL_TI81XX(3, ti8168evm);
181 181
182 /* TI8148 base boards using UART1 */
183 DEBUG_LL_TI81XX(1, ti8148evm);
184
182 } while (0); 185 } while (0);
183} 186}
184 187
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 17d3c939775..dc864b580da 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -100,9 +100,6 @@ extern void usb_musb_init(struct omap_musb_board_data *board_data);
100 100
101extern void usbhs_init(const struct usbhs_omap_board_data *pdata); 101extern void usbhs_init(const struct usbhs_omap_board_data *pdata);
102 102
103extern int omap_usbhs_enable(struct device *dev);
104extern void omap_usbhs_disable(struct device *dev);
105
106extern int omap4430_phy_power(struct device *dev, int ID, int on); 103extern int omap4430_phy_power(struct device *dev, int ID, int on);
107extern int omap4430_phy_set_clk(struct device *dev, int on); 104extern int omap4430_phy_set_clk(struct device *dev, int on);
108extern int omap4430_phy_init(struct device *dev); 105extern int omap4430_phy_init(struct device *dev);
@@ -114,6 +111,7 @@ extern void am35x_musb_reset(void);
114extern void am35x_musb_phy_power(u8 on); 111extern void am35x_musb_phy_power(u8 on);
115extern void am35x_musb_clear_irq(void); 112extern void am35x_musb_clear_irq(void);
116extern void am35x_set_mode(u8 musb_mode); 113extern void am35x_set_mode(u8 musb_mode);
114extern void ti81xx_musb_phy_power(u8 on);
117 115
118/* 116/*
119 * FIXME correct answer depends on hmc_mode, 117 * FIXME correct answer depends on hmc_mode,
@@ -273,6 +271,37 @@ static inline void omap2_usbfs_init(struct omap_usb_config *pdata)
273#define CONF2_OTGPWRDN (1 << 2) 271#define CONF2_OTGPWRDN (1 << 2)
274#define CONF2_DATPOL (1 << 1) 272#define CONF2_DATPOL (1 << 1)
275 273
274/* TI81XX specific definitions */
275#define USBCTRL0 0x620
276#define USBSTAT0 0x624
277
278/* TI816X PHY controls bits */
279#define TI816X_USBPHY0_NORMAL_MODE (1 << 0)
280#define TI816X_USBPHY_REFCLK_OSC (1 << 8)
281
282/* TI814X PHY controls bits */
283#define USBPHY_CM_PWRDN (1 << 0)
284#define USBPHY_OTG_PWRDN (1 << 1)
285#define USBPHY_CHGDET_DIS (1 << 2)
286#define USBPHY_CHGDET_RSTRT (1 << 3)
287#define USBPHY_SRCONDM (1 << 4)
288#define USBPHY_SINKONDP (1 << 5)
289#define USBPHY_CHGISINK_EN (1 << 6)
290#define USBPHY_CHGVSRC_EN (1 << 7)
291#define USBPHY_DMPULLUP (1 << 8)
292#define USBPHY_DPPULLUP (1 << 9)
293#define USBPHY_CDET_EXTCTL (1 << 10)
294#define USBPHY_GPIO_MODE (1 << 12)
295#define USBPHY_DPOPBUFCTL (1 << 13)
296#define USBPHY_DMOPBUFCTL (1 << 14)
297#define USBPHY_DPINPUT (1 << 15)
298#define USBPHY_DMINPUT (1 << 16)
299#define USBPHY_DPGPIO_PD (1 << 17)
300#define USBPHY_DMGPIO_PD (1 << 18)
301#define USBPHY_OTGVDET_EN (1 << 19)
302#define USBPHY_OTGSESSEND_EN (1 << 20)
303#define USBPHY_DATA_POLARITY (1 << 23)
304
276#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB) 305#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB)
277u32 omap1_usb0_init(unsigned nwires, unsigned is_device); 306u32 omap1_usb0_init(unsigned nwires, unsigned is_device);
278u32 omap1_usb1_init(unsigned nwires); 307u32 omap1_usb1_init(unsigned nwires);
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 8b28664d1c6..4243bdcc87b 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -40,7 +40,11 @@
40#define OMAP1_SRAM_PA 0x20000000 40#define OMAP1_SRAM_PA 0x20000000
41#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800) 41#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
42#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000) 42#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
43#ifdef CONFIG_OMAP4_ERRATA_I688
44#define OMAP4_SRAM_PUB_PA OMAP4_SRAM_PA
45#else
43#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000) 46#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
47#endif
44 48
45#if defined(CONFIG_ARCH_OMAP2PLUS) 49#if defined(CONFIG_ARCH_OMAP2PLUS)
46#define SRAM_BOOTLOADER_SZ 0x00 50#define SRAM_BOOTLOADER_SZ 0x00
@@ -141,11 +145,9 @@ static void __init omap_detect_sram(void)
141 omap_sram_size = 0x32000; /* 200K */ 145 omap_sram_size = 0x32000; /* 200K */
142 else if (cpu_is_omap15xx()) 146 else if (cpu_is_omap15xx())
143 omap_sram_size = 0x30000; /* 192K */ 147 omap_sram_size = 0x30000; /* 192K */
144 else if (cpu_is_omap1610() || cpu_is_omap1621() || 148 else if (cpu_is_omap1610() || cpu_is_omap1611() ||
145 cpu_is_omap1710()) 149 cpu_is_omap1621() || cpu_is_omap1710())
146 omap_sram_size = 0x4000; /* 16K */ 150 omap_sram_size = 0x4000; /* 16K */
147 else if (cpu_is_omap1611())
148 omap_sram_size = SZ_256K;
149 else { 151 else {
150 pr_err("Could not detect SRAM size\n"); 152 pr_err("Could not detect SRAM size\n");
151 omap_sram_size = 0x4000; 153 omap_sram_size = 0x4000;
@@ -163,6 +165,10 @@ static void __init omap_map_sram(void)
163 if (omap_sram_size == 0) 165 if (omap_sram_size == 0)
164 return; 166 return;
165 167
168#ifdef CONFIG_OMAP4_ERRATA_I688
169 omap_sram_start += PAGE_SIZE;
170 omap_sram_size -= SZ_16K;
171#endif
166 if (cpu_is_omap34xx()) { 172 if (cpu_is_omap34xx()) {
167 /* 173 /*
168 * SRAM must be marked as non-cached on OMAP3 since the 174 * SRAM must be marked as non-cached on OMAP3 since the
@@ -224,6 +230,9 @@ static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
224void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) 230void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
225{ 231{
226 BUG_ON(!_omap_sram_reprogram_clock); 232 BUG_ON(!_omap_sram_reprogram_clock);
233 /* On 730, bit 13 must always be 1 */
234 if (cpu_is_omap7xx())
235 ckctl |= 0x2000;
227 _omap_sram_reprogram_clock(dpllctl, ckctl); 236 _omap_sram_reprogram_clock(dpllctl, ckctl);
228} 237}
229 238
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-06 21:47:07 -0500