1 files changed, 169 insertions, 11 deletions

diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index 614b2c1327c..6bbf1789bed 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -125,20 +125,64 @@
         .pu_pd_val      = pull_mode,                            \
 },
 
-
-#define PULL_DISABLED   0
-#define PULL_ENABLED    1
-
-#define PULL_DOWN       0
-#define PULL_UP         1
+/* 24xx/34xx mux bit defines */
+#define OMAP2_PULL_ENA          (1 << 3)
+#define OMAP2_PULL_UP           (1 << 4)
+#define OMAP2_ALTELECTRICALSEL  (1 << 5)
+
+/* 34xx specific mux bit defines */
+#define OMAP3_INPUT_EN          (1 << 8)
+#define OMAP3_OFF_EN            (1 << 9)
+#define OMAP3_OFFOUT_EN         (1 << 10)
+#define OMAP3_OFFOUT_VAL        (1 << 11)
+#define OMAP3_OFF_PULL_EN       (1 << 12)
+#define OMAP3_OFF_PULL_UP       (1 << 13)
+#define OMAP3_WAKEUP_EN         (1 << 14)
+
+/* 34xx mux mode options for each pin. See TRM for options */
+#define OMAP34XX_MUX_MODE0      0
+#define OMAP34XX_MUX_MODE1      1
+#define OMAP34XX_MUX_MODE2      2
+#define OMAP34XX_MUX_MODE3      3
+#define OMAP34XX_MUX_MODE4      4
+#define OMAP34XX_MUX_MODE5      5
+#define OMAP34XX_MUX_MODE6      6
+#define OMAP34XX_MUX_MODE7      7
+
+/* 34xx active pin states */
+#define OMAP34XX_PIN_OUTPUT             0
+#define OMAP34XX_PIN_INPUT              OMAP3_INPUT_EN
+#define OMAP34XX_PIN_INPUT_PULLUP       (OMAP2_PULL_ENA | OMAP3_INPUT_EN \
+                                                | OMAP2_PULL_UP)
+#define OMAP34XX_PIN_INPUT_PULLDOWN     (OMAP2_PULL_ENA | OMAP3_INPUT_EN)
+
+/* 34xx off mode states */
+#define OMAP34XX_PIN_OFF_NONE           0
+#define OMAP34XX_PIN_OFF_OUTPUT_HIGH    (OMAP3_OFF_EN | OMAP3_OFFOUT_EN \
+                                                | OMAP3_OFFOUT_VAL)
+#define OMAP34XX_PIN_OFF_OUTPUT_LOW     (OMAP3_OFF_EN | OMAP3_OFFOUT_EN)
+#define OMAP34XX_PIN_OFF_INPUT_PULLUP   (OMAP3_OFF_EN | OMAP3_OFF_PULL_EN \
+                                                | OMAP3_OFF_PULL_UP)
+#define OMAP34XX_PIN_OFF_INPUT_PULLDOWN (OMAP3_OFF_EN | OMAP3_OFF_PULL_EN)
+#define OMAP34XX_PIN_OFF_WAKEUPENABLE   OMAP3_WAKEUP_EN
+
+#define MUX_CFG_34XX(desc, reg_offset, mux_value) {             \
+        .name           = desc,                                 \
+        .debug          = 0,                                    \
+        .mux_reg        = reg_offset,                           \
+        .mux_val        = mux_value                             \
+},
 
 struct pin_config {
-        char *name;
-        unsigned char busy;
-        unsigned char debug;
+        char                    *name;
+        const unsigned int      mux_reg;
+        unsigned char           debug;
 
-        const char *mux_reg_name;
-        const unsigned int mux_reg;
+#if     defined(CONFIG_ARCH_OMAP34XX)
+        u16                     mux_val; /* Wake-up, off mode, pull, mux mode */
+#endif
+
+#if     defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP24XX)
         const unsigned char mask_offset;
         const unsigned char mask;
 
@@ -150,6 +194,12 @@ struct pin_config {
         const char *pu_pd_name;
         const unsigned int pu_pd_reg;
         const unsigned char pu_pd_val;
+#endif
+
+#if     defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
+        const char *mux_reg_name;
+#endif
+
 };
 
 enum omap730_index {
@@ -593,6 +643,114 @@ enum omap24xx_index {
 
 };
 
+enum omap34xx_index {
+        /* 34xx I2C */
+        K21_34XX_I2C1_SCL,
+        J21_34XX_I2C1_SDA,
+        AF15_34XX_I2C2_SCL,
+        AE15_34XX_I2C2_SDA,
+        AF14_34XX_I2C3_SCL,
+        AG14_34XX_I2C3_SDA,
+        AD26_34XX_I2C4_SCL,
+        AE26_34XX_I2C4_SDA,
+
+        /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
+        Y8_3430_USB1HS_PHY_CLK,
+        Y9_3430_USB1HS_PHY_STP,
+        AA14_3430_USB1HS_PHY_DIR,
+        AA11_3430_USB1HS_PHY_NXT,
+        W13_3430_USB1HS_PHY_DATA0,
+        W12_3430_USB1HS_PHY_DATA1,
+        W11_3430_USB1HS_PHY_DATA2,
+        Y11_3430_USB1HS_PHY_DATA3,
+        W9_3430_USB1HS_PHY_DATA4,
+        Y12_3430_USB1HS_PHY_DATA5,
+        W8_3430_USB1HS_PHY_DATA6,
+        Y13_3430_USB1HS_PHY_DATA7,
+
+        /* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
+        AA8_3430_USB2HS_PHY_CLK,
+        AA10_3430_USB2HS_PHY_STP,
+        AA9_3430_USB2HS_PHY_DIR,
+        AB11_3430_USB2HS_PHY_NXT,
+        AB10_3430_USB2HS_PHY_DATA0,
+        AB9_3430_USB2HS_PHY_DATA1,
+        W3_3430_USB2HS_PHY_DATA2,
+        T4_3430_USB2HS_PHY_DATA3,
+        T3_3430_USB2HS_PHY_DATA4,
+        R3_3430_USB2HS_PHY_DATA5,
+        R4_3430_USB2HS_PHY_DATA6,
+        T2_3430_USB2HS_PHY_DATA7,
+
+
+        /* TLL - HSUSB: 12-pin TLL Port 1*/
+        Y8_3430_USB1HS_TLL_CLK,
+        Y9_3430_USB1HS_TLL_STP,
+        AA14_3430_USB1HS_TLL_DIR,
+        AA11_3430_USB1HS_TLL_NXT,
+        W13_3430_USB1HS_TLL_DATA0,
+        W12_3430_USB1HS_TLL_DATA1,
+        W11_3430_USB1HS_TLL_DATA2,
+        Y11_3430_USB1HS_TLL_DATA3,
+        W9_3430_USB1HS_TLL_DATA4,
+        Y12_3430_USB1HS_TLL_DATA5,
+        W8_3430_USB1HS_TLL_DATA6,
+        Y13_3430_USB1HS_TLL_DATA7,
+
+        /* TLL - HSUSB: 12-pin TLL Port 2*/
+        AA8_3430_USB2HS_TLL_CLK,
+        AA10_3430_USB2HS_TLL_STP,
+        AA9_3430_USB2HS_TLL_DIR,
+        AB11_3430_USB2HS_TLL_NXT,
+        AB10_3430_USB2HS_TLL_DATA0,
+        AB9_3430_USB2HS_TLL_DATA1,
+        W3_3430_USB2HS_TLL_DATA2,
+        T4_3430_USB2HS_TLL_DATA3,
+        T3_3430_USB2HS_TLL_DATA4,
+        R3_3430_USB2HS_TLL_DATA5,
+        R4_3430_USB2HS_TLL_DATA6,
+        T2_3430_USB2HS_TLL_DATA7,
+
+        /* TLL - HSUSB: 12-pin TLL Port 3*/
+        AA6_3430_USB3HS_TLL_CLK,
+        AB3_3430_USB3HS_TLL_STP,
+        AA3_3430_USB3HS_TLL_DIR,
+        Y3_3430_USB3HS_TLL_NXT,
+        AA5_3430_USB3HS_TLL_DATA0,
+        Y4_3430_USB3HS_TLL_DATA1,
+        Y5_3430_USB3HS_TLL_DATA2,
+        W5_3430_USB3HS_TLL_DATA3,
+        AB12_3430_USB3HS_TLL_DATA4,
+        AB13_3430_USB3HS_TLL_DATA5,
+        AA13_3430_USB3HS_TLL_DATA6,
+        AA12_3430_USB3HS_TLL_DATA7,
+
+        /* PHY FSUSB: FS Serial for Port 1 (multiple PHY modes supported) */
+        AF10_3430_USB1FS_PHY_MM1_RXDP,
+        AG9_3430_USB1FS_PHY_MM1_RXDM,
+        W13_3430_USB1FS_PHY_MM1_RXRCV,
+        W12_3430_USB1FS_PHY_MM1_TXSE0,
+        W11_3430_USB1FS_PHY_MM1_TXDAT,
+        Y11_3430_USB1FS_PHY_MM1_TXEN_N,
+
+        /* PHY FSUSB: FS Serial for Port 2 (multiple PHY modes supported) */
+        AF7_3430_USB2FS_PHY_MM2_RXDP,
+        AH7_3430_USB2FS_PHY_MM2_RXDM,
+        AB10_3430_USB2FS_PHY_MM2_RXRCV,
+        AB9_3430_USB2FS_PHY_MM2_TXSE0,
+        W3_3430_USB2FS_PHY_MM2_TXDAT,
+        T4_3430_USB2FS_PHY_MM2_TXEN_N,
+
+        /* PHY FSUSB: FS Serial for Port 3 (multiple PHY modes supported) */
+        AH3_3430_USB3FS_PHY_MM3_RXDP,
+        AE3_3430_USB3FS_PHY_MM3_RXDM,
+        AD1_3430_USB3FS_PHY_MM3_RXRCV,
+        AE1_3430_USB3FS_PHY_MM3_TXSE0,
+        AD2_3430_USB3FS_PHY_MM3_TXDAT,
+        AC1_3430_USB3FS_PHY_MM3_TXEN_N,
+
+};
+
 struct omap_mux_cfg {
         struct pin_config       *pins;
         unsigned long           size;