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-rw-r--r--arch/arm/plat-omap/dmtimer.c32
1 files changed, 22 insertions, 10 deletions
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 75a847dd776..e23b7cf2b21 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -170,7 +170,8 @@ static spinlock_t dm_timer_lock;
170 */ 170 */
171static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) 171static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
172{ 172{
173 return __omap_dm_timer_read(timer->io_base, reg, timer->posted); 173 WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
174 return __omap_dm_timer_read(timer, reg, timer->posted);
174} 175}
175 176
176/* 177/*
@@ -182,15 +183,19 @@ static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
182static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, 183static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
183 u32 value) 184 u32 value)
184{ 185{
185 __omap_dm_timer_write(timer->io_base, reg, value, timer->posted); 186 WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
187 __omap_dm_timer_write(timer, reg, value, timer->posted);
186} 188}
187 189
188static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) 190static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
189{ 191{
190 int c; 192 int c;
191 193
194 if (!timer->sys_stat)
195 return;
196
192 c = 0; 197 c = 0;
193 while (!(omap_dm_timer_read_reg(timer, OMAP_TIMER_SYS_STAT_REG) & 1)) { 198 while (!(__raw_readl(timer->sys_stat) & 1)) {
194 c++; 199 c++;
195 if (c > 100000) { 200 if (c > 100000) {
196 printk(KERN_ERR "Timer failed to reset\n"); 201 printk(KERN_ERR "Timer failed to reset\n");
@@ -219,7 +224,7 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer)
219 if (cpu_class_is_omap2()) 224 if (cpu_class_is_omap2())
220 wakeup = 1; 225 wakeup = 1;
221 226
222 __omap_dm_timer_reset(timer->io_base, autoidle, wakeup); 227 __omap_dm_timer_reset(timer, autoidle, wakeup);
223 timer->posted = 1; 228 timer->posted = 1;
224} 229}
225 230
@@ -401,7 +406,7 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer)
401 rate = clk_get_rate(timer->fclk); 406 rate = clk_get_rate(timer->fclk);
402#endif 407#endif
403 408
404 __omap_dm_timer_stop(timer->io_base, timer->posted, rate); 409 __omap_dm_timer_stop(timer, timer->posted, rate);
405} 410}
406EXPORT_SYMBOL_GPL(omap_dm_timer_stop); 411EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
407 412
@@ -466,7 +471,7 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
466 } 471 }
467 l |= OMAP_TIMER_CTRL_ST; 472 l |= OMAP_TIMER_CTRL_ST;
468 473
469 __omap_dm_timer_load_start(timer->io_base, l, load, timer->posted); 474 __omap_dm_timer_load_start(timer, l, load, timer->posted);
470} 475}
471EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start); 476EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
472 477
@@ -519,7 +524,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
519void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, 524void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
520 unsigned int value) 525 unsigned int value)
521{ 526{
522 __omap_dm_timer_int_enable(timer->io_base, value); 527 __omap_dm_timer_int_enable(timer, value);
523} 528}
524EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable); 529EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
525 530
@@ -527,7 +532,7 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
527{ 532{
528 unsigned int l; 533 unsigned int l;
529 534
530 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_STAT_REG); 535 l = __raw_readl(timer->irq_stat);
531 536
532 return l; 537 return l;
533} 538}
@@ -535,13 +540,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
535 540
536void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) 541void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
537{ 542{
538 __omap_dm_timer_write_status(timer->io_base, value); 543 __omap_dm_timer_write_status(timer, value);
539} 544}
540EXPORT_SYMBOL_GPL(omap_dm_timer_write_status); 545EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
541 546
542unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) 547unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
543{ 548{
544 return __omap_dm_timer_read_counter(timer->io_base, timer->posted); 549 return __omap_dm_timer_read_counter(timer, timer->posted);
545} 550}
546EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter); 551EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
547 552
@@ -601,6 +606,9 @@ static int __init omap_dm_timer_init(void)
601 dm_timer_count = omap4_dm_timer_count; 606 dm_timer_count = omap4_dm_timer_count;
602 dm_source_names = omap4_dm_source_names; 607 dm_source_names = omap4_dm_source_names;
603 dm_source_clocks = omap4_dm_source_clocks; 608 dm_source_clocks = omap4_dm_source_clocks;
609
610 pr_err("dmtimers disabled for omap4 until hwmod conversion\n");
611 return -ENODEV;
604 } 612 }
605 613
606 if (cpu_class_is_omap2()) 614 if (cpu_class_is_omap2())
@@ -630,8 +638,12 @@ static int __init omap_dm_timer_init(void)
630 if (sys_timer_reserved & (1 << i)) { 638 if (sys_timer_reserved & (1 << i)) {
631 timer->reserved = 1; 639 timer->reserved = 1;
632 timer->posted = 1; 640 timer->posted = 1;
641 continue;
633 } 642 }
634#endif 643#endif
644 omap_dm_timer_enable(timer);
645 __omap_dm_timer_init_regs(timer);
646 omap_dm_timer_disable(timer);
635 } 647 }
636 648
637 return 0; 649 return 0;