diff options
Diffstat (limited to 'arch/arm/plat-mxc/include')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/clock.h | 7 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx1.h | 313 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx21.h | 210 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx25.h | 22 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx27.h | 372 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx2x.h | 425 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx3.h | 76 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx35.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-v1.h | 103 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux.h | 128 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/irqs.h | 11 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/memory.h | 15 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mtd-xip.h | 34 |
13 files changed, 814 insertions, 904 deletions
diff --git a/arch/arm/plat-mxc/include/mach/clock.h b/arch/arm/plat-mxc/include/mach/clock.h index 43a82d0c534..753a5988d85 100644 --- a/arch/arm/plat-mxc/include/mach/clock.h +++ b/arch/arm/plat-mxc/include/mach/clock.h | |||
@@ -26,13 +26,6 @@ | |||
26 | struct module; | 26 | struct module; |
27 | 27 | ||
28 | struct clk { | 28 | struct clk { |
29 | #ifndef CONFIG_COMMON_CLKDEV | ||
30 | /* As soon as i.MX1 and i.MX31 switched to clkdev, this | ||
31 | * block can go away */ | ||
32 | struct list_head node; | ||
33 | struct module *owner; | ||
34 | const char *name; | ||
35 | #endif | ||
36 | int id; | 29 | int id; |
37 | /* Source clock this clk depends on */ | 30 | /* Source clock this clk depends on */ |
38 | struct clk *parent; | 31 | struct clk *parent; |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1.h b/arch/arm/plat-mxc/include/mach/iomux-mx1.h index bf23305c19c..6b1507cf378 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx1.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx1.h | |||
@@ -1,166 +1,155 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> | 2 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or | 4 | * This program is free software; you can redistribute it and/or |
5 | * modify it under the terms of the GNU General Public License | 5 | * modify it under the terms of the GNU General Public License |
6 | * as published by the Free Software Foundation; either version 2 | 6 | * as published by the Free Software Foundation; either version 2 |
7 | * of the License, or (at your option) any later version. | 7 | * of the License, or (at your option) any later version. |
8 | * This program is distributed in the hope that it will be useful, | 8 | * This program is distributed in the hope that it will be useful, |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
11 | * GNU General Public License for more details. | 11 | * GNU General Public License for more details. |
12 | * | 12 | * |
13 | * You should have received a copy of the GNU General Public License | 13 | * You should have received a copy of the GNU General Public License |
14 | * along with this program; if not, write to the Free Software | 14 | * along with this program; if not, write to the Free Software |
15 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | 15 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
16 | * MA 02110-1301, USA. | 16 | * MA 02110-1301, USA. |
17 | */ | 17 | */ |
18 | #ifndef __MACH_IOMUX_MX1_H__ | ||
19 | #define __MACH_IOMUX_MX1_H__ | ||
18 | 20 | ||
19 | #ifndef _MXC_IOMUX_MX1_H | 21 | #include <mach/iomux-v1.h> |
20 | #define _MXC_IOMUX_MX1_H | ||
21 | 22 | ||
22 | #ifndef GPIO_PORTA | 23 | #define PA0_AIN_SPI2_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0) |
23 | #error Please include mach/iomux.h | 24 | #define PA0_AF_ETMTRACESYNC (GPIO_PORTA | GPIO_AF | 0) |
24 | #endif | 25 | #define PA1_AOUT_SPI2_RXD (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 1) |
26 | #define PA1_PF_TIN (GPIO_PORTA | GPIO_PF | 1) | ||
27 | #define PA2_PF_PWM0 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 2) | ||
28 | #define PA3_PF_CSI_MCLK (GPIO_PORTA | GPIO_PF | 3) | ||
29 | #define PA4_PF_CSI_D0 (GPIO_PORTA | GPIO_PF | 4) | ||
30 | #define PA5_PF_CSI_D1 (GPIO_PORTA | GPIO_PF | 5) | ||
31 | #define PA6_PF_CSI_D2 (GPIO_PORTA | GPIO_PF | 6) | ||
32 | #define PA7_PF_CSI_D3 (GPIO_PORTA | GPIO_PF | 7) | ||
33 | #define PA8_PF_CSI_D4 (GPIO_PORTA | GPIO_PF | 8) | ||
34 | #define PA9_PF_CSI_D5 (GPIO_PORTA | GPIO_PF | 9) | ||
35 | #define PA10_PF_CSI_D6 (GPIO_PORTA | GPIO_PF | 10) | ||
36 | #define PA11_PF_CSI_D7 (GPIO_PORTA | GPIO_PF | 11) | ||
37 | #define PA12_PF_CSI_VSYNC (GPIO_PORTA | GPIO_PF | 12) | ||
38 | #define PA13_PF_CSI_HSYNC (GPIO_PORTA | GPIO_PF | 13) | ||
39 | #define PA14_PF_CSI_PIXCLK (GPIO_PORTA | GPIO_PF | 14) | ||
40 | #define PA15_PF_I2C_SDA (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15) | ||
41 | #define PA16_PF_I2C_SCL (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16) | ||
42 | #define PA17_AF_ETMTRACEPKT4 (GPIO_PORTA | GPIO_AF | 17) | ||
43 | #define PA17_AIN_SPI2_SS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17) | ||
44 | #define PA18_AF_ETMTRACEPKT5 (GPIO_PORTA | GPIO_AF | 18) | ||
45 | #define PA19_AF_ETMTRACEPKT6 (GPIO_PORTA | GPIO_AF | 19) | ||
46 | #define PA20_AF_ETMTRACEPKT7 (GPIO_PORTA | GPIO_AF | 20) | ||
47 | #define PA21_PF_A0 (GPIO_PORTA | GPIO_PF | 21) | ||
48 | #define PA22_PF_CS4 (GPIO_PORTA | GPIO_PF | 22) | ||
49 | #define PA23_PF_CS5 (GPIO_PORTA | GPIO_PF | 23) | ||
50 | #define PA24_PF_A16 (GPIO_PORTA | GPIO_PF | 24) | ||
51 | #define PA24_AF_ETMTRACEPKT0 (GPIO_PORTA | GPIO_AF | 24) | ||
52 | #define PA25_PF_A17 (GPIO_PORTA | GPIO_PF | 25) | ||
53 | #define PA25_AF_ETMTRACEPKT1 (GPIO_PORTA | GPIO_AF | 25) | ||
54 | #define PA26_PF_A18 (GPIO_PORTA | GPIO_PF | 26) | ||
55 | #define PA26_AF_ETMTRACEPKT2 (GPIO_PORTA | GPIO_AF | 26) | ||
56 | #define PA27_PF_A19 (GPIO_PORTA | GPIO_PF | 27) | ||
57 | #define PA27_AF_ETMTRACEPKT3 (GPIO_PORTA | GPIO_AF | 27) | ||
58 | #define PA28_PF_A20 (GPIO_PORTA | GPIO_PF | 28) | ||
59 | #define PA28_AF_ETMPIPESTAT0 (GPIO_PORTA | GPIO_AF | 28) | ||
60 | #define PA29_PF_A21 (GPIO_PORTA | GPIO_PF | 29) | ||
61 | #define PA29_AF_ETMPIPESTAT1 (GPIO_PORTA | GPIO_AF | 29) | ||
62 | #define PA30_PF_A22 (GPIO_PORTA | GPIO_PF | 30) | ||
63 | #define PA30_AF_ETMPIPESTAT2 (GPIO_PORTA | GPIO_AF | 30) | ||
64 | #define PA31_PF_A23 (GPIO_PORTA | GPIO_PF | 31) | ||
65 | #define PA31_AF_ETMTRACECLK (GPIO_PORTA | GPIO_AF | 31) | ||
66 | #define PB8_PF_SD_DAT0 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 8) | ||
67 | #define PB8_AF_MS_PIO (GPIO_PORTB | GPIO_AF | 8) | ||
68 | #define PB9_PF_SD_DAT1 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 9) | ||
69 | #define PB9_AF_MS_PI1 (GPIO_PORTB | GPIO_AF | 9) | ||
70 | #define PB10_PF_SD_DAT2 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 10) | ||
71 | #define PB10_AF_MS_SCLKI (GPIO_PORTB | GPIO_AF | 10) | ||
72 | #define PB11_PF_SD_DAT3 (GPIO_PORTB | GPIO_PF | 11) | ||
73 | #define PB11_AF_MS_SDIO (GPIO_PORTB | GPIO_AF | 11) | ||
74 | #define PB12_PF_SD_CLK (GPIO_PORTB | GPIO_PF | 12) | ||
75 | #define PB12_AF_MS_SCLK0 (GPIO_PORTB | GPIO_AF | 12) | ||
76 | #define PB13_PF_SD_CMD (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 13) | ||
77 | #define PB13_AF_MS_BS (GPIO_PORTB | GPIO_AF | 13) | ||
78 | #define PB14_AF_SSI_RXFS (GPIO_PORTB | GPIO_AF | 14) | ||
79 | #define PB15_AF_SSI_RXCLK (GPIO_PORTB | GPIO_AF | 15) | ||
80 | #define PB16_AF_SSI_RXDAT (GPIO_PORTB | GPIO_AF | GPIO_IN | 16) | ||
81 | #define PB17_AF_SSI_TXDAT (GPIO_PORTB | GPIO_AF | GPIO_OUT | 17) | ||
82 | #define PB18_AF_SSI_TXFS (GPIO_PORTB | GPIO_AF | 18) | ||
83 | #define PB19_AF_SSI_TXCLK (GPIO_PORTB | GPIO_AF | 19) | ||
84 | #define PB20_PF_USBD_AFE (GPIO_PORTB | GPIO_PF | 20) | ||
85 | #define PB21_PF_USBD_OE (GPIO_PORTB | GPIO_PF | 21) | ||
86 | #define PB22_PF_USBD_RCV (GPIO_PORTB | GPIO_PF | 22) | ||
87 | #define PB23_PF_USBD_SUSPND (GPIO_PORTB | GPIO_PF | 23) | ||
88 | #define PB24_PF_USBD_VP (GPIO_PORTB | GPIO_PF | 24) | ||
89 | #define PB25_PF_USBD_VM (GPIO_PORTB | GPIO_PF | 25) | ||
90 | #define PB26_PF_USBD_VPO (GPIO_PORTB | GPIO_PF | 26) | ||
91 | #define PB27_PF_USBD_VMO (GPIO_PORTB | GPIO_PF | 27) | ||
92 | #define PB28_PF_UART2_CTS (GPIO_PORTB | GPIO_PF | GPIO_OUT | 28) | ||
93 | #define PB29_PF_UART2_RTS (GPIO_PORTB | GPIO_PF | GPIO_IN | 29) | ||
94 | #define PB30_PF_UART2_TXD (GPIO_PORTB | GPIO_PF | GPIO_OUT | 30) | ||
95 | #define PB31_PF_UART2_RXD (GPIO_PORTB | GPIO_PF | GPIO_IN | 31) | ||
96 | #define PC3_PF_SSI_RXFS (GPIO_PORTC | GPIO_PF | 3) | ||
97 | #define PC4_PF_SSI_RXCLK (GPIO_PORTC | GPIO_PF | 4) | ||
98 | #define PC5_PF_SSI_RXDAT (GPIO_PORTC | GPIO_PF | GPIO_IN | 5) | ||
99 | #define PC6_PF_SSI_TXDAT (GPIO_PORTC | GPIO_PF | GPIO_OUT | 6) | ||
100 | #define PC7_PF_SSI_TXFS (GPIO_PORTC | GPIO_PF | 7) | ||
101 | #define PC8_PF_SSI_TXCLK (GPIO_PORTC | GPIO_PF | 8) | ||
102 | #define PC9_PF_UART1_CTS (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9) | ||
103 | #define PC10_PF_UART1_RTS (GPIO_PORTC | GPIO_PF | GPIO_IN | 10) | ||
104 | #define PC11_PF_UART1_TXD (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11) | ||
105 | #define PC12_PF_UART1_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 12) | ||
106 | #define PC13_PF_SPI1_SPI_RDY (GPIO_PORTC | GPIO_PF | 13) | ||
107 | #define PC14_PF_SPI1_SCLK (GPIO_PORTC | GPIO_PF | 14) | ||
108 | #define PC15_PF_SPI1_SS (GPIO_PORTC | GPIO_PF | 15) | ||
109 | #define PC16_PF_SPI1_MISO (GPIO_PORTC | GPIO_PF | 16) | ||
110 | #define PC17_PF_SPI1_MOSI (GPIO_PORTC | GPIO_PF | 17) | ||
111 | #define PC24_BIN_UART3_RI (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 24) | ||
112 | #define PC25_BIN_UART3_DSR (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 25) | ||
113 | #define PC26_AOUT_UART3_DTR (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 26) | ||
114 | #define PC27_BIN_UART3_DCD (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 27) | ||
115 | #define PC28_BIN_UART3_CTS (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 28) | ||
116 | #define PC29_AOUT_UART3_RTS (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 29) | ||
117 | #define PC30_BIN_UART3_TX (GPIO_PORTC | GPIO_BIN | 30) | ||
118 | #define PC31_AOUT_UART3_RX (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 31) | ||
119 | #define PD6_PF_LSCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 6) | ||
120 | #define PD7_PF_REV (GPIO_PORTD | GPIO_PF | 7) | ||
121 | #define PD7_AF_UART2_DTR (GPIO_PORTD | GPIO_AF | GPIO_IN | 7) | ||
122 | #define PD7_AIN_SPI2_SCLK (GPIO_PORTD | GPIO_AIN | 7) | ||
123 | #define PD8_PF_CLS (GPIO_PORTD | GPIO_PF | 8) | ||
124 | #define PD8_AF_UART2_DCD (GPIO_PORTD | GPIO_AF | GPIO_OUT | 8) | ||
125 | #define PD8_AIN_SPI2_SS (GPIO_PORTD | GPIO_AIN | 8) | ||
126 | #define PD9_PF_PS (GPIO_PORTD | GPIO_PF | 9) | ||
127 | #define PD9_AF_UART2_RI (GPIO_PORTD | GPIO_AF | GPIO_OUT | 9) | ||
128 | #define PD9_AOUT_SPI2_RXD (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 9) | ||
129 | #define PD10_PF_SPL_SPR (GPIO_PORTD | GPIO_PF | GPIO_OUT | 10) | ||
130 | #define PD10_AF_UART2_DSR (GPIO_PORTD | GPIO_AF | GPIO_OUT | 10) | ||
131 | #define PD10_AIN_SPI2_TXD (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 10) | ||
132 | #define PD11_PF_CONTRAST (GPIO_PORTD | GPIO_PF | GPIO_OUT | 11) | ||
133 | #define PD12_PF_ACD_OE (GPIO_PORTD | GPIO_PF | GPIO_OUT | 12) | ||
134 | #define PD13_PF_LP_HSYNC (GPIO_PORTD | GPIO_PF | GPIO_OUT | 13) | ||
135 | #define PD14_PF_FLM_VSYNC (GPIO_PORTD | GPIO_PF | GPIO_OUT | 14) | ||
136 | #define PD15_PF_LD0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 15) | ||
137 | #define PD16_PF_LD1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 16) | ||
138 | #define PD17_PF_LD2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) | ||
139 | #define PD18_PF_LD3 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) | ||
140 | #define PD19_PF_LD4 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19) | ||
141 | #define PD20_PF_LD5 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20) | ||
142 | #define PD21_PF_LD6 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21) | ||
143 | #define PD22_PF_LD7 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22) | ||
144 | #define PD23_PF_LD8 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 23) | ||
145 | #define PD24_PF_LD9 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24) | ||
146 | #define PD25_PF_LD10 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) | ||
147 | #define PD26_PF_LD11 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) | ||
148 | #define PD27_PF_LD12 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) | ||
149 | #define PD28_PF_LD13 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28) | ||
150 | #define PD29_PF_LD14 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29) | ||
151 | #define PD30_PF_LD15 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 30) | ||
152 | #define PD31_PF_TMR2OUT (GPIO_PORTD | GPIO_PF | 31) | ||
153 | #define PD31_BIN_SPI2_TXD (GPIO_PORTD | GPIO_BIN | 31) | ||
25 | 154 | ||
26 | /* FIXME: This list is not completed. The correct directions are | 155 | #endif /* ifndef __MACH_IOMUX_MX1_H__ */ |
27 | * missing on some (many) pins | ||
28 | */ | ||
29 | |||
30 | |||
31 | /* Primary GPIO pin functions */ | ||
32 | |||
33 | #define PA0_AIN_SPI2_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0) | ||
34 | #define PA0_AF_ETMTRACESYNC (GPIO_PORTA | GPIO_AF | 0) | ||
35 | #define PA1_AOUT_SPI2_RXD (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 1) | ||
36 | #define PA1_PF_TIN (GPIO_PORTA | GPIO_PF | 1) | ||
37 | #define PA2_PF_PWM0 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 2) | ||
38 | #define PA3_PF_CSI_MCLK (GPIO_PORTA | GPIO_PF | 3) | ||
39 | #define PA4_PF_CSI_D0 (GPIO_PORTA | GPIO_PF | 4) | ||
40 | #define PA5_PF_CSI_D1 (GPIO_PORTA | GPIO_PF | 5) | ||
41 | #define PA6_PF_CSI_D2 (GPIO_PORTA | GPIO_PF | 6) | ||
42 | #define PA7_PF_CSI_D3 (GPIO_PORTA | GPIO_PF | 7) | ||
43 | #define PA8_PF_CSI_D4 (GPIO_PORTA | GPIO_PF | 8) | ||
44 | #define PA9_PF_CSI_D5 (GPIO_PORTA | GPIO_PF | 9) | ||
45 | #define PA10_PF_CSI_D6 (GPIO_PORTA | GPIO_PF | 10) | ||
46 | #define PA11_PF_CSI_D7 (GPIO_PORTA | GPIO_PF | 11) | ||
47 | #define PA12_PF_CSI_VSYNC (GPIO_PORTA | GPIO_PF | 12) | ||
48 | #define PA13_PF_CSI_HSYNC (GPIO_PORTA | GPIO_PF | 13) | ||
49 | #define PA14_PF_CSI_PIXCLK (GPIO_PORTA | GPIO_PF | 14) | ||
50 | #define PA15_PF_I2C_SDA (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15) | ||
51 | #define PA16_PF_I2C_SCL (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16) | ||
52 | #define PA17_AF_ETMTRACEPKT4 (GPIO_PORTA | GPIO_AF | 17) | ||
53 | #define PA17_AIN_SPI2_SS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17) | ||
54 | #define PA18_AF_ETMTRACEPKT5 (GPIO_PORTA | GPIO_AF | 18) | ||
55 | #define PA19_AF_ETMTRACEPKT6 (GPIO_PORTA | GPIO_AF | 19) | ||
56 | #define PA20_AF_ETMTRACEPKT7 (GPIO_PORTA | GPIO_AF | 20) | ||
57 | #define PA21_PF_A0 (GPIO_PORTA | GPIO_PF | 21) | ||
58 | #define PA22_PF_CS4 (GPIO_PORTA | GPIO_PF | 22) | ||
59 | #define PA23_PF_CS5 (GPIO_PORTA | GPIO_PF | 23) | ||
60 | #define PA24_PF_A16 (GPIO_PORTA | GPIO_PF | 24) | ||
61 | #define PA24_AF_ETMTRACEPKT0 (GPIO_PORTA | GPIO_AF | 24) | ||
62 | #define PA25_PF_A17 (GPIO_PORTA | GPIO_PF | 25) | ||
63 | #define PA25_AF_ETMTRACEPKT1 (GPIO_PORTA | GPIO_AF | 25) | ||
64 | #define PA26_PF_A18 (GPIO_PORTA | GPIO_PF | 26) | ||
65 | #define PA26_AF_ETMTRACEPKT2 (GPIO_PORTA | GPIO_AF | 26) | ||
66 | #define PA27_PF_A19 (GPIO_PORTA | GPIO_PF | 27) | ||
67 | #define PA27_AF_ETMTRACEPKT3 (GPIO_PORTA | GPIO_AF | 27) | ||
68 | #define PA28_PF_A20 (GPIO_PORTA | GPIO_PF | 28) | ||
69 | #define PA28_AF_ETMPIPESTAT0 (GPIO_PORTA | GPIO_AF | 28) | ||
70 | #define PA29_PF_A21 (GPIO_PORTA | GPIO_PF | 29) | ||
71 | #define PA29_AF_ETMPIPESTAT1 (GPIO_PORTA | GPIO_AF | 29) | ||
72 | #define PA30_PF_A22 (GPIO_PORTA | GPIO_PF | 30) | ||
73 | #define PA30_AF_ETMPIPESTAT2 (GPIO_PORTA | GPIO_AF | 30) | ||
74 | #define PA31_PF_A23 (GPIO_PORTA | GPIO_PF | 31) | ||
75 | #define PA31_AF_ETMTRACECLK (GPIO_PORTA | GPIO_AF | 31) | ||
76 | #define PB8_PF_SD_DAT0 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 8) | ||
77 | #define PB8_AF_MS_PIO (GPIO_PORTB | GPIO_AF | 8) | ||
78 | #define PB9_PF_SD_DAT1 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 9) | ||
79 | #define PB9_AF_MS_PI1 (GPIO_PORTB | GPIO_AF | 9) | ||
80 | #define PB10_PF_SD_DAT2 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 10) | ||
81 | #define PB10_AF_MS_SCLKI (GPIO_PORTB | GPIO_AF | 10) | ||
82 | #define PB11_PF_SD_DAT3 (GPIO_PORTB | GPIO_PF | 11) | ||
83 | #define PB11_AF_MS_SDIO (GPIO_PORTB | GPIO_AF | 11) | ||
84 | #define PB12_PF_SD_CLK (GPIO_PORTB | GPIO_PF | 12) | ||
85 | #define PB12_AF_MS_SCLK0 (GPIO_PORTB | GPIO_AF | 12) | ||
86 | #define PB13_PF_SD_CMD (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 13) | ||
87 | #define PB13_AF_MS_BS (GPIO_PORTB | GPIO_AF | 13) | ||
88 | #define PB14_AF_SSI_RXFS (GPIO_PORTB | GPIO_AF | 14) | ||
89 | #define PB15_AF_SSI_RXCLK (GPIO_PORTB | GPIO_AF | 15) | ||
90 | #define PB16_AF_SSI_RXDAT (GPIO_PORTB | GPIO_AF | GPIO_IN | 16) | ||
91 | #define PB17_AF_SSI_TXDAT (GPIO_PORTB | GPIO_AF | GPIO_OUT | 17) | ||
92 | #define PB18_AF_SSI_TXFS (GPIO_PORTB | GPIO_AF | 18) | ||
93 | #define PB19_AF_SSI_TXCLK (GPIO_PORTB | GPIO_AF | 19) | ||
94 | #define PB20_PF_USBD_AFE (GPIO_PORTB | GPIO_PF | 20) | ||
95 | #define PB21_PF_USBD_OE (GPIO_PORTB | GPIO_PF | 21) | ||
96 | #define PB22_PF_USBD_RCV (GPIO_PORTB | GPIO_PF | 22) | ||
97 | #define PB23_PF_USBD_SUSPND (GPIO_PORTB | GPIO_PF | 23) | ||
98 | #define PB24_PF_USBD_VP (GPIO_PORTB | GPIO_PF | 24) | ||
99 | #define PB25_PF_USBD_VM (GPIO_PORTB | GPIO_PF | 25) | ||
100 | #define PB26_PF_USBD_VPO (GPIO_PORTB | GPIO_PF | 26) | ||
101 | #define PB27_PF_USBD_VMO (GPIO_PORTB | GPIO_PF | 27) | ||
102 | #define PB28_PF_UART2_CTS (GPIO_PORTB | GPIO_PF | GPIO_OUT | 28) | ||
103 | #define PB29_PF_UART2_RTS (GPIO_PORTB | GPIO_PF | GPIO_IN | 29) | ||
104 | #define PB30_PF_UART2_TXD (GPIO_PORTB | GPIO_PF | GPIO_OUT | 30) | ||
105 | #define PB31_PF_UART2_RXD (GPIO_PORTB | GPIO_PF | GPIO_IN | 31) | ||
106 | #define PC3_PF_SSI_RXFS (GPIO_PORTC | GPIO_PF | 3) | ||
107 | #define PC4_PF_SSI_RXCLK (GPIO_PORTC | GPIO_PF | 4) | ||
108 | #define PC5_PF_SSI_RXDAT (GPIO_PORTC | GPIO_PF | GPIO_IN | 5) | ||
109 | #define PC6_PF_SSI_TXDAT (GPIO_PORTC | GPIO_PF | GPIO_OUT | 6) | ||
110 | #define PC7_PF_SSI_TXFS (GPIO_PORTC | GPIO_PF | 7) | ||
111 | #define PC8_PF_SSI_TXCLK (GPIO_PORTC | GPIO_PF | 8) | ||
112 | #define PC9_PF_UART1_CTS (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9) | ||
113 | #define PC10_PF_UART1_RTS (GPIO_PORTC | GPIO_PF | GPIO_IN | 10) | ||
114 | #define PC11_PF_UART1_TXD (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11) | ||
115 | #define PC12_PF_UART1_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 12) | ||
116 | #define PC13_PF_SPI1_SPI_RDY (GPIO_PORTC | GPIO_PF | 13) | ||
117 | #define PC14_PF_SPI1_SCLK (GPIO_PORTC | GPIO_PF | 14) | ||
118 | #define PC15_PF_SPI1_SS (GPIO_PORTC | GPIO_PF | 15) | ||
119 | #define PC16_PF_SPI1_MISO (GPIO_PORTC | GPIO_PF | 16) | ||
120 | #define PC17_PF_SPI1_MOSI (GPIO_PORTC | GPIO_PF | 17) | ||
121 | #define PC24_BIN_UART3_RI (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 24) | ||
122 | #define PC25_BIN_UART3_DSR (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 25) | ||
123 | #define PC26_AOUT_UART3_DTR (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 26) | ||
124 | #define PC27_BIN_UART3_DCD (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 27) | ||
125 | #define PC28_BIN_UART3_CTS (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 28) | ||
126 | #define PC29_AOUT_UART3_RTS (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 29) | ||
127 | #define PC30_BIN_UART3_TX (GPIO_PORTC | GPIO_BIN | 30) | ||
128 | #define PC31_AOUT_UART3_RX (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 31) | ||
129 | #define PD6_PF_LSCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 6) | ||
130 | #define PD7_PF_REV (GPIO_PORTD | GPIO_PF | 7) | ||
131 | #define PD7_AF_UART2_DTR (GPIO_PORTD | GPIO_AF | GPIO_IN | 7) | ||
132 | #define PD7_AIN_SPI2_SCLK (GPIO_PORTD | GPIO_AIN | 7) | ||
133 | #define PD8_PF_CLS (GPIO_PORTD | GPIO_PF | 8) | ||
134 | #define PD8_AF_UART2_DCD (GPIO_PORTD | GPIO_AF | GPIO_OUT | 8) | ||
135 | #define PD8_AIN_SPI2_SS (GPIO_PORTD | GPIO_AIN | 8) | ||
136 | #define PD9_PF_PS (GPIO_PORTD | GPIO_PF | 9) | ||
137 | #define PD9_AF_UART2_RI (GPIO_PORTD | GPIO_AF | GPIO_OUT | 9) | ||
138 | #define PD9_AOUT_SPI2_RXD (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 9) | ||
139 | #define PD10_PF_SPL_SPR (GPIO_PORTD | GPIO_PF | GPIO_OUT | 10) | ||
140 | #define PD10_AF_UART2_DSR (GPIO_PORTD | GPIO_AF | GPIO_OUT | 10) | ||
141 | #define PD10_AIN_SPI2_TXD (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 10) | ||
142 | #define PD11_PF_CONTRAST (GPIO_PORTD | GPIO_PF | GPIO_OUT | 11) | ||
143 | #define PD12_PF_ACD_OE (GPIO_PORTD | GPIO_PF | GPIO_OUT | 12) | ||
144 | #define PD13_PF_LP_HSYNC (GPIO_PORTD | GPIO_PF | GPIO_OUT | 13) | ||
145 | #define PD14_PF_FLM_VSYNC (GPIO_PORTD | GPIO_PF | GPIO_OUT | 14) | ||
146 | #define PD15_PF_LD0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 15) | ||
147 | #define PD16_PF_LD1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 16) | ||
148 | #define PD17_PF_LD2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) | ||
149 | #define PD18_PF_LD3 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) | ||
150 | #define PD19_PF_LD4 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19) | ||
151 | #define PD20_PF_LD5 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20) | ||
152 | #define PD21_PF_LD6 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21) | ||
153 | #define PD22_PF_LD7 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22) | ||
154 | #define PD23_PF_LD8 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 23) | ||
155 | #define PD24_PF_LD9 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24) | ||
156 | #define PD25_PF_LD10 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) | ||
157 | #define PD26_PF_LD11 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) | ||
158 | #define PD27_PF_LD12 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) | ||
159 | #define PD28_PF_LD13 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28) | ||
160 | #define PD29_PF_LD14 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29) | ||
161 | #define PD30_PF_LD15 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 30) | ||
162 | #define PD31_PF_TMR2OUT (GPIO_PORTD | GPIO_PF | 31) | ||
163 | #define PD31_BIN_SPI2_TXD (GPIO_PORTD | GPIO_BIN | 31) | ||
164 | |||
165 | |||
166 | #endif | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx21.h b/arch/arm/plat-mxc/include/mach/iomux-mx21.h index 63aaa972e27..1495dfda783 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx21.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx21.h | |||
@@ -1,126 +1,122 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> | 2 | * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or | 4 | * This program is free software; you can redistribute it and/or |
5 | * modify it under the terms of the GNU General Public License | 5 | * modify it under the terms of the GNU General Public License |
6 | * as published by the Free Software Foundation; either version 2 | 6 | * as published by the Free Software Foundation; either version 2 |
7 | * of the License, or (at your option) any later version. | 7 | * of the License, or (at your option) any later version. |
8 | * This program is distributed in the hope that it will be useful, | 8 | * This program is distributed in the hope that it will be useful, |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
11 | * GNU General Public License for more details. | 11 | * GNU General Public License for more details. |
12 | * | 12 | * |
13 | * You should have received a copy of the GNU General Public License | 13 | * You should have received a copy of the GNU General Public License |
14 | * along with this program; if not, write to the Free Software | 14 | * along with this program; if not, write to the Free Software |
15 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | 15 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
16 | * MA 02110-1301, USA. | 16 | * MA 02110-1301, USA. |
17 | */ | 17 | */ |
18 | 18 | #ifndef __MACH_IOMUX_MX21_H__ | |
19 | #ifndef _MXC_IOMUX_MX21_H | 19 | #define __MACH_IOMUX_MX21_H__ |
20 | #define _MXC_IOMUX_MX21_H | 20 | |
21 | 21 | #include <mach/iomux-mx2x.h> | |
22 | #ifndef GPIO_PORTA | 22 | #include <mach/iomux-v1.h> |
23 | #error Please include mach/iomux.h | ||
24 | #endif | ||
25 | |||
26 | 23 | ||
27 | /* Primary GPIO pin functions */ | 24 | /* Primary GPIO pin functions */ |
28 | 25 | ||
29 | #define PB22_PF_USBH1_BYP (GPIO_PORTB | GPIO_PF | 22) | 26 | #define PB22_PF_USBH1_BYP (GPIO_PORTB | GPIO_PF | 22) |
30 | #define PB25_PF_USBH1_ON (GPIO_PORTB | GPIO_PF | 25) | 27 | #define PB25_PF_USBH1_ON (GPIO_PORTB | GPIO_PF | 25) |
31 | #define PC5_PF_USBOTG_SDA (GPIO_PORTC | GPIO_PF | 5) | 28 | #define PC5_PF_USBOTG_SDA (GPIO_PORTC | GPIO_PF | 5) |
32 | #define PC6_PF_USBOTG_SCL (GPIO_PORTC | GPIO_PF | 6) | 29 | #define PC6_PF_USBOTG_SCL (GPIO_PORTC | GPIO_PF | 6) |
33 | #define PC7_PF_USBOTG_ON (GPIO_PORTC | GPIO_PF | 7) | 30 | #define PC7_PF_USBOTG_ON (GPIO_PORTC | GPIO_PF | 7) |
34 | #define PC8_PF_USBOTG_FS (GPIO_PORTC | GPIO_PF | 8) | 31 | #define PC8_PF_USBOTG_FS (GPIO_PORTC | GPIO_PF | 8) |
35 | #define PC9_PF_USBOTG_OE (GPIO_PORTC | GPIO_PF | 9) | 32 | #define PC9_PF_USBOTG_OE (GPIO_PORTC | GPIO_PF | 9) |
36 | #define PC10_PF_USBOTG_TXDM (GPIO_PORTC | GPIO_PF | 10) | 33 | #define PC10_PF_USBOTG_TXDM (GPIO_PORTC | GPIO_PF | 10) |
37 | #define PC11_PF_USBOTG_TXDP (GPIO_PORTC | GPIO_PF | 11) | 34 | #define PC11_PF_USBOTG_TXDP (GPIO_PORTC | GPIO_PF | 11) |
38 | #define PC12_PF_USBOTG_RXDM (GPIO_PORTC | GPIO_PF | 12) | 35 | #define PC12_PF_USBOTG_RXDM (GPIO_PORTC | GPIO_PF | 12) |
39 | #define PC13_PF_USBOTG_RXDP (GPIO_PORTC | GPIO_PF | 13) | 36 | #define PC13_PF_USBOTG_RXDP (GPIO_PORTC | GPIO_PF | 13) |
40 | #define PC16_PF_SAP_FS (GPIO_PORTC | GPIO_PF | 16) | 37 | #define PC16_PF_SAP_FS (GPIO_PORTC | GPIO_PF | 16) |
41 | #define PC17_PF_SAP_RXD (GPIO_PORTC | GPIO_PF | 17) | 38 | #define PC17_PF_SAP_RXD (GPIO_PORTC | GPIO_PF | 17) |
42 | #define PC18_PF_SAP_TXD (GPIO_PORTC | GPIO_PF | 18) | 39 | #define PC18_PF_SAP_TXD (GPIO_PORTC | GPIO_PF | 18) |
43 | #define PC19_PF_SAP_CLK (GPIO_PORTC | GPIO_PF | 19) | 40 | #define PC19_PF_SAP_CLK (GPIO_PORTC | GPIO_PF | 19) |
44 | #define PE0_PF_TEST_WB2 (GPIO_PORTE | GPIO_PF | 0) | 41 | #define PE0_PF_TEST_WB2 (GPIO_PORTE | GPIO_PF | 0) |
45 | #define PE1_PF_TEST_WB1 (GPIO_PORTE | GPIO_PF | 1) | 42 | #define PE1_PF_TEST_WB1 (GPIO_PORTE | GPIO_PF | 1) |
46 | #define PE2_PF_TEST_WB0 (GPIO_PORTE | GPIO_PF | 2) | 43 | #define PE2_PF_TEST_WB0 (GPIO_PORTE | GPIO_PF | 2) |
47 | #define PF1_PF_NFCE (GPIO_PORTF | GPIO_PF | 1) | 44 | #define PF1_PF_NFCE (GPIO_PORTF | GPIO_PF | 1) |
48 | #define PF3_PF_NFCLE (GPIO_PORTF | GPIO_PF | 3) | 45 | #define PF3_PF_NFCLE (GPIO_PORTF | GPIO_PF | 3) |
49 | #define PF7_PF_NFIO0 (GPIO_PORTF | GPIO_PF | 7) | 46 | #define PF7_PF_NFIO0 (GPIO_PORTF | GPIO_PF | 7) |
50 | #define PF8_PF_NFIO1 (GPIO_PORTF | GPIO_PF | 8) | 47 | #define PF8_PF_NFIO1 (GPIO_PORTF | GPIO_PF | 8) |
51 | #define PF9_PF_NFIO2 (GPIO_PORTF | GPIO_PF | 9) | 48 | #define PF9_PF_NFIO2 (GPIO_PORTF | GPIO_PF | 9) |
52 | #define PF10_PF_NFIO3 (GPIO_PORTF | GPIO_PF | 10) | 49 | #define PF10_PF_NFIO3 (GPIO_PORTF | GPIO_PF | 10) |
53 | #define PF11_PF_NFIO4 (GPIO_PORTF | GPIO_PF | 11) | 50 | #define PF11_PF_NFIO4 (GPIO_PORTF | GPIO_PF | 11) |
54 | #define PF12_PF_NFIO5 (GPIO_PORTF | GPIO_PF | 12) | 51 | #define PF12_PF_NFIO5 (GPIO_PORTF | GPIO_PF | 12) |
55 | #define PF13_PF_NFIO6 (GPIO_PORTF | GPIO_PF | 13) | 52 | #define PF13_PF_NFIO6 (GPIO_PORTF | GPIO_PF | 13) |
56 | #define PF14_PF_NFIO7 (GPIO_PORTF | GPIO_PF | 14) | 53 | #define PF14_PF_NFIO7 (GPIO_PORTF | GPIO_PF | 14) |
57 | #define PF16_PF_RES (GPIO_PORTF | GPIO_PF | 16) | 54 | #define PF16_PF_RES (GPIO_PORTF | GPIO_PF | 16) |
58 | 55 | ||
59 | /* Alternate GPIO pin functions */ | 56 | /* Alternate GPIO pin functions */ |
60 | 57 | ||
61 | #define PA5_AF_BMI_CLK_CS (GPIO_PORTA | GPIO_AF | 5) | 58 | #define PA5_AF_BMI_CLK_CS (GPIO_PORTA | GPIO_AF | 5) |
62 | #define PA6_AF_BMI_D0 (GPIO_PORTA | GPIO_AF | 6) | 59 | #define PA6_AF_BMI_D0 (GPIO_PORTA | GPIO_AF | 6) |
63 | #define PA7_AF_BMI_D1 (GPIO_PORTA | GPIO_AF | 7) | 60 | #define PA7_AF_BMI_D1 (GPIO_PORTA | GPIO_AF | 7) |
64 | #define PA8_AF_BMI_D2 (GPIO_PORTA | GPIO_AF | 8) | 61 | #define PA8_AF_BMI_D2 (GPIO_PORTA | GPIO_AF | 8) |
65 | #define PA9_AF_BMI_D3 (GPIO_PORTA | GPIO_AF | 9) | 62 | #define PA9_AF_BMI_D3 (GPIO_PORTA | GPIO_AF | 9) |
66 | #define PA10_AF_BMI_D4 (GPIO_PORTA | GPIO_AF | 10) | 63 | #define PA10_AF_BMI_D4 (GPIO_PORTA | GPIO_AF | 10) |
67 | #define PA11_AF_BMI_D5 (GPIO_PORTA | GPIO_AF | 11) | 64 | #define PA11_AF_BMI_D5 (GPIO_PORTA | GPIO_AF | 11) |
68 | #define PA12_AF_BMI_D6 (GPIO_PORTA | GPIO_AF | 12) | 65 | #define PA12_AF_BMI_D6 (GPIO_PORTA | GPIO_AF | 12) |
69 | #define PA13_AF_BMI_D7 (GPIO_PORTA | GPIO_AF | 13) | 66 | #define PA13_AF_BMI_D7 (GPIO_PORTA | GPIO_AF | 13) |
70 | #define PA14_AF_BMI_D8 (GPIO_PORTA | GPIO_AF | 14) | 67 | #define PA14_AF_BMI_D8 (GPIO_PORTA | GPIO_AF | 14) |
71 | #define PA15_AF_BMI_D9 (GPIO_PORTA | GPIO_AF | 15) | 68 | #define PA15_AF_BMI_D9 (GPIO_PORTA | GPIO_AF | 15) |
72 | #define PA16_AF_BMI_D10 (GPIO_PORTA | GPIO_AF | 16) | 69 | #define PA16_AF_BMI_D10 (GPIO_PORTA | GPIO_AF | 16) |
73 | #define PA17_AF_BMI_D11 (GPIO_PORTA | GPIO_AF | 17) | 70 | #define PA17_AF_BMI_D11 (GPIO_PORTA | GPIO_AF | 17) |
74 | #define PA18_AF_BMI_D12 (GPIO_PORTA | GPIO_AF | 18) | 71 | #define PA18_AF_BMI_D12 (GPIO_PORTA | GPIO_AF | 18) |
75 | #define PA19_AF_BMI_D13 (GPIO_PORTA | GPIO_AF | 19) | 72 | #define PA19_AF_BMI_D13 (GPIO_PORTA | GPIO_AF | 19) |
76 | #define PA20_AF_BMI_D14 (GPIO_PORTA | GPIO_AF | 20) | 73 | #define PA20_AF_BMI_D14 (GPIO_PORTA | GPIO_AF | 20) |
77 | #define PA21_AF_BMI_D15 (GPIO_PORTA | GPIO_AF | 21) | 74 | #define PA21_AF_BMI_D15 (GPIO_PORTA | GPIO_AF | 21) |
78 | #define PA22_AF_BMI_READ_REQ (GPIO_PORTA | GPIO_AF | 22) | 75 | #define PA22_AF_BMI_READ_REQ (GPIO_PORTA | GPIO_AF | 22) |
79 | #define PA23_AF_BMI_WRITE (GPIO_PORTA | GPIO_AF | 23) | 76 | #define PA23_AF_BMI_WRITE (GPIO_PORTA | GPIO_AF | 23) |
80 | #define PA29_AF_BMI_RX_FULL (GPIO_PORTA | GPIO_AF | 29) | 77 | #define PA29_AF_BMI_RX_FULL (GPIO_PORTA | GPIO_AF | 29) |
81 | #define PA30_AF_BMI_READ (GPIO_PORTA | GPIO_AF | 30) | 78 | #define PA30_AF_BMI_READ (GPIO_PORTA | GPIO_AF | 30) |
82 | 79 | ||
83 | /* AIN GPIO pin functions */ | 80 | /* AIN GPIO pin functions */ |
84 | 81 | ||
85 | #define PC14_AIN_SYS_CLK (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14) | 82 | #define PC14_AIN_SYS_CLK (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14) |
86 | #define PD21_AIN_USBH2_FS (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 21) | 83 | #define PD21_AIN_USBH2_FS (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 21) |
87 | #define PD22_AIN_USBH2_OE (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 22) | 84 | #define PD22_AIN_USBH2_OE (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 22) |
88 | #define PD23_AIN_USBH2_TXDM (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 23) | 85 | #define PD23_AIN_USBH2_TXDM (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 23) |
89 | #define PD24_AIN_USBH2_TXDP (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 24) | 86 | #define PD24_AIN_USBH2_TXDP (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 24) |
90 | #define PE8_AIN_IR_TXD (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 8) | 87 | #define PE8_AIN_IR_TXD (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 8) |
91 | #define PF0_AIN_PC_RST (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 0) | 88 | #define PF0_AIN_PC_RST (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 0) |
92 | #define PF1_AIN_PC_CE1 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 1) | 89 | #define PF1_AIN_PC_CE1 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 1) |
93 | #define PF2_AIN_PC_CE2 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 2) | 90 | #define PF2_AIN_PC_CE2 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 2) |
94 | #define PF3_AIN_PC_POE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 3) | 91 | #define PF3_AIN_PC_POE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 3) |
95 | #define PF4_AIN_PC_OE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 4) | 92 | #define PF4_AIN_PC_OE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 4) |
96 | #define PF5_AIN_PC_RW (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 5) | 93 | #define PF5_AIN_PC_RW (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 5) |
97 | 94 | ||
98 | /* BIN GPIO pin functions */ | 95 | /* BIN GPIO pin functions */ |
99 | 96 | ||
100 | #define PC14_BIN_SYS_CLK (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14) | 97 | #define PC14_BIN_SYS_CLK (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14) |
101 | #define PD27_BIN_EXT_DMA_GRANT (GPIO_PORTD | GPIO_BIN | GPIO_OUT | 27) | 98 | #define PD27_BIN_EXT_DMA_GRANT (GPIO_PORTD | GPIO_BIN | GPIO_OUT | 27) |
102 | 99 | ||
103 | /* CIN GPIO pin functions */ | 100 | /* CIN GPIO pin functions */ |
104 | 101 | ||
105 | #define PB26_CIN_USBH1_RXDAT (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 26) | 102 | #define PB26_CIN_USBH1_RXDAT (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 26) |
106 | 103 | ||
107 | /* AOUT GPIO pin functions */ | 104 | /* AOUT GPIO pin functions */ |
108 | 105 | ||
109 | #define PA29_AOUT_BMI_WAIT (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 29) | 106 | #define PA29_AOUT_BMI_WAIT (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 29) |
110 | #define PD19_AOUT_USBH2_RXDM (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 19) | 107 | #define PD19_AOUT_USBH2_RXDM (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 19) |
111 | #define PD20_AOUT_USBH2_RXDP (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 20) | 108 | #define PD20_AOUT_USBH2_RXDP (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 20) |
112 | #define PD25_AOUT_EXT_DMAREQ (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 25) | 109 | #define PD25_AOUT_EXT_DMAREQ (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 25) |
113 | #define PD26_AOUT_USBOTG_RXDAT (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 26) | 110 | #define PD26_AOUT_USBOTG_RXDAT (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 26) |
114 | #define PE9_AOUT_IR_RXD (GPIO_PORTE | GPIO_AOUT | GPIO_IN | 9) | 111 | #define PE9_AOUT_IR_RXD (GPIO_PORTE | GPIO_AOUT | GPIO_IN | 9) |
115 | #define PF6_AOUT_PC_BVD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 6) | 112 | #define PF6_AOUT_PC_BVD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 6) |
116 | #define PF7_AOUT_PC_BVD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 7) | 113 | #define PF7_AOUT_PC_BVD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 7) |
117 | #define PF8_AOUT_PC_VS2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 8) | 114 | #define PF8_AOUT_PC_VS2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 8) |
118 | #define PF9_AOUT_PC_VS1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 9) | 115 | #define PF9_AOUT_PC_VS1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 9) |
119 | #define PF10_AOUT_PC_WP (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 10) | 116 | #define PF10_AOUT_PC_WP (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 10) |
120 | #define PF11_AOUT_PC_READY (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 11) | 117 | #define PF11_AOUT_PC_READY (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 11) |
121 | #define PF12_AOUT_PC_WAIT (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 12) | 118 | #define PF12_AOUT_PC_WAIT (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 12) |
122 | #define PF13_AOUT_PC_CD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 13) | 119 | #define PF13_AOUT_PC_CD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 13) |
123 | #define PF14_AOUT_PC_CD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 14) | 120 | #define PF14_AOUT_PC_CD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 14) |
124 | 121 | ||
125 | 122 | #endif /* ifndef __MACH_IOMUX_MX21_H__ */ | |
126 | #endif | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h index 5418d52c4a9..f39220d1b67 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h | |||
@@ -7,7 +7,7 @@ | |||
7 | * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. | 7 | * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. |
8 | * and | 8 | * and |
9 | * arch/arm/plat-mxc/include/mach/iomux-mx35.h | 9 | * arch/arm/plat-mxc/include/mach/iomux-mx35.h |
10 | * Copyright (C, NO_PAD_CTRL) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de> | 10 | * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de> |
11 | * | 11 | * |
12 | * The code contained herein is licensed under the GNU General Public | 12 | * The code contained herein is licensed under the GNU General Public |
13 | * License. You may obtain a copy of the GNU General Public License | 13 | * License. You may obtain a copy of the GNU General Public License |
@@ -16,24 +16,11 @@ | |||
16 | * http://www.opensource.org/licenses/gpl-license.html | 16 | * http://www.opensource.org/licenses/gpl-license.html |
17 | * http://www.gnu.org/copyleft/gpl.html | 17 | * http://www.gnu.org/copyleft/gpl.html |
18 | */ | 18 | */ |
19 | #ifndef __IOMUX_MX25_H__ | 19 | #ifndef __MACH_IOMUX_MX25_H__ |
20 | #define __IOMUX_MX25_H__ | 20 | #define __MACH_IOMUX_MX25_H__ |
21 | 21 | ||
22 | #include <mach/iomux-v3.h> | 22 | #include <mach/iomux-v3.h> |
23 | 23 | ||
24 | #ifndef GPIO_PORTA | ||
25 | #error Please include mach/iomux.h | ||
26 | #endif | ||
27 | |||
28 | /* | ||
29 | * | ||
30 | * @brief MX25 I/O Pin List | ||
31 | * | ||
32 | * @ingroup GPIO_MX25 | ||
33 | */ | ||
34 | |||
35 | #ifndef __ASSEMBLY__ | ||
36 | |||
37 | /* | 24 | /* |
38 | * IOMUX/PAD Bit field definitions | 25 | * IOMUX/PAD Bit field definitions |
39 | */ | 26 | */ |
@@ -515,5 +502,4 @@ | |||
515 | #define MX25_PAD_CTL_GRP_DVS_SDHC1 IOMUX_PAD(0x458, 0x000, 0, 0, 0, NO_PAD_CTRL) | 502 | #define MX25_PAD_CTL_GRP_DVS_SDHC1 IOMUX_PAD(0x458, 0x000, 0, 0, 0, NO_PAD_CTRL) |
516 | #define MX25_PAD_CTL_GRP_DVS_LCD IOMUX_PAD(0x45c, 0x000, 0, 0, 0, NO_PAD_CTRL) | 503 | #define MX25_PAD_CTL_GRP_DVS_LCD IOMUX_PAD(0x45c, 0x000, 0, 0, 0, NO_PAD_CTRL) |
517 | 504 | ||
518 | #endif // __ASSEMBLY__ | 505 | #endif /* __MACH_IOMUX_MX25_H__ */ |
519 | #endif // __IOMUX_MX25_H__ | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx27.h b/arch/arm/plat-mxc/include/mach/iomux-mx27.h index 5ac158b70f6..d9f9a6e32d8 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx27.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx27.h | |||
@@ -1,207 +1,205 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> | 2 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> |
3 | * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> | 3 | * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or | 5 | * This program is free software; you can redistribute it and/or |
6 | * modify it under the terms of the GNU General Public License | 6 | * modify it under the terms of the GNU General Public License |
7 | * as published by the Free Software Foundation; either version 2 | 7 | * as published by the Free Software Foundation; either version 2 |
8 | * of the License, or (at your option) any later version. | 8 | * of the License, or (at your option) any later version. |
9 | * This program is distributed in the hope that it will be useful, | 9 | * This program is distributed in the hope that it will be useful, |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
12 | * GNU General Public License for more details. | 12 | * GNU General Public License for more details. |
13 | * | 13 | * |
14 | * You should have received a copy of the GNU General Public License | 14 | * You should have received a copy of the GNU General Public License |
15 | * along with this program; if not, write to the Free Software | 15 | * along with this program; if not, write to the Free Software |
16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
17 | * MA 02110-1301, USA. | 17 | * MA 02110-1301, USA. |
18 | */ | 18 | */ |
19 | 19 | #ifndef __MACH_IOMUX_MX27_H__ | |
20 | #ifndef _MXC_IOMUX_MX27_H | 20 | #define __MACH_IOMUX_MX27_H__ |
21 | #define _MXC_IOMUX_MX27_H | 21 | |
22 | 22 | #include <mach/iomux-mx2x.h> | |
23 | #ifndef GPIO_PORTA | 23 | #include <mach/iomux-v1.h> |
24 | #error Please include mach/iomux.h | ||
25 | #endif | ||
26 | |||
27 | 24 | ||
28 | /* Primary GPIO pin functions */ | 25 | /* Primary GPIO pin functions */ |
29 | 26 | ||
30 | #define PA0_PF_USBH2_CLK (GPIO_PORTA | GPIO_PF | 0) | 27 | #define PA0_PF_USBH2_CLK (GPIO_PORTA | GPIO_PF | 0) |
31 | #define PA1_PF_USBH2_DIR (GPIO_PORTA | GPIO_PF | 1) | 28 | #define PA1_PF_USBH2_DIR (GPIO_PORTA | GPIO_PF | 1) |
32 | #define PA2_PF_USBH2_DATA7 (GPIO_PORTA | GPIO_PF | 2) | 29 | #define PA2_PF_USBH2_DATA7 (GPIO_PORTA | GPIO_PF | 2) |
33 | #define PA3_PF_USBH2_NXT (GPIO_PORTA | GPIO_PF | 3) | 30 | #define PA3_PF_USBH2_NXT (GPIO_PORTA | GPIO_PF | 3) |
34 | #define PA4_PF_USBH2_STP (GPIO_PORTA | GPIO_PF | 4) | 31 | #define PA4_PF_USBH2_STP (GPIO_PORTA | GPIO_PF | 4) |
35 | #define PB22_PF_USBH1_SUSP (GPIO_PORTB | GPIO_PF | 22) | 32 | #define PB22_PF_USBH1_SUSP (GPIO_PORTB | GPIO_PF | 22) |
36 | #define PB25_PF_USBH1_RCV (GPIO_PORTB | GPIO_PF | 25) | 33 | #define PB25_PF_USBH1_RCV (GPIO_PORTB | GPIO_PF | 25) |
37 | #define PC5_PF_I2C2_SDA (GPIO_PORTC | GPIO_PF | GPIO_IN | 5) | 34 | #define PC5_PF_I2C2_SDA (GPIO_PORTC | GPIO_PF | GPIO_IN | 5) |
38 | #define PC6_PF_I2C2_SCL (GPIO_PORTC | GPIO_PF | GPIO_IN | 6) | 35 | #define PC6_PF_I2C2_SCL (GPIO_PORTC | GPIO_PF | GPIO_IN | 6) |
39 | #define PC7_PF_USBOTG_DATA5 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 7) | 36 | #define PC7_PF_USBOTG_DATA5 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 7) |
40 | #define PC8_PF_USBOTG_DATA6 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 8) | 37 | #define PC8_PF_USBOTG_DATA6 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 8) |
41 | #define PC9_PF_USBOTG_DATA0 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9) | 38 | #define PC9_PF_USBOTG_DATA0 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9) |
42 | #define PC10_PF_USBOTG_DATA2 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 10) | 39 | #define PC10_PF_USBOTG_DATA2 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 10) |
43 | #define PC11_PF_USBOTG_DATA1 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11) | 40 | #define PC11_PF_USBOTG_DATA1 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11) |
44 | #define PC12_PF_USBOTG_DATA4 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 12) | 41 | #define PC12_PF_USBOTG_DATA4 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 12) |
45 | #define PC13_PF_USBOTG_DATA3 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 13) | 42 | #define PC13_PF_USBOTG_DATA3 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 13) |
46 | #define PC16_PF_SSI4_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 16) | 43 | #define PC16_PF_SSI4_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 16) |
47 | #define PC17_PF_SSI4_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 17) | 44 | #define PC17_PF_SSI4_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 17) |
48 | #define PC18_PF_SSI4_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 18) | 45 | #define PC18_PF_SSI4_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 18) |
49 | #define PC19_PF_SSI4_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 19) | 46 | #define PC19_PF_SSI4_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 19) |
50 | #define PC25_AF_GPT5_TIN (GPIO_PORTC | GPIO_AF | 25) | 47 | #define PD0_PF_SD3_CMD (GPIO_PORTD | GPIO_PF | 0) |
51 | #define PC27_AF_GPT4_TIN (GPIO_PORTC | GPIO_AF | 27) | 48 | #define PD1_PF_SD3_CLK (GPIO_PORTD | GPIO_PF | 1) |
52 | #define PD0_PF_SD3_CMD (GPIO_PORTD | GPIO_PF | 0) | 49 | #define PD2_PF_ATA_DATA0 (GPIO_PORTD | GPIO_PF | 2) |
53 | #define PD1_PF_SD3_CLK (GPIO_PORTD | GPIO_PF | 1) | 50 | #define PD3_PF_ATA_DATA1 (GPIO_PORTD | GPIO_PF | 3) |
54 | #define PD2_PF_ATA_DATA0 (GPIO_PORTD | GPIO_PF | 2) | 51 | #define PD4_PF_ATA_DATA2 (GPIO_PORTD | GPIO_PF | 4) |
55 | #define PD3_PF_ATA_DATA1 (GPIO_PORTD | GPIO_PF | 3) | 52 | #define PD5_PF_ATA_DATA3 (GPIO_PORTD | GPIO_PF | 5) |
56 | #define PD4_PF_ATA_DATA2 (GPIO_PORTD | GPIO_PF | 4) | 53 | #define PD6_PF_ATA_DATA4 (GPIO_PORTD | GPIO_PF | 6) |
57 | #define PD5_PF_ATA_DATA3 (GPIO_PORTD | GPIO_PF | 5) | 54 | #define PD7_PF_ATA_DATA5 (GPIO_PORTD | GPIO_PF | 7) |
58 | #define PD6_PF_ATA_DATA4 (GPIO_PORTD | GPIO_PF | 6) | 55 | #define PD8_PF_ATA_DATA6 (GPIO_PORTD | GPIO_PF | 8) |
59 | #define PD7_PF_ATA_DATA5 (GPIO_PORTD | GPIO_PF | 7) | 56 | #define PD9_PF_ATA_DATA7 (GPIO_PORTD | GPIO_PF | 9) |
60 | #define PD8_PF_ATA_DATA6 (GPIO_PORTD | GPIO_PF | 8) | 57 | #define PD10_PF_ATA_DATA8 (GPIO_PORTD | GPIO_PF | 10) |
61 | #define PD9_PF_ATA_DATA7 (GPIO_PORTD | GPIO_PF | 9) | 58 | #define PD11_PF_ATA_DATA9 (GPIO_PORTD | GPIO_PF | 11) |
62 | #define PD10_PF_ATA_DATA8 (GPIO_PORTD | GPIO_PF | 10) | 59 | #define PD12_PF_ATA_DATA10 (GPIO_PORTD | GPIO_PF | 12) |
63 | #define PD11_PF_ATA_DATA9 (GPIO_PORTD | GPIO_PF | 11) | 60 | #define PD13_PF_ATA_DATA11 (GPIO_PORTD | GPIO_PF | 13) |
64 | #define PD12_PF_ATA_DATA10 (GPIO_PORTD | GPIO_PF | 12) | 61 | #define PD14_PF_ATA_DATA12 (GPIO_PORTD | GPIO_PF | 14) |
65 | #define PD13_PF_ATA_DATA11 (GPIO_PORTD | GPIO_PF | 13) | 62 | #define PD15_PF_ATA_DATA13 (GPIO_PORTD | GPIO_PF | 15) |
66 | #define PD14_PF_ATA_DATA12 (GPIO_PORTD | GPIO_PF | 14) | 63 | #define PD16_PF_ATA_DATA14 (GPIO_PORTD | GPIO_PF | 16) |
67 | #define PD15_PF_ATA_DATA13 (GPIO_PORTD | GPIO_PF | 15) | 64 | #define PE0_PF_USBOTG_NXT (GPIO_PORTE | GPIO_PF | GPIO_OUT | 0) |
68 | #define PD16_PF_ATA_DATA14 (GPIO_PORTD | GPIO_PF | 16) | 65 | #define PE1_PF_USBOTG_STP (GPIO_PORTE | GPIO_PF | GPIO_OUT | 1) |
69 | #define PE0_PF_USBOTG_NXT (GPIO_PORTE | GPIO_PF | GPIO_OUT | 0) | 66 | #define PE2_PF_USBOTG_DIR (GPIO_PORTE | GPIO_PF | GPIO_OUT | 2) |
70 | #define PE1_PF_USBOTG_STP (GPIO_PORTE | GPIO_PF | GPIO_OUT | 1) | 67 | #define PE24_PF_USBOTG_CLK (GPIO_PORTE | GPIO_PF | GPIO_OUT | 24) |
71 | #define PE2_PF_USBOTG_DIR (GPIO_PORTE | GPIO_PF | GPIO_OUT | 2) | 68 | #define PE25_PF_USBOTG_DATA7 (GPIO_PORTE | GPIO_PF | GPIO_OUT | 25) |
72 | #define PE24_PF_USBOTG_CLK (GPIO_PORTE | GPIO_PF | GPIO_OUT | 24) | 69 | #define PF1_PF_NFCLE (GPIO_PORTF | GPIO_PF | 1) |
73 | #define PE25_PF_USBOTG_DATA7 (GPIO_PORTE | GPIO_PF | GPIO_OUT | 25) | 70 | #define PF3_PF_NFCE (GPIO_PORTF | GPIO_PF | 3) |
74 | #define PF1_PF_NFCLE (GPIO_PORTF | GPIO_PF | 1) | 71 | #define PF7_PF_PC_POE (GPIO_PORTF | GPIO_PF | 7) |
75 | #define PF3_PF_NFCE (GPIO_PORTF | GPIO_PF | 3) | 72 | #define PF8_PF_PC_RW (GPIO_PORTF | GPIO_PF | 8) |
76 | #define PF7_PF_PC_POE (GPIO_PORTF | GPIO_PF | 7) | 73 | #define PF9_PF_PC_IOIS16 (GPIO_PORTF | GPIO_PF | 9) |
77 | #define PF8_PF_PC_RW (GPIO_PORTF | GPIO_PF | 8) | 74 | #define PF10_PF_PC_RST (GPIO_PORTF | GPIO_PF | 10) |
78 | #define PF9_PF_PC_IOIS16 (GPIO_PORTF | GPIO_PF | 9) | 75 | #define PF11_PF_PC_BVD2 (GPIO_PORTF | GPIO_PF | 11) |
79 | #define PF10_PF_PC_RST (GPIO_PORTF | GPIO_PF | 10) | 76 | #define PF12_PF_PC_BVD1 (GPIO_PORTF | GPIO_PF | 12) |
80 | #define PF11_PF_PC_BVD2 (GPIO_PORTF | GPIO_PF | 11) | 77 | #define PF13_PF_PC_VS2 (GPIO_PORTF | GPIO_PF | 13) |
81 | #define PF12_PF_PC_BVD1 (GPIO_PORTF | GPIO_PF | 12) | 78 | #define PF14_PF_PC_VS1 (GPIO_PORTF | GPIO_PF | 14) |
82 | #define PF13_PF_PC_VS2 (GPIO_PORTF | GPIO_PF | 13) | 79 | #define PF16_PF_PC_PWRON (GPIO_PORTF | GPIO_PF | 16) |
83 | #define PF14_PF_PC_VS1 (GPIO_PORTF | GPIO_PF | 14) | 80 | #define PF17_PF_PC_READY (GPIO_PORTF | GPIO_PF | 17) |
84 | #define PF16_PF_PC_PWRON (GPIO_PORTF | GPIO_PF | 16) | 81 | #define PF18_PF_PC_WAIT (GPIO_PORTF | GPIO_PF | 18) |
85 | #define PF17_PF_PC_READY (GPIO_PORTF | GPIO_PF | 17) | 82 | #define PF19_PF_PC_CD2 (GPIO_PORTF | GPIO_PF | 19) |
86 | #define PF18_PF_PC_WAIT (GPIO_PORTF | GPIO_PF | 18) | 83 | #define PF20_PF_PC_CD1 (GPIO_PORTF | GPIO_PF | 20) |
87 | #define PF19_PF_PC_CD2 (GPIO_PORTF | GPIO_PF | 19) | 84 | #define PF23_PF_ATA_DATA15 (GPIO_PORTF | GPIO_PF | 23) |
88 | #define PF20_PF_PC_CD1 (GPIO_PORTF | GPIO_PF | 20) | ||
89 | #define PF23_PF_ATA_DATA15 (GPIO_PORTF | GPIO_PF | 23) | ||
90 | 85 | ||
91 | /* Alternate GPIO pin functions */ | 86 | /* Alternate GPIO pin functions */ |
92 | 87 | ||
93 | #define PB4_AF_MSHC_DATA0 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 4) | 88 | #define PB4_AF_MSHC_DATA0 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 4) |
94 | #define PB5_AF_MSHC_DATA1 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 5) | 89 | #define PB5_AF_MSHC_DATA1 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 5) |
95 | #define PB6_AF_MSHC_DATA2 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 6) | 90 | #define PB6_AF_MSHC_DATA2 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 6) |
96 | #define PB7_AF_MSHC_DATA4 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 7) | 91 | #define PB7_AF_MSHC_DATA4 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 7) |
97 | #define PB8_AF_MSHC_BS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 8) | 92 | #define PB8_AF_MSHC_BS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 8) |
98 | #define PB9_AF_MSHC_SCLK (GPIO_PORTB | GPIO_AF | GPIO_OUT | 9) | 93 | #define PB9_AF_MSHC_SCLK (GPIO_PORTB | GPIO_AF | GPIO_OUT | 9) |
99 | #define PB10_AF_UART6_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 10) | 94 | #define PB10_AF_UART6_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 10) |
100 | #define PB11_AF_UART6_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 11) | 95 | #define PB11_AF_UART6_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 11) |
101 | #define PB12_AF_UART6_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 12) | 96 | #define PB12_AF_UART6_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 12) |
102 | #define PB13_AF_UART6_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 13) | 97 | #define PB13_AF_UART6_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 13) |
103 | #define PB18_AF_UART5_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 18) | 98 | #define PB18_AF_UART5_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 18) |
104 | #define PB19_AF_UART5_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 19) | 99 | #define PB19_AF_UART5_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 19) |
105 | #define PB20_AF_UART5_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 20) | 100 | #define PB20_AF_UART5_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 20) |
106 | #define PB21_AF_UART5_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 21) | 101 | #define PB21_AF_UART5_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 21) |
107 | #define PC8_AF_FEC_MDIO (GPIO_PORTC | GPIO_AF | GPIO_IN | 8) | 102 | #define PC8_AF_FEC_MDIO (GPIO_PORTC | GPIO_AF | GPIO_IN | 8) |
108 | #define PC24_AF_GPT5_TOUT (GPIO_PORTC | GPIO_AF | 24) | 103 | #define PC24_AF_GPT5_TOUT (GPIO_PORTC | GPIO_AF | 24) |
109 | #define PC26_AF_GPT4_TOUT (GPIO_PORTC | GPIO_AF | 26) | 104 | #define PC25_AF_GPT5_TIN (GPIO_PORTC | GPIO_AF | 25) |
110 | #define PD1_AF_ETMTRACE_PKT15 (GPIO_PORTD | GPIO_AF | 1) | 105 | #define PC26_AF_GPT4_TOUT (GPIO_PORTC | GPIO_AF | 26) |
111 | #define PD6_AF_ETMTRACE_PKT14 (GPIO_PORTD | GPIO_AF | 6) | 106 | #define PC27_AF_GPT4_TIN (GPIO_PORTC | GPIO_AF | 27) |
112 | #define PD7_AF_ETMTRACE_PKT13 (GPIO_PORTD | GPIO_AF | 7) | 107 | #define PD1_AF_ETMTRACE_PKT15 (GPIO_PORTD | GPIO_AF | 1) |
113 | #define PD9_AF_ETMTRACE_PKT12 (GPIO_PORTD | GPIO_AF | 9) | 108 | #define PD6_AF_ETMTRACE_PKT14 (GPIO_PORTD | GPIO_AF | 6) |
114 | #define PD2_AF_SD3_D0 (GPIO_PORTD | GPIO_AF | 2) | 109 | #define PD7_AF_ETMTRACE_PKT13 (GPIO_PORTD | GPIO_AF | 7) |
115 | #define PD3_AF_SD3_D1 (GPIO_PORTD | GPIO_AF | 3) | 110 | #define PD9_AF_ETMTRACE_PKT12 (GPIO_PORTD | GPIO_AF | 9) |
116 | #define PD4_AF_SD3_D2 (GPIO_PORTD | GPIO_AF | 4) | 111 | #define PD2_AF_SD3_D0 (GPIO_PORTD | GPIO_AF | 2) |
117 | #define PD5_AF_SD3_D3 (GPIO_PORTD | GPIO_AF | 5) | 112 | #define PD3_AF_SD3_D1 (GPIO_PORTD | GPIO_AF | 3) |
118 | #define PD8_AF_FEC_MDIO (GPIO_PORTD | GPIO_AF | GPIO_IN | 8) | 113 | #define PD4_AF_SD3_D2 (GPIO_PORTD | GPIO_AF | 4) |
119 | #define PD10_AF_ETMTRACE_PKT11 (GPIO_PORTD | GPIO_AF | 10) | 114 | #define PD5_AF_SD3_D3 (GPIO_PORTD | GPIO_AF | 5) |
120 | #define PD11_AF_ETMTRACE_PKT10 (GPIO_PORTD | GPIO_AF | 11) | 115 | #define PD8_AF_FEC_MDIO (GPIO_PORTD | GPIO_AF | GPIO_IN | 8) |
121 | #define PD12_AF_ETMTRACE_PKT9 (GPIO_PORTD | GPIO_AF | 12) | 116 | #define PD10_AF_ETMTRACE_PKT11 (GPIO_PORTD | GPIO_AF | 10) |
122 | #define PD13_AF_ETMTRACE_PKT8 (GPIO_PORTD | GPIO_AF | 13) | 117 | #define PD11_AF_ETMTRACE_PKT10 (GPIO_PORTD | GPIO_AF | 11) |
123 | #define PD14_AF_ETMTRACE_PKT7 (GPIO_PORTD | GPIO_AF | 14) | 118 | #define PD12_AF_ETMTRACE_PKT9 (GPIO_PORTD | GPIO_AF | 12) |
124 | #define PD15_AF_ETMTRACE_PKT6 (GPIO_PORTD | GPIO_AF | 15) | 119 | #define PD13_AF_ETMTRACE_PKT8 (GPIO_PORTD | GPIO_AF | 13) |
125 | #define PD16_AF_ETMTRACE_PKT5 (GPIO_PORTD | GPIO_AF | 16) | 120 | #define PD14_AF_ETMTRACE_PKT7 (GPIO_PORTD | GPIO_AF | 14) |
126 | #define PF1_AF_ETMTRACE_PKT0 (GPIO_PORTF | GPIO_AF | 1) | 121 | #define PD15_AF_ETMTRACE_PKT6 (GPIO_PORTD | GPIO_AF | 15) |
127 | #define PF3_AF_ETMTRACE_PKT2 (GPIO_PORTF | GPIO_AF | 3) | 122 | #define PD16_AF_ETMTRACE_PKT5 (GPIO_PORTD | GPIO_AF | 16) |
128 | #define PF5_AF_ETMPIPESTAT11 (GPIO_PORTF | GPIO_AF | 5) | 123 | #define PF1_AF_ETMTRACE_PKT0 (GPIO_PORTF | GPIO_AF | 1) |
129 | #define PF7_AF_ATA_BUFFER_EN (GPIO_PORTF | GPIO_AF | 7) | 124 | #define PF3_AF_ETMTRACE_PKT2 (GPIO_PORTF | GPIO_AF | 3) |
130 | #define PF8_AF_ATA_IORDY (GPIO_PORTF | GPIO_AF | 8) | 125 | #define PF5_AF_ETMPIPESTAT11 (GPIO_PORTF | GPIO_AF | 5) |
131 | #define PF9_AF_ATA_INTRQ (GPIO_PORTF | GPIO_AF | 9) | 126 | #define PF7_AF_ATA_BUFFER_EN (GPIO_PORTF | GPIO_AF | 7) |
132 | #define PF10_AF_ATA_RESET (GPIO_PORTF | GPIO_AF | 10) | 127 | #define PF8_AF_ATA_IORDY (GPIO_PORTF | GPIO_AF | 8) |
133 | #define PF11_AF_ATA_DMACK (GPIO_PORTF | GPIO_AF | 11) | 128 | #define PF9_AF_ATA_INTRQ (GPIO_PORTF | GPIO_AF | 9) |
134 | #define PF12_AF_ATA_DMAREQ (GPIO_PORTF | GPIO_AF | 12) | 129 | #define PF10_AF_ATA_RESET (GPIO_PORTF | GPIO_AF | 10) |
135 | #define PF13_AF_ATA_DA0 (GPIO_PORTF | GPIO_AF | 13) | 130 | #define PF11_AF_ATA_DMACK (GPIO_PORTF | GPIO_AF | 11) |
136 | #define PF14_AF_ATA_DA1 (GPIO_PORTF | GPIO_AF | 14) | 131 | #define PF12_AF_ATA_DMAREQ (GPIO_PORTF | GPIO_AF | 12) |
137 | #define PF15_AF_ETMTRACE_SYNC (GPIO_PORTF | GPIO_AF | 15) | 132 | #define PF13_AF_ATA_DA0 (GPIO_PORTF | GPIO_AF | 13) |
138 | #define PF16_AF_ATA_DA2 (GPIO_PORTF | GPIO_AF | 16) | 133 | #define PF14_AF_ATA_DA1 (GPIO_PORTF | GPIO_AF | 14) |
139 | #define PF17_AF_ATA_CS0 (GPIO_PORTF | GPIO_AF | 17) | 134 | #define PF15_AF_ETMTRACE_SYNC (GPIO_PORTF | GPIO_AF | 15) |
140 | #define PF18_AF_ATA_CS1 (GPIO_PORTF | GPIO_AF | 18) | 135 | #define PF16_AF_ATA_DA2 (GPIO_PORTF | GPIO_AF | 16) |
141 | #define PF19_AF_ATA_DIOW (GPIO_PORTF | GPIO_AF | 19) | 136 | #define PF17_AF_ATA_CS0 (GPIO_PORTF | GPIO_AF | 17) |
142 | #define PF20_AF_ATA_DIOR (GPIO_PORTF | GPIO_AF | 20) | 137 | #define PF18_AF_ATA_CS1 (GPIO_PORTF | GPIO_AF | 18) |
143 | #define PF22_AF_ETMTRACE_CLK (GPIO_PORTF | GPIO_AF | 22) | 138 | #define PF19_AF_ATA_DIOW (GPIO_PORTF | GPIO_AF | 19) |
144 | #define PF23_AF_ETMTRACE_PKT4 (GPIO_PORTF | GPIO_AF | 23) | 139 | #define PF20_AF_ATA_DIOR (GPIO_PORTF | GPIO_AF | 20) |
140 | #define PF22_AF_ETMTRACE_CLK (GPIO_PORTF | GPIO_AF | 22) | ||
141 | #define PF23_AF_ETMTRACE_PKT4 (GPIO_PORTF | GPIO_AF | 23) | ||
145 | 142 | ||
146 | /* AIN GPIO pin functions */ | 143 | /* AIN GPIO pin functions */ |
147 | 144 | ||
148 | #define PC14_AIN_SSI1_MCLK (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14) | 145 | #define PC14_AIN_SSI1_MCLK (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14) |
149 | #define PC15_AIN_GPT6_TOUT (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 15) | 146 | #define PC15_AIN_GPT6_TOUT (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 15) |
150 | #define PD0_AIN_FEC_TXD0 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 0) | 147 | #define PD0_AIN_FEC_TXD0 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 0) |
151 | #define PD1_AIN_FEC_TXD1 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 1) | 148 | #define PD1_AIN_FEC_TXD1 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 1) |
152 | #define PD2_AIN_FEC_TXD2 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 2) | 149 | #define PD2_AIN_FEC_TXD2 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 2) |
153 | #define PD3_AIN_FEC_TXD3 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 3) | 150 | #define PD3_AIN_FEC_TXD3 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 3) |
154 | #define PD9_AIN_FEC_MDC (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 9) | 151 | #define PD9_AIN_FEC_MDC (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 9) |
155 | #define PD16_AIN_FEC_TX_ER (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 16) | 152 | #define PD16_AIN_FEC_TX_ER (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 16) |
156 | #define PD27_AIN_EXT_DMA_GRANT (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 27) | 153 | #define PD27_AIN_EXT_DMA_GRANT (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 27) |
157 | #define PF23_AIN_FEC_TX_EN (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 23) | 154 | #define PF23_AIN_FEC_TX_EN (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 23) |
158 | 155 | ||
159 | /* BIN GPIO pin functions */ | 156 | /* BIN GPIO pin functions */ |
160 | 157 | ||
161 | #define PC14_BIN_SSI2_MCLK (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14) | 158 | #define PC14_BIN_SSI2_MCLK (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14) |
162 | 159 | ||
163 | /* CIN GPIO pin functions */ | 160 | /* CIN GPIO pin functions */ |
164 | 161 | ||
165 | #define PD2_CIN_SLCDC1_DAT0 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 2) | 162 | #define PD2_CIN_SLCDC1_DAT0 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 2) |
166 | #define PD3_CIN_SLCDC1_DAT1 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 3) | 163 | #define PD3_CIN_SLCDC1_DAT1 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 3) |
167 | #define PD4_CIN_SLCDC1_DAT2 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 4) | 164 | #define PD4_CIN_SLCDC1_DAT2 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 4) |
168 | #define PD5_CIN_SLCDC1_DAT3 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 5) | 165 | #define PD5_CIN_SLCDC1_DAT3 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 5) |
169 | #define PD6_CIN_SLCDC1_DAT4 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 6) | 166 | #define PD6_CIN_SLCDC1_DAT4 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 6) |
170 | #define PD7_CIN_SLCDC1_DAT5 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 7) | 167 | #define PD7_CIN_SLCDC1_DAT5 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 7) |
171 | #define PD8_CIN_SLCDC1_DAT6 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 8) | 168 | #define PD8_CIN_SLCDC1_DAT6 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 8) |
172 | #define PD9_CIN_SLCDC1_DAT7 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 9) | 169 | #define PD9_CIN_SLCDC1_DAT7 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 9) |
173 | #define PD10_CIN_SLCDC1_DAT8 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 10) | 170 | #define PD10_CIN_SLCDC1_DAT8 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 10) |
174 | #define PD11_CIN_SLCDC1_DAT9 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 11) | 171 | #define PD11_CIN_SLCDC1_DAT9 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 11) |
175 | #define PD12_CIN_SLCDC1_DAT10 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 12) | 172 | #define PD12_CIN_SLCDC1_DAT10 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 12) |
176 | #define PD13_CIN_SLCDC1_DAT11 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 13) | 173 | #define PD13_CIN_SLCDC1_DAT11 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 13) |
177 | #define PD14_CIN_SLCDC1_DAT12 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 14) | 174 | #define PD14_CIN_SLCDC1_DAT12 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 14) |
178 | #define PD15_CIN_SLCDC1_DAT13 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 15) | 175 | #define PD15_CIN_SLCDC1_DAT13 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 15) |
179 | #define PD16_CIN_SLCDC1_DAT14 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 16) | 176 | #define PD16_CIN_SLCDC1_DAT14 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 16) |
180 | #define PD23_CIN_SLCDC1_DAT15 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 23) | 177 | #define PD23_CIN_SLCDC1_DAT15 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 23) |
181 | #define PF27_CIN_EXT_DMA_GRANT (GPIO_PORTF | GPIO_CIN | GPIO_OUT | 27) | 178 | #define PF27_CIN_EXT_DMA_GRANT (GPIO_PORTF | GPIO_CIN | GPIO_OUT | 27) |
182 | /* LCDC_TESTx on PBxx omitted, because it's not clear what they do */ | 179 | /* LCDC_TESTx on PBxx omitted, because it's not clear what they do */ |
183 | 180 | ||
184 | /* AOUT GPIO pin functions */ | 181 | /* AOUT GPIO pin functions */ |
185 | 182 | ||
186 | #define PC14_AOUT_GPT6_TIN (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 14) | 183 | #define PC14_AOUT_GPT6_TIN (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 14) |
187 | #define PD4_AOUT_FEC_RX_ER (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 4) | 184 | #define PD4_AOUT_FEC_RX_ER (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 4) |
188 | #define PD5_AOUT_FEC_RXD1 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 5) | 185 | #define PD5_AOUT_FEC_RXD1 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 5) |
189 | #define PD6_AOUT_FEC_RXD2 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 6) | 186 | #define PD6_AOUT_FEC_RXD2 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 6) |
190 | #define PD7_AOUT_FEC_RXD3 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 7) | 187 | #define PD7_AOUT_FEC_RXD3 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 7) |
191 | #define PD10_AOUT_FEC_CRS (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 10) | 188 | #define PD10_AOUT_FEC_CRS (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 10) |
192 | #define PD11_AOUT_FEC_TX_CLK (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 11) | 189 | #define PD11_AOUT_FEC_TX_CLK (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 11) |
193 | #define PD12_AOUT_FEC_RXD0 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 12) | 190 | #define PD12_AOUT_FEC_RXD0 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 12) |
194 | #define PD13_AOUT_FEC_RX_DV (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 13) | 191 | #define PD13_AOUT_FEC_RX_DV (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 13) |
195 | #define PD14_AOUT_FEC_RX_CLK (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 14) | 192 | #define PD14_AOUT_FEC_RX_CLK (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 14) |
196 | #define PD15_AOUT_FEC_COL (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 15) | 193 | #define PD15_AOUT_FEC_COL (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 15) |
197 | 194 | ||
198 | #define PC17_BOUT_PC_IOIS16 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 17) | 195 | /* BOUT GPIO pin functions */ |
199 | #define PC18_BOUT_PC_BVD2 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 18) | 196 | |
200 | #define PC19_BOUT_PC_BVD1 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 19) | 197 | #define PC17_BOUT_PC_IOIS16 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 17) |
201 | #define PC28_BOUT_PC_BVD2 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 28) | 198 | #define PC18_BOUT_PC_BVD2 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 18) |
202 | #define PC29_BOUT_PC_VS1 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 29) | 199 | #define PC19_BOUT_PC_BVD1 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 19) |
203 | #define PC30_BOUT_PC_READY (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 30) | 200 | #define PC28_BOUT_PC_BVD2 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 28) |
204 | #define PC31_BOUT_PC_WAIT (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 31) | 201 | #define PC29_BOUT_PC_VS1 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 29) |
205 | 202 | #define PC30_BOUT_PC_READY (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 30) | |
206 | 203 | #define PC31_BOUT_PC_WAIT (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 31) | |
207 | #endif /* _MXC_GPIO_MX1_MX2_H */ | 204 | |
205 | #endif /* __MACH_IOMUX_MX27_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h index fb5ae638e79..c4f116d214f 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h | |||
@@ -1,237 +1,230 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> | 2 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> |
3 | * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> | 3 | * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or | 5 | * This program is free software; you can redistribute it and/or |
6 | * modify it under the terms of the GNU General Public License | 6 | * modify it under the terms of the GNU General Public License |
7 | * as published by the Free Software Foundation; either version 2 | 7 | * as published by the Free Software Foundation; either version 2 |
8 | * of the License, or (at your option) any later version. | 8 | * of the License, or (at your option) any later version. |
9 | * This program is distributed in the hope that it will be useful, | 9 | * This program is distributed in the hope that it will be useful, |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
12 | * GNU General Public License for more details. | 12 | * GNU General Public License for more details. |
13 | * | 13 | * |
14 | * You should have received a copy of the GNU General Public License | 14 | * You should have received a copy of the GNU General Public License |
15 | * along with this program; if not, write to the Free Software | 15 | * along with this program; if not, write to the Free Software |
16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
17 | * MA 02110-1301, USA. | 17 | * MA 02110-1301, USA. |
18 | */ | 18 | */ |
19 | 19 | #ifndef __MACH_IOMUX_MX2x_H__ | |
20 | #ifndef _MXC_IOMUX_MX2x_H | 20 | #define __MACH_IOMUX_MX2x_H__ |
21 | #define _MXC_IOMUX_MX2x_H | ||
22 | |||
23 | #ifndef GPIO_PORTA | ||
24 | #error Please include mach/iomux.h | ||
25 | #endif | ||
26 | |||
27 | 21 | ||
28 | /* Primary GPIO pin functions */ | 22 | /* Primary GPIO pin functions */ |
29 | 23 | ||
30 | #define PA5_PF_LSCLK (GPIO_PORTA | GPIO_PF | GPIO_OUT | 5) | 24 | #define PA5_PF_LSCLK (GPIO_PORTA | GPIO_PF | GPIO_OUT | 5) |
31 | #define PA6_PF_LD0 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 6) | 25 | #define PA6_PF_LD0 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 6) |
32 | #define PA7_PF_LD1 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 7) | 26 | #define PA7_PF_LD1 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 7) |
33 | #define PA8_PF_LD2 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 8) | 27 | #define PA8_PF_LD2 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 8) |
34 | #define PA9_PF_LD3 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 9) | 28 | #define PA9_PF_LD3 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 9) |
35 | #define PA10_PF_LD4 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 10) | 29 | #define PA10_PF_LD4 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 10) |
36 | #define PA11_PF_LD5 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 11) | 30 | #define PA11_PF_LD5 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 11) |
37 | #define PA12_PF_LD6 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 12) | 31 | #define PA12_PF_LD6 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 12) |
38 | #define PA13_PF_LD7 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 13) | 32 | #define PA13_PF_LD7 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 13) |
39 | #define PA14_PF_LD8 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 14) | 33 | #define PA14_PF_LD8 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 14) |
40 | #define PA15_PF_LD9 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15) | 34 | #define PA15_PF_LD9 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15) |
41 | #define PA16_PF_LD10 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16) | 35 | #define PA16_PF_LD10 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16) |
42 | #define PA17_PF_LD11 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 17) | 36 | #define PA17_PF_LD11 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 17) |
43 | #define PA18_PF_LD12 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 18) | 37 | #define PA18_PF_LD12 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 18) |
44 | #define PA19_PF_LD13 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 19) | 38 | #define PA19_PF_LD13 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 19) |
45 | #define PA20_PF_LD14 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 20) | 39 | #define PA20_PF_LD14 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 20) |
46 | #define PA21_PF_LD15 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 21) | 40 | #define PA21_PF_LD15 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 21) |
47 | #define PA22_PF_LD16 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 22) | 41 | #define PA22_PF_LD16 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 22) |
48 | #define PA23_PF_LD17 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 23) | 42 | #define PA23_PF_LD17 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 23) |
49 | #define PA24_PF_REV (GPIO_PORTA | GPIO_PF | GPIO_OUT | 24) | 43 | #define PA24_PF_REV (GPIO_PORTA | GPIO_PF | GPIO_OUT | 24) |
50 | #define PA25_PF_CLS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 25) | 44 | #define PA25_PF_CLS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 25) |
51 | #define PA26_PF_PS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 26) | 45 | #define PA26_PF_PS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 26) |
52 | #define PA27_PF_SPL_SPR (GPIO_PORTA | GPIO_PF | GPIO_OUT | 27) | 46 | #define PA27_PF_SPL_SPR (GPIO_PORTA | GPIO_PF | GPIO_OUT | 27) |
53 | #define PA28_PF_HSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 28) | 47 | #define PA28_PF_HSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 28) |
54 | #define PA29_PF_VSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 29) | 48 | #define PA29_PF_VSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 29) |
55 | #define PA30_PF_CONTRAST (GPIO_PORTA | GPIO_PF | GPIO_OUT | 30) | 49 | #define PA30_PF_CONTRAST (GPIO_PORTA | GPIO_PF | GPIO_OUT | 30) |
56 | #define PA31_PF_OE_ACD (GPIO_PORTA | GPIO_PF | GPIO_OUT | 31) | 50 | #define PA31_PF_OE_ACD (GPIO_PORTA | GPIO_PF | GPIO_OUT | 31) |
57 | #define PB4_PF_SD2_D0 (GPIO_PORTB | GPIO_PF | 4) | 51 | #define PB4_PF_SD2_D0 (GPIO_PORTB | GPIO_PF | 4) |
58 | #define PB5_PF_SD2_D1 (GPIO_PORTB | GPIO_PF | 5) | 52 | #define PB5_PF_SD2_D1 (GPIO_PORTB | GPIO_PF | 5) |
59 | #define PB6_PF_SD2_D2 (GPIO_PORTB | GPIO_PF | 6) | 53 | #define PB6_PF_SD2_D2 (GPIO_PORTB | GPIO_PF | 6) |
60 | #define PB7_PF_SD2_D3 (GPIO_PORTB | GPIO_PF | 7) | 54 | #define PB7_PF_SD2_D3 (GPIO_PORTB | GPIO_PF | 7) |
61 | #define PB8_PF_SD2_CMD (GPIO_PORTB | GPIO_PF | 8) | 55 | #define PB8_PF_SD2_CMD (GPIO_PORTB | GPIO_PF | 8) |
62 | #define PB9_PF_SD2_CLK (GPIO_PORTB | GPIO_PF | 9) | 56 | #define PB9_PF_SD2_CLK (GPIO_PORTB | GPIO_PF | 9) |
63 | #define PB10_PF_CSI_D0 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 10) | 57 | #define PB10_PF_CSI_D0 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 10) |
64 | #define PB11_PF_CSI_D1 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 11) | 58 | #define PB11_PF_CSI_D1 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 11) |
65 | #define PB12_PF_CSI_D2 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 12) | 59 | #define PB12_PF_CSI_D2 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 12) |
66 | #define PB13_PF_CSI_D3 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 13) | 60 | #define PB13_PF_CSI_D3 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 13) |
67 | #define PB14_PF_CSI_D4 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 14) | 61 | #define PB14_PF_CSI_D4 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 14) |
68 | #define PB15_PF_CSI_MCLK (GPIO_PORTB | GPIO_PF | GPIO_OUT | 15) | 62 | #define PB15_PF_CSI_MCLK (GPIO_PORTB | GPIO_PF | GPIO_OUT | 15) |
69 | #define PB16_PF_CSI_PIXCLK (GPIO_PORTB | GPIO_PF | GPIO_OUT | 16) | 63 | #define PB16_PF_CSI_PIXCLK (GPIO_PORTB | GPIO_PF | GPIO_OUT | 16) |
70 | #define PB17_PF_CSI_D5 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 17) | 64 | #define PB17_PF_CSI_D5 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 17) |
71 | #define PB18_PF_CSI_D6 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 18) | 65 | #define PB18_PF_CSI_D6 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 18) |
72 | #define PB19_PF_CSI_D7 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 19) | 66 | #define PB19_PF_CSI_D7 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 19) |
73 | #define PB20_PF_CSI_VSYNC (GPIO_PORTB | GPIO_PF | GPIO_OUT | 20) | 67 | #define PB20_PF_CSI_VSYNC (GPIO_PORTB | GPIO_PF | GPIO_OUT | 20) |
74 | #define PB21_PF_CSI_HSYNC (GPIO_PORTB | GPIO_PF | GPIO_OUT | 21) | 68 | #define PB21_PF_CSI_HSYNC (GPIO_PORTB | GPIO_PF | GPIO_OUT | 21) |
75 | #define PB23_PF_USB_PWR (GPIO_PORTB | GPIO_PF | 23) | 69 | #define PB23_PF_USB_PWR (GPIO_PORTB | GPIO_PF | 23) |
76 | #define PB24_PF_USB_OC (GPIO_PORTB | GPIO_PF | 24) | 70 | #define PB24_PF_USB_OC (GPIO_PORTB | GPIO_PF | 24) |
77 | #define PB26_PF_USBH1_FS (GPIO_PORTB | GPIO_PF | 26) | 71 | #define PB26_PF_USBH1_FS (GPIO_PORTB | GPIO_PF | 26) |
78 | #define PB27_PF_USBH1_OE (GPIO_PORTB | GPIO_PF | 27) | 72 | #define PB27_PF_USBH1_OE (GPIO_PORTB | GPIO_PF | 27) |
79 | #define PB28_PF_USBH1_TXDM (GPIO_PORTB | GPIO_PF | 28) | 73 | #define PB28_PF_USBH1_TXDM (GPIO_PORTB | GPIO_PF | 28) |
80 | #define PB29_PF_USBH1_TXDP (GPIO_PORTB | GPIO_PF | 29) | 74 | #define PB29_PF_USBH1_TXDP (GPIO_PORTB | GPIO_PF | 29) |
81 | #define PB30_PF_USBH1_RXDM (GPIO_PORTB | GPIO_PF | 30) | 75 | #define PB30_PF_USBH1_RXDM (GPIO_PORTB | GPIO_PF | 30) |
82 | #define PB31_PF_USBH1_RXDP (GPIO_PORTB | GPIO_PF | 31) | 76 | #define PB31_PF_USBH1_RXDP (GPIO_PORTB | GPIO_PF | 31) |
83 | #define PC14_PF_TOUT (GPIO_PORTC | GPIO_PF | 14) | 77 | #define PC14_PF_TOUT (GPIO_PORTC | GPIO_PF | 14) |
84 | #define PC15_PF_TIN (GPIO_PORTC | GPIO_PF | 15) | 78 | #define PC15_PF_TIN (GPIO_PORTC | GPIO_PF | 15) |
85 | #define PC20_PF_SSI1_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 20) | 79 | #define PC20_PF_SSI1_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 20) |
86 | #define PC21_PF_SSI1_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 21) | 80 | #define PC21_PF_SSI1_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 21) |
87 | #define PC22_PF_SSI1_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 22) | 81 | #define PC22_PF_SSI1_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 22) |
88 | #define PC23_PF_SSI1_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 23) | 82 | #define PC23_PF_SSI1_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 23) |
89 | #define PC24_PF_SSI2_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 24) | 83 | #define PC24_PF_SSI2_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 24) |
90 | #define PC25_PF_SSI2_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 25) | 84 | #define PC25_PF_SSI2_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 25) |
91 | #define PC26_PF_SSI2_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 26) | 85 | #define PC26_PF_SSI2_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 26) |
92 | #define PC27_PF_SSI2_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 27) | 86 | #define PC27_PF_SSI2_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 27) |
93 | #define PC28_PF_SSI3_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 28) | 87 | #define PC28_PF_SSI3_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 28) |
94 | #define PC29_PF_SSI3_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 29) | 88 | #define PC29_PF_SSI3_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 29) |
95 | #define PC30_PF_SSI3_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 30) | 89 | #define PC30_PF_SSI3_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 30) |
96 | #define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31) | 90 | #define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31) |
97 | #define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) | 91 | #define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) |
98 | #define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) | 92 | #define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) |
99 | #define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | 19) | 93 | #define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | 19) |
100 | #define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | 20) | 94 | #define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | 20) |
101 | #define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | 21) | 95 | #define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | 21) |
102 | #define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | 22) | 96 | #define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | 22) |
103 | #define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | 23) | 97 | #define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | 23) |
104 | #define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | 24) | 98 | #define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | 24) |
105 | #define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) | 99 | #define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) |
106 | #define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) | 100 | #define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) |
107 | #define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) | 101 | #define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) |
108 | #define PD28_PF_CSPI1_SS0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28) | 102 | #define PD28_PF_CSPI1_SS0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28) |
109 | #define PD29_PF_CSPI1_SCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29) | 103 | #define PD29_PF_CSPI1_SCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29) |
110 | #define PD30_PF_CSPI1_MISO (GPIO_PORTD | GPIO_PF | GPIO_IN | 30) | 104 | #define PD30_PF_CSPI1_MISO (GPIO_PORTD | GPIO_PF | GPIO_IN | 30) |
111 | #define PD31_PF_CSPI1_MOSI (GPIO_PORTD | GPIO_PF | GPIO_OUT | 31) | 105 | #define PD31_PF_CSPI1_MOSI (GPIO_PORTD | GPIO_PF | GPIO_OUT | 31) |
112 | #define PE3_PF_UART2_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 3) | 106 | #define PE3_PF_UART2_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 3) |
113 | #define PE4_PF_UART2_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 4) | 107 | #define PE4_PF_UART2_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 4) |
114 | #define PE5_PF_PWMO (GPIO_PORTE | GPIO_PF | 5) | 108 | #define PE5_PF_PWMO (GPIO_PORTE | GPIO_PF | 5) |
115 | #define PE6_PF_UART2_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 6) | 109 | #define PE6_PF_UART2_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 6) |
116 | #define PE7_PF_UART2_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 7) | 110 | #define PE7_PF_UART2_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 7) |
117 | #define PE8_PF_UART3_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 8) | 111 | #define PE8_PF_UART3_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 8) |
118 | #define PE9_PF_UART3_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 9) | 112 | #define PE9_PF_UART3_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 9) |
119 | #define PE10_PF_UART3_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 10) | 113 | #define PE10_PF_UART3_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 10) |
120 | #define PE11_PF_UART3_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 11) | 114 | #define PE11_PF_UART3_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 11) |
121 | #define PE12_PF_UART1_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 12) | 115 | #define PE12_PF_UART1_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 12) |
122 | #define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 13) | 116 | #define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 13) |
123 | #define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 14) | 117 | #define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 14) |
124 | #define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 15) | 118 | #define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 15) |
125 | #define PE16_PF_RTCK (GPIO_PORTE | GPIO_PF | GPIO_OUT | 16) | 119 | #define PE16_PF_RTCK (GPIO_PORTE | GPIO_PF | GPIO_OUT | 16) |
126 | #define PE17_PF_RESET_OUT (GPIO_PORTE | GPIO_PF | 17) | 120 | #define PE17_PF_RESET_OUT (GPIO_PORTE | GPIO_PF | 17) |
127 | #define PE18_PF_SD1_D0 (GPIO_PORTE | GPIO_PF | 18) | 121 | #define PE18_PF_SD1_D0 (GPIO_PORTE | GPIO_PF | 18) |
128 | #define PE19_PF_SD1_D1 (GPIO_PORTE | GPIO_PF | 19) | 122 | #define PE19_PF_SD1_D1 (GPIO_PORTE | GPIO_PF | 19) |
129 | #define PE20_PF_SD1_D2 (GPIO_PORTE | GPIO_PF | 20) | 123 | #define PE20_PF_SD1_D2 (GPIO_PORTE | GPIO_PF | 20) |
130 | #define PE21_PF_SD1_D3 (GPIO_PORTE | GPIO_PF | 21) | 124 | #define PE21_PF_SD1_D3 (GPIO_PORTE | GPIO_PF | 21) |
131 | #define PE22_PF_SD1_CMD (GPIO_PORTE | GPIO_PF | 22) | 125 | #define PE22_PF_SD1_CMD (GPIO_PORTE | GPIO_PF | 22) |
132 | #define PE23_PF_SD1_CLK (GPIO_PORTE | GPIO_PF | 23) | 126 | #define PE23_PF_SD1_CLK (GPIO_PORTE | GPIO_PF | 23) |
133 | #define PF0_PF_NRFB (GPIO_PORTF | GPIO_PF | 0) | 127 | #define PF0_PF_NRFB (GPIO_PORTF | GPIO_PF | 0) |
134 | #define PF2_PF_NFWP (GPIO_PORTF | GPIO_PF | 2) | 128 | #define PF2_PF_NFWP (GPIO_PORTF | GPIO_PF | 2) |
135 | #define PF4_PF_NFALE (GPIO_PORTF | GPIO_PF | 4) | 129 | #define PF4_PF_NFALE (GPIO_PORTF | GPIO_PF | 4) |
136 | #define PF5_PF_NFRE (GPIO_PORTF | GPIO_PF | 5) | 130 | #define PF5_PF_NFRE (GPIO_PORTF | GPIO_PF | 5) |
137 | #define PF6_PF_NFWE (GPIO_PORTF | GPIO_PF | 6) | 131 | #define PF6_PF_NFWE (GPIO_PORTF | GPIO_PF | 6) |
138 | #define PF15_PF_CLKO (GPIO_PORTF | GPIO_PF | 15) | 132 | #define PF15_PF_CLKO (GPIO_PORTF | GPIO_PF | 15) |
139 | #define PF21_PF_CS4 (GPIO_PORTF | GPIO_PF | 21) | 133 | #define PF21_PF_CS4 (GPIO_PORTF | GPIO_PF | 21) |
140 | #define PF22_PF_CS5 (GPIO_PORTF | GPIO_PF | 22) | 134 | #define PF22_PF_CS5 (GPIO_PORTF | GPIO_PF | 22) |
141 | 135 | ||
142 | /* Alternate GPIO pin functions */ | 136 | /* Alternate GPIO pin functions */ |
143 | 137 | ||
144 | #define PB26_AF_UART4_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 26) | 138 | #define PB26_AF_UART4_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 26) |
145 | #define PB28_AF_UART4_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 28) | 139 | #define PB28_AF_UART4_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 28) |
146 | #define PB29_AF_UART4_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 29) | 140 | #define PB29_AF_UART4_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 29) |
147 | #define PB31_AF_UART4_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 31) | 141 | #define PB31_AF_UART4_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 31) |
148 | #define PC28_AF_SLCDC2_D0 (GPIO_PORTC | GPIO_AF | 28) | 142 | #define PC28_AF_SLCDC2_D0 (GPIO_PORTC | GPIO_AF | 28) |
149 | #define PC29_AF_SLCDC2_RS (GPIO_PORTC | GPIO_AF | 29) | 143 | #define PC29_AF_SLCDC2_RS (GPIO_PORTC | GPIO_AF | 29) |
150 | #define PC30_AF_SLCDC2_CS (GPIO_PORTC | GPIO_AF | 30) | 144 | #define PC30_AF_SLCDC2_CS (GPIO_PORTC | GPIO_AF | 30) |
151 | #define PC31_AF_SLCDC2_CLK (GPIO_PORTC | GPIO_AF | 31) | 145 | #define PC31_AF_SLCDC2_CLK (GPIO_PORTC | GPIO_AF | 31) |
152 | #define PD19_AF_USBH2_DATA4 (GPIO_PORTD | GPIO_AF | 19) | 146 | #define PD19_AF_USBH2_DATA4 (GPIO_PORTD | GPIO_AF | 19) |
153 | #define PD20_AF_USBH2_DATA3 (GPIO_PORTD | GPIO_AF | 20) | 147 | #define PD20_AF_USBH2_DATA3 (GPIO_PORTD | GPIO_AF | 20) |
154 | #define PD21_AF_USBH2_DATA6 (GPIO_PORTD | GPIO_AF | 21) | 148 | #define PD21_AF_USBH2_DATA6 (GPIO_PORTD | GPIO_AF | 21) |
155 | #define PD22_AF_USBH2_DATA0 (GPIO_PORTD | GPIO_AF | 22) | 149 | #define PD22_AF_USBH2_DATA0 (GPIO_PORTD | GPIO_AF | 22) |
156 | #define PD23_AF_USBH2_DATA2 (GPIO_PORTD | GPIO_AF | 23) | 150 | #define PD23_AF_USBH2_DATA2 (GPIO_PORTD | GPIO_AF | 23) |
157 | #define PD24_AF_USBH2_DATA1 (GPIO_PORTD | GPIO_AF | 24) | 151 | #define PD24_AF_USBH2_DATA1 (GPIO_PORTD | GPIO_AF | 24) |
158 | #define PD26_AF_USBH2_DATA5 (GPIO_PORTD | GPIO_AF | 26) | 152 | #define PD26_AF_USBH2_DATA5 (GPIO_PORTD | GPIO_AF | 26) |
159 | #define PE0_AF_KP_COL6 (GPIO_PORTE | GPIO_AF | 0) | 153 | #define PE0_AF_KP_COL6 (GPIO_PORTE | GPIO_AF | 0) |
160 | #define PE1_AF_KP_ROW6 (GPIO_PORTE | GPIO_AF | 1) | 154 | #define PE1_AF_KP_ROW6 (GPIO_PORTE | GPIO_AF | 1) |
161 | #define PE2_AF_KP_ROW7 (GPIO_PORTE | GPIO_AF | 2) | 155 | #define PE2_AF_KP_ROW7 (GPIO_PORTE | GPIO_AF | 2) |
162 | #define PE3_AF_KP_COL7 (GPIO_PORTE | GPIO_AF | 3) | 156 | #define PE3_AF_KP_COL7 (GPIO_PORTE | GPIO_AF | 3) |
163 | #define PE4_AF_KP_ROW7 (GPIO_PORTE | GPIO_AF | 4) | 157 | #define PE4_AF_KP_ROW7 (GPIO_PORTE | GPIO_AF | 4) |
164 | #define PE6_AF_KP_COL6 (GPIO_PORTE | GPIO_AF | 6) | 158 | #define PE6_AF_KP_COL6 (GPIO_PORTE | GPIO_AF | 6) |
165 | #define PE7_AF_KP_ROW6 (GPIO_PORTE | GPIO_AF | 7) | 159 | #define PE7_AF_KP_ROW6 (GPIO_PORTE | GPIO_AF | 7) |
166 | #define PE16_AF_OWIRE (GPIO_PORTE | GPIO_AF | 16) | 160 | #define PE16_AF_OWIRE (GPIO_PORTE | GPIO_AF | 16) |
167 | #define PE18_AF_CSPI3_MISO (GPIO_PORTE | GPIO_AF | GPIO_IN | 18) | 161 | #define PE18_AF_CSPI3_MISO (GPIO_PORTE | GPIO_AF | GPIO_IN | 18) |
168 | #define PE21_AF_CSPI3_SS (GPIO_PORTE | GPIO_AF | GPIO_OUT | 21) | 162 | #define PE21_AF_CSPI3_SS (GPIO_PORTE | GPIO_AF | GPIO_OUT | 21) |
169 | #define PE22_AF_CSPI3_MOSI (GPIO_PORTE | GPIO_AF | GPIO_OUT | 22) | 163 | #define PE22_AF_CSPI3_MOSI (GPIO_PORTE | GPIO_AF | GPIO_OUT | 22) |
170 | #define PE23_AF_CSPI3_SCLK (GPIO_PORTE | GPIO_AF | GPIO_OUT | 23) | 164 | #define PE23_AF_CSPI3_SCLK (GPIO_PORTE | GPIO_AF | GPIO_OUT | 23) |
171 | 165 | ||
172 | /* AIN GPIO pin functions */ | 166 | /* AIN GPIO pin functions */ |
173 | 167 | ||
174 | #define PA6_AIN_SLCDC1_DAT0 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 6) | 168 | #define PA6_AIN_SLCDC1_DAT0 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 6) |
175 | #define PA7_AIN_SLCDC1_DAT1 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 7) | 169 | #define PA7_AIN_SLCDC1_DAT1 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 7) |
176 | #define PA8_AIN_SLCDC1_DAT2 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 8) | 170 | #define PA8_AIN_SLCDC1_DAT2 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 8) |
177 | #define PA0_AIN_SLCDC1_DAT3 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0) | 171 | #define PA0_AIN_SLCDC1_DAT3 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0) |
178 | #define PA11_AIN_SLCDC1_DAT5 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 11) | 172 | #define PA11_AIN_SLCDC1_DAT5 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 11) |
179 | #define PA13_AIN_SLCDC1_DAT7 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 13) | 173 | #define PA13_AIN_SLCDC1_DAT7 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 13) |
180 | #define PA15_AIN_SLCDC1_DAT9 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 15) | 174 | #define PA15_AIN_SLCDC1_DAT9 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 15) |
181 | #define PA17_AIN_SLCDC1_DAT11 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17) | 175 | #define PA17_AIN_SLCDC1_DAT11 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17) |
182 | #define PA19_AIN_SLCDC1_DAT13 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 19) | 176 | #define PA19_AIN_SLCDC1_DAT13 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 19) |
183 | #define PA21_AIN_SLCDC1_DAT15 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 21) | 177 | #define PA21_AIN_SLCDC1_DAT15 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 21) |
184 | #define PA22_AIN_EXT_DMAGRANT (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 22) | 178 | #define PA22_AIN_EXT_DMAGRANT (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 22) |
185 | #define PA24_AIN_SLCDC1_D0 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 24) | 179 | #define PA24_AIN_SLCDC1_D0 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 24) |
186 | #define PA25_AIN_SLCDC1_RS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 25) | 180 | #define PA25_AIN_SLCDC1_RS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 25) |
187 | #define PA26_AIN_SLCDC1_CS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 26) | 181 | #define PA26_AIN_SLCDC1_CS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 26) |
188 | #define PA27_AIN_SLCDC1_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 27) | 182 | #define PA27_AIN_SLCDC1_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 27) |
189 | #define PB6_AIN_SLCDC1_D0 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 6) | 183 | #define PB6_AIN_SLCDC1_D0 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 6) |
190 | #define PB7_AIN_SLCDC1_RS (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 7) | 184 | #define PB7_AIN_SLCDC1_RS (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 7) |
191 | #define PB8_AIN_SLCDC1_CS (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 8) | 185 | #define PB8_AIN_SLCDC1_CS (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 8) |
192 | #define PB9_AIN_SLCDC1_CLK (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 9) | 186 | #define PB9_AIN_SLCDC1_CLK (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 9) |
193 | #define PB25_AIN_SLCDC1_DAT0 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 25) | 187 | #define PB25_AIN_SLCDC1_DAT0 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 25) |
194 | #define PB26_AIN_SLCDC1_DAT1 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 26) | 188 | #define PB26_AIN_SLCDC1_DAT1 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 26) |
195 | #define PB27_AIN_SLCDC1_DAT2 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 27) | 189 | #define PB27_AIN_SLCDC1_DAT2 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 27) |
196 | #define PB28_AIN_SLCDC1_DAT3 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 28) | 190 | #define PB28_AIN_SLCDC1_DAT3 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 28) |
197 | #define PB29_AIN_SLCDC1_DAT4 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 29) | 191 | #define PB29_AIN_SLCDC1_DAT4 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 29) |
198 | #define PB30_AIN_SLCDC1_DAT5 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 30) | 192 | #define PB30_AIN_SLCDC1_DAT5 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 30) |
199 | #define PB31_AIN_SLCDC1_DAT6 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 31) | 193 | #define PB31_AIN_SLCDC1_DAT6 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 31) |
200 | #define PC5_AIN_SLCDC1_DAT7 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 5) | 194 | #define PC5_AIN_SLCDC1_DAT7 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 5) |
201 | #define PC6_AIN_SLCDC1_DAT8 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 6) | 195 | #define PC6_AIN_SLCDC1_DAT8 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 6) |
202 | #define PC7_AIN_SLCDC1_DAT9 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 7) | 196 | #define PC7_AIN_SLCDC1_DAT9 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 7) |
203 | #define PC8_AIN_SLCDC1_DAT10 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 8) | 197 | #define PC8_AIN_SLCDC1_DAT10 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 8) |
204 | #define PC9_AIN_SLCDC1_DAT11 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 9) | 198 | #define PC9_AIN_SLCDC1_DAT11 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 9) |
205 | #define PC10_AIN_SLCDC1_DAT12 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 10) | 199 | #define PC10_AIN_SLCDC1_DAT12 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 10) |
206 | #define PC11_AIN_SLCDC1_DAT13 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 11) | 200 | #define PC11_AIN_SLCDC1_DAT13 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 11) |
207 | #define PC12_AIN_SLCDC1_DAT14 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 12) | 201 | #define PC12_AIN_SLCDC1_DAT14 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 12) |
208 | #define PC13_AIN_SLCDC1_DAT15 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 13) | 202 | #define PC13_AIN_SLCDC1_DAT15 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 13) |
209 | #define PE5_AIN_PC_SPKOUT (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 5) | 203 | #define PE5_AIN_PC_SPKOUT (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 5) |
210 | 204 | ||
211 | /* BIN GPIO pin functions */ | 205 | /* BIN GPIO pin functions */ |
212 | 206 | ||
213 | #define PE5_BIN_TOUT2 (GPIO_PORTE | GPIO_BIN | GPIO_OUT | 5) | 207 | #define PE5_BIN_TOUT2 (GPIO_PORTE | GPIO_BIN | GPIO_OUT | 5) |
214 | 208 | ||
215 | /* CIN GPIO pin functions */ | 209 | /* CIN GPIO pin functions */ |
216 | 210 | ||
217 | #define PA14_CIN_SLCDC1_DAT0 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 14) | 211 | #define PA14_CIN_SLCDC1_DAT0 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 14) |
218 | #define PA15_CIN_SLCDC1_DAT1 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 15) | 212 | #define PA15_CIN_SLCDC1_DAT1 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 15) |
219 | #define PA16_CIN_SLCDC1_DAT2 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 16) | 213 | #define PA16_CIN_SLCDC1_DAT2 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 16) |
220 | #define PA17_CIN_SLCDC1_DAT3 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 17) | 214 | #define PA17_CIN_SLCDC1_DAT3 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 17) |
221 | #define PA18_CIN_SLCDC1_DAT4 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 18) | 215 | #define PA18_CIN_SLCDC1_DAT4 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 18) |
222 | #define PA19_CIN_SLCDC1_DAT5 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 19) | 216 | #define PA19_CIN_SLCDC1_DAT5 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 19) |
223 | #define PA20_CIN_SLCDC1_DAT6 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 20) | 217 | #define PA20_CIN_SLCDC1_DAT6 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 20) |
224 | #define PA21_CIN_SLCDC1_DAT7 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 21) | 218 | #define PA21_CIN_SLCDC1_DAT7 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 21) |
225 | #define PB30_CIN_UART4_CTS (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 30) | 219 | #define PB30_CIN_UART4_CTS (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 30) |
226 | #define PE5_CIN_TOUT3 (GPIO_PORTE | GPIO_CIN | GPIO_OUT | 5) | 220 | #define PE5_CIN_TOUT3 (GPIO_PORTE | GPIO_CIN | GPIO_OUT | 5) |
227 | 221 | ||
228 | /* AOUT GPIO pin functions */ | 222 | /* AOUT GPIO pin functions */ |
229 | 223 | ||
230 | #define PB29_AOUT_UART4_RXD (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 29) | 224 | #define PB29_AOUT_UART4_RXD (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 29) |
231 | #define PB31_AOUT_UART4_RTS (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 31) | 225 | #define PB31_AOUT_UART4_RTS (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 31) |
232 | #define PC8_AOUT_USBOTG_TXR_INT (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 8) | 226 | #define PC8_AOUT_USBOTG_TXR_INT (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 8) |
233 | #define PC15_AOUT_WKGD (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 15) | 227 | #define PC15_AOUT_WKGD (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 15) |
234 | #define PF21_AOUT_DTACK (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 21) | 228 | #define PF21_AOUT_DTACK (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 21) |
235 | |||
236 | 229 | ||
237 | #endif | 230 | #endif /* ifndef __MACH_IOMUX_MX2x_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h index e1fc6da1cd1..e51465d7b22 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h | |||
@@ -16,12 +16,10 @@ | |||
16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
17 | * MA 02110-1301, USA. | 17 | * MA 02110-1301, USA. |
18 | */ | 18 | */ |
19 | 19 | #ifndef __MACH_IOMUX_MX3_H__ | |
20 | #ifndef __MACH_MX31_IOMUX_H__ | 20 | #define __MACH_IOMUX_MX3_H__ |
21 | #define __MACH_MX31_IOMUX_H__ | ||
22 | 21 | ||
23 | #include <linux/types.h> | 22 | #include <linux/types.h> |
24 | |||
25 | /* | 23 | /* |
26 | * various IOMUX output functions | 24 | * various IOMUX output functions |
27 | */ | 25 | */ |
@@ -34,7 +32,7 @@ | |||
34 | #define IOMUX_OCONFIG_ALT4 (5 << 4) /* used as alternate function 4 */ | 32 | #define IOMUX_OCONFIG_ALT4 (5 << 4) /* used as alternate function 4 */ |
35 | #define IOMUX_OCONFIG_ALT5 (6 << 4) /* used as alternate function 5 */ | 33 | #define IOMUX_OCONFIG_ALT5 (6 << 4) /* used as alternate function 5 */ |
36 | #define IOMUX_OCONFIG_ALT6 (7 << 4) /* used as alternate function 6 */ | 34 | #define IOMUX_OCONFIG_ALT6 (7 << 4) /* used as alternate function 6 */ |
37 | #define IOMUX_ICONFIG_NONE 0 /* not configured for input */ | 35 | #define IOMUX_ICONFIG_NONE 0 /* not configured for input */ |
38 | #define IOMUX_ICONFIG_GPIO 1 /* used as GPIO */ | 36 | #define IOMUX_ICONFIG_GPIO 1 /* used as GPIO */ |
39 | #define IOMUX_ICONFIG_FUNC 2 /* used as function */ | 37 | #define IOMUX_ICONFIG_FUNC 2 /* used as function */ |
40 | #define IOMUX_ICONFIG_ALT1 4 /* used as alternate function 1 */ | 38 | #define IOMUX_ICONFIG_ALT1 4 /* used as alternate function 1 */ |
@@ -167,11 +165,6 @@ int mxc_iomux_mode(unsigned int pin_mode); | |||
167 | MXC_GPIO_IRQ_START) | 165 | MXC_GPIO_IRQ_START) |
168 | 166 | ||
169 | /* | 167 | /* |
170 | * The number of gpio devices among the pads | ||
171 | */ | ||
172 | #define GPIO_PORT_MAX 3 | ||
173 | |||
174 | /* | ||
175 | * This enumeration is constructed based on the Section | 168 | * This enumeration is constructed based on the Section |
176 | * "sw_pad_ctl & sw_mux_ctl details" of the MX31 IC Spec. Each enumerated | 169 | * "sw_pad_ctl & sw_mux_ctl details" of the MX31 IC Spec. Each enumerated |
177 | * value is constructed based on the rules described above. | 170 | * value is constructed based on the rules described above. |
@@ -633,40 +626,40 @@ enum iomux_pins { | |||
633 | #define MX31_PIN_TXD2__GPIO1_28 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO) | 626 | #define MX31_PIN_TXD2__GPIO1_28 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO) |
634 | #define MX31_PIN_CSI_D4__GPIO3_4 IOMUX_MODE(MX31_PIN_CSI_D4, IOMUX_CONFIG_GPIO) | 627 | #define MX31_PIN_CSI_D4__GPIO3_4 IOMUX_MODE(MX31_PIN_CSI_D4, IOMUX_CONFIG_GPIO) |
635 | #define MX31_PIN_CSI_D5__GPIO3_5 IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO) | 628 | #define MX31_PIN_CSI_D5__GPIO3_5 IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO) |
636 | #define MX31_PIN_USBOTG_DATA0__USBOTG_DATA0 IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC) | 629 | #define MX31_PIN_USBOTG_DATA0__USBOTG_DATA0 IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC) |
637 | #define MX31_PIN_USBOTG_DATA1__USBOTG_DATA1 IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC) | 630 | #define MX31_PIN_USBOTG_DATA1__USBOTG_DATA1 IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC) |
638 | #define MX31_PIN_USBOTG_DATA2__USBOTG_DATA2 IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC) | 631 | #define MX31_PIN_USBOTG_DATA2__USBOTG_DATA2 IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC) |
639 | #define MX31_PIN_USBOTG_DATA3__USBOTG_DATA3 IOMUX_MODE(MX31_PIN_USBOTG_DATA3, IOMUX_CONFIG_FUNC) | 632 | #define MX31_PIN_USBOTG_DATA3__USBOTG_DATA3 IOMUX_MODE(MX31_PIN_USBOTG_DATA3, IOMUX_CONFIG_FUNC) |
640 | #define MX31_PIN_USBOTG_DATA4__USBOTG_DATA4 IOMUX_MODE(MX31_PIN_USBOTG_DATA4, IOMUX_CONFIG_FUNC) | 633 | #define MX31_PIN_USBOTG_DATA4__USBOTG_DATA4 IOMUX_MODE(MX31_PIN_USBOTG_DATA4, IOMUX_CONFIG_FUNC) |
641 | #define MX31_PIN_USBOTG_DATA5__USBOTG_DATA5 IOMUX_MODE(MX31_PIN_USBOTG_DATA5, IOMUX_CONFIG_FUNC) | 634 | #define MX31_PIN_USBOTG_DATA5__USBOTG_DATA5 IOMUX_MODE(MX31_PIN_USBOTG_DATA5, IOMUX_CONFIG_FUNC) |
642 | #define MX31_PIN_USBOTG_DATA6__USBOTG_DATA6 IOMUX_MODE(MX31_PIN_USBOTG_DATA6, IOMUX_CONFIG_FUNC) | 635 | #define MX31_PIN_USBOTG_DATA6__USBOTG_DATA6 IOMUX_MODE(MX31_PIN_USBOTG_DATA6, IOMUX_CONFIG_FUNC) |
643 | #define MX31_PIN_USBOTG_DATA7__USBOTG_DATA7 IOMUX_MODE(MX31_PIN_USBOTG_DATA7, IOMUX_CONFIG_FUNC) | 636 | #define MX31_PIN_USBOTG_DATA7__USBOTG_DATA7 IOMUX_MODE(MX31_PIN_USBOTG_DATA7, IOMUX_CONFIG_FUNC) |
644 | #define MX31_PIN_USBOTG_CLK__USBOTG_CLK IOMUX_MODE(MX31_PIN_USBOTG_CLK, IOMUX_CONFIG_FUNC) | 637 | #define MX31_PIN_USBOTG_CLK__USBOTG_CLK IOMUX_MODE(MX31_PIN_USBOTG_CLK, IOMUX_CONFIG_FUNC) |
645 | #define MX31_PIN_USBOTG_DIR__USBOTG_DIR IOMUX_MODE(MX31_PIN_USBOTG_DIR, IOMUX_CONFIG_FUNC) | 638 | #define MX31_PIN_USBOTG_DIR__USBOTG_DIR IOMUX_MODE(MX31_PIN_USBOTG_DIR, IOMUX_CONFIG_FUNC) |
646 | #define MX31_PIN_USBOTG_NXT__USBOTG_NXT IOMUX_MODE(MX31_PIN_USBOTG_NXT, IOMUX_CONFIG_FUNC) | 639 | #define MX31_PIN_USBOTG_NXT__USBOTG_NXT IOMUX_MODE(MX31_PIN_USBOTG_NXT, IOMUX_CONFIG_FUNC) |
647 | #define MX31_PIN_USBOTG_STP__USBOTG_STP IOMUX_MODE(MX31_PIN_USBOTG_STP, IOMUX_CONFIG_FUNC) | 640 | #define MX31_PIN_USBOTG_STP__USBOTG_STP IOMUX_MODE(MX31_PIN_USBOTG_STP, IOMUX_CONFIG_FUNC) |
648 | #define MX31_PIN_CSPI1_MOSI__USBH1_RXDM IOMUX_MODE(MX31_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT1) | 641 | #define MX31_PIN_CSPI1_MOSI__USBH1_RXDM IOMUX_MODE(MX31_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT1) |
649 | #define MX31_PIN_CSPI1_MISO__USBH1_RXDP IOMUX_MODE(MX31_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT1) | 642 | #define MX31_PIN_CSPI1_MISO__USBH1_RXDP IOMUX_MODE(MX31_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT1) |
650 | #define MX31_PIN_CSPI1_SS0__USBH1_TXDM IOMUX_MODE(MX31_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT1) | 643 | #define MX31_PIN_CSPI1_SS0__USBH1_TXDM IOMUX_MODE(MX31_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT1) |
651 | #define MX31_PIN_CSPI1_SS1__USBH1_TXDP IOMUX_MODE(MX31_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT1) | 644 | #define MX31_PIN_CSPI1_SS1__USBH1_TXDP IOMUX_MODE(MX31_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT1) |
652 | #define MX31_PIN_CSPI1_SS2__USBH1_RCV IOMUX_MODE(MX31_PIN_CSPI1_SS2, IOMUX_CONFIG_ALT1) | 645 | #define MX31_PIN_CSPI1_SS2__USBH1_RCV IOMUX_MODE(MX31_PIN_CSPI1_SS2, IOMUX_CONFIG_ALT1) |
653 | #define MX31_PIN_CSPI1_SCLK__USBH1_OEB IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT1) | 646 | #define MX31_PIN_CSPI1_SCLK__USBH1_OEB IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT1) |
654 | #define MX31_PIN_CSPI1_SPI_RDY__USBH1_FS IOMUX_MODE(MX31_PIN_CSPI1_SPI_RDY, IOMUX_CONFIG_ALT1) | 647 | #define MX31_PIN_CSPI1_SPI_RDY__USBH1_FS IOMUX_MODE(MX31_PIN_CSPI1_SPI_RDY, IOMUX_CONFIG_ALT1) |
655 | #define MX31_PIN_SFS6__USBH1_SUSPEND IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_FUNC) | 648 | #define MX31_PIN_SFS6__USBH1_SUSPEND IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_FUNC) |
656 | #define MX31_PIN_NFRE_B__GPIO1_11 IOMUX_MODE(MX31_PIN_NFRE_B, IOMUX_CONFIG_GPIO) | 649 | #define MX31_PIN_NFRE_B__GPIO1_11 IOMUX_MODE(MX31_PIN_NFRE_B, IOMUX_CONFIG_GPIO) |
657 | #define MX31_PIN_NFALE__GPIO1_12 IOMUX_MODE(MX31_PIN_NFALE, IOMUX_CONFIG_GPIO) | 650 | #define MX31_PIN_NFALE__GPIO1_12 IOMUX_MODE(MX31_PIN_NFALE, IOMUX_CONFIG_GPIO) |
658 | #define MX31_PIN_USBH2_DATA0__USBH2_DATA0 IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC) | 651 | #define MX31_PIN_USBH2_DATA0__USBH2_DATA0 IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC) |
659 | #define MX31_PIN_USBH2_DATA1__USBH2_DATA1 IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC) | 652 | #define MX31_PIN_USBH2_DATA1__USBH2_DATA1 IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC) |
660 | #define MX31_PIN_STXD3__USBH2_DATA2 IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC) | 653 | #define MX31_PIN_STXD3__USBH2_DATA2 IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC) |
661 | #define MX31_PIN_SRXD3__USBH2_DATA3 IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC) | 654 | #define MX31_PIN_SRXD3__USBH2_DATA3 IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC) |
662 | #define MX31_PIN_SCK3__USBH2_DATA4 IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC) | 655 | #define MX31_PIN_SCK3__USBH2_DATA4 IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC) |
663 | #define MX31_PIN_SFS3__USBH2_DATA5 IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC) | 656 | #define MX31_PIN_SFS3__USBH2_DATA5 IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC) |
664 | #define MX31_PIN_STXD6__USBH2_DATA6 IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC) | 657 | #define MX31_PIN_STXD6__USBH2_DATA6 IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC) |
665 | #define MX31_PIN_SRXD6__USBH2_DATA7 IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC) | 658 | #define MX31_PIN_SRXD6__USBH2_DATA7 IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC) |
666 | #define MX31_PIN_USBH2_CLK__USBH2_CLK IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC) | 659 | #define MX31_PIN_USBH2_CLK__USBH2_CLK IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC) |
667 | #define MX31_PIN_USBH2_DIR__USBH2_DIR IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC) | 660 | #define MX31_PIN_USBH2_DIR__USBH2_DIR IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC) |
668 | #define MX31_PIN_USBH2_NXT__USBH2_NXT IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC) | 661 | #define MX31_PIN_USBH2_NXT__USBH2_NXT IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC) |
669 | #define MX31_PIN_USBH2_STP__USBH2_STP IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC) | 662 | #define MX31_PIN_USBH2_STP__USBH2_STP IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC) |
670 | #define MX31_PIN_SCK6__GPIO1_25 IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO) | 663 | #define MX31_PIN_SCK6__GPIO1_25 IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO) |
671 | #define MX31_PIN_USB_OC__GPIO1_30 IOMUX_MODE(MX31_PIN_USB_OC, IOMUX_CONFIG_GPIO) | 664 | #define MX31_PIN_USB_OC__GPIO1_30 IOMUX_MODE(MX31_PIN_USB_OC, IOMUX_CONFIG_GPIO) |
672 | #define MX31_PIN_I2C_DAT__I2C1_SDA IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC) | 665 | #define MX31_PIN_I2C_DAT__I2C1_SDA IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC) |
@@ -711,8 +704,8 @@ enum iomux_pins { | |||
711 | #define MX31_PIN_DSR_DCE1__GPIO2_9 IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_GPIO) | 704 | #define MX31_PIN_DSR_DCE1__GPIO2_9 IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_GPIO) |
712 | #define MX31_PIN_RI_DCE1__GPIO2_10 IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_GPIO) | 705 | #define MX31_PIN_RI_DCE1__GPIO2_10 IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_GPIO) |
713 | #define MX31_PIN_DCD_DCE1__GPIO2_11 IOMUX_MODE(MX31_PIN_DCD_DCE1, IOMUX_CONFIG_GPIO) | 706 | #define MX31_PIN_DCD_DCE1__GPIO2_11 IOMUX_MODE(MX31_PIN_DCD_DCE1, IOMUX_CONFIG_GPIO) |
714 | #define MX31_PIN_STXD5__GPIO1_21 IOMUX_MODE(MX31_PIN_STXD5, IOMUX_CONFIG_GPIO) | 707 | #define MX31_PIN_STXD5__GPIO1_21 IOMUX_MODE(MX31_PIN_STXD5, IOMUX_CONFIG_GPIO) |
715 | #define MX31_PIN_SRXD5__GPIO1_22 IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_GPIO) | 708 | #define MX31_PIN_SRXD5__GPIO1_22 IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_GPIO) |
716 | #define MX31_PIN_GPIO1_3__GPIO1_3 IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO) | 709 | #define MX31_PIN_GPIO1_3__GPIO1_3 IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO) |
717 | #define MX31_PIN_CSPI2_SS1__CSPI3_SS1 IOMUX_MODE(MX31_PIN_CSPI2_SS1, IOMUX_CONFIG_ALT1) | 710 | #define MX31_PIN_CSPI2_SS1__CSPI3_SS1 IOMUX_MODE(MX31_PIN_CSPI2_SS1, IOMUX_CONFIG_ALT1) |
718 | #define MX31_PIN_RTS1__GPIO2_6 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_GPIO) | 711 | #define MX31_PIN_RTS1__GPIO2_6 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_GPIO) |
@@ -727,13 +720,14 @@ enum iomux_pins { | |||
727 | #define MX31_PIN_SCK5__SCK5 IOMUX_MODE(MX31_PIN_SCK5, IOMUX_CONFIG_FUNC) | 720 | #define MX31_PIN_SCK5__SCK5 IOMUX_MODE(MX31_PIN_SCK5, IOMUX_CONFIG_FUNC) |
728 | #define MX31_PIN_SFS5__SFS5 IOMUX_MODE(MX31_PIN_SFS5, IOMUX_CONFIG_FUNC) | 721 | #define MX31_PIN_SFS5__SFS5 IOMUX_MODE(MX31_PIN_SFS5, IOMUX_CONFIG_FUNC) |
729 | 722 | ||
730 | /*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0 | 723 | /* |
731 | * cspi1_ss1*/ | 724 | * XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed with cspi2_ss0, |
725 | * cspi2_ss1, cspi1_ss0 cspi1_ss1 | ||
726 | */ | ||
732 | 727 | ||
733 | /* | 728 | /* |
734 | * This function configures the pad value for a IOMUX pin. | 729 | * This function configures the pad value for a IOMUX pin. |
735 | */ | 730 | */ |
736 | void mxc_iomux_set_pad(enum iomux_pins, u32); | 731 | void mxc_iomux_set_pad(enum iomux_pins, u32); |
737 | 732 | ||
738 | #endif | 733 | #endif /* ifndef __MACH_IOMUX_MX3_H__ */ |
739 | |||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx35.h b/arch/arm/plat-mxc/include/mach/iomux-mx35.h index c88d40795f7..2a24bae1b87 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx35.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx35.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C, NO_PAD_CTRL) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de> | 2 | * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de> |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or | 4 | * This program is free software; you can redistribute it and/or |
5 | * modify it under the terms of the GNU General Public License | 5 | * modify it under the terms of the GNU General Public License |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h new file mode 100644 index 00000000000..884f5753f27 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h | |||
@@ -0,0 +1,103 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> | ||
3 | * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License | ||
7 | * as published by the Free Software Foundation; either version 2 | ||
8 | * of the License, or (at your option) any later version. | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
17 | * MA 02110-1301, USA. | ||
18 | */ | ||
19 | #ifndef __MACH_IOMUX_V1_H__ | ||
20 | #define __MACH_IOMUX_V1_H__ | ||
21 | |||
22 | /* | ||
23 | * GPIO Module and I/O Multiplexer | ||
24 | * x = 0..3 for reg_A, reg_B, reg_C, reg_D | ||
25 | */ | ||
26 | #define MXC_DDIR(x) (0x00 + ((x) << 8)) | ||
27 | #define MXC_OCR1(x) (0x04 + ((x) << 8)) | ||
28 | #define MXC_OCR2(x) (0x08 + ((x) << 8)) | ||
29 | #define MXC_ICONFA1(x) (0x0c + ((x) << 8)) | ||
30 | #define MXC_ICONFA2(x) (0x10 + ((x) << 8)) | ||
31 | #define MXC_ICONFB1(x) (0x14 + ((x) << 8)) | ||
32 | #define MXC_ICONFB2(x) (0x18 + ((x) << 8)) | ||
33 | #define MXC_DR(x) (0x1c + ((x) << 8)) | ||
34 | #define MXC_GIUS(x) (0x20 + ((x) << 8)) | ||
35 | #define MXC_SSR(x) (0x24 + ((x) << 8)) | ||
36 | #define MXC_ICR1(x) (0x28 + ((x) << 8)) | ||
37 | #define MXC_ICR2(x) (0x2c + ((x) << 8)) | ||
38 | #define MXC_IMR(x) (0x30 + ((x) << 8)) | ||
39 | #define MXC_ISR(x) (0x34 + ((x) << 8)) | ||
40 | #define MXC_GPR(x) (0x38 + ((x) << 8)) | ||
41 | #define MXC_SWR(x) (0x3c + ((x) << 8)) | ||
42 | #define MXC_PUEN(x) (0x40 + ((x) << 8)) | ||
43 | |||
44 | #define MX1_NUM_GPIO_PORT 4 | ||
45 | #define MX21_NUM_GPIO_PORT 6 | ||
46 | #define MX27_NUM_GPIO_PORT 6 | ||
47 | |||
48 | #define GPIO_PIN_MASK 0x1f | ||
49 | |||
50 | #define GPIO_PORT_SHIFT 5 | ||
51 | #define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT) | ||
52 | |||
53 | #define GPIO_PORTA (0 << GPIO_PORT_SHIFT) | ||
54 | #define GPIO_PORTB (1 << GPIO_PORT_SHIFT) | ||
55 | #define GPIO_PORTC (2 << GPIO_PORT_SHIFT) | ||
56 | #define GPIO_PORTD (3 << GPIO_PORT_SHIFT) | ||
57 | #define GPIO_PORTE (4 << GPIO_PORT_SHIFT) | ||
58 | #define GPIO_PORTF (5 << GPIO_PORT_SHIFT) | ||
59 | |||
60 | #define GPIO_OUT (1 << 8) | ||
61 | #define GPIO_IN (0 << 8) | ||
62 | #define GPIO_PUEN (1 << 9) | ||
63 | |||
64 | #define GPIO_PF (1 << 10) | ||
65 | #define GPIO_AF (1 << 11) | ||
66 | |||
67 | #define GPIO_OCR_SHIFT 12 | ||
68 | #define GPIO_OCR_MASK (3 << GPIO_OCR_SHIFT) | ||
69 | #define GPIO_AIN (0 << GPIO_OCR_SHIFT) | ||
70 | #define GPIO_BIN (1 << GPIO_OCR_SHIFT) | ||
71 | #define GPIO_CIN (2 << GPIO_OCR_SHIFT) | ||
72 | #define GPIO_GPIO (3 << GPIO_OCR_SHIFT) | ||
73 | |||
74 | #define GPIO_AOUT_SHIFT 14 | ||
75 | #define GPIO_AOUT_MASK (3 << GPIO_AOUT_SHIFT) | ||
76 | #define GPIO_AOUT (0 << GPIO_AOUT_SHIFT) | ||
77 | #define GPIO_AOUT_ISR (1 << GPIO_AOUT_SHIFT) | ||
78 | #define GPIO_AOUT_0 (2 << GPIO_AOUT_SHIFT) | ||
79 | #define GPIO_AOUT_1 (3 << GPIO_AOUT_SHIFT) | ||
80 | |||
81 | #define GPIO_BOUT_SHIFT 16 | ||
82 | #define GPIO_BOUT_MASK (3 << GPIO_BOUT_SHIFT) | ||
83 | #define GPIO_BOUT (0 << GPIO_BOUT_SHIFT) | ||
84 | #define GPIO_BOUT_ISR (1 << GPIO_BOUT_SHIFT) | ||
85 | #define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT) | ||
86 | #define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT) | ||
87 | |||
88 | /* decode irq number to use with IMR(x), ISR(x) and friends */ | ||
89 | #define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5) | ||
90 | |||
91 | #define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x) | ||
92 | #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) | ||
93 | #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) | ||
94 | #define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x) | ||
95 | #define IRQ_GPIOE(x) (IRQ_GPIOD(32) + x) | ||
96 | #define IRQ_GPIOF(x) (IRQ_GPIOE(32) + x) | ||
97 | |||
98 | extern int mxc_gpio_mode(int gpio_mode); | ||
99 | extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, | ||
100 | const char *label); | ||
101 | extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count); | ||
102 | |||
103 | #endif /* __MACH_IOMUX_V1_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux.h b/arch/arm/plat-mxc/include/mach/iomux.h index 011cfcd8b82..3d226d7e7be 100644 --- a/arch/arm/plat-mxc/include/mach/iomux.h +++ b/arch/arm/plat-mxc/include/mach/iomux.h | |||
@@ -1,102 +1,14 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> | 2 | * Copyright (C) 2010 Uwe Kleine-Koenig, Pengutronix |
3 | * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> | 3 | * |
4 | * | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * This program is free software; you can redistribute it and/or | 5 | * under the terms of the GNU General Public License version 2 as published by |
6 | * modify it under the terms of the GNU General Public License | 6 | * the Free Software Foundation. |
7 | * as published by the Free Software Foundation; either version 2 | 7 | */ |
8 | * of the License, or (at your option) any later version. | 8 | #ifndef __MACH_IOMUX_H__ |
9 | * This program is distributed in the hope that it will be useful, | 9 | #define __MACH_IOMUX_H__ |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
17 | * MA 02110-1301, USA. | ||
18 | */ | ||
19 | |||
20 | #ifndef _MXC_IOMUX_H | ||
21 | #define _MXC_IOMUX_H | ||
22 | |||
23 | /* | ||
24 | * GPIO Module and I/O Multiplexer | ||
25 | * x = 0..3 for reg_A, reg_B, reg_C, reg_D | ||
26 | */ | ||
27 | #define VA_GPIO_BASE IO_ADDRESS(GPIO_BASE_ADDR) | ||
28 | #define MXC_DDIR(x) (0x00 + ((x) << 8)) | ||
29 | #define MXC_OCR1(x) (0x04 + ((x) << 8)) | ||
30 | #define MXC_OCR2(x) (0x08 + ((x) << 8)) | ||
31 | #define MXC_ICONFA1(x) (0x0c + ((x) << 8)) | ||
32 | #define MXC_ICONFA2(x) (0x10 + ((x) << 8)) | ||
33 | #define MXC_ICONFB1(x) (0x14 + ((x) << 8)) | ||
34 | #define MXC_ICONFB2(x) (0x18 + ((x) << 8)) | ||
35 | #define MXC_DR(x) (0x1c + ((x) << 8)) | ||
36 | #define MXC_GIUS(x) (0x20 + ((x) << 8)) | ||
37 | #define MXC_SSR(x) (0x24 + ((x) << 8)) | ||
38 | #define MXC_ICR1(x) (0x28 + ((x) << 8)) | ||
39 | #define MXC_ICR2(x) (0x2c + ((x) << 8)) | ||
40 | #define MXC_IMR(x) (0x30 + ((x) << 8)) | ||
41 | #define MXC_ISR(x) (0x34 + ((x) << 8)) | ||
42 | #define MXC_GPR(x) (0x38 + ((x) << 8)) | ||
43 | #define MXC_SWR(x) (0x3c + ((x) << 8)) | ||
44 | #define MXC_PUEN(x) (0x40 + ((x) << 8)) | ||
45 | |||
46 | #ifdef CONFIG_ARCH_MX1 | ||
47 | # define GPIO_PORT_MAX 3 | ||
48 | #endif | ||
49 | #ifdef CONFIG_ARCH_MX2 | ||
50 | # define GPIO_PORT_MAX 5 | ||
51 | #endif | ||
52 | #ifdef CONFIG_ARCH_MX25 | ||
53 | # define GPIO_PORT_MAX 3 | ||
54 | #endif | ||
55 | |||
56 | #ifndef GPIO_PORT_MAX | ||
57 | # error "GPIO config port count unknown!" | ||
58 | #endif | ||
59 | |||
60 | #define GPIO_PIN_MASK 0x1f | ||
61 | |||
62 | #define GPIO_PORT_SHIFT 5 | ||
63 | #define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT) | ||
64 | |||
65 | #define GPIO_PORTA (0 << GPIO_PORT_SHIFT) | ||
66 | #define GPIO_PORTB (1 << GPIO_PORT_SHIFT) | ||
67 | #define GPIO_PORTC (2 << GPIO_PORT_SHIFT) | ||
68 | #define GPIO_PORTD (3 << GPIO_PORT_SHIFT) | ||
69 | #define GPIO_PORTE (4 << GPIO_PORT_SHIFT) | ||
70 | #define GPIO_PORTF (5 << GPIO_PORT_SHIFT) | ||
71 | |||
72 | #define GPIO_OUT (1 << 8) | ||
73 | #define GPIO_IN (0 << 8) | ||
74 | #define GPIO_PUEN (1 << 9) | ||
75 | |||
76 | #define GPIO_PF (1 << 10) | ||
77 | #define GPIO_AF (1 << 11) | ||
78 | |||
79 | #define GPIO_OCR_SHIFT 12 | ||
80 | #define GPIO_OCR_MASK (3 << GPIO_OCR_SHIFT) | ||
81 | #define GPIO_AIN (0 << GPIO_OCR_SHIFT) | ||
82 | #define GPIO_BIN (1 << GPIO_OCR_SHIFT) | ||
83 | #define GPIO_CIN (2 << GPIO_OCR_SHIFT) | ||
84 | #define GPIO_GPIO (3 << GPIO_OCR_SHIFT) | ||
85 | |||
86 | #define GPIO_AOUT_SHIFT 14 | ||
87 | #define GPIO_AOUT_MASK (3 << GPIO_AOUT_SHIFT) | ||
88 | #define GPIO_AOUT (0 << GPIO_AOUT_SHIFT) | ||
89 | #define GPIO_AOUT_ISR (1 << GPIO_AOUT_SHIFT) | ||
90 | #define GPIO_AOUT_0 (2 << GPIO_AOUT_SHIFT) | ||
91 | #define GPIO_AOUT_1 (3 << GPIO_AOUT_SHIFT) | ||
92 | |||
93 | #define GPIO_BOUT_SHIFT 16 | ||
94 | #define GPIO_BOUT_MASK (3 << GPIO_BOUT_SHIFT) | ||
95 | #define GPIO_BOUT (0 << GPIO_BOUT_SHIFT) | ||
96 | #define GPIO_BOUT_ISR (1 << GPIO_BOUT_SHIFT) | ||
97 | #define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT) | ||
98 | #define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT) | ||
99 | 10 | ||
11 | /* This file will go away, please include mach/iomux-mx... directly */ | ||
100 | 12 | ||
101 | #ifdef CONFIG_ARCH_MX1 | 13 | #ifdef CONFIG_ARCH_MX1 |
102 | #include <mach/iomux-mx1.h> | 14 | #include <mach/iomux-mx1.h> |
@@ -110,25 +22,5 @@ | |||
110 | #include <mach/iomux-mx27.h> | 22 | #include <mach/iomux-mx27.h> |
111 | #endif | 23 | #endif |
112 | #endif | 24 | #endif |
113 | #ifdef CONFIG_ARCH_MX25 | ||
114 | #include <mach/iomux-mx25.h> | ||
115 | #endif | ||
116 | 25 | ||
117 | 26 | #endif /* __MACH_IOMUX_H__ */ | |
118 | /* decode irq number to use with IMR(x), ISR(x) and friends */ | ||
119 | #define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5) | ||
120 | |||
121 | #define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x) | ||
122 | #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) | ||
123 | #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) | ||
124 | #define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x) | ||
125 | #define IRQ_GPIOE(x) (IRQ_GPIOD(32) + x) | ||
126 | #define IRQ_GPIOF(x) (IRQ_GPIOE(32) + x) | ||
127 | |||
128 | |||
129 | extern void mxc_gpio_mode(int gpio_mode); | ||
130 | extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, | ||
131 | const char *label); | ||
132 | extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count); | ||
133 | |||
134 | #endif | ||
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index a3ad643de5a..86781f7b0c0 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h | |||
@@ -22,18 +22,19 @@ | |||
22 | 22 | ||
23 | #define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS | 23 | #define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS |
24 | 24 | ||
25 | #if defined CONFIG_ARCH_MX1 | 25 | /* these are ordered by size to support multi-SoC kernels */ |
26 | #define MXC_GPIO_IRQS (32 * 4) | 26 | #if defined CONFIG_ARCH_MX2 |
27 | #elif defined CONFIG_ARCH_MX2 | ||
28 | #define MXC_GPIO_IRQS (32 * 6) | 27 | #define MXC_GPIO_IRQS (32 * 6) |
29 | #elif defined CONFIG_ARCH_MX3 | 28 | #elif defined CONFIG_ARCH_MX1 |
30 | #define MXC_GPIO_IRQS (32 * 3) | 29 | #define MXC_GPIO_IRQS (32 * 4) |
31 | #elif defined CONFIG_ARCH_MX25 | 30 | #elif defined CONFIG_ARCH_MX25 |
32 | #define MXC_GPIO_IRQS (32 * 4) | 31 | #define MXC_GPIO_IRQS (32 * 4) |
33 | #elif defined CONFIG_ARCH_MX5 | 32 | #elif defined CONFIG_ARCH_MX5 |
34 | #define MXC_GPIO_IRQS (32 * 4) | 33 | #define MXC_GPIO_IRQS (32 * 4) |
35 | #elif defined CONFIG_ARCH_MXC91231 | 34 | #elif defined CONFIG_ARCH_MXC91231 |
36 | #define MXC_GPIO_IRQS (32 * 4) | 35 | #define MXC_GPIO_IRQS (32 * 4) |
36 | #elif defined CONFIG_ARCH_MX3 | ||
37 | #define MXC_GPIO_IRQS (32 * 3) | ||
37 | #endif | 38 | #endif |
38 | 39 | ||
39 | /* | 40 | /* |
diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h index 7cae9cb6208..c4b40c35a6a 100644 --- a/arch/arm/plat-mxc/include/mach/memory.h +++ b/arch/arm/plat-mxc/include/mach/memory.h | |||
@@ -37,20 +37,19 @@ | |||
37 | # endif | 37 | # endif |
38 | #endif | 38 | #endif |
39 | 39 | ||
40 | #if defined(CONFIG_MX1_VIDEO) | 40 | #if defined(CONFIG_MX3_VIDEO) |
41 | /* | 41 | /* |
42 | * Increase size of DMA-consistent memory region. | 42 | * Increase size of DMA-consistent memory region. |
43 | * This is required for i.MX camera driver to capture at least four VGA frames. | 43 | * This is required for mx3 camera driver to capture at least two QXGA frames. |
44 | */ | 44 | */ |
45 | #define CONSISTENT_DMA_SIZE SZ_4M | 45 | #define CONSISTENT_DMA_SIZE SZ_8M |
46 | #endif /* CONFIG_MX1_VIDEO */ | ||
47 | 46 | ||
48 | #if defined(CONFIG_MX3_VIDEO) | 47 | #elif defined(CONFIG_MX1_VIDEO) |
49 | /* | 48 | /* |
50 | * Increase size of DMA-consistent memory region. | 49 | * Increase size of DMA-consistent memory region. |
51 | * This is required for mx3 camera driver to capture at least two QXGA frames. | 50 | * This is required for i.MX camera driver to capture at least four VGA frames. |
52 | */ | 51 | */ |
53 | #define CONSISTENT_DMA_SIZE SZ_8M | 52 | #define CONSISTENT_DMA_SIZE SZ_4M |
54 | #endif /* CONFIG_MX3_VIDEO */ | 53 | #endif /* CONFIG_MX1_VIDEO */ |
55 | 54 | ||
56 | #endif /* __ASM_ARCH_MXC_MEMORY_H__ */ | 55 | #endif /* __ASM_ARCH_MXC_MEMORY_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/mtd-xip.h b/arch/arm/plat-mxc/include/mach/mtd-xip.h deleted file mode 100644 index 1ab1bba5688..00000000000 --- a/arch/arm/plat-mxc/include/mach/mtd-xip.h +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | /* | ||
2 | * MTD primitives for XIP support. Architecture specific functions | ||
3 | * | ||
4 | * Do not include this file directly. It's included from linux/mtd/xip.h | ||
5 | * | ||
6 | * Copyright (C) 2008 Darius Augulis <augulis.darius@gmail.com>, Teltonika, Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <mach/mxc_timer.h> | ||
15 | |||
16 | #ifndef __ARCH_IMX_MTD_XIP_H__ | ||
17 | #define __ARCH_IMX_MTD_XIP_H__ | ||
18 | |||
19 | #ifdef CONFIG_ARCH_MX1 | ||
20 | /* AITC registers */ | ||
21 | #define AITC_BASE IO_ADDRESS(AVIC_BASE_ADDR) | ||
22 | #define NIPNDH (AITC_BASE + 0x58) | ||
23 | #define NIPNDL (AITC_BASE + 0x5C) | ||
24 | #define INTENABLEH (AITC_BASE + 0x10) | ||
25 | #define INTENABLEL (AITC_BASE + 0x14) | ||
26 | /* MTD macros */ | ||
27 | #define xip_irqpending() ((__raw_readl(INTENABLEH) & __raw_readl(NIPNDH)) \ | ||
28 | || (__raw_readl(INTENABLEL) & __raw_readl(NIPNDL))) | ||
29 | #define xip_currtime() (__raw_readl(TIMER_BASE + MXC_TCN)) | ||
30 | #define xip_elapsed_since(x) (signed)((__raw_readl(TIMER_BASE + MXC_TCN) - (x)) / 96) | ||
31 | #define xip_cpu_idle() asm volatile ("mcr p15, 0, %0, c7, c0, 4" :: "r" (0)) | ||
32 | #endif /* CONFIG_ARCH_MX1 */ | ||
33 | |||
34 | #endif /* __ARCH_IMX_MTD_XIP_H__ */ | ||