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-rw-r--r--arch/arm/plat-mxc/cpu.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/plat-mxc/cpu.c
index f5b7e0fa237..220dd6f9312 100644
--- a/arch/arm/plat-mxc/cpu.c
+++ b/arch/arm/plat-mxc/cpu.c
@@ -1,5 +1,6 @@
1 1
2#include <linux/module.h> 2#include <linux/module.h>
3#include <linux/io.h>
3#include <mach/hardware.h> 4#include <mach/hardware.h>
4 5
5unsigned int __mxc_cpu_type; 6unsigned int __mxc_cpu_type;
@@ -18,3 +19,26 @@ void imx_print_silicon_rev(const char *cpu, int srev)
18 pr_info("CPU identified as %s, silicon rev %d.%d\n", 19 pr_info("CPU identified as %s, silicon rev %d.%d\n",
19 cpu, (srev >> 4) & 0xf, srev & 0xf); 20 cpu, (srev >> 4) & 0xf, srev & 0xf);
20} 21}
22
23void __init imx_set_aips(void __iomem *base)
24{
25 unsigned int reg;
26/*
27 * Set all MPROTx to be non-bufferable, trusted for R/W,
28 * not forced to user-mode.
29 */
30 __raw_writel(0x77777777, base + 0x0);
31 __raw_writel(0x77777777, base + 0x4);
32
33/*
34 * Set all OPACRx to be non-bufferable, to not require
35 * supervisor privilege level for access, allow for
36 * write access and untrusted master access.
37 */
38 __raw_writel(0x0, base + 0x40);
39 __raw_writel(0x0, base + 0x44);
40 __raw_writel(0x0, base + 0x48);
41 __raw_writel(0x0, base + 0x4C);
42 reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
43 __raw_writel(reg, base + 0x50);
44}