diff options
Diffstat (limited to 'arch/arm/plat-mxc/clock.c')
-rw-r--r-- | arch/arm/plat-mxc/clock.c | 257 |
1 files changed, 0 insertions, 257 deletions
diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c deleted file mode 100644 index 5079787273d..00000000000 --- a/arch/arm/plat-mxc/clock.c +++ /dev/null | |||
@@ -1,257 +0,0 @@ | |||
1 | /* | ||
2 | * Based on arch/arm/plat-omap/clock.c | ||
3 | * | ||
4 | * Copyright (C) 2004 - 2005 Nokia corporation | ||
5 | * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> | ||
6 | * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com> | ||
7 | * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
8 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or | ||
11 | * modify it under the terms of the GNU General Public License | ||
12 | * as published by the Free Software Foundation; either version 2 | ||
13 | * of the License, or (at your option) any later version. | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
22 | * MA 02110-1301, USA. | ||
23 | */ | ||
24 | |||
25 | /* #define DEBUG */ | ||
26 | |||
27 | #include <linux/clk.h> | ||
28 | #include <linux/err.h> | ||
29 | #include <linux/errno.h> | ||
30 | #include <linux/init.h> | ||
31 | #include <linux/io.h> | ||
32 | #include <linux/kernel.h> | ||
33 | #include <linux/list.h> | ||
34 | #include <linux/module.h> | ||
35 | #include <linux/mutex.h> | ||
36 | #include <linux/platform_device.h> | ||
37 | #include <linux/proc_fs.h> | ||
38 | #include <linux/semaphore.h> | ||
39 | #include <linux/string.h> | ||
40 | |||
41 | #include <mach/clock.h> | ||
42 | #include <mach/hardware.h> | ||
43 | |||
44 | #ifndef CONFIG_COMMON_CLK | ||
45 | static LIST_HEAD(clocks); | ||
46 | static DEFINE_MUTEX(clocks_mutex); | ||
47 | |||
48 | /*------------------------------------------------------------------------- | ||
49 | * Standard clock functions defined in include/linux/clk.h | ||
50 | *-------------------------------------------------------------------------*/ | ||
51 | |||
52 | static void __clk_disable(struct clk *clk) | ||
53 | { | ||
54 | if (clk == NULL || IS_ERR(clk)) | ||
55 | return; | ||
56 | WARN_ON(!clk->usecount); | ||
57 | |||
58 | if (!(--clk->usecount)) { | ||
59 | if (clk->disable) | ||
60 | clk->disable(clk); | ||
61 | __clk_disable(clk->parent); | ||
62 | __clk_disable(clk->secondary); | ||
63 | } | ||
64 | } | ||
65 | |||
66 | static int __clk_enable(struct clk *clk) | ||
67 | { | ||
68 | if (clk == NULL || IS_ERR(clk)) | ||
69 | return -EINVAL; | ||
70 | |||
71 | if (clk->usecount++ == 0) { | ||
72 | __clk_enable(clk->parent); | ||
73 | __clk_enable(clk->secondary); | ||
74 | |||
75 | if (clk->enable) | ||
76 | clk->enable(clk); | ||
77 | } | ||
78 | return 0; | ||
79 | } | ||
80 | |||
81 | /* This function increments the reference count on the clock and enables the | ||
82 | * clock if not already enabled. The parent clock tree is recursively enabled | ||
83 | */ | ||
84 | int clk_enable(struct clk *clk) | ||
85 | { | ||
86 | int ret = 0; | ||
87 | |||
88 | if (clk == NULL || IS_ERR(clk)) | ||
89 | return -EINVAL; | ||
90 | |||
91 | mutex_lock(&clocks_mutex); | ||
92 | ret = __clk_enable(clk); | ||
93 | mutex_unlock(&clocks_mutex); | ||
94 | |||
95 | return ret; | ||
96 | } | ||
97 | EXPORT_SYMBOL(clk_enable); | ||
98 | |||
99 | /* This function decrements the reference count on the clock and disables | ||
100 | * the clock when reference count is 0. The parent clock tree is | ||
101 | * recursively disabled | ||
102 | */ | ||
103 | void clk_disable(struct clk *clk) | ||
104 | { | ||
105 | if (clk == NULL || IS_ERR(clk)) | ||
106 | return; | ||
107 | |||
108 | mutex_lock(&clocks_mutex); | ||
109 | __clk_disable(clk); | ||
110 | mutex_unlock(&clocks_mutex); | ||
111 | } | ||
112 | EXPORT_SYMBOL(clk_disable); | ||
113 | |||
114 | /* Retrieve the *current* clock rate. If the clock itself | ||
115 | * does not provide a special calculation routine, ask | ||
116 | * its parent and so on, until one is able to return | ||
117 | * a valid clock rate | ||
118 | */ | ||
119 | unsigned long clk_get_rate(struct clk *clk) | ||
120 | { | ||
121 | if (clk == NULL || IS_ERR(clk)) | ||
122 | return 0UL; | ||
123 | |||
124 | if (clk->get_rate) | ||
125 | return clk->get_rate(clk); | ||
126 | |||
127 | return clk_get_rate(clk->parent); | ||
128 | } | ||
129 | EXPORT_SYMBOL(clk_get_rate); | ||
130 | |||
131 | /* Round the requested clock rate to the nearest supported | ||
132 | * rate that is less than or equal to the requested rate. | ||
133 | * This is dependent on the clock's current parent. | ||
134 | */ | ||
135 | long clk_round_rate(struct clk *clk, unsigned long rate) | ||
136 | { | ||
137 | if (clk == NULL || IS_ERR(clk) || !clk->round_rate) | ||
138 | return 0; | ||
139 | |||
140 | return clk->round_rate(clk, rate); | ||
141 | } | ||
142 | EXPORT_SYMBOL(clk_round_rate); | ||
143 | |||
144 | /* Set the clock to the requested clock rate. The rate must | ||
145 | * match a supported rate exactly based on what clk_round_rate returns | ||
146 | */ | ||
147 | int clk_set_rate(struct clk *clk, unsigned long rate) | ||
148 | { | ||
149 | int ret = -EINVAL; | ||
150 | |||
151 | if (clk == NULL || IS_ERR(clk) || clk->set_rate == NULL || rate == 0) | ||
152 | return ret; | ||
153 | |||
154 | mutex_lock(&clocks_mutex); | ||
155 | ret = clk->set_rate(clk, rate); | ||
156 | mutex_unlock(&clocks_mutex); | ||
157 | |||
158 | return ret; | ||
159 | } | ||
160 | EXPORT_SYMBOL(clk_set_rate); | ||
161 | |||
162 | /* Set the clock's parent to another clock source */ | ||
163 | int clk_set_parent(struct clk *clk, struct clk *parent) | ||
164 | { | ||
165 | int ret = -EINVAL; | ||
166 | struct clk *old; | ||
167 | |||
168 | if (clk == NULL || IS_ERR(clk) || parent == NULL || | ||
169 | IS_ERR(parent) || clk->set_parent == NULL) | ||
170 | return ret; | ||
171 | |||
172 | if (clk->usecount) | ||
173 | clk_enable(parent); | ||
174 | |||
175 | mutex_lock(&clocks_mutex); | ||
176 | ret = clk->set_parent(clk, parent); | ||
177 | if (ret == 0) { | ||
178 | old = clk->parent; | ||
179 | clk->parent = parent; | ||
180 | } else { | ||
181 | old = parent; | ||
182 | } | ||
183 | mutex_unlock(&clocks_mutex); | ||
184 | |||
185 | if (clk->usecount) | ||
186 | clk_disable(old); | ||
187 | |||
188 | return ret; | ||
189 | } | ||
190 | EXPORT_SYMBOL(clk_set_parent); | ||
191 | |||
192 | /* Retrieve the clock's parent clock source */ | ||
193 | struct clk *clk_get_parent(struct clk *clk) | ||
194 | { | ||
195 | struct clk *ret = NULL; | ||
196 | |||
197 | if (clk == NULL || IS_ERR(clk)) | ||
198 | return ret; | ||
199 | |||
200 | return clk->parent; | ||
201 | } | ||
202 | EXPORT_SYMBOL(clk_get_parent); | ||
203 | |||
204 | #else | ||
205 | |||
206 | /* | ||
207 | * Lock to protect the clock module (ccm) registers. Used | ||
208 | * on all i.MXs | ||
209 | */ | ||
210 | DEFINE_SPINLOCK(imx_ccm_lock); | ||
211 | |||
212 | #endif /* CONFIG_COMMON_CLK */ | ||
213 | |||
214 | /* | ||
215 | * Get the resulting clock rate from a PLL register value and the input | ||
216 | * frequency. PLLs with this register layout can at least be found on | ||
217 | * MX1, MX21, MX27 and MX31 | ||
218 | * | ||
219 | * mfi + mfn / (mfd + 1) | ||
220 | * f = 2 * f_ref * -------------------- | ||
221 | * pd + 1 | ||
222 | */ | ||
223 | unsigned long mxc_decode_pll(unsigned int reg_val, u32 freq) | ||
224 | { | ||
225 | long long ll; | ||
226 | int mfn_abs; | ||
227 | unsigned int mfi, mfn, mfd, pd; | ||
228 | |||
229 | mfi = (reg_val >> 10) & 0xf; | ||
230 | mfn = reg_val & 0x3ff; | ||
231 | mfd = (reg_val >> 16) & 0x3ff; | ||
232 | pd = (reg_val >> 26) & 0xf; | ||
233 | |||
234 | mfi = mfi <= 5 ? 5 : mfi; | ||
235 | |||
236 | mfn_abs = mfn; | ||
237 | |||
238 | /* On all i.MXs except i.MX1 and i.MX21 mfn is a 10bit | ||
239 | * 2's complements number | ||
240 | */ | ||
241 | if (!cpu_is_mx1() && !cpu_is_mx21() && mfn >= 0x200) | ||
242 | mfn_abs = 0x400 - mfn; | ||
243 | |||
244 | freq *= 2; | ||
245 | freq /= pd + 1; | ||
246 | |||
247 | ll = (unsigned long long)freq * mfn_abs; | ||
248 | |||
249 | do_div(ll, mfd + 1); | ||
250 | |||
251 | if (!cpu_is_mx1() && !cpu_is_mx21() && mfn >= 0x200) | ||
252 | ll = -ll; | ||
253 | |||
254 | ll = (freq * mfi) + ll; | ||
255 | |||
256 | return ll; | ||
257 | } | ||