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-rw-r--r--arch/arm/mm/cache-v6.S32
1 files changed, 19 insertions, 13 deletions
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index 73b4a8b66a5..2edb6f67f69 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -272,6 +272,11 @@ v6_dma_clean_range:
272 * - end - virtual end address of region 272 * - end - virtual end address of region
273 */ 273 */
274ENTRY(v6_dma_flush_range) 274ENTRY(v6_dma_flush_range)
275#ifdef CONFIG_CACHE_FLUSH_RANGE_LIMIT
276 sub r2, r1, r0
277 cmp r2, #CONFIG_CACHE_FLUSH_RANGE_LIMIT
278 bhi v6_dma_flush_dcache_all
279#endif
275#ifdef CONFIG_DMA_CACHE_RWFO 280#ifdef CONFIG_DMA_CACHE_RWFO
276 ldrb r2, [r0] @ read for ownership 281 ldrb r2, [r0] @ read for ownership
277 strb r2, [r0] @ write for ownership 282 strb r2, [r0] @ write for ownership
@@ -294,6 +299,18 @@ ENTRY(v6_dma_flush_range)
294 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer 299 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
295 mov pc, lr 300 mov pc, lr
296 301
302#ifdef CONFIG_CACHE_FLUSH_RANGE_LIMIT
303v6_dma_flush_dcache_all:
304 mov r0, #0
305#ifdef HARVARD_CACHE
306 mcr p15, 0, r0, c7, c14, 0 @ D cache clean+invalidate
307#else
308 mcr p15, 0, r0, c7, c15, 0 @ Cache clean+invalidate
309#endif
310 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
311 mov pc, lr
312#endif
313
297/* 314/*
298 * dma_map_area(start, size, dir) 315 * dma_map_area(start, size, dir)
299 * - start - kernel virtual start address 316 * - start - kernel virtual start address
@@ -330,16 +347,5 @@ ENDPROC(v6_dma_unmap_area)
330 347
331 __INITDATA 348 __INITDATA
332 349
333 .type v6_cache_fns, #object 350 @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
334ENTRY(v6_cache_fns) 351 define_cache_functions v6
335 .long v6_flush_icache_all
336 .long v6_flush_kern_cache_all
337 .long v6_flush_user_cache_all
338 .long v6_flush_user_cache_range
339 .long v6_coherent_kern_range
340 .long v6_coherent_user_range
341 .long v6_flush_kern_dcache_area
342 .long v6_dma_map_area
343 .long v6_dma_unmap_area
344 .long v6_dma_flush_range
345 .size v6_cache_fns, . - v6_cache_fns