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-rw-r--r--arch/arm/mach-w90x900/include/mach/regs-clock.h22
-rw-r--r--arch/arm/mach-w90x900/include/mach/regs-ebi.h33
2 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm/mach-w90x900/include/mach/regs-clock.h b/arch/arm/mach-w90x900/include/mach/regs-clock.h
index f10b6a8dc06..516d6b477b6 100644
--- a/arch/arm/mach-w90x900/include/mach/regs-clock.h
+++ b/arch/arm/mach-w90x900/include/mach/regs-clock.h
@@ -28,4 +28,26 @@
28#define REG_CLKEN1 (CLK_BA + 0x24) 28#define REG_CLKEN1 (CLK_BA + 0x24)
29#define REG_CLKDIV1 (CLK_BA + 0x28) 29#define REG_CLKDIV1 (CLK_BA + 0x28)
30 30
31/* Define PLL freq setting */
32#define PLL_DISABLE 0x12B63
33#define PLL_66MHZ 0x2B63
34#define PLL_100MHZ 0x4F64
35#define PLL_120MHZ 0x4F63
36#define PLL_166MHZ 0x4124
37#define PLL_200MHZ 0x4F24
38
39/* Define AHB:CPUFREQ ratio */
40#define AHB_CPUCLK_1_1 0x00
41#define AHB_CPUCLK_1_2 0x01
42#define AHB_CPUCLK_1_4 0x02
43#define AHB_CPUCLK_1_8 0x03
44
45/* Define APB:AHB ratio */
46#define APB_AHB_1_2 0x01
47#define APB_AHB_1_4 0x02
48#define APB_AHB_1_8 0x03
49
50/* Define clock skew */
51#define DEFAULTSKEW 0x48
52
31#endif /* __ASM_ARCH_REGS_CLOCK_H */ 53#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-w90x900/include/mach/regs-ebi.h b/arch/arm/mach-w90x900/include/mach/regs-ebi.h
new file mode 100644
index 00000000000..b68455e7f88
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/regs-ebi.h
@@ -0,0 +1,33 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/regs-ebi.h
3 *
4 * Copyright (c) 2009 Nuvoton technology corporation.
5 *
6 * Wan ZongShun <mcuos.com@gmail.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation;version 2 of the License.
11 *
12 */
13
14#ifndef __ASM_ARCH_REGS_EBI_H
15#define __ASM_ARCH_REGS_EBI_H
16
17/* EBI Control Registers */
18
19#define EBI_BA W90X900_VA_EBI
20#define REG_EBICON (EBI_BA + 0x00)
21#define REG_ROMCON (EBI_BA + 0x04)
22#define REG_SDCONF0 (EBI_BA + 0x08)
23#define REG_SDCONF1 (EBI_BA + 0x0C)
24#define REG_SDTIME0 (EBI_BA + 0x10)
25#define REG_SDTIME1 (EBI_BA + 0x14)
26#define REG_EXT0CON (EBI_BA + 0x18)
27#define REG_EXT1CON (EBI_BA + 0x1C)
28#define REG_EXT2CON (EBI_BA + 0x20)
29#define REG_EXT3CON (EBI_BA + 0x24)
30#define REG_EXT4CON (EBI_BA + 0x28)
31#define REG_CKSKEW (EBI_BA + 0x2C)
32
33#endif /* __ASM_ARCH_REGS_EBI_H */