diff options
Diffstat (limited to 'arch/arm/mach-vexpress/include/mach')
-rw-r--r-- | arch/arm/mach-vexpress/include/mach/ct-ca9x4.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-vexpress/include/mach/entry-macro.S | 5 | ||||
-rw-r--r-- | arch/arm/mach-vexpress/include/mach/motherboard.h | 52 |
3 files changed, 25 insertions, 35 deletions
diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h index a40468f3b93..84acf8439d4 100644 --- a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h +++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h | |||
@@ -22,9 +22,6 @@ | |||
22 | #define CT_CA9X4_SYSWDT (0x1e007000) | 22 | #define CT_CA9X4_SYSWDT (0x1e007000) |
23 | #define CT_CA9X4_L2CC (0x1e00a000) | 23 | #define CT_CA9X4_L2CC (0x1e00a000) |
24 | 24 | ||
25 | #define CT_CA9X4_TIMER0 (CT_CA9X4_SP804_TIMER + 0x000) | ||
26 | #define CT_CA9X4_TIMER1 (CT_CA9X4_SP804_TIMER + 0x020) | ||
27 | |||
28 | #define A9_MPCORE_SCU (CT_CA9X4_MPIC + 0x0000) | 25 | #define A9_MPCORE_SCU (CT_CA9X4_MPIC + 0x0000) |
29 | #define A9_MPCORE_GIC_CPU (CT_CA9X4_MPIC + 0x0100) | 26 | #define A9_MPCORE_GIC_CPU (CT_CA9X4_MPIC + 0x0100) |
30 | #define A9_MPCORE_GIT (CT_CA9X4_MPIC + 0x0200) | 27 | #define A9_MPCORE_GIT (CT_CA9X4_MPIC + 0x0200) |
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S deleted file mode 100644 index a14f9e62ca9..00000000000 --- a/arch/arm/mach-vexpress/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | .macro disable_fiq | ||
2 | .endm | ||
3 | |||
4 | .macro arch_ret_to_user, tmp1, tmp2 | ||
5 | .endm | ||
diff --git a/arch/arm/mach-vexpress/include/mach/motherboard.h b/arch/arm/mach-vexpress/include/mach/motherboard.h index 0a3a3751840..b4c498c1dbe 100644 --- a/arch/arm/mach-vexpress/include/mach/motherboard.h +++ b/arch/arm/mach-vexpress/include/mach/motherboard.h | |||
@@ -39,33 +39,30 @@ | |||
39 | #define V2M_CF (V2M_PA_CS7 + 0x0001a000) | 39 | #define V2M_CF (V2M_PA_CS7 + 0x0001a000) |
40 | #define V2M_CLCD (V2M_PA_CS7 + 0x0001f000) | 40 | #define V2M_CLCD (V2M_PA_CS7 + 0x0001f000) |
41 | 41 | ||
42 | #define V2M_SYS_ID (V2M_SYSREGS + 0x000) | 42 | /* |
43 | #define V2M_SYS_SW (V2M_SYSREGS + 0x004) | 43 | * Offsets from SYSREGS base |
44 | #define V2M_SYS_LED (V2M_SYSREGS + 0x008) | 44 | */ |
45 | #define V2M_SYS_100HZ (V2M_SYSREGS + 0x024) | 45 | #define V2M_SYS_ID 0x000 |
46 | #define V2M_SYS_FLAGS (V2M_SYSREGS + 0x030) | 46 | #define V2M_SYS_SW 0x004 |
47 | #define V2M_SYS_FLAGSSET (V2M_SYSREGS + 0x030) | 47 | #define V2M_SYS_LED 0x008 |
48 | #define V2M_SYS_FLAGSCLR (V2M_SYSREGS + 0x034) | 48 | #define V2M_SYS_100HZ 0x024 |
49 | #define V2M_SYS_NVFLAGS (V2M_SYSREGS + 0x038) | 49 | #define V2M_SYS_FLAGS 0x030 |
50 | #define V2M_SYS_NVFLAGSSET (V2M_SYSREGS + 0x038) | 50 | #define V2M_SYS_FLAGSSET 0x030 |
51 | #define V2M_SYS_NVFLAGSCLR (V2M_SYSREGS + 0x03c) | 51 | #define V2M_SYS_FLAGSCLR 0x034 |
52 | #define V2M_SYS_MCI (V2M_SYSREGS + 0x048) | 52 | #define V2M_SYS_NVFLAGS 0x038 |
53 | #define V2M_SYS_FLASH (V2M_SYSREGS + 0x03c) | 53 | #define V2M_SYS_NVFLAGSSET 0x038 |
54 | #define V2M_SYS_CFGSW (V2M_SYSREGS + 0x058) | 54 | #define V2M_SYS_NVFLAGSCLR 0x03c |
55 | #define V2M_SYS_24MHZ (V2M_SYSREGS + 0x05c) | 55 | #define V2M_SYS_MCI 0x048 |
56 | #define V2M_SYS_MISC (V2M_SYSREGS + 0x060) | 56 | #define V2M_SYS_FLASH 0x03c |
57 | #define V2M_SYS_DMA (V2M_SYSREGS + 0x064) | 57 | #define V2M_SYS_CFGSW 0x058 |
58 | #define V2M_SYS_PROCID0 (V2M_SYSREGS + 0x084) | 58 | #define V2M_SYS_24MHZ 0x05c |
59 | #define V2M_SYS_PROCID1 (V2M_SYSREGS + 0x088) | 59 | #define V2M_SYS_MISC 0x060 |
60 | #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0) | 60 | #define V2M_SYS_DMA 0x064 |
61 | #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) | 61 | #define V2M_SYS_PROCID0 0x084 |
62 | #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) | 62 | #define V2M_SYS_PROCID1 0x088 |
63 | 63 | #define V2M_SYS_CFGDATA 0x0a0 | |
64 | #define V2M_TIMER0 (V2M_TIMER01 + 0x000) | 64 | #define V2M_SYS_CFGCTRL 0x0a4 |
65 | #define V2M_TIMER1 (V2M_TIMER01 + 0x020) | 65 | #define V2M_SYS_CFGSTAT 0x0a8 |
66 | |||
67 | #define V2M_TIMER2 (V2M_TIMER23 + 0x000) | ||
68 | #define V2M_TIMER3 (V2M_TIMER23 + 0x020) | ||
69 | 66 | ||
70 | 67 | ||
71 | /* | 68 | /* |
@@ -117,6 +114,7 @@ | |||
117 | 114 | ||
118 | int v2m_cfg_write(u32 devfn, u32 data); | 115 | int v2m_cfg_write(u32 devfn, u32 data); |
119 | int v2m_cfg_read(u32 devfn, u32 *data); | 116 | int v2m_cfg_read(u32 devfn, u32 *data); |
117 | void v2m_flags_set(u32 data); | ||
120 | 118 | ||
121 | /* | 119 | /* |
122 | * Core tile IDs | 120 | * Core tile IDs |