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-rw-r--r--arch/arm/mach-shmobile/Makefile2
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c2
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c35
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva.c39
-rw-r--r--arch/arm/mach-shmobile/board-bonito.c8
-rw-r--r--arch/arm/mach-shmobile/board-g3evm.c12
-rw-r--r--arch/arm/mach-shmobile/board-g4evm.c32
-rw-r--r--arch/arm/mach-shmobile/board-kota2.c1
-rw-r--r--arch/arm/mach-shmobile/board-kzm9d.c1
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c22
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c58
-rw-r--r--arch/arm/mach-shmobile/board-marzen.c69
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7740.c46
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7779.c11
-rw-r--r--arch/arm/mach-shmobile/clock-sh7367.c44
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c60
-rw-r--r--arch/arm/mach-shmobile/clock-sh7377.c50
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c70
-rw-r--r--arch/arm/mach-shmobile/common.c24
-rw-r--r--arch/arm/mach-shmobile/cpuidle.c39
-rw-r--r--arch/arm/mach-shmobile/hotplug.c31
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h38
-rw-r--r--arch/arm/mach-shmobile/include/mach/emev2.h7
-rw-r--r--arch/arm/mach-shmobile/include/mach/pm-rmobile.h35
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a7740.h6
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a7779.h14
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh7372.h20
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh73a0.h2
-rw-r--r--arch/arm/mach-shmobile/intc-r8a7779.c14
-rw-r--r--arch/arm/mach-shmobile/intc-sh7372.c27
-rw-r--r--arch/arm/mach-shmobile/intc-sh73a0.c20
-rw-r--r--arch/arm/mach-shmobile/pfc-r8a7740.c2
-rw-r--r--arch/arm/mach-shmobile/pfc-r8a7779.c2
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7367.c2
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7372.c2
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7377.c2
-rw-r--r--arch/arm/mach-shmobile/pfc-sh73a0.c2
-rw-r--r--arch/arm/mach-shmobile/platsmp.c96
-rw-r--r--arch/arm/mach-shmobile/pm-r8a7740.c42
-rw-r--r--arch/arm/mach-shmobile/pm-r8a7779.c71
-rw-r--r--arch/arm/mach-shmobile/pm-rmobile.c39
-rw-r--r--arch/arm/mach-shmobile/pm-sh7372.c340
-rw-r--r--arch/arm/mach-shmobile/setup-emev2.c22
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7740.c27
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7779.c5
-rw-r--r--arch/arm/mach-shmobile/setup-sh7367.c2
-rw-r--r--arch/arm/mach-shmobile/setup-sh7372.c69
-rw-r--r--arch/arm/mach-shmobile/setup-sh7377.c2
-rw-r--r--arch/arm/mach-shmobile/setup-sh73a0.c23
-rw-r--r--arch/arm/mach-shmobile/sh-gpio.h (renamed from arch/arm/mach-shmobile/include/mach/gpio.h)20
-rw-r--r--arch/arm/mach-shmobile/smp-emev2.c47
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7779.c48
-rw-r--r--arch/arm/mach-shmobile/smp-sh73a0.c48
53 files changed, 995 insertions, 757 deletions
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 0df5ae6740c..fe2c97c179d 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common objects 5# Common objects
6obj-y := timer.o console.o clock.o common.o 6obj-y := timer.o console.o clock.o
7 7
8# CPU objects 8# CPU objects
9obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o 9obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index d82c010fdfc..25eb88a923e 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -40,7 +40,6 @@
40#include <linux/mmc/sh_mobile_sdhi.h> 40#include <linux/mmc/sh_mobile_sdhi.h>
41#include <linux/mfd/tmio.h> 41#include <linux/mfd/tmio.h>
42#include <linux/sh_clk.h> 42#include <linux/sh_clk.h>
43#include <linux/videodev2.h>
44#include <video/sh_mobile_lcdc.h> 43#include <video/sh_mobile_lcdc.h>
45#include <video/sh_mipi_dsi.h> 44#include <video/sh_mipi_dsi.h>
46#include <sound/sh_fsi.h> 45#include <sound/sh_fsi.h>
@@ -650,6 +649,7 @@ static void __init ag5evm_init(void)
650} 649}
651 650
652MACHINE_START(AG5EVM, "ag5evm") 651MACHINE_START(AG5EVM, "ag5evm")
652 .smp = smp_ops(sh73a0_smp_ops),
653 .map_io = sh73a0_map_io, 653 .map_io = sh73a0_map_io,
654 .init_early = sh73a0_add_early_devices, 654 .init_early = sh73a0_add_early_devices,
655 .nr_irqs = NR_IRQS_LEGACY, 655 .nr_irqs = NR_IRQS_LEGACY,
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index f172ca85905..790dc68c431 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -66,6 +66,8 @@
66#include <asm/mach/arch.h> 66#include <asm/mach/arch.h>
67#include <asm/setup.h> 67#include <asm/setup.h>
68 68
69#include "sh-gpio.h"
70
69/* 71/*
70 * Address Interface BusWidth note 72 * Address Interface BusWidth note
71 * ------------------------------------------------------------------ 73 * ------------------------------------------------------------------
@@ -432,7 +434,7 @@ static void usb1_host_port_power(int port, int power)
432 return; 434 return;
433 435
434 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */ 436 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
435 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008); 437 __raw_writew(__raw_readw(IOMEM(0xE68B0008)) | 0x600, IOMEM(0xE68B0008));
436} 438}
437 439
438static struct r8a66597_platdata usb1_host_data = { 440static struct r8a66597_platdata usb1_host_data = {
@@ -1224,11 +1226,20 @@ static struct i2c_board_info i2c1_devices[] = {
1224}; 1226};
1225 1227
1226 1228
1227#define GPIO_PORT9CR 0xE6051009 1229#define GPIO_PORT9CR IOMEM(0xE6051009)
1228#define GPIO_PORT10CR 0xE605100A 1230#define GPIO_PORT10CR IOMEM(0xE605100A)
1229#define USCCR1 0xE6058144 1231#define USCCR1 IOMEM(0xE6058144)
1230static void __init ap4evb_init(void) 1232static void __init ap4evb_init(void)
1231{ 1233{
1234 struct pm_domain_device domain_devices[] = {
1235 { "A4LC", &lcdc1_device, },
1236 { "A4LC", &lcdc_device, },
1237 { "A4MP", &fsi_device, },
1238 { "A3SP", &sh_mmcif_device, },
1239 { "A3SP", &sdhi0_device, },
1240 { "A3SP", &sdhi1_device, },
1241 { "A4R", &ceu_device, },
1242 };
1232 u32 srcr4; 1243 u32 srcr4;
1233 struct clk *clk; 1244 struct clk *clk;
1234 1245
@@ -1304,7 +1315,7 @@ static void __init ap4evb_init(void)
1304 gpio_request(GPIO_FN_OVCN2_1, NULL); 1315 gpio_request(GPIO_FN_OVCN2_1, NULL);
1305 1316
1306 /* setup USB phy */ 1317 /* setup USB phy */
1307 __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */ 1318 __raw_writew(0x8a0a, IOMEM(0xE6058130)); /* USBCR4 */
1308 1319
1309 /* enable FSI2 port A (ak4643) */ 1320 /* enable FSI2 port A (ak4643) */
1310 gpio_request(GPIO_FN_FSIAIBT, NULL); 1321 gpio_request(GPIO_FN_FSIAIBT, NULL);
@@ -1453,7 +1464,7 @@ static void __init ap4evb_init(void)
1453 gpio_request(GPIO_FN_HDMI_CEC, NULL); 1464 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1454 1465
1455 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */ 1466 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1456#define SRCR4 0xe61580bc 1467#define SRCR4 IOMEM(0xe61580bc)
1457 srcr4 = __raw_readl(SRCR4); 1468 srcr4 = __raw_readl(SRCR4);
1458 __raw_writel(srcr4 | (1 << 13), SRCR4); 1469 __raw_writel(srcr4 | (1 << 13), SRCR4);
1459 udelay(50); 1470 udelay(50);
@@ -1461,14 +1472,8 @@ static void __init ap4evb_init(void)
1461 1472
1462 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices)); 1473 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
1463 1474
1464 rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc1_device); 1475 rmobile_add_devices_to_domains(domain_devices,
1465 rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc_device); 1476 ARRAY_SIZE(domain_devices));
1466 rmobile_add_device_to_domain(&sh7372_pd_a4mp, &fsi_device);
1467
1468 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sh_mmcif_device);
1469 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi0_device);
1470 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi1_device);
1471 rmobile_add_device_to_domain(&sh7372_pd_a4r, &ceu_device);
1472 1477
1473 hdmi_init_pm_clock(); 1478 hdmi_init_pm_clock();
1474 fsi_init_pm_clock(); 1479 fsi_init_pm_clock();
@@ -1483,6 +1488,6 @@ MACHINE_START(AP4EVB, "ap4evb")
1483 .init_irq = sh7372_init_irq, 1488 .init_irq = sh7372_init_irq,
1484 .handle_irq = shmobile_handle_irq_intc, 1489 .handle_irq = shmobile_handle_irq_intc,
1485 .init_machine = ap4evb_init, 1490 .init_machine = ap4evb_init,
1486 .init_late = shmobile_init_late, 1491 .init_late = sh7372_pm_init_late,
1487 .timer = &shmobile_timer, 1492 .timer = &shmobile_timer,
1488MACHINE_END 1493MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 453a6e50db8..2912eab3b96 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -37,6 +37,7 @@
37#include <linux/mmc/host.h> 37#include <linux/mmc/host.h>
38#include <linux/mmc/sh_mmcif.h> 38#include <linux/mmc/sh_mmcif.h>
39#include <linux/mmc/sh_mobile_sdhi.h> 39#include <linux/mmc/sh_mobile_sdhi.h>
40#include <linux/i2c-gpio.h>
40#include <mach/common.h> 41#include <mach/common.h>
41#include <mach/irqs.h> 42#include <mach/irqs.h>
42#include <mach/r8a7740.h> 43#include <mach/r8a7740.h>
@@ -54,6 +55,8 @@
54#include <sound/sh_fsi.h> 55#include <sound/sh_fsi.h>
55#include <sound/simple_card.h> 56#include <sound/simple_card.h>
56 57
58#include "sh-gpio.h"
59
57/* 60/*
58 * CON1 Camera Module 61 * CON1 Camera Module
59 * CON2 Extension Bus 62 * CON2 Extension Bus
@@ -135,7 +138,7 @@
135 * usbhsf_power_ctrl() 138 * usbhsf_power_ctrl()
136 */ 139 */
137#define IRQ7 evt2irq(0x02e0) 140#define IRQ7 evt2irq(0x02e0)
138#define USBCR1 0xe605810a 141#define USBCR1 IOMEM(0xe605810a)
139#define USBH 0xC6700000 142#define USBH 0xC6700000
140#define USBH_USBCTR 0x10834 143#define USBH_USBCTR 0x10834
141 144
@@ -877,6 +880,21 @@ static struct platform_device fsi_hdmi_device = {
877 }, 880 },
878}; 881};
879 882
883/* RTC: RTC connects i2c-gpio. */
884static struct i2c_gpio_platform_data i2c_gpio_data = {
885 .sda_pin = GPIO_PORT208,
886 .scl_pin = GPIO_PORT91,
887 .udelay = 5, /* 100 kHz */
888};
889
890static struct platform_device i2c_gpio_device = {
891 .name = "i2c-gpio",
892 .id = 2,
893 .dev = {
894 .platform_data = &i2c_gpio_data,
895 },
896};
897
880/* I2C */ 898/* I2C */
881static struct i2c_board_info i2c0_devices[] = { 899static struct i2c_board_info i2c0_devices[] = {
882 { 900 {
@@ -888,6 +906,13 @@ static struct i2c_board_info i2c0_devices[] = {
888 }, 906 },
889}; 907};
890 908
909static struct i2c_board_info i2c2_devices[] = {
910 {
911 I2C_BOARD_INFO("s35390a", 0x30),
912 .type = "s35390a",
913 },
914};
915
891/* 916/*
892 * board devices 917 * board devices
893 */ 918 */
@@ -904,6 +929,7 @@ static struct platform_device *eva_devices[] __initdata = {
904 &fsi_device, 929 &fsi_device,
905 &fsi_wm8978_device, 930 &fsi_wm8978_device,
906 &fsi_hdmi_device, 931 &fsi_hdmi_device,
932 &i2c_gpio_device,
907}; 933};
908 934
909static void __init eva_clock_init(void) 935static void __init eva_clock_init(void)
@@ -950,8 +976,8 @@ clock_error:
950/* 976/*
951 * board init 977 * board init
952 */ 978 */
953#define GPIO_PORT7CR 0xe6050007 979#define GPIO_PORT7CR IOMEM(0xe6050007)
954#define GPIO_PORT8CR 0xe6050008 980#define GPIO_PORT8CR IOMEM(0xe6050008)
955static void __init eva_init(void) 981static void __init eva_init(void)
956{ 982{
957 struct platform_device *usb = NULL; 983 struct platform_device *usb = NULL;
@@ -1174,6 +1200,7 @@ static void __init eva_init(void)
1174#endif 1200#endif
1175 1201
1176 i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices)); 1202 i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
1203 i2c_register_board_info(2, i2c2_devices, ARRAY_SIZE(i2c2_devices));
1177 1204
1178 r8a7740_add_standard_devices(); 1205 r8a7740_add_standard_devices();
1179 1206
@@ -1182,10 +1209,10 @@ static void __init eva_init(void)
1182 1209
1183 eva_clock_init(); 1210 eva_clock_init();
1184 1211
1185 rmobile_add_device_to_domain(&r8a7740_pd_a4lc, &lcdc0_device); 1212 rmobile_add_device_to_domain("A4LC", &lcdc0_device);
1186 rmobile_add_device_to_domain(&r8a7740_pd_a4lc, &hdmi_lcdc_device); 1213 rmobile_add_device_to_domain("A4LC", &hdmi_lcdc_device);
1187 if (usb) 1214 if (usb)
1188 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, usb); 1215 rmobile_add_device_to_domain("A3SP", usb);
1189} 1216}
1190 1217
1191static void __init eva_earlytimer_init(void) 1218static void __init eva_earlytimer_init(void)
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
index 4129008eae2..cb8c994e143 100644
--- a/arch/arm/mach-shmobile/board-bonito.c
+++ b/arch/arm/mach-shmobile/board-bonito.c
@@ -108,12 +108,12 @@ static struct regulator_consumer_supply dummy_supplies[] = {
108#define FPGA_ETH_IRQ (FPGA_IRQ0 + 15) 108#define FPGA_ETH_IRQ (FPGA_IRQ0 + 15)
109static u16 bonito_fpga_read(u32 offset) 109static u16 bonito_fpga_read(u32 offset)
110{ 110{
111 return __raw_readw(0xf0003000 + offset); 111 return __raw_readw(IOMEM(0xf0003000) + offset);
112} 112}
113 113
114static void bonito_fpga_write(u32 offset, u16 val) 114static void bonito_fpga_write(u32 offset, u16 val)
115{ 115{
116 __raw_writew(val, 0xf0003000 + offset); 116 __raw_writew(val, IOMEM(0xf0003000) + offset);
117} 117}
118 118
119static void bonito_fpga_irq_disable(struct irq_data *data) 119static void bonito_fpga_irq_disable(struct irq_data *data)
@@ -361,8 +361,8 @@ static void __init bonito_map_io(void)
361#define BIT_ON(sw, bit) (sw & (1 << bit)) 361#define BIT_ON(sw, bit) (sw & (1 << bit))
362#define BIT_OFF(sw, bit) (!(sw & (1 << bit))) 362#define BIT_OFF(sw, bit) (!(sw & (1 << bit)))
363 363
364#define VCCQ1CR 0xE6058140 364#define VCCQ1CR IOMEM(0xE6058140)
365#define VCCQ1LCDCR 0xE6058186 365#define VCCQ1LCDCR IOMEM(0xE6058186)
366 366
367static void __init bonito_init(void) 367static void __init bonito_init(void)
368{ 368{
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index 796fa00ad3c..b179d4c213b 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -106,7 +106,7 @@ static void usb_host_port_power(int port, int power)
106 return; 106 return;
107 107
108 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */ 108 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
109 __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008); 109 __raw_writew(__raw_readw(IOMEM(0xe6890008)) | 0x600, IOMEM(0xe6890008));
110} 110}
111 111
112static struct r8a66597_platdata usb_host_data = { 112static struct r8a66597_platdata usb_host_data = {
@@ -279,10 +279,10 @@ static void __init g3evm_init(void)
279 gpio_request(GPIO_FN_IDIN, NULL); 279 gpio_request(GPIO_FN_IDIN, NULL);
280 280
281 /* setup USB phy */ 281 /* setup USB phy */
282 __raw_writew(0x0300, 0xe605810a); /* USBCR1 */ 282 __raw_writew(0x0300, IOMEM(0xe605810a)); /* USBCR1 */
283 __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */ 283 __raw_writew(0x00e0, IOMEM(0xe60581c0)); /* CPFCH */
284 __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */ 284 __raw_writew(0x6010, IOMEM(0xe60581c6)); /* CGPOSR */
285 __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */ 285 __raw_writew(0x8a0a, IOMEM(0xe605810c)); /* USBCR2 */
286 286
287 /* KEYSC @ CN7 */ 287 /* KEYSC @ CN7 */
288 gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL); 288 gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL);
@@ -320,7 +320,7 @@ static void __init g3evm_init(void)
320 gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL); 320 gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL);
321 gpio_request(GPIO_FN_FRB, NULL); 321 gpio_request(GPIO_FN_FRB, NULL);
322 /* FOE, FCDE, FSC on dedicated pins */ 322 /* FOE, FCDE, FSC on dedicated pins */
323 __raw_writel(__raw_readl(0xe6158048) & ~(1 << 15), 0xe6158048); 323 __raw_writel(__raw_readl(IOMEM(0xe6158048)) & ~(1 << 15), IOMEM(0xe6158048));
324 324
325 /* IrDA */ 325 /* IrDA */
326 gpio_request(GPIO_FN_IRDA_OUT, NULL); 326 gpio_request(GPIO_FN_IRDA_OUT, NULL);
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index fa5dfc5c8ed..35c126caa4d 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -42,6 +42,8 @@
42#include <asm/mach-types.h> 42#include <asm/mach-types.h>
43#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
44 44
45#include "sh-gpio.h"
46
45/* 47/*
46 * SDHI 48 * SDHI
47 * 49 *
@@ -126,7 +128,7 @@ static void usb_host_port_power(int port, int power)
126 return; 128 return;
127 129
128 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */ 130 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
129 __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008); 131 __raw_writew(__raw_readw(IOMEM(0xe6890008)) | 0x600, IOMEM(0xe6890008));
130} 132}
131 133
132static struct r8a66597_platdata usb_host_data = { 134static struct r8a66597_platdata usb_host_data = {
@@ -270,17 +272,17 @@ static struct platform_device *g4evm_devices[] __initdata = {
270 &sdhi1_device, 272 &sdhi1_device,
271}; 273};
272 274
273#define GPIO_SDHID0_D0 0xe60520fc 275#define GPIO_SDHID0_D0 IOMEM(0xe60520fc)
274#define GPIO_SDHID0_D1 0xe60520fd 276#define GPIO_SDHID0_D1 IOMEM(0xe60520fd)
275#define GPIO_SDHID0_D2 0xe60520fe 277#define GPIO_SDHID0_D2 IOMEM(0xe60520fe)
276#define GPIO_SDHID0_D3 0xe60520ff 278#define GPIO_SDHID0_D3 IOMEM(0xe60520ff)
277#define GPIO_SDHICMD0 0xe6052100 279#define GPIO_SDHICMD0 IOMEM(0xe6052100)
278 280
279#define GPIO_SDHID1_D0 0xe6052103 281#define GPIO_SDHID1_D0 IOMEM(0xe6052103)
280#define GPIO_SDHID1_D1 0xe6052104 282#define GPIO_SDHID1_D1 IOMEM(0xe6052104)
281#define GPIO_SDHID1_D2 0xe6052105 283#define GPIO_SDHID1_D2 IOMEM(0xe6052105)
282#define GPIO_SDHID1_D3 0xe6052106 284#define GPIO_SDHID1_D3 IOMEM(0xe6052106)
283#define GPIO_SDHICMD1 0xe6052107 285#define GPIO_SDHICMD1 IOMEM(0xe6052107)
284 286
285static void __init g4evm_init(void) 287static void __init g4evm_init(void)
286{ 288{
@@ -318,10 +320,10 @@ static void __init g4evm_init(void)
318 gpio_request(GPIO_FN_IDIN, NULL); 320 gpio_request(GPIO_FN_IDIN, NULL);
319 321
320 /* setup USB phy */ 322 /* setup USB phy */
321 __raw_writew(0x0200, 0xe605810a); /* USBCR1 */ 323 __raw_writew(0x0200, IOMEM(0xe605810a)); /* USBCR1 */
322 __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */ 324 __raw_writew(0x00e0, IOMEM(0xe60581c0)); /* CPFCH */
323 __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */ 325 __raw_writew(0x6010, IOMEM(0xe60581c6)); /* CGPOSR */
324 __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */ 326 __raw_writew(0x8a0a, IOMEM(0xe605810c)); /* USBCR2 */
325 327
326 /* KEYSC @ CN31 */ 328 /* KEYSC @ CN31 */
327 gpio_request(GPIO_FN_PORT60_KEYOUT5, NULL); 329 gpio_request(GPIO_FN_PORT60_KEYOUT5, NULL);
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index 21dbe54304d..bf88f9a8b7a 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -545,6 +545,7 @@ static void __init kota2_init(void)
545} 545}
546 546
547MACHINE_START(KOTA2, "kota2") 547MACHINE_START(KOTA2, "kota2")
548 .smp = smp_ops(sh73a0_smp_ops),
548 .map_io = sh73a0_map_io, 549 .map_io = sh73a0_map_io,
549 .init_early = sh73a0_add_early_devices, 550 .init_early = sh73a0_add_early_devices,
550 .nr_irqs = NR_IRQS_LEGACY, 551 .nr_irqs = NR_IRQS_LEGACY,
diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
index 2c986eaae7b..b52bc0d1273 100644
--- a/arch/arm/mach-shmobile/board-kzm9d.c
+++ b/arch/arm/mach-shmobile/board-kzm9d.c
@@ -84,6 +84,7 @@ static const char *kzm9d_boards_compat_dt[] __initdata = {
84}; 84};
85 85
86DT_MACHINE_START(KZM9D_DT, "kzm9d") 86DT_MACHINE_START(KZM9D_DT, "kzm9d")
87 .smp = smp_ops(emev2_smp_ops),
87 .map_io = emev2_map_io, 88 .map_io = emev2_map_io,
88 .init_early = emev2_add_early_devices, 89 .init_early = emev2_add_early_devices,
89 .nr_irqs = NR_IRQS_LEGACY, 90 .nr_irqs = NR_IRQS_LEGACY,
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index 3b8a0171c3c..0a43f3189c2 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -133,8 +133,8 @@ static struct platform_device usb_host_device = {
133 133
134/* USB Func CN17 */ 134/* USB Func CN17 */
135struct usbhs_private { 135struct usbhs_private {
136 unsigned int phy; 136 void __iomem *phy;
137 unsigned int cr2; 137 void __iomem *cr2;
138 struct renesas_usbhs_platform_info info; 138 struct renesas_usbhs_platform_info info;
139}; 139};
140 140
@@ -232,8 +232,8 @@ static u32 usbhs_pipe_cfg[] = {
232}; 232};
233 233
234static struct usbhs_private usbhs_private = { 234static struct usbhs_private usbhs_private = {
235 .phy = 0xe60781e0, /* USBPHYINT */ 235 .phy = IOMEM(0xe60781e0), /* USBPHYINT */
236 .cr2 = 0xe605810c, /* USBCR2 */ 236 .cr2 = IOMEM(0xe605810c), /* USBCR2 */
237 .info = { 237 .info = {
238 .platform_callback = { 238 .platform_callback = {
239 .hardware_init = usbhs_hardware_init, 239 .hardware_init = usbhs_hardware_init,
@@ -482,12 +482,10 @@ static struct gpio_keys_button gpio_buttons[] = {
482static struct gpio_keys_platform_data gpio_key_info = { 482static struct gpio_keys_platform_data gpio_key_info = {
483 .buttons = gpio_buttons, 483 .buttons = gpio_buttons,
484 .nbuttons = ARRAY_SIZE(gpio_buttons), 484 .nbuttons = ARRAY_SIZE(gpio_buttons),
485 .poll_interval = 250, /* poling at this point */
486}; 485};
487 486
488static struct platform_device gpio_keys_device = { 487static struct platform_device gpio_keys_device = {
489 /* gpio-pcf857x.c driver doesn't support gpio_to_irq() */ 488 .name = "gpio-keys",
490 .name = "gpio-keys-polled",
491 .dev = { 489 .dev = {
492 .platform_data = &gpio_key_info, 490 .platform_data = &gpio_key_info,
493 }, 491 },
@@ -550,6 +548,7 @@ static struct platform_device fsi_ak4648_device = {
550/* I2C */ 548/* I2C */
551static struct pcf857x_platform_data pcf8575_pdata = { 549static struct pcf857x_platform_data pcf8575_pdata = {
552 .gpio_base = GPIO_PCF8575_BASE, 550 .gpio_base = GPIO_PCF8575_BASE,
551 .irq = intcs_evt2irq(0x3260), /* IRQ19 */
553}; 552};
554 553
555static struct i2c_board_info i2c0_devices[] = { 554static struct i2c_board_info i2c0_devices[] = {
@@ -763,12 +762,20 @@ static void __init kzm_init(void)
763 platform_add_devices(kzm_devices, ARRAY_SIZE(kzm_devices)); 762 platform_add_devices(kzm_devices, ARRAY_SIZE(kzm_devices));
764} 763}
765 764
765static void kzm9g_restart(char mode, const char *cmd)
766{
767#define RESCNT2 IOMEM(0xe6188020)
768 /* Do soft power on reset */
769 writel((1 << 31), RESCNT2);
770}
771
766static const char *kzm9g_boards_compat_dt[] __initdata = { 772static const char *kzm9g_boards_compat_dt[] __initdata = {
767 "renesas,kzm9g", 773 "renesas,kzm9g",
768 NULL, 774 NULL,
769}; 775};
770 776
771DT_MACHINE_START(KZM9G_DT, "kzm9g") 777DT_MACHINE_START(KZM9G_DT, "kzm9g")
778 .smp = smp_ops(sh73a0_smp_ops),
772 .map_io = sh73a0_map_io, 779 .map_io = sh73a0_map_io,
773 .init_early = sh73a0_add_early_devices, 780 .init_early = sh73a0_add_early_devices,
774 .nr_irqs = NR_IRQS_LEGACY, 781 .nr_irqs = NR_IRQS_LEGACY,
@@ -777,5 +784,6 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g")
777 .init_machine = kzm_init, 784 .init_machine = kzm_init,
778 .init_late = shmobile_init_late, 785 .init_late = shmobile_init_late,
779 .timer = &shmobile_timer, 786 .timer = &shmobile_timer,
787 .restart = kzm9g_restart,
780 .dt_compat = kzm9g_boards_compat_dt, 788 .dt_compat = kzm9g_boards_compat_dt,
781MACHINE_END 789MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index c129542f6ae..0c27c810cf9 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -64,6 +64,8 @@
64#include <asm/mach/arch.h> 64#include <asm/mach/arch.h>
65#include <asm/mach-types.h> 65#include <asm/mach-types.h>
66 66
67#include "sh-gpio.h"
68
67/* 69/*
68 * Address Interface BusWidth note 70 * Address Interface BusWidth note
69 * ------------------------------------------------------------------ 71 * ------------------------------------------------------------------
@@ -583,8 +585,8 @@ out:
583#define USBHS0_POLL_INTERVAL (HZ * 5) 585#define USBHS0_POLL_INTERVAL (HZ * 5)
584 586
585struct usbhs_private { 587struct usbhs_private {
586 unsigned int usbphyaddr; 588 void __iomem *usbphyaddr;
587 unsigned int usbcrcaddr; 589 void __iomem *usbcrcaddr;
588 struct renesas_usbhs_platform_info info; 590 struct renesas_usbhs_platform_info info;
589 struct delayed_work work; 591 struct delayed_work work;
590 struct platform_device *pdev; 592 struct platform_device *pdev;
@@ -642,7 +644,7 @@ static void usbhs0_hardware_exit(struct platform_device *pdev)
642} 644}
643 645
644static struct usbhs_private usbhs0_private = { 646static struct usbhs_private usbhs0_private = {
645 .usbcrcaddr = 0xe605810c, /* USBCR2 */ 647 .usbcrcaddr = IOMEM(0xe605810c), /* USBCR2 */
646 .info = { 648 .info = {
647 .platform_callback = { 649 .platform_callback = {
648 .hardware_init = usbhs0_hardware_init, 650 .hardware_init = usbhs0_hardware_init,
@@ -776,8 +778,8 @@ static u32 usbhs1_pipe_cfg[] = {
776}; 778};
777 779
778static struct usbhs_private usbhs1_private = { 780static struct usbhs_private usbhs1_private = {
779 .usbphyaddr = 0xe60581e2, /* USBPHY1INTAP */ 781 .usbphyaddr = IOMEM(0xe60581e2), /* USBPHY1INTAP */
780 .usbcrcaddr = 0xe6058130, /* USBCR4 */ 782 .usbcrcaddr = IOMEM(0xe6058130), /* USBCR4 */
781 .info = { 783 .info = {
782 .platform_callback = { 784 .platform_callback = {
783 .hardware_init = usbhs1_hardware_init, 785 .hardware_init = usbhs1_hardware_init,
@@ -1402,14 +1404,30 @@ static struct i2c_board_info i2c1_devices[] = {
1402 }, 1404 },
1403}; 1405};
1404 1406
1405#define GPIO_PORT9CR 0xE6051009 1407#define GPIO_PORT9CR IOMEM(0xE6051009)
1406#define GPIO_PORT10CR 0xE605100A 1408#define GPIO_PORT10CR IOMEM(0xE605100A)
1407#define GPIO_PORT167CR 0xE60520A7 1409#define GPIO_PORT167CR IOMEM(0xE60520A7)
1408#define GPIO_PORT168CR 0xE60520A8 1410#define GPIO_PORT168CR IOMEM(0xE60520A8)
1409#define SRCR4 0xe61580bc 1411#define SRCR4 IOMEM(0xe61580bc)
1410#define USCCR1 0xE6058144 1412#define USCCR1 IOMEM(0xE6058144)
1411static void __init mackerel_init(void) 1413static void __init mackerel_init(void)
1412{ 1414{
1415 struct pm_domain_device domain_devices[] = {
1416 { "A4LC", &lcdc_device, },
1417 { "A4LC", &hdmi_lcdc_device, },
1418 { "A4LC", &meram_device, },
1419 { "A4MP", &fsi_device, },
1420 { "A3SP", &usbhs0_device, },
1421 { "A3SP", &usbhs1_device, },
1422 { "A3SP", &nand_flash_device, },
1423 { "A3SP", &sh_mmcif_device, },
1424 { "A3SP", &sdhi0_device, },
1425#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1426 { "A3SP", &sdhi1_device, },
1427#endif
1428 { "A3SP", &sdhi2_device, },
1429 { "A4R", &ceu_device, },
1430 };
1413 u32 srcr4; 1431 u32 srcr4;
1414 struct clk *clk; 1432 struct clk *clk;
1415 1433
@@ -1624,20 +1642,8 @@ static void __init mackerel_init(void)
1624 1642
1625 platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices)); 1643 platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
1626 1644
1627 rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc_device); 1645 rmobile_add_devices_to_domains(domain_devices,
1628 rmobile_add_device_to_domain(&sh7372_pd_a4lc, &hdmi_lcdc_device); 1646 ARRAY_SIZE(domain_devices));
1629 rmobile_add_device_to_domain(&sh7372_pd_a4lc, &meram_device);
1630 rmobile_add_device_to_domain(&sh7372_pd_a4mp, &fsi_device);
1631 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usbhs0_device);
1632 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usbhs1_device);
1633 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &nand_flash_device);
1634 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sh_mmcif_device);
1635 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi0_device);
1636#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1637 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi1_device);
1638#endif
1639 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi2_device);
1640 rmobile_add_device_to_domain(&sh7372_pd_a4r, &ceu_device);
1641 1647
1642 hdmi_init_pm_clock(); 1648 hdmi_init_pm_clock();
1643 sh7372_pm_init(); 1649 sh7372_pm_init();
@@ -1651,6 +1657,6 @@ MACHINE_START(MACKEREL, "mackerel")
1651 .init_irq = sh7372_init_irq, 1657 .init_irq = sh7372_init_irq,
1652 .handle_irq = shmobile_handle_irq_intc, 1658 .handle_irq = shmobile_handle_irq_intc,
1653 .init_machine = mackerel_init, 1659 .init_machine = mackerel_init,
1654 .init_late = shmobile_init_late, 1660 .init_late = sh7372_pm_init_late,
1655 .timer = &shmobile_timer, 1661 .timer = &shmobile_timer,
1656MACHINE_END 1662MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index fcf5a47f477..b8a7525a4e2 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -30,6 +30,8 @@
30#include <linux/regulator/fixed.h> 30#include <linux/regulator/fixed.h>
31#include <linux/regulator/machine.h> 31#include <linux/regulator/machine.h>
32#include <linux/smsc911x.h> 32#include <linux/smsc911x.h>
33#include <linux/mmc/sh_mobile_sdhi.h>
34#include <linux/mfd/tmio.h>
33#include <mach/hardware.h> 35#include <mach/hardware.h>
34#include <mach/r8a7779.h> 36#include <mach/r8a7779.h>
35#include <mach/common.h> 37#include <mach/common.h>
@@ -39,6 +41,12 @@
39#include <asm/hardware/gic.h> 41#include <asm/hardware/gic.h>
40#include <asm/traps.h> 42#include <asm/traps.h>
41 43
44/* Fixed 3.3V regulator to be used by SDHI0 */
45static struct regulator_consumer_supply fixed3v3_power_consumers[] = {
46 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
47 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
48};
49
42/* Dummy supplies, where voltage doesn't matter */ 50/* Dummy supplies, where voltage doesn't matter */
43static struct regulator_consumer_supply dummy_supplies[] = { 51static struct regulator_consumer_supply dummy_supplies[] = {
44 REGULATOR_SUPPLY("vddvario", "smsc911x"), 52 REGULATOR_SUPPLY("vddvario", "smsc911x"),
@@ -75,13 +83,61 @@ static struct platform_device eth_device = {
75 .num_resources = ARRAY_SIZE(smsc911x_resources), 83 .num_resources = ARRAY_SIZE(smsc911x_resources),
76}; 84};
77 85
86static struct resource sdhi0_resources[] = {
87 [0] = {
88 .name = "sdhi0",
89 .start = 0xffe4c000,
90 .end = 0xffe4c0ff,
91 .flags = IORESOURCE_MEM,
92 },
93 [1] = {
94 .start = gic_spi(104),
95 .flags = IORESOURCE_IRQ,
96 },
97};
98
99static struct sh_mobile_sdhi_info sdhi0_platform_data = {
100 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
101 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
102};
103
104static struct platform_device sdhi0_device = {
105 .name = "sh_mobile_sdhi",
106 .num_resources = ARRAY_SIZE(sdhi0_resources),
107 .resource = sdhi0_resources,
108 .id = 0,
109 .dev = {
110 .platform_data = &sdhi0_platform_data,
111 }
112};
113
114/* Thermal */
115static struct resource thermal_resources[] = {
116 [0] = {
117 .start = 0xFFC48000,
118 .end = 0xFFC48038 - 1,
119 .flags = IORESOURCE_MEM,
120 },
121};
122
123static struct platform_device thermal_device = {
124 .name = "rcar_thermal",
125 .resource = thermal_resources,
126 .num_resources = ARRAY_SIZE(thermal_resources),
127};
128
78static struct platform_device *marzen_devices[] __initdata = { 129static struct platform_device *marzen_devices[] __initdata = {
79 &eth_device, 130 &eth_device,
131 &sdhi0_device,
132 &thermal_device,
80}; 133};
81 134
82static void __init marzen_init(void) 135static void __init marzen_init(void)
83{ 136{
84 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); 137 regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
138 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
139 regulator_register_fixed(1, dummy_supplies,
140 ARRAY_SIZE(dummy_supplies));
85 141
86 r8a7779_pinmux_init(); 142 r8a7779_pinmux_init();
87 143
@@ -97,11 +153,22 @@ static void __init marzen_init(void)
97 gpio_request(GPIO_FN_EX_CS0, NULL); /* nCS */ 153 gpio_request(GPIO_FN_EX_CS0, NULL); /* nCS */
98 gpio_request(GPIO_FN_IRQ1_B, NULL); /* IRQ + PME */ 154 gpio_request(GPIO_FN_IRQ1_B, NULL); /* IRQ + PME */
99 155
156 /* SD0 (CN20) */
157 gpio_request(GPIO_FN_SD0_CLK, NULL);
158 gpio_request(GPIO_FN_SD0_CMD, NULL);
159 gpio_request(GPIO_FN_SD0_DAT0, NULL);
160 gpio_request(GPIO_FN_SD0_DAT1, NULL);
161 gpio_request(GPIO_FN_SD0_DAT2, NULL);
162 gpio_request(GPIO_FN_SD0_DAT3, NULL);
163 gpio_request(GPIO_FN_SD0_CD, NULL);
164 gpio_request(GPIO_FN_SD0_WP, NULL);
165
100 r8a7779_add_standard_devices(); 166 r8a7779_add_standard_devices();
101 platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices)); 167 platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
102} 168}
103 169
104MACHINE_START(MARZEN, "marzen") 170MACHINE_START(MARZEN, "marzen")
171 .smp = smp_ops(r8a7779_smp_ops),
105 .map_io = r8a7779_map_io, 172 .map_io = r8a7779_map_io,
106 .init_early = r8a7779_add_early_devices, 173 .init_early = r8a7779_add_early_devices,
107 .nr_irqs = NR_IRQS_LEGACY, 174 .nr_irqs = NR_IRQS_LEGACY,
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index ad5fccc7b5e..6729e003218 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -41,29 +41,29 @@
41 */ 41 */
42 42
43/* CPG registers */ 43/* CPG registers */
44#define FRQCRA 0xe6150000 44#define FRQCRA IOMEM(0xe6150000)
45#define FRQCRB 0xe6150004 45#define FRQCRB IOMEM(0xe6150004)
46#define VCLKCR1 0xE6150008 46#define VCLKCR1 IOMEM(0xE6150008)
47#define VCLKCR2 0xE615000c 47#define VCLKCR2 IOMEM(0xE615000c)
48#define FRQCRC 0xe61500e0 48#define FRQCRC IOMEM(0xe61500e0)
49#define FSIACKCR 0xe6150018 49#define FSIACKCR IOMEM(0xe6150018)
50#define PLLC01CR 0xe6150028 50#define PLLC01CR IOMEM(0xe6150028)
51 51
52#define SUBCKCR 0xe6150080 52#define SUBCKCR IOMEM(0xe6150080)
53#define USBCKCR 0xe615008c 53#define USBCKCR IOMEM(0xe615008c)
54 54
55#define MSTPSR0 0xe6150030 55#define MSTPSR0 IOMEM(0xe6150030)
56#define MSTPSR1 0xe6150038 56#define MSTPSR1 IOMEM(0xe6150038)
57#define MSTPSR2 0xe6150040 57#define MSTPSR2 IOMEM(0xe6150040)
58#define MSTPSR3 0xe6150048 58#define MSTPSR3 IOMEM(0xe6150048)
59#define MSTPSR4 0xe615004c 59#define MSTPSR4 IOMEM(0xe615004c)
60#define FSIBCKCR 0xe6150090 60#define FSIBCKCR IOMEM(0xe6150090)
61#define HDMICKCR 0xe6150094 61#define HDMICKCR IOMEM(0xe6150094)
62#define SMSTPCR0 0xe6150130 62#define SMSTPCR0 IOMEM(0xe6150130)
63#define SMSTPCR1 0xe6150134 63#define SMSTPCR1 IOMEM(0xe6150134)
64#define SMSTPCR2 0xe6150138 64#define SMSTPCR2 IOMEM(0xe6150138)
65#define SMSTPCR3 0xe615013c 65#define SMSTPCR3 IOMEM(0xe615013c)
66#define SMSTPCR4 0xe6150140 66#define SMSTPCR4 IOMEM(0xe6150140)
67 67
68/* Fixed 32 KHz root clock from EXTALR pin */ 68/* Fixed 32 KHz root clock from EXTALR pin */
69static struct clk extalr_clk = { 69static struct clk extalr_clk = {
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
index 339c62c824d..3cafb6ab5e9 100644
--- a/arch/arm/mach-shmobile/clock-r8a7779.c
+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
@@ -86,11 +86,16 @@ static struct clk div4_clks[DIV4_NR] = {
86 0x0300, CLK_ENABLE_ON_INIT), 86 0x0300, CLK_ENABLE_ON_INIT),
87}; 87};
88 88
89enum { MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, 89enum { MSTP323, MSTP322, MSTP321, MSTP320,
90 MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
90 MSTP016, MSTP015, MSTP014, 91 MSTP016, MSTP015, MSTP014,
91 MSTP_NR }; 92 MSTP_NR };
92 93
93static struct clk mstp_clks[MSTP_NR] = { 94static struct clk mstp_clks[MSTP_NR] = {
95 [MSTP323] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 23, 0), /* SDHI0 */
96 [MSTP322] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 22, 0), /* SDHI1 */
97 [MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0), /* SDHI2 */
98 [MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0), /* SDHI3 */
94 [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0), /* SCIF0 */ 99 [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0), /* SCIF0 */
95 [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0), /* SCIF1 */ 100 [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0), /* SCIF1 */
96 [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0), /* SCIF2 */ 101 [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0), /* SCIF2 */
@@ -149,6 +154,10 @@ static struct clk_lookup lookups[] = {
149 CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */ 154 CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */
150 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */ 155 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
151 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */ 156 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
157 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
158 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
159 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
160 CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */
152}; 161};
153 162
154void __init r8a7779_clock_init(void) 163void __init r8a7779_clock_init(void)
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
index 162b791b898..ef0a95e592c 100644
--- a/arch/arm/mach-shmobile/clock-sh7367.c
+++ b/arch/arm/mach-shmobile/clock-sh7367.c
@@ -24,28 +24,28 @@
24#include <mach/common.h> 24#include <mach/common.h>
25 25
26/* SH7367 registers */ 26/* SH7367 registers */
27#define RTFRQCR 0xe6150000 27#define RTFRQCR IOMEM(0xe6150000)
28#define SYFRQCR 0xe6150004 28#define SYFRQCR IOMEM(0xe6150004)
29#define CMFRQCR 0xe61500E0 29#define CMFRQCR IOMEM(0xe61500E0)
30#define VCLKCR1 0xe6150008 30#define VCLKCR1 IOMEM(0xe6150008)
31#define VCLKCR2 0xe615000C 31#define VCLKCR2 IOMEM(0xe615000C)
32#define VCLKCR3 0xe615001C 32#define VCLKCR3 IOMEM(0xe615001C)
33#define SCLKACR 0xe6150010 33#define SCLKACR IOMEM(0xe6150010)
34#define SCLKBCR 0xe6150014 34#define SCLKBCR IOMEM(0xe6150014)
35#define SUBUSBCKCR 0xe6158080 35#define SUBUSBCKCR IOMEM(0xe6158080)
36#define SPUCKCR 0xe6150084 36#define SPUCKCR IOMEM(0xe6150084)
37#define MSUCKCR 0xe6150088 37#define MSUCKCR IOMEM(0xe6150088)
38#define MVI3CKCR 0xe6150090 38#define MVI3CKCR IOMEM(0xe6150090)
39#define VOUCKCR 0xe6150094 39#define VOUCKCR IOMEM(0xe6150094)
40#define MFCK1CR 0xe6150098 40#define MFCK1CR IOMEM(0xe6150098)
41#define MFCK2CR 0xe615009C 41#define MFCK2CR IOMEM(0xe615009C)
42#define PLLC1CR 0xe6150028 42#define PLLC1CR IOMEM(0xe6150028)
43#define PLLC2CR 0xe615002C 43#define PLLC2CR IOMEM(0xe615002C)
44#define RTMSTPCR0 0xe6158030 44#define RTMSTPCR0 IOMEM(0xe6158030)
45#define RTMSTPCR2 0xe6158038 45#define RTMSTPCR2 IOMEM(0xe6158038)
46#define SYMSTPCR0 0xe6158040 46#define SYMSTPCR0 IOMEM(0xe6158040)
47#define SYMSTPCR2 0xe6158048 47#define SYMSTPCR2 IOMEM(0xe6158048)
48#define CMMSTPCR0 0xe615804c 48#define CMMSTPCR0 IOMEM(0xe615804c)
49 49
50/* Fixed 32 KHz root clock from EXTALR pin */ 50/* Fixed 32 KHz root clock from EXTALR pin */
51static struct clk r_clk = { 51static struct clk r_clk = {
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 5a2894b1c96..430a90ffa12 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -24,36 +24,36 @@
24#include <mach/common.h> 24#include <mach/common.h>
25 25
26/* SH7372 registers */ 26/* SH7372 registers */
27#define FRQCRA 0xe6150000 27#define FRQCRA IOMEM(0xe6150000)
28#define FRQCRB 0xe6150004 28#define FRQCRB IOMEM(0xe6150004)
29#define FRQCRC 0xe61500e0 29#define FRQCRC IOMEM(0xe61500e0)
30#define FRQCRD 0xe61500e4 30#define FRQCRD IOMEM(0xe61500e4)
31#define VCLKCR1 0xe6150008 31#define VCLKCR1 IOMEM(0xe6150008)
32#define VCLKCR2 0xe615000c 32#define VCLKCR2 IOMEM(0xe615000c)
33#define VCLKCR3 0xe615001c 33#define VCLKCR3 IOMEM(0xe615001c)
34#define FMSICKCR 0xe6150010 34#define FMSICKCR IOMEM(0xe6150010)
35#define FMSOCKCR 0xe6150014 35#define FMSOCKCR IOMEM(0xe6150014)
36#define FSIACKCR 0xe6150018 36#define FSIACKCR IOMEM(0xe6150018)
37#define FSIBCKCR 0xe6150090 37#define FSIBCKCR IOMEM(0xe6150090)
38#define SUBCKCR 0xe6150080 38#define SUBCKCR IOMEM(0xe6150080)
39#define SPUCKCR 0xe6150084 39#define SPUCKCR IOMEM(0xe6150084)
40#define VOUCKCR 0xe6150088 40#define VOUCKCR IOMEM(0xe6150088)
41#define HDMICKCR 0xe6150094 41#define HDMICKCR IOMEM(0xe6150094)
42#define DSITCKCR 0xe6150060 42#define DSITCKCR IOMEM(0xe6150060)
43#define DSI0PCKCR 0xe6150064 43#define DSI0PCKCR IOMEM(0xe6150064)
44#define DSI1PCKCR 0xe6150098 44#define DSI1PCKCR IOMEM(0xe6150098)
45#define PLLC01CR 0xe6150028 45#define PLLC01CR IOMEM(0xe6150028)
46#define PLLC2CR 0xe615002c 46#define PLLC2CR IOMEM(0xe615002c)
47#define RMSTPCR0 0xe6150110 47#define RMSTPCR0 IOMEM(0xe6150110)
48#define RMSTPCR1 0xe6150114 48#define RMSTPCR1 IOMEM(0xe6150114)
49#define RMSTPCR2 0xe6150118 49#define RMSTPCR2 IOMEM(0xe6150118)
50#define RMSTPCR3 0xe615011c 50#define RMSTPCR3 IOMEM(0xe615011c)
51#define RMSTPCR4 0xe6150120 51#define RMSTPCR4 IOMEM(0xe6150120)
52#define SMSTPCR0 0xe6150130 52#define SMSTPCR0 IOMEM(0xe6150130)
53#define SMSTPCR1 0xe6150134 53#define SMSTPCR1 IOMEM(0xe6150134)
54#define SMSTPCR2 0xe6150138 54#define SMSTPCR2 IOMEM(0xe6150138)
55#define SMSTPCR3 0xe615013c 55#define SMSTPCR3 IOMEM(0xe615013c)
56#define SMSTPCR4 0xe6150140 56#define SMSTPCR4 IOMEM(0xe6150140)
57 57
58#define FSIDIVA 0xFE1F8000 58#define FSIDIVA 0xFE1F8000
59#define FSIDIVB 0xFE1F8008 59#define FSIDIVB 0xFE1F8008
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c
index 85f2a3ec2c4..b8480d19e1c 100644
--- a/arch/arm/mach-shmobile/clock-sh7377.c
+++ b/arch/arm/mach-shmobile/clock-sh7377.c
@@ -24,31 +24,31 @@
24#include <mach/common.h> 24#include <mach/common.h>
25 25
26/* SH7377 registers */ 26/* SH7377 registers */
27#define RTFRQCR 0xe6150000 27#define RTFRQCR IOMEM(0xe6150000)
28#define SYFRQCR 0xe6150004 28#define SYFRQCR IOMEM(0xe6150004)
29#define CMFRQCR 0xe61500E0 29#define CMFRQCR IOMEM(0xe61500E0)
30#define VCLKCR1 0xe6150008 30#define VCLKCR1 IOMEM(0xe6150008)
31#define VCLKCR2 0xe615000C 31#define VCLKCR2 IOMEM(0xe615000C)
32#define VCLKCR3 0xe615001C 32#define VCLKCR3 IOMEM(0xe615001C)
33#define FMSICKCR 0xe6150010 33#define FMSICKCR IOMEM(0xe6150010)
34#define FMSOCKCR 0xe6150014 34#define FMSOCKCR IOMEM(0xe6150014)
35#define FSICKCR 0xe6150018 35#define FSICKCR IOMEM(0xe6150018)
36#define PLLC1CR 0xe6150028 36#define PLLC1CR IOMEM(0xe6150028)
37#define PLLC2CR 0xe615002C 37#define PLLC2CR IOMEM(0xe615002C)
38#define SUBUSBCKCR 0xe6150080 38#define SUBUSBCKCR IOMEM(0xe6150080)
39#define SPUCKCR 0xe6150084 39#define SPUCKCR IOMEM(0xe6150084)
40#define MSUCKCR 0xe6150088 40#define MSUCKCR IOMEM(0xe6150088)
41#define MVI3CKCR 0xe6150090 41#define MVI3CKCR IOMEM(0xe6150090)
42#define HDMICKCR 0xe6150094 42#define HDMICKCR IOMEM(0xe6150094)
43#define MFCK1CR 0xe6150098 43#define MFCK1CR IOMEM(0xe6150098)
44#define MFCK2CR 0xe615009C 44#define MFCK2CR IOMEM(0xe615009C)
45#define DSITCKCR 0xe6150060 45#define DSITCKCR IOMEM(0xe6150060)
46#define DSIPCKCR 0xe6150064 46#define DSIPCKCR IOMEM(0xe6150064)
47#define SMSTPCR0 0xe6150130 47#define SMSTPCR0 IOMEM(0xe6150130)
48#define SMSTPCR1 0xe6150134 48#define SMSTPCR1 IOMEM(0xe6150134)
49#define SMSTPCR2 0xe6150138 49#define SMSTPCR2 IOMEM(0xe6150138)
50#define SMSTPCR3 0xe615013C 50#define SMSTPCR3 IOMEM(0xe615013C)
51#define SMSTPCR4 0xe6150140 51#define SMSTPCR4 IOMEM(0xe6150140)
52 52
53/* Fixed 32 KHz root clock from EXTALR pin */ 53/* Fixed 32 KHz root clock from EXTALR pin */
54static struct clk r_clk = { 54static struct clk r_clk = {
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 7f8da18a858..516ff7f3e43 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -23,43 +23,43 @@
23#include <linux/clkdev.h> 23#include <linux/clkdev.h>
24#include <mach/common.h> 24#include <mach/common.h>
25 25
26#define FRQCRA 0xe6150000 26#define FRQCRA IOMEM(0xe6150000)
27#define FRQCRB 0xe6150004 27#define FRQCRB IOMEM(0xe6150004)
28#define FRQCRD 0xe61500e4 28#define FRQCRD IOMEM(0xe61500e4)
29#define VCLKCR1 0xe6150008 29#define VCLKCR1 IOMEM(0xe6150008)
30#define VCLKCR2 0xe615000C 30#define VCLKCR2 IOMEM(0xe615000C)
31#define VCLKCR3 0xe615001C 31#define VCLKCR3 IOMEM(0xe615001C)
32#define ZBCKCR 0xe6150010 32#define ZBCKCR IOMEM(0xe6150010)
33#define FLCKCR 0xe6150014 33#define FLCKCR IOMEM(0xe6150014)
34#define SD0CKCR 0xe6150074 34#define SD0CKCR IOMEM(0xe6150074)
35#define SD1CKCR 0xe6150078 35#define SD1CKCR IOMEM(0xe6150078)
36#define SD2CKCR 0xe615007C 36#define SD2CKCR IOMEM(0xe615007C)
37#define FSIACKCR 0xe6150018 37#define FSIACKCR IOMEM(0xe6150018)
38#define FSIBCKCR 0xe6150090 38#define FSIBCKCR IOMEM(0xe6150090)
39#define SUBCKCR 0xe6150080 39#define SUBCKCR IOMEM(0xe6150080)
40#define SPUACKCR 0xe6150084 40#define SPUACKCR IOMEM(0xe6150084)
41#define SPUVCKCR 0xe6150094 41#define SPUVCKCR IOMEM(0xe6150094)
42#define MSUCKCR 0xe6150088 42#define MSUCKCR IOMEM(0xe6150088)
43#define HSICKCR 0xe615008C 43#define HSICKCR IOMEM(0xe615008C)
44#define MFCK1CR 0xe6150098 44#define MFCK1CR IOMEM(0xe6150098)
45#define MFCK2CR 0xe615009C 45#define MFCK2CR IOMEM(0xe615009C)
46#define DSITCKCR 0xe6150060 46#define DSITCKCR IOMEM(0xe6150060)
47#define DSI0PCKCR 0xe6150064 47#define DSI0PCKCR IOMEM(0xe6150064)
48#define DSI1PCKCR 0xe6150068 48#define DSI1PCKCR IOMEM(0xe6150068)
49#define DSI0PHYCR 0xe615006C 49#define DSI0PHYCR 0xe615006C
50#define DSI1PHYCR 0xe6150070 50#define DSI1PHYCR 0xe6150070
51#define PLLECR 0xe61500d0 51#define PLLECR IOMEM(0xe61500d0)
52#define PLL0CR 0xe61500d8 52#define PLL0CR IOMEM(0xe61500d8)
53#define PLL1CR 0xe6150028 53#define PLL1CR IOMEM(0xe6150028)
54#define PLL2CR 0xe615002c 54#define PLL2CR IOMEM(0xe615002c)
55#define PLL3CR 0xe61500dc 55#define PLL3CR IOMEM(0xe61500dc)
56#define SMSTPCR0 0xe6150130 56#define SMSTPCR0 IOMEM(0xe6150130)
57#define SMSTPCR1 0xe6150134 57#define SMSTPCR1 IOMEM(0xe6150134)
58#define SMSTPCR2 0xe6150138 58#define SMSTPCR2 IOMEM(0xe6150138)
59#define SMSTPCR3 0xe615013c 59#define SMSTPCR3 IOMEM(0xe615013c)
60#define SMSTPCR4 0xe6150140 60#define SMSTPCR4 IOMEM(0xe6150140)
61#define SMSTPCR5 0xe6150144 61#define SMSTPCR5 IOMEM(0xe6150144)
62#define CKSCR 0xe61500c0 62#define CKSCR IOMEM(0xe61500c0)
63 63
64/* Fixed 32 KHz root clock from EXTALR pin */ 64/* Fixed 32 KHz root clock from EXTALR pin */
65static struct clk r_clk = { 65static struct clk r_clk = {
diff --git a/arch/arm/mach-shmobile/common.c b/arch/arm/mach-shmobile/common.c
deleted file mode 100644
index 608aba9d60d..00000000000
--- a/arch/arm/mach-shmobile/common.c
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; version 2 of the License.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
14 *
15 */
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <mach/common.h>
19
20void __init shmobile_init_late(void)
21{
22 shmobile_suspend_init();
23 shmobile_cpuidle_init();
24}
diff --git a/arch/arm/mach-shmobile/cpuidle.c b/arch/arm/mach-shmobile/cpuidle.c
index 7b541e911ab..9e050268cde 100644
--- a/arch/arm/mach-shmobile/cpuidle.c
+++ b/arch/arm/mach-shmobile/cpuidle.c
@@ -16,51 +16,38 @@
16#include <asm/cpuidle.h> 16#include <asm/cpuidle.h>
17#include <asm/io.h> 17#include <asm/io.h>
18 18
19static void shmobile_enter_wfi(void) 19int shmobile_enter_wfi(struct cpuidle_device *dev, struct cpuidle_driver *drv,
20 int index)
20{ 21{
21 cpu_do_idle(); 22 cpu_do_idle();
22} 23 return 0;
23
24void (*shmobile_cpuidle_modes[CPUIDLE_STATE_MAX])(void) = {
25 shmobile_enter_wfi, /* regular sleep mode */
26};
27
28static int shmobile_cpuidle_enter(struct cpuidle_device *dev,
29 struct cpuidle_driver *drv,
30 int index)
31{
32 shmobile_cpuidle_modes[index]();
33
34 return index;
35} 24}
36 25
37static struct cpuidle_device shmobile_cpuidle_dev; 26static struct cpuidle_device shmobile_cpuidle_dev;
38static struct cpuidle_driver shmobile_cpuidle_driver = { 27static struct cpuidle_driver shmobile_cpuidle_default_driver = {
39 .name = "shmobile_cpuidle", 28 .name = "shmobile_cpuidle",
40 .owner = THIS_MODULE, 29 .owner = THIS_MODULE,
41 .en_core_tk_irqen = 1, 30 .en_core_tk_irqen = 1,
42 .states[0] = ARM_CPUIDLE_WFI_STATE, 31 .states[0] = ARM_CPUIDLE_WFI_STATE,
32 .states[0].enter = shmobile_enter_wfi,
43 .safe_state_index = 0, /* C1 */ 33 .safe_state_index = 0, /* C1 */
44 .state_count = 1, 34 .state_count = 1,
45}; 35};
46 36
47void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv); 37static struct cpuidle_driver *cpuidle_drv = &shmobile_cpuidle_default_driver;
38
39void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv)
40{
41 cpuidle_drv = drv;
42}
48 43
49int shmobile_cpuidle_init(void) 44int shmobile_cpuidle_init(void)
50{ 45{
51 struct cpuidle_device *dev = &shmobile_cpuidle_dev; 46 struct cpuidle_device *dev = &shmobile_cpuidle_dev;
52 struct cpuidle_driver *drv = &shmobile_cpuidle_driver;
53 int i;
54
55 for (i = 0; i < CPUIDLE_STATE_MAX; i++)
56 drv->states[i].enter = shmobile_cpuidle_enter;
57
58 if (shmobile_cpuidle_setup)
59 shmobile_cpuidle_setup(drv);
60 47
61 cpuidle_register_driver(drv); 48 cpuidle_register_driver(cpuidle_drv);
62 49
63 dev->state_count = drv->state_count; 50 dev->state_count = cpuidle_drv->state_count;
64 cpuidle_register_device(dev); 51 cpuidle_register_device(dev);
65 52
66 return 0; 53 return 0;
diff --git a/arch/arm/mach-shmobile/hotplug.c b/arch/arm/mach-shmobile/hotplug.c
index 828d22f3af5..b09a0bdbf81 100644
--- a/arch/arm/mach-shmobile/hotplug.c
+++ b/arch/arm/mach-shmobile/hotplug.c
@@ -14,30 +14,16 @@
14#include <linux/smp.h> 14#include <linux/smp.h>
15#include <linux/cpumask.h> 15#include <linux/cpumask.h>
16#include <linux/delay.h> 16#include <linux/delay.h>
17#include <linux/of.h>
17#include <mach/common.h> 18#include <mach/common.h>
19#include <mach/r8a7779.h>
20#include <mach/emev2.h>
18#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
22#include <asm/mach-types.h>
19 23
20static cpumask_t dead_cpus; 24static cpumask_t dead_cpus;
21 25
22int platform_cpu_kill(unsigned int cpu) 26void shmobile_cpu_die(unsigned int cpu)
23{
24 int k;
25
26 /* this function is running on another CPU than the offline target,
27 * here we need wait for shutdown code in platform_cpu_die() to
28 * finish before asking SoC-specific code to power off the CPU core.
29 */
30 for (k = 0; k < 1000; k++) {
31 if (cpumask_test_cpu(cpu, &dead_cpus))
32 return shmobile_platform_cpu_kill(cpu);
33
34 mdelay(1);
35 }
36
37 return 0;
38}
39
40void platform_cpu_die(unsigned int cpu)
41{ 27{
42 /* hardware shutdown code running on the CPU that is being offlined */ 28 /* hardware shutdown code running on the CPU that is being offlined */
43 flush_cache_all(); 29 flush_cache_all();
@@ -60,7 +46,7 @@ void platform_cpu_die(unsigned int cpu)
60 } 46 }
61} 47}
62 48
63int platform_cpu_disable(unsigned int cpu) 49int shmobile_cpu_disable(unsigned int cpu)
64{ 50{
65 cpumask_clear_cpu(cpu, &dead_cpus); 51 cpumask_clear_cpu(cpu, &dead_cpus);
66 /* 52 /*
@@ -69,3 +55,8 @@ int platform_cpu_disable(unsigned int cpu)
69 */ 55 */
70 return cpu == 0 ? -EPERM : 0; 56 return cpu == 0 ? -EPERM : 0;
71} 57}
58
59int shmobile_cpu_is_dead(unsigned int cpu)
60{
61 return cpumask_test_cpu(cpu, &dead_cpus);
62}
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 45e61dada03..ed77ab8c914 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -4,18 +4,19 @@
4extern void shmobile_earlytimer_init(void); 4extern void shmobile_earlytimer_init(void);
5extern struct sys_timer shmobile_timer; 5extern struct sys_timer shmobile_timer;
6extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz, 6extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
7 unsigned int mult, unsigned int div); 7 unsigned int mult, unsigned int div);
8struct twd_local_timer; 8struct twd_local_timer;
9extern void shmobile_setup_console(void); 9extern void shmobile_setup_console(void);
10extern void shmobile_secondary_vector(void); 10extern void shmobile_secondary_vector(void);
11extern int shmobile_platform_cpu_kill(unsigned int cpu);
12struct clk; 11struct clk;
13extern int shmobile_clk_init(void); 12extern int shmobile_clk_init(void);
14extern void shmobile_handle_irq_intc(struct pt_regs *); 13extern void shmobile_handle_irq_intc(struct pt_regs *);
15extern struct platform_suspend_ops shmobile_suspend_ops; 14extern struct platform_suspend_ops shmobile_suspend_ops;
16struct cpuidle_driver; 15struct cpuidle_driver;
17extern void (*shmobile_cpuidle_modes[])(void); 16struct cpuidle_device;
18extern void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv); 17extern int shmobile_enter_wfi(struct cpuidle_device *dev,
18 struct cpuidle_driver *drv, int index);
19extern void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv);
19 20
20extern void sh7367_init_irq(void); 21extern void sh7367_init_irq(void);
21extern void sh7367_map_io(void); 22extern void sh7367_map_io(void);
@@ -58,11 +59,6 @@ extern struct clk sh73a0_extal2_clk;
58extern struct clk sh73a0_extcki_clk; 59extern struct clk sh73a0_extcki_clk;
59extern struct clk sh73a0_extalr_clk; 60extern struct clk sh73a0_extalr_clk;
60 61
61extern unsigned int sh73a0_get_core_count(void);
62extern void sh73a0_secondary_init(unsigned int cpu);
63extern int sh73a0_boot_secondary(unsigned int cpu);
64extern void sh73a0_smp_prepare_cpus(void);
65
66extern void r8a7740_init_irq(void); 62extern void r8a7740_init_irq(void);
67extern void r8a7740_map_io(void); 63extern void r8a7740_map_io(void);
68extern void r8a7740_add_early_devices(void); 64extern void r8a7740_add_early_devices(void);
@@ -79,15 +75,8 @@ extern void r8a7779_pinmux_init(void);
79extern void r8a7779_pm_init(void); 75extern void r8a7779_pm_init(void);
80extern void r8a7740_meram_workaround(void); 76extern void r8a7740_meram_workaround(void);
81 77
82extern unsigned int r8a7779_get_core_count(void);
83extern int r8a7779_platform_cpu_kill(unsigned int cpu);
84extern void r8a7779_secondary_init(unsigned int cpu);
85extern int r8a7779_boot_secondary(unsigned int cpu);
86extern void r8a7779_smp_prepare_cpus(void);
87extern void r8a7779_register_twd(void); 78extern void r8a7779_register_twd(void);
88 79
89extern void shmobile_init_late(void);
90
91#ifdef CONFIG_SUSPEND 80#ifdef CONFIG_SUSPEND
92int shmobile_suspend_init(void); 81int shmobile_suspend_init(void);
93#else 82#else
@@ -100,4 +89,21 @@ int shmobile_cpuidle_init(void);
100static inline int shmobile_cpuidle_init(void) { return 0; } 89static inline int shmobile_cpuidle_init(void) { return 0; }
101#endif 90#endif
102 91
92extern void shmobile_cpu_die(unsigned int cpu);
93extern int shmobile_cpu_disable(unsigned int cpu);
94
95#ifdef CONFIG_HOTPLUG_CPU
96extern int shmobile_cpu_is_dead(unsigned int cpu);
97#else
98static inline int shmobile_cpu_is_dead(unsigned int cpu) { return 1; }
99#endif
100
101extern void shmobile_smp_init_cpus(unsigned int ncores);
102
103static inline void shmobile_init_late(void)
104{
105 shmobile_suspend_init();
106 shmobile_cpuidle_init();
107}
108
103#endif /* __ARCH_MACH_COMMON_H */ 109#endif /* __ARCH_MACH_COMMON_H */
diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h
index e6b0c1bf4b7..ac3751705ca 100644
--- a/arch/arm/mach-shmobile/include/mach/emev2.h
+++ b/arch/arm/mach-shmobile/include/mach/emev2.h
@@ -7,13 +7,10 @@ extern void emev2_add_early_devices(void);
7extern void emev2_add_standard_devices(void); 7extern void emev2_add_standard_devices(void);
8extern void emev2_clock_init(void); 8extern void emev2_clock_init(void);
9extern void emev2_set_boot_vector(unsigned long value); 9extern void emev2_set_boot_vector(unsigned long value);
10extern unsigned int emev2_get_core_count(void);
11extern int emev2_platform_cpu_kill(unsigned int cpu);
12extern void emev2_secondary_init(unsigned int cpu);
13extern int emev2_boot_secondary(unsigned int cpu);
14extern void emev2_smp_prepare_cpus(void);
15 10
16#define EMEV2_GPIO_BASE 200 11#define EMEV2_GPIO_BASE 200
17#define EMEV2_GPIO_IRQ(n) (EMEV2_GPIO_BASE + (n)) 12#define EMEV2_GPIO_IRQ(n) (EMEV2_GPIO_BASE + (n))
18 13
14extern struct smp_operations emev2_smp_ops;
15
19#endif /* __ASM_EMEV2_H__ */ 16#endif /* __ASM_EMEV2_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/pm-rmobile.h b/arch/arm/mach-shmobile/include/mach/pm-rmobile.h
index 5a402840fe2..690553a0688 100644
--- a/arch/arm/mach-shmobile/include/mach/pm-rmobile.h
+++ b/arch/arm/mach-shmobile/include/mach/pm-rmobile.h
@@ -12,6 +12,8 @@
12 12
13#include <linux/pm_domain.h> 13#include <linux/pm_domain.h>
14 14
15#define DEFAULT_DEV_LATENCY_NS 250000
16
15struct platform_device; 17struct platform_device;
16 18
17struct rmobile_pm_domain { 19struct rmobile_pm_domain {
@@ -29,16 +31,33 @@ struct rmobile_pm_domain *to_rmobile_pd(struct generic_pm_domain *d)
29 return container_of(d, struct rmobile_pm_domain, genpd); 31 return container_of(d, struct rmobile_pm_domain, genpd);
30} 32}
31 33
34struct pm_domain_device {
35 const char *domain_name;
36 struct platform_device *pdev;
37};
38
32#ifdef CONFIG_PM 39#ifdef CONFIG_PM
33extern void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd); 40extern void rmobile_init_domains(struct rmobile_pm_domain domains[], int num);
34extern void rmobile_add_device_to_domain(struct rmobile_pm_domain *rmobile_pd, 41extern void rmobile_add_device_to_domain_td(const char *domain_name,
35 struct platform_device *pdev); 42 struct platform_device *pdev,
36extern void rmobile_pm_add_subdomain(struct rmobile_pm_domain *rmobile_pd, 43 struct gpd_timing_data *td);
37 struct rmobile_pm_domain *rmobile_sd); 44
45static inline void rmobile_add_device_to_domain(const char *domain_name,
46 struct platform_device *pdev)
47{
48 rmobile_add_device_to_domain_td(domain_name, pdev, NULL);
49}
50
51extern void rmobile_add_devices_to_domains(struct pm_domain_device data[],
52 int size);
38#else 53#else
39#define rmobile_init_pm_domain(pd) do { } while (0) 54
40#define rmobile_add_device_to_domain(pd, pdev) do { } while (0) 55#define rmobile_init_domains(domains, num) do { } while (0)
41#define rmobile_pm_add_subdomain(pd, sd) do { } while (0) 56#define rmobile_add_device_to_domain_td(name, pdev, td) do { } while (0)
57#define rmobile_add_device_to_domain(name, pdev) do { } while (0)
58
59static inline void rmobile_add_devices_to_domains(struct pm_domain_device d[],
60 int size) {}
42#endif /* CONFIG_PM */ 61#endif /* CONFIG_PM */
43 62
44#endif /* PM_RMOBILE_H */ 63#endif /* PM_RMOBILE_H */
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
index 7143147780d..59d252f4cf9 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
@@ -607,9 +607,9 @@ enum {
607}; 607};
608 608
609#ifdef CONFIG_PM 609#ifdef CONFIG_PM
610extern struct rmobile_pm_domain r8a7740_pd_a4s; 610extern void __init r8a7740_init_pm_domains(void);
611extern struct rmobile_pm_domain r8a7740_pd_a3sp; 611#else
612extern struct rmobile_pm_domain r8a7740_pd_a4lc; 612static inline void r8a7740_init_pm_domains(void) {}
613#endif /* CONFIG_PM */ 613#endif /* CONFIG_PM */
614 614
615#endif /* __ASM_R8A7740_H__ */ 615#endif /* __ASM_R8A7740_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
index b07ad318eb2..499f52d2a4a 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
@@ -347,17 +347,11 @@ extern int r8a7779_sysc_power_down(struct r8a7779_pm_ch *r8a7779_ch);
347extern int r8a7779_sysc_power_up(struct r8a7779_pm_ch *r8a7779_ch); 347extern int r8a7779_sysc_power_up(struct r8a7779_pm_ch *r8a7779_ch);
348 348
349#ifdef CONFIG_PM 349#ifdef CONFIG_PM
350extern struct r8a7779_pm_domain r8a7779_sh4a; 350extern void __init r8a7779_init_pm_domains(void);
351extern struct r8a7779_pm_domain r8a7779_sgx;
352extern struct r8a7779_pm_domain r8a7779_vdp1;
353extern struct r8a7779_pm_domain r8a7779_impx3;
354
355extern void r8a7779_init_pm_domain(struct r8a7779_pm_domain *r8a7779_pd);
356extern void r8a7779_add_device_to_domain(struct r8a7779_pm_domain *r8a7779_pd,
357 struct platform_device *pdev);
358#else 351#else
359#define r8a7779_init_pm_domain(pd) do { } while (0) 352static inline void r8a7779_init_pm_domains(void) {}
360#define r8a7779_add_device_to_domain(pd, pdev) do { } while (0)
361#endif /* CONFIG_PM */ 353#endif /* CONFIG_PM */
362 354
355extern struct smp_operations r8a7779_smp_ops;
356
363#endif /* __ASM_R8A7779_H__ */ 357#endif /* __ASM_R8A7779_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index b59048e6d8f..eb98b45c508 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -478,21 +478,17 @@ extern struct clk sh7372_fsibck_clk;
478extern struct clk sh7372_fsidiva_clk; 478extern struct clk sh7372_fsidiva_clk;
479extern struct clk sh7372_fsidivb_clk; 479extern struct clk sh7372_fsidivb_clk;
480 480
481#ifdef CONFIG_PM
482extern struct rmobile_pm_domain sh7372_pd_a4lc;
483extern struct rmobile_pm_domain sh7372_pd_a4mp;
484extern struct rmobile_pm_domain sh7372_pd_d4;
485extern struct rmobile_pm_domain sh7372_pd_a4r;
486extern struct rmobile_pm_domain sh7372_pd_a3rv;
487extern struct rmobile_pm_domain sh7372_pd_a3ri;
488extern struct rmobile_pm_domain sh7372_pd_a4s;
489extern struct rmobile_pm_domain sh7372_pd_a3sp;
490extern struct rmobile_pm_domain sh7372_pd_a3sg;
491#endif /* CONFIG_PM */
492
493extern void sh7372_intcs_suspend(void); 481extern void sh7372_intcs_suspend(void);
494extern void sh7372_intcs_resume(void); 482extern void sh7372_intcs_resume(void);
495extern void sh7372_intca_suspend(void); 483extern void sh7372_intca_suspend(void);
496extern void sh7372_intca_resume(void); 484extern void sh7372_intca_resume(void);
497 485
486#ifdef CONFIG_PM
487extern void __init sh7372_init_pm_domains(void);
488#else
489static inline void sh7372_init_pm_domains(void) {}
490#endif
491
492extern void __init sh7372_pm_init_late(void);
493
498#endif /* __ASM_SH7372_H__ */ 494#endif /* __ASM_SH7372_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h
index fe950f25d79..606d31d02a4 100644
--- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
+++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
@@ -557,4 +557,6 @@ enum {
557#define SH73A0_PINT0_IRQ(irq) ((irq) + 700) 557#define SH73A0_PINT0_IRQ(irq) ((irq) + 700)
558#define SH73A0_PINT1_IRQ(irq) ((irq) + 732) 558#define SH73A0_PINT1_IRQ(irq) ((irq) + 732)
559 559
560extern struct smp_operations sh73a0_smp_ops;
561
560#endif /* __ASM_SH73A0_H__ */ 562#endif /* __ASM_SH73A0_H__ */
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
index f04fad4ec4f..ef66f1a8aa2 100644
--- a/arch/arm/mach-shmobile/intc-r8a7779.c
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -29,14 +29,14 @@
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31 31
32#define INT2SMSKCR0 0xfe7822a0 32#define INT2SMSKCR0 IOMEM(0xfe7822a0)
33#define INT2SMSKCR1 0xfe7822a4 33#define INT2SMSKCR1 IOMEM(0xfe7822a4)
34#define INT2SMSKCR2 0xfe7822a8 34#define INT2SMSKCR2 IOMEM(0xfe7822a8)
35#define INT2SMSKCR3 0xfe7822ac 35#define INT2SMSKCR3 IOMEM(0xfe7822ac)
36#define INT2SMSKCR4 0xfe7822b0 36#define INT2SMSKCR4 IOMEM(0xfe7822b0)
37 37
38#define INT2NTSR0 0xfe700060 38#define INT2NTSR0 IOMEM(0xfe700060)
39#define INT2NTSR1 0xfe700064 39#define INT2NTSR1 IOMEM(0xfe700064)
40 40
41static int r8a7779_set_wake(struct irq_data *data, unsigned int on) 41static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
42{ 42{
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 2587a22842f..a91caad7db7 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -624,6 +624,9 @@ void sh7372_intcs_resume(void)
624 __raw_writeb(ffd5[k], intcs_ffd5 + k); 624 __raw_writeb(ffd5[k], intcs_ffd5 + k);
625} 625}
626 626
627#define E694_BASE IOMEM(0xe6940000)
628#define E695_BASE IOMEM(0xe6950000)
629
627static unsigned short e694[0x200]; 630static unsigned short e694[0x200];
628static unsigned short e695[0x200]; 631static unsigned short e695[0x200];
629 632
@@ -632,22 +635,22 @@ void sh7372_intca_suspend(void)
632 int k; 635 int k;
633 636
634 for (k = 0x00; k <= 0x38; k += 4) 637 for (k = 0x00; k <= 0x38; k += 4)
635 e694[k] = __raw_readw(0xe6940000 + k); 638 e694[k] = __raw_readw(E694_BASE + k);
636 639
637 for (k = 0x80; k <= 0xb4; k += 4) 640 for (k = 0x80; k <= 0xb4; k += 4)
638 e694[k] = __raw_readb(0xe6940000 + k); 641 e694[k] = __raw_readb(E694_BASE + k);
639 642
640 for (k = 0x180; k <= 0x1b4; k += 4) 643 for (k = 0x180; k <= 0x1b4; k += 4)
641 e694[k] = __raw_readb(0xe6940000 + k); 644 e694[k] = __raw_readb(E694_BASE + k);
642 645
643 for (k = 0x00; k <= 0x50; k += 4) 646 for (k = 0x00; k <= 0x50; k += 4)
644 e695[k] = __raw_readw(0xe6950000 + k); 647 e695[k] = __raw_readw(E695_BASE + k);
645 648
646 for (k = 0x80; k <= 0xa8; k += 4) 649 for (k = 0x80; k <= 0xa8; k += 4)
647 e695[k] = __raw_readb(0xe6950000 + k); 650 e695[k] = __raw_readb(E695_BASE + k);
648 651
649 for (k = 0x180; k <= 0x1a8; k += 4) 652 for (k = 0x180; k <= 0x1a8; k += 4)
650 e695[k] = __raw_readb(0xe6950000 + k); 653 e695[k] = __raw_readb(E695_BASE + k);
651} 654}
652 655
653void sh7372_intca_resume(void) 656void sh7372_intca_resume(void)
@@ -655,20 +658,20 @@ void sh7372_intca_resume(void)
655 int k; 658 int k;
656 659
657 for (k = 0x00; k <= 0x38; k += 4) 660 for (k = 0x00; k <= 0x38; k += 4)
658 __raw_writew(e694[k], 0xe6940000 + k); 661 __raw_writew(e694[k], E694_BASE + k);
659 662
660 for (k = 0x80; k <= 0xb4; k += 4) 663 for (k = 0x80; k <= 0xb4; k += 4)
661 __raw_writeb(e694[k], 0xe6940000 + k); 664 __raw_writeb(e694[k], E694_BASE + k);
662 665
663 for (k = 0x180; k <= 0x1b4; k += 4) 666 for (k = 0x180; k <= 0x1b4; k += 4)
664 __raw_writeb(e694[k], 0xe6940000 + k); 667 __raw_writeb(e694[k], E694_BASE + k);
665 668
666 for (k = 0x00; k <= 0x50; k += 4) 669 for (k = 0x00; k <= 0x50; k += 4)
667 __raw_writew(e695[k], 0xe6950000 + k); 670 __raw_writew(e695[k], E695_BASE + k);
668 671
669 for (k = 0x80; k <= 0xa8; k += 4) 672 for (k = 0x80; k <= 0xa8; k += 4)
670 __raw_writeb(e695[k], 0xe6950000 + k); 673 __raw_writeb(e695[k], E695_BASE + k);
671 674
672 for (k = 0x180; k <= 0x1a8; k += 4) 675 for (k = 0x180; k <= 0x1a8; k += 4)
673 __raw_writeb(e695[k], 0xe6950000 + k); 676 __raw_writeb(e695[k], E695_BASE + k);
674} 677}
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index 588555a67d9..f0c5e519060 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -366,10 +366,12 @@ static irqreturn_t sh73a0_irq_pin_demux(int irq, void *dev_id)
366 366
367static struct irqaction sh73a0_irq_pin_cascade[32]; 367static struct irqaction sh73a0_irq_pin_cascade[32];
368 368
369#define PINTER0 0xe69000a0 369#define PINTER0_PHYS 0xe69000a0
370#define PINTER1 0xe69000a4 370#define PINTER1_PHYS 0xe69000a4
371#define PINTRR0 0xe69000d0 371#define PINTER0_VIRT IOMEM(0xe69000a0)
372#define PINTRR1 0xe69000d4 372#define PINTER1_VIRT IOMEM(0xe69000a4)
373#define PINTRR0 IOMEM(0xe69000d0)
374#define PINTRR1 IOMEM(0xe69000d4)
373 375
374#define PINT0A_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq)) 376#define PINT0A_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq))
375#define PINT0B_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 8)) 377#define PINT0B_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 8))
@@ -377,14 +379,14 @@ static struct irqaction sh73a0_irq_pin_cascade[32];
377#define PINT0D_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 24)) 379#define PINT0D_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 24))
378#define PINT1E_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT1_IRQ(irq)) 380#define PINT1E_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT1_IRQ(irq))
379 381
380INTC_PINT(intc_pint0, PINTER0, 0xe69000b0, "sh73a0-pint0", \ 382INTC_PINT(intc_pint0, PINTER0_PHYS, 0xe69000b0, "sh73a0-pint0", \
381 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \ 383 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \
382 INTC_PINT_V(A, PINT0A_IRQ), INTC_PINT_V(B, PINT0B_IRQ), \ 384 INTC_PINT_V(A, PINT0A_IRQ), INTC_PINT_V(B, PINT0B_IRQ), \
383 INTC_PINT_V(C, PINT0C_IRQ), INTC_PINT_V(D, PINT0D_IRQ), \ 385 INTC_PINT_V(C, PINT0C_IRQ), INTC_PINT_V(D, PINT0D_IRQ), \
384 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \ 386 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \
385 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D)); 387 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D));
386 388
387INTC_PINT(intc_pint1, PINTER1, 0xe69000c0, "sh73a0-pint1", \ 389INTC_PINT(intc_pint1, PINTER1_PHYS, 0xe69000c0, "sh73a0-pint1", \
388 INTC_PINT_E(E), INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, \ 390 INTC_PINT_E(E), INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, \
389 INTC_PINT_V(E, PINT1E_IRQ), INTC_PINT_V_NONE, \ 391 INTC_PINT_V(E, PINT1E_IRQ), INTC_PINT_V_NONE, \
390 INTC_PINT_V_NONE, INTC_PINT_V_NONE, \ 392 INTC_PINT_V_NONE, INTC_PINT_V_NONE, \
@@ -394,7 +396,7 @@ INTC_PINT(intc_pint1, PINTER1, 0xe69000c0, "sh73a0-pint1", \
394static struct irqaction sh73a0_pint0_cascade; 396static struct irqaction sh73a0_pint0_cascade;
395static struct irqaction sh73a0_pint1_cascade; 397static struct irqaction sh73a0_pint1_cascade;
396 398
397static void pint_demux(unsigned long rr, unsigned long er, int base_irq) 399static void pint_demux(void __iomem *rr, void __iomem *er, int base_irq)
398{ 400{
399 unsigned long value = ioread32(rr) & ioread32(er); 401 unsigned long value = ioread32(rr) & ioread32(er);
400 int k; 402 int k;
@@ -409,13 +411,13 @@ static void pint_demux(unsigned long rr, unsigned long er, int base_irq)
409 411
410static irqreturn_t sh73a0_pint0_demux(int irq, void *dev_id) 412static irqreturn_t sh73a0_pint0_demux(int irq, void *dev_id)
411{ 413{
412 pint_demux(PINTRR0, PINTER0, SH73A0_PINT0_IRQ(0)); 414 pint_demux(PINTRR0, PINTER0_VIRT, SH73A0_PINT0_IRQ(0));
413 return IRQ_HANDLED; 415 return IRQ_HANDLED;
414} 416}
415 417
416static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id) 418static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id)
417{ 419{
418 pint_demux(PINTRR1, PINTER1, SH73A0_PINT1_IRQ(0)); 420 pint_demux(PINTRR1, PINTER1_VIRT, SH73A0_PINT1_IRQ(0));
419 return IRQ_HANDLED; 421 return IRQ_HANDLED;
420} 422}
421 423
diff --git a/arch/arm/mach-shmobile/pfc-r8a7740.c b/arch/arm/mach-shmobile/pfc-r8a7740.c
index ce9e7fa5cc8..134d1b9a882 100644
--- a/arch/arm/mach-shmobile/pfc-r8a7740.c
+++ b/arch/arm/mach-shmobile/pfc-r8a7740.c
@@ -20,7 +20,7 @@
20 */ 20 */
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/gpio.h> 23#include <linux/sh_pfc.h>
24#include <mach/r8a7740.h> 24#include <mach/r8a7740.h>
25#include <mach/irqs.h> 25#include <mach/irqs.h>
26 26
diff --git a/arch/arm/mach-shmobile/pfc-r8a7779.c b/arch/arm/mach-shmobile/pfc-r8a7779.c
index d14c9b04807..cbc26ba2a0a 100644
--- a/arch/arm/mach-shmobile/pfc-r8a7779.c
+++ b/arch/arm/mach-shmobile/pfc-r8a7779.c
@@ -19,7 +19,7 @@
19 */ 19 */
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/gpio.h> 22#include <linux/sh_pfc.h>
23#include <linux/ioport.h> 23#include <linux/ioport.h>
24#include <mach/r8a7779.h> 24#include <mach/r8a7779.h>
25 25
diff --git a/arch/arm/mach-shmobile/pfc-sh7367.c b/arch/arm/mach-shmobile/pfc-sh7367.c
index e6e524654e6..c0c137f3905 100644
--- a/arch/arm/mach-shmobile/pfc-sh7367.c
+++ b/arch/arm/mach-shmobile/pfc-sh7367.c
@@ -18,7 +18,7 @@
18 */ 18 */
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/kernel.h> 20#include <linux/kernel.h>
21#include <linux/gpio.h> 21#include <linux/sh_pfc.h>
22#include <mach/sh7367.h> 22#include <mach/sh7367.h>
23 23
24#define CPU_ALL_PORT(fn, pfx, sfx) \ 24#define CPU_ALL_PORT(fn, pfx, sfx) \
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c
index 336093f9210..7a1525fd6ad 100644
--- a/arch/arm/mach-shmobile/pfc-sh7372.c
+++ b/arch/arm/mach-shmobile/pfc-sh7372.c
@@ -22,7 +22,7 @@
22 */ 22 */
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/gpio.h> 25#include <linux/sh_pfc.h>
26#include <mach/irqs.h> 26#include <mach/irqs.h>
27#include <mach/sh7372.h> 27#include <mach/sh7372.h>
28 28
diff --git a/arch/arm/mach-shmobile/pfc-sh7377.c b/arch/arm/mach-shmobile/pfc-sh7377.c
index 2f10511946a..f3117f67fa2 100644
--- a/arch/arm/mach-shmobile/pfc-sh7377.c
+++ b/arch/arm/mach-shmobile/pfc-sh7377.c
@@ -19,7 +19,7 @@
19 */ 19 */
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/gpio.h> 22#include <linux/sh_pfc.h>
23#include <mach/sh7377.h> 23#include <mach/sh7377.h>
24 24
25#define CPU_ALL_PORT(fn, pfx, sfx) \ 25#define CPU_ALL_PORT(fn, pfx, sfx) \
diff --git a/arch/arm/mach-shmobile/pfc-sh73a0.c b/arch/arm/mach-shmobile/pfc-sh73a0.c
index 4a547b80326..b442f9d8c71 100644
--- a/arch/arm/mach-shmobile/pfc-sh73a0.c
+++ b/arch/arm/mach-shmobile/pfc-sh73a0.c
@@ -20,7 +20,7 @@
20 */ 20 */
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/gpio.h> 23#include <linux/sh_pfc.h>
24#include <mach/sh73a0.h> 24#include <mach/sh73a0.h>
25#include <mach/irqs.h> 25#include <mach/irqs.h>
26 26
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
index fde0d23121d..ed8d2351915 100644
--- a/arch/arm/mach-shmobile/platsmp.c
+++ b/arch/arm/mach-shmobile/platsmp.c
@@ -11,100 +11,11 @@
11 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/errno.h>
15#include <linux/delay.h>
16#include <linux/device.h>
17#include <linux/smp.h> 14#include <linux/smp.h>
18#include <linux/io.h>
19#include <linux/of.h>
20#include <asm/hardware/gic.h> 15#include <asm/hardware/gic.h>
21#include <asm/mach-types.h>
22#include <mach/common.h>
23#include <mach/emev2.h>
24 16
25#ifdef CONFIG_ARCH_SH73A0 17void __init shmobile_smp_init_cpus(unsigned int ncores)
26#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2() || \
27 of_machine_is_compatible("renesas,sh73a0"))
28#else
29#define is_sh73a0() (0)
30#endif
31
32#define is_r8a7779() machine_is_marzen()
33
34#ifdef CONFIG_ARCH_EMEV2
35#define is_emev2() of_machine_is_compatible("renesas,emev2")
36#else
37#define is_emev2() (0)
38#endif
39
40static unsigned int __init shmobile_smp_get_core_count(void)
41{
42 if (is_sh73a0())
43 return sh73a0_get_core_count();
44
45 if (is_r8a7779())
46 return r8a7779_get_core_count();
47
48 if (is_emev2())
49 return emev2_get_core_count();
50
51 return 1;
52}
53
54static void __init shmobile_smp_prepare_cpus(void)
55{
56 if (is_sh73a0())
57 sh73a0_smp_prepare_cpus();
58
59 if (is_r8a7779())
60 r8a7779_smp_prepare_cpus();
61
62 if (is_emev2())
63 emev2_smp_prepare_cpus();
64}
65
66int shmobile_platform_cpu_kill(unsigned int cpu)
67{
68 if (is_r8a7779())
69 return r8a7779_platform_cpu_kill(cpu);
70
71 if (is_emev2())
72 return emev2_platform_cpu_kill(cpu);
73
74 return 1;
75}
76
77void __cpuinit platform_secondary_init(unsigned int cpu)
78{ 18{
79 trace_hardirqs_off();
80
81 if (is_sh73a0())
82 sh73a0_secondary_init(cpu);
83
84 if (is_r8a7779())
85 r8a7779_secondary_init(cpu);
86
87 if (is_emev2())
88 emev2_secondary_init(cpu);
89}
90
91int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
92{
93 if (is_sh73a0())
94 return sh73a0_boot_secondary(cpu);
95
96 if (is_r8a7779())
97 return r8a7779_boot_secondary(cpu);
98
99 if (is_emev2())
100 return emev2_boot_secondary(cpu);
101
102 return -ENOSYS;
103}
104
105void __init smp_init_cpus(void)
106{
107 unsigned int ncores = shmobile_smp_get_core_count();
108 unsigned int i; 19 unsigned int i;
109 20
110 if (ncores > nr_cpu_ids) { 21 if (ncores > nr_cpu_ids) {
@@ -118,8 +29,3 @@ void __init smp_init_cpus(void)
118 29
119 set_smp_cross_call(gic_raise_softirq); 30 set_smp_cross_call(gic_raise_softirq);
120} 31}
121
122void __init platform_smp_prepare_cpus(unsigned int max_cpus)
123{
124 shmobile_smp_prepare_cpus();
125}
diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c
index 893504d012a..21e5316d2d8 100644
--- a/arch/arm/mach-shmobile/pm-r8a7740.c
+++ b/arch/arm/mach-shmobile/pm-r8a7740.c
@@ -21,14 +21,6 @@ static int r8a7740_pd_a4s_suspend(void)
21 return -EBUSY; 21 return -EBUSY;
22} 22}
23 23
24struct rmobile_pm_domain r8a7740_pd_a4s = {
25 .genpd.name = "A4S",
26 .bit_shift = 10,
27 .gov = &pm_domain_always_on_gov,
28 .no_debug = true,
29 .suspend = r8a7740_pd_a4s_suspend,
30};
31
32static int r8a7740_pd_a3sp_suspend(void) 24static int r8a7740_pd_a3sp_suspend(void)
33{ 25{
34 /* 26 /*
@@ -38,17 +30,31 @@ static int r8a7740_pd_a3sp_suspend(void)
38 return console_suspend_enabled ? 0 : -EBUSY; 30 return console_suspend_enabled ? 0 : -EBUSY;
39} 31}
40 32
41struct rmobile_pm_domain r8a7740_pd_a3sp = { 33static struct rmobile_pm_domain r8a7740_pm_domains[] = {
42 .genpd.name = "A3SP", 34 {
43 .bit_shift = 11, 35 .genpd.name = "A4S",
44 .gov = &pm_domain_always_on_gov, 36 .bit_shift = 10,
45 .no_debug = true, 37 .gov = &pm_domain_always_on_gov,
46 .suspend = r8a7740_pd_a3sp_suspend, 38 .no_debug = true,
39 .suspend = r8a7740_pd_a4s_suspend,
40 },
41 {
42 .genpd.name = "A3SP",
43 .bit_shift = 11,
44 .gov = &pm_domain_always_on_gov,
45 .no_debug = true,
46 .suspend = r8a7740_pd_a3sp_suspend,
47 },
48 {
49 .genpd.name = "A4LC",
50 .bit_shift = 1,
51 },
47}; 52};
48 53
49struct rmobile_pm_domain r8a7740_pd_a4lc = { 54void __init r8a7740_init_pm_domains(void)
50 .genpd.name = "A4LC", 55{
51 .bit_shift = 1, 56 rmobile_init_domains(r8a7740_pm_domains, ARRAY_SIZE(r8a7740_pm_domains));
52}; 57 pm_genpd_add_subdomain_names("A4S", "A3SP");
58}
53 59
54#endif /* CONFIG_PM */ 60#endif /* CONFIG_PM */
diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c b/arch/arm/mach-shmobile/pm-r8a7779.c
index a18a4ae16d2..d50a8e9b94a 100644
--- a/arch/arm/mach-shmobile/pm-r8a7779.c
+++ b/arch/arm/mach-shmobile/pm-r8a7779.c
@@ -183,7 +183,7 @@ static bool pd_active_wakeup(struct device *dev)
183 return true; 183 return true;
184} 184}
185 185
186void r8a7779_init_pm_domain(struct r8a7779_pm_domain *r8a7779_pd) 186static void r8a7779_init_pm_domain(struct r8a7779_pm_domain *r8a7779_pd)
187{ 187{
188 struct generic_pm_domain *genpd = &r8a7779_pd->genpd; 188 struct generic_pm_domain *genpd = &r8a7779_pd->genpd;
189 189
@@ -199,43 +199,44 @@ void r8a7779_init_pm_domain(struct r8a7779_pm_domain *r8a7779_pd)
199 pd_power_up(&r8a7779_pd->genpd); 199 pd_power_up(&r8a7779_pd->genpd);
200} 200}
201 201
202void r8a7779_add_device_to_domain(struct r8a7779_pm_domain *r8a7779_pd, 202static struct r8a7779_pm_domain r8a7779_pm_domains[] = {
203 struct platform_device *pdev) 203 {
204{ 204 .genpd.name = "SH4A",
205 struct device *dev = &pdev->dev; 205 .ch = {
206 206 .chan_offs = 0x80, /* PWRSR1 .. PWRER1 */
207 pm_genpd_add_device(&r8a7779_pd->genpd, dev); 207 .isr_bit = 16, /* SH4A */
208 if (pm_clk_no_clocks(dev)) 208 },
209 pm_clk_add(dev, NULL); 209 },
210} 210 {
211 211 .genpd.name = "SGX",
212struct r8a7779_pm_domain r8a7779_sh4a = { 212 .ch = {
213 .ch = { 213 .chan_offs = 0xc0, /* PWRSR2 .. PWRER2 */
214 .chan_offs = 0x80, /* PWRSR1 .. PWRER1 */ 214 .isr_bit = 20, /* SGX */
215 .isr_bit = 16, /* SH4A */ 215 },
216 } 216 },
217}; 217 {
218 218 .genpd.name = "VDP1",
219struct r8a7779_pm_domain r8a7779_sgx = { 219 .ch = {
220 .ch = { 220 .chan_offs = 0x100, /* PWRSR3 .. PWRER3 */
221 .chan_offs = 0xc0, /* PWRSR2 .. PWRER2 */ 221 .isr_bit = 21, /* VDP */
222 .isr_bit = 20, /* SGX */ 222 },
223 } 223 },
224 {
225 .genpd.name = "IMPX3",
226 .ch = {
227 .chan_offs = 0x140, /* PWRSR4 .. PWRER4 */
228 .isr_bit = 24, /* IMP */
229 },
230 },
224}; 231};
225 232
226struct r8a7779_pm_domain r8a7779_vdp1 = { 233void __init r8a7779_init_pm_domains(void)
227 .ch = { 234{
228 .chan_offs = 0x100, /* PWRSR3 .. PWRER3 */ 235 int j;
229 .isr_bit = 21, /* VDP */
230 }
231};
232 236
233struct r8a7779_pm_domain r8a7779_impx3 = { 237 for (j = 0; j < ARRAY_SIZE(r8a7779_pm_domains); j++)
234 .ch = { 238 r8a7779_init_pm_domain(&r8a7779_pm_domains[j]);
235 .chan_offs = 0x140, /* PWRSR4 .. PWRER4 */ 239}
236 .isr_bit = 24, /* IMP */
237 }
238};
239 240
240#endif /* CONFIG_PM */ 241#endif /* CONFIG_PM */
241 242
diff --git a/arch/arm/mach-shmobile/pm-rmobile.c b/arch/arm/mach-shmobile/pm-rmobile.c
index a8562540f1d..1fc05d9453d 100644
--- a/arch/arm/mach-shmobile/pm-rmobile.c
+++ b/arch/arm/mach-shmobile/pm-rmobile.c
@@ -20,9 +20,9 @@
20#include <mach/pm-rmobile.h> 20#include <mach/pm-rmobile.h>
21 21
22/* SYSC */ 22/* SYSC */
23#define SPDCR 0xe6180008 23#define SPDCR IOMEM(0xe6180008)
24#define SWUCR 0xe6180014 24#define SWUCR IOMEM(0xe6180014)
25#define PSTR 0xe6180080 25#define PSTR IOMEM(0xe6180080)
26 26
27#define PSTR_RETRIES 100 27#define PSTR_RETRIES 100
28#define PSTR_DELAY_US 10 28#define PSTR_DELAY_US 10
@@ -134,7 +134,7 @@ static int rmobile_pd_start_dev(struct device *dev)
134 return ret; 134 return ret;
135} 135}
136 136
137void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd) 137static void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd)
138{ 138{
139 struct generic_pm_domain *genpd = &rmobile_pd->genpd; 139 struct generic_pm_domain *genpd = &rmobile_pd->genpd;
140 struct dev_power_governor *gov = rmobile_pd->gov; 140 struct dev_power_governor *gov = rmobile_pd->gov;
@@ -149,19 +149,38 @@ void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd)
149 __rmobile_pd_power_up(rmobile_pd, false); 149 __rmobile_pd_power_up(rmobile_pd, false);
150} 150}
151 151
152void rmobile_add_device_to_domain(struct rmobile_pm_domain *rmobile_pd, 152void rmobile_init_domains(struct rmobile_pm_domain domains[], int num)
153 struct platform_device *pdev) 153{
154 int j;
155
156 for (j = 0; j < num; j++)
157 rmobile_init_pm_domain(&domains[j]);
158}
159
160void rmobile_add_device_to_domain_td(const char *domain_name,
161 struct platform_device *pdev,
162 struct gpd_timing_data *td)
154{ 163{
155 struct device *dev = &pdev->dev; 164 struct device *dev = &pdev->dev;
156 165
157 pm_genpd_add_device(&rmobile_pd->genpd, dev); 166 __pm_genpd_name_add_device(domain_name, dev, td);
158 if (pm_clk_no_clocks(dev)) 167 if (pm_clk_no_clocks(dev))
159 pm_clk_add(dev, NULL); 168 pm_clk_add(dev, NULL);
160} 169}
161 170
162void rmobile_pm_add_subdomain(struct rmobile_pm_domain *rmobile_pd, 171void rmobile_add_devices_to_domains(struct pm_domain_device data[],
163 struct rmobile_pm_domain *rmobile_sd) 172 int size)
164{ 173{
165 pm_genpd_add_subdomain(&rmobile_pd->genpd, &rmobile_sd->genpd); 174 struct gpd_timing_data latencies = {
175 .stop_latency_ns = DEFAULT_DEV_LATENCY_NS,
176 .start_latency_ns = DEFAULT_DEV_LATENCY_NS,
177 .save_state_latency_ns = DEFAULT_DEV_LATENCY_NS,
178 .restore_state_latency_ns = DEFAULT_DEV_LATENCY_NS,
179 };
180 int j;
181
182 for (j = 0; j < size; j++)
183 rmobile_add_device_to_domain_td(data[j].domain_name,
184 data[j].pdev, &latencies);
166} 185}
167#endif /* CONFIG_PM */ 186#endif /* CONFIG_PM */
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index 79203706922..a0826a48dd0 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -21,6 +21,7 @@
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/bitrev.h> 22#include <linux/bitrev.h>
23#include <linux/console.h> 23#include <linux/console.h>
24#include <asm/cpuidle.h>
24#include <asm/io.h> 25#include <asm/io.h>
25#include <asm/tlbflush.h> 26#include <asm/tlbflush.h>
26#include <asm/suspend.h> 27#include <asm/suspend.h>
@@ -29,62 +30,50 @@
29#include <mach/pm-rmobile.h> 30#include <mach/pm-rmobile.h>
30 31
31/* DBG */ 32/* DBG */
32#define DBGREG1 0xe6100020 33#define DBGREG1 IOMEM(0xe6100020)
33#define DBGREG9 0xe6100040 34#define DBGREG9 IOMEM(0xe6100040)
34 35
35/* CPGA */ 36/* CPGA */
36#define SYSTBCR 0xe6150024 37#define SYSTBCR IOMEM(0xe6150024)
37#define MSTPSR0 0xe6150030 38#define MSTPSR0 IOMEM(0xe6150030)
38#define MSTPSR1 0xe6150038 39#define MSTPSR1 IOMEM(0xe6150038)
39#define MSTPSR2 0xe6150040 40#define MSTPSR2 IOMEM(0xe6150040)
40#define MSTPSR3 0xe6150048 41#define MSTPSR3 IOMEM(0xe6150048)
41#define MSTPSR4 0xe615004c 42#define MSTPSR4 IOMEM(0xe615004c)
42#define PLLC01STPCR 0xe61500c8 43#define PLLC01STPCR IOMEM(0xe61500c8)
43 44
44/* SYSC */ 45/* SYSC */
45#define SBAR 0xe6180020 46#define SBAR IOMEM(0xe6180020)
46#define WUPRMSK 0xe6180028 47#define WUPRMSK IOMEM(0xe6180028)
47#define WUPSMSK 0xe618002c 48#define WUPSMSK IOMEM(0xe618002c)
48#define WUPSMSK2 0xe6180048 49#define WUPSMSK2 IOMEM(0xe6180048)
49#define WUPSFAC 0xe6180098 50#define WUPSFAC IOMEM(0xe6180098)
50#define IRQCR 0xe618022c 51#define IRQCR IOMEM(0xe618022c)
51#define IRQCR2 0xe6180238 52#define IRQCR2 IOMEM(0xe6180238)
52#define IRQCR3 0xe6180244 53#define IRQCR3 IOMEM(0xe6180244)
53#define IRQCR4 0xe6180248 54#define IRQCR4 IOMEM(0xe6180248)
54#define PDNSEL 0xe6180254 55#define PDNSEL IOMEM(0xe6180254)
55 56
56/* INTC */ 57/* INTC */
57#define ICR1A 0xe6900000 58#define ICR1A IOMEM(0xe6900000)
58#define ICR2A 0xe6900004 59#define ICR2A IOMEM(0xe6900004)
59#define ICR3A 0xe6900008 60#define ICR3A IOMEM(0xe6900008)
60#define ICR4A 0xe690000c 61#define ICR4A IOMEM(0xe690000c)
61#define INTMSK00A 0xe6900040 62#define INTMSK00A IOMEM(0xe6900040)
62#define INTMSK10A 0xe6900044 63#define INTMSK10A IOMEM(0xe6900044)
63#define INTMSK20A 0xe6900048 64#define INTMSK20A IOMEM(0xe6900048)
64#define INTMSK30A 0xe690004c 65#define INTMSK30A IOMEM(0xe690004c)
65 66
66/* MFIS */ 67/* MFIS */
68/* FIXME: pointing where? */
67#define SMFRAM 0xe6a70000 69#define SMFRAM 0xe6a70000
68 70
69/* AP-System Core */ 71/* AP-System Core */
70#define APARMBAREA 0xe6f10020 72#define APARMBAREA IOMEM(0xe6f10020)
71 73
72#ifdef CONFIG_PM 74#ifdef CONFIG_PM
73 75
74struct rmobile_pm_domain sh7372_pd_a4lc = { 76#define PM_DOMAIN_ON_OFF_LATENCY_NS 250000
75 .genpd.name = "A4LC",
76 .bit_shift = 1,
77};
78
79struct rmobile_pm_domain sh7372_pd_a4mp = {
80 .genpd.name = "A4MP",
81 .bit_shift = 2,
82};
83
84struct rmobile_pm_domain sh7372_pd_d4 = {
85 .genpd.name = "D4",
86 .bit_shift = 3,
87};
88 77
89static int sh7372_a4r_pd_suspend(void) 78static int sh7372_a4r_pd_suspend(void)
90{ 79{
@@ -93,39 +82,25 @@ static int sh7372_a4r_pd_suspend(void)
93 return 0; 82 return 0;
94} 83}
95 84
96struct rmobile_pm_domain sh7372_pd_a4r = { 85static bool a4s_suspend_ready;
97 .genpd.name = "A4R",
98 .bit_shift = 5,
99 .suspend = sh7372_a4r_pd_suspend,
100 .resume = sh7372_intcs_resume,
101};
102 86
103struct rmobile_pm_domain sh7372_pd_a3rv = { 87static int sh7372_a4s_pd_suspend(void)
104 .genpd.name = "A3RV",
105 .bit_shift = 6,
106};
107
108struct rmobile_pm_domain sh7372_pd_a3ri = {
109 .genpd.name = "A3RI",
110 .bit_shift = 8,
111};
112
113static int sh7372_pd_a4s_suspend(void)
114{ 88{
115 /* 89 /*
116 * The A4S domain contains the CPU core and therefore it should 90 * The A4S domain contains the CPU core and therefore it should
117 * only be turned off if the CPU is in use. 91 * only be turned off if the CPU is not in use. This may happen
92 * during system suspend, when SYSC is going to be used for generating
93 * resume signals and a4s_suspend_ready is set to let
94 * sh7372_enter_suspend() know that it can turn A4S off.
118 */ 95 */
96 a4s_suspend_ready = true;
119 return -EBUSY; 97 return -EBUSY;
120} 98}
121 99
122struct rmobile_pm_domain sh7372_pd_a4s = { 100static void sh7372_a4s_pd_resume(void)
123 .genpd.name = "A4S", 101{
124 .bit_shift = 10, 102 a4s_suspend_ready = false;
125 .gov = &pm_domain_always_on_gov, 103}
126 .no_debug = true,
127 .suspend = sh7372_pd_a4s_suspend,
128};
129 104
130static int sh7372_a3sp_pd_suspend(void) 105static int sh7372_a3sp_pd_suspend(void)
131{ 106{
@@ -136,18 +111,80 @@ static int sh7372_a3sp_pd_suspend(void)
136 return console_suspend_enabled ? 0 : -EBUSY; 111 return console_suspend_enabled ? 0 : -EBUSY;
137} 112}
138 113
139struct rmobile_pm_domain sh7372_pd_a3sp = { 114static struct rmobile_pm_domain sh7372_pm_domains[] = {
140 .genpd.name = "A3SP", 115 {
141 .bit_shift = 11, 116 .genpd.name = "A4LC",
142 .gov = &pm_domain_always_on_gov, 117 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
143 .no_debug = true, 118 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
144 .suspend = sh7372_a3sp_pd_suspend, 119 .bit_shift = 1,
120 },
121 {
122 .genpd.name = "A4MP",
123 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
124 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
125 .bit_shift = 2,
126 },
127 {
128 .genpd.name = "D4",
129 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
130 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
131 .bit_shift = 3,
132 },
133 {
134 .genpd.name = "A4R",
135 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
136 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
137 .bit_shift = 5,
138 .suspend = sh7372_a4r_pd_suspend,
139 .resume = sh7372_intcs_resume,
140 },
141 {
142 .genpd.name = "A3RV",
143 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
144 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
145 .bit_shift = 6,
146 },
147 {
148 .genpd.name = "A3RI",
149 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
150 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
151 .bit_shift = 8,
152 },
153 {
154 .genpd.name = "A4S",
155 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
156 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
157 .bit_shift = 10,
158 .gov = &pm_domain_always_on_gov,
159 .no_debug = true,
160 .suspend = sh7372_a4s_pd_suspend,
161 .resume = sh7372_a4s_pd_resume,
162 },
163 {
164 .genpd.name = "A3SP",
165 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
166 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
167 .bit_shift = 11,
168 .gov = &pm_domain_always_on_gov,
169 .no_debug = true,
170 .suspend = sh7372_a3sp_pd_suspend,
171 },
172 {
173 .genpd.name = "A3SG",
174 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
175 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
176 .bit_shift = 13,
177 },
145}; 178};
146 179
147struct rmobile_pm_domain sh7372_pd_a3sg = { 180void __init sh7372_init_pm_domains(void)
148 .genpd.name = "A3SG", 181{
149 .bit_shift = 13, 182 rmobile_init_domains(sh7372_pm_domains, ARRAY_SIZE(sh7372_pm_domains));
150}; 183 pm_genpd_add_subdomain_names("A4LC", "A3RV");
184 pm_genpd_add_subdomain_names("A4R", "A4LC");
185 pm_genpd_add_subdomain_names("A4S", "A3SG");
186 pm_genpd_add_subdomain_names("A4S", "A3SP");
187}
151 188
152#endif /* CONFIG_PM */ 189#endif /* CONFIG_PM */
153 190
@@ -303,6 +340,21 @@ static void sh7372_enter_a3sm_common(int pllc0_on)
303 sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc)); 340 sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
304 sh7372_enter_sysc(pllc0_on, 1 << 12); 341 sh7372_enter_sysc(pllc0_on, 1 << 12);
305} 342}
343
344static void sh7372_enter_a4s_common(int pllc0_on)
345{
346 sh7372_intca_suspend();
347 sh7372_set_reset_vector(SMFRAM);
348 sh7372_enter_sysc(pllc0_on, 1 << 10);
349 sh7372_intca_resume();
350}
351
352static void sh7372_pm_setup_smfram(void)
353{
354 memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100);
355}
356#else
357static inline void sh7372_pm_setup_smfram(void) {}
306#endif /* CONFIG_SUSPEND || CONFIG_CPU_IDLE */ 358#endif /* CONFIG_SUSPEND || CONFIG_CPU_IDLE */
307 359
308#ifdef CONFIG_CPU_IDLE 360#ifdef CONFIG_CPU_IDLE
@@ -312,7 +364,8 @@ static int sh7372_do_idle_core_standby(unsigned long unused)
312 return 0; 364 return 0;
313} 365}
314 366
315static void sh7372_enter_core_standby(void) 367static int sh7372_enter_core_standby(struct cpuidle_device *dev,
368 struct cpuidle_driver *drv, int index)
316{ 369{
317 sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc)); 370 sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
318 371
@@ -323,83 +376,102 @@ static void sh7372_enter_core_standby(void)
323 376
324 /* disable reset vector translation */ 377 /* disable reset vector translation */
325 __raw_writel(0, SBAR); 378 __raw_writel(0, SBAR);
379
380 return 1;
326} 381}
327 382
328static void sh7372_enter_a3sm_pll_on(void) 383static int sh7372_enter_a3sm_pll_on(struct cpuidle_device *dev,
384 struct cpuidle_driver *drv, int index)
329{ 385{
330 sh7372_enter_a3sm_common(1); 386 sh7372_enter_a3sm_common(1);
387 return 2;
331} 388}
332 389
333static void sh7372_enter_a3sm_pll_off(void) 390static int sh7372_enter_a3sm_pll_off(struct cpuidle_device *dev,
391 struct cpuidle_driver *drv, int index)
334{ 392{
335 sh7372_enter_a3sm_common(0); 393 sh7372_enter_a3sm_common(0);
394 return 3;
336} 395}
337 396
338static void sh7372_cpuidle_setup(struct cpuidle_driver *drv) 397static int sh7372_enter_a4s(struct cpuidle_device *dev,
398 struct cpuidle_driver *drv, int index)
339{ 399{
340 struct cpuidle_state *state = &drv->states[drv->state_count]; 400 unsigned long msk, msk2;
341 401
342 snprintf(state->name, CPUIDLE_NAME_LEN, "C2"); 402 if (!sh7372_sysc_valid(&msk, &msk2))
343 strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN); 403 return sh7372_enter_a3sm_pll_off(dev, drv, index);
344 state->exit_latency = 10; 404
345 state->target_residency = 20 + 10; 405 sh7372_setup_sysc(msk, msk2);
346 state->flags = CPUIDLE_FLAG_TIME_VALID; 406 sh7372_enter_a4s_common(0);
347 shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_core_standby; 407 return 4;
348 drv->state_count++;
349
350 state = &drv->states[drv->state_count];
351 snprintf(state->name, CPUIDLE_NAME_LEN, "C3");
352 strncpy(state->desc, "A3SM PLL ON", CPUIDLE_DESC_LEN);
353 state->exit_latency = 20;
354 state->target_residency = 30 + 20;
355 state->flags = CPUIDLE_FLAG_TIME_VALID;
356 shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_a3sm_pll_on;
357 drv->state_count++;
358
359 state = &drv->states[drv->state_count];
360 snprintf(state->name, CPUIDLE_NAME_LEN, "C4");
361 strncpy(state->desc, "A3SM PLL OFF", CPUIDLE_DESC_LEN);
362 state->exit_latency = 120;
363 state->target_residency = 30 + 120;
364 state->flags = CPUIDLE_FLAG_TIME_VALID;
365 shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_a3sm_pll_off;
366 drv->state_count++;
367} 408}
368 409
410static struct cpuidle_driver sh7372_cpuidle_driver = {
411 .name = "sh7372_cpuidle",
412 .owner = THIS_MODULE,
413 .en_core_tk_irqen = 1,
414 .state_count = 5,
415 .safe_state_index = 0, /* C1 */
416 .states[0] = ARM_CPUIDLE_WFI_STATE,
417 .states[0].enter = shmobile_enter_wfi,
418 .states[1] = {
419 .name = "C2",
420 .desc = "Core Standby Mode",
421 .exit_latency = 10,
422 .target_residency = 20 + 10,
423 .flags = CPUIDLE_FLAG_TIME_VALID,
424 .enter = sh7372_enter_core_standby,
425 },
426 .states[2] = {
427 .name = "C3",
428 .desc = "A3SM PLL ON",
429 .exit_latency = 20,
430 .target_residency = 30 + 20,
431 .flags = CPUIDLE_FLAG_TIME_VALID,
432 .enter = sh7372_enter_a3sm_pll_on,
433 },
434 .states[3] = {
435 .name = "C4",
436 .desc = "A3SM PLL OFF",
437 .exit_latency = 120,
438 .target_residency = 30 + 120,
439 .flags = CPUIDLE_FLAG_TIME_VALID,
440 .enter = sh7372_enter_a3sm_pll_off,
441 },
442 .states[4] = {
443 .name = "C5",
444 .desc = "A4S PLL OFF",
445 .exit_latency = 240,
446 .target_residency = 30 + 240,
447 .flags = CPUIDLE_FLAG_TIME_VALID,
448 .enter = sh7372_enter_a4s,
449 .disabled = true,
450 },
451};
452
369static void sh7372_cpuidle_init(void) 453static void sh7372_cpuidle_init(void)
370{ 454{
371 shmobile_cpuidle_setup = sh7372_cpuidle_setup; 455 shmobile_cpuidle_set_driver(&sh7372_cpuidle_driver);
372} 456}
373#else 457#else
374static void sh7372_cpuidle_init(void) {} 458static void sh7372_cpuidle_init(void) {}
375#endif 459#endif
376 460
377#ifdef CONFIG_SUSPEND 461#ifdef CONFIG_SUSPEND
378static void sh7372_enter_a4s_common(int pllc0_on)
379{
380 sh7372_intca_suspend();
381 memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100);
382 sh7372_set_reset_vector(SMFRAM);
383 sh7372_enter_sysc(pllc0_on, 1 << 10);
384 sh7372_intca_resume();
385}
386
387static int sh7372_enter_suspend(suspend_state_t suspend_state) 462static int sh7372_enter_suspend(suspend_state_t suspend_state)
388{ 463{
389 unsigned long msk, msk2; 464 unsigned long msk, msk2;
390 465
391 /* check active clocks to determine potential wakeup sources */ 466 /* check active clocks to determine potential wakeup sources */
392 if (sh7372_sysc_valid(&msk, &msk2)) { 467 if (sh7372_sysc_valid(&msk, &msk2) && a4s_suspend_ready) {
393 if (!console_suspend_enabled && 468 /* convert INTC mask/sense to SYSC mask/sense */
394 sh7372_pd_a4s.genpd.status == GPD_STATE_POWER_OFF) { 469 sh7372_setup_sysc(msk, msk2);
395 /* convert INTC mask/sense to SYSC mask/sense */ 470
396 sh7372_setup_sysc(msk, msk2); 471 /* enter A4S sleep with PLLC0 off */
397 472 pr_debug("entering A4S\n");
398 /* enter A4S sleep with PLLC0 off */ 473 sh7372_enter_a4s_common(0);
399 pr_debug("entering A4S\n"); 474 return 0;
400 sh7372_enter_a4s_common(0);
401 return 0;
402 }
403 } 475 }
404 476
405 /* default to enter A3SM sleep with PLLC0 off */ 477 /* default to enter A3SM sleep with PLLC0 off */
@@ -425,7 +497,7 @@ static int sh7372_pm_notifier_fn(struct notifier_block *notifier,
425 * executed during system suspend and resume, respectively, so 497 * executed during system suspend and resume, respectively, so
426 * that those functions don't crash while accessing the INTCS. 498 * that those functions don't crash while accessing the INTCS.
427 */ 499 */
428 pm_genpd_poweron(&sh7372_pd_a4r.genpd); 500 pm_genpd_name_poweron("A4R");
429 break; 501 break;
430 case PM_POST_SUSPEND: 502 case PM_POST_SUSPEND:
431 pm_genpd_poweroff_unused(); 503 pm_genpd_poweroff_unused();
@@ -454,6 +526,14 @@ void __init sh7372_pm_init(void)
454 /* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */ 526 /* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */
455 __raw_writel(0, PDNSEL); 527 __raw_writel(0, PDNSEL);
456 528
529 sh7372_pm_setup_smfram();
530
457 sh7372_suspend_init(); 531 sh7372_suspend_init();
458 sh7372_cpuidle_init(); 532 sh7372_cpuidle_init();
459} 533}
534
535void __init sh7372_pm_init_late(void)
536{
537 shmobile_init_late();
538 pm_genpd_name_attach_cpuidle("A4S", 4);
539}
diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
index dae9aa68bb0..a47beeb1828 100644
--- a/arch/arm/mach-shmobile/setup-emev2.c
+++ b/arch/arm/mach-shmobile/setup-emev2.c
@@ -356,6 +356,26 @@ static struct platform_device gio4_device = {
356 }, 356 },
357}; 357};
358 358
359static struct resource pmu_resources[] = {
360 [0] = {
361 .start = 152,
362 .end = 152,
363 .flags = IORESOURCE_IRQ,
364 },
365 [1] = {
366 .start = 153,
367 .end = 153,
368 .flags = IORESOURCE_IRQ,
369 },
370};
371
372static struct platform_device pmu_device = {
373 .name = "arm-pmu",
374 .id = -1,
375 .num_resources = ARRAY_SIZE(pmu_resources),
376 .resource = pmu_resources,
377};
378
359static struct platform_device *emev2_early_devices[] __initdata = { 379static struct platform_device *emev2_early_devices[] __initdata = {
360 &uart0_device, 380 &uart0_device,
361 &uart1_device, 381 &uart1_device,
@@ -370,6 +390,7 @@ static struct platform_device *emev2_late_devices[] __initdata = {
370 &gio2_device, 390 &gio2_device,
371 &gio3_device, 391 &gio3_device,
372 &gio4_device, 392 &gio4_device,
393 &pmu_device,
373}; 394};
374 395
375void __init emev2_add_standard_devices(void) 396void __init emev2_add_standard_devices(void)
@@ -440,6 +461,7 @@ void __init emev2_init_irq_dt(void)
440} 461}
441 462
442DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)") 463DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
464 .smp = smp_ops(emev2_smp_ops),
443 .init_early = emev2_init_delay, 465 .init_early = emev2_init_delay,
444 .nr_irqs = NR_IRQS_LEGACY, 466 .nr_irqs = NR_IRQS_LEGACY,
445 .init_irq = emev2_init_irq_dt, 467 .init_irq = emev2_init_irq_dt,
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 78948a9dba0..11bb1d98419 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -673,12 +673,7 @@ void __init r8a7740_add_standard_devices(void)
673 r8a7740_i2c_workaround(&i2c0_device); 673 r8a7740_i2c_workaround(&i2c0_device);
674 r8a7740_i2c_workaround(&i2c1_device); 674 r8a7740_i2c_workaround(&i2c1_device);
675 675
676 /* PM domain */ 676 r8a7740_init_pm_domains();
677 rmobile_init_pm_domain(&r8a7740_pd_a4s);
678 rmobile_init_pm_domain(&r8a7740_pd_a3sp);
679 rmobile_init_pm_domain(&r8a7740_pd_a4lc);
680
681 rmobile_pm_add_subdomain(&r8a7740_pd_a4s, &r8a7740_pd_a3sp);
682 677
683 /* add devices */ 678 /* add devices */
684 platform_add_devices(r8a7740_early_devices, 679 platform_add_devices(r8a7740_early_devices,
@@ -688,16 +683,16 @@ void __init r8a7740_add_standard_devices(void)
688 683
689 /* add devices to PM domain */ 684 /* add devices to PM domain */
690 685
691 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif0_device); 686 rmobile_add_device_to_domain("A3SP", &scif0_device);
692 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif1_device); 687 rmobile_add_device_to_domain("A3SP", &scif1_device);
693 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif2_device); 688 rmobile_add_device_to_domain("A3SP", &scif2_device);
694 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif3_device); 689 rmobile_add_device_to_domain("A3SP", &scif3_device);
695 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif4_device); 690 rmobile_add_device_to_domain("A3SP", &scif4_device);
696 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif5_device); 691 rmobile_add_device_to_domain("A3SP", &scif5_device);
697 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif6_device); 692 rmobile_add_device_to_domain("A3SP", &scif6_device);
698 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif7_device); 693 rmobile_add_device_to_domain("A3SP", &scif7_device);
699 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scifb_device); 694 rmobile_add_device_to_domain("A3SP", &scifb_device);
700 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &i2c1_device); 695 rmobile_add_device_to_domain("A3SP", &i2c1_device);
701} 696}
702 697
703static void __init r8a7740_earlytimer_init(void) 698static void __init r8a7740_earlytimer_init(void)
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index e98e46f6cf5..2917668f009 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -251,10 +251,7 @@ void __init r8a7779_add_standard_devices(void)
251#endif 251#endif
252 r8a7779_pm_init(); 252 r8a7779_pm_init();
253 253
254 r8a7779_init_pm_domain(&r8a7779_sh4a); 254 r8a7779_init_pm_domains();
255 r8a7779_init_pm_domain(&r8a7779_sgx);
256 r8a7779_init_pm_domain(&r8a7779_vdp1);
257 r8a7779_init_pm_domain(&r8a7779_impx3);
258 255
259 platform_add_devices(r8a7779_early_devices, 256 platform_add_devices(r8a7779_early_devices,
260 ARRAY_SIZE(r8a7779_early_devices)); 257 ARRAY_SIZE(r8a7779_early_devices));
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c
index 2e3074ab75b..e647f541087 100644
--- a/arch/arm/mach-shmobile/setup-sh7367.c
+++ b/arch/arm/mach-shmobile/setup-sh7367.c
@@ -462,7 +462,7 @@ static void __init sh7367_earlytimer_init(void)
462 shmobile_earlytimer_init(); 462 shmobile_earlytimer_init();
463} 463}
464 464
465#define SYMSTPCR2 0xe6158048 465#define SYMSTPCR2 IOMEM(0xe6158048)
466#define SYMSTPCR2_CMT1 (1 << 29) 466#define SYMSTPCR2_CMT1 (1 << 29)
467 467
468void __init sh7367_add_early_devices(void) 468void __init sh7367_add_early_devices(void)
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 838a87be1d5..a07954fbcd2 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -1001,21 +1001,34 @@ static struct platform_device *sh7372_late_devices[] __initdata = {
1001 1001
1002void __init sh7372_add_standard_devices(void) 1002void __init sh7372_add_standard_devices(void)
1003{ 1003{
1004 rmobile_init_pm_domain(&sh7372_pd_a4lc); 1004 struct pm_domain_device domain_devices[] = {
1005 rmobile_init_pm_domain(&sh7372_pd_a4mp); 1005 { "A3RV", &vpu_device, },
1006 rmobile_init_pm_domain(&sh7372_pd_d4); 1006 { "A4MP", &spu0_device, },
1007 rmobile_init_pm_domain(&sh7372_pd_a4r); 1007 { "A4MP", &spu1_device, },
1008 rmobile_init_pm_domain(&sh7372_pd_a3rv); 1008 { "A3SP", &scif0_device, },
1009 rmobile_init_pm_domain(&sh7372_pd_a3ri); 1009 { "A3SP", &scif1_device, },
1010 rmobile_init_pm_domain(&sh7372_pd_a4s); 1010 { "A3SP", &scif2_device, },
1011 rmobile_init_pm_domain(&sh7372_pd_a3sp); 1011 { "A3SP", &scif3_device, },
1012 rmobile_init_pm_domain(&sh7372_pd_a3sg); 1012 { "A3SP", &scif4_device, },
1013 1013 { "A3SP", &scif5_device, },
1014 rmobile_pm_add_subdomain(&sh7372_pd_a4lc, &sh7372_pd_a3rv); 1014 { "A3SP", &scif6_device, },
1015 rmobile_pm_add_subdomain(&sh7372_pd_a4r, &sh7372_pd_a4lc); 1015 { "A3SP", &iic1_device, },
1016 1016 { "A3SP", &dma0_device, },
1017 rmobile_pm_add_subdomain(&sh7372_pd_a4s, &sh7372_pd_a3sg); 1017 { "A3SP", &dma1_device, },
1018 rmobile_pm_add_subdomain(&sh7372_pd_a4s, &sh7372_pd_a3sp); 1018 { "A3SP", &dma2_device, },
1019 { "A3SP", &usb_dma0_device, },
1020 { "A3SP", &usb_dma1_device, },
1021 { "A4R", &iic0_device, },
1022 { "A4R", &veu0_device, },
1023 { "A4R", &veu1_device, },
1024 { "A4R", &veu2_device, },
1025 { "A4R", &veu3_device, },
1026 { "A4R", &jpu_device, },
1027 { "A4R", &tmu00_device, },
1028 { "A4R", &tmu01_device, },
1029 };
1030
1031 sh7372_init_pm_domains();
1019 1032
1020 platform_add_devices(sh7372_early_devices, 1033 platform_add_devices(sh7372_early_devices,
1021 ARRAY_SIZE(sh7372_early_devices)); 1034 ARRAY_SIZE(sh7372_early_devices));
@@ -1023,30 +1036,8 @@ void __init sh7372_add_standard_devices(void)
1023 platform_add_devices(sh7372_late_devices, 1036 platform_add_devices(sh7372_late_devices,
1024 ARRAY_SIZE(sh7372_late_devices)); 1037 ARRAY_SIZE(sh7372_late_devices));
1025 1038
1026 rmobile_add_device_to_domain(&sh7372_pd_a3rv, &vpu_device); 1039 rmobile_add_devices_to_domains(domain_devices,
1027 rmobile_add_device_to_domain(&sh7372_pd_a4mp, &spu0_device); 1040 ARRAY_SIZE(domain_devices));
1028 rmobile_add_device_to_domain(&sh7372_pd_a4mp, &spu1_device);
1029 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif0_device);
1030 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif1_device);
1031 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif2_device);
1032 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif3_device);
1033 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif4_device);
1034 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif5_device);
1035 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif6_device);
1036 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &iic1_device);
1037 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &dma0_device);
1038 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &dma1_device);
1039 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &dma2_device);
1040 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usb_dma0_device);
1041 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usb_dma1_device);
1042 rmobile_add_device_to_domain(&sh7372_pd_a4r, &iic0_device);
1043 rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu0_device);
1044 rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu1_device);
1045 rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu2_device);
1046 rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu3_device);
1047 rmobile_add_device_to_domain(&sh7372_pd_a4r, &jpu_device);
1048 rmobile_add_device_to_domain(&sh7372_pd_a4r, &tmu00_device);
1049 rmobile_add_device_to_domain(&sh7372_pd_a4r, &tmu01_device);
1050} 1041}
1051 1042
1052static void __init sh7372_earlytimer_init(void) 1043static void __init sh7372_earlytimer_init(void)
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c
index 855b1506caf..edcf98bb701 100644
--- a/arch/arm/mach-shmobile/setup-sh7377.c
+++ b/arch/arm/mach-shmobile/setup-sh7377.c
@@ -484,7 +484,7 @@ static void __init sh7377_earlytimer_init(void)
484 shmobile_earlytimer_init(); 484 shmobile_earlytimer_init();
485} 485}
486 486
487#define SMSTPCR3 0xe615013c 487#define SMSTPCR3 IOMEM(0xe615013c)
488#define SMSTPCR3_CMT1 (1 << 29) 488#define SMSTPCR3_CMT1 (1 << 29)
489 489
490void __init sh7377_add_early_devices(void) 490void __init sh7377_add_early_devices(void)
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index d230af656fc..db99a4ade80 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -734,6 +734,26 @@ static struct platform_device mpdma0_device = {
734 }, 734 },
735}; 735};
736 736
737static struct resource pmu_resources[] = {
738 [0] = {
739 .start = gic_spi(55),
740 .end = gic_spi(55),
741 .flags = IORESOURCE_IRQ,
742 },
743 [1] = {
744 .start = gic_spi(56),
745 .end = gic_spi(56),
746 .flags = IORESOURCE_IRQ,
747 },
748};
749
750static struct platform_device pmu_device = {
751 .name = "arm-pmu",
752 .id = -1,
753 .num_resources = ARRAY_SIZE(pmu_resources),
754 .resource = pmu_resources,
755};
756
737static struct platform_device *sh73a0_early_devices[] __initdata = { 757static struct platform_device *sh73a0_early_devices[] __initdata = {
738 &scif0_device, 758 &scif0_device,
739 &scif1_device, 759 &scif1_device,
@@ -757,9 +777,10 @@ static struct platform_device *sh73a0_late_devices[] __initdata = {
757 &i2c4_device, 777 &i2c4_device,
758 &dma0_device, 778 &dma0_device,
759 &mpdma0_device, 779 &mpdma0_device,
780 &pmu_device,
760}; 781};
761 782
762#define SRCR2 0xe61580b0 783#define SRCR2 IOMEM(0xe61580b0)
763 784
764void __init sh73a0_add_standard_devices(void) 785void __init sh73a0_add_standard_devices(void)
765{ 786{
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/sh-gpio.h
index 844507d937c..e834763ac2a 100644
--- a/arch/arm/mach-shmobile/include/mach/gpio.h
+++ b/arch/arm/mach-shmobile/sh-gpio.h
@@ -12,22 +12,8 @@
12 12
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/errno.h> 14#include <linux/errno.h>
15#include <linux/sh_pfc.h>
16#include <linux/io.h> 15#include <linux/io.h>
17 16
18#ifdef CONFIG_GPIOLIB
19
20static inline int irq_to_gpio(unsigned int irq)
21{
22 return -ENOSYS;
23}
24
25#else
26
27#define __ARM_GPIOLIB_COMPLEX
28
29#endif /* CONFIG_GPIOLIB */
30
31/* 17/*
32 * FIXME !! 18 * FIXME !!
33 * 19 *
@@ -35,12 +21,12 @@ static inline int irq_to_gpio(unsigned int irq)
35 * the method to control only pull up/down/free. 21 * the method to control only pull up/down/free.
36 * this function should be replaced by correct gpio function 22 * this function should be replaced by correct gpio function
37 */ 23 */
38static inline void __init gpio_direction_none(u32 addr) 24static inline void __init gpio_direction_none(void __iomem * addr)
39{ 25{
40 __raw_writeb(0x00, addr); 26 __raw_writeb(0x00, addr);
41} 27}
42 28
43static inline void __init gpio_request_pullup(u32 addr) 29static inline void __init gpio_request_pullup(void __iomem * addr)
44{ 30{
45 u8 data = __raw_readb(addr); 31 u8 data = __raw_readb(addr);
46 32
@@ -49,7 +35,7 @@ static inline void __init gpio_request_pullup(u32 addr)
49 __raw_writeb(data, addr); 35 __raw_writeb(data, addr);
50} 36}
51 37
52static inline void __init gpio_request_pulldown(u32 addr) 38static inline void __init gpio_request_pulldown(void __iomem * addr)
53{ 39{
54 u8 data = __raw_readb(addr); 40 u8 data = __raw_readb(addr);
55 41
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index 6a35c4a31e6..f978c5d0e1a 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -50,7 +50,7 @@ static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
50 50
51} 51}
52 52
53unsigned int __init emev2_get_core_count(void) 53static unsigned int __init emev2_get_core_count(void)
54{ 54{
55 if (!scu_base) { 55 if (!scu_base) {
56 scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE); 56 scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
@@ -62,17 +62,35 @@ unsigned int __init emev2_get_core_count(void)
62 return scu_base ? scu_get_core_count(scu_base) : 1; 62 return scu_base ? scu_get_core_count(scu_base) : 1;
63} 63}
64 64
65int emev2_platform_cpu_kill(unsigned int cpu) 65static int emev2_platform_cpu_kill(unsigned int cpu)
66{ 66{
67 return 0; /* not supported yet */ 67 return 0; /* not supported yet */
68} 68}
69 69
70void __cpuinit emev2_secondary_init(unsigned int cpu) 70static int __maybe_unused emev2_cpu_kill(unsigned int cpu)
71{
72 int k;
73
74 /* this function is running on another CPU than the offline target,
75 * here we need wait for shutdown code in platform_cpu_die() to
76 * finish before asking SoC-specific code to power off the CPU core.
77 */
78 for (k = 0; k < 1000; k++) {
79 if (shmobile_cpu_is_dead(cpu))
80 return emev2_platform_cpu_kill(cpu);
81 mdelay(1);
82 }
83
84 return 0;
85}
86
87
88static void __cpuinit emev2_secondary_init(unsigned int cpu)
71{ 89{
72 gic_secondary_init(0); 90 gic_secondary_init(0);
73} 91}
74 92
75int __cpuinit emev2_boot_secondary(unsigned int cpu) 93static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
76{ 94{
77 cpu = cpu_logical_map(cpu); 95 cpu = cpu_logical_map(cpu);
78 96
@@ -86,7 +104,7 @@ int __cpuinit emev2_boot_secondary(unsigned int cpu)
86 return 0; 104 return 0;
87} 105}
88 106
89void __init emev2_smp_prepare_cpus(void) 107static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
90{ 108{
91 int cpu = cpu_logical_map(0); 109 int cpu = cpu_logical_map(0);
92 110
@@ -95,3 +113,22 @@ void __init emev2_smp_prepare_cpus(void)
95 /* enable cache coherency on CPU0 */ 113 /* enable cache coherency on CPU0 */
96 modify_scu_cpu_psr(0, 3 << (cpu * 8)); 114 modify_scu_cpu_psr(0, 3 << (cpu * 8));
97} 115}
116
117static void __init emev2_smp_init_cpus(void)
118{
119 unsigned int ncores = emev2_get_core_count();
120
121 shmobile_smp_init_cpus(ncores);
122}
123
124struct smp_operations emev2_smp_ops __initdata = {
125 .smp_init_cpus = emev2_smp_init_cpus,
126 .smp_prepare_cpus = emev2_smp_prepare_cpus,
127 .smp_secondary_init = emev2_secondary_init,
128 .smp_boot_secondary = emev2_boot_secondary,
129#ifdef CONFIG_HOTPLUG_CPU
130 .cpu_kill = emev2_cpu_kill,
131 .cpu_die = shmobile_cpu_die,
132 .cpu_disable = shmobile_cpu_disable,
133#endif
134};
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 6d1d0238cbf..2ce6af9a6a3 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -87,14 +87,14 @@ static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
87 __raw_writel(tmp, scu_base + 8); 87 __raw_writel(tmp, scu_base + 8);
88} 88}
89 89
90unsigned int __init r8a7779_get_core_count(void) 90static unsigned int __init r8a7779_get_core_count(void)
91{ 91{
92 void __iomem *scu_base = scu_base_addr(); 92 void __iomem *scu_base = scu_base_addr();
93 93
94 return scu_get_core_count(scu_base); 94 return scu_get_core_count(scu_base);
95} 95}
96 96
97int r8a7779_platform_cpu_kill(unsigned int cpu) 97static int r8a7779_platform_cpu_kill(unsigned int cpu)
98{ 98{
99 struct r8a7779_pm_ch *ch = NULL; 99 struct r8a7779_pm_ch *ch = NULL;
100 int ret = -EIO; 100 int ret = -EIO;
@@ -113,12 +113,31 @@ int r8a7779_platform_cpu_kill(unsigned int cpu)
113 return ret ? ret : 1; 113 return ret ? ret : 1;
114} 114}
115 115
116void __cpuinit r8a7779_secondary_init(unsigned int cpu) 116static int __maybe_unused r8a7779_cpu_kill(unsigned int cpu)
117{
118 int k;
119
120 /* this function is running on another CPU than the offline target,
121 * here we need wait for shutdown code in platform_cpu_die() to
122 * finish before asking SoC-specific code to power off the CPU core.
123 */
124 for (k = 0; k < 1000; k++) {
125 if (shmobile_cpu_is_dead(cpu))
126 return r8a7779_platform_cpu_kill(cpu);
127
128 mdelay(1);
129 }
130
131 return 0;
132}
133
134
135static void __cpuinit r8a7779_secondary_init(unsigned int cpu)
117{ 136{
118 gic_secondary_init(0); 137 gic_secondary_init(0);
119} 138}
120 139
121int __cpuinit r8a7779_boot_secondary(unsigned int cpu) 140static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
122{ 141{
123 struct r8a7779_pm_ch *ch = NULL; 142 struct r8a7779_pm_ch *ch = NULL;
124 int ret = -EIO; 143 int ret = -EIO;
@@ -137,7 +156,7 @@ int __cpuinit r8a7779_boot_secondary(unsigned int cpu)
137 return ret; 156 return ret;
138} 157}
139 158
140void __init r8a7779_smp_prepare_cpus(void) 159static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
141{ 160{
142 int cpu = cpu_logical_map(0); 161 int cpu = cpu_logical_map(0);
143 162
@@ -156,3 +175,22 @@ void __init r8a7779_smp_prepare_cpus(void)
156 r8a7779_platform_cpu_kill(2); 175 r8a7779_platform_cpu_kill(2);
157 r8a7779_platform_cpu_kill(3); 176 r8a7779_platform_cpu_kill(3);
158} 177}
178
179static void __init r8a7779_smp_init_cpus(void)
180{
181 unsigned int ncores = r8a7779_get_core_count();
182
183 shmobile_smp_init_cpus(ncores);
184}
185
186struct smp_operations r8a7779_smp_ops __initdata = {
187 .smp_init_cpus = r8a7779_smp_init_cpus,
188 .smp_prepare_cpus = r8a7779_smp_prepare_cpus,
189 .smp_secondary_init = r8a7779_secondary_init,
190 .smp_boot_secondary = r8a7779_boot_secondary,
191#ifdef CONFIG_HOTPLUG_CPU
192 .cpu_kill = r8a7779_cpu_kill,
193 .cpu_die = shmobile_cpu_die,
194 .cpu_disable = shmobile_cpu_disable,
195#endif
196};
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index e36c41c4ab4..624f00f70ab 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -22,8 +22,10 @@
22#include <linux/smp.h> 22#include <linux/smp.h>
23#include <linux/spinlock.h> 23#include <linux/spinlock.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/delay.h>
25#include <mach/common.h> 26#include <mach/common.h>
26#include <asm/smp_plat.h> 27#include <asm/smp_plat.h>
28#include <mach/sh73a0.h>
27#include <asm/smp_scu.h> 29#include <asm/smp_scu.h>
28#include <asm/smp_twd.h> 30#include <asm/smp_twd.h>
29#include <asm/hardware/gic.h> 31#include <asm/hardware/gic.h>
@@ -64,19 +66,19 @@ static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
64 __raw_writel(tmp, scu_base + 8); 66 __raw_writel(tmp, scu_base + 8);
65} 67}
66 68
67unsigned int __init sh73a0_get_core_count(void) 69static unsigned int __init sh73a0_get_core_count(void)
68{ 70{
69 void __iomem *scu_base = scu_base_addr(); 71 void __iomem *scu_base = scu_base_addr();
70 72
71 return scu_get_core_count(scu_base); 73 return scu_get_core_count(scu_base);
72} 74}
73 75
74void __cpuinit sh73a0_secondary_init(unsigned int cpu) 76static void __cpuinit sh73a0_secondary_init(unsigned int cpu)
75{ 77{
76 gic_secondary_init(0); 78 gic_secondary_init(0);
77} 79}
78 80
79int __cpuinit sh73a0_boot_secondary(unsigned int cpu) 81static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
80{ 82{
81 cpu = cpu_logical_map(cpu); 83 cpu = cpu_logical_map(cpu);
82 84
@@ -91,7 +93,7 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
91 return 0; 93 return 0;
92} 94}
93 95
94void __init sh73a0_smp_prepare_cpus(void) 96static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
95{ 97{
96 int cpu = cpu_logical_map(0); 98 int cpu = cpu_logical_map(0);
97 99
@@ -104,3 +106,41 @@ void __init sh73a0_smp_prepare_cpus(void)
104 /* enable cache coherency on CPU0 */ 106 /* enable cache coherency on CPU0 */
105 modify_scu_cpu_psr(0, 3 << (cpu * 8)); 107 modify_scu_cpu_psr(0, 3 << (cpu * 8));
106} 108}
109
110static void __init sh73a0_smp_init_cpus(void)
111{
112 unsigned int ncores = sh73a0_get_core_count();
113
114 shmobile_smp_init_cpus(ncores);
115}
116
117static int __maybe_unused sh73a0_cpu_kill(unsigned int cpu)
118{
119 int k;
120
121 /* this function is running on another CPU than the offline target,
122 * here we need wait for shutdown code in platform_cpu_die() to
123 * finish before asking SoC-specific code to power off the CPU core.
124 */
125 for (k = 0; k < 1000; k++) {
126 if (shmobile_cpu_is_dead(cpu))
127 return 1;
128
129 mdelay(1);
130 }
131
132 return 0;
133}
134
135
136struct smp_operations sh73a0_smp_ops __initdata = {
137 .smp_init_cpus = sh73a0_smp_init_cpus,
138 .smp_prepare_cpus = sh73a0_smp_prepare_cpus,
139 .smp_secondary_init = sh73a0_secondary_init,
140 .smp_boot_secondary = sh73a0_boot_secondary,
141#ifdef CONFIG_HOTPLUG_CPU
142 .cpu_kill = sh73a0_cpu_kill,
143 .cpu_die = shmobile_cpu_die,
144 .cpu_disable = shmobile_cpu_disable,
145#endif
146};
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-21 11:31:35 -0400