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-rw-r--r--arch/arm/mach-s3c2410/Kconfig7
-rw-r--r--arch/arm/mach-s3c2410/Makefile1
-rw-r--r--arch/arm/mach-s3c2410/dma.c14
-rw-r--r--arch/arm/mach-s3c2410/gpio.c72
-rw-r--r--arch/arm/mach-s3c2410/include/mach/dma.h20
-rw-r--r--arch/arm/mach-s3c2410/include/mach/fb.h75
-rw-r--r--arch/arm/mach-s3c2410/include/mach/gpio-fns.h99
-rw-r--r--arch/arm/mach-s3c2410/include/mach/gpio-track.h6
-rw-r--r--arch/arm/mach-s3c2410/include/mach/irqs.h4
-rw-r--r--arch/arm/mach-s3c2410/include/mach/map.h53
-rw-r--r--arch/arm/mach-s3c2410/include/mach/pm-core.h2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h1
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c6
-rw-r--r--arch/arm/mach-s3c2410/mach-qt2410.c1
-rw-r--r--arch/arm/mach-s3c2410/s3c2410.c4
15 files changed, 75 insertions, 290 deletions
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 7245a55795d..5261a7ed099 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -6,9 +6,7 @@ config CPU_S3C2410
6 bool 6 bool
7 depends on ARCH_S3C2410 7 depends on ARCH_S3C2410
8 select CPU_ARM920T 8 select CPU_ARM920T
9 select S3C_GPIO_PULL_UP
10 select S3C2410_CLOCK 9 select S3C2410_CLOCK
11 select S3C2410_GPIO
12 select CPU_LLSERIAL_S3C2410 10 select CPU_LLSERIAL_S3C2410
13 select S3C2410_PM if PM 11 select S3C2410_PM if PM
14 select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX 12 select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX
@@ -28,11 +26,6 @@ config S3C2410_PM
28 help 26 help
29 Power Management code common to S3C2410 and better 27 Power Management code common to S3C2410 and better
30 28
31config S3C2410_GPIO
32 bool
33 help
34 GPIO code for S3C2410 and similar processors
35
36config SIMTEC_NOR 29config SIMTEC_NOR
37 bool 30 bool
38 help 31 help
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile
index 81695353d8f..782fd81144e 100644
--- a/arch/arm/mach-s3c2410/Makefile
+++ b/arch/arm/mach-s3c2410/Makefile
@@ -13,7 +13,6 @@ obj-$(CONFIG_CPU_S3C2410) += s3c2410.o
13obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o 13obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o
14obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o 14obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o
15obj-$(CONFIG_S3C2410_PM) += pm.o sleep.o 15obj-$(CONFIG_S3C2410_PM) += pm.o sleep.o
16obj-$(CONFIG_S3C2410_GPIO) += gpio.o
17obj-$(CONFIG_S3C2410_CPUFREQ) += cpu-freq.o 16obj-$(CONFIG_S3C2410_CPUFREQ) += cpu-freq.o
18obj-$(CONFIG_S3C2410_PLLTABLE) += pll.o 17obj-$(CONFIG_S3C2410_PLLTABLE) += pll.o
19 18
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 0d8e043804c..dbe43df8cfe 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -47,38 +47,26 @@ static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
47 .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID, 47 .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
48 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID, 48 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
49 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID, 49 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
50 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
51 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
52 }, 50 },
53 [DMACH_SPI0] = { 51 [DMACH_SPI0] = {
54 .name = "spi0", 52 .name = "spi0",
55 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID, 53 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
56 .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
57 .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
58 }, 54 },
59 [DMACH_SPI1] = { 55 [DMACH_SPI1] = {
60 .name = "spi1", 56 .name = "spi1",
61 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID, 57 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
62 .hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT,
63 .hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT,
64 }, 58 },
65 [DMACH_UART0] = { 59 [DMACH_UART0] = {
66 .name = "uart0", 60 .name = "uart0",
67 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID, 61 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
68 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
69 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
70 }, 62 },
71 [DMACH_UART1] = { 63 [DMACH_UART1] = {
72 .name = "uart1", 64 .name = "uart1",
73 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID, 65 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
74 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
75 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
76 }, 66 },
77 [DMACH_UART2] = { 67 [DMACH_UART2] = {
78 .name = "uart2", 68 .name = "uart2",
79 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID, 69 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
80 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
81 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
82 }, 70 },
83 [DMACH_TIMER] = { 71 [DMACH_TIMER] = {
84 .name = "timer", 72 .name = "timer",
@@ -90,12 +78,10 @@ static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
90 .name = "i2s-sdi", 78 .name = "i2s-sdi",
91 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID, 79 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
92 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID, 80 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
93 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
94 }, 81 },
95 [DMACH_I2S_OUT] = { 82 [DMACH_I2S_OUT] = {
96 .name = "i2s-sdo", 83 .name = "i2s-sdo",
97 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID, 84 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
98 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
99 }, 85 },
100 [DMACH_USB_EP1] = { 86 [DMACH_USB_EP1] = {
101 .name = "usb-ep1", 87 .name = "usb-ep1",
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c
deleted file mode 100644
index 9664e011dae..00000000000
--- a/arch/arm/mach-s3c2410/gpio.c
+++ /dev/null
@@ -1,72 +0,0 @@
1/* linux/arch/arm/mach-s3c2410/gpio.c
2 *
3 * Copyright (c) 2004-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 GPIO support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/module.h>
26#include <linux/interrupt.h>
27#include <linux/ioport.h>
28#include <linux/io.h>
29
30#include <mach/hardware.h>
31#include <mach/gpio-fns.h>
32#include <asm/irq.h>
33
34#include <mach/regs-gpio.h>
35
36int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
37 unsigned int config)
38{
39 void __iomem *reg = S3C24XX_EINFLT0;
40 unsigned long flags;
41 unsigned long val;
42
43 if (pin < S3C2410_GPG(8) || pin > S3C2410_GPG(15))
44 return -EINVAL;
45
46 config &= 0xff;
47
48 pin -= S3C2410_GPG(8);
49 reg += pin & ~3;
50
51 local_irq_save(flags);
52
53 /* update filter width and clock source */
54
55 val = __raw_readl(reg);
56 val &= ~(0xff << ((pin & 3) * 8));
57 val |= config << ((pin & 3) * 8);
58 __raw_writel(val, reg);
59
60 /* update filter enable */
61
62 val = __raw_readl(S3C24XX_EXTINT2);
63 val &= ~(1 << ((pin * 4) + 3));
64 val |= on << ((pin * 4) + 3);
65 __raw_writel(val, S3C24XX_EXTINT2);
66
67 local_irq_restore(flags);
68
69 return 0;
70}
71
72EXPORT_SYMBOL(s3c2410_gpio_irqfilter);
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c2410/include/mach/dma.h
index b2b2a5bb275..ae8e482b642 100644
--- a/arch/arm/mach-s3c2410/include/mach/dma.h
+++ b/arch/arm/mach-s3c2410/include/mach/dma.h
@@ -13,7 +13,6 @@
13#ifndef __ASM_ARCH_DMA_H 13#ifndef __ASM_ARCH_DMA_H
14#define __ASM_ARCH_DMA_H __FILE__ 14#define __ASM_ARCH_DMA_H __FILE__
15 15
16#include <plat/dma.h>
17#include <linux/sysdev.h> 16#include <linux/sysdev.h>
18 17
19#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ 18#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */
@@ -51,6 +50,18 @@ enum dma_ch {
51 DMACH_MAX, /* the end entry */ 50 DMACH_MAX, /* the end entry */
52}; 51};
53 52
53static inline bool samsung_dma_has_circular(void)
54{
55 return false;
56}
57
58static inline bool samsung_dma_is_dmadev(void)
59{
60 return false;
61}
62
63#include <plat/dma.h>
64
54#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */ 65#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */
55 66
56/* we have 4 dma channels */ 67/* we have 4 dma channels */
@@ -163,7 +174,7 @@ struct s3c2410_dma_chan {
163 struct s3c2410_dma_client *client; 174 struct s3c2410_dma_client *client;
164 175
165 /* channel configuration */ 176 /* channel configuration */
166 enum s3c2410_dmasrc source; 177 enum dma_data_direction source;
167 enum dma_ch req_ch; 178 enum dma_ch req_ch;
168 unsigned long dev_addr; 179 unsigned long dev_addr;
169 unsigned long load_timeout; 180 unsigned long load_timeout;
@@ -196,9 +207,4 @@ struct s3c2410_dma_chan {
196 207
197typedef unsigned long dma_device_t; 208typedef unsigned long dma_device_t;
198 209
199static inline bool s3c_dma_has_circular(void)
200{
201 return false;
202}
203
204#endif /* __ASM_ARCH_DMA_H */ 210#endif /* __ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/fb.h b/arch/arm/mach-s3c2410/include/mach/fb.h
index eee0654eb8f..a957bc8ed44 100644
--- a/arch/arm/mach-s3c2410/include/mach/fb.h
+++ b/arch/arm/mach-s3c2410/include/mach/fb.h
@@ -1,74 +1 @@
1/* arch/arm/mach-s3c2410/include/mach/fb.h #include <plat/fb-s3c2410.h>
2 *
3 * Copyright (c) 2004 Arnaud Patard <arnaud.patard@rtp-net.org>
4 *
5 * Inspired by pxafb.h
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#ifndef __ASM_ARM_FB_H
13#define __ASM_ARM_FB_H
14
15#include <mach/regs-lcd.h>
16
17struct s3c2410fb_hw {
18 unsigned long lcdcon1;
19 unsigned long lcdcon2;
20 unsigned long lcdcon3;
21 unsigned long lcdcon4;
22 unsigned long lcdcon5;
23};
24
25/* LCD description */
26struct s3c2410fb_display {
27 /* LCD type */
28 unsigned type;
29
30 /* Screen size */
31 unsigned short width;
32 unsigned short height;
33
34 /* Screen info */
35 unsigned short xres;
36 unsigned short yres;
37 unsigned short bpp;
38
39 unsigned pixclock; /* pixclock in picoseconds */
40 unsigned short left_margin; /* value in pixels (TFT) or HCLKs (STN) */
41 unsigned short right_margin; /* value in pixels (TFT) or HCLKs (STN) */
42 unsigned short hsync_len; /* value in pixels (TFT) or HCLKs (STN) */
43 unsigned short upper_margin; /* value in lines (TFT) or 0 (STN) */
44 unsigned short lower_margin; /* value in lines (TFT) or 0 (STN) */
45 unsigned short vsync_len; /* value in lines (TFT) or 0 (STN) */
46
47 /* lcd configuration registers */
48 unsigned long lcdcon5;
49};
50
51struct s3c2410fb_mach_info {
52
53 struct s3c2410fb_display *displays; /* attached diplays info */
54 unsigned num_displays; /* number of defined displays */
55 unsigned default_display;
56
57 /* GPIOs */
58
59 unsigned long gpcup;
60 unsigned long gpcup_mask;
61 unsigned long gpccon;
62 unsigned long gpccon_mask;
63 unsigned long gpdup;
64 unsigned long gpdup_mask;
65 unsigned long gpdcon;
66 unsigned long gpdcon_mask;
67
68 /* lpc3600 control register */
69 unsigned long lpcsel;
70};
71
72extern void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *);
73
74#endif /* __ASM_ARM_FB_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-fns.h b/arch/arm/mach-s3c2410/include/mach/gpio-fns.h
index bab13920176..c53ad34c657 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio-fns.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio-fns.h
@@ -1,98 +1 @@
1/* arch/arm/mach-s3c2410/include/mach/gpio-fns.h #include <plat/gpio-fns.h>
2 *
3 * Copyright (c) 2003-2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 - hardware
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __MACH_GPIO_FNS_H
14#define __MACH_GPIO_FNS_H __FILE__
15
16/* These functions are in the to-be-removed category and it is strongly
17 * encouraged not to use these in new code. They will be marked deprecated
18 * very soon.
19 *
20 * Most of the functionality can be either replaced by the gpiocfg calls
21 * for the s3c platform or by the generic GPIOlib API.
22 *
23 * As of 2.6.35-rc, these will be removed, with the few drivers using them
24 * either replaced or given a wrapper until the calls can be removed.
25*/
26
27#include <plat/gpio-cfg.h>
28
29static inline void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int cfg)
30{
31 /* 1:1 mapping between cfgpin and setcfg calls at the moment */
32 s3c_gpio_cfgpin(pin, cfg);
33}
34
35/* external functions for GPIO support
36 *
37 * These allow various different clients to access the same GPIO
38 * registers without conflicting. If your driver only owns the entire
39 * GPIO register, then it is safe to ioremap/__raw_{read|write} to it.
40*/
41
42extern unsigned int s3c2410_gpio_getcfg(unsigned int pin);
43
44/* s3c2410_gpio_getirq
45 *
46 * turn the given pin number into the corresponding IRQ number
47 *
48 * returns:
49 * < 0 = no interrupt for this pin
50 * >=0 = interrupt number for the pin
51*/
52
53extern int s3c2410_gpio_getirq(unsigned int pin);
54
55/* s3c2410_gpio_irqfilter
56 *
57 * set the irq filtering on the given pin
58 *
59 * on = 0 => disable filtering
60 * 1 => enable filtering
61 *
62 * config = S3C2410_EINTFLT_PCLK or S3C2410_EINTFLT_EXTCLK orred with
63 * width of filter (0 through 63)
64 *
65 *
66*/
67
68extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
69 unsigned int config);
70
71/* s3c2410_gpio_pullup
72 *
73 * This call should be replaced with s3c_gpio_setpull().
74 *
75 * As a note, there is currently no distinction between pull-up and pull-down
76 * in the s3c24xx series devices with only an on/off configuration.
77 */
78
79/* s3c2410_gpio_pullup
80 *
81 * configure the pull-up control on the given pin
82 *
83 * to = 1 => disable the pull-up
84 * 0 => enable the pull-up
85 *
86 * eg;
87 *
88 * s3c2410_gpio_pullup(S3C2410_GPB(0), 0);
89 * s3c2410_gpio_pullup(S3C2410_GPE(8), 0);
90*/
91
92extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to);
93
94extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to);
95
96extern unsigned int s3c2410_gpio_getpin(unsigned int pin);
97
98#endif /* __MACH_GPIO_FNS_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-track.h b/arch/arm/mach-s3c2410/include/mach/gpio-track.h
index d67819dde42..c410a078622 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio-track.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio-track.h
@@ -17,11 +17,11 @@
17 17
18#include <mach/regs-gpio.h> 18#include <mach/regs-gpio.h>
19 19
20extern struct s3c_gpio_chip s3c24xx_gpios[]; 20extern struct samsung_gpio_chip s3c24xx_gpios[];
21 21
22static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int pin) 22static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int pin)
23{ 23{
24 struct s3c_gpio_chip *chip; 24 struct samsung_gpio_chip *chip;
25 25
26 if (pin > S3C_GPIO_END) 26 if (pin > S3C_GPIO_END)
27 return NULL; 27 return NULL;
diff --git a/arch/arm/mach-s3c2410/include/mach/irqs.h b/arch/arm/mach-s3c2410/include/mach/irqs.h
index e5a68ea1311..e53b2177319 100644
--- a/arch/arm/mach-s3c2410/include/mach/irqs.h
+++ b/arch/arm/mach-s3c2410/include/mach/irqs.h
@@ -191,9 +191,9 @@
191#define IRQ_LCD_SYSTEM IRQ_S3C2443_LCD2 191#define IRQ_LCD_SYSTEM IRQ_S3C2443_LCD2
192 192
193#ifdef CONFIG_CPU_S3C2440 193#ifdef CONFIG_CPU_S3C2440
194#define IRQ_S3C244x_AC97 IRQ_S3C2440_AC97 194#define IRQ_S3C244X_AC97 IRQ_S3C2440_AC97
195#else 195#else
196#define IRQ_S3C244x_AC97 IRQ_S3C2443_AC97 196#define IRQ_S3C244X_AC97 IRQ_S3C2443_AC97
197#endif 197#endif
198 198
199/* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */ 199/* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h
index 425552d84b6..78ae807f128 100644
--- a/arch/arm/mach-s3c2410/include/mach/map.h
+++ b/arch/arm/mach-s3c2410/include/mach/map.h
@@ -14,9 +14,53 @@
14#define __ASM_ARCH_MAP_H 14#define __ASM_ARCH_MAP_H
15 15
16#include <plat/map-base.h> 16#include <plat/map-base.h>
17#include <plat/map.h>
18 17
19#define S3C2410_ADDR(x) S3C_ADDR(x) 18/*
19 * S3C2410 UART offset is 0x4000 but the other SoCs are 0x400.
20 * So need to define it, and here is to avoid redefinition warning.
21 */
22#define S3C_UART_OFFSET (0x4000)
23
24#include <plat/map-s3c.h>
25
26/*
27 * interrupt controller is the first thing we put in, to make
28 * the assembly code for the irq detection easier
29 */
30#define S3C2410_PA_IRQ (0x4A000000)
31#define S3C24XX_SZ_IRQ SZ_1M
32
33/* memory controller registers */
34#define S3C2410_PA_MEMCTRL (0x48000000)
35#define S3C24XX_SZ_MEMCTRL SZ_1M
36
37/* UARTs */
38#define S3C_VA_UARTx(uart) (S3C_VA_UART + ((uart * S3C_UART_OFFSET)))
39
40/* Timers */
41#define S3C2410_PA_TIMER (0x51000000)
42#define S3C24XX_SZ_TIMER SZ_1M
43
44/* Clock and Power management */
45#define S3C24XX_SZ_CLKPWR SZ_1M
46
47/* USB Device port */
48#define S3C2410_PA_USBDEV (0x52000000)
49#define S3C24XX_SZ_USBDEV SZ_1M
50
51/* Watchdog */
52#define S3C2410_PA_WATCHDOG (0x53000000)
53#define S3C24XX_SZ_WATCHDOG SZ_1M
54
55/* Standard size definitions for peripheral blocks. */
56
57#define S3C24XX_SZ_UART SZ_1M
58#define S3C24XX_SZ_IIS SZ_1M
59#define S3C24XX_SZ_ADC SZ_1M
60#define S3C24XX_SZ_SPI SZ_1M
61#define S3C24XX_SZ_SDI SZ_1M
62#define S3C24XX_SZ_NAND SZ_1M
63#define S3C24XX_SZ_GPIO SZ_1M
20 64
21/* USB host controller */ 65/* USB host controller */
22#define S3C2410_PA_USBHOST (0x49000000) 66#define S3C2410_PA_USBHOST (0x49000000)
@@ -75,10 +119,8 @@
75 119
76/* S3C2412 memory and IO controls */ 120/* S3C2412 memory and IO controls */
77#define S3C2412_PA_SSMC (0x4F000000) 121#define S3C2412_PA_SSMC (0x4F000000)
78#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
79 122
80#define S3C2412_PA_EBI (0x48800000) 123#define S3C2412_PA_EBI (0x48800000)
81#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00010000)
82 124
83/* physical addresses of all the chip-select areas */ 125/* physical addresses of all the chip-select areas */
84 126
@@ -100,15 +142,14 @@
100#define S3C24XX_PA_DMA S3C2410_PA_DMA 142#define S3C24XX_PA_DMA S3C2410_PA_DMA
101#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR 143#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR
102#define S3C24XX_PA_LCD S3C2410_PA_LCD 144#define S3C24XX_PA_LCD S3C2410_PA_LCD
103#define S3C24XX_PA_UART S3C2410_PA_UART
104#define S3C24XX_PA_TIMER S3C2410_PA_TIMER 145#define S3C24XX_PA_TIMER S3C2410_PA_TIMER
105#define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV 146#define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV
106#define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG 147#define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG
107#define S3C24XX_PA_IIS S3C2410_PA_IIS 148#define S3C24XX_PA_IIS S3C2410_PA_IIS
108#define S3C24XX_PA_GPIO S3C2410_PA_GPIO
109#define S3C24XX_PA_RTC S3C2410_PA_RTC 149#define S3C24XX_PA_RTC S3C2410_PA_RTC
110#define S3C24XX_PA_ADC S3C2410_PA_ADC 150#define S3C24XX_PA_ADC S3C2410_PA_ADC
111#define S3C24XX_PA_SPI S3C2410_PA_SPI 151#define S3C24XX_PA_SPI S3C2410_PA_SPI
152#define S3C24XX_PA_SPI1 (S3C2410_PA_SPI + S3C2410_SPI1)
112#define S3C24XX_PA_SDI S3C2410_PA_SDI 153#define S3C24XX_PA_SDI S3C2410_PA_SDI
113#define S3C24XX_PA_NAND S3C2410_PA_NAND 154#define S3C24XX_PA_NAND S3C2410_PA_NAND
114 155
diff --git a/arch/arm/mach-s3c2410/include/mach/pm-core.h b/arch/arm/mach-s3c2410/include/mach/pm-core.h
index 45eea5210c8..2eef7e6f767 100644
--- a/arch/arm/mach-s3c2410/include/mach/pm-core.h
+++ b/arch/arm/mach-s3c2410/include/mach/pm-core.h
@@ -64,4 +64,4 @@ static inline void s3c_pm_arch_update_uart(void __iomem *regs,
64} 64}
65 65
66static inline void s3c_pm_restored_gpios(void) { } 66static inline void s3c_pm_restored_gpios(void) { }
67static inline void s3c_pm_saved_gpios(void) { } 67static inline void samsung_pm_saved_gpios(void) { }
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
index 5e06c726583..df6434f326f 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
@@ -102,6 +102,7 @@
102#define S3C2443_PCLKCON_UART3 (1<<3) 102#define S3C2443_PCLKCON_UART3 (1<<3)
103#define S3C2443_PCLKCON_IIC (1<<4) 103#define S3C2443_PCLKCON_IIC (1<<4)
104#define S3C2443_PCLKCON_SDI (1<<5) 104#define S3C2443_PCLKCON_SDI (1<<5)
105#define S3C2443_PCLKCON_HSSPI (1<<6)
105#define S3C2443_PCLKCON_ADC (1<<7) 106#define S3C2443_PCLKCON_ADC (1<<7)
106#define S3C2443_PCLKCON_AC97 (1<<8) 107#define S3C2443_PCLKCON_AC97 (1<<8)
107#define S3C2443_PCLKCON_IIS (1<<9) 108#define S3C2443_PCLKCON_IIS (1<<9)
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 556c535829f..caa4ae29ec7 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -696,9 +696,9 @@ static void __init h1940_init(void)
696 S3C2410_MISCCR_USBSUSPND0 | 696 S3C2410_MISCCR_USBSUSPND0 |
697 S3C2410_MISCCR_USBSUSPND1, 0x0); 697 S3C2410_MISCCR_USBSUSPND1, 0x0);
698 698
699 tmp = (0x78 << S3C24XX_PLLCON_MDIVSHIFT) 699 tmp = (0x78 << S3C24XX_PLL_MDIV_SHIFT)
700 | (0x02 << S3C24XX_PLLCON_PDIVSHIFT) 700 | (0x02 << S3C24XX_PLL_PDIV_SHIFT)
701 | (0x03 << S3C24XX_PLLCON_SDIVSHIFT); 701 | (0x03 << S3C24XX_PLL_SDIV_SHIFT);
702 writel(tmp, S3C2410_UPLLCON); 702 writel(tmp, S3C2410_UPLLCON);
703 703
704 gpio_request(S3C2410_GPC(0), "LCD power"); 704 gpio_request(S3C2410_GPC(0), "LCD power");
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index 367d376deb9..45185215625 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -49,6 +49,7 @@
49 49
50#include <mach/regs-gpio.h> 50#include <mach/regs-gpio.h>
51#include <mach/leds-gpio.h> 51#include <mach/leds-gpio.h>
52#include <mach/regs-lcd.h>
52#include <plat/regs-serial.h> 53#include <plat/regs-serial.h>
53#include <mach/fb.h> 54#include <mach/fb.h>
54#include <plat/nand.h> 55#include <plat/nand.h>
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index f1d3bd8f6f1..a99c2f4a523 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -72,8 +72,8 @@ void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
72 72
73void __init s3c2410_map_io(void) 73void __init s3c2410_map_io(void)
74{ 74{
75 s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up; 75 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
76 s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up; 76 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
77 77
78 iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc)); 78 iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
79} 79}