diff options
Diffstat (limited to 'arch/arm/mach-s3c2410/include/mach/regs-gpioj.h')
-rw-r--r-- | arch/arm/mach-s3c2410/include/mach/regs-gpioj.h | 36 |
1 files changed, 0 insertions, 36 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h b/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h index 1202ca5e99f..19575e06111 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h | |||
@@ -22,85 +22,49 @@ | |||
22 | * pull up works like all other ports. | 22 | * pull up works like all other ports. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #define S3C2440_GPIO_BANKJ (416) | ||
26 | |||
27 | #define S3C2440_GPJCON S3C2410_GPIOREG(0xd0) | ||
28 | #define S3C2440_GPJDAT S3C2410_GPIOREG(0xd4) | ||
29 | #define S3C2440_GPJUP S3C2410_GPIOREG(0xd8) | ||
30 | |||
31 | #define S3C2413_GPJCON S3C2410_GPIOREG(0x80) | 25 | #define S3C2413_GPJCON S3C2410_GPIOREG(0x80) |
32 | #define S3C2413_GPJDAT S3C2410_GPIOREG(0x84) | 26 | #define S3C2413_GPJDAT S3C2410_GPIOREG(0x84) |
33 | #define S3C2413_GPJUP S3C2410_GPIOREG(0x88) | 27 | #define S3C2413_GPJUP S3C2410_GPIOREG(0x88) |
34 | #define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C) | 28 | #define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C) |
35 | 29 | ||
36 | #define S3C2440_GPJ0 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 0) | ||
37 | #define S3C2440_GPJ0_INP (0x00 << 0) | ||
38 | #define S3C2440_GPJ0_OUTP (0x01 << 0) | 30 | #define S3C2440_GPJ0_OUTP (0x01 << 0) |
39 | #define S3C2440_GPJ0_CAMDATA0 (0x02 << 0) | 31 | #define S3C2440_GPJ0_CAMDATA0 (0x02 << 0) |
40 | 32 | ||
41 | #define S3C2440_GPJ1 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 1) | ||
42 | #define S3C2440_GPJ1_INP (0x00 << 2) | ||
43 | #define S3C2440_GPJ1_OUTP (0x01 << 2) | 33 | #define S3C2440_GPJ1_OUTP (0x01 << 2) |
44 | #define S3C2440_GPJ1_CAMDATA1 (0x02 << 2) | 34 | #define S3C2440_GPJ1_CAMDATA1 (0x02 << 2) |
45 | 35 | ||
46 | #define S3C2440_GPJ2 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 2) | ||
47 | #define S3C2440_GPJ2_INP (0x00 << 4) | ||
48 | #define S3C2440_GPJ2_OUTP (0x01 << 4) | 36 | #define S3C2440_GPJ2_OUTP (0x01 << 4) |
49 | #define S3C2440_GPJ2_CAMDATA2 (0x02 << 4) | 37 | #define S3C2440_GPJ2_CAMDATA2 (0x02 << 4) |
50 | 38 | ||
51 | #define S3C2440_GPJ3 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 3) | ||
52 | #define S3C2440_GPJ3_INP (0x00 << 6) | ||
53 | #define S3C2440_GPJ3_OUTP (0x01 << 6) | 39 | #define S3C2440_GPJ3_OUTP (0x01 << 6) |
54 | #define S3C2440_GPJ3_CAMDATA3 (0x02 << 6) | 40 | #define S3C2440_GPJ3_CAMDATA3 (0x02 << 6) |
55 | 41 | ||
56 | #define S3C2440_GPJ4 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 4) | ||
57 | #define S3C2440_GPJ4_INP (0x00 << 8) | ||
58 | #define S3C2440_GPJ4_OUTP (0x01 << 8) | 42 | #define S3C2440_GPJ4_OUTP (0x01 << 8) |
59 | #define S3C2440_GPJ4_CAMDATA4 (0x02 << 8) | 43 | #define S3C2440_GPJ4_CAMDATA4 (0x02 << 8) |
60 | 44 | ||
61 | #define S3C2440_GPJ5 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 5) | ||
62 | #define S3C2440_GPJ5_INP (0x00 << 10) | ||
63 | #define S3C2440_GPJ5_OUTP (0x01 << 10) | 45 | #define S3C2440_GPJ5_OUTP (0x01 << 10) |
64 | #define S3C2440_GPJ5_CAMDATA5 (0x02 << 10) | 46 | #define S3C2440_GPJ5_CAMDATA5 (0x02 << 10) |
65 | 47 | ||
66 | #define S3C2440_GPJ6 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 6) | ||
67 | #define S3C2440_GPJ6_INP (0x00 << 12) | ||
68 | #define S3C2440_GPJ6_OUTP (0x01 << 12) | 48 | #define S3C2440_GPJ6_OUTP (0x01 << 12) |
69 | #define S3C2440_GPJ6_CAMDATA6 (0x02 << 12) | 49 | #define S3C2440_GPJ6_CAMDATA6 (0x02 << 12) |
70 | 50 | ||
71 | #define S3C2440_GPJ7 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 7) | ||
72 | #define S3C2440_GPJ7_INP (0x00 << 14) | ||
73 | #define S3C2440_GPJ7_OUTP (0x01 << 14) | 51 | #define S3C2440_GPJ7_OUTP (0x01 << 14) |
74 | #define S3C2440_GPJ7_CAMDATA7 (0x02 << 14) | 52 | #define S3C2440_GPJ7_CAMDATA7 (0x02 << 14) |
75 | 53 | ||
76 | #define S3C2440_GPJ8 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 8) | ||
77 | #define S3C2440_GPJ8_INP (0x00 << 16) | ||
78 | #define S3C2440_GPJ8_OUTP (0x01 << 16) | 54 | #define S3C2440_GPJ8_OUTP (0x01 << 16) |
79 | #define S3C2440_GPJ8_CAMPCLK (0x02 << 16) | 55 | #define S3C2440_GPJ8_CAMPCLK (0x02 << 16) |
80 | 56 | ||
81 | #define S3C2440_GPJ9 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 9) | ||
82 | #define S3C2440_GPJ9_INP (0x00 << 18) | ||
83 | #define S3C2440_GPJ9_OUTP (0x01 << 18) | 57 | #define S3C2440_GPJ9_OUTP (0x01 << 18) |
84 | #define S3C2440_GPJ9_CAMVSYNC (0x02 << 18) | 58 | #define S3C2440_GPJ9_CAMVSYNC (0x02 << 18) |
85 | 59 | ||
86 | #define S3C2440_GPJ10 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 10) | ||
87 | #define S3C2440_GPJ10_INP (0x00 << 20) | ||
88 | #define S3C2440_GPJ10_OUTP (0x01 << 20) | 60 | #define S3C2440_GPJ10_OUTP (0x01 << 20) |
89 | #define S3C2440_GPJ10_CAMHREF (0x02 << 20) | 61 | #define S3C2440_GPJ10_CAMHREF (0x02 << 20) |
90 | 62 | ||
91 | #define S3C2440_GPJ11 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 11) | ||
92 | #define S3C2440_GPJ11_INP (0x00 << 22) | ||
93 | #define S3C2440_GPJ11_OUTP (0x01 << 22) | 63 | #define S3C2440_GPJ11_OUTP (0x01 << 22) |
94 | #define S3C2440_GPJ11_CAMCLKOUT (0x02 << 22) | 64 | #define S3C2440_GPJ11_CAMCLKOUT (0x02 << 22) |
95 | 65 | ||
96 | #define S3C2440_GPJ12 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 12) | ||
97 | #define S3C2440_GPJ12_INP (0x00 << 24) | ||
98 | #define S3C2440_GPJ12_OUTP (0x01 << 24) | 66 | #define S3C2440_GPJ12_OUTP (0x01 << 24) |
99 | #define S3C2440_GPJ12_CAMRESET (0x02 << 24) | 67 | #define S3C2440_GPJ12_CAMRESET (0x02 << 24) |
100 | 68 | ||
101 | #define S3C2443_GPJ13 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 13) | ||
102 | #define S3C2443_GPJ14 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 14) | ||
103 | #define S3C2443_GPJ15 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 15) | ||
104 | |||
105 | #endif /* __ASM_ARCH_REGS_GPIOJ_H */ | 69 | #endif /* __ASM_ARCH_REGS_GPIOJ_H */ |
106 | 70 | ||