aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-omap2/board-generic.c111
-rw-r--r--arch/arm/mach-omap2/common.h12
-rw-r--r--arch/arm/mach-omap2/irq.c60
-rw-r--r--arch/arm/mach-omap2/pm.c8
5 files changed, 122 insertions, 70 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 36b371face3..8141b76283a 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -117,7 +117,6 @@ comment "OMAP Board Type"
117config MACH_OMAP_GENERIC 117config MACH_OMAP_GENERIC
118 bool "Generic OMAP2+ board" 118 bool "Generic OMAP2+ board"
119 depends on ARCH_OMAP2PLUS 119 depends on ARCH_OMAP2PLUS
120 select USE_OF
121 default y 120 default y
122 help 121 help
123 Support for generic TI OMAP2+ boards using Flattened Device Tree. 122 Support for generic TI OMAP2+ boards using Flattened Device Tree.
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 45fdfe2bd9d..74e1687b517 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -12,6 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/of_irq.h>
15#include <linux/of_platform.h> 16#include <linux/of_platform.h>
16#include <linux/irqdomain.h> 17#include <linux/irqdomain.h>
17#include <linux/i2c/twl.h> 18#include <linux/i2c/twl.h>
@@ -24,33 +25,23 @@
24#include "common.h" 25#include "common.h"
25#include "common-board-devices.h" 26#include "common-board-devices.h"
26 27
27/* 28#if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3))
28 * XXX: Still needed to boot until the i2c & twl driver is adapted to 29#define omap_intc_of_init NULL
29 * device-tree 30#endif
30 */ 31#ifndef CONFIG_ARCH_OMAP4
31#ifdef CONFIG_ARCH_OMAP4 32#define gic_of_init NULL
32static struct twl4030_platform_data sdp4430_twldata = {
33 .irq_base = TWL6030_IRQ_BASE,
34 .irq_end = TWL6030_IRQ_END,
35};
36
37static void __init omap4_i2c_init(void)
38{
39 omap4_pmic_init("twl6030", &sdp4430_twldata);
40}
41#endif 33#endif
42 34
43#ifdef CONFIG_ARCH_OMAP3 35static struct of_device_id irq_match[] __initdata = {
44static struct twl4030_platform_data beagle_twldata = { 36 { .compatible = "ti,omap2-intc", .data = omap_intc_of_init, },
45 .irq_base = TWL4030_IRQ_BASE, 37 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
46 .irq_end = TWL4030_IRQ_END, 38 { }
47}; 39};
48 40
49static void __init omap3_i2c_init(void) 41static void __init omap_init_irq(void)
50{ 42{
51 omap3_pmic_init("twl4030", &beagle_twldata); 43 of_irq_init(irq_match);
52} 44}
53#endif
54 45
55static struct of_device_id omap_dt_match_table[] __initdata = { 46static struct of_device_id omap_dt_match_table[] __initdata = {
56 { .compatible = "simple-bus", }, 47 { .compatible = "simple-bus", },
@@ -58,51 +49,24 @@ static struct of_device_id omap_dt_match_table[] __initdata = {
58 { } 49 { }
59}; 50};
60 51
61static struct of_device_id intc_match[] __initdata = {
62 { .compatible = "ti,omap3-intc", },
63 { .compatible = "arm,cortex-a9-gic", },
64 { }
65};
66
67static void __init omap_generic_init(void) 52static void __init omap_generic_init(void)
68{ 53{
69 struct device_node *node = of_find_matching_node(NULL, intc_match);
70 if (node)
71 irq_domain_add_legacy(node, 32, 0, 0, &irq_domain_simple_ops, NULL);
72
73 omap_sdrc_init(NULL, NULL); 54 omap_sdrc_init(NULL, NULL);
74 55
75 of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); 56 of_platform_populate(NULL, omap_dt_match_table, NULL, NULL);
76} 57}
77 58
78#ifdef CONFIG_ARCH_OMAP4 59#ifdef CONFIG_SOC_OMAP2420
79static void __init omap4_init(void)
80{
81 omap4_i2c_init();
82 omap_generic_init();
83}
84#endif
85
86#ifdef CONFIG_ARCH_OMAP3
87static void __init omap3_init(void)
88{
89 omap3_i2c_init();
90 omap_generic_init();
91}
92#endif
93
94#if defined(CONFIG_SOC_OMAP2420)
95static const char *omap242x_boards_compat[] __initdata = { 60static const char *omap242x_boards_compat[] __initdata = {
96 "ti,omap2420", 61 "ti,omap2420",
97 NULL, 62 NULL,
98}; 63};
99 64
100DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") 65DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
101 .atag_offset = 0x100,
102 .reserve = omap_reserve, 66 .reserve = omap_reserve,
103 .map_io = omap242x_map_io, 67 .map_io = omap242x_map_io,
104 .init_early = omap2420_init_early, 68 .init_early = omap2420_init_early,
105 .init_irq = omap2_init_irq, 69 .init_irq = omap_init_irq,
106 .handle_irq = omap2_intc_handle_irq, 70 .handle_irq = omap2_intc_handle_irq,
107 .init_machine = omap_generic_init, 71 .init_machine = omap_generic_init,
108 .timer = &omap2_timer, 72 .timer = &omap2_timer,
@@ -111,18 +75,17 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
111MACHINE_END 75MACHINE_END
112#endif 76#endif
113 77
114#if defined(CONFIG_SOC_OMAP2430) 78#ifdef CONFIG_SOC_OMAP2430
115static const char *omap243x_boards_compat[] __initdata = { 79static const char *omap243x_boards_compat[] __initdata = {
116 "ti,omap2430", 80 "ti,omap2430",
117 NULL, 81 NULL,
118}; 82};
119 83
120DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") 84DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
121 .atag_offset = 0x100,
122 .reserve = omap_reserve, 85 .reserve = omap_reserve,
123 .map_io = omap243x_map_io, 86 .map_io = omap243x_map_io,
124 .init_early = omap2430_init_early, 87 .init_early = omap2430_init_early,
125 .init_irq = omap2_init_irq, 88 .init_irq = omap_init_irq,
126 .handle_irq = omap2_intc_handle_irq, 89 .handle_irq = omap2_intc_handle_irq,
127 .init_machine = omap_generic_init, 90 .init_machine = omap_generic_init,
128 .timer = &omap2_timer, 91 .timer = &omap2_timer,
@@ -131,18 +94,33 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
131MACHINE_END 94MACHINE_END
132#endif 95#endif
133 96
134#if defined(CONFIG_ARCH_OMAP3) 97#ifdef CONFIG_ARCH_OMAP3
98static struct twl4030_platform_data beagle_twldata = {
99 .irq_base = TWL4030_IRQ_BASE,
100 .irq_end = TWL4030_IRQ_END,
101};
102
103static void __init omap3_i2c_init(void)
104{
105 omap3_pmic_init("twl4030", &beagle_twldata);
106}
107
108static void __init omap3_init(void)
109{
110 omap3_i2c_init();
111 omap_generic_init();
112}
113
135static const char *omap3_boards_compat[] __initdata = { 114static const char *omap3_boards_compat[] __initdata = {
136 "ti,omap3", 115 "ti,omap3",
137 NULL, 116 NULL,
138}; 117};
139 118
140DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") 119DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
141 .atag_offset = 0x100,
142 .reserve = omap_reserve, 120 .reserve = omap_reserve,
143 .map_io = omap3_map_io, 121 .map_io = omap3_map_io,
144 .init_early = omap3430_init_early, 122 .init_early = omap3430_init_early,
145 .init_irq = omap3_init_irq, 123 .init_irq = omap_init_irq,
146 .handle_irq = omap3_intc_handle_irq, 124 .handle_irq = omap3_intc_handle_irq,
147 .init_machine = omap3_init, 125 .init_machine = omap3_init,
148 .timer = &omap3_timer, 126 .timer = &omap3_timer,
@@ -151,18 +129,33 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
151MACHINE_END 129MACHINE_END
152#endif 130#endif
153 131
154#if defined(CONFIG_ARCH_OMAP4) 132#ifdef CONFIG_ARCH_OMAP4
133static struct twl4030_platform_data sdp4430_twldata = {
134 .irq_base = TWL6030_IRQ_BASE,
135 .irq_end = TWL6030_IRQ_END,
136};
137
138static void __init omap4_i2c_init(void)
139{
140 omap4_pmic_init("twl6030", &sdp4430_twldata);
141}
142
143static void __init omap4_init(void)
144{
145 omap4_i2c_init();
146 omap_generic_init();
147}
148
155static const char *omap4_boards_compat[] __initdata = { 149static const char *omap4_boards_compat[] __initdata = {
156 "ti,omap4", 150 "ti,omap4",
157 NULL, 151 NULL,
158}; 152};
159 153
160DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") 154DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
161 .atag_offset = 0x100,
162 .reserve = omap_reserve, 155 .reserve = omap_reserve,
163 .map_io = omap4_map_io, 156 .map_io = omap4_map_io,
164 .init_early = omap4430_init_early, 157 .init_early = omap4430_init_early,
165 .init_irq = gic_init_irq, 158 .init_irq = omap_init_irq,
166 .handle_irq = gic_handle_irq, 159 .handle_irq = gic_handle_irq,
167 .init_machine = omap4_init, 160 .init_machine = omap4_init,
168 .timer = &omap4_timer, 161 .timer = &omap4_timer,
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 4897ec02e79..57da7f406e2 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -177,6 +177,18 @@ void omap3_intc_handle_irq(struct pt_regs *regs);
177extern void __iomem *omap4_get_l2cache_base(void); 177extern void __iomem *omap4_get_l2cache_base(void);
178#endif 178#endif
179 179
180struct device_node;
181#ifdef CONFIG_OF
182int __init omap_intc_of_init(struct device_node *node,
183 struct device_node *parent);
184#else
185int __init omap_intc_of_init(struct device_node *node,
186 struct device_node *parent)
187{
188 return 0;
189}
190#endif
191
180#ifdef CONFIG_SMP 192#ifdef CONFIG_SMP
181extern void __iomem *omap4_get_scu_base(void); 193extern void __iomem *omap4_get_scu_base(void);
182#else 194#else
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 6da2d0edee1..65f0d2571c9 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -11,12 +11,16 @@
11 * for more details. 11 * for more details.
12 */ 12 */
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/module.h>
14#include <linux/init.h> 15#include <linux/init.h>
15#include <linux/interrupt.h> 16#include <linux/interrupt.h>
16#include <linux/io.h> 17#include <linux/io.h>
17 18
18#include <asm/exception.h> 19#include <asm/exception.h>
19#include <asm/mach/irq.h> 20#include <asm/mach/irq.h>
21#include <linux/irqdomain.h>
22#include <linux/of.h>
23#include <linux/of_address.h>
20 24
21#include <mach/hardware.h> 25#include <mach/hardware.h>
22 26
@@ -60,6 +64,8 @@ static struct omap_irq_bank {
60 }, 64 },
61}; 65};
62 66
67static struct irq_domain *domain;
68
63/* Structure to save interrupt controller context */ 69/* Structure to save interrupt controller context */
64struct omap3_intc_regs { 70struct omap3_intc_regs {
65 u32 sysconfig; 71 u32 sysconfig;
@@ -150,17 +156,27 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
150 IRQ_NOREQUEST | IRQ_NOPROBE, 0); 156 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
151} 157}
152 158
153static void __init omap_init_irq(u32 base, int nr_irqs) 159static void __init omap_init_irq(u32 base, int nr_irqs,
160 struct device_node *node)
154{ 161{
155 void __iomem *omap_irq_base; 162 void __iomem *omap_irq_base;
156 unsigned long nr_of_irqs = 0; 163 unsigned long nr_of_irqs = 0;
157 unsigned int nr_banks = 0; 164 unsigned int nr_banks = 0;
158 int i, j; 165 int i, j, irq_base;
159 166
160 omap_irq_base = ioremap(base, SZ_4K); 167 omap_irq_base = ioremap(base, SZ_4K);
161 if (WARN_ON(!omap_irq_base)) 168 if (WARN_ON(!omap_irq_base))
162 return; 169 return;
163 170
171 irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0);
172 if (irq_base < 0) {
173 pr_warn("Couldn't allocate IRQ numbers\n");
174 irq_base = 0;
175 }
176
177 domain = irq_domain_add_legacy(node, nr_irqs, irq_base, 0,
178 &irq_domain_simple_ops, NULL);
179
164 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { 180 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
165 struct omap_irq_bank *bank = irq_banks + i; 181 struct omap_irq_bank *bank = irq_banks + i;
166 182
@@ -169,36 +185,36 @@ static void __init omap_init_irq(u32 base, int nr_irqs)
169 /* Static mapping, never released */ 185 /* Static mapping, never released */
170 bank->base_reg = ioremap(base, SZ_4K); 186 bank->base_reg = ioremap(base, SZ_4K);
171 if (!bank->base_reg) { 187 if (!bank->base_reg) {
172 printk(KERN_ERR "Could not ioremap irq bank%i\n", i); 188 pr_err("Could not ioremap irq bank%i\n", i);
173 continue; 189 continue;
174 } 190 }
175 191
176 omap_irq_bank_init_one(bank); 192 omap_irq_bank_init_one(bank);
177 193
178 for (j = 0; j < bank->nr_irqs; j += 32) 194 for (j = 0; j < bank->nr_irqs; j += 32)
179 omap_alloc_gc(bank->base_reg + j, j, 32); 195 omap_alloc_gc(bank->base_reg + j, j + irq_base, 32);
180 196
181 nr_of_irqs += bank->nr_irqs; 197 nr_of_irqs += bank->nr_irqs;
182 nr_banks++; 198 nr_banks++;
183 } 199 }
184 200
185 printk(KERN_INFO "Total of %ld interrupts on %d active controller%s\n", 201 pr_info("Total of %ld interrupts on %d active controller%s\n",
186 nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); 202 nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
187} 203}
188 204
189void __init omap2_init_irq(void) 205void __init omap2_init_irq(void)
190{ 206{
191 omap_init_irq(OMAP24XX_IC_BASE, 96); 207 omap_init_irq(OMAP24XX_IC_BASE, 96, NULL);
192} 208}
193 209
194void __init omap3_init_irq(void) 210void __init omap3_init_irq(void)
195{ 211{
196 omap_init_irq(OMAP34XX_IC_BASE, 96); 212 omap_init_irq(OMAP34XX_IC_BASE, 96, NULL);
197} 213}
198 214
199void __init ti81xx_init_irq(void) 215void __init ti81xx_init_irq(void)
200{ 216{
201 omap_init_irq(OMAP34XX_IC_BASE, 128); 217 omap_init_irq(OMAP34XX_IC_BASE, 128, NULL);
202} 218}
203 219
204static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs) 220static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs)
@@ -228,8 +244,10 @@ out:
228 irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET); 244 irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET);
229 irqnr &= ACTIVEIRQ_MASK; 245 irqnr &= ACTIVEIRQ_MASK;
230 246
231 if (irqnr) 247 if (irqnr) {
248 irqnr = irq_find_mapping(domain, irqnr);
232 handle_IRQ(irqnr, regs); 249 handle_IRQ(irqnr, regs);
250 }
233 } while (irqnr); 251 } while (irqnr);
234} 252}
235 253
@@ -239,6 +257,28 @@ asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs
239 omap_intc_handle_irq(base_addr, regs); 257 omap_intc_handle_irq(base_addr, regs);
240} 258}
241 259
260int __init omap_intc_of_init(struct device_node *node,
261 struct device_node *parent)
262{
263 struct resource res;
264 u32 nr_irqs = 96;
265
266 if (WARN_ON(!node))
267 return -ENODEV;
268
269 if (of_address_to_resource(node, 0, &res)) {
270 WARN(1, "unable to get intc registers\n");
271 return -EINVAL;
272 }
273
274 if (of_property_read_u32(node, "ti,intc-size", &nr_irqs))
275 pr_warn("unable to get intc-size, default to %d\n", nr_irqs);
276
277 omap_init_irq(res.start, nr_irqs, of_node_get(node));
278
279 return 0;
280}
281
242#ifdef CONFIG_ARCH_OMAP3 282#ifdef CONFIG_ARCH_OMAP3
243static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; 283static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
244 284
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 52787b0eaec..a7bdec69a2b 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -295,6 +295,14 @@ postcore_initcall(omap2_common_pm_init);
295 295
296static int __init omap2_common_pm_late_init(void) 296static int __init omap2_common_pm_late_init(void)
297{ 297{
298 /*
299 * In the case of DT, the PMIC and SR initialization will be done using
300 * a completely different mechanism.
301 * Disable this part if a DT blob is available.
302 */
303 if (of_have_populated_dt())
304 return 0;
305
298 /* Init the voltage layer */ 306 /* Init the voltage layer */
299 omap_pmic_late_init(); 307 omap_pmic_late_init();
300 omap_voltage_late_init(); 308 omap_voltage_late_init();