7 files changed, 49 insertions, 136 deletions

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index ad721e0cbf7..ce4d46a4a83 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -565,7 +565,7 @@ u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val)
  *
  * Given a struct clk of a rate-selectable clksel clock, and a clock divisor,
  * find the corresponding register field value.  The return register value is
- * the value before left-shifting.  Returns 0xffffffff on error
+ * the value before left-shifting.  Returns ~0 on error
  */
 u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
 {
@@ -577,7 +577,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
 
         clks = omap2_get_clksel_by_parent(clk, clk->parent);
         if (clks == NULL)
-                return 0;
+                return ~0;
 
         for (clkr = clks->rates; clkr->div; clkr++) {
                 if ((clkr->flags & cpu_mask) && (clkr->div == div))
@@ -588,7 +588,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
                 printk(KERN_ERR "clock: Could not find divisor %d for "
                        "clock %s parent %s\n", div, clk->name,
                        clk->parent->name);
-                return 0;
+                return ~0;
         }
 
         return clkr->val;
@@ -708,7 +708,7 @@ static u32 omap2_clksel_get_src_field(void __iomem **src_addr,
                 return 0;
 
         for (clkr = clks->rates; clkr->div; clkr++) {
-                if (clkr->flags & (cpu_mask | DEFAULT_RATE))
+                if (clkr->flags & cpu_mask && clkr->flags & DEFAULT_RATE)
                         break; /* Found the default rate for this platform */
         }
 
@@ -746,7 +746,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
                 return -EINVAL;
 
         if (clk->usecount > 0)
-                _omap2_clk_disable(clk);
+                omap2_clk_disable(clk);
 
         /* Set new source value (previous dividers if any in effect) */
         reg_val = __raw_readl(src_addr) & ~field_mask;
@@ -759,11 +759,11 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
                 wmb();
         }
 
-        if (clk->usecount > 0)
-                _omap2_clk_enable(clk);
-
         clk->parent = new_parent;
 
+        if (clk->usecount > 0)
+                omap2_clk_enable(clk);
+
         /* CLKSEL clocks follow their parents' rates, divided by a divisor */
         clk->rate = new_parent->rate;
 
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 9d7216ff6c9..ce03fa75077 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -421,6 +421,7 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
                         int nr_controllers)
 {
         int i;
+        char *name;
 
         for (i = 0; i < nr_controllers; i++) {
                 unsigned long base, size;
@@ -450,12 +451,14 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
                         continue;
                 }
 
-                if (cpu_is_omap2420())
+                if (cpu_is_omap2420()) {
                         size = OMAP2420_MMC_SIZE;
-                else
+                        name = "mmci-omap";
+                } else {
                         size = HSMMC_SIZE;
-
-                omap_mmc_add(i, base, size, irq, mmc_data[i]);
+                        name = "mmci-omap-hs";
+                }
+                omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
         };
 }
 
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index b0f8e7d6279..b52a02fc7cd 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -172,9 +172,13 @@ void __init omap34xx_check_revision(void)
                         omap_revision = OMAP3430_REV_ES3_0;
                         rev_name = "ES3.0";
                         break;
+                case 4:
+                        omap_revision = OMAP3430_REV_ES3_1;
+                        rev_name = "ES3.1";
+                        break;
                 default:
                         /* Use the latest known revision as default */
-                        omap_revision = OMAP3430_REV_ES3_0;
+                        omap_revision = OMAP3430_REV_ES3_1;
                         rev_name = "Unknown revision\n";
                 }
         }
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 636e2821af7..9ba20d985dd 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -134,6 +134,7 @@ static struct irq_chip omap_irq_chip = {
         .ack    = omap_mask_ack_irq,
         .mask   = omap_mask_irq,
         .unmask = omap_unmask_irq,
+        .disable = omap_mask_irq,
 };
 
 static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index e20023c9d15..a9e631fc113 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -24,106 +24,7 @@
 #include <mach/cpu.h>
 #include <mach/mcbsp.h>
 
-struct mcbsp_internal_clk {
-        struct clk clk;
-        struct clk **childs;
-        int n_childs;
-};
-
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
-static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
-{
-        const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
-        int i;
-
-        mclk->n_childs = ARRAY_SIZE(clk_names);
-        mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
-                                GFP_KERNEL);
-
-        for (i = 0; i < mclk->n_childs; i++) {
-                /* We fake a platform device to get correct device id */
-                struct platform_device pdev;
-
-                pdev.dev.bus = &platform_bus_type;
-                pdev.id = mclk->clk.id;
-                mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
-                if (IS_ERR(mclk->childs[i]))
-                        printk(KERN_ERR "Could not get clock %s (%d).\n",
-                                clk_names[i], mclk->clk.id);
-        }
-}
-
-static int omap_mcbsp_clk_enable(struct clk *clk)
-{
-        struct mcbsp_internal_clk *mclk = container_of(clk,
-                                        struct mcbsp_internal_clk, clk);
-        int i;
-
-        for (i = 0; i < mclk->n_childs; i++)
-                clk_enable(mclk->childs[i]);
-        return 0;
-}
-
-static void omap_mcbsp_clk_disable(struct clk *clk)
-{
-        struct mcbsp_internal_clk *mclk = container_of(clk,
-                                        struct mcbsp_internal_clk, clk);
-        int i;
-
-        for (i = 0; i < mclk->n_childs; i++)
-                clk_disable(mclk->childs[i]);
-}
-
-static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
-        {
-                .clk = {
-                        .name           = "mcbsp_clk",
-                        .id             = 1,
-                        .enable         = omap_mcbsp_clk_enable,
-                        .disable        = omap_mcbsp_clk_disable,
-                },
-        },
-        {
-                .clk = {
-                        .name           = "mcbsp_clk",
-                        .id             = 2,
-                        .enable         = omap_mcbsp_clk_enable,
-                        .disable        = omap_mcbsp_clk_disable,
-                },
-        },
-        {
-                .clk = {
-                        .name           = "mcbsp_clk",
-                        .id             = 3,
-                        .enable         = omap_mcbsp_clk_enable,
-                        .disable        = omap_mcbsp_clk_disable,
-                },
-        },
-        {
-                .clk = {
-                        .name           = "mcbsp_clk",
-                        .id             = 4,
-                        .enable         = omap_mcbsp_clk_enable,
-                        .disable        = omap_mcbsp_clk_disable,
-                },
-        },
-        {
-                .clk = {
-                        .name           = "mcbsp_clk",
-                        .id             = 5,
-                        .enable         = omap_mcbsp_clk_enable,
-                        .disable        = omap_mcbsp_clk_disable,
-                },
-        },
-};
-
-#define omap_mcbsp_clks_size    ARRAY_SIZE(omap_mcbsp_clks)
-#else
-#define omap_mcbsp_clks_size    0
-static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
-static inline void omap_mcbsp_clk_init(struct clk *clk)
-{ }
-#endif
+const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
 
 static void omap2_mcbsp2_mux_setup(void)
 {
@@ -156,7 +57,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
                 .ops            = &omap2_mcbsp_ops,
-                .clk_name       = "mcbsp_clk",
+                .clk_names      = clk_names,
+                .num_clks       = 2,
         },
         {
                 .phys_base      = OMAP24XX_MCBSP2_BASE,
@@ -165,7 +67,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
                 .ops            = &omap2_mcbsp_ops,
-                .clk_name       = "mcbsp_clk",
+                .clk_names      = clk_names,
+                .num_clks       = 2,
         },
 };
 #define OMAP2420_MCBSP_PDATA_SZ         ARRAY_SIZE(omap2420_mcbsp_pdata)
@@ -183,7 +86,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
                 .ops            = &omap2_mcbsp_ops,
-                .clk_name       = "mcbsp_clk",
+                .clk_names      = clk_names,
+                .num_clks       = 2,
         },
         {
                 .phys_base      = OMAP24XX_MCBSP2_BASE,
@@ -192,7 +96,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
                 .ops            = &omap2_mcbsp_ops,
-                .clk_name       = "mcbsp_clk",
+                .clk_names      = clk_names,
+                .num_clks       = 2,
         },
         {
                 .phys_base      = OMAP2430_MCBSP3_BASE,
@@ -201,7 +106,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
                 .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
                 .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
                 .ops            = &omap2_mcbsp_ops,
-                .clk_name       = "mcbsp_clk",
+                .clk_names      = clk_names,
+                .num_clks       = 2,
         },
         {
                 .phys_base      = OMAP2430_MCBSP4_BASE,
@@ -210,7 +116,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
                 .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
                 .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
                 .ops            = &omap2_mcbsp_ops,
-                .clk_name       = "mcbsp_clk",
+                .clk_names      = clk_names,
+                .num_clks       = 2,
         },
         {
                 .phys_base      = OMAP2430_MCBSP5_BASE,
@@ -219,7 +126,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
                 .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
                 .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
                 .ops            = &omap2_mcbsp_ops,
-                .clk_name       = "mcbsp_clk",
+                .clk_names      = clk_names,
+                .num_clks       = 2,
         },
 };
 #define OMAP2430_MCBSP_PDATA_SZ         ARRAY_SIZE(omap2430_mcbsp_pdata)
@@ -237,7 +145,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
                 .ops            = &omap2_mcbsp_ops,
-                .clk_name       = "mcbsp_clk",
+                .clk_names      = clk_names,
+                .num_clks       = 2,
         },
         {
                 .phys_base      = OMAP34XX_MCBSP2_BASE,
@@ -246,7 +155,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
                 .ops            = &omap2_mcbsp_ops,
-                .clk_name       = "mcbsp_clk",
+                .clk_names      = clk_names,
+                .num_clks       = 2,
         },
         {
                 .phys_base      = OMAP34XX_MCBSP3_BASE,
@@ -255,7 +165,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                 .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
                 .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
                 .ops            = &omap2_mcbsp_ops,
-                .clk_name       = "mcbsp_clk",
+                .clk_names      = clk_names,
+                .num_clks       = 2,
         },
         {
                 .phys_base      = OMAP34XX_MCBSP4_BASE,
@@ -264,7 +175,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                 .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
                 .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
                 .ops            = &omap2_mcbsp_ops,
-                .clk_name       = "mcbsp_clk",
+                .clk_names      = clk_names,
+                .num_clks       = 2,
         },
         {
                 .phys_base      = OMAP34XX_MCBSP5_BASE,
@@ -273,7 +185,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                 .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
                 .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
                 .ops            = &omap2_mcbsp_ops,
-                .clk_name       = "mcbsp_clk",
+                .clk_names      = clk_names,
+                .num_clks       = 2,
         },
 };
 #define OMAP34XX_MCBSP_PDATA_SZ         ARRAY_SIZE(omap34xx_mcbsp_pdata)
@@ -284,14 +197,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
 
 static int __init omap2_mcbsp_init(void)
 {
-        int i;
-
-        for (i = 0; i < omap_mcbsp_clks_size; i++) {
-                /* Once we call clk_get inside init, we do not register it */
-                omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
-                clk_register(&omap_mcbsp_clks[i].clk);
-        }
-
         if (cpu_is_omap2420())
                 omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
         if (cpu_is_omap2430())
diff --git a/arch/arm/mach-omap2/sleep24xx.S b/arch/arm/mach-omap2/sleep24xx.S
index 43336b93b21..bf9e96105e1 100644
--- a/arch/arm/mach-omap2/sleep24xx.S
+++ b/arch/arm/mach-omap2/sleep24xx.S
@@ -93,9 +93,8 @@ ENTRY(omap24xx_cpu_suspend)
         orr     r4, r4, #0x40           @ enable self refresh on idle req
         mov     r5, #0x2000             @ set delay (DPLL relock + DLL relock)
         str     r4, [r2]                @ make it so
-        mov     r2, #0
         nop
-        mcr     p15, 0, r2, c7, c0, 4   @ wait for interrupt
+        mcr     p15, 0, r3, c7, c0, 4   @ wait for interrupt
         nop
 loop:
         subs    r5, r5, #0x1            @ awake, wait just a bit
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index ae6036300f6..9fc13a2cc3f 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -118,7 +118,8 @@ static void __init omap2_gp_clockevent_init(void)
         clockevent_gpt.max_delta_ns =
                 clockevent_delta2ns(0xffffffff, &clockevent_gpt);
         clockevent_gpt.min_delta_ns =
-                clockevent_delta2ns(1, &clockevent_gpt);
+                clockevent_delta2ns(3, &clockevent_gpt);
+                /* Timer internal resynch latency. */
 
         clockevent_gpt.cpumask = cpumask_of(0);
         clockevents_register_device(&clockevent_gpt);