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Diffstat (limited to 'arch/arm/mach-omap2/pm34xx.c')
-rw-r--r--arch/arm/mach-omap2/pm34xx.c24
1 files changed, 7 insertions, 17 deletions
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 511a57dc701..01b95eaae75 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -48,12 +48,6 @@
48#include "pm.h" 48#include "pm.h"
49#include "sdrc.h" 49#include "sdrc.h"
50 50
51#define SDRC_POWER_AUTOCOUNT_SHIFT 8
52#define SDRC_POWER_AUTOCOUNT_MASK (0xffff << SDRC_POWER_AUTOCOUNT_SHIFT)
53#define SDRC_POWER_CLKCTRL_SHIFT 4
54#define SDRC_POWER_CLKCTRL_MASK (0x3 << SDRC_POWER_CLKCTRL_SHIFT)
55#define SDRC_SELF_REFRESH_ON_AUTOCOUNT (0x2 << SDRC_POWER_CLKCTRL_SHIFT)
56
57/* Scratchpad offsets */ 51/* Scratchpad offsets */
58#define OMAP343X_TABLE_ADDRESS_OFFSET 0x31 52#define OMAP343X_TABLE_ADDRESS_OFFSET 0x31
59#define OMAP343X_TABLE_VALUE_OFFSET 0x30 53#define OMAP343X_TABLE_VALUE_OFFSET 0x30
@@ -402,19 +396,15 @@ static void omap_sram_idle(void)
402 } 396 }
403 397
404 /* 398 /*
405 * Force SDRAM controller to self-refresh mode after timeout on 399 * On EMU/HS devices ROM code restores a SRDC value
406 * autocount. This is needed on ES3.0 to avoid SDRAM controller 400 * from scratchpad which has automatic self refresh on timeout
407 * hang-ups. 401 * of AUTO_CNT = 1 enabled. This takes care of errata 1.142.
408 */ 402 * Hence store/restore the SDRC_POWER register here.
403 */
409 if (omap_rev() >= OMAP3430_REV_ES3_0 && 404 if (omap_rev() >= OMAP3430_REV_ES3_0 &&
410 omap_type() != OMAP2_DEVICE_TYPE_GP && 405 omap_type() != OMAP2_DEVICE_TYPE_GP &&
411 core_next_state == PWRDM_POWER_OFF) { 406 core_next_state == PWRDM_POWER_OFF)
412 sdrc_pwr = sdrc_read_reg(SDRC_POWER); 407 sdrc_pwr = sdrc_read_reg(SDRC_POWER);
413 sdrc_write_reg((sdrc_pwr &
414 ~(SDRC_POWER_AUTOCOUNT_MASK|SDRC_POWER_CLKCTRL_MASK)) |
415 (1 << SDRC_POWER_AUTOCOUNT_SHIFT) |
416 SDRC_SELF_REFRESH_ON_AUTOCOUNT, SDRC_POWER);
417 }
418 408
419 /* 409 /*
420 * omap3_arm_context is the location where ARM registers 410 * omap3_arm_context is the location where ARM registers
@@ -424,7 +414,7 @@ static void omap_sram_idle(void)
424 _omap_sram_idle(omap3_arm_context, save_state); 414 _omap_sram_idle(omap3_arm_context, save_state);
425 cpu_init(); 415 cpu_init();
426 416
427 /* Restore normal SDRAM settings */ 417 /* Restore normal SDRC POWER settings */
428 if (omap_rev() >= OMAP3430_REV_ES3_0 && 418 if (omap_rev() >= OMAP3430_REV_ES3_0 &&
429 omap_type() != OMAP2_DEVICE_TYPE_GP && 419 omap_type() != OMAP2_DEVICE_TYPE_GP &&
430 core_next_state == PWRDM_POWER_OFF) 420 core_next_state == PWRDM_POWER_OFF)