diff options
Diffstat (limited to 'arch/arm/mach-omap2/pm24xx.c')
-rw-r--r-- | arch/arm/mach-omap2/pm24xx.c | 104 |
1 files changed, 11 insertions, 93 deletions
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index 23de98d0384..5ca45ca7694 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c | |||
@@ -26,7 +26,6 @@ | |||
26 | #include <linux/module.h> | 26 | #include <linux/module.h> |
27 | #include <linux/delay.h> | 27 | #include <linux/delay.h> |
28 | #include <linux/clk.h> | 28 | #include <linux/clk.h> |
29 | #include <linux/io.h> | ||
30 | #include <linux/irq.h> | 29 | #include <linux/irq.h> |
31 | #include <linux/time.h> | 30 | #include <linux/time.h> |
32 | #include <linux/gpio.h> | 31 | #include <linux/gpio.h> |
@@ -35,12 +34,13 @@ | |||
35 | #include <asm/mach/irq.h> | 34 | #include <asm/mach/irq.h> |
36 | #include <asm/mach-types.h> | 35 | #include <asm/mach-types.h> |
37 | 36 | ||
38 | #include <mach/irqs.h> | ||
39 | #include <plat/clock.h> | 37 | #include <plat/clock.h> |
40 | #include <plat/sram.h> | 38 | #include <plat/sram.h> |
41 | #include <plat/dma.h> | 39 | #include <plat/dma.h> |
42 | #include <plat/board.h> | 40 | #include <plat/board.h> |
43 | 41 | ||
42 | #include <mach/irqs.h> | ||
43 | |||
44 | #include "common.h" | 44 | #include "common.h" |
45 | #include "prm2xxx_3xxx.h" | 45 | #include "prm2xxx_3xxx.h" |
46 | #include "prm-regbits-24xx.h" | 46 | #include "prm-regbits-24xx.h" |
@@ -49,23 +49,9 @@ | |||
49 | #include "sdrc.h" | 49 | #include "sdrc.h" |
50 | #include "pm.h" | 50 | #include "pm.h" |
51 | #include "control.h" | 51 | #include "control.h" |
52 | |||
53 | #include "powerdomain.h" | 52 | #include "powerdomain.h" |
54 | #include "clockdomain.h" | 53 | #include "clockdomain.h" |
55 | 54 | ||
56 | #ifdef CONFIG_SUSPEND | ||
57 | static suspend_state_t suspend_state = PM_SUSPEND_ON; | ||
58 | static inline bool is_suspending(void) | ||
59 | { | ||
60 | return (suspend_state != PM_SUSPEND_ON); | ||
61 | } | ||
62 | #else | ||
63 | static inline bool is_suspending(void) | ||
64 | { | ||
65 | return false; | ||
66 | } | ||
67 | #endif | ||
68 | |||
69 | static void (*omap2_sram_idle)(void); | 55 | static void (*omap2_sram_idle)(void); |
70 | static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, | 56 | static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, |
71 | void __iomem *sdrc_power); | 57 | void __iomem *sdrc_power); |
@@ -85,7 +71,7 @@ static int omap2_fclks_active(void) | |||
85 | return (f1 | f2) ? 1 : 0; | 71 | return (f1 | f2) ? 1 : 0; |
86 | } | 72 | } |
87 | 73 | ||
88 | static void omap2_enter_full_retention(void) | 74 | static int omap2_enter_full_retention(void) |
89 | { | 75 | { |
90 | u32 l; | 76 | u32 l; |
91 | 77 | ||
@@ -148,6 +134,8 @@ no_sleep: | |||
148 | 134 | ||
149 | /* Mask future PRCM-to-MPU interrupts */ | 135 | /* Mask future PRCM-to-MPU interrupts */ |
150 | omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET); | 136 | omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET); |
137 | |||
138 | return 0; | ||
151 | } | 139 | } |
152 | 140 | ||
153 | static int omap2_i2c_active(void) | 141 | static int omap2_i2c_active(void) |
@@ -226,7 +214,6 @@ static int omap2_can_sleep(void) | |||
226 | 214 | ||
227 | static void omap2_pm_idle(void) | 215 | static void omap2_pm_idle(void) |
228 | { | 216 | { |
229 | local_irq_disable(); | ||
230 | local_fiq_disable(); | 217 | local_fiq_disable(); |
231 | 218 | ||
232 | if (!omap2_can_sleep()) { | 219 | if (!omap2_can_sleep()) { |
@@ -243,78 +230,6 @@ static void omap2_pm_idle(void) | |||
243 | 230 | ||
244 | out: | 231 | out: |
245 | local_fiq_enable(); | 232 | local_fiq_enable(); |
246 | local_irq_enable(); | ||
247 | } | ||
248 | |||
249 | #ifdef CONFIG_SUSPEND | ||
250 | static int omap2_pm_begin(suspend_state_t state) | ||
251 | { | ||
252 | disable_hlt(); | ||
253 | suspend_state = state; | ||
254 | return 0; | ||
255 | } | ||
256 | |||
257 | static int omap2_pm_suspend(void) | ||
258 | { | ||
259 | u32 wken_wkup, mir1; | ||
260 | |||
261 | wken_wkup = omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN); | ||
262 | wken_wkup &= ~OMAP24XX_EN_GPT1_MASK; | ||
263 | omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN); | ||
264 | |||
265 | /* Mask GPT1 */ | ||
266 | mir1 = omap_readl(0x480fe0a4); | ||
267 | omap_writel(1 << 5, 0x480fe0ac); | ||
268 | |||
269 | omap2_enter_full_retention(); | ||
270 | |||
271 | omap_writel(mir1, 0x480fe0a4); | ||
272 | omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN); | ||
273 | |||
274 | return 0; | ||
275 | } | ||
276 | |||
277 | static int omap2_pm_enter(suspend_state_t state) | ||
278 | { | ||
279 | int ret = 0; | ||
280 | |||
281 | switch (state) { | ||
282 | case PM_SUSPEND_STANDBY: | ||
283 | case PM_SUSPEND_MEM: | ||
284 | ret = omap2_pm_suspend(); | ||
285 | break; | ||
286 | default: | ||
287 | ret = -EINVAL; | ||
288 | } | ||
289 | |||
290 | return ret; | ||
291 | } | ||
292 | |||
293 | static void omap2_pm_end(void) | ||
294 | { | ||
295 | suspend_state = PM_SUSPEND_ON; | ||
296 | enable_hlt(); | ||
297 | } | ||
298 | |||
299 | static const struct platform_suspend_ops omap_pm_ops = { | ||
300 | .begin = omap2_pm_begin, | ||
301 | .enter = omap2_pm_enter, | ||
302 | .end = omap2_pm_end, | ||
303 | .valid = suspend_valid_only_mem, | ||
304 | }; | ||
305 | #else | ||
306 | static const struct platform_suspend_ops __initdata omap_pm_ops; | ||
307 | #endif /* CONFIG_SUSPEND */ | ||
308 | |||
309 | /* XXX This function should be shareable between OMAP2xxx and OMAP3 */ | ||
310 | static int __init clkdms_setup(struct clockdomain *clkdm, void *unused) | ||
311 | { | ||
312 | if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO) | ||
313 | clkdm_allow_idle(clkdm); | ||
314 | else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP && | ||
315 | atomic_read(&clkdm->usecount) == 0) | ||
316 | clkdm_sleep(clkdm); | ||
317 | return 0; | ||
318 | } | 233 | } |
319 | 234 | ||
320 | static void __init prcm_setup_regs(void) | 235 | static void __init prcm_setup_regs(void) |
@@ -358,9 +273,13 @@ static void __init prcm_setup_regs(void) | |||
358 | clkdm_sleep(gfx_clkdm); | 273 | clkdm_sleep(gfx_clkdm); |
359 | 274 | ||
360 | /* Enable hardware-supervised idle for all clkdms */ | 275 | /* Enable hardware-supervised idle for all clkdms */ |
361 | clkdm_for_each(clkdms_setup, NULL); | 276 | clkdm_for_each(omap_pm_clkdms_setup, NULL); |
362 | clkdm_add_wkdep(mpu_clkdm, wkup_clkdm); | 277 | clkdm_add_wkdep(mpu_clkdm, wkup_clkdm); |
363 | 278 | ||
279 | #ifdef CONFIG_SUSPEND | ||
280 | omap_pm_suspend = omap2_enter_full_retention; | ||
281 | #endif | ||
282 | |||
364 | /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk | 283 | /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk |
365 | * stabilisation */ | 284 | * stabilisation */ |
366 | omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD, | 285 | omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD, |
@@ -461,8 +380,7 @@ static int __init omap2_pm_init(void) | |||
461 | omap24xx_cpu_suspend_sz); | 380 | omap24xx_cpu_suspend_sz); |
462 | } | 381 | } |
463 | 382 | ||
464 | suspend_set_ops(&omap_pm_ops); | 383 | arm_pm_idle = omap2_pm_idle; |
465 | pm_idle = omap2_pm_idle; | ||
466 | 384 | ||
467 | return 0; | 385 | return 0; |
468 | } | 386 | } |