diff options
Diffstat (limited to 'arch/arm/mach-omap2/cm-regbits-44xx.h')
-rw-r--r-- | arch/arm/mach-omap2/cm-regbits-44xx.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/cm-regbits-44xx.h b/arch/arm/mach-omap2/cm-regbits-44xx.h index 0e77945d26e..65597a74563 100644 --- a/arch/arm/mach-omap2/cm-regbits-44xx.h +++ b/arch/arm/mach-omap2/cm-regbits-44xx.h | |||
@@ -101,6 +101,10 @@ | |||
101 | #define OMAP4430_CLKACTIVITY_CORE_DPLL_EMU_CLK_SHIFT 9 | 101 | #define OMAP4430_CLKACTIVITY_CORE_DPLL_EMU_CLK_SHIFT 9 |
102 | #define OMAP4430_CLKACTIVITY_CORE_DPLL_EMU_CLK_MASK (1 << 9) | 102 | #define OMAP4430_CLKACTIVITY_CORE_DPLL_EMU_CLK_MASK (1 << 9) |
103 | 103 | ||
104 | /* Used by CM_L4CFG_CLKSTCTRL */ | ||
105 | #define OMAP4460_CLKACTIVITY_CORE_TS_GFCLK_SHIFT 9 | ||
106 | #define OMAP4460_CLKACTIVITY_CORE_TS_GFCLK_MASK (1 << 9) | ||
107 | |||
104 | /* Used by CM_CEFUSE_CLKSTCTRL */ | 108 | /* Used by CM_CEFUSE_CLKSTCTRL */ |
105 | #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_SHIFT 9 | 109 | #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_SHIFT 9 |
106 | #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_MASK (1 << 9) | 110 | #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_MASK (1 << 9) |
@@ -413,6 +417,10 @@ | |||
413 | #define OMAP4430_CLKACTIVITY_WKUP_32K_GFCLK_SHIFT 11 | 417 | #define OMAP4430_CLKACTIVITY_WKUP_32K_GFCLK_SHIFT 11 |
414 | #define OMAP4430_CLKACTIVITY_WKUP_32K_GFCLK_MASK (1 << 11) | 418 | #define OMAP4430_CLKACTIVITY_WKUP_32K_GFCLK_MASK (1 << 11) |
415 | 419 | ||
420 | /* Used by CM_WKUP_CLKSTCTRL */ | ||
421 | #define OMAP4460_CLKACTIVITY_WKUP_TS_GFCLK_SHIFT 13 | ||
422 | #define OMAP4460_CLKACTIVITY_WKUP_TS_GFCLK_MASK (1 << 13) | ||
423 | |||
416 | /* | 424 | /* |
417 | * Used by CM1_ABE_TIMER5_CLKCTRL, CM1_ABE_TIMER6_CLKCTRL, | 425 | * Used by CM1_ABE_TIMER5_CLKCTRL, CM1_ABE_TIMER6_CLKCTRL, |
418 | * CM1_ABE_TIMER7_CLKCTRL, CM1_ABE_TIMER8_CLKCTRL, CM_L3INIT_MMC1_CLKCTRL, | 426 | * CM1_ABE_TIMER7_CLKCTRL, CM1_ABE_TIMER8_CLKCTRL, CM_L3INIT_MMC1_CLKCTRL, |
@@ -444,6 +452,10 @@ | |||
444 | #define OMAP4430_CLKSEL_60M_SHIFT 24 | 452 | #define OMAP4430_CLKSEL_60M_SHIFT 24 |
445 | #define OMAP4430_CLKSEL_60M_MASK (1 << 24) | 453 | #define OMAP4430_CLKSEL_60M_MASK (1 << 24) |
446 | 454 | ||
455 | /* Used by CM_MPU_MPU_CLKCTRL */ | ||
456 | #define OMAP4460_CLKSEL_ABE_DIV_MODE_SHIFT 25 | ||
457 | #define OMAP4460_CLKSEL_ABE_DIV_MODE_MASK (1 << 25) | ||
458 | |||
447 | /* Used by CM1_ABE_AESS_CLKCTRL */ | 459 | /* Used by CM1_ABE_AESS_CLKCTRL */ |
448 | #define OMAP4430_CLKSEL_AESS_FCLK_SHIFT 24 | 460 | #define OMAP4430_CLKSEL_AESS_FCLK_SHIFT 24 |
449 | #define OMAP4430_CLKSEL_AESS_FCLK_MASK (1 << 24) | 461 | #define OMAP4430_CLKSEL_AESS_FCLK_MASK (1 << 24) |
@@ -460,6 +472,10 @@ | |||
460 | #define OMAP4430_CLKSEL_DIV_SHIFT 24 | 472 | #define OMAP4430_CLKSEL_DIV_SHIFT 24 |
461 | #define OMAP4430_CLKSEL_DIV_MASK (1 << 24) | 473 | #define OMAP4430_CLKSEL_DIV_MASK (1 << 24) |
462 | 474 | ||
475 | /* Used by CM_MPU_MPU_CLKCTRL */ | ||
476 | #define OMAP4460_CLKSEL_EMIF_DIV_MODE_SHIFT 24 | ||
477 | #define OMAP4460_CLKSEL_EMIF_DIV_MODE_MASK (1 << 24) | ||
478 | |||
463 | /* Used by CM_CAM_FDIF_CLKCTRL */ | 479 | /* Used by CM_CAM_FDIF_CLKCTRL */ |
464 | #define OMAP4430_CLKSEL_FCLK_SHIFT 24 | 480 | #define OMAP4430_CLKSEL_FCLK_SHIFT 24 |
465 | #define OMAP4430_CLKSEL_FCLK_MASK (0x3 << 24) | 481 | #define OMAP4430_CLKSEL_FCLK_MASK (0x3 << 24) |
@@ -555,6 +571,14 @@ | |||
555 | #define OMAP4430_D2D_STATDEP_SHIFT 18 | 571 | #define OMAP4430_D2D_STATDEP_SHIFT 18 |
556 | #define OMAP4430_D2D_STATDEP_MASK (1 << 18) | 572 | #define OMAP4430_D2D_STATDEP_MASK (1 << 18) |
557 | 573 | ||
574 | /* Used by CM_CLKSEL_DPLL_MPU */ | ||
575 | #define OMAP4460_DCC_COUNT_MAX_SHIFT 24 | ||
576 | #define OMAP4460_DCC_COUNT_MAX_MASK (0xff << 24) | ||
577 | |||
578 | /* Used by CM_CLKSEL_DPLL_MPU */ | ||
579 | #define OMAP4460_DCC_EN_SHIFT 22 | ||
580 | #define OMAP4460_DCC_EN_MASK (1 << 22) | ||
581 | |||
558 | /* | 582 | /* |
559 | * Used by CM_SSC_DELTAMSTEP_DPLL_ABE, CM_SSC_DELTAMSTEP_DPLL_CORE, | 583 | * Used by CM_SSC_DELTAMSTEP_DPLL_ABE, CM_SSC_DELTAMSTEP_DPLL_CORE, |
560 | * CM_SSC_DELTAMSTEP_DPLL_DDRPHY, CM_SSC_DELTAMSTEP_DPLL_IVA, | 584 | * CM_SSC_DELTAMSTEP_DPLL_DDRPHY, CM_SSC_DELTAMSTEP_DPLL_IVA, |
@@ -564,6 +588,10 @@ | |||
564 | #define OMAP4430_DELTAMSTEP_SHIFT 0 | 588 | #define OMAP4430_DELTAMSTEP_SHIFT 0 |
565 | #define OMAP4430_DELTAMSTEP_MASK (0xfffff << 0) | 589 | #define OMAP4430_DELTAMSTEP_MASK (0xfffff << 0) |
566 | 590 | ||
591 | /* Renamed from DELTAMSTEP Used by CM_SSC_DELTAMSTEP_DPLL_USB */ | ||
592 | #define OMAP4460_DELTAMSTEP_0_20_SHIFT 0 | ||
593 | #define OMAP4460_DELTAMSTEP_0_20_MASK (0x1fffff << 0) | ||
594 | |||
567 | /* Used by CM_DLL_CTRL */ | 595 | /* Used by CM_DLL_CTRL */ |
568 | #define OMAP4430_DLL_OVERRIDE_SHIFT 0 | 596 | #define OMAP4430_DLL_OVERRIDE_SHIFT 0 |
569 | #define OMAP4430_DLL_OVERRIDE_MASK (1 << 0) | 597 | #define OMAP4430_DLL_OVERRIDE_MASK (1 << 0) |
@@ -1106,6 +1134,10 @@ | |||
1106 | #define OMAP4430_MODULEMODE_SHIFT 0 | 1134 | #define OMAP4430_MODULEMODE_SHIFT 0 |
1107 | #define OMAP4430_MODULEMODE_MASK (0x3 << 0) | 1135 | #define OMAP4430_MODULEMODE_MASK (0x3 << 0) |
1108 | 1136 | ||
1137 | /* Used by CM_L4CFG_DYNAMICDEP */ | ||
1138 | #define OMAP4460_MPU_DYNDEP_SHIFT 19 | ||
1139 | #define OMAP4460_MPU_DYNDEP_MASK (1 << 19) | ||
1140 | |||
1109 | /* Used by CM_DSS_DSS_CLKCTRL */ | 1141 | /* Used by CM_DSS_DSS_CLKCTRL */ |
1110 | #define OMAP4430_OPTFCLKEN_48MHZ_CLK_SHIFT 9 | 1142 | #define OMAP4430_OPTFCLKEN_48MHZ_CLK_SHIFT 9 |
1111 | #define OMAP4430_OPTFCLKEN_48MHZ_CLK_MASK (1 << 9) | 1143 | #define OMAP4430_OPTFCLKEN_48MHZ_CLK_MASK (1 << 9) |
@@ -1198,6 +1230,10 @@ | |||
1198 | #define OMAP4430_OPTFCLKEN_SYS_CLK_SHIFT 10 | 1230 | #define OMAP4430_OPTFCLKEN_SYS_CLK_SHIFT 10 |
1199 | #define OMAP4430_OPTFCLKEN_SYS_CLK_MASK (1 << 10) | 1231 | #define OMAP4430_OPTFCLKEN_SYS_CLK_MASK (1 << 10) |
1200 | 1232 | ||
1233 | /* Used by CM_WKUP_BANDGAP_CLKCTRL */ | ||
1234 | #define OMAP4460_OPTFCLKEN_TS_FCLK_SHIFT 8 | ||
1235 | #define OMAP4460_OPTFCLKEN_TS_FCLK_MASK (1 << 8) | ||
1236 | |||
1201 | /* Used by CM_DSS_DSS_CLKCTRL */ | 1237 | /* Used by CM_DSS_DSS_CLKCTRL */ |
1202 | #define OMAP4430_OPTFCLKEN_TV_CLK_SHIFT 11 | 1238 | #define OMAP4430_OPTFCLKEN_TV_CLK_SHIFT 11 |
1203 | #define OMAP4430_OPTFCLKEN_TV_CLK_MASK (1 << 11) | 1239 | #define OMAP4430_OPTFCLKEN_TV_CLK_MASK (1 << 11) |