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Diffstat (limited to 'arch/arm/mach-omap2/clock24xx.h')
-rw-r--r--arch/arm/mach-omap2/clock24xx.h10
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index 33c3e5b1432..88c5acb40fc 100644
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -625,6 +625,14 @@ static struct clk func_32k_ck = {
625 .clkdm_name = "wkup_clkdm", 625 .clkdm_name = "wkup_clkdm",
626}; 626};
627 627
628static struct clk secure_32k_ck = {
629 .name = "secure_32k_ck",
630 .ops = &clkops_null,
631 .rate = 32768,
632 .flags = RATE_FIXED,
633 .clkdm_name = "wkup_clkdm",
634};
635
628/* Typical 12/13MHz in standalone mode, will be 26Mhz in chassis mode */ 636/* Typical 12/13MHz in standalone mode, will be 26Mhz in chassis mode */
629static struct clk osc_ck = { /* (*12, *13, 19.2, *26, 38.4)MHz */ 637static struct clk osc_ck = { /* (*12, *13, 19.2, *26, 38.4)MHz */
630 .name = "osc_ck", 638 .name = "osc_ck",
@@ -1790,7 +1798,7 @@ static struct clk gpt12_ick = {
1790static struct clk gpt12_fck = { 1798static struct clk gpt12_fck = {
1791 .name = "gpt12_fck", 1799 .name = "gpt12_fck",
1792 .ops = &clkops_omap2_dflt_wait, 1800 .ops = &clkops_omap2_dflt_wait,
1793 .parent = &func_32k_ck, 1801 .parent = &secure_32k_ck,
1794 .clkdm_name = "core_l4_clkdm", 1802 .clkdm_name = "core_l4_clkdm",
1795 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1803 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1796 .enable_bit = OMAP24XX_EN_GPT12_SHIFT, 1804 .enable_bit = OMAP24XX_EN_GPT12_SHIFT,