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-rw-r--r--arch/arm/mach-integrator/Kconfig1
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c60
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c24
3 files changed, 34 insertions, 51 deletions
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index d701d32a07f..dfd18f3b50e 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -4,6 +4,7 @@ menu "Integrator Options"
4 4
5config ARCH_INTEGRATOR_AP 5config ARCH_INTEGRATOR_AP
6 bool "Support Integrator/AP and Integrator/PP2 platforms" 6 bool "Support Integrator/AP and Integrator/PP2 platforms"
7 select CLKSRC_MMIO
7 select MIGHT_HAVE_PCI 8 select MIGHT_HAVE_PCI
8 help 9 help
9 Include support for the ARM(R) Integrator/AP and 10 Include support for the ARM(R) Integrator/AP and
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 980803ff348..2fbbdd5eac3 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -24,13 +24,14 @@
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/string.h> 26#include <linux/string.h>
27#include <linux/sysdev.h> 27#include <linux/syscore_ops.h>
28#include <linux/amba/bus.h> 28#include <linux/amba/bus.h>
29#include <linux/amba/kmi.h> 29#include <linux/amba/kmi.h>
30#include <linux/clocksource.h> 30#include <linux/clocksource.h>
31#include <linux/clockchips.h> 31#include <linux/clockchips.h>
32#include <linux/interrupt.h> 32#include <linux/interrupt.h>
33#include <linux/io.h> 33#include <linux/io.h>
34#include <linux/mtd/physmap.h>
34 35
35#include <mach/hardware.h> 36#include <mach/hardware.h>
36#include <mach/platform.h> 37#include <mach/platform.h>
@@ -43,7 +44,6 @@
43#include <mach/lm.h> 44#include <mach/lm.h>
44 45
45#include <asm/mach/arch.h> 46#include <asm/mach/arch.h>
46#include <asm/mach/flash.h>
47#include <asm/mach/irq.h> 47#include <asm/mach/irq.h>
48#include <asm/mach/map.h> 48#include <asm/mach/map.h>
49#include <asm/mach/time.h> 49#include <asm/mach/time.h>
@@ -180,13 +180,13 @@ static void __init ap_init_irq(void)
180#ifdef CONFIG_PM 180#ifdef CONFIG_PM
181static unsigned long ic_irq_enable; 181static unsigned long ic_irq_enable;
182 182
183static int irq_suspend(struct sys_device *dev, pm_message_t state) 183static int irq_suspend(void)
184{ 184{
185 ic_irq_enable = readl(VA_IC_BASE + IRQ_ENABLE); 185 ic_irq_enable = readl(VA_IC_BASE + IRQ_ENABLE);
186 return 0; 186 return 0;
187} 187}
188 188
189static int irq_resume(struct sys_device *dev) 189static void irq_resume(void)
190{ 190{
191 /* disable all irq sources */ 191 /* disable all irq sources */
192 writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR); 192 writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
@@ -194,33 +194,25 @@ static int irq_resume(struct sys_device *dev)
194 writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR); 194 writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
195 195
196 writel(ic_irq_enable, VA_IC_BASE + IRQ_ENABLE_SET); 196 writel(ic_irq_enable, VA_IC_BASE + IRQ_ENABLE_SET);
197 return 0;
198} 197}
199#else 198#else
200#define irq_suspend NULL 199#define irq_suspend NULL
201#define irq_resume NULL 200#define irq_resume NULL
202#endif 201#endif
203 202
204static struct sysdev_class irq_class = { 203static struct syscore_ops irq_syscore_ops = {
205 .name = "irq",
206 .suspend = irq_suspend, 204 .suspend = irq_suspend,
207 .resume = irq_resume, 205 .resume = irq_resume,
208}; 206};
209 207
210static struct sys_device irq_device = { 208static int __init irq_syscore_init(void)
211 .id = 0,
212 .cls = &irq_class,
213};
214
215static int __init irq_init_sysfs(void)
216{ 209{
217 int ret = sysdev_class_register(&irq_class); 210 register_syscore_ops(&irq_syscore_ops);
218 if (ret == 0) 211
219 ret = sysdev_register(&irq_device); 212 return 0;
220 return ret;
221} 213}
222 214
223device_initcall(irq_init_sysfs); 215device_initcall(irq_syscore_init);
224 216
225/* 217/*
226 * Flash handling. 218 * Flash handling.
@@ -230,7 +222,7 @@ device_initcall(irq_init_sysfs);
230#define EBI_CSR1 (VA_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET) 222#define EBI_CSR1 (VA_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET)
231#define EBI_LOCK (VA_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET) 223#define EBI_LOCK (VA_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET)
232 224
233static int ap_flash_init(void) 225static int ap_flash_init(struct platform_device *dev)
234{ 226{
235 u32 tmp; 227 u32 tmp;
236 228
@@ -247,7 +239,7 @@ static int ap_flash_init(void)
247 return 0; 239 return 0;
248} 240}
249 241
250static void ap_flash_exit(void) 242static void ap_flash_exit(struct platform_device *dev)
251{ 243{
252 u32 tmp; 244 u32 tmp;
253 245
@@ -263,15 +255,14 @@ static void ap_flash_exit(void)
263 } 255 }
264} 256}
265 257
266static void ap_flash_set_vpp(int on) 258static void ap_flash_set_vpp(struct platform_device *pdev, int on)
267{ 259{
268 void __iomem *reg = on ? SC_CTRLS : SC_CTRLC; 260 void __iomem *reg = on ? SC_CTRLS : SC_CTRLC;
269 261
270 writel(INTEGRATOR_SC_CTRL_nFLVPPEN, reg); 262 writel(INTEGRATOR_SC_CTRL_nFLVPPEN, reg);
271} 263}
272 264
273static struct flash_platform_data ap_flash_data = { 265static struct physmap_flash_data ap_flash_data = {
274 .map_name = "cfi_probe",
275 .width = 4, 266 .width = 4,
276 .init = ap_flash_init, 267 .init = ap_flash_init,
277 .exit = ap_flash_exit, 268 .exit = ap_flash_exit,
@@ -285,7 +276,7 @@ static struct resource cfi_flash_resource = {
285}; 276};
286 277
287static struct platform_device cfi_flash_device = { 278static struct platform_device cfi_flash_device = {
288 .name = "armflash", 279 .name = "physmap-flash",
289 .id = 0, 280 .id = 0,
290 .dev = { 281 .dev = {
291 .platform_data = &ap_flash_data, 282 .platform_data = &ap_flash_data,
@@ -343,25 +334,9 @@ static void __init ap_init(void)
343 334
344static unsigned long timer_reload; 335static unsigned long timer_reload;
345 336
346static void __iomem * const clksrc_base = (void __iomem *)TIMER2_VA_BASE;
347
348static cycle_t timersp_read(struct clocksource *cs)
349{
350 return ~(readl(clksrc_base + TIMER_VALUE) & 0xffff);
351}
352
353static struct clocksource clocksource_timersp = {
354 .name = "timer2",
355 .rating = 200,
356 .read = timersp_read,
357 .mask = CLOCKSOURCE_MASK(16),
358 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
359};
360
361static void integrator_clocksource_init(u32 khz) 337static void integrator_clocksource_init(u32 khz)
362{ 338{
363 struct clocksource *cs = &clocksource_timersp; 339 void __iomem *base = (void __iomem *)TIMER2_VA_BASE;
364 void __iomem *base = clksrc_base;
365 u32 ctrl = TIMER_CTRL_ENABLE; 340 u32 ctrl = TIMER_CTRL_ENABLE;
366 341
367 if (khz >= 1500) { 342 if (khz >= 1500) {
@@ -372,7 +347,8 @@ static void integrator_clocksource_init(u32 khz)
372 writel(ctrl, base + TIMER_CTRL); 347 writel(ctrl, base + TIMER_CTRL);
373 writel(0xffff, base + TIMER_LOAD); 348 writel(0xffff, base + TIMER_LOAD);
374 349
375 clocksource_register_khz(cs, khz); 350 clocksource_mmio_init(base + TIMER_VALUE, "timer2",
351 khz * 1000, 200, 16, clocksource_mmio_readl_down);
376} 352}
377 353
378static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE; 354static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE;
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 9e3ce26023e..4eb03ab5cb4 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -22,6 +22,7 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/gfp.h> 23#include <linux/gfp.h>
24#include <linux/clkdev.h> 24#include <linux/clkdev.h>
25#include <linux/mtd/physmap.h>
25 26
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <mach/platform.h> 28#include <mach/platform.h>
@@ -35,7 +36,6 @@
35#include <mach/lm.h> 36#include <mach/lm.h>
36 37
37#include <asm/mach/arch.h> 38#include <asm/mach/arch.h>
38#include <asm/mach/flash.h>
39#include <asm/mach/irq.h> 39#include <asm/mach/irq.h>
40#include <asm/mach/map.h> 40#include <asm/mach/map.h>
41#include <asm/mach/time.h> 41#include <asm/mach/time.h>
@@ -229,17 +229,24 @@ static struct clk cp_auxclk = {
229 .vcoreg = CM_AUXOSC, 229 .vcoreg = CM_AUXOSC,
230}; 230};
231 231
232static struct clk sp804_clk = {
233 .rate = 1000000,
234};
235
232static struct clk_lookup cp_lookups[] = { 236static struct clk_lookup cp_lookups[] = {
233 { /* CLCD */ 237 { /* CLCD */
234 .dev_id = "mb:c0", 238 .dev_id = "mb:c0",
235 .clk = &cp_auxclk, 239 .clk = &cp_auxclk,
240 }, { /* SP804 timers */
241 .dev_id = "sp804",
242 .clk = &sp804_clk,
236 }, 243 },
237}; 244};
238 245
239/* 246/*
240 * Flash handling. 247 * Flash handling.
241 */ 248 */
242static int intcp_flash_init(void) 249static int intcp_flash_init(struct platform_device *dev)
243{ 250{
244 u32 val; 251 u32 val;
245 252
@@ -250,7 +257,7 @@ static int intcp_flash_init(void)
250 return 0; 257 return 0;
251} 258}
252 259
253static void intcp_flash_exit(void) 260static void intcp_flash_exit(struct platform_device *dev)
254{ 261{
255 u32 val; 262 u32 val;
256 263
@@ -259,7 +266,7 @@ static void intcp_flash_exit(void)
259 writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG); 266 writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
260} 267}
261 268
262static void intcp_flash_set_vpp(int on) 269static void intcp_flash_set_vpp(struct platform_device *pdev, int on)
263{ 270{
264 u32 val; 271 u32 val;
265 272
@@ -271,8 +278,7 @@ static void intcp_flash_set_vpp(int on)
271 writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG); 278 writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
272} 279}
273 280
274static struct flash_platform_data intcp_flash_data = { 281static struct physmap_flash_data intcp_flash_data = {
275 .map_name = "cfi_probe",
276 .width = 4, 282 .width = 4,
277 .init = intcp_flash_init, 283 .init = intcp_flash_init,
278 .exit = intcp_flash_exit, 284 .exit = intcp_flash_exit,
@@ -286,7 +292,7 @@ static struct resource intcp_flash_resource = {
286}; 292};
287 293
288static struct platform_device intcp_flash_device = { 294static struct platform_device intcp_flash_device = {
289 .name = "armflash", 295 .name = "physmap-flash",
290 .id = 0, 296 .id = 0,
291 .dev = { 297 .dev = {
292 .platform_data = &intcp_flash_data, 298 .platform_data = &intcp_flash_data,
@@ -476,8 +482,8 @@ static void __init intcp_timer_init(void)
476 writel(0, TIMER1_VA_BASE + TIMER_CTRL); 482 writel(0, TIMER1_VA_BASE + TIMER_CTRL);
477 writel(0, TIMER2_VA_BASE + TIMER_CTRL); 483 writel(0, TIMER2_VA_BASE + TIMER_CTRL);
478 484
479 sp804_clocksource_init(TIMER2_VA_BASE); 485 sp804_clocksource_init(TIMER2_VA_BASE, "timer2");
480 sp804_clockevents_init(TIMER1_VA_BASE, IRQ_TIMERINT1); 486 sp804_clockevents_init(TIMER1_VA_BASE, IRQ_TIMERINT1, "timer1");
481} 487}
482 488
483static struct sys_timer cp_timer = { 489static struct sys_timer cp_timer = {