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-rw-r--r--arch/arm/mach-imx/Kconfig6
-rw-r--r--arch/arm/mach-imx/clock-imx27.c2
-rw-r--r--arch/arm/mach-imx/clock-imx31.c2
-rw-r--r--arch/arm/mach-imx/clock-imx35.c166
-rw-r--r--arch/arm/mach-imx/cpu_op-mx51.c1
-rw-r--r--arch/arm/mach-imx/crmregs-imx3.h (renamed from arch/arm/mach-imx/crmregs-imx31.h)15
-rw-r--r--arch/arm/mach-imx/devices-imx27.h2
-rw-r--r--arch/arm/mach-imx/eukrea_mbimx27-baseboard.c20
-rw-r--r--arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c1
-rw-r--r--arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c17
-rw-r--r--arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c17
-rw-r--r--arch/arm/mach-imx/imx51-dt.c4
-rw-r--r--arch/arm/mach-imx/imx53-dt.c4
-rw-r--r--arch/arm/mach-imx/mach-armadillo5x0.c2
-rw-r--r--arch/arm/mach-imx/mach-imx27_visstrim_m10.c1
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c3
-rw-r--r--arch/arm/mach-imx/mach-pca100.c13
-rw-r--r--arch/arm/mach-imx/mach-pcm037.c9
-rw-r--r--arch/arm/mach-imx/mach-pcm038.c2
-rw-r--r--arch/arm/mach-imx/mach-pcm043.c13
-rw-r--r--arch/arm/mach-imx/mm-imx21.c6
-rw-r--r--arch/arm/mach-imx/mm-imx25.c7
-rw-r--r--arch/arm/mach-imx/mm-imx27.c7
-rw-r--r--arch/arm/mach-imx/mm-imx3.c15
-rw-r--r--arch/arm/mach-imx/mm-imx5.c22
-rw-r--r--arch/arm/mach-imx/mx31moboard-devboard.c24
-rw-r--r--arch/arm/mach-imx/mx31moboard-marxbot.c24
27 files changed, 198 insertions, 207 deletions
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 4defb97bbfc..3919fba52ac 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -46,7 +46,6 @@ config SOC_IMX21
46 bool 46 bool
47 select MACH_MX21 47 select MACH_MX21
48 select CPU_ARM926T 48 select CPU_ARM926T
49 select ARCH_MXC_AUDMUX_V1
50 select IMX_HAVE_DMA_V1 49 select IMX_HAVE_DMA_V1
51 select IMX_HAVE_IOMUX_V1 50 select IMX_HAVE_IOMUX_V1
52 select MXC_AVIC 51 select MXC_AVIC
@@ -55,7 +54,6 @@ config SOC_IMX25
55 bool 54 bool
56 select ARCH_MX25 55 select ARCH_MX25
57 select CPU_ARM926T 56 select CPU_ARM926T
58 select ARCH_MXC_AUDMUX_V2
59 select ARCH_MXC_IOMUX_V3 57 select ARCH_MXC_IOMUX_V3
60 select MXC_AVIC 58 select MXC_AVIC
61 59
@@ -63,7 +61,6 @@ config SOC_IMX27
63 bool 61 bool
64 select MACH_MX27 62 select MACH_MX27
65 select CPU_ARM926T 63 select CPU_ARM926T
66 select ARCH_MXC_AUDMUX_V1
67 select IMX_HAVE_DMA_V1 64 select IMX_HAVE_DMA_V1
68 select IMX_HAVE_IOMUX_V1 65 select IMX_HAVE_IOMUX_V1
69 select MXC_AVIC 66 select MXC_AVIC
@@ -72,7 +69,6 @@ config SOC_IMX31
72 bool 69 bool
73 select CPU_V6 70 select CPU_V6
74 select IMX_HAVE_PLATFORM_MXC_RNGA 71 select IMX_HAVE_PLATFORM_MXC_RNGA
75 select ARCH_MXC_AUDMUX_V2
76 select MXC_AVIC 72 select MXC_AVIC
77 select SMP_ON_UP if SMP 73 select SMP_ON_UP if SMP
78 74
@@ -80,7 +76,6 @@ config SOC_IMX35
80 bool 76 bool
81 select CPU_V6 77 select CPU_V6
82 select ARCH_MXC_IOMUX_V3 78 select ARCH_MXC_IOMUX_V3
83 select ARCH_MXC_AUDMUX_V2
84 select HAVE_EPIT 79 select HAVE_EPIT
85 select MXC_AVIC 80 select MXC_AVIC
86 select SMP_ON_UP if SMP 81 select SMP_ON_UP if SMP
@@ -89,7 +84,6 @@ config SOC_IMX5
89 select CPU_V7 84 select CPU_V7
90 select MXC_TZIC 85 select MXC_TZIC
91 select ARCH_MXC_IOMUX_V3 86 select ARCH_MXC_IOMUX_V3
92 select ARCH_MXC_AUDMUX_V2
93 select ARCH_HAS_CPUFREQ 87 select ARCH_HAS_CPUFREQ
94 select ARCH_MX5 88 select ARCH_MX5
95 bool 89 bool
diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c
index 88fe00a146e..dc2d7a511d9 100644
--- a/arch/arm/mach-imx/clock-imx27.c
+++ b/arch/arm/mach-imx/clock-imx27.c
@@ -661,7 +661,7 @@ static struct clk_lookup lookups[] = {
661 _REGISTER_CLOCK(NULL, "dma", dma_clk) 661 _REGISTER_CLOCK(NULL, "dma", dma_clk)
662 _REGISTER_CLOCK(NULL, "rtic", rtic_clk) 662 _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
663 _REGISTER_CLOCK(NULL, "brom", brom_clk) 663 _REGISTER_CLOCK(NULL, "brom", brom_clk)
664 _REGISTER_CLOCK(NULL, "emma", emma_clk) 664 _REGISTER_CLOCK("m2m-emmaprp.0", NULL, emma_clk)
665 _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk) 665 _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk)
666 _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk) 666 _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)
667 _REGISTER_CLOCK(NULL, "emi", emi_clk) 667 _REGISTER_CLOCK(NULL, "emi", emi_clk)
diff --git a/arch/arm/mach-imx/clock-imx31.c b/arch/arm/mach-imx/clock-imx31.c
index 988a28178d4..3a943cd4159 100644
--- a/arch/arm/mach-imx/clock-imx31.c
+++ b/arch/arm/mach-imx/clock-imx31.c
@@ -32,7 +32,7 @@
32#include <mach/mx31.h> 32#include <mach/mx31.h>
33#include <mach/common.h> 33#include <mach/common.h>
34 34
35#include "crmregs-imx31.h" 35#include "crmregs-imx3.h"
36 36
37#define PRE_DIV_MIN_FREQ 10000000 /* Minimum Frequency after Predivider */ 37#define PRE_DIV_MIN_FREQ 10000000 /* Minimum Frequency after Predivider */
38 38
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index ac8238caecb..1e279af656a 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -27,23 +27,7 @@
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <mach/common.h> 28#include <mach/common.h>
29 29
30#define CCM_BASE MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR) 30#include "crmregs-imx3.h"
31
32#define CCM_CCMR 0x00
33#define CCM_PDR0 0x04
34#define CCM_PDR1 0x08
35#define CCM_PDR2 0x0C
36#define CCM_PDR3 0x10
37#define CCM_PDR4 0x14
38#define CCM_RCSR 0x18
39#define CCM_MPCTL 0x1C
40#define CCM_PPCTL 0x20
41#define CCM_ACMR 0x24
42#define CCM_COSR 0x28
43#define CCM_CGR0 0x2C
44#define CCM_CGR1 0x30
45#define CCM_CGR2 0x34
46#define CCM_CGR3 0x38
47 31
48#ifdef HAVE_SET_RATE_SUPPORT 32#ifdef HAVE_SET_RATE_SUPPORT
49static void calc_dividers(u32 div, u32 *pre, u32 *post, u32 maxpost) 33static void calc_dividers(u32 div, u32 *pre, u32 *post, u32 maxpost)
@@ -111,14 +95,14 @@ static void calc_dividers_3_3(u32 div, u32 *pre, u32 *post)
111 95
112static unsigned long get_rate_mpll(void) 96static unsigned long get_rate_mpll(void)
113{ 97{
114 ulong mpctl = __raw_readl(CCM_BASE + CCM_MPCTL); 98 ulong mpctl = __raw_readl(MX35_CCM_MPCTL);
115 99
116 return mxc_decode_pll(mpctl, 24000000); 100 return mxc_decode_pll(mpctl, 24000000);
117} 101}
118 102
119static unsigned long get_rate_ppll(void) 103static unsigned long get_rate_ppll(void)
120{ 104{
121 ulong ppctl = __raw_readl(CCM_BASE + CCM_PPCTL); 105 ulong ppctl = __raw_readl(MX35_CCM_PPCTL);
122 106
123 return mxc_decode_pll(ppctl, 24000000); 107 return mxc_decode_pll(ppctl, 24000000);
124} 108}
@@ -148,7 +132,7 @@ static struct arm_ahb_div clk_consumer[] = {
148 132
149static unsigned long get_rate_arm(void) 133static unsigned long get_rate_arm(void)
150{ 134{
151 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); 135 unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0);
152 struct arm_ahb_div *aad; 136 struct arm_ahb_div *aad;
153 unsigned long fref = get_rate_mpll(); 137 unsigned long fref = get_rate_mpll();
154 138
@@ -161,7 +145,7 @@ static unsigned long get_rate_arm(void)
161 145
162static unsigned long get_rate_ahb(struct clk *clk) 146static unsigned long get_rate_ahb(struct clk *clk)
163{ 147{
164 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); 148 unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0);
165 struct arm_ahb_div *aad; 149 struct arm_ahb_div *aad;
166 unsigned long fref = get_rate_arm(); 150 unsigned long fref = get_rate_arm();
167 151
@@ -177,8 +161,8 @@ static unsigned long get_rate_ipg(struct clk *clk)
177 161
178static unsigned long get_rate_uart(struct clk *clk) 162static unsigned long get_rate_uart(struct clk *clk)
179{ 163{
180 unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3); 164 unsigned long pdr3 = __raw_readl(MX35_CCM_PDR3);
181 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); 165 unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4);
182 unsigned long div = ((pdr4 >> 10) & 0x3f) + 1; 166 unsigned long div = ((pdr4 >> 10) & 0x3f) + 1;
183 167
184 if (pdr3 & (1 << 14)) 168 if (pdr3 & (1 << 14))
@@ -189,7 +173,7 @@ static unsigned long get_rate_uart(struct clk *clk)
189 173
190static unsigned long get_rate_sdhc(struct clk *clk) 174static unsigned long get_rate_sdhc(struct clk *clk)
191{ 175{
192 unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3); 176 unsigned long pdr3 = __raw_readl(MX35_CCM_PDR3);
193 unsigned long div, rate; 177 unsigned long div, rate;
194 178
195 if (pdr3 & (1 << 6)) 179 if (pdr3 & (1 << 6))
@@ -215,7 +199,7 @@ static unsigned long get_rate_sdhc(struct clk *clk)
215 199
216static unsigned long get_rate_mshc(struct clk *clk) 200static unsigned long get_rate_mshc(struct clk *clk)
217{ 201{
218 unsigned long pdr1 = __raw_readl(CCM_BASE + CCM_PDR1); 202 unsigned long pdr1 = __raw_readl(MXC_CCM_PDR1);
219 unsigned long div1, div2, rate; 203 unsigned long div1, div2, rate;
220 204
221 if (pdr1 & (1 << 7)) 205 if (pdr1 & (1 << 7))
@@ -231,7 +215,7 @@ static unsigned long get_rate_mshc(struct clk *clk)
231 215
232static unsigned long get_rate_ssi(struct clk *clk) 216static unsigned long get_rate_ssi(struct clk *clk)
233{ 217{
234 unsigned long pdr2 = __raw_readl(CCM_BASE + CCM_PDR2); 218 unsigned long pdr2 = __raw_readl(MX35_CCM_PDR2);
235 unsigned long div1, div2, rate; 219 unsigned long div1, div2, rate;
236 220
237 if (pdr2 & (1 << 6)) 221 if (pdr2 & (1 << 6))
@@ -256,7 +240,7 @@ static unsigned long get_rate_ssi(struct clk *clk)
256 240
257static unsigned long get_rate_csi(struct clk *clk) 241static unsigned long get_rate_csi(struct clk *clk)
258{ 242{
259 unsigned long pdr2 = __raw_readl(CCM_BASE + CCM_PDR2); 243 unsigned long pdr2 = __raw_readl(MX35_CCM_PDR2);
260 unsigned long rate; 244 unsigned long rate;
261 245
262 if (pdr2 & (1 << 7)) 246 if (pdr2 & (1 << 7))
@@ -269,7 +253,7 @@ static unsigned long get_rate_csi(struct clk *clk)
269 253
270static unsigned long get_rate_otg(struct clk *clk) 254static unsigned long get_rate_otg(struct clk *clk)
271{ 255{
272 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); 256 unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4);
273 unsigned long rate; 257 unsigned long rate;
274 258
275 if (pdr4 & (1 << 9)) 259 if (pdr4 & (1 << 9))
@@ -282,8 +266,8 @@ static unsigned long get_rate_otg(struct clk *clk)
282 266
283static unsigned long get_rate_ipg_per(struct clk *clk) 267static unsigned long get_rate_ipg_per(struct clk *clk)
284{ 268{
285 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); 269 unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0);
286 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); 270 unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4);
287 unsigned long div; 271 unsigned long div;
288 272
289 if (pdr0 & (1 << 26)) { 273 if (pdr0 & (1 << 26)) {
@@ -297,7 +281,7 @@ static unsigned long get_rate_ipg_per(struct clk *clk)
297 281
298static unsigned long get_rate_hsp(struct clk *clk) 282static unsigned long get_rate_hsp(struct clk *clk)
299{ 283{
300 unsigned long hsp_podf = (__raw_readl(CCM_BASE + CCM_PDR0) >> 20) & 0x03; 284 unsigned long hsp_podf = (__raw_readl(MXC_CCM_PDR0) >> 20) & 0x03;
301 unsigned long fref = get_rate_mpll(); 285 unsigned long fref = get_rate_mpll();
302 286
303 if (fref > 400 * 1000 * 1000) { 287 if (fref > 400 * 1000 * 1000) {
@@ -345,7 +329,7 @@ static void clk_cgr_disable(struct clk *clk)
345#define DEFINE_CLOCK(name, i, er, es, gr, sr) \ 329#define DEFINE_CLOCK(name, i, er, es, gr, sr) \
346 static struct clk name = { \ 330 static struct clk name = { \
347 .id = i, \ 331 .id = i, \
348 .enable_reg = CCM_BASE + er, \ 332 .enable_reg = er, \
349 .enable_shift = es, \ 333 .enable_shift = es, \
350 .get_rate = gr, \ 334 .get_rate = gr, \
351 .set_rate = sr, \ 335 .set_rate = sr, \
@@ -353,59 +337,59 @@ static void clk_cgr_disable(struct clk *clk)
353 .disable = clk_cgr_disable, \ 337 .disable = clk_cgr_disable, \
354 } 338 }
355 339
356DEFINE_CLOCK(asrc_clk, 0, CCM_CGR0, 0, NULL, NULL); 340DEFINE_CLOCK(asrc_clk, 0, MX35_CCM_CGR0, 0, NULL, NULL);
357DEFINE_CLOCK(pata_clk, 0, CCM_CGR0, 2, get_rate_ipg, NULL); 341DEFINE_CLOCK(pata_clk, 0, MX35_CCM_CGR0, 2, get_rate_ipg, NULL);
358/* DEFINE_CLOCK(audmux_clk, 0, CCM_CGR0, 4, NULL, NULL); */ 342/* DEFINE_CLOCK(audmux_clk, 0, MX35_CCM_CGR0, 4, NULL, NULL); */
359DEFINE_CLOCK(can1_clk, 0, CCM_CGR0, 6, get_rate_ipg, NULL); 343DEFINE_CLOCK(can1_clk, 0, MX35_CCM_CGR0, 6, get_rate_ipg, NULL);
360DEFINE_CLOCK(can2_clk, 1, CCM_CGR0, 8, get_rate_ipg, NULL); 344DEFINE_CLOCK(can2_clk, 1, MX35_CCM_CGR0, 8, get_rate_ipg, NULL);
361DEFINE_CLOCK(cspi1_clk, 0, CCM_CGR0, 10, get_rate_ipg, NULL); 345DEFINE_CLOCK(cspi1_clk, 0, MX35_CCM_CGR0, 10, get_rate_ipg, NULL);
362DEFINE_CLOCK(cspi2_clk, 1, CCM_CGR0, 12, get_rate_ipg, NULL); 346DEFINE_CLOCK(cspi2_clk, 1, MX35_CCM_CGR0, 12, get_rate_ipg, NULL);
363DEFINE_CLOCK(ect_clk, 0, CCM_CGR0, 14, get_rate_ipg, NULL); 347DEFINE_CLOCK(ect_clk, 0, MX35_CCM_CGR0, 14, get_rate_ipg, NULL);
364DEFINE_CLOCK(edio_clk, 0, CCM_CGR0, 16, NULL, NULL); 348DEFINE_CLOCK(edio_clk, 0, MX35_CCM_CGR0, 16, NULL, NULL);
365DEFINE_CLOCK(emi_clk, 0, CCM_CGR0, 18, get_rate_ipg, NULL); 349DEFINE_CLOCK(emi_clk, 0, MX35_CCM_CGR0, 18, get_rate_ipg, NULL);
366DEFINE_CLOCK(epit1_clk, 0, CCM_CGR0, 20, get_rate_ipg, NULL); 350DEFINE_CLOCK(epit1_clk, 0, MX35_CCM_CGR0, 20, get_rate_ipg, NULL);
367DEFINE_CLOCK(epit2_clk, 1, CCM_CGR0, 22, get_rate_ipg, NULL); 351DEFINE_CLOCK(epit2_clk, 1, MX35_CCM_CGR0, 22, get_rate_ipg, NULL);
368DEFINE_CLOCK(esai_clk, 0, CCM_CGR0, 24, NULL, NULL); 352DEFINE_CLOCK(esai_clk, 0, MX35_CCM_CGR0, 24, NULL, NULL);
369DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGR0, 26, get_rate_sdhc, NULL); 353DEFINE_CLOCK(esdhc1_clk, 0, MX35_CCM_CGR0, 26, get_rate_sdhc, NULL);
370DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGR0, 28, get_rate_sdhc, NULL); 354DEFINE_CLOCK(esdhc2_clk, 1, MX35_CCM_CGR0, 28, get_rate_sdhc, NULL);
371DEFINE_CLOCK(esdhc3_clk, 2, CCM_CGR0, 30, get_rate_sdhc, NULL); 355DEFINE_CLOCK(esdhc3_clk, 2, MX35_CCM_CGR0, 30, get_rate_sdhc, NULL);
372 356
373DEFINE_CLOCK(fec_clk, 0, CCM_CGR1, 0, get_rate_ipg, NULL); 357DEFINE_CLOCK(fec_clk, 0, MX35_CCM_CGR1, 0, get_rate_ipg, NULL);
374DEFINE_CLOCK(gpio1_clk, 0, CCM_CGR1, 2, NULL, NULL); 358DEFINE_CLOCK(gpio1_clk, 0, MX35_CCM_CGR1, 2, NULL, NULL);
375DEFINE_CLOCK(gpio2_clk, 1, CCM_CGR1, 4, NULL, NULL); 359DEFINE_CLOCK(gpio2_clk, 1, MX35_CCM_CGR1, 4, NULL, NULL);
376DEFINE_CLOCK(gpio3_clk, 2, CCM_CGR1, 6, NULL, NULL); 360DEFINE_CLOCK(gpio3_clk, 2, MX35_CCM_CGR1, 6, NULL, NULL);
377DEFINE_CLOCK(gpt_clk, 0, CCM_CGR1, 8, get_rate_ipg, NULL); 361DEFINE_CLOCK(gpt_clk, 0, MX35_CCM_CGR1, 8, get_rate_ipg, NULL);
378DEFINE_CLOCK(i2c1_clk, 0, CCM_CGR1, 10, get_rate_ipg_per, NULL); 362DEFINE_CLOCK(i2c1_clk, 0, MX35_CCM_CGR1, 10, get_rate_ipg_per, NULL);
379DEFINE_CLOCK(i2c2_clk, 1, CCM_CGR1, 12, get_rate_ipg_per, NULL); 363DEFINE_CLOCK(i2c2_clk, 1, MX35_CCM_CGR1, 12, get_rate_ipg_per, NULL);
380DEFINE_CLOCK(i2c3_clk, 2, CCM_CGR1, 14, get_rate_ipg_per, NULL); 364DEFINE_CLOCK(i2c3_clk, 2, MX35_CCM_CGR1, 14, get_rate_ipg_per, NULL);
381DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL); 365DEFINE_CLOCK(iomuxc_clk, 0, MX35_CCM_CGR1, 16, NULL, NULL);
382DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, get_rate_hsp, NULL); 366DEFINE_CLOCK(ipu_clk, 0, MX35_CCM_CGR1, 18, get_rate_hsp, NULL);
383DEFINE_CLOCK(kpp_clk, 0, CCM_CGR1, 20, get_rate_ipg, NULL); 367DEFINE_CLOCK(kpp_clk, 0, MX35_CCM_CGR1, 20, get_rate_ipg, NULL);
384DEFINE_CLOCK(mlb_clk, 0, CCM_CGR1, 22, get_rate_ahb, NULL); 368DEFINE_CLOCK(mlb_clk, 0, MX35_CCM_CGR1, 22, get_rate_ahb, NULL);
385DEFINE_CLOCK(mshc_clk, 0, CCM_CGR1, 24, get_rate_mshc, NULL); 369DEFINE_CLOCK(mshc_clk, 0, MX35_CCM_CGR1, 24, get_rate_mshc, NULL);
386DEFINE_CLOCK(owire_clk, 0, CCM_CGR1, 26, get_rate_ipg_per, NULL); 370DEFINE_CLOCK(owire_clk, 0, MX35_CCM_CGR1, 26, get_rate_ipg_per, NULL);
387DEFINE_CLOCK(pwm_clk, 0, CCM_CGR1, 28, get_rate_ipg_per, NULL); 371DEFINE_CLOCK(pwm_clk, 0, MX35_CCM_CGR1, 28, get_rate_ipg_per, NULL);
388DEFINE_CLOCK(rngc_clk, 0, CCM_CGR1, 30, get_rate_ipg, NULL); 372DEFINE_CLOCK(rngc_clk, 0, MX35_CCM_CGR1, 30, get_rate_ipg, NULL);
389 373
390DEFINE_CLOCK(rtc_clk, 0, CCM_CGR2, 0, get_rate_ipg, NULL); 374DEFINE_CLOCK(rtc_clk, 0, MX35_CCM_CGR2, 0, get_rate_ipg, NULL);
391DEFINE_CLOCK(rtic_clk, 0, CCM_CGR2, 2, get_rate_ahb, NULL); 375DEFINE_CLOCK(rtic_clk, 0, MX35_CCM_CGR2, 2, get_rate_ahb, NULL);
392DEFINE_CLOCK(scc_clk, 0, CCM_CGR2, 4, get_rate_ipg, NULL); 376DEFINE_CLOCK(scc_clk, 0, MX35_CCM_CGR2, 4, get_rate_ipg, NULL);
393DEFINE_CLOCK(sdma_clk, 0, CCM_CGR2, 6, NULL, NULL); 377DEFINE_CLOCK(sdma_clk, 0, MX35_CCM_CGR2, 6, NULL, NULL);
394DEFINE_CLOCK(spba_clk, 0, CCM_CGR2, 8, get_rate_ipg, NULL); 378DEFINE_CLOCK(spba_clk, 0, MX35_CCM_CGR2, 8, get_rate_ipg, NULL);
395DEFINE_CLOCK(spdif_clk, 0, CCM_CGR2, 10, NULL, NULL); 379DEFINE_CLOCK(spdif_clk, 0, MX35_CCM_CGR2, 10, NULL, NULL);
396DEFINE_CLOCK(ssi1_clk, 0, CCM_CGR2, 12, get_rate_ssi, NULL); 380DEFINE_CLOCK(ssi1_clk, 0, MX35_CCM_CGR2, 12, get_rate_ssi, NULL);
397DEFINE_CLOCK(ssi2_clk, 1, CCM_CGR2, 14, get_rate_ssi, NULL); 381DEFINE_CLOCK(ssi2_clk, 1, MX35_CCM_CGR2, 14, get_rate_ssi, NULL);
398DEFINE_CLOCK(uart1_clk, 0, CCM_CGR2, 16, get_rate_uart, NULL); 382DEFINE_CLOCK(uart1_clk, 0, MX35_CCM_CGR2, 16, get_rate_uart, NULL);
399DEFINE_CLOCK(uart2_clk, 1, CCM_CGR2, 18, get_rate_uart, NULL); 383DEFINE_CLOCK(uart2_clk, 1, MX35_CCM_CGR2, 18, get_rate_uart, NULL);
400DEFINE_CLOCK(uart3_clk, 2, CCM_CGR2, 20, get_rate_uart, NULL); 384DEFINE_CLOCK(uart3_clk, 2, MX35_CCM_CGR2, 20, get_rate_uart, NULL);
401DEFINE_CLOCK(usbotg_clk, 0, CCM_CGR2, 22, get_rate_otg, NULL); 385DEFINE_CLOCK(usbotg_clk, 0, MX35_CCM_CGR2, 22, get_rate_otg, NULL);
402DEFINE_CLOCK(wdog_clk, 0, CCM_CGR2, 24, NULL, NULL); 386DEFINE_CLOCK(wdog_clk, 0, MX35_CCM_CGR2, 24, NULL, NULL);
403DEFINE_CLOCK(max_clk, 0, CCM_CGR2, 26, NULL, NULL); 387DEFINE_CLOCK(max_clk, 0, MX35_CCM_CGR2, 26, NULL, NULL);
404DEFINE_CLOCK(audmux_clk, 0, CCM_CGR2, 30, NULL, NULL); 388DEFINE_CLOCK(audmux_clk, 0, MX35_CCM_CGR2, 30, NULL, NULL);
405 389
406DEFINE_CLOCK(csi_clk, 0, CCM_CGR3, 0, get_rate_csi, NULL); 390DEFINE_CLOCK(csi_clk, 0, MX35_CCM_CGR3, 0, get_rate_csi, NULL);
407DEFINE_CLOCK(iim_clk, 0, CCM_CGR3, 2, NULL, NULL); 391DEFINE_CLOCK(iim_clk, 0, MX35_CCM_CGR3, 2, NULL, NULL);
408DEFINE_CLOCK(gpu2d_clk, 0, CCM_CGR3, 4, NULL, NULL); 392DEFINE_CLOCK(gpu2d_clk, 0, MX35_CCM_CGR3, 4, NULL, NULL);
409 393
410DEFINE_CLOCK(usbahb_clk, 0, 0, 0, get_rate_ahb, NULL); 394DEFINE_CLOCK(usbahb_clk, 0, 0, 0, get_rate_ahb, NULL);
411 395
@@ -422,7 +406,7 @@ static unsigned long get_rate_nfc(struct clk *clk)
422{ 406{
423 unsigned long div1; 407 unsigned long div1;
424 408
425 div1 = (__raw_readl(CCM_BASE + CCM_PDR4) >> 28) + 1; 409 div1 = (__raw_readl(MX35_CCM_PDR4) >> 28) + 1;
426 410
427 return get_rate_ahb(NULL) / div1; 411 return get_rate_ahb(NULL) / div1;
428} 412}
@@ -518,11 +502,11 @@ int __init mx35_clocks_init()
518 /* Turn off all clocks except the ones we need to survive, namely: 502 /* Turn off all clocks except the ones we need to survive, namely:
519 * EMI, GPIO1/2/3, GPT, IOMUX, MAX and eventually uart 503 * EMI, GPIO1/2/3, GPT, IOMUX, MAX and eventually uart
520 */ 504 */
521 __raw_writel((3 << 18), CCM_BASE + CCM_CGR0); 505 __raw_writel((3 << 18), MX35_CCM_CGR0);
522 __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), 506 __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16),
523 CCM_BASE + CCM_CGR1); 507 MX35_CCM_CGR1);
524 __raw_writel(cgr2, CCM_BASE + CCM_CGR2); 508 __raw_writel(cgr2, MX35_CCM_CGR2);
525 __raw_writel(0, CCM_BASE + CCM_CGR3); 509 __raw_writel(0, MX35_CCM_CGR3);
526 510
527 clk_enable(&iim_clk); 511 clk_enable(&iim_clk);
528 imx_print_silicon_rev("i.MX35", mx35_revision()); 512 imx_print_silicon_rev("i.MX35", mx35_revision());
@@ -533,7 +517,7 @@ int __init mx35_clocks_init()
533 * extra clocks turned on, otherwise the MX35 boot ROM code will 517 * extra clocks turned on, otherwise the MX35 boot ROM code will
534 * hang after a watchdog reset. 518 * hang after a watchdog reset.
535 */ 519 */
536 if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) { 520 if (!(__raw_readl(MX35_CCM_RCSR) & (3 << 10))) {
537 /* Additionally turn on UART1, SCC, and IIM clocks */ 521 /* Additionally turn on UART1, SCC, and IIM clocks */
538 clk_enable(&iim_clk); 522 clk_enable(&iim_clk);
539 clk_enable(&uart1_clk); 523 clk_enable(&uart1_clk);
diff --git a/arch/arm/mach-imx/cpu_op-mx51.c b/arch/arm/mach-imx/cpu_op-mx51.c
index 9d34c3d4c02..7b92cd6da6d 100644
--- a/arch/arm/mach-imx/cpu_op-mx51.c
+++ b/arch/arm/mach-imx/cpu_op-mx51.c
@@ -11,6 +11,7 @@
11 * http://www.gnu.org/copyleft/gpl.html 11 * http://www.gnu.org/copyleft/gpl.html
12 */ 12 */
13 13
14#include <linux/bug.h>
14#include <linux/types.h> 15#include <linux/types.h>
15#include <mach/hardware.h> 16#include <mach/hardware.h>
16#include <linux/kernel.h> 17#include <linux/kernel.h>
diff --git a/arch/arm/mach-imx/crmregs-imx31.h b/arch/arm/mach-imx/crmregs-imx3.h
index 37a8a07beda..d7691e2362c 100644
--- a/arch/arm/mach-imx/crmregs-imx31.h
+++ b/arch/arm/mach-imx/crmregs-imx3.h
@@ -24,23 +24,36 @@
24#define CKIH_CLK_FREQ_27MHZ 27000000 24#define CKIH_CLK_FREQ_27MHZ 27000000
25#define CKIL_CLK_FREQ 32768 25#define CKIL_CLK_FREQ 32768
26 26
27#define MXC_CCM_BASE MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR) 27#define MXC_CCM_BASE (cpu_is_mx31() ? \
28MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR) : MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR))
28 29
29/* Register addresses */ 30/* Register addresses */
30#define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00) 31#define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00)
31#define MXC_CCM_PDR0 (MXC_CCM_BASE + 0x04) 32#define MXC_CCM_PDR0 (MXC_CCM_BASE + 0x04)
32#define MXC_CCM_PDR1 (MXC_CCM_BASE + 0x08) 33#define MXC_CCM_PDR1 (MXC_CCM_BASE + 0x08)
34#define MX35_CCM_PDR2 (MXC_CCM_BASE + 0x0C)
33#define MXC_CCM_RCSR (MXC_CCM_BASE + 0x0C) 35#define MXC_CCM_RCSR (MXC_CCM_BASE + 0x0C)
36#define MX35_CCM_PDR3 (MXC_CCM_BASE + 0x10)
34#define MXC_CCM_MPCTL (MXC_CCM_BASE + 0x10) 37#define MXC_CCM_MPCTL (MXC_CCM_BASE + 0x10)
38#define MX35_CCM_PDR4 (MXC_CCM_BASE + 0x14)
35#define MXC_CCM_UPCTL (MXC_CCM_BASE + 0x14) 39#define MXC_CCM_UPCTL (MXC_CCM_BASE + 0x14)
40#define MX35_CCM_RCSR (MXC_CCM_BASE + 0x18)
36#define MXC_CCM_SRPCTL (MXC_CCM_BASE + 0x18) 41#define MXC_CCM_SRPCTL (MXC_CCM_BASE + 0x18)
42#define MX35_CCM_MPCTL (MXC_CCM_BASE + 0x1C)
37#define MXC_CCM_COSR (MXC_CCM_BASE + 0x1C) 43#define MXC_CCM_COSR (MXC_CCM_BASE + 0x1C)
44#define MX35_CCM_PPCTL (MXC_CCM_BASE + 0x20)
38#define MXC_CCM_CGR0 (MXC_CCM_BASE + 0x20) 45#define MXC_CCM_CGR0 (MXC_CCM_BASE + 0x20)
46#define MX35_CCM_ACMR (MXC_CCM_BASE + 0x24)
39#define MXC_CCM_CGR1 (MXC_CCM_BASE + 0x24) 47#define MXC_CCM_CGR1 (MXC_CCM_BASE + 0x24)
48#define MX35_CCM_COSR (MXC_CCM_BASE + 0x28)
40#define MXC_CCM_CGR2 (MXC_CCM_BASE + 0x28) 49#define MXC_CCM_CGR2 (MXC_CCM_BASE + 0x28)
50#define MX35_CCM_CGR0 (MXC_CCM_BASE + 0x2C)
41#define MXC_CCM_WIMR (MXC_CCM_BASE + 0x2C) 51#define MXC_CCM_WIMR (MXC_CCM_BASE + 0x2C)
52#define MX35_CCM_CGR1 (MXC_CCM_BASE + 0x30)
42#define MXC_CCM_LDC (MXC_CCM_BASE + 0x30) 53#define MXC_CCM_LDC (MXC_CCM_BASE + 0x30)
54#define MX35_CCM_CGR2 (MXC_CCM_BASE + 0x34)
43#define MXC_CCM_DCVR0 (MXC_CCM_BASE + 0x34) 55#define MXC_CCM_DCVR0 (MXC_CCM_BASE + 0x34)
56#define MX35_CCM_CGR3 (MXC_CCM_BASE + 0x38)
44#define MXC_CCM_DCVR1 (MXC_CCM_BASE + 0x38) 57#define MXC_CCM_DCVR1 (MXC_CCM_BASE + 0x38)
45#define MXC_CCM_DCVR2 (MXC_CCM_BASE + 0x3C) 58#define MXC_CCM_DCVR2 (MXC_CCM_BASE + 0x3C)
46#define MXC_CCM_DCVR3 (MXC_CCM_BASE + 0x40) 59#define MXC_CCM_DCVR3 (MXC_CCM_BASE + 0x40)
diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h
index 2f727d7c380..28537a5d904 100644
--- a/arch/arm/mach-imx/devices-imx27.h
+++ b/arch/arm/mach-imx/devices-imx27.h
@@ -50,6 +50,8 @@ extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[];
50extern const struct imx_mx2_camera_data imx27_mx2_camera_data; 50extern const struct imx_mx2_camera_data imx27_mx2_camera_data;
51#define imx27_add_mx2_camera(pdata) \ 51#define imx27_add_mx2_camera(pdata) \
52 imx_add_mx2_camera(&imx27_mx2_camera_data, pdata) 52 imx_add_mx2_camera(&imx27_mx2_camera_data, pdata)
53#define imx27_add_mx2_emmaprp(pdata) \
54 imx_add_mx2_emmaprp(&imx27_mx2_camera_data)
53 55
54extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data; 56extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data;
55#define imx27_add_mxc_ehci_otg(pdata) \ 57#define imx27_add_mxc_ehci_otg(pdata) \
diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
index 5db3e1463af..5f2f91d1798 100644
--- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
@@ -32,7 +32,6 @@
32#include <mach/common.h> 32#include <mach/common.h>
33#include <mach/iomux-mx27.h> 33#include <mach/iomux-mx27.h>
34#include <mach/hardware.h> 34#include <mach/hardware.h>
35#include <mach/audmux.h>
36 35
37#include "devices-imx27.h" 36#include "devices-imx27.h"
38 37
@@ -306,25 +305,6 @@ void __init eukrea_mbimx27_baseboard_init(void)
306 mxc_gpio_setup_multiple_pins(eukrea_mbimx27_pins, 305 mxc_gpio_setup_multiple_pins(eukrea_mbimx27_pins,
307 ARRAY_SIZE(eukrea_mbimx27_pins), "MBIMX27"); 306 ARRAY_SIZE(eukrea_mbimx27_pins), "MBIMX27");
308 307
309#if defined(CONFIG_SND_SOC_EUKREA_TLV320) \
310 || defined(CONFIG_SND_SOC_EUKREA_TLV320_MODULE)
311 /* SSI unit master I2S codec connected to SSI_PINS_4*/
312 mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
313 MXC_AUDMUX_V1_PCR_SYN |
314 MXC_AUDMUX_V1_PCR_TFSDIR |
315 MXC_AUDMUX_V1_PCR_TCLKDIR |
316 MXC_AUDMUX_V1_PCR_RFSDIR |
317 MXC_AUDMUX_V1_PCR_RCLKDIR |
318 MXC_AUDMUX_V1_PCR_TFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |
319 MXC_AUDMUX_V1_PCR_RFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |
320 MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4)
321 );
322 mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR3_SSI_PINS_4,
323 MXC_AUDMUX_V1_PCR_SYN |
324 MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0)
325 );
326#endif
327
328 imx27_add_imx_uart1(&uart_pdata); 308 imx27_add_imx_uart1(&uart_pdata);
329 imx27_add_imx_uart2(&uart_pdata); 309 imx27_add_imx_uart2(&uart_pdata);
330#if !defined(MACH_EUKREA_CPUIMX27_USEUART4) 310#if !defined(MACH_EUKREA_CPUIMX27_USEUART4)
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c
index d817fc80b98..aaa592fdb9c 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c
@@ -37,7 +37,6 @@
37#include <mach/hardware.h> 37#include <mach/hardware.h>
38#include <mach/common.h> 38#include <mach/common.h>
39#include <mach/iomux-mx51.h> 39#include <mach/iomux-mx51.h>
40#include <mach/audmux.h>
41 40
42#include "devices-imx51.h" 41#include "devices-imx51.h"
43 42
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
index 66e8726253f..2cf603e11c4 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
@@ -31,7 +31,6 @@
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
33#include <mach/mx25.h> 33#include <mach/mx25.h>
34#include <mach/audmux.h>
35 34
36#include "devices-imx25.h" 35#include "devices-imx25.h"
37 36
@@ -241,22 +240,6 @@ void __init eukrea_mbimxsd25_baseboard_init(void)
241 ARRAY_SIZE(eukrea_mbimxsd_pads))) 240 ARRAY_SIZE(eukrea_mbimxsd_pads)))
242 printk(KERN_ERR "error setting mbimxsd pads !\n"); 241 printk(KERN_ERR "error setting mbimxsd pads !\n");
243 242
244#if defined(CONFIG_SND_SOC_EUKREA_TLV320)
245 /* SSI unit master I2S codec connected to SSI_AUD5*/
246 mxc_audmux_v2_configure_port(0,
247 MXC_AUDMUX_V2_PTCR_SYN |
248 MXC_AUDMUX_V2_PTCR_TFSDIR |
249 MXC_AUDMUX_V2_PTCR_TFSEL(4) |
250 MXC_AUDMUX_V2_PTCR_TCLKDIR |
251 MXC_AUDMUX_V2_PTCR_TCSEL(4),
252 MXC_AUDMUX_V2_PDCR_RXDSEL(4)
253 );
254 mxc_audmux_v2_configure_port(4,
255 MXC_AUDMUX_V2_PTCR_SYN,
256 MXC_AUDMUX_V2_PDCR_RXDSEL(0)
257 );
258#endif
259
260 imx25_add_imx_uart1(&uart_pdata); 243 imx25_add_imx_uart1(&uart_pdata);
261 imx25_add_imx_fb(&eukrea_mximxsd_fb_pdata); 244 imx25_add_imx_fb(&eukrea_mximxsd_fb_pdata);
262 imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); 245 imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
index 0f0af02b318..fd8bf8a425a 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
@@ -38,7 +38,6 @@
38#include <mach/hardware.h> 38#include <mach/hardware.h>
39#include <mach/common.h> 39#include <mach/common.h>
40#include <mach/iomux-mx35.h> 40#include <mach/iomux-mx35.h>
41#include <mach/audmux.h>
42 41
43#include "devices-imx35.h" 42#include "devices-imx35.h"
44 43
@@ -252,22 +251,6 @@ void __init eukrea_mbimxsd35_baseboard_init(void)
252 ARRAY_SIZE(eukrea_mbimxsd_pads))) 251 ARRAY_SIZE(eukrea_mbimxsd_pads)))
253 printk(KERN_ERR "error setting mbimxsd pads !\n"); 252 printk(KERN_ERR "error setting mbimxsd pads !\n");
254 253
255#if defined(CONFIG_SND_SOC_EUKREA_TLV320)
256 /* SSI unit master I2S codec connected to SSI_AUD4 */
257 mxc_audmux_v2_configure_port(0,
258 MXC_AUDMUX_V2_PTCR_SYN |
259 MXC_AUDMUX_V2_PTCR_TFSDIR |
260 MXC_AUDMUX_V2_PTCR_TFSEL(3) |
261 MXC_AUDMUX_V2_PTCR_TCLKDIR |
262 MXC_AUDMUX_V2_PTCR_TCSEL(3),
263 MXC_AUDMUX_V2_PDCR_RXDSEL(3)
264 );
265 mxc_audmux_v2_configure_port(3,
266 MXC_AUDMUX_V2_PTCR_SYN,
267 MXC_AUDMUX_V2_PDCR_RXDSEL(0)
268 );
269#endif
270
271 imx35_add_imx_uart1(&uart_pdata); 254 imx35_add_imx_uart1(&uart_pdata);
272 imx35_add_ipu_core(&mx3_ipu_data); 255 imx35_add_ipu_core(&mx3_ipu_data);
273 imx35_add_mx3_sdc_fb(&mx3fb_pdata); 256 imx35_add_mx3_sdc_fb(&mx3fb_pdata);
diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c
index e6bad17b908..1e03ef42faa 100644
--- a/arch/arm/mach-imx/imx51-dt.c
+++ b/arch/arm/mach-imx/imx51-dt.c
@@ -47,7 +47,7 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
47static int __init imx51_tzic_add_irq_domain(struct device_node *np, 47static int __init imx51_tzic_add_irq_domain(struct device_node *np,
48 struct device_node *interrupt_parent) 48 struct device_node *interrupt_parent)
49{ 49{
50 irq_domain_add_simple(np, 0); 50 irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
51 return 0; 51 return 0;
52} 52}
53 53
@@ -57,7 +57,7 @@ static int __init imx51_gpio_add_irq_domain(struct device_node *np,
57 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; 57 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
58 58
59 gpio_irq_base -= 32; 59 gpio_irq_base -= 32;
60 irq_domain_add_simple(np, gpio_irq_base); 60 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
61 61
62 return 0; 62 return 0;
63} 63}
diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c
index 05ebb3e6867..fd5be0f20fb 100644
--- a/arch/arm/mach-imx/imx53-dt.c
+++ b/arch/arm/mach-imx/imx53-dt.c
@@ -51,7 +51,7 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
51static int __init imx53_tzic_add_irq_domain(struct device_node *np, 51static int __init imx53_tzic_add_irq_domain(struct device_node *np,
52 struct device_node *interrupt_parent) 52 struct device_node *interrupt_parent)
53{ 53{
54 irq_domain_add_simple(np, 0); 54 irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
55 return 0; 55 return 0;
56} 56}
57 57
@@ -61,7 +61,7 @@ static int __init imx53_gpio_add_irq_domain(struct device_node *np,
61 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; 61 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
62 62
63 gpio_irq_base -= 32; 63 gpio_irq_base -= 32;
64 irq_domain_add_simple(np, gpio_irq_base); 64 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
65 65
66 return 0; 66 return 0;
67} 67}
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index e4f426a0989..27bc27e6ea4 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -51,7 +51,7 @@
51#include <mach/ulpi.h> 51#include <mach/ulpi.h>
52 52
53#include "devices-imx31.h" 53#include "devices-imx31.h"
54#include "crmregs-imx31.h" 54#include "crmregs-imx3.h"
55 55
56static int armadillo5x0_pins[] = { 56static int armadillo5x0_pins[] = {
57 /* UART1 */ 57 /* UART1 */
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index c2766ae02b4..428459fbca4 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -263,6 +263,7 @@ static void __init visstrim_m10_board_init(void)
263 imx27_add_fec(NULL); 263 imx27_add_fec(NULL);
264 imx_add_gpio_keys(&visstrim_gpio_keys_platform_data); 264 imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
265 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 265 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
266 imx_add_platform_device("mx27vis", 0, NULL, 0, NULL, 0);
266} 267}
267 268
268static void __init visstrim_m10_timer_init(void) 269static void __init visstrim_m10_timer_init(void)
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index a2eea8671ee..21f54a8ecc8 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -98,7 +98,8 @@ static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
98 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; 98 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
99 99
100 gpio_irq_base -= 32; 100 gpio_irq_base -= 32;
101 irq_domain_add_simple(np, gpio_irq_base); 101 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
102 NULL);
102 103
103 return 0; 104 return 0;
104} 105}
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index d3b9c6b5edd..541152e450c 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -36,7 +36,6 @@
36#include <mach/hardware.h> 36#include <mach/hardware.h>
37#include <mach/iomux-mx27.h> 37#include <mach/iomux-mx27.h>
38#include <asm/mach/time.h> 38#include <asm/mach/time.h>
39#include <mach/audmux.h>
40#include <mach/irqs.h> 39#include <mach/irqs.h>
41#include <mach/ulpi.h> 40#include <mach/ulpi.h>
42 41
@@ -359,18 +358,6 @@ static void __init pca100_init(void)
359 358
360 imx27_soc_init(); 359 imx27_soc_init();
361 360
362 /* SSI unit */
363 mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
364 MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
365 MXC_AUDMUX_V1_PCR_TFCSEL(3) |
366 MXC_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */
367 MXC_AUDMUX_V1_PCR_RXDSEL(3));
368 mxc_audmux_v1_configure_port(3,
369 MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
370 MXC_AUDMUX_V1_PCR_TFCSEL(0) |
371 MXC_AUDMUX_V1_PCR_TFSDIR |
372 MXC_AUDMUX_V1_PCR_RXDSEL(0));
373
374 ret = mxc_gpio_setup_multiple_pins(pca100_pins, 361 ret = mxc_gpio_setup_multiple_pins(pca100_pins,
375 ARRAY_SIZE(pca100_pins), "PCA100"); 362 ARRAY_SIZE(pca100_pins), "PCA100");
376 if (ret) 363 if (ret)
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c
index e48854b9d99..5fddf94cc96 100644
--- a/arch/arm/mach-imx/mach-pcm037.c
+++ b/arch/arm/mach-imx/mach-pcm037.c
@@ -32,6 +32,8 @@
32#include <linux/usb/ulpi.h> 32#include <linux/usb/ulpi.h>
33#include <linux/gfp.h> 33#include <linux/gfp.h>
34#include <linux/memblock.h> 34#include <linux/memblock.h>
35#include <linux/regulator/machine.h>
36#include <linux/regulator/fixed.h>
35 37
36#include <media/soc_camera.h> 38#include <media/soc_camera.h>
37 39
@@ -570,6 +572,11 @@ static int __init pcm037_otg_mode(char *options)
570} 572}
571__setup("otg_mode=", pcm037_otg_mode); 573__setup("otg_mode=", pcm037_otg_mode);
572 574
575static struct regulator_consumer_supply dummy_supplies[] = {
576 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
577 REGULATOR_SUPPLY("vddvario", "smsc911x"),
578};
579
573/* 580/*
574 * Board specific initialization. 581 * Board specific initialization.
575 */ 582 */
@@ -579,6 +586,8 @@ static void __init pcm037_init(void)
579 586
580 imx31_soc_init(); 587 imx31_soc_init();
581 588
589 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
590
582 mxc_iomux_set_gpr(MUX_PGP_UH2, 1); 591 mxc_iomux_set_gpr(MUX_PGP_UH2, 1);
583 592
584 mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins), 593 mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 16f126da9f8..2f3debe2a11 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -233,7 +233,7 @@ static struct regulator_init_data sdhc1_data = {
233 233
234static struct regulator_consumer_supply cam_consumers[] = { 234static struct regulator_consumer_supply cam_consumers[] = {
235 { 235 {
236 .dev = NULL, 236 .dev_name = NULL,
237 .supply = "imx_cam_vcc", 237 .supply = "imx_cam_vcc",
238 }, 238 },
239}; 239};
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c
index 06dc106519a..237474fcca2 100644
--- a/arch/arm/mach-imx/mach-pcm043.c
+++ b/arch/arm/mach-imx/mach-pcm043.c
@@ -37,7 +37,6 @@
37#include <mach/common.h> 37#include <mach/common.h>
38#include <mach/iomux-mx35.h> 38#include <mach/iomux-mx35.h>
39#include <mach/ulpi.h> 39#include <mach/ulpi.h>
40#include <mach/audmux.h>
41 40
42#include "devices-imx35.h" 41#include "devices-imx35.h"
43 42
@@ -362,18 +361,6 @@ static void __init pcm043_init(void)
362 361
363 mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads)); 362 mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads));
364 363
365 mxc_audmux_v2_configure_port(3,
366 MXC_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
367 MXC_AUDMUX_V2_PTCR_TFSEL(0) |
368 MXC_AUDMUX_V2_PTCR_TFSDIR,
369 MXC_AUDMUX_V2_PDCR_RXDSEL(0));
370
371 mxc_audmux_v2_configure_port(0,
372 MXC_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
373 MXC_AUDMUX_V2_PTCR_TCSEL(3) |
374 MXC_AUDMUX_V2_PTCR_TCLKDIR, /* clock is output */
375 MXC_AUDMUX_V2_PDCR_RXDSEL(3));
376
377 imx35_add_fec(NULL); 364 imx35_add_fec(NULL);
378 platform_add_devices(devices, ARRAY_SIZE(devices)); 365 platform_add_devices(devices, ARRAY_SIZE(devices));
379 imx35_add_imx2_wdt(NULL); 366 imx35_add_imx2_wdt(NULL);
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c
index 3f05dfebacc..14d540edfd1 100644
--- a/arch/arm/mach-imx/mm-imx21.c
+++ b/arch/arm/mach-imx/mm-imx21.c
@@ -75,6 +75,10 @@ void __init mx21_init_irq(void)
75 mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR)); 75 mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR));
76} 76}
77 77
78static const struct resource imx21_audmux_res[] __initconst = {
79 DEFINE_RES_MEM(MX21_AUDMUX_BASE_ADDR, SZ_4K),
80};
81
78void __init imx21_soc_init(void) 82void __init imx21_soc_init(void)
79{ 83{
80 mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); 84 mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
@@ -85,4 +89,6 @@ void __init imx21_soc_init(void)
85 mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); 89 mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
86 90
87 imx_add_imx_dma(); 91 imx_add_imx_dma();
92 platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res,
93 ARRAY_SIZE(imx21_audmux_res));
88} 94}
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c
index cc4d152bd9b..153b457acdc 100644
--- a/arch/arm/mach-imx/mm-imx25.c
+++ b/arch/arm/mach-imx/mm-imx25.c
@@ -83,6 +83,10 @@ static struct sdma_platform_data imx25_sdma_pdata __initdata = {
83 .script_addrs = &imx25_sdma_script, 83 .script_addrs = &imx25_sdma_script,
84}; 84};
85 85
86static const struct resource imx25_audmux_res[] __initconst = {
87 DEFINE_RES_MEM(MX25_AUDMUX_BASE_ADDR, SZ_16K),
88};
89
86void __init imx25_soc_init(void) 90void __init imx25_soc_init(void)
87{ 91{
88 /* i.mx25 has the i.mx31 type gpio */ 92 /* i.mx25 has the i.mx31 type gpio */
@@ -93,4 +97,7 @@ void __init imx25_soc_init(void)
93 97
94 /* i.mx25 has the i.mx35 type sdma */ 98 /* i.mx25 has the i.mx35 type sdma */
95 imx_add_imx_sdma("imx35-sdma", MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata); 99 imx_add_imx_sdma("imx35-sdma", MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata);
100 /* i.mx25 has the i.mx31 type audmux */
101 platform_device_register_simple("imx31-audmux", 0, imx25_audmux_res,
102 ARRAY_SIZE(imx25_audmux_res));
96} 103}
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
index 96dd1f5ea7b..8cb3f5e3e56 100644
--- a/arch/arm/mach-imx/mm-imx27.c
+++ b/arch/arm/mach-imx/mm-imx27.c
@@ -75,6 +75,10 @@ void __init mx27_init_irq(void)
75 mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR)); 75 mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR));
76} 76}
77 77
78static const struct resource imx27_audmux_res[] __initconst = {
79 DEFINE_RES_MEM(MX27_AUDMUX_BASE_ADDR, SZ_4K),
80};
81
78void __init imx27_soc_init(void) 82void __init imx27_soc_init(void)
79{ 83{
80 /* i.mx27 has the i.mx21 type gpio */ 84 /* i.mx27 has the i.mx21 type gpio */
@@ -86,4 +90,7 @@ void __init imx27_soc_init(void)
86 mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); 90 mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
87 91
88 imx_add_imx_dma(); 92 imx_add_imx_dma();
93 /* imx27 has the imx21 type audmux */
94 platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res,
95 ARRAY_SIZE(imx27_audmux_res));
89} 96}
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 8404ee72555..07699196b46 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -76,7 +76,7 @@ static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
76 return __arm_ioremap(phys_addr, size, mtype); 76 return __arm_ioremap(phys_addr, size, mtype);
77} 77}
78 78
79void imx3_init_l2x0(void) 79void __init imx3_init_l2x0(void)
80{ 80{
81 void __iomem *l2x0_base; 81 void __iomem *l2x0_base;
82 void __iomem *clkctl_base; 82 void __iomem *clkctl_base;
@@ -156,6 +156,10 @@ static struct sdma_platform_data imx31_sdma_pdata __initdata = {
156 .script_addrs = &imx31_to2_sdma_script, 156 .script_addrs = &imx31_to2_sdma_script,
157}; 157};
158 158
159static const struct resource imx31_audmux_res[] __initconst = {
160 DEFINE_RES_MEM(MX31_AUDMUX_BASE_ADDR, SZ_16K),
161};
162
159void __init imx31_soc_init(void) 163void __init imx31_soc_init(void)
160{ 164{
161 int to_version = mx31_revision() >> 4; 165 int to_version = mx31_revision() >> 4;
@@ -173,6 +177,8 @@ void __init imx31_soc_init(void)
173 } 177 }
174 178
175 imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); 179 imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
180 platform_device_register_simple("imx31-audmux", 0, imx31_audmux_res,
181 ARRAY_SIZE(imx31_audmux_res));
176} 182}
177#endif /* ifdef CONFIG_SOC_IMX31 */ 183#endif /* ifdef CONFIG_SOC_IMX31 */
178 184
@@ -239,6 +245,10 @@ static struct sdma_platform_data imx35_sdma_pdata __initdata = {
239 .script_addrs = &imx35_to2_sdma_script, 245 .script_addrs = &imx35_to2_sdma_script,
240}; 246};
241 247
248static const struct resource imx35_audmux_res[] __initconst = {
249 DEFINE_RES_MEM(MX35_AUDMUX_BASE_ADDR, SZ_16K),
250};
251
242void __init imx35_soc_init(void) 252void __init imx35_soc_init(void)
243{ 253{
244 int to_version = mx35_revision() >> 4; 254 int to_version = mx35_revision() >> 4;
@@ -257,5 +267,8 @@ void __init imx35_soc_init(void)
257 } 267 }
258 268
259 imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); 269 imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
270 /* i.mx35 has the i.mx31 type audmux */
271 platform_device_register_simple("imx31-audmux", 0, imx35_audmux_res,
272 ARRAY_SIZE(imx35_audmux_res));
260} 273}
261#endif /* ifdef CONFIG_SOC_IMX35 */ 274#endif /* ifdef CONFIG_SOC_IMX35 */
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index 49549a72dc7..dc7c4ed8153 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -164,6 +164,18 @@ static struct sdma_platform_data imx53_sdma_pdata __initdata = {
164 .script_addrs = &imx53_sdma_script, 164 .script_addrs = &imx53_sdma_script,
165}; 165};
166 166
167static const struct resource imx50_audmux_res[] __initconst = {
168 DEFINE_RES_MEM(MX50_AUDMUX_BASE_ADDR, SZ_16K),
169};
170
171static const struct resource imx51_audmux_res[] __initconst = {
172 DEFINE_RES_MEM(MX51_AUDMUX_BASE_ADDR, SZ_16K),
173};
174
175static const struct resource imx53_audmux_res[] __initconst = {
176 DEFINE_RES_MEM(MX53_AUDMUX_BASE_ADDR, SZ_16K),
177};
178
167void __init imx50_soc_init(void) 179void __init imx50_soc_init(void)
168{ 180{
169 /* i.mx50 has the i.mx31 type gpio */ 181 /* i.mx50 has the i.mx31 type gpio */
@@ -173,6 +185,10 @@ void __init imx50_soc_init(void)
173 mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH); 185 mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
174 mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH); 186 mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
175 mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH); 187 mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
188
189 /* i.mx50 has the i.mx31 type audmux */
190 platform_device_register_simple("imx31-audmux", 0, imx50_audmux_res,
191 ARRAY_SIZE(imx50_audmux_res));
176} 192}
177 193
178void __init imx51_soc_init(void) 194void __init imx51_soc_init(void)
@@ -185,6 +201,9 @@ void __init imx51_soc_init(void)
185 201
186 /* i.mx51 has the i.mx35 type sdma */ 202 /* i.mx51 has the i.mx35 type sdma */
187 imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); 203 imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
204 /* i.mx51 has the i.mx31 type audmux */
205 platform_device_register_simple("imx31-audmux", 0, imx51_audmux_res,
206 ARRAY_SIZE(imx51_audmux_res));
188} 207}
189 208
190void __init imx53_soc_init(void) 209void __init imx53_soc_init(void)
@@ -200,4 +219,7 @@ void __init imx53_soc_init(void)
200 219
201 /* i.mx53 has the i.mx35 type sdma */ 220 /* i.mx53 has the i.mx35 type sdma */
202 imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata); 221 imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata);
222 /* i.mx53 has the i.mx31 type audmux */
223 platform_device_register_simple("imx31-audmux", 0, imx53_audmux_res,
224 ARRAY_SIZE(imx53_audmux_res));
203} 225}
diff --git a/arch/arm/mach-imx/mx31moboard-devboard.c b/arch/arm/mach-imx/mx31moboard-devboard.c
index 0aa25364360..cc285e50728 100644
--- a/arch/arm/mach-imx/mx31moboard-devboard.c
+++ b/arch/arm/mach-imx/mx31moboard-devboard.c
@@ -158,7 +158,7 @@ static int devboard_usbh1_hw_init(struct platform_device *pdev)
158#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B) 158#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
159#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE) 159#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
160 160
161static int devboard_isp1105_init(struct otg_transceiver *otg) 161static int devboard_isp1105_init(struct usb_phy *otg)
162{ 162{
163 int ret = gpio_request(USBH1_MODE, "usbh1-mode"); 163 int ret = gpio_request(USBH1_MODE, "usbh1-mode");
164 if (ret) 164 if (ret)
@@ -177,7 +177,7 @@ static int devboard_isp1105_init(struct otg_transceiver *otg)
177} 177}
178 178
179 179
180static int devboard_isp1105_set_vbus(struct otg_transceiver *otg, bool on) 180static int devboard_isp1105_set_vbus(struct usb_otg *otg, bool on)
181{ 181{
182 if (on) 182 if (on)
183 gpio_set_value(USBH1_VBUSEN_B, 0); 183 gpio_set_value(USBH1_VBUSEN_B, 0);
@@ -194,18 +194,24 @@ static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
194 194
195static int __init devboard_usbh1_init(void) 195static int __init devboard_usbh1_init(void)
196{ 196{
197 struct otg_transceiver *otg; 197 struct usb_phy *phy;
198 struct platform_device *pdev; 198 struct platform_device *pdev;
199 199
200 otg = kzalloc(sizeof(*otg), GFP_KERNEL); 200 phy = kzalloc(sizeof(*phy), GFP_KERNEL);
201 if (!otg) 201 if (!phy)
202 return -ENOMEM; 202 return -ENOMEM;
203 203
204 otg->label = "ISP1105"; 204 phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
205 otg->init = devboard_isp1105_init; 205 if (!phy->otg) {
206 otg->set_vbus = devboard_isp1105_set_vbus; 206 kfree(phy);
207 return -ENOMEM;
208 }
209
210 phy->label = "ISP1105";
211 phy->init = devboard_isp1105_init;
212 phy->otg->set_vbus = devboard_isp1105_set_vbus;
207 213
208 usbh1_pdata.otg = otg; 214 usbh1_pdata.otg = phy;
209 215
210 pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata); 216 pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
211 if (IS_ERR(pdev)) 217 if (IS_ERR(pdev))
diff --git a/arch/arm/mach-imx/mx31moboard-marxbot.c b/arch/arm/mach-imx/mx31moboard-marxbot.c
index bb639cbda4e..135c90e3a45 100644
--- a/arch/arm/mach-imx/mx31moboard-marxbot.c
+++ b/arch/arm/mach-imx/mx31moboard-marxbot.c
@@ -272,7 +272,7 @@ static int marxbot_usbh1_hw_init(struct platform_device *pdev)
272#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B) 272#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
273#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE) 273#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
274 274
275static int marxbot_isp1105_init(struct otg_transceiver *otg) 275static int marxbot_isp1105_init(struct usb_phy *otg)
276{ 276{
277 int ret = gpio_request(USBH1_MODE, "usbh1-mode"); 277 int ret = gpio_request(USBH1_MODE, "usbh1-mode");
278 if (ret) 278 if (ret)
@@ -291,7 +291,7 @@ static int marxbot_isp1105_init(struct otg_transceiver *otg)
291} 291}
292 292
293 293
294static int marxbot_isp1105_set_vbus(struct otg_transceiver *otg, bool on) 294static int marxbot_isp1105_set_vbus(struct usb_otg *otg, bool on)
295{ 295{
296 if (on) 296 if (on)
297 gpio_set_value(USBH1_VBUSEN_B, 0); 297 gpio_set_value(USBH1_VBUSEN_B, 0);
@@ -308,18 +308,24 @@ static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
308 308
309static int __init marxbot_usbh1_init(void) 309static int __init marxbot_usbh1_init(void)
310{ 310{
311 struct otg_transceiver *otg; 311 struct usb_phy *phy;
312 struct platform_device *pdev; 312 struct platform_device *pdev;
313 313
314 otg = kzalloc(sizeof(*otg), GFP_KERNEL); 314 phy = kzalloc(sizeof(*phy), GFP_KERNEL);
315 if (!otg) 315 if (!phy)
316 return -ENOMEM; 316 return -ENOMEM;
317 317
318 otg->label = "ISP1105"; 318 phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
319 otg->init = marxbot_isp1105_init; 319 if (!phy->otg) {
320 otg->set_vbus = marxbot_isp1105_set_vbus; 320 kfree(phy);
321 return -ENOMEM;
322 }
323
324 phy->label = "ISP1105";
325 phy->init = marxbot_isp1105_init;
326 phy->otg->set_vbus = marxbot_isp1105_set_vbus;
321 327
322 usbh1_pdata.otg = otg; 328 usbh1_pdata.otg = phy;
323 329
324 pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata); 330 pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
325 if (IS_ERR(pdev)) 331 if (IS_ERR(pdev))
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-22 07:22:48 -0400