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Diffstat (limited to 'arch/arm/boot/dts/imx6q.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi88
1 files changed, 44 insertions, 44 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 1565aea59eb..6dfeaedef30 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -108,7 +108,7 @@
108 clocks = <&clks 106>; 108 clocks = <&clks 106>;
109 }; 109 };
110 110
111 gpmi-nand@00112000 { 111 nfc: gpmi-nand@00112000 {
112 compatible = "fsl,imx6q-gpmi-nand"; 112 compatible = "fsl,imx6q-gpmi-nand";
113 #address-cells = <1>; 113 #address-cells = <1>;
114 #size-cells = <1>; 114 #size-cells = <1>;
@@ -152,12 +152,12 @@
152 reg = <0x02000000 0x40000>; 152 reg = <0x02000000 0x40000>;
153 ranges; 153 ranges;
154 154
155 spdif@02004000 { 155 spdif: spdif@02004000 {
156 reg = <0x02004000 0x4000>; 156 reg = <0x02004000 0x4000>;
157 interrupts = <0 52 0x04>; 157 interrupts = <0 52 0x04>;
158 }; 158 };
159 159
160 ecspi@02008000 { /* eCSPI1 */ 160 ecspi1: ecspi@02008000 {
161 #address-cells = <1>; 161 #address-cells = <1>;
162 #size-cells = <0>; 162 #size-cells = <0>;
163 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 163 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -168,7 +168,7 @@
168 status = "disabled"; 168 status = "disabled";
169 }; 169 };
170 170
171 ecspi@0200c000 { /* eCSPI2 */ 171 ecspi2: ecspi@0200c000 {
172 #address-cells = <1>; 172 #address-cells = <1>;
173 #size-cells = <0>; 173 #size-cells = <0>;
174 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 174 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -179,7 +179,7 @@
179 status = "disabled"; 179 status = "disabled";
180 }; 180 };
181 181
182 ecspi@02010000 { /* eCSPI3 */ 182 ecspi3: ecspi@02010000 {
183 #address-cells = <1>; 183 #address-cells = <1>;
184 #size-cells = <0>; 184 #size-cells = <0>;
185 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 185 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -190,7 +190,7 @@
190 status = "disabled"; 190 status = "disabled";
191 }; 191 };
192 192
193 ecspi@02014000 { /* eCSPI4 */ 193 ecspi4: ecspi@02014000 {
194 #address-cells = <1>; 194 #address-cells = <1>;
195 #size-cells = <0>; 195 #size-cells = <0>;
196 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 196 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -201,7 +201,7 @@
201 status = "disabled"; 201 status = "disabled";
202 }; 202 };
203 203
204 ecspi@02018000 { /* eCSPI5 */ 204 ecspi5: ecspi@02018000 {
205 #address-cells = <1>; 205 #address-cells = <1>;
206 #size-cells = <0>; 206 #size-cells = <0>;
207 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 207 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -221,7 +221,7 @@
221 status = "disabled"; 221 status = "disabled";
222 }; 222 };
223 223
224 esai@02024000 { 224 esai: esai@02024000 {
225 reg = <0x02024000 0x4000>; 225 reg = <0x02024000 0x4000>;
226 interrupts = <0 51 0x04>; 226 interrupts = <0 51 0x04>;
227 }; 227 };
@@ -256,7 +256,7 @@
256 status = "disabled"; 256 status = "disabled";
257 }; 257 };
258 258
259 asrc@02034000 { 259 asrc: asrc@02034000 {
260 reg = <0x02034000 0x4000>; 260 reg = <0x02034000 0x4000>;
261 interrupts = <0 50 0x04>; 261 interrupts = <0 50 0x04>;
262 }; 262 };
@@ -266,7 +266,7 @@
266 }; 266 };
267 }; 267 };
268 268
269 vpu@02040000 { 269 vpu: vpu@02040000 {
270 reg = <0x02040000 0x3c000>; 270 reg = <0x02040000 0x3c000>;
271 interrupts = <0 3 0x04 0 12 0x04>; 271 interrupts = <0 3 0x04 0 12 0x04>;
272 }; 272 };
@@ -275,37 +275,37 @@
275 reg = <0x0207c000 0x4000>; 275 reg = <0x0207c000 0x4000>;
276 }; 276 };
277 277
278 pwm@02080000 { /* PWM1 */ 278 pwm1: pwm@02080000 {
279 reg = <0x02080000 0x4000>; 279 reg = <0x02080000 0x4000>;
280 interrupts = <0 83 0x04>; 280 interrupts = <0 83 0x04>;
281 }; 281 };
282 282
283 pwm@02084000 { /* PWM2 */ 283 pwm2: pwm@02084000 {
284 reg = <0x02084000 0x4000>; 284 reg = <0x02084000 0x4000>;
285 interrupts = <0 84 0x04>; 285 interrupts = <0 84 0x04>;
286 }; 286 };
287 287
288 pwm@02088000 { /* PWM3 */ 288 pwm3: pwm@02088000 {
289 reg = <0x02088000 0x4000>; 289 reg = <0x02088000 0x4000>;
290 interrupts = <0 85 0x04>; 290 interrupts = <0 85 0x04>;
291 }; 291 };
292 292
293 pwm@0208c000 { /* PWM4 */ 293 pwm4: pwm@0208c000 {
294 reg = <0x0208c000 0x4000>; 294 reg = <0x0208c000 0x4000>;
295 interrupts = <0 86 0x04>; 295 interrupts = <0 86 0x04>;
296 }; 296 };
297 297
298 flexcan@02090000 { /* CAN1 */ 298 can1: flexcan@02090000 {
299 reg = <0x02090000 0x4000>; 299 reg = <0x02090000 0x4000>;
300 interrupts = <0 110 0x04>; 300 interrupts = <0 110 0x04>;
301 }; 301 };
302 302
303 flexcan@02094000 { /* CAN2 */ 303 can2: flexcan@02094000 {
304 reg = <0x02094000 0x4000>; 304 reg = <0x02094000 0x4000>;
305 interrupts = <0 111 0x04>; 305 interrupts = <0 111 0x04>;
306 }; 306 };
307 307
308 gpt@02098000 { 308 gpt: gpt@02098000 {
309 compatible = "fsl,imx6q-gpt"; 309 compatible = "fsl,imx6q-gpt";
310 reg = <0x02098000 0x4000>; 310 reg = <0x02098000 0x4000>;
311 interrupts = <0 55 0x04>; 311 interrupts = <0 55 0x04>;
@@ -381,19 +381,19 @@
381 #interrupt-cells = <2>; 381 #interrupt-cells = <2>;
382 }; 382 };
383 383
384 kpp@020b8000 { 384 kpp: kpp@020b8000 {
385 reg = <0x020b8000 0x4000>; 385 reg = <0x020b8000 0x4000>;
386 interrupts = <0 82 0x04>; 386 interrupts = <0 82 0x04>;
387 }; 387 };
388 388
389 wdog@020bc000 { /* WDOG1 */ 389 wdog1: wdog@020bc000 {
390 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; 390 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
391 reg = <0x020bc000 0x4000>; 391 reg = <0x020bc000 0x4000>;
392 interrupts = <0 80 0x04>; 392 interrupts = <0 80 0x04>;
393 clocks = <&clks 0>; 393 clocks = <&clks 0>;
394 }; 394 };
395 395
396 wdog@020c0000 { /* WDOG2 */ 396 wdog2: wdog@020c0000 {
397 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; 397 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
398 reg = <0x020c0000 0x4000>; 398 reg = <0x020c0000 0x4000>;
399 interrupts = <0 81 0x04>; 399 interrupts = <0 81 0x04>;
@@ -525,23 +525,23 @@
525 }; 525 };
526 }; 526 };
527 527
528 epit@020d0000 { /* EPIT1 */ 528 epit1: epit@020d0000 { /* EPIT1 */
529 reg = <0x020d0000 0x4000>; 529 reg = <0x020d0000 0x4000>;
530 interrupts = <0 56 0x04>; 530 interrupts = <0 56 0x04>;
531 }; 531 };
532 532
533 epit@020d4000 { /* EPIT2 */ 533 epit2: epit@020d4000 { /* EPIT2 */
534 reg = <0x020d4000 0x4000>; 534 reg = <0x020d4000 0x4000>;
535 interrupts = <0 57 0x04>; 535 interrupts = <0 57 0x04>;
536 }; 536 };
537 537
538 src@020d8000 { 538 src: src@020d8000 {
539 compatible = "fsl,imx6q-src"; 539 compatible = "fsl,imx6q-src";
540 reg = <0x020d8000 0x4000>; 540 reg = <0x020d8000 0x4000>;
541 interrupts = <0 91 0x04 0 96 0x04>; 541 interrupts = <0 91 0x04 0 96 0x04>;
542 }; 542 };
543 543
544 gpc@020dc000 { 544 gpc: gpc@020dc000 {
545 compatible = "fsl,imx6q-gpc"; 545 compatible = "fsl,imx6q-gpc";
546 reg = <0x020dc000 0x4000>; 546 reg = <0x020dc000 0x4000>;
547 interrupts = <0 89 0x04 0 90 0x04>; 547 interrupts = <0 89 0x04 0 90 0x04>;
@@ -552,7 +552,7 @@
552 reg = <0x020e0000 0x38>; 552 reg = <0x020e0000 0x38>;
553 }; 553 };
554 554
555 iomuxc@020e0000 { 555 iomuxc: iomuxc@020e0000 {
556 compatible = "fsl,imx6q-iomuxc"; 556 compatible = "fsl,imx6q-iomuxc";
557 reg = <0x020e0000 0x4000>; 557 reg = <0x020e0000 0x4000>;
558 558
@@ -764,17 +764,17 @@
764 }; 764 };
765 }; 765 };
766 766
767 dcic@020e4000 { /* DCIC1 */ 767 dcic1: dcic@020e4000 {
768 reg = <0x020e4000 0x4000>; 768 reg = <0x020e4000 0x4000>;
769 interrupts = <0 124 0x04>; 769 interrupts = <0 124 0x04>;
770 }; 770 };
771 771
772 dcic@020e8000 { /* DCIC2 */ 772 dcic2: dcic@020e8000 {
773 reg = <0x020e8000 0x4000>; 773 reg = <0x020e8000 0x4000>;
774 interrupts = <0 125 0x04>; 774 interrupts = <0 125 0x04>;
775 }; 775 };
776 776
777 sdma@020ec000 { 777 sdma: sdma@020ec000 {
778 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; 778 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
779 reg = <0x020ec000 0x4000>; 779 reg = <0x020ec000 0x4000>;
780 interrupts = <0 2 0x04>; 780 interrupts = <0 2 0x04>;
@@ -800,7 +800,7 @@
800 reg = <0x0217c000 0x4000>; 800 reg = <0x0217c000 0x4000>;
801 }; 801 };
802 802
803 usb@02184000 { /* USB OTG */ 803 usbotg: usb@02184000 {
804 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 804 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
805 reg = <0x02184000 0x200>; 805 reg = <0x02184000 0x200>;
806 interrupts = <0 43 0x04>; 806 interrupts = <0 43 0x04>;
@@ -810,7 +810,7 @@
810 status = "disabled"; 810 status = "disabled";
811 }; 811 };
812 812
813 usb@02184200 { /* USB1 */ 813 usbh1: usb@02184200 {
814 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 814 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
815 reg = <0x02184200 0x200>; 815 reg = <0x02184200 0x200>;
816 interrupts = <0 40 0x04>; 816 interrupts = <0 40 0x04>;
@@ -820,7 +820,7 @@
820 status = "disabled"; 820 status = "disabled";
821 }; 821 };
822 822
823 usb@02184400 { /* USB2 */ 823 usbh2: usb@02184400 {
824 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 824 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
825 reg = <0x02184400 0x200>; 825 reg = <0x02184400 0x200>;
826 interrupts = <0 41 0x04>; 826 interrupts = <0 41 0x04>;
@@ -829,7 +829,7 @@
829 status = "disabled"; 829 status = "disabled";
830 }; 830 };
831 831
832 usb@02184600 { /* USB3 */ 832 usbh3: usb@02184600 {
833 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 833 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
834 reg = <0x02184600 0x200>; 834 reg = <0x02184600 0x200>;
835 interrupts = <0 42 0x04>; 835 interrupts = <0 42 0x04>;
@@ -838,14 +838,14 @@
838 status = "disabled"; 838 status = "disabled";
839 }; 839 };
840 840
841 usbmisc: usbmisc@02184800 { 841 usbmisc: usbmisc: usbmisc@02184800 {
842 #index-cells = <1>; 842 #index-cells = <1>;
843 compatible = "fsl,imx6q-usbmisc"; 843 compatible = "fsl,imx6q-usbmisc";
844 reg = <0x02184800 0x200>; 844 reg = <0x02184800 0x200>;
845 clocks = <&clks 162>; 845 clocks = <&clks 162>;
846 }; 846 };
847 847
848 ethernet@02188000 { 848 fec: ethernet@02188000 {
849 compatible = "fsl,imx6q-fec"; 849 compatible = "fsl,imx6q-fec";
850 reg = <0x02188000 0x4000>; 850 reg = <0x02188000 0x4000>;
851 interrupts = <0 118 0x04 0 119 0x04>; 851 interrupts = <0 118 0x04 0 119 0x04>;
@@ -859,7 +859,7 @@
859 interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>; 859 interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>;
860 }; 860 };
861 861
862 usdhc@02190000 { /* uSDHC1 */ 862 usdhc1: usdhc@02190000 {
863 compatible = "fsl,imx6q-usdhc"; 863 compatible = "fsl,imx6q-usdhc";
864 reg = <0x02190000 0x4000>; 864 reg = <0x02190000 0x4000>;
865 interrupts = <0 22 0x04>; 865 interrupts = <0 22 0x04>;
@@ -869,7 +869,7 @@
869 status = "disabled"; 869 status = "disabled";
870 }; 870 };
871 871
872 usdhc@02194000 { /* uSDHC2 */ 872 usdhc2: usdhc@02194000 {
873 compatible = "fsl,imx6q-usdhc"; 873 compatible = "fsl,imx6q-usdhc";
874 reg = <0x02194000 0x4000>; 874 reg = <0x02194000 0x4000>;
875 interrupts = <0 23 0x04>; 875 interrupts = <0 23 0x04>;
@@ -879,7 +879,7 @@
879 status = "disabled"; 879 status = "disabled";
880 }; 880 };
881 881
882 usdhc@02198000 { /* uSDHC3 */ 882 usdhc3: usdhc@02198000 {
883 compatible = "fsl,imx6q-usdhc"; 883 compatible = "fsl,imx6q-usdhc";
884 reg = <0x02198000 0x4000>; 884 reg = <0x02198000 0x4000>;
885 interrupts = <0 24 0x04>; 885 interrupts = <0 24 0x04>;
@@ -889,7 +889,7 @@
889 status = "disabled"; 889 status = "disabled";
890 }; 890 };
891 891
892 usdhc@0219c000 { /* uSDHC4 */ 892 usdhc4: usdhc@0219c000 {
893 compatible = "fsl,imx6q-usdhc"; 893 compatible = "fsl,imx6q-usdhc";
894 reg = <0x0219c000 0x4000>; 894 reg = <0x0219c000 0x4000>;
895 interrupts = <0 25 0x04>; 895 interrupts = <0 25 0x04>;
@@ -899,7 +899,7 @@
899 status = "disabled"; 899 status = "disabled";
900 }; 900 };
901 901
902 i2c@021a0000 { /* I2C1 */ 902 i2c1: i2c@021a0000 {
903 #address-cells = <1>; 903 #address-cells = <1>;
904 #size-cells = <0>; 904 #size-cells = <0>;
905 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 905 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
@@ -909,7 +909,7 @@
909 status = "disabled"; 909 status = "disabled";
910 }; 910 };
911 911
912 i2c@021a4000 { /* I2C2 */ 912 i2c2: i2c@021a4000 {
913 #address-cells = <1>; 913 #address-cells = <1>;
914 #size-cells = <0>; 914 #size-cells = <0>;
915 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 915 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
@@ -919,7 +919,7 @@
919 status = "disabled"; 919 status = "disabled";
920 }; 920 };
921 921
922 i2c@021a8000 { /* I2C3 */ 922 i2c3: i2c@021a8000 {
923 #address-cells = <1>; 923 #address-cells = <1>;
924 #size-cells = <0>; 924 #size-cells = <0>;
925 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 925 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
@@ -933,12 +933,12 @@
933 reg = <0x021ac000 0x4000>; 933 reg = <0x021ac000 0x4000>;
934 }; 934 };
935 935
936 mmdc@021b0000 { /* MMDC0 */ 936 mmdc0: mmdc@021b0000 { /* MMDC0 */
937 compatible = "fsl,imx6q-mmdc"; 937 compatible = "fsl,imx6q-mmdc";
938 reg = <0x021b0000 0x4000>; 938 reg = <0x021b0000 0x4000>;
939 }; 939 };
940 940
941 mmdc@021b4000 { /* MMDC1 */ 941 mmdc1: mmdc@021b4000 { /* MMDC1 */
942 reg = <0x021b4000 0x4000>; 942 reg = <0x021b4000 0x4000>;
943 }; 943 };
944 944
@@ -966,7 +966,7 @@
966 interrupts = <0 109 0x04>; 966 interrupts = <0 109 0x04>;
967 }; 967 };
968 968
969 audmux@021d8000 { 969 audmux: audmux@021d8000 {
970 compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; 970 compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux";
971 reg = <0x021d8000 0x4000>; 971 reg = <0x021d8000 0x4000>;
972 status = "disabled"; 972 status = "disabled";