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-rw-r--r--Documentation/devicetree/bindings/staging/iio/adc/lpc32xx-adc.txt16
-rw-r--r--Documentation/devicetree/bindings/staging/iio/adc/mxs-lradc.txt15
-rw-r--r--Documentation/devicetree/bindings/staging/iio/adc/spear-adc.txt26
-rw-r--r--Documentation/devicetree/bindings/staging/imx-drm/fsl-imx-drm.txt41
4 files changed, 0 insertions, 98 deletions
diff --git a/Documentation/devicetree/bindings/staging/iio/adc/lpc32xx-adc.txt b/Documentation/devicetree/bindings/staging/iio/adc/lpc32xx-adc.txt
deleted file mode 100644
index b3629d3a9ad..00000000000
--- a/Documentation/devicetree/bindings/staging/iio/adc/lpc32xx-adc.txt
+++ /dev/null
@@ -1,16 +0,0 @@
1* NXP LPC32xx SoC ADC controller
2
3Required properties:
4- compatible: must be "nxp,lpc3220-adc"
5- reg: physical base address of the controller and length of memory mapped
6 region.
7- interrupts: The ADC interrupt
8
9Example:
10
11 adc@40048000 {
12 compatible = "nxp,lpc3220-adc";
13 reg = <0x40048000 0x1000>;
14 interrupt-parent = <&mic>;
15 interrupts = <39 0>;
16 };
diff --git a/Documentation/devicetree/bindings/staging/iio/adc/mxs-lradc.txt b/Documentation/devicetree/bindings/staging/iio/adc/mxs-lradc.txt
deleted file mode 100644
index 801d58cb6d4..00000000000
--- a/Documentation/devicetree/bindings/staging/iio/adc/mxs-lradc.txt
+++ /dev/null
@@ -1,15 +0,0 @@
1* Freescale i.MX28 LRADC device driver
2
3Required properties:
4- compatible: Should be "fsl,imx28-lradc"
5- reg: Address and length of the register set for the device
6- interrupts: Should contain the LRADC interrupts
7
8Examples:
9
10 lradc@80050000 {
11 compatible = "fsl,imx28-lradc";
12 reg = <0x80050000 0x2000>;
13 interrupts = <10 14 15 16 17 18 19
14 20 21 22 23 24 25>;
15 };
diff --git a/Documentation/devicetree/bindings/staging/iio/adc/spear-adc.txt b/Documentation/devicetree/bindings/staging/iio/adc/spear-adc.txt
deleted file mode 100644
index 02ea23a63f2..00000000000
--- a/Documentation/devicetree/bindings/staging/iio/adc/spear-adc.txt
+++ /dev/null
@@ -1,26 +0,0 @@
1* ST SPEAr ADC device driver
2
3Required properties:
4- compatible: Should be "st,spear600-adc"
5- reg: Address and length of the register set for the device
6- interrupt-parent: Should be the phandle for the interrupt controller
7 that services interrupts for this device
8- interrupts: Should contain the ADC interrupt
9- sampling-frequency: Default sampling frequency
10
11Optional properties:
12- vref-external: External voltage reference in milli-volts. If omitted
13 the internal voltage reference will be used.
14- average-samples: Number of samples to generate an average value. If
15 omitted, single data conversion will be used.
16
17Examples:
18
19 adc: adc@d8200000 {
20 compatible = "st,spear600-adc";
21 reg = <0xd8200000 0x1000>;
22 interrupt-parent = <&vic1>;
23 interrupts = <6>;
24 sampling-frequency = <5000000>;
25 vref-external = <2500>; /* 2.5V VRef */
26 };
diff --git a/Documentation/devicetree/bindings/staging/imx-drm/fsl-imx-drm.txt b/Documentation/devicetree/bindings/staging/imx-drm/fsl-imx-drm.txt
deleted file mode 100644
index 07654f0338b..00000000000
--- a/Documentation/devicetree/bindings/staging/imx-drm/fsl-imx-drm.txt
+++ /dev/null
@@ -1,41 +0,0 @@
1Freescale i.MX IPUv3
2====================
3
4Required properties:
5- compatible: Should be "fsl,<chip>-ipu"
6- reg: should be register base and length as documented in the
7 datasheet
8- interrupts: Should contain sync interrupt and error interrupt,
9 in this order.
10- #crtc-cells: 1, See below
11
12example:
13
14ipu: ipu@18000000 {
15 #crtc-cells = <1>;
16 compatible = "fsl,imx53-ipu";
17 reg = <0x18000000 0x080000000>;
18 interrupts = <11 10>;
19};
20
21Parallel display support
22========================
23
24Required properties:
25- compatible: Should be "fsl,imx-parallel-display"
26- crtc: the crtc this display is connected to, see below
27Optional properties:
28- interface_pix_fmt: How this display is connected to the
29 crtc. Currently supported types: "rgb24", "rgb565"
30- edid: verbatim EDID data block describing attached display.
31- ddc: phandle describing the i2c bus handling the display data
32 channel
33
34example:
35
36display@di0 {
37 compatible = "fsl,imx-parallel-display";
38 edid = [edid-data];
39 crtc = <&ipu 0>;
40 interface-pix-fmt = "rgb24";
41};