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1 | * Samsung's SDHCI Controller device tree bindings | ||
2 | |||
3 | Samsung's SDHCI controller is used as a connectivity interface with external | ||
4 | MMC, SD and eMMC storage mediums. This file documents differences between the | ||
5 | core mmc properties described by mmc.txt and the properties used by the | ||
6 | Samsung implmentation of the SDHCI controller. | ||
7 | |||
8 | Note: The mmc core bindings documentation states that if none of the core | ||
9 | card-detect bindings are used, then the standard sdhci card detect mechanism | ||
10 | is used. The Samsung's SDHCI controller bindings extends this as listed below. | ||
11 | |||
12 | [A] The property "samsung,cd-pinmux-gpio" can be used as stated in the | ||
13 | "Optional Board Specific Properties" section below. | ||
14 | |||
15 | Required SoC Specific Properties: | ||
16 | - compatible: should be one of the following | ||
17 | - "samsung,s3c6410-sdhci": For controllers compatible with s3c6410 sdhci | ||
18 | controller. | ||
19 | - "samsung,exynos4210-sdhci": For controllers compatible with Exynos4 sdhci | ||
20 | controller. | ||
21 | |||
22 | Required Board Specific Properties: | ||
23 | - Samsung GPIO variant (will be completely replaced by pinctrl): | ||
24 | - gpios: Should specify the gpios used for clock, command and data lines. The | ||
25 | gpio specifier format depends on the gpio controller. | ||
26 | - Pinctrl variant (preferred if available): | ||
27 | - pinctrl-0: Should specify pin control groups used for this controller. | ||
28 | - pinctrl-names: Should contain only one value - "default". | ||
29 | |||
30 | Optional Board Specific Properties: | ||
31 | - samsung,cd-pinmux-gpio: Specifies the card detect line that is routed | ||
32 | through a pinmux to the card-detect pin of the card slot. This property | ||
33 | should be used only if none of the mmc core card-detect properties are | ||
34 | used. Only for Samsung GPIO variant. | ||
35 | |||
36 | Example: | ||
37 | sdhci@12530000 { | ||
38 | compatible = "samsung,exynos4210-sdhci"; | ||
39 | reg = <0x12530000 0x100>; | ||
40 | interrupts = <0 75 0>; | ||
41 | bus-width = <4>; | ||
42 | cd-gpios = <&gpk2 2 2 3 3>; | ||
43 | |||
44 | /* Samsung GPIO variant */ | ||
45 | gpios = <&gpk2 0 2 0 3>, /* clock line */ | ||
46 | <&gpk2 1 2 0 3>, /* command line */ | ||
47 | <&gpk2 3 2 3 3>, /* data line 0 */ | ||
48 | <&gpk2 4 2 3 3>, /* data line 1 */ | ||
49 | <&gpk2 5 2 3 3>, /* data line 2 */ | ||
50 | <&gpk2 6 2 3 3>; /* data line 3 */ | ||
51 | |||
52 | /* Pinctrl variant */ | ||
53 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4>; | ||
54 | pinctrl-names = "default"; | ||
55 | }; | ||
56 | |||
57 | Note: This example shows both SoC specific and board specific properties | ||
58 | in a single device node. The properties can be actually be seperated | ||
59 | into SoC specific node and board specific node. | ||