5 files changed, 488 insertions, 2 deletions

diff --git a/Documentation/arm/Booting b/Documentation/arm/Booting
index 4e686a2ed91..a341d87d276 100644
--- a/Documentation/arm/Booting
+++ b/Documentation/arm/Booting
@@ -164,3 +164,8 @@ In either case, the following conditions must be met:
 - The boot loader is expected to call the kernel image by jumping
   directly to the first instruction of the kernel image.
 
+  On CPUs supporting the ARM instruction set, the entry must be
+  made in ARM state, even for a Thumb-2 kernel.
+
+  On CPUs supporting only the Thumb instruction set such as
+  Cortex-M class CPUs, the entry must be made in Thumb state.
diff --git a/Documentation/arm/SH-Mobile/zboot-rom-sdhi.txt b/Documentation/arm/SH-Mobile/zboot-rom-sdhi.txt
new file mode 100644
index 00000000000..441959846e1
--- /dev/null
+++ b/Documentation/arm/SH-Mobile/zboot-rom-sdhi.txt
@@ -0,0 +1,42 @@
+ROM-able zImage boot from eSD
+-----------------------------
+
+An ROM-able zImage compiled with ZBOOT_ROM_SDHI may be written to eSD and
+SuperH Mobile ARM will to boot directly from the SDHI hardware block.
+
+This is achieved by the mask ROM loading the first portion of the image into
+MERAM and then jumping to it. This portion contains loader code which
+copies the entire image to SDRAM and jumps to it. From there the zImage
+boot code proceeds as normal, uncompressing the image into its final
+location and then jumping to it.
+
+This code has been tested on an mackerel board using the developer 1A eSD
+boot mode which is configured using the following jumper settings.
+
+   8 7 6 5 4 3 2 1
+   x|x|x|x| |x|x|
+S4 -+-+-+-+-+-+-+-
+    | | | |x| | |x on
+
+The eSD card needs to be present in SDHI slot 1 (CN7).
+As such S1 and S33 also need to be configured as per
+the notes in arch/arm/mach-shmobile/board-mackerel.c.
+
+A partial zImage must be written to physical partition #1 (boot)
+of the eSD at sector 0 in vrl4 format. A utility vrl4 is supplied to
+accomplish this.
+
+e.g.
+        vrl4 < zImage | dd of=/dev/sdX bs=512 count=17
+
+A full copy of _the same_ zImage should be written to physical partition #1
+(boot) of the eSD at sector 0. This should _not_ be in vrl4 format.
+
+        vrl4 < zImage | dd of=/dev/sdX bs=512
+
+Note: The commands above assume that the physical partition has been
+switched. No such facility currently exists in the Linux Kernel.
+
+Physical partitions are described in the eSD specification.  At the time of
+writing they are not the same as partitions that are typically configured
+using fdisk and visible through /proc/partitions
diff --git a/Documentation/arm/Samsung-S3C24XX/Overview.txt b/Documentation/arm/Samsung-S3C24XX/Overview.txt
index c12bfc1a00c..359587b2367 100644
--- a/Documentation/arm/Samsung-S3C24XX/Overview.txt
+++ b/Documentation/arm/Samsung-S3C24XX/Overview.txt
@@ -8,10 +8,13 @@ Introduction
 
   The Samsung S3C24XX range of ARM9 System-on-Chip CPUs are supported
   by the 's3c2410' architecture of ARM Linux. Currently the S3C2410,
-  S3C2412, S3C2413, S3C2416 S3C2440, S3C2442, S3C2443 and S3C2450 devices
+  S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443 and S3C2450 devices
   are supported.
 
-  Support for the S3C2400 and S3C24A0 series are in progress.
+  Support for the S3C2400 and S3C24A0 series was never completed and the
+  corresponding code has been removed after a while.  If someone wishes to
+  revive this effort, partial support can be retrieved from earlier Linux
+  versions.
 
   The S3C2416 and S3C2450 devices are very similar and S3C2450 support is
   included under the arch/arm/mach-s3c2416 directory. Note, whilst core
diff --git a/Documentation/arm/kernel_user_helpers.txt b/Documentation/arm/kernel_user_helpers.txt
new file mode 100644
index 00000000000..a17df9f91d1
--- /dev/null
+++ b/Documentation/arm/kernel_user_helpers.txt
@@ -0,0 +1,267 @@
+Kernel-provided User Helpers
+============================
+
+These are segment of kernel provided user code reachable from user space
+at a fixed address in kernel memory.  This is used to provide user space
+with some operations which require kernel help because of unimplemented
+native feature and/or instructions in many ARM CPUs. The idea is for this
+code to be executed directly in user mode for best efficiency but which is
+too intimate with the kernel counter part to be left to user libraries.
+In fact this code might even differ from one CPU to another depending on
+the available instruction set, or whether it is a SMP systems. In other
+words, the kernel reserves the right to change this code as needed without
+warning. Only the entry points and their results as documented here are
+guaranteed to be stable.
+
+This is different from (but doesn't preclude) a full blown VDSO
+implementation, however a VDSO would prevent some assembly tricks with
+constants that allows for efficient branching to those code segments. And
+since those code segments only use a few cycles before returning to user
+code, the overhead of a VDSO indirect far call would add a measurable
+overhead to such minimalistic operations.
+
+User space is expected to bypass those helpers and implement those things
+inline (either in the code emitted directly by the compiler, or part of
+the implementation of a library call) when optimizing for a recent enough
+processor that has the necessary native support, but only if resulting
+binaries are already to be incompatible with earlier ARM processors due to
+useage of similar native instructions for other things.  In other words
+don't make binaries unable to run on earlier processors just for the sake
+of not using these kernel helpers if your compiled code is not going to
+use new instructions for other purpose.
+
+New helpers may be added over time, so an older kernel may be missing some
+helpers present in a newer kernel.  For this reason, programs must check
+the value of __kuser_helper_version (see below) before assuming that it is
+safe to call any particular helper.  This check should ideally be
+performed only once at process startup time, and execution aborted early
+if the required helpers are not provided by the kernel version that
+process is running on.
+
+kuser_helper_version
+--------------------
+
+Location:       0xffff0ffc
+
+Reference declaration:
+
+  extern int32_t __kuser_helper_version;
+
+Definition:
+
+  This field contains the number of helpers being implemented by the
+  running kernel.  User space may read this to determine the availability
+  of a particular helper.
+
+Usage example:
+
+#define __kuser_helper_version (*(int32_t *)0xffff0ffc)
+
+void check_kuser_version(void)
+{
+        if (__kuser_helper_version < 2) {
+                fprintf(stderr, "can't do atomic operations, kernel too old\n");
+                abort();
+        }
+}
+
+Notes:
+
+  User space may assume that the value of this field never changes
+  during the lifetime of any single process.  This means that this
+  field can be read once during the initialisation of a library or
+  startup phase of a program.
+
+kuser_get_tls
+-------------
+
+Location:       0xffff0fe0
+
+Reference prototype:
+
+  void * __kuser_get_tls(void);
+
+Input:
+
+  lr = return address
+
+Output:
+
+  r0 = TLS value
+
+Clobbered registers:
+
+  none
+
+Definition:
+
+  Get the TLS value as previously set via the __ARM_NR_set_tls syscall.
+
+Usage example:
+
+typedef void * (__kuser_get_tls_t)(void);
+#define __kuser_get_tls (*(__kuser_get_tls_t *)0xffff0fe0)
+
+void foo()
+{
+        void *tls = __kuser_get_tls();
+        printf("TLS = %p\n", tls);
+}
+
+Notes:
+
+  - Valid only if __kuser_helper_version >= 1 (from kernel version 2.6.12).
+
+kuser_cmpxchg
+-------------
+
+Location:       0xffff0fc0
+
+Reference prototype:
+
+  int __kuser_cmpxchg(int32_t oldval, int32_t newval, volatile int32_t *ptr);
+
+Input:
+
+  r0 = oldval
+  r1 = newval
+  r2 = ptr
+  lr = return address
+
+Output:
+
+  r0 = success code (zero or non-zero)
+  C flag = set if r0 == 0, clear if r0 != 0
+
+Clobbered registers:
+
+  r3, ip, flags
+
+Definition:
+
+  Atomically store newval in *ptr only if *ptr is equal to oldval.
+  Return zero if *ptr was changed or non-zero if no exchange happened.
+  The C flag is also set if *ptr was changed to allow for assembly
+  optimization in the calling code.
+
+Usage example:
+
+typedef int (__kuser_cmpxchg_t)(int oldval, int newval, volatile int *ptr);
+#define __kuser_cmpxchg (*(__kuser_cmpxchg_t *)0xffff0fc0)
+
+int atomic_add(volatile int *ptr, int val)
+{
+        int old, new;
+
+        do {
+                old = *ptr;
+                new = old + val;
+        } while(__kuser_cmpxchg(old, new, ptr));
+
+        return new;
+}
+
+Notes:
+
+  - This routine already includes memory barriers as needed.
+
+  - Valid only if __kuser_helper_version >= 2 (from kernel version 2.6.12).
+
+kuser_memory_barrier
+--------------------
+
+Location:       0xffff0fa0
+
+Reference prototype:
+
+  void __kuser_memory_barrier(void);
+
+Input:
+
+  lr = return address
+
+Output:
+
+  none
+
+Clobbered registers:
+
+  none
+
+Definition:
+
+  Apply any needed memory barrier to preserve consistency with data modified
+  manually and __kuser_cmpxchg usage.
+
+Usage example:
+
+typedef void (__kuser_dmb_t)(void);
+#define __kuser_dmb (*(__kuser_dmb_t *)0xffff0fa0)
+
+Notes:
+
+  - Valid only if __kuser_helper_version >= 3 (from kernel version 2.6.15).
+
+kuser_cmpxchg64
+---------------
+
+Location:       0xffff0f60
+
+Reference prototype:
+
+  int __kuser_cmpxchg64(const int64_t *oldval,
+                        const int64_t *newval,
+                        volatile int64_t *ptr);
+
+Input:
+
+  r0 = pointer to oldval
+  r1 = pointer to newval
+  r2 = pointer to target value
+  lr = return address
+
+Output:
+
+  r0 = success code (zero or non-zero)
+  C flag = set if r0 == 0, clear if r0 != 0
+
+Clobbered registers:
+
+  r3, lr, flags
+
+Definition:
+
+  Atomically store the 64-bit value pointed by *newval in *ptr only if *ptr
+  is equal to the 64-bit value pointed by *oldval.  Return zero if *ptr was
+  changed or non-zero if no exchange happened.
+
+  The C flag is also set if *ptr was changed to allow for assembly
+  optimization in the calling code.
+
+Usage example:
+
+typedef int (__kuser_cmpxchg64_t)(const int64_t *oldval,
+                                  const int64_t *newval,
+                                  volatile int64_t *ptr);
+#define __kuser_cmpxchg64 (*(__kuser_cmpxchg64_t *)0xffff0f60)
+
+int64_t atomic_add64(volatile int64_t *ptr, int64_t val)
+{
+        int64_t old, new;
+
+        do {
+                old = *ptr;
+                new = old + val;
+        } while(__kuser_cmpxchg64(&old, &new, ptr));
+
+        return new;
+}
+
+Notes:
+
+  - This routine already includes memory barriers as needed.
+
+  - Due to the length of this sequence, this spans 2 conventional kuser
+    "slots", therefore 0xffff0f80 is not used as a valid entry point.
+
+  - Valid only if __kuser_helper_version >= 5 (from kernel version 3.1).
diff --git a/Documentation/arm/nvidia/tegra_parameters.txt b/Documentation/arm/nvidia/tegra_parameters.txt
new file mode 100644
index 00000000000..4c73fe7269f
--- /dev/null
+++ b/Documentation/arm/nvidia/tegra_parameters.txt
@@ -0,0 +1,169 @@
+This file documents NVIDIA Tegra specific sysfs and debugfs files and
+kernel module parameters.
+
+/sys/power/suspend/mode
+-----------------------
+
+Used to select the LP1 or LP0 power state during system suspend.
+# echo lp0 > /sys/kernel/debug/suspend_mode
+# echo lp1 > /sys/kernel/debug/suspend_mode
+
+/sys/module/cpuidle/parameters/lp2_in_idle
+------------------------------------------
+
+Used to enable/disable LP2 in idle.
+# echo 1 > /sys/module/cpuidle/parameters/lp2_in_idle
+# echo 0 > /sys/module/cpuidle/parameters/lp2_in_idle
+
+/sys/kernel/debug/cpuidle/lp2
+-----------------------------
+
+Contains LP2 statistics.
+# cat /sys/kernel/debug/cpuidle/lp2
+
+/sys/kernel/debug/powergate
+---------------------------
+
+Contains power gating state of different tegra blocks.
+
+# cat /sys/kernel/debug/powergate
+
+/sys/module/cpu_tegra3/parameters/auto_hotplug
+----------------------------------------------
+
+Used to control auto hotplug governor
+# echo 0 >/sys/module/cpu_tegra3/parameters/auto_hotplug
+# echo 1 >/sys/module/cpu_tegra3/parameters/auto_hotplug
+# cat /sys/module/cpu_tegra3/parameters/auto_hotplug
+0: disabled
+1: idle
+2: down
+3: up
+
+/sys/module/cpu_tegra3/parameters/no_lp
+---------------------------------------
+
+Used to enable/disable shadow cluster.
+# echo 0 >/sys/module/cpu_tegra3/parameters/no_lp
+# echo 1 >/sys/module/cpu_tegra3/parameters/no_lp
+
+/sys/module/cpu_tegra3/parameters/idle_bottom_freq
+--------------------------------------------------
+
+Shadow cluster maximum frequency.
+
+/sys/module/cpu_tegra3/parameters/idle_top_freq
+-----------------------------------------------
+
+Main cluster minimum frequency.
+
+/sys/module/cpu_tegra3/parameters/down_delay
+---------------------------------------------
+
+Auto hotplug delay (in jiffies) for reducing cores.
+
+/sys/module/cpu_tegra3/parameters/up2g0_delay
+---------------------------------------------
+
+Delay (in jiffies) for swithing to main cluster.
+
+/sys/module/cpu_tegra3/parameters/up2gn_delay
+---------------------------------------------
+
+Delay (in jiffies) for bringing additional cores online in main
+cluster.
+
+/sys/module/cpu_tegra3/parameters/balance_level
+-----------------------------------------------
+
+Percentage of max speed considered to be in balance. Half of balanced
+speed is considered skewed. Speed balance states:
+* balanced: freq targets for all CPUs are above 50% of highest speed
+* biased: freq target for at least one CPU is below 50% threshold
+* skewed: freq targets for at least 2 CPUs are below 25% threshold
+Speed balance state and hotplug state dictates auto hotlug behavior.
+
+/sys/module/cpu_tegra3/parameters/mp_overhead
+---------------------------------------------
+
+Multi-core overhead percentage for EDP limit calculation.
+
+/sys/kernel/debug/tegra_hotplug/stats
+-------------------------------------
+
+Contains hotplug statistics.
+
+/sys/kernel/cluster/active
+--------------------------
+
+Controls active CPU cluster: main (G) or shadow (LP).
+For manual control disable auto hotlug, enable immediate switch and
+possibly force switch to happen always:
+# echo 0 > /sys/module/cpu_tegra3/parameters/auto_hotplug
+# echo 1 > /sys/kernel/cluster/immediate
+# echo 1 > /sys/kernel/cluster/force
+
+Cluster switching can happen only when only core 0 is online.
+
+Active cluster can be set or toggled:
+# echo "G" > /sys/kernel/cluster/active
+# echo "LP" > /sys/kernel/cluster/active
+# echo "toggle" > /sys/kernel/cluster/active
+
+/sys/module/tegra3_clocks/parameters/detach_shared_bus
+------------------------------------------------------
+
+Enable/disable shared bus clock update.
+
+/sys/module/tegra3_emc/parameters/emc_enable
+--------------------------------------------
+
+Enable/disable EMC DFS.
+
+/sys/kernel/debug/tegra_emc/stats
+---------------------------------
+
+Contains EMC clock statistics.
+
+/sys/module/tegra3_dvfs/parameters/disable_cpu
+----------------------------------------------
+
+Enable/disable DVFS for CPU domain.
+
+/sys/module/tegra3_dvfs/parameters/disable_core
+-----------------------------------------------
+
+Enable/disable DVFS for CORE domain.
+
+/sys/kernel/debug/clock/emc/rate
+--------------------------------
+
+Get/set EMC clock rate.
+
+/sys/kernel/debug/clock/<module>/rate
+-------------------------------------
+
+/sys/kernel/debug/clock/<module>/parent
+---------------------------------------
+
+/sys/kernel/debug/clock/<module>/state
+--------------------------------------
+
+/sys/kernel/debug/clock/<module>/time_on
+----------------------------------------
+
+/sys/kernel/debug/clock/clock_tree
+----------------------------------
+
+Shows the state of the clock tree.
+
+/sys/kernel/debug/clock/dvfs
+----------------------------
+
+Contains voltage state.
+
+/sys/kernel/debug/tegra_actmon/avp/state
+----------------------------------------
+
+/sys/kernel/debug/clock/mon.avp/rate
+------------------------------------