diff options
-rw-r--r-- | drivers/mtd/nand/fsl_elbc_nand.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index acc27ee0474..eedd8ee2c9a 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c | |||
@@ -243,6 +243,25 @@ static int fsl_elbc_run_command(struct mtd_info *mtd) | |||
243 | return -EIO; | 243 | return -EIO; |
244 | } | 244 | } |
245 | 245 | ||
246 | if (chip->ecc.mode != NAND_ECC_HW) | ||
247 | return 0; | ||
248 | |||
249 | if (elbc_fcm_ctrl->read_bytes == mtd->writesize + mtd->oobsize) { | ||
250 | uint32_t lteccr = in_be32(&lbc->lteccr); | ||
251 | /* | ||
252 | * if command was a full page read and the ELBC | ||
253 | * has the LTECCR register, then bits 12-15 (ppc order) of | ||
254 | * LTECCR indicates which 512 byte sub-pages had fixed errors. | ||
255 | * bits 28-31 are uncorrectable errors, marked elsewhere. | ||
256 | * for small page nand only 1 bit is used. | ||
257 | * if the ELBC doesn't have the lteccr register it reads 0 | ||
258 | */ | ||
259 | if (lteccr & 0x000F000F) | ||
260 | out_be32(&lbc->lteccr, 0x000F000F); /* clear lteccr */ | ||
261 | if (lteccr & 0x000F0000) | ||
262 | mtd->ecc_stats.corrected++; | ||
263 | } | ||
264 | |||
246 | return 0; | 265 | return 0; |
247 | } | 266 | } |
248 | 267 | ||