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-rw-r--r--include/sound/max98095.h28
-rw-r--r--sound/soc/codecs/max98095.c391
-rw-r--r--sound/soc/codecs/max98095.h15
3 files changed, 434 insertions, 0 deletions
diff --git a/include/sound/max98095.h b/include/sound/max98095.h
index 3381765b503..7513a42dd4a 100644
--- a/include/sound/max98095.h
+++ b/include/sound/max98095.h
@@ -13,8 +13,36 @@
13#ifndef __SOUND_MAX98095_PDATA_H__ 13#ifndef __SOUND_MAX98095_PDATA_H__
14#define __SOUND_MAX98095_PDATA_H__ 14#define __SOUND_MAX98095_PDATA_H__
15 15
16/* Equalizer filter response configuration */
17struct max98095_eq_cfg {
18 const char *name;
19 unsigned int rate;
20 u16 band1[5];
21 u16 band2[5];
22 u16 band3[5];
23 u16 band4[5];
24 u16 band5[5];
25};
26
27/* Biquad filter response configuration */
28struct max98095_biquad_cfg {
29 const char *name;
30 unsigned int rate;
31 u16 band1[5];
32 u16 band2[5];
33};
34
16/* codec platform data */ 35/* codec platform data */
17struct max98095_pdata { 36struct max98095_pdata {
37
38 /* Equalizers for DAI1 and DAI2 */
39 struct max98095_eq_cfg *eq_cfg;
40 unsigned int eq_cfgcnt;
41
42 /* Biquad filter for DAI1 and DAI2 */
43 struct max98095_biquad_cfg *bq_cfg;
44 unsigned int bq_cfgcnt;
45
18 /* Analog/digital microphone configuration: 46 /* Analog/digital microphone configuration:
19 * 0 = analog microphone input (normal setting) 47 * 0 = analog microphone input (normal setting)
20 * 1 = digital microphone input 48 * 1 = digital microphone input
diff --git a/sound/soc/codecs/max98095.c b/sound/soc/codecs/max98095.c
index 9c77f17a6af..a6cc94e1750 100644
--- a/sound/soc/codecs/max98095.c
+++ b/sound/soc/codecs/max98095.c
@@ -34,6 +34,8 @@ enum max98095_type {
34struct max98095_cdata { 34struct max98095_cdata {
35 unsigned int rate; 35 unsigned int rate;
36 unsigned int fmt; 36 unsigned int fmt;
37 int eq_sel;
38 int bq_sel;
37}; 39};
38 40
39struct max98095_priv { 41struct max98095_priv {
@@ -42,6 +44,12 @@ struct max98095_priv {
42 struct max98095_pdata *pdata; 44 struct max98095_pdata *pdata;
43 unsigned int sysclk; 45 unsigned int sysclk;
44 struct max98095_cdata dai[3]; 46 struct max98095_cdata dai[3];
47 const char **eq_texts;
48 const char **bq_texts;
49 struct soc_enum eq_enum;
50 struct soc_enum bq_enum;
51 int eq_textcnt;
52 int bq_textcnt;
45 u8 lin_state; 53 u8 lin_state;
46 unsigned int mic1pre; 54 unsigned int mic1pre;
47 unsigned int mic2pre; 55 unsigned int mic2pre;
@@ -602,6 +610,74 @@ static int max98095_volatile(struct snd_soc_codec *codec, unsigned int reg)
602 return 0; 610 return 0;
603} 611}
604 612
613/*
614 * Filter coefficients are in a separate register segment
615 * and they share the address space of the normal registers.
616 * The coefficient registers do not need or share the cache.
617 */
618static int max98095_hw_write(struct snd_soc_codec *codec, unsigned int reg,
619 unsigned int value)
620{
621 u8 data[2];
622
623 data[0] = reg;
624 data[1] = value;
625 if (codec->hw_write(codec->control_data, data, 2) == 2)
626 return 0;
627 else
628 return -EIO;
629}
630
631/*
632 * Load equalizer DSP coefficient configurations registers
633 */
634static void m98095_eq_band(struct snd_soc_codec *codec, unsigned int dai,
635 unsigned int band, u16 *coefs)
636{
637 unsigned int eq_reg;
638 unsigned int i;
639
640 BUG_ON(band > 4);
641 BUG_ON(dai > 1);
642
643 /* Load the base register address */
644 eq_reg = dai ? M98095_142_DAI2_EQ_BASE : M98095_110_DAI1_EQ_BASE;
645
646 /* Add the band address offset, note adjustment for word address */
647 eq_reg += band * (M98095_COEFS_PER_BAND << 1);
648
649 /* Step through the registers and coefs */
650 for (i = 0; i < M98095_COEFS_PER_BAND; i++) {
651 max98095_hw_write(codec, eq_reg++, M98095_BYTE1(coefs[i]));
652 max98095_hw_write(codec, eq_reg++, M98095_BYTE0(coefs[i]));
653 }
654}
655
656/*
657 * Load biquad filter coefficient configurations registers
658 */
659static void m98095_biquad_band(struct snd_soc_codec *codec, unsigned int dai,
660 unsigned int band, u16 *coefs)
661{
662 unsigned int bq_reg;
663 unsigned int i;
664
665 BUG_ON(band > 1);
666 BUG_ON(dai > 1);
667
668 /* Load the base register address */
669 bq_reg = dai ? M98095_17E_DAI2_BQ_BASE : M98095_174_DAI1_BQ_BASE;
670
671 /* Add the band address offset, note adjustment for word address */
672 bq_reg += band * (M98095_COEFS_PER_BAND << 1);
673
674 /* Step through the registers and coefs */
675 for (i = 0; i < M98095_COEFS_PER_BAND; i++) {
676 max98095_hw_write(codec, bq_reg++, M98095_BYTE1(coefs[i]));
677 max98095_hw_write(codec, bq_reg++, M98095_BYTE0(coefs[i]));
678 }
679}
680
605static const char * const max98095_fltr_mode[] = { "Voice", "Music" }; 681static const char * const max98095_fltr_mode[] = { "Voice", "Music" };
606static const struct soc_enum max98095_dai1_filter_mode_enum[] = { 682static const struct soc_enum max98095_dai1_filter_mode_enum[] = {
607 SOC_ENUM_SINGLE(M98095_02E_DAI1_FILTERS, 7, 2, max98095_fltr_mode), 683 SOC_ENUM_SINGLE(M98095_02E_DAI1_FILTERS, 7, 2, max98095_fltr_mode),
@@ -792,6 +868,12 @@ static const struct snd_kcontrol_new max98095_snd_controls[] = {
792 SOC_SINGLE_TLV("ADCR Boost Volume", M98095_05E_LVL_ADC_R, 4, 3, 0, 868 SOC_SINGLE_TLV("ADCR Boost Volume", M98095_05E_LVL_ADC_R, 4, 3, 0,
793 max98095_adcboost_tlv), 869 max98095_adcboost_tlv),
794 870
871 SOC_SINGLE("EQ1 Switch", M98095_088_CFG_LEVEL, 0, 1, 0),
872 SOC_SINGLE("EQ2 Switch", M98095_088_CFG_LEVEL, 1, 1, 0),
873
874 SOC_SINGLE("Biquad1 Switch", M98095_088_CFG_LEVEL, 2, 1, 0),
875 SOC_SINGLE("Biquad2 Switch", M98095_088_CFG_LEVEL, 3, 1, 0),
876
795 SOC_ENUM("DAI1 Filter Mode", max98095_dai1_filter_mode_enum), 877 SOC_ENUM("DAI1 Filter Mode", max98095_dai1_filter_mode_enum),
796 SOC_ENUM("DAI2 Filter Mode", max98095_dai2_filter_mode_enum), 878 SOC_ENUM("DAI2 Filter Mode", max98095_dai2_filter_mode_enum),
797 SOC_ENUM("DAI1 DAC Filter", max98095_dai1_dac_filter_enum), 879 SOC_ENUM("DAI1 DAC Filter", max98095_dai1_dac_filter_enum),
@@ -1766,6 +1848,299 @@ static struct snd_soc_dai_driver max98095_dai[] = {
1766 1848
1767}; 1849};
1768 1850
1851static int max98095_get_eq_channel(const char *name)
1852{
1853 if (strcmp(name, "EQ1 Mode") == 0)
1854 return 0;
1855 if (strcmp(name, "EQ2 Mode") == 0)
1856 return 1;
1857 return -EINVAL;
1858}
1859
1860static int max98095_put_eq_enum(struct snd_kcontrol *kcontrol,
1861 struct snd_ctl_elem_value *ucontrol)
1862{
1863 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1864 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
1865 struct max98095_pdata *pdata = max98095->pdata;
1866 int channel = max98095_get_eq_channel(kcontrol->id.name);
1867 struct max98095_cdata *cdata;
1868 int sel = ucontrol->value.integer.value[0];
1869 struct max98095_eq_cfg *coef_set;
1870 int fs, best, best_val, i;
1871 int regmask, regsave;
1872
1873 BUG_ON(channel > 1);
1874
1875 cdata = &max98095->dai[channel];
1876
1877 if (sel >= pdata->eq_cfgcnt)
1878 return -EINVAL;
1879
1880 cdata->eq_sel = sel;
1881
1882 if (!pdata || !max98095->eq_textcnt)
1883 return 0;
1884
1885 fs = cdata->rate;
1886
1887 /* Find the selected configuration with nearest sample rate */
1888 best = 0;
1889 best_val = INT_MAX;
1890 for (i = 0; i < pdata->eq_cfgcnt; i++) {
1891 if (strcmp(pdata->eq_cfg[i].name, max98095->eq_texts[sel]) == 0 &&
1892 abs(pdata->eq_cfg[i].rate - fs) < best_val) {
1893 best = i;
1894 best_val = abs(pdata->eq_cfg[i].rate - fs);
1895 }
1896 }
1897
1898 dev_dbg(codec->dev, "Selected %s/%dHz for %dHz sample rate\n",
1899 pdata->eq_cfg[best].name,
1900 pdata->eq_cfg[best].rate, fs);
1901
1902 coef_set = &pdata->eq_cfg[best];
1903
1904 regmask = (channel == 0) ? M98095_EQ1EN : M98095_EQ2EN;
1905
1906 /* Disable filter while configuring, and save current on/off state */
1907 regsave = snd_soc_read(codec, M98095_088_CFG_LEVEL);
1908 snd_soc_update_bits(codec, M98095_088_CFG_LEVEL, regmask, 0);
1909
1910 mutex_lock(&codec->mutex);
1911 snd_soc_update_bits(codec, M98095_00F_HOST_CFG, M98095_SEG, M98095_SEG);
1912 m98095_eq_band(codec, channel, 0, coef_set->band1);
1913 m98095_eq_band(codec, channel, 1, coef_set->band2);
1914 m98095_eq_band(codec, channel, 2, coef_set->band3);
1915 m98095_eq_band(codec, channel, 3, coef_set->band4);
1916 m98095_eq_band(codec, channel, 4, coef_set->band5);
1917 snd_soc_update_bits(codec, M98095_00F_HOST_CFG, M98095_SEG, 0);
1918 mutex_unlock(&codec->mutex);
1919
1920 /* Restore the original on/off state */
1921 snd_soc_update_bits(codec, M98095_088_CFG_LEVEL, regmask, regsave);
1922 return 0;
1923}
1924
1925static int max98095_get_eq_enum(struct snd_kcontrol *kcontrol,
1926 struct snd_ctl_elem_value *ucontrol)
1927{
1928 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1929 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
1930 int channel = max98095_get_eq_channel(kcontrol->id.name);
1931 struct max98095_cdata *cdata;
1932
1933 cdata = &max98095->dai[channel];
1934 ucontrol->value.enumerated.item[0] = cdata->eq_sel;
1935
1936 return 0;
1937}
1938
1939static void max98095_handle_eq_pdata(struct snd_soc_codec *codec)
1940{
1941 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
1942 struct max98095_pdata *pdata = max98095->pdata;
1943 struct max98095_eq_cfg *cfg;
1944 unsigned int cfgcnt;
1945 int i, j;
1946 const char **t;
1947 int ret;
1948
1949 struct snd_kcontrol_new controls[] = {
1950 SOC_ENUM_EXT("EQ1 Mode",
1951 max98095->eq_enum,
1952 max98095_get_eq_enum,
1953 max98095_put_eq_enum),
1954 SOC_ENUM_EXT("EQ2 Mode",
1955 max98095->eq_enum,
1956 max98095_get_eq_enum,
1957 max98095_put_eq_enum),
1958 };
1959
1960 cfg = pdata->eq_cfg;
1961 cfgcnt = pdata->eq_cfgcnt;
1962
1963 /* Setup an array of texts for the equalizer enum.
1964 * This is based on Mark Brown's equalizer driver code.
1965 */
1966 max98095->eq_textcnt = 0;
1967 max98095->eq_texts = NULL;
1968 for (i = 0; i < cfgcnt; i++) {
1969 for (j = 0; j < max98095->eq_textcnt; j++) {
1970 if (strcmp(cfg[i].name, max98095->eq_texts[j]) == 0)
1971 break;
1972 }
1973
1974 if (j != max98095->eq_textcnt)
1975 continue;
1976
1977 /* Expand the array */
1978 t = krealloc(max98095->eq_texts,
1979 sizeof(char *) * (max98095->eq_textcnt + 1),
1980 GFP_KERNEL);
1981 if (t == NULL)
1982 continue;
1983
1984 /* Store the new entry */
1985 t[max98095->eq_textcnt] = cfg[i].name;
1986 max98095->eq_textcnt++;
1987 max98095->eq_texts = t;
1988 }
1989
1990 /* Now point the soc_enum to .texts array items */
1991 max98095->eq_enum.texts = max98095->eq_texts;
1992 max98095->eq_enum.max = max98095->eq_textcnt;
1993
1994 ret = snd_soc_add_controls(codec, controls, ARRAY_SIZE(controls));
1995 if (ret != 0)
1996 dev_err(codec->dev, "Failed to add EQ control: %d\n", ret);
1997}
1998
1999static int max98095_get_bq_channel(const char *name)
2000{
2001 if (strcmp(name, "Biquad1 Mode") == 0)
2002 return 0;
2003 if (strcmp(name, "Biquad2 Mode") == 0)
2004 return 1;
2005 return -EINVAL;
2006}
2007
2008static int max98095_put_bq_enum(struct snd_kcontrol *kcontrol,
2009 struct snd_ctl_elem_value *ucontrol)
2010{
2011 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
2012 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
2013 struct max98095_pdata *pdata = max98095->pdata;
2014 int channel = max98095_get_bq_channel(kcontrol->id.name);
2015 struct max98095_cdata *cdata;
2016 int sel = ucontrol->value.integer.value[0];
2017 struct max98095_biquad_cfg *coef_set;
2018 int fs, best, best_val, i;
2019 int regmask, regsave;
2020
2021 BUG_ON(channel > 1);
2022
2023 cdata = &max98095->dai[channel];
2024
2025 if (sel >= pdata->bq_cfgcnt)
2026 return -EINVAL;
2027
2028 cdata->bq_sel = sel;
2029
2030 if (!pdata || !max98095->bq_textcnt)
2031 return 0;
2032
2033 fs = cdata->rate;
2034
2035 /* Find the selected configuration with nearest sample rate */
2036 best = 0;
2037 best_val = INT_MAX;
2038 for (i = 0; i < pdata->bq_cfgcnt; i++) {
2039 if (strcmp(pdata->bq_cfg[i].name, max98095->bq_texts[sel]) == 0 &&
2040 abs(pdata->bq_cfg[i].rate - fs) < best_val) {
2041 best = i;
2042 best_val = abs(pdata->bq_cfg[i].rate - fs);
2043 }
2044 }
2045
2046 dev_dbg(codec->dev, "Selected %s/%dHz for %dHz sample rate\n",
2047 pdata->bq_cfg[best].name,
2048 pdata->bq_cfg[best].rate, fs);
2049
2050 coef_set = &pdata->bq_cfg[best];
2051
2052 regmask = (channel == 0) ? M98095_BQ1EN : M98095_BQ2EN;
2053
2054 /* Disable filter while configuring, and save current on/off state */
2055 regsave = snd_soc_read(codec, M98095_088_CFG_LEVEL);
2056 snd_soc_update_bits(codec, M98095_088_CFG_LEVEL, regmask, 0);
2057
2058 mutex_lock(&codec->mutex);
2059 snd_soc_update_bits(codec, M98095_00F_HOST_CFG, M98095_SEG, M98095_SEG);
2060 m98095_biquad_band(codec, channel, 0, coef_set->band1);
2061 m98095_biquad_band(codec, channel, 1, coef_set->band2);
2062 snd_soc_update_bits(codec, M98095_00F_HOST_CFG, M98095_SEG, 0);
2063 mutex_unlock(&codec->mutex);
2064
2065 /* Restore the original on/off state */
2066 snd_soc_update_bits(codec, M98095_088_CFG_LEVEL, regmask, regsave);
2067 return 0;
2068}
2069
2070static int max98095_get_bq_enum(struct snd_kcontrol *kcontrol,
2071 struct snd_ctl_elem_value *ucontrol)
2072{
2073 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
2074 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
2075 int channel = max98095_get_bq_channel(kcontrol->id.name);
2076 struct max98095_cdata *cdata;
2077
2078 cdata = &max98095->dai[channel];
2079 ucontrol->value.enumerated.item[0] = cdata->bq_sel;
2080
2081 return 0;
2082}
2083
2084static void max98095_handle_bq_pdata(struct snd_soc_codec *codec)
2085{
2086 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
2087 struct max98095_pdata *pdata = max98095->pdata;
2088 struct max98095_biquad_cfg *cfg;
2089 unsigned int cfgcnt;
2090 int i, j;
2091 const char **t;
2092 int ret;
2093
2094 struct snd_kcontrol_new controls[] = {
2095 SOC_ENUM_EXT("Biquad1 Mode",
2096 max98095->bq_enum,
2097 max98095_get_bq_enum,
2098 max98095_put_bq_enum),
2099 SOC_ENUM_EXT("Biquad2 Mode",
2100 max98095->bq_enum,
2101 max98095_get_bq_enum,
2102 max98095_put_bq_enum),
2103 };
2104
2105 cfg = pdata->bq_cfg;
2106 cfgcnt = pdata->bq_cfgcnt;
2107
2108 /* Setup an array of texts for the biquad enum.
2109 * This is based on Mark Brown's equalizer driver code.
2110 */
2111 max98095->bq_textcnt = 0;
2112 max98095->bq_texts = NULL;
2113 for (i = 0; i < cfgcnt; i++) {
2114 for (j = 0; j < max98095->bq_textcnt; j++) {
2115 if (strcmp(cfg[i].name, max98095->bq_texts[j]) == 0)
2116 break;
2117 }
2118
2119 if (j != max98095->bq_textcnt)
2120 continue;
2121
2122 /* Expand the array */
2123 t = krealloc(max98095->bq_texts,
2124 sizeof(char *) * (max98095->bq_textcnt + 1),
2125 GFP_KERNEL);
2126 if (t == NULL)
2127 continue;
2128
2129 /* Store the new entry */
2130 t[max98095->bq_textcnt] = cfg[i].name;
2131 max98095->bq_textcnt++;
2132 max98095->bq_texts = t;
2133 }
2134
2135 /* Now point the soc_enum to .texts array items */
2136 max98095->bq_enum.texts = max98095->bq_texts;
2137 max98095->bq_enum.max = max98095->bq_textcnt;
2138
2139 ret = snd_soc_add_controls(codec, controls, ARRAY_SIZE(controls));
2140 if (ret != 0)
2141 dev_err(codec->dev, "Failed to add Biquad control: %d\n", ret);
2142}
2143
1769static void max98095_handle_pdata(struct snd_soc_codec *codec) 2144static void max98095_handle_pdata(struct snd_soc_codec *codec)
1770{ 2145{
1771 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec); 2146 struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec);
@@ -1785,6 +2160,14 @@ static void max98095_handle_pdata(struct snd_soc_codec *codec)
1785 regval |= M98095_DIGMIC_R; 2160 regval |= M98095_DIGMIC_R;
1786 2161
1787 snd_soc_write(codec, M98095_087_CFG_MIC, regval); 2162 snd_soc_write(codec, M98095_087_CFG_MIC, regval);
2163
2164 /* Configure equalizers */
2165 if (pdata->eq_cfgcnt)
2166 max98095_handle_eq_pdata(codec);
2167
2168 /* Configure bi-quad filters */
2169 if (pdata->bq_cfgcnt)
2170 max98095_handle_bq_pdata(codec);
1788} 2171}
1789 2172
1790#ifdef CONFIG_PM 2173#ifdef CONFIG_PM
@@ -1855,18 +2238,26 @@ static int max98095_probe(struct snd_soc_codec *codec)
1855 /* initialize private data */ 2238 /* initialize private data */
1856 2239
1857 max98095->sysclk = (unsigned)-1; 2240 max98095->sysclk = (unsigned)-1;
2241 max98095->eq_textcnt = 0;
2242 max98095->bq_textcnt = 0;
1858 2243
1859 cdata = &max98095->dai[0]; 2244 cdata = &max98095->dai[0];
1860 cdata->rate = (unsigned)-1; 2245 cdata->rate = (unsigned)-1;
1861 cdata->fmt = (unsigned)-1; 2246 cdata->fmt = (unsigned)-1;
2247 cdata->eq_sel = 0;
2248 cdata->bq_sel = 0;
1862 2249
1863 cdata = &max98095->dai[1]; 2250 cdata = &max98095->dai[1];
1864 cdata->rate = (unsigned)-1; 2251 cdata->rate = (unsigned)-1;
1865 cdata->fmt = (unsigned)-1; 2252 cdata->fmt = (unsigned)-1;
2253 cdata->eq_sel = 0;
2254 cdata->bq_sel = 0;
1866 2255
1867 cdata = &max98095->dai[2]; 2256 cdata = &max98095->dai[2];
1868 cdata->rate = (unsigned)-1; 2257 cdata->rate = (unsigned)-1;
1869 cdata->fmt = (unsigned)-1; 2258 cdata->fmt = (unsigned)-1;
2259 cdata->eq_sel = 0;
2260 cdata->bq_sel = 0;
1870 2261
1871 max98095->lin_state = 0; 2262 max98095->lin_state = 0;
1872 max98095->mic1pre = 0; 2263 max98095->mic1pre = 0;
diff --git a/sound/soc/codecs/max98095.h b/sound/soc/codecs/max98095.h
index 5b22bc8dbed..891584a0eb0 100644
--- a/sound/soc/codecs/max98095.h
+++ b/sound/soc/codecs/max98095.h
@@ -250,6 +250,8 @@
250/* M98095_088_CFG_LEVEL */ 250/* M98095_088_CFG_LEVEL */
251 #define M98095_VSEN (1<<6) 251 #define M98095_VSEN (1<<6)
252 #define M98095_ZDEN (1<<5) 252 #define M98095_ZDEN (1<<5)
253 #define M98095_BQ2EN (1<<3)
254 #define M98095_BQ1EN (1<<2)
253 #define M98095_EQ2EN (1<<1) 255 #define M98095_EQ2EN (1<<1)
254 #define M98095_EQ1EN (1<<0) 256 #define M98095_EQ1EN (1<<0)
255 257
@@ -281,4 +283,17 @@
281 #define M98095_PWRSV8K (1<<1) 283 #define M98095_PWRSV8K (1<<1)
282 #define M98095_PWRSV (1<<0) 284 #define M98095_PWRSV (1<<0)
283 285
286#define M98095_COEFS_PER_BAND 5
287
288#define M98095_BYTE1(w) ((w >> 8) & 0xff)
289#define M98095_BYTE0(w) (w & 0xff)
290
291/* Equalizer filter coefficients */
292#define M98095_110_DAI1_EQ_BASE 0x10
293#define M98095_142_DAI2_EQ_BASE 0x42
294
295/* Biquad filter coefficients */
296#define M98095_174_DAI1_BQ_BASE 0x74
297#define M98095_17E_DAI2_BQ_BASE 0x7E
298
284#endif 299#endif