432 files changed, 4215 insertions, 4356 deletions
diff --git a/Documentation/arm/memory.txt b/Documentation/arm/memory.txt
index 771d48d3b33..208a2d465b9 100644
--- a/Documentation/arm/memory.txt
+++ b/Documentation/arm/memory.txt
@@ -51,15 +51,14 @@ ffc00000	ffefffff	DMA memory mapping region.  Memory returned
 ff000000        ffbfffff        Reserved for future expansion of DMA
                                mapping region.
-VMALLOC_END     feffffff        Free for platform use, recommended.
-                                VMALLOC_END must be aligned to a 2MB
-                                boundary.
 VMALLOC_START   VMALLOC_END-1   vmalloc() / ioremap() space.
                                Memory returned by vmalloc/ioremap will
                                be dynamically placed in this region.
-                                VMALLOC_START may be based upon the value
+                                Machine specific static mappings are also
-                                of the high_memory variable.
+                                located here through iotable_init().
+                                VMALLOC_START is based upon the value
+                                of the high_memory variable, and VMALLOC_END
+                                is equal to 0xff000000.
 PAGE_OFFSET     high_memory-1   Kernel direct-mapped RAM region.
                                This maps the platforms RAM, and typically
diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt
index 52916b4aa1f..9b4b82a721b 100644
--- a/Documentation/devicetree/bindings/arm/gic.txt
+++ b/Documentation/devicetree/bindings/arm/gic.txt
@@ -42,6 +42,10 @@ Optional
 - interrupts    : Interrupt source of the parent interrupt controller. Only
  present on secondary GICs.
+- cpu-offset    : per-cpu offset within the distributor and cpu interface
+  regions, used when the GIC doesn't have banked registers. The offset is
+  cpu-offset * cpu-nr.
 Example:
        intc: interrupt-controller@fff11000 {
diff --git a/Documentation/devicetree/bindings/arm/vic.txt b/Documentation/devicetree/bindings/arm/vic.txt
new file mode 100644
index 00000000000..266716b2343
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vic.txt
@@ -0,0 +1,29 @@
+* ARM Vectored Interrupt Controller
+One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM
+system for interrupt routing.  For multiple controllers they can either be
+nested or have the outputs wire-OR'd together.
+Required properties:
+- compatible : should be one of
+        "arm,pl190-vic"
+        "arm,pl192-vic"
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : The number of cells to define the interrupts.  Must be 1 as
+  the VIC has no configuration options for interrupt sources.  The cell is a u32
+  and defines the interrupt number.
+- reg : The register bank for the VIC.
+Optional properties:
+- interrupts : Interrupt source for parent controllers if the VIC is nested.
+Example:
+        vic0: interrupt-controller@60000 {
+                compatible = "arm,pl192-vic";
+                interrupt-controller;
+                #interrupt-cells = <1>;
+                reg = <0x60000 0x1000>;
+        };
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
index 7945b0bd35e..e2a4b528736 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -1100,6 +1100,15 @@ emulate them efficiently. The fields in each entry are defined as follows:
   eax, ebx, ecx, edx: the values returned by the cpuid instruction for
         this function/index combination
+The TSC deadline timer feature (CPUID leaf 1, ecx[24]) is always returned
+as false, since the feature depends on KVM_CREATE_IRQCHIP for local APIC
+support.  Instead it is reported via
+  ioctl(KVM_CHECK_EXTENSION, KVM_CAP_TSC_DEADLINE_TIMER)
+if that returns true and you use KVM_CREATE_IRQCHIP, or if you emulate the
+feature in userspace, then you can enable the feature for KVM_SET_CPUID2.
 4.47 KVM_PPC_GET_PVINFO
 Capability: KVM_CAP_PPC_GET_PVINFO
@@ -1151,6 +1160,13 @@ following flags are specified:
 /* Depends on KVM_CAP_IOMMU */
 #define KVM_DEV_ASSIGN_ENABLE_IOMMU     (1 << 0)
+The KVM_DEV_ASSIGN_ENABLE_IOMMU flag is a mandatory option to ensure
+isolation of the device.  Usages not specifying this flag are deprecated.
+Only PCI header type 0 devices with PCI BAR resources are supported by
+device assignment.  The user requesting this ioctl must have read/write
+access to the PCI sysfs resource files associated with the device.
 4.49 KVM_DEASSIGN_PCI_DEVICE
 Capability: KVM_CAP_DEVICE_DEASSIGNMENT
diff --git a/MAINTAINERS b/MAINTAINERS
index 5a601eab03a..5a70c1809b7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2693,7 +2693,7 @@ FIREWIRE SUBSYSTEM
 M:      Stefan Richter <stefanr@s5r6.in-berlin.de>
 L:      linux1394-devel@lists.sourceforge.net
 W:      http://ieee1394.wiki.kernel.org/
-T:      git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6.git
+T:      git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394.git
 S:      Maintained
 F:      drivers/firewire/
 F:      include/linux/firewire*.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 849e3ad9370..444822526a0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -258,6 +258,7 @@ config ARCH_INTEGRATOR
        select ARCH_HAS_CPUFREQ
        select CLKDEV_LOOKUP
        select HAVE_MACH_CLKDEV
+        select HAVE_TCM
        select ICST
        select GENERIC_CLOCKEVENTS
        select PLAT_VERSATILE
@@ -341,10 +342,12 @@ config ARCH_HIGHBANK
        select ARM_AMBA
        select ARM_GIC
        select ARM_TIMER_SP804
+        select CACHE_L2X0
        select CLKDEV_LOOKUP
        select CPU_V7
        select GENERIC_CLOCKEVENTS
        select HAVE_ARM_SCU
+        select HAVE_SMP
        select USE_OF
        help
          Support for the Calxeda Highbank SoC based boards.
@@ -362,6 +365,7 @@ config ARCH_CNS3XXX
        select CPU_V6K
        select GENERIC_CLOCKEVENTS
        select ARM_GIC
+        select MIGHT_HAVE_CACHE_L2X0
        select MIGHT_HAVE_PCI
        select PCI_DOMAINS if PCI
        help
@@ -382,6 +386,7 @@ config ARCH_PRIMA2
        select GENERIC_CLOCKEVENTS
        select CLKDEV_LOOKUP
        select GENERIC_IRQ_CHIP
+        select MIGHT_HAVE_CACHE_L2X0
        select USE_OF
        select ZONE_DMA
        help
@@ -634,6 +639,8 @@ config ARCH_TEGRA
        select GENERIC_GPIO
        select HAVE_CLK
        select HAVE_SCHED_CLOCK
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
        select ARCH_HAS_CPUFREQ
        help
          This enables support for NVIDIA Tegra based systems (Tegra APX,
@@ -703,7 +710,9 @@ config ARCH_SHMOBILE
        select HAVE_CLK
        select CLKDEV_LOOKUP
        select HAVE_MACH_CLKDEV
+        select HAVE_SMP
        select GENERIC_CLOCKEVENTS
+        select MIGHT_HAVE_CACHE_L2X0
        select NO_IOPORT
        select SPARSE_IRQ
        select MULTI_IRQ_HANDLER
@@ -895,6 +904,8 @@ config ARCH_U8500
        select CLKDEV_LOOKUP
        select ARCH_REQUIRE_GPIOLIB
        select ARCH_HAS_CPUFREQ
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
        help
          Support for ST-Ericsson's Ux500 architecture
@@ -905,6 +916,7 @@ config ARCH_NOMADIK
        select CPU_ARM926T
        select CLKDEV_LOOKUP
        select GENERIC_CLOCKEVENTS
+        select MIGHT_HAVE_CACHE_L2X0
        select ARCH_REQUIRE_GPIOLIB
        help
          Support for the Nomadik platform by ST-Ericsson
@@ -964,6 +976,7 @@ config ARCH_ZYNQ
        select ARM_GIC
        select ARM_AMBA
        select ICST
+        select MIGHT_HAVE_CACHE_L2X0
        select USE_OF
        help
          Support for Xilinx Zynq ARM Cortex A9 Platform
@@ -1114,6 +1127,11 @@ config ARM_TIMER_SP804
 source arch/arm/mm/Kconfig
+config ARM_NR_BANKS
+        int
+        default 16 if ARCH_EP93XX
+        default 8
 config IWMMXT
        bool "Enable iWMMXt support"
        depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
@@ -1234,7 +1252,7 @@ config PL310_ERRATA_588369
 config ARM_ERRATA_720789
        bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
-        depends on CPU_V7 && SMP
+        depends on CPU_V7
        help
          This option enables the workaround for the 720789 Cortex-A9 (prior to
          r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
@@ -1270,7 +1288,7 @@ config ARM_ERRATA_743622
 config ARM_ERRATA_751472
        bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
-        depends on CPU_V7 && SMP
+        depends on CPU_V7
        help
          This option enables the workaround for the 751472 Cortex-A9 (prior
          to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
@@ -1423,14 +1441,20 @@ menu "Kernel Features"
 source "kernel/time/Kconfig"
+config HAVE_SMP
+        bool
+        help
+          This option should be selected by machines which have an SMP-
+          capable CPU.
+          The only effect of this option is to make the SMP-related
+          options available to the user for configuration.
 config SMP
        bool "Symmetric Multi-Processing"
        depends on CPU_V6K || CPU_V7
        depends on GENERIC_CLOCKEVENTS
-        depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
+        depends on HAVE_SMP
-                 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
-                 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
-                 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q
        depends on MMU
        select USE_GENERIC_SMP_HELPERS
        select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
@@ -1548,6 +1572,16 @@ config LOCAL_TIMERS
          accounting to be spread across the timer interval, preventing a
          "thundering herd" at every timer tick.
+config ARCH_NR_GPIO
+        int
+        default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
+        default 350 if ARCH_U8500
+        default 0
+        help
+          Maximum number of GPIOs in the system.
+          If unsure, leave the default value.
 source kernel/Kconfig.preempt
 config HZ
@@ -1960,7 +1994,7 @@ endchoice
 config XIP_KERNEL
        bool "Kernel Execute-In-Place from ROM"
-        depends on !ZBOOT_ROM
+        depends on !ZBOOT_ROM && !ARM_LPAE
        help
          Execute-In-Place allows the kernel to run from non-volatile storage
          directly addressable by the CPU, such as NOR flash. This saves RAM
@@ -1990,7 +2024,7 @@ config XIP_PHYS_ADDR
 config KEXEC
        bool "Kexec system call (EXPERIMENTAL)"
-        depends on EXPERIMENTAL
+        depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
        help
          kexec is a system call that implements the ability to shutdown your
          current kernel, and to start another kernel.  It is like a reboot
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 21f56ff3279..cf0a64ce4b8 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -126,7 +126,8 @@ ccflags-y := -fpic -fno-builtin -I$(obj)
 asflags-y := -Wa,-march=all
 # Supply kernel BSS size to the decompressor via a linker symbol.
-KBSS_SZ = $(shell size $(obj)/../../../../vmlinux | awk 'END{print $$3}')
+KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \
+                awk 'END{print $$3}')
 LDFLAGS_vmlinux = --defsym _kernel_bss_size=$(KBSS_SZ)
 # Supply ZRELADDR to the decompressor via a linker symbol.
 ifneq ($(CONFIG_AUTO_ZRELADDR),y)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index c2effc91725..c5d60250d43 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -659,6 +659,7 @@ __armv7_mmu_cache_on:
                mcrne   p15, 0, r3, c2, c0, 0   @ load page table pointer
                mcrne   p15, 0, r1, c3, c0, 0   @ load domain access control
 #endif
+                mcr     p15, 0, r0, c7, c5, 4   @ ISB
                mcr     p15, 0, r0, c1, c0, 0   @ load control register
                mrc     p15, 0, r0, c1, c0, 0   @ and read it back
                mov     r0, #0
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 74df9ca2be3..81a933eb090 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -1,8 +1,14 @@
 config ARM_GIC
        select IRQ_DOMAIN
+        select MULTI_IRQ_HANDLER
+        bool
+config GIC_NON_BANKED
        bool
 config ARM_VIC
+        select IRQ_DOMAIN
+        select MULTI_IRQ_HANDLER
        bool
 config ARM_VIC_NR
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 410a546060a..b2dc2dd7f1d 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -40,13 +40,36 @@
 #include <linux/slab.h>
 #include <asm/irq.h>
+#include <asm/exception.h>
 #include <asm/mach/irq.h>
 #include <asm/hardware/gic.h>
-static DEFINE_RAW_SPINLOCK(irq_controller_lock);
+union gic_base {
+        void __iomem *common_base;
+        void __percpu __iomem **percpu_base;
+};
-/* Address of GIC 0 CPU interface */
+struct gic_chip_data {
-void __iomem *gic_cpu_base_addr __read_mostly;
+        unsigned int irq_offset;
+        union gic_base dist_base;
+        union gic_base cpu_base;
+#ifdef CONFIG_CPU_PM
+        u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)];
+        u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)];
+        u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
+        u32 __percpu *saved_ppi_enable;
+        u32 __percpu *saved_ppi_conf;
+#endif
+#ifdef CONFIG_IRQ_DOMAIN
+        struct irq_domain domain;
+#endif
+        unsigned int gic_irqs;
+#ifdef CONFIG_GIC_NON_BANKED
+        void __iomem *(*get_base)(union gic_base *);
+#endif
+};
+static DEFINE_RAW_SPINLOCK(irq_controller_lock);
 /*
 * Supported arch specific GIC irq extension.
@@ -67,16 +90,48 @@ struct irq_chip gic_arch_extn = {
 static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly;
+#ifdef CONFIG_GIC_NON_BANKED
+static void __iomem *gic_get_percpu_base(union gic_base *base)
+{
+        return *__this_cpu_ptr(base->percpu_base);
+}
+static void __iomem *gic_get_common_base(union gic_base *base)
+{
+        return base->common_base;
+}
+static inline void __iomem *gic_data_dist_base(struct gic_chip_data *data)
+{
+        return data->get_base(&data->dist_base);
+}
+static inline void __iomem *gic_data_cpu_base(struct gic_chip_data *data)
+{
+        return data->get_base(&data->cpu_base);
+}
+static inline void gic_set_base_accessor(struct gic_chip_data *data,
+                                         void __iomem *(*f)(union gic_base *))
+{
+        data->get_base = f;
+}
+#else
+#define gic_data_dist_base(d)   ((d)->dist_base.common_base)
+#define gic_data_cpu_base(d)    ((d)->cpu_base.common_base)
+#define gic_set_base_accessor(d,f)
+#endif
 static inline void __iomem *gic_dist_base(struct irq_data *d)
 {
        struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
-        return gic_data->dist_base;
+        return gic_data_dist_base(gic_data);
 }
 static inline void __iomem *gic_cpu_base(struct irq_data *d)
 {
        struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
-        return gic_data->cpu_base;
+        return gic_data_cpu_base(gic_data);
 }
 static inline unsigned int gic_irq(struct irq_data *d)
@@ -215,6 +270,32 @@ static int gic_set_wake(struct irq_data *d, unsigned int on)
 #define gic_set_wake    NULL
 #endif
+asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
+{
+        u32 irqstat, irqnr;
+        struct gic_chip_data *gic = &gic_data[0];
+        void __iomem *cpu_base = gic_data_cpu_base(gic);
+        do {
+                irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
+                irqnr = irqstat & ~0x1c00;
+                if (likely(irqnr > 15 && irqnr < 1021)) {
+                        irqnr = irq_domain_to_irq(&gic->domain, irqnr);
+                        handle_IRQ(irqnr, regs);
+                        continue;
+                }
+                if (irqnr < 16) {
+                        writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI);
+#ifdef CONFIG_SMP
+                        handle_IPI(irqnr, regs);
+#endif
+                        continue;
+                }
+                break;
+        } while (1);
+}
 static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
 {
        struct gic_chip_data *chip_data = irq_get_handler_data(irq);
@@ -225,7 +306,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
        chained_irq_enter(chip, desc);
        raw_spin_lock(&irq_controller_lock);
-        status = readl_relaxed(chip_data->cpu_base + GIC_CPU_INTACK);
+        status = readl_relaxed(gic_data_cpu_base(chip_data) + GIC_CPU_INTACK);
        raw_spin_unlock(&irq_controller_lock);
        gic_irq = (status & 0x3ff);
@@ -270,7 +351,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
        u32 cpumask;
        unsigned int gic_irqs = gic->gic_irqs;
        struct irq_domain *domain = &gic->domain;
-        void __iomem *base = gic->dist_base;
+        void __iomem *base = gic_data_dist_base(gic);
        u32 cpu = 0;
 #ifdef CONFIG_SMP
@@ -330,8 +411,8 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
 static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
 {
-        void __iomem *dist_base = gic->dist_base;
+        void __iomem *dist_base = gic_data_dist_base(gic);
-        void __iomem *base = gic->cpu_base;
+        void __iomem *base = gic_data_cpu_base(gic);
        int i;
        /*
@@ -368,7 +449,7 @@ static void gic_dist_save(unsigned int gic_nr)
                BUG();
        gic_irqs = gic_data[gic_nr].gic_irqs;
-        dist_base = gic_data[gic_nr].dist_base;
+        dist_base = gic_data_dist_base(&gic_data[gic_nr]);
        if (!dist_base)
                return;
@@ -403,7 +484,7 @@ static void gic_dist_restore(unsigned int gic_nr)
                BUG();
        gic_irqs = gic_data[gic_nr].gic_irqs;
-        dist_base = gic_data[gic_nr].dist_base;
+        dist_base = gic_data_dist_base(&gic_data[gic_nr]);
        if (!dist_base)
                return;
@@ -439,8 +520,8 @@ static void gic_cpu_save(unsigned int gic_nr)
        if (gic_nr >= MAX_GIC_NR)
                BUG();
-        dist_base = gic_data[gic_nr].dist_base;
+        dist_base = gic_data_dist_base(&gic_data[gic_nr]);
-        cpu_base = gic_data[gic_nr].cpu_base;
+        cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
        if (!dist_base || !cpu_base)
                return;
@@ -465,8 +546,8 @@ static void gic_cpu_restore(unsigned int gic_nr)
        if (gic_nr >= MAX_GIC_NR)
                BUG();
-        dist_base = gic_data[gic_nr].dist_base;
+        dist_base = gic_data_dist_base(&gic_data[gic_nr]);
-        cpu_base = gic_data[gic_nr].cpu_base;
+        cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
        if (!dist_base || !cpu_base)
                return;
@@ -491,6 +572,11 @@ static int gic_notifier(struct notifier_block *self, unsigned long cmd,	void *v)
        int i;
        for (i = 0; i < MAX_GIC_NR; i++) {
+#ifdef CONFIG_GIC_NON_BANKED
+                /* Skip over unused GICs */
+                if (!gic_data[i].get_base)
+                        continue;
+#endif
                switch (cmd) {
                case CPU_PM_ENTER:
                        gic_cpu_save(i);
@@ -564,8 +650,9 @@ const struct irq_domain_ops gic_irq_domain_ops = {
 #endif
 };
-void __init gic_init(unsigned int gic_nr, int irq_start,
+void __init gic_init_bases(unsigned int gic_nr, int irq_start,
-        void __iomem *dist_base, void __iomem *cpu_base)
+                           void __iomem *dist_base, void __iomem *cpu_base,
+                           u32 percpu_offset)
 {
        struct gic_chip_data *gic;
        struct irq_domain *domain;
@@ -575,8 +662,36 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
        gic = &gic_data[gic_nr];
        domain = &gic->domain;
-        gic->dist_base = dist_base;
+#ifdef CONFIG_GIC_NON_BANKED
-        gic->cpu_base = cpu_base;
+        if (percpu_offset) { /* Frankein-GIC without banked registers... */
+                unsigned int cpu;
+                gic->dist_base.percpu_base = alloc_percpu(void __iomem *);
+                gic->cpu_base.percpu_base = alloc_percpu(void __iomem *);
+                if (WARN_ON(!gic->dist_base.percpu_base ||
+                            !gic->cpu_base.percpu_base)) {
+                        free_percpu(gic->dist_base.percpu_base);
+                        free_percpu(gic->cpu_base.percpu_base);
+                        return;
+                }
+                for_each_possible_cpu(cpu) {
+                        unsigned long offset = percpu_offset * cpu_logical_map(cpu);
+                        *per_cpu_ptr(gic->dist_base.percpu_base, cpu) = dist_base + offset;
+                        *per_cpu_ptr(gic->cpu_base.percpu_base, cpu) = cpu_base + offset;
+                }
+                gic_set_base_accessor(gic, gic_get_percpu_base);
+        } else
+#endif
+        {                       /* Normal, sane GIC... */
+                WARN(percpu_offset,
+                     "GIC_NON_BANKED not enabled, ignoring %08x offset!",
+                     percpu_offset);
+                gic->dist_base.common_base = dist_base;
+                gic->cpu_base.common_base = cpu_base;
+                gic_set_base_accessor(gic, gic_get_common_base);
+        }
        /*
         * For primary GICs, skip over SGIs.
@@ -584,8 +699,6 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
         */
        domain->hwirq_base = 32;
        if (gic_nr == 0) {
-                gic_cpu_base_addr = cpu_base;
                if ((irq_start & 31) > 0) {
                        domain->hwirq_base = 16;
                        if (irq_start != -1)
@@ -597,7 +710,7 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
         * Find out how many interrupts are supported.
         * The GIC only supports up to 1020 interrupt sources.
         */
-        gic_irqs = readl_relaxed(dist_base + GIC_DIST_CTR) & 0x1f;
+        gic_irqs = readl_relaxed(gic_data_dist_base(gic) + GIC_DIST_CTR) & 0x1f;
        gic_irqs = (gic_irqs + 1) * 32;
        if (gic_irqs > 1020)
                gic_irqs = 1020;
@@ -645,7 +758,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
        dsb();
        /* this always happens on GIC0 */
-        writel_relaxed(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT);
+        writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
 }
 #endif
@@ -656,6 +769,7 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
 {
        void __iomem *cpu_base;
        void __iomem *dist_base;
+        u32 percpu_offset;
        int irq;
        struct irq_domain *domain = &gic_data[gic_cnt].domain;
@@ -668,9 +782,12 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
        cpu_base = of_iomap(node, 1);
        WARN(!cpu_base, "unable to map gic cpu registers\n");
+        if (of_property_read_u32(node, "cpu-offset", &percpu_offset))
+                percpu_offset = 0;
        domain->of_node = of_node_get(node);
-        gic_init(gic_cnt, -1, dist_base, cpu_base);
+        gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset);
        if (parent) {
                irq = irq_of_parse_and_map(node, 0);
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
index f407a6b35d3..d8e44a43047 100644
--- a/arch/arm/common/pl330.c
+++ b/arch/arm/common/pl330.c
@@ -221,17 +221,6 @@
 */
 #define MCODE_BUFF_PER_REQ      256
-/*
- * Mark a _pl330_req as free.
- * We do it by writing DMAEND as the first instruction
- * because no valid request is going to have DMAEND as
- * its first instruction to execute.
- */
-#define MARK_FREE(req)  do { \
-                                _emit_END(0, (req)->mc_cpu); \
-                                (req)->mc_len = 0; \
-                        } while (0)
 /* If the _pl330_req is available to the client */
 #define IS_FREE(req)    (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND)
@@ -301,8 +290,10 @@ struct pl330_thread {
        struct pl330_dmac *dmac;
        /* Only two at a time */
        struct _pl330_req req[2];
-        /* Index of the last submitted request */
+        /* Index of the last enqueued request */
        unsigned lstenq;
+        /* Index of the last submitted request or -1 if the DMA is stopped */
+        int req_running;
 };
 enum pl330_dmac_state {
@@ -778,6 +769,22 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd,
        writel(0, regs + DBGCMD);
 }
+/*
+ * Mark a _pl330_req as free.
+ * We do it by writing DMAEND as the first instruction
+ * because no valid request is going to have DMAEND as
+ * its first instruction to execute.
+ */
+static void mark_free(struct pl330_thread *thrd, int idx)
+{
+        struct _pl330_req *req = &thrd->req[idx];
+        _emit_END(0, req->mc_cpu);
+        req->mc_len = 0;
+        thrd->req_running = -1;
+}
 static inline u32 _state(struct pl330_thread *thrd)
 {
        void __iomem *regs = thrd->dmac->pinfo->base;
@@ -836,31 +843,6 @@ static inline u32 _state(struct pl330_thread *thrd)
        }
 }
-/* If the request 'req' of thread 'thrd' is currently active */
-static inline bool _req_active(struct pl330_thread *thrd,
-                struct _pl330_req *req)
-{
-        void __iomem *regs = thrd->dmac->pinfo->base;
-        u32 buf = req->mc_bus, pc = readl(regs + CPC(thrd->id));
-        if (IS_FREE(req))
-                return false;
-        return (pc >= buf && pc <= buf + req->mc_len) ? true : false;
-}
-/* Returns 0 if the thread is inactive, ID of active req + 1 otherwise */
-static inline unsigned _thrd_active(struct pl330_thread *thrd)
-{
-        if (_req_active(thrd, &thrd->req[0]))
-                return 1; /* First req active */
-        if (_req_active(thrd, &thrd->req[1]))
-                return 2; /* Second req active */
-        return 0;
-}
 static void _stop(struct pl330_thread *thrd)
 {
        void __iomem *regs = thrd->dmac->pinfo->base;
@@ -892,17 +874,22 @@ static bool _trigger(struct pl330_thread *thrd)
        struct _arg_GO go;
        unsigned ns;
        u8 insn[6] = {0, 0, 0, 0, 0, 0};
+        int idx;
        /* Return if already ACTIVE */
        if (_state(thrd) != PL330_STATE_STOPPED)
                return true;
-        if (!IS_FREE(&thrd->req[1 - thrd->lstenq]))
+        idx = 1 - thrd->lstenq;
-                req = &thrd->req[1 - thrd->lstenq];
+        if (!IS_FREE(&thrd->req[idx]))
-        else if (!IS_FREE(&thrd->req[thrd->lstenq]))
+                req = &thrd->req[idx];
-                req = &thrd->req[thrd->lstenq];
+        else {
-        else
+                idx = thrd->lstenq;
-                req = NULL;
+                if (!IS_FREE(&thrd->req[idx]))
+                        req = &thrd->req[idx];
+                else
+                        req = NULL;
+        }
        /* Return if no request */
        if (!req || !req->r)
@@ -933,6 +920,8 @@ static bool _trigger(struct pl330_thread *thrd)
        /* Only manager can execute GO */
        _execute_DBGINSN(thrd, insn, true);
+        thrd->req_running = idx;
        return true;
 }
@@ -1382,8 +1371,8 @@ static void pl330_dotask(unsigned long data)
                        thrd->req[0].r = NULL;
                        thrd->req[1].r = NULL;
-                        MARK_FREE(&thrd->req[0]);
+                        mark_free(thrd, 0);
-                        MARK_FREE(&thrd->req[1]);
+                        mark_free(thrd, 1);
                        /* Clear the reset flag */
                        pl330->dmac_tbd.reset_chan &= ~(1 << i);
@@ -1461,14 +1450,12 @@ int pl330_update(const struct pl330_info *pi)
                        thrd = &pl330->channels[id];
-                        active = _thrd_active(thrd);
+                        active = thrd->req_running;
-                        if (!active) /* Aborted */
+                        if (active == -1) /* Aborted */
                                continue;
-                        active -= 1;
                        rqdone = &thrd->req[active];
-                        MARK_FREE(rqdone);
+                        mark_free(thrd, active);
                        /* Get going again ASAP */
                        _start(thrd);
@@ -1480,13 +1467,19 @@ int pl330_update(const struct pl330_info *pi)
        /* Now that we are in no hurry, do the callbacks */
        while (!list_empty(&pl330->req_done)) {
+                struct pl330_req *r;
                rqdone = container_of(pl330->req_done.next,
                                        struct _pl330_req, rqd);
                list_del_init(&rqdone->rqd);
+                /* Detach the req */
+                r = rqdone->r;
+                rqdone->r = NULL;
                spin_unlock_irqrestore(&pl330->lock, flags);
-                _callback(rqdone->r, PL330_ERR_NONE);
+                _callback(r, PL330_ERR_NONE);
                spin_lock_irqsave(&pl330->lock, flags);
        }
@@ -1509,7 +1502,7 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
        struct pl330_thread *thrd = ch_id;
        struct pl330_dmac *pl330;
        unsigned long flags;
-        int ret = 0, active;
+        int ret = 0, active = thrd->req_running;
        if (!thrd || thrd->free || thrd->dmac->state == DYING)
                return -EINVAL;
@@ -1525,28 +1518,24 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
                thrd->req[0].r = NULL;
                thrd->req[1].r = NULL;
-                MARK_FREE(&thrd->req[0]);
+                mark_free(thrd, 0);
-                MARK_FREE(&thrd->req[1]);
+                mark_free(thrd, 1);
                break;
        case PL330_OP_ABORT:
-                active = _thrd_active(thrd);
                /* Make sure the channel is stopped */
                _stop(thrd);
                /* ABORT is only for the active req */
-                if (!active)
+                if (active == -1)
                        break;
-                active--;
                thrd->req[active].r = NULL;
-                MARK_FREE(&thrd->req[active]);
+                mark_free(thrd, active);
                /* Start the next */
        case PL330_OP_START:
-                if (!_thrd_active(thrd) && !_start(thrd))
+                if ((active == -1) && !_start(thrd))
                        ret = -EIO;
                break;
@@ -1587,14 +1576,13 @@ int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus)
        else
                pstatus->faulting = false;
-        active = _thrd_active(thrd);
+        active = thrd->req_running;
-        if (!active) {
+        if (active == -1) {
                /* Indicate that the thread is not running */
                pstatus->top_req = NULL;
                pstatus->wait_req = NULL;
        } else {
-                active--;
                pstatus->top_req = thrd->req[active].r;
                pstatus->wait_req = !IS_FREE(&thrd->req[1 - active])
                                        ? thrd->req[1 - active].r : NULL;
@@ -1659,9 +1647,9 @@ void *pl330_request_channel(const struct pl330_info *pi)
                                thrd->free = false;
                                thrd->lstenq = 1;
                                thrd->req[0].r = NULL;
-                                MARK_FREE(&thrd->req[0]);
+                                mark_free(thrd, 0);
                                thrd->req[1].r = NULL;
-                                MARK_FREE(&thrd->req[1]);
+                                mark_free(thrd, 1);
                                break;
                        }
                }
@@ -1767,14 +1755,14 @@ static inline void _reset_thread(struct pl330_thread *thrd)
        thrd->req[0].mc_bus = pl330->mcode_bus
                                + (thrd->id * pi->mcbufsz);
        thrd->req[0].r = NULL;
-        MARK_FREE(&thrd->req[0]);
+        mark_free(thrd, 0);
        thrd->req[1].mc_cpu = thrd->req[0].mc_cpu
                                + pi->mcbufsz / 2;
        thrd->req[1].mc_bus = thrd->req[0].mc_bus
                                + pi->mcbufsz / 2;
        thrd->req[1].r = NULL;
-        MARK_FREE(&thrd->req[1]);
+        mark_free(thrd, 1);
 }
 static int dmac_alloc_threads(struct pl330_dmac *pl330)
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index 2393b5bc96f..8794a34eae6 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -143,7 +143,6 @@ static int sp804_set_next_event(unsigned long next,
 }
 static struct clock_event_device sp804_clockevent = {
-        .shift          = 32,
        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
        .set_mode       = sp804_set_mode,
        .set_next_event = sp804_set_next_event,
@@ -169,13 +168,9 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq,
        clkevt_base = base;
        clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ);
        evt->name = name;
        evt->irq = irq;
-        evt->mult = div_sc(rate, NSEC_PER_SEC, evt->shift);
-        evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt);
-        evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
        setup_irq(irq, &sp804_timer_irq);
-        clockevents_register_device(evt);
+        clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
 }
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 01f18a421b1..dcb004a804c 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -19,17 +19,22 @@
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
+#include <linux/export.h>
 #include <linux/init.h>
 #include <linux/list.h>
 #include <linux/io.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 #include <linux/syscore_ops.h>
 #include <linux/device.h>
 #include <linux/amba/bus.h>
+#include <asm/exception.h>
 #include <asm/mach/irq.h>
 #include <asm/hardware/vic.h>
-#ifdef CONFIG_PM
 /**
 * struct vic_device - VIC PM device
 * @irq: The IRQ number for the base of the VIC.
@@ -40,6 +45,7 @@
 * @int_enable: Save for VIC_INT_ENABLE.
 * @soft_int: Save for VIC_INT_SOFT.
 * @protect: Save for VIC_PROTECT.
+ * @domain: The IRQ domain for the VIC.
 */
 struct vic_device {
        void __iomem    *base;
@@ -50,13 +56,13 @@ struct vic_device {
        u32             int_enable;
        u32             soft_int;
        u32             protect;
+        struct irq_domain domain;
 };
 /* we cannot allocate memory when VICs are initially registered */
 static struct vic_device vic_devices[CONFIG_ARM_VIC_NR];
 static int vic_id;
-#endif /* CONFIG_PM */
 /**
 * vic_init2 - common initialisation code
@@ -156,39 +162,50 @@ static int __init vic_pm_init(void)
        return 0;
 }
 late_initcall(vic_pm_init);
+#endif /* CONFIG_PM */
 /**
- * vic_pm_register - Register a VIC for later power management control
+ * vic_register() - Register a VIC.
 * @base: The base address of the VIC.
 * @irq: The base IRQ for the VIC.
 * @resume_sources: bitmask of interrupts allowed for resume sources.
+ * @node: The device tree node associated with the VIC.
 *
 * Register the VIC with the system device tree so that it can be notified
 * of suspend and resume requests and ensure that the correct actions are
 * taken to re-instate the settings on resume.
+ *
+ * This also configures the IRQ domain for the VIC.
 */
-static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources)
+static void __init vic_register(void __iomem *base, unsigned int irq,
+                                u32 resume_sources, struct device_node *node)
 {
        struct vic_device *v;
-        if (vic_id >= ARRAY_SIZE(vic_devices))
+        if (vic_id >= ARRAY_SIZE(vic_devices)) {
                printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__);
-        else {
+                return;
-                v = &vic_devices[vic_id];
-                v->base = base;
-                v->resume_sources = resume_sources;
-                v->irq = irq;
-                vic_id++;
        }
+        v = &vic_devices[vic_id];
+        v->base = base;
+        v->resume_sources = resume_sources;
+        v->irq = irq;
+        vic_id++;
+        v->domain.irq_base = irq;
+        v->domain.nr_irq = 32;
+#ifdef CONFIG_OF_IRQ
+        v->domain.of_node = of_node_get(node);
+#endif /* CONFIG_OF */
+        v->domain.ops = &irq_domain_simple_ops;
+        irq_domain_add(&v->domain);
 }
-#else
-static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { }
-#endif /* CONFIG_PM */
 static void vic_ack_irq(struct irq_data *d)
 {
        void __iomem *base = irq_data_get_irq_chip_data(d);
-        unsigned int irq = d->irq & 31;
+        unsigned int irq = d->hwirq;
        writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
        /* moreover, clear the soft-triggered, in case it was the reason */
        writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
@@ -197,14 +214,14 @@ static void vic_ack_irq(struct irq_data *d)
 static void vic_mask_irq(struct irq_data *d)
 {
        void __iomem *base = irq_data_get_irq_chip_data(d);
-        unsigned int irq = d->irq & 31;
+        unsigned int irq = d->hwirq;
        writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
 }
 static void vic_unmask_irq(struct irq_data *d)
 {
        void __iomem *base = irq_data_get_irq_chip_data(d);
-        unsigned int irq = d->irq & 31;
+        unsigned int irq = d->hwirq;
        writel(1 << irq, base + VIC_INT_ENABLE);
 }
@@ -226,7 +243,7 @@ static struct vic_device *vic_from_irq(unsigned int irq)
 static int vic_set_wake(struct irq_data *d, unsigned int on)
 {
        struct vic_device *v = vic_from_irq(d->irq);
-        unsigned int off = d->irq & 31;
+        unsigned int off = d->hwirq;
        u32 bit = 1 << off;
        if (!v)
@@ -301,7 +318,7 @@ static void __init vic_set_irq_sources(void __iomem *base,
 *  and 020 within the page. We call this "second block".
 */
 static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
-                                u32 vic_sources)
+                               u32 vic_sources, struct device_node *node)
 {
        unsigned int i;
        int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0;
@@ -328,17 +345,12 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
        }
        vic_set_irq_sources(base, irq_start, vic_sources);
+        vic_register(base, irq_start, 0, node);
 }
-/**
+static void __init __vic_init(void __iomem *base, unsigned int irq_start,
- * vic_init - initialise a vectored interrupt controller
+                              u32 vic_sources, u32 resume_sources,
- * @base: iomem base address
+                              struct device_node *node)
- * @irq_start: starting interrupt number, must be muliple of 32
- * @vic_sources: bitmask of interrupt sources to allow
- * @resume_sources: bitmask of interrupt sources to allow for resume
- */
-void __init vic_init(void __iomem *base, unsigned int irq_start,
-                     u32 vic_sources, u32 resume_sources)
 {
        unsigned int i;
        u32 cellid = 0;
@@ -356,7 +368,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
        switch(vendor) {
        case AMBA_VENDOR_ST:
-                vic_init_st(base, irq_start, vic_sources);
+                vic_init_st(base, irq_start, vic_sources, node);
                return;
        default:
                printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n");
@@ -375,5 +387,81 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
        vic_set_irq_sources(base, irq_start, vic_sources);
-        vic_pm_register(base, irq_start, resume_sources);
+        vic_register(base, irq_start, resume_sources, node);
+}
+/**
+ * vic_init() - initialise a vectored interrupt controller
+ * @base: iomem base address
+ * @irq_start: starting interrupt number, must be muliple of 32
+ * @vic_sources: bitmask of interrupt sources to allow
+ * @resume_sources: bitmask of interrupt sources to allow for resume
+ */
+void __init vic_init(void __iomem *base, unsigned int irq_start,
+                     u32 vic_sources, u32 resume_sources)
+{
+        __vic_init(base, irq_start, vic_sources, resume_sources, NULL);
+}
+#ifdef CONFIG_OF
+int __init vic_of_init(struct device_node *node, struct device_node *parent)
+{
+        void __iomem *regs;
+        int irq_base;
+        if (WARN(parent, "non-root VICs are not supported"))
+                return -EINVAL;
+        regs = of_iomap(node, 0);
+        if (WARN_ON(!regs))
+                return -EIO;
+        irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
+        if (WARN_ON(irq_base < 0))
+                goto out_unmap;
+        __vic_init(regs, irq_base, ~0, ~0, node);
+        return 0;
+ out_unmap:
+        iounmap(regs);
+        return -EIO;
+}
+#endif /* CONFIG OF */
+/*
+ * Handle each interrupt in a single VIC.  Returns non-zero if we've
+ * handled at least one interrupt.  This does a single read of the
+ * status register and handles all interrupts in order from LSB first.
+ */
+static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
+{
+        u32 stat, irq;
+        int handled = 0;
+        stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
+        while (stat) {
+                irq = ffs(stat) - 1;
+                handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
+                stat &= ~(1 << irq);
+                handled = 1;
+        }
+        return handled;
+}
+/*
+ * Keep iterating over all registered VIC's until there are no pending
+ * interrupts.
+ */
+asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
+{
+        int i, handled;
+        do {
+                for (i = 0, handled = 0; i < vic_id; ++i)
+                        handled |= handle_one_vic(&vic_devices[i], regs);
+        } while (handled);
 }
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index 11a4192197c..cf497ce41df 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -18,9 +18,10 @@ CONFIG_ARCH_MXC=y
 CONFIG_ARCH_IMX_V4_V5=y
 CONFIG_ARCH_MX1ADS=y
 CONFIG_MACH_SCB9328=y
+CONFIG_MACH_APF9328=y
 CONFIG_MACH_MX21ADS=y
 CONFIG_MACH_MX25_3DS=y
-CONFIG_MACH_EUKREA_CPUIMX25=y
+CONFIG_MACH_EUKREA_CPUIMX25SD=y
 CONFIG_MACH_MX27ADS=y
 CONFIG_MACH_PCM038=y
 CONFIG_MACH_CPUIMX27=y
@@ -72,17 +73,16 @@ CONFIG_MTD_CFI_GEOMETRY=y
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_MXC=y
 CONFIG_MTD_UBI=y
 CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_AT24=y
 CONFIG_EEPROM_AT25=y
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
 CONFIG_DM9000=y
+CONFIG_SMC91X=y
 CONFIG_SMC911X=y
-# CONFIG_NETDEV_1000 is not set
+CONFIG_SMSC_PHY=y
-# CONFIG_NETDEV_10000 is not set
 # CONFIG_INPUT_MOUSEDEV is not set
 CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_KEYBOARD is not set
@@ -100,6 +100,7 @@ CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_IMX=y
 CONFIG_SPI=y
 CONFIG_SPI_IMX=y
+CONFIG_SPI_SPIDEV=y
 CONFIG_W1=y
 CONFIG_W1_MASTER_MXC=y
 CONFIG_W1_SLAVE_THERM=y
@@ -139,6 +140,7 @@ CONFIG_MMC=y
 CONFIG_MMC_MXC=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
 CONFIG_LEDS_MC13783=y
 CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_TIMER=y
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 29035e86a59..b6e65dedfd7 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -187,6 +187,17 @@
 #endif
 /*
+ * Instruction barrier
+ */
+        .macro  instr_sync
+#if __LINUX_ARM_ARCH__ >= 7
+        isb
+#elif __LINUX_ARM_ARCH__ == 6
+        mcr     p15, 0, r0, c7, c5, 4
+#endif
+        .endm
+/*
 * SMP data memory barrier
 */
        .macro  smp_dmb mode
diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h
index 9abe7a07d5a..fac79dceb73 100644
--- a/arch/arm/include/asm/bug.h
+++ b/arch/arm/include/asm/bug.h
@@ -32,7 +32,6 @@
 #define __BUG(__file, __line, __value)                          \
 do {                                                            \
-        BUILD_BUG_ON(sizeof(struct bug_entry) != 12);           \
        asm volatile("1:\t" BUG_INSTR_TYPE #__value "\n"        \
                ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \
                "2:\t.asciz " #__file "\n"                      \
diff --git a/arch/arm/include/asm/cti.h b/arch/arm/include/asm/cti.h
new file mode 100644
index 00000000000..a0ada3ea435
--- /dev/null
+++ b/arch/arm/include/asm/cti.h
@@ -0,0 +1,179 @@
+#ifndef __ASMARM_CTI_H
+#define __ASMARM_CTI_H
+#include        <asm/io.h>
+/* The registers' definition is from section 3.2 of
+ * Embedded Cross Trigger Revision: r0p0
+ */
+#define         CTICONTROL              0x000
+#define         CTISTATUS               0x004
+#define         CTILOCK                 0x008
+#define         CTIPROTECTION           0x00C
+#define         CTIINTACK               0x010
+#define         CTIAPPSET               0x014
+#define         CTIAPPCLEAR             0x018
+#define         CTIAPPPULSE             0x01c
+#define         CTIINEN                 0x020
+#define         CTIOUTEN                0x0A0
+#define         CTITRIGINSTATUS         0x130
+#define         CTITRIGOUTSTATUS        0x134
+#define         CTICHINSTATUS           0x138
+#define         CTICHOUTSTATUS          0x13c
+#define         CTIPERIPHID0            0xFE0
+#define         CTIPERIPHID1            0xFE4
+#define         CTIPERIPHID2            0xFE8
+#define         CTIPERIPHID3            0xFEC
+#define         CTIPCELLID0             0xFF0
+#define         CTIPCELLID1             0xFF4
+#define         CTIPCELLID2             0xFF8
+#define         CTIPCELLID3             0xFFC
+/* The below are from section 3.6.4 of
+ * CoreSight v1.0 Architecture Specification
+ */
+#define         LOCKACCESS              0xFB0
+#define         LOCKSTATUS              0xFB4
+/* write this value to LOCKACCESS will unlock the module, and
+ * other value will lock the module
+ */
+#define         LOCKCODE                0xC5ACCE55
+/**
+ * struct cti - cross trigger interface struct
+ * @base: mapped virtual address for the cti base
+ * @irq: irq number for the cti
+ * @trig_out_for_irq: triger out number which will cause
+ *      the @irq happen
+ *
+ * cti struct used to operate cti registers.
+ */
+struct cti {
+        void __iomem *base;
+        int irq;
+        int trig_out_for_irq;
+};
+/**
+ * cti_init - initialize the cti instance
+ * @cti: cti instance
+ * @base: mapped virtual address for the cti base
+ * @irq: irq number for the cti
+ * @trig_out: triger out number which will cause
+ *      the @irq happen
+ *
+ * called by machine code to pass the board dependent
+ * @base, @irq and @trig_out to cti.
+ */
+static inline void cti_init(struct cti *cti,
+        void __iomem *base, int irq, int trig_out)
+{
+        cti->base = base;
+        cti->irq  = irq;
+        cti->trig_out_for_irq = trig_out;
+}
+/**
+ * cti_map_trigger - use the @chan to map @trig_in to @trig_out
+ * @cti: cti instance
+ * @trig_in: trigger in number
+ * @trig_out: trigger out number
+ * @channel: channel number
+ *
+ * This function maps one trigger in of @trig_in to one trigger
+ * out of @trig_out using the channel @chan.
+ */
+static inline void cti_map_trigger(struct cti *cti,
+        int trig_in, int trig_out, int chan)
+{
+        void __iomem *base = cti->base;
+        unsigned long val;
+        val = __raw_readl(base + CTIINEN + trig_in * 4);
+        val |= BIT(chan);
+        __raw_writel(val, base + CTIINEN + trig_in * 4);
+        val = __raw_readl(base + CTIOUTEN + trig_out * 4);
+        val |= BIT(chan);
+        __raw_writel(val, base + CTIOUTEN + trig_out * 4);
+}
+/**
+ * cti_enable - enable the cti module
+ * @cti: cti instance
+ *
+ * enable the cti module
+ */
+static inline void cti_enable(struct cti *cti)
+{
+        __raw_writel(0x1, cti->base + CTICONTROL);
+}
+/**
+ * cti_disable - disable the cti module
+ * @cti: cti instance
+ *
+ * enable the cti module
+ */
+static inline void cti_disable(struct cti *cti)
+{
+        __raw_writel(0, cti->base + CTICONTROL);
+}
+/**
+ * cti_irq_ack - clear the cti irq
+ * @cti: cti instance
+ *
+ * clear the cti irq
+ */
+static inline void cti_irq_ack(struct cti *cti)
+{
+        void __iomem *base = cti->base;
+        unsigned long val;
+        val = __raw_readl(base + CTIINTACK);
+        val |= BIT(cti->trig_out_for_irq);
+        __raw_writel(val, base + CTIINTACK);
+}
+/**
+ * cti_unlock - unlock cti module
+ * @cti: cti instance
+ *
+ * unlock the cti module, or else any writes to the cti
+ * module is not allowed.
+ */
+static inline void cti_unlock(struct cti *cti)
+{
+        void __iomem *base = cti->base;
+        unsigned long val;
+        val = __raw_readl(base + LOCKSTATUS);
+        if (val & 1) {
+                val = LOCKCODE;
+                __raw_writel(val, base + LOCKACCESS);
+        }
+}
+/**
+ * cti_lock - lock cti module
+ * @cti: cti instance
+ *
+ * lock the cti module, so any writes to the cti
+ * module will be not allowed.
+ */
+static inline void cti_lock(struct cti *cti)
+{
+        void __iomem *base = cti->base;
+        unsigned long val;
+        val = __raw_readl(base + LOCKSTATUS);
+        if (!(val & 1)) {
+                val = ~LOCKCODE;
+                __raw_writel(val, base + LOCKACCESS);
+        }
+}
+#endif
diff --git a/arch/arm/include/asm/edac.h b/arch/arm/include/asm/edac.h
new file mode 100644
index 00000000000..0df7a2c1fc3
--- /dev/null
+++ b/arch/arm/include/asm/edac.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2011 Calxeda, Inc.
+ * Based on PPC version Copyright 2007 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef ASM_EDAC_H
+#define ASM_EDAC_H
+/*
+ * ECC atomic, DMA, SMP and interrupt safe scrub function.
+ * Implements the per arch atomic_scrub() that EDAC use for software
+ * ECC scrubbing.  It reads memory and then writes back the original
+ * value, allowing the hardware to detect and correct memory errors.
+ */
+static inline void atomic_scrub(void *va, u32 size)
+{
+#if __LINUX_ARM_ARCH__ >= 6
+        unsigned int *virt_addr = va;
+        unsigned int temp, temp2;
+        unsigned int i;
+        for (i = 0; i < size / sizeof(*virt_addr); i++, virt_addr++) {
+                /* Very carefully read and write to memory atomically
+                 * so we are interrupt, DMA and SMP safe.
+                 */
+                __asm__ __volatile__("\n"
+                        "1:     ldrex   %0, [%2]\n"
+                        "       strex   %1, %0, [%2]\n"
+                        "       teq     %1, #0\n"
+                        "       bne     1b\n"
+                        : "=&r"(temp), "=&r"(temp2)
+                        : "r"(virt_addr)
+                        : "cc");
+        }
+#endif
+}
+#endif
diff --git a/arch/arm/include/asm/entry-macro-vic2.S b/arch/arm/include/asm/entry-macro-vic2.S
deleted file mode 100644
index 3ceb85e4385..00000000000
--- a/arch/arm/include/asm/entry-macro-vic2.S
+++ /dev/null
@@ -1,57 +0,0 @@
-/* arch/arm/include/asm/entry-macro-vic2.S
- *
- * Originally arch/arm/mach-s3c6400/include/mach/entry-macro.S
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      http://armlinux.simtec.co.uk/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * Low-level IRQ helper macros for a device with two VICs
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
-*/
-/* This should be included from <mach/entry-macro.S> with the necessary
- * defines for virtual addresses and IRQ bases for the two vics.
- *
- * The code needs the following defined:
- *      IRQ_VIC0_BASE   IRQ number of VIC0's first IRQ
- *      IRQ_VIC1_BASE   IRQ number of VIC1's first IRQ
- *      VA_VIC0         Virtual address of VIC0
- *      VA_VIC1         Virtual address of VIC1
- *
- * Note, code assumes VIC0's virtual address is an ARM immediate constant
- * away from VIC1.
-*/
-#include <asm/hardware/vic.h>
-        .macro  disable_fiq
-        .endm
-        .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =VA_VIC0
-        .endm
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        @ check the vic0
-        mov     \irqnr, #IRQ_VIC0_BASE + 31
-        ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
-        teq     \irqstat, #0
-        @ otherwise try vic1
-        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #(IRQ_VIC1_BASE - IRQ_VIC0_BASE)
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-        clzne   \irqstat, \irqstat
-        subne   \irqnr, \irqnr, \irqstat
-        .endm
diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index 11ad0bfbb0a..7151753b098 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -1,6 +1,10 @@
 #ifndef _ARCH_ARM_GPIO_H
 #define _ARCH_ARM_GPIO_H
+#if CONFIG_ARCH_NR_GPIO > 0
+#define ARCH_NR_GPIO CONFIG_ARCH_NR_GPIO
+#endif
 /* not all ARM platforms necessarily support this API ... */
 #include <mach/gpio.h>
diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h
index ddf07a92a6c..436e60b2cf7 100644
--- a/arch/arm/include/asm/hardirq.h
+++ b/arch/arm/include/asm/hardirq.h
@@ -27,23 +27,6 @@ u64 smp_irq_stat_cpu(unsigned int cpu);
 #define arch_irq_stat_cpu       smp_irq_stat_cpu
-#if NR_IRQS > 512
-#define HARDIRQ_BITS    10
-#elif NR_IRQS > 256
-#define HARDIRQ_BITS    9
-#else
-#define HARDIRQ_BITS    8
-#endif
-/*
- * The hardirq mask has to be large enough to have space
- * for potentially all IRQ sources in the system nesting
- * on a single CPU:
- */
-#if (1 << HARDIRQ_BITS) < NR_IRQS
-# error HARDIRQ_BITS is too low!
-#endif
 #define __ARCH_IRQ_EXIT_IRQS_DISABLED   1
 #endif /* __ASM_HARDIRQ_H */
diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S
deleted file mode 100644
index 74ebc803904..00000000000
--- a/arch/arm/include/asm/hardware/entry-macro-gic.S
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * arch/arm/include/asm/hardware/entry-macro-gic.S
- *
- * Low-level IRQ helper macros for GIC
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#include <asm/hardware/gic.h>
-#ifndef HAVE_GET_IRQNR_PREAMBLE
-        .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =gic_cpu_base_addr
-        ldr     \base, [\base]
-        .endm
-#endif
-/*
- * The interrupt numbering scheme is defined in the
- * interrupt controller spec.  To wit:
- *
- * Interrupts 0-15 are IPI
- * 16-31 are local.  We allow 30 to be used for the watchdog.
- * 32-1020 are global
- * 1021-1022 are reserved
- * 1023 is "spurious" (no interrupt)
- *
- * A simple read from the controller will tell us the number of the highest
- * priority enabled interrupt.  We then just need to check whether it is in the
- * valid range for an IRQ (30-1020 inclusive).
- */
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        ldr     \irqstat, [\base, #GIC_CPU_INTACK]
-        /* bits 12-10 = src CPU, 9-0 = int # */
-        ldr     \tmp, =1021
-        bic     \irqnr, \irqstat, #0x1c00
-        cmp     \irqnr, #15
-        cmpcc   \irqnr, \irqnr
-        cmpne   \irqnr, \tmp
-        cmpcs   \irqnr, \irqnr
-        .endm
-/* We assume that irqstat (the raw value of the IRQ acknowledge
- * register) is preserved from the macro above.
- * If there is an IPI, we immediately signal end of interrupt on the
- * controller, since this requires the original irqstat value which
- * we won't easily be able to recreate later.
- */
-        .macro test_for_ipi, irqnr, irqstat, base, tmp
-        bic     \irqnr, \irqstat, #0x1c00
-        cmp     \irqnr, #16
-        strcc   \irqstat, [\base, #GIC_CPU_EOI]
-        cmpcs   \irqnr, \irqnr
-        .endm
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 3e91f22046f..4bdfe001869 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -36,30 +36,22 @@
 #include <linux/irqdomain.h>
 struct device_node;
-extern void __iomem *gic_cpu_base_addr;
 extern struct irq_chip gic_arch_extn;
-void gic_init(unsigned int, int, void __iomem *, void __iomem *);
+void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
+                    u32 offset);
 int gic_of_init(struct device_node *node, struct device_node *parent);
 void gic_secondary_init(unsigned int);
+void gic_handle_irq(struct pt_regs *regs);
 void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
 void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
-struct gic_chip_data {
+static inline void gic_init(unsigned int nr, int start,
-        void __iomem *dist_base;
+                            void __iomem *dist , void __iomem *cpu)
-        void __iomem *cpu_base;
+{
-#ifdef CONFIG_CPU_PM
+        gic_init_bases(nr, start, dist, cpu, 0);
-        u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)];
+}
-        u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)];
-        u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
-        u32 __percpu *saved_ppi_enable;
-        u32 __percpu *saved_ppi_conf;
-#endif
-#ifdef CONFIG_IRQ_DOMAIN
-        struct irq_domain domain;
-#endif
-        unsigned int gic_irqs;
-};
 #endif
 #endif
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index 5d72550a809..f42ebd61959 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -41,7 +41,15 @@
 #define VIC_PL192_VECT_ADDR             0xF00
 #ifndef __ASSEMBLY__
+#include <linux/compiler.h>
+#include <linux/types.h>
+struct device_node;
+struct pt_regs;
 void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
-#endif
+int vic_of_init(struct device_node *node, struct device_node *parent);
+void vic_handle_irq(struct pt_regs *regs);
+#endif /* __ASSEMBLY__ */
 #endif
diff --git a/arch/arm/include/asm/idmap.h b/arch/arm/include/asm/idmap.h
new file mode 100644
index 00000000000..bf863edb517
--- /dev/null
+++ b/arch/arm/include/asm/idmap.h
@@ -0,0 +1,14 @@
+#ifndef __ASM_IDMAP_H
+#define __ASM_IDMAP_H
+#include <linux/compiler.h>
+#include <asm/pgtable.h>
+/* Tag a function as requiring to be executed via an identity mapping. */
+#define __idmap __section(.idmap.text) noinline notrace
+extern pgd_t *idmap_pgd;
+void setup_mm_for_reboot(void);
+#endif  /* __ASM_IDMAP_H */
diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h
new file mode 100644
index 00000000000..c0efdd60966
--- /dev/null
+++ b/arch/arm/include/asm/opcodes.h
@@ -0,0 +1,20 @@
+/*
+ *  arch/arm/include/asm/opcodes.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_ARM_OPCODES_H
+#define __ASM_ARM_OPCODES_H
+#ifndef __ASSEMBLY__
+extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
+#endif
+#define ARM_OPCODE_CONDTEST_FAIL   0
+#define ARM_OPCODE_CONDTEST_PASS   1
+#define ARM_OPCODE_CONDTEST_UNCOND 2
+#endif /* __ASM_ARM_OPCODES_H */
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index ca94653f1ec..97b440c25c5 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -151,7 +151,11 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from,
 #define clear_page(page)        memset((void *)(page), 0, PAGE_SIZE)
 extern void copy_page(void *to, const void *from);
+#ifdef CONFIG_ARM_LPAE
+#include <asm/pgtable-3level-types.h>
+#else
 #include <asm/pgtable-2level-types.h>
+#endif
 #endif /* CONFIG_MMU */
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index 0f8e3827a89..99cfe360798 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -32,7 +32,4 @@ enum arm_perf_pmu_ids {
 extern enum arm_perf_pmu_ids
 armpmu_get_pmu_id(void);
-extern int
-armpmu_get_max_events(void);
 #endif /* __ARM_PERF_EVENT_H__ */
diff --git a/arch/arm/include/asm/pgalloc.h b/arch/arm/include/asm/pgalloc.h
index 3e08fd3fbb6..943504f53f5 100644
--- a/arch/arm/include/asm/pgalloc.h
+++ b/arch/arm/include/asm/pgalloc.h
@@ -25,12 +25,34 @@
 #define _PAGE_USER_TABLE        (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER))
 #define _PAGE_KERNEL_TABLE      (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL))
+#ifdef CONFIG_ARM_LPAE
+static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
+{
+        return (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_REPEAT);
+}
+static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
+{
+        BUG_ON((unsigned long)pmd & (PAGE_SIZE-1));
+        free_page((unsigned long)pmd);
+}
+static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
+{
+        set_pud(pud, __pud(__pa(pmd) | PMD_TYPE_TABLE));
+}
+#else   /* !CONFIG_ARM_LPAE */
 /*
 * Since we have only two-level page tables, these are trivial
 */
 #define pmd_alloc_one(mm,addr)          ({ BUG(); ((pmd_t *)2); })
 #define pmd_free(mm, pmd)               do { } while (0)
-#define pgd_populate(mm,pmd,pte)        BUG()
+#define pud_populate(mm,pmd,pte)        BUG()
+#endif  /* CONFIG_ARM_LPAE */
 extern pgd_t *pgd_alloc(struct mm_struct *mm);
 extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
@@ -109,7 +131,9 @@ static inline void __pmd_populate(pmd_t *pmdp, phys_addr_t pte,
 {
        pmdval_t pmdval = (pte + PTE_HWTABLE_OFF) | prot;
        pmdp[0] = __pmd(pmdval);
+#ifndef CONFIG_ARM_LPAE
        pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t));
+#endif
        flush_pmd_entry(pmdp);
 }
diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h
index 470457e1cfc..2317a71c8f8 100644
--- a/arch/arm/include/asm/pgtable-2level.h
+++ b/arch/arm/include/asm/pgtable-2level.h
@@ -140,4 +140,45 @@
 #define L_PTE_MT_DEV_CACHED     (_AT(pteval_t, 0x0b) << 2)      /* 1011 */
 #define L_PTE_MT_MASK           (_AT(pteval_t, 0x0f) << 2)
+#ifndef __ASSEMBLY__
+/*
+ * The "pud_xxx()" functions here are trivial when the pmd is folded into
+ * the pud: the pud entry is never bad, always exists, and can't be set or
+ * cleared.
+ */
+#define pud_none(pud)           (0)
+#define pud_bad(pud)            (0)
+#define pud_present(pud)        (1)
+#define pud_clear(pudp)         do { } while (0)
+#define set_pud(pud,pudp)       do { } while (0)
+static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
+{
+        return (pmd_t *)pud;
+}
+#define pmd_bad(pmd)            (pmd_val(pmd) & 2)
+#define copy_pmd(pmdpd,pmdps)           \
+        do {                            \
+                pmdpd[0] = pmdps[0];    \
+                pmdpd[1] = pmdps[1];    \
+                flush_pmd_entry(pmdpd); \
+        } while (0)
+#define pmd_clear(pmdp)                 \
+        do {                            \
+                pmdp[0] = __pmd(0);     \
+                pmdp[1] = __pmd(0);     \
+                clean_pmd_entry(pmdp);  \
+        } while (0)
+/* we don't need complex calculations here as the pmd is folded into the pgd */
+#define pmd_addr_end(addr,end) (end)
+#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext)
+#endif /* __ASSEMBLY__ */
 #endif /* _ASM_PGTABLE_2LEVEL_H */
diff --git a/arch/arm/include/asm/pgtable-3level-hwdef.h b/arch/arm/include/asm/pgtable-3level-hwdef.h
new file mode 100644
index 00000000000..d7952824c5c
--- /dev/null
+++ b/arch/arm/include/asm/pgtable-3level-hwdef.h
@@ -0,0 +1,77 @@
+/*
+ * arch/arm/include/asm/pgtable-3level-hwdef.h
+ *
+ * Copyright (C) 2011 ARM Ltd.
+ * Author: Catalin Marinas <catalin.marinas@arm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef _ASM_PGTABLE_3LEVEL_HWDEF_H
+#define _ASM_PGTABLE_3LEVEL_HWDEF_H
+/*
+ * Hardware page table definitions.
+ *
+ * + Level 1/2 descriptor
+ *   - common
+ */
+#define PMD_TYPE_MASK           (_AT(pmdval_t, 3) << 0)
+#define PMD_TYPE_FAULT          (_AT(pmdval_t, 0) << 0)
+#define PMD_TYPE_TABLE          (_AT(pmdval_t, 3) << 0)
+#define PMD_TYPE_SECT           (_AT(pmdval_t, 1) << 0)
+#define PMD_BIT4                (_AT(pmdval_t, 0))
+#define PMD_DOMAIN(x)           (_AT(pmdval_t, 0))
+/*
+ *   - section
+ */
+#define PMD_SECT_BUFFERABLE     (_AT(pmdval_t, 1) << 2)
+#define PMD_SECT_CACHEABLE      (_AT(pmdval_t, 1) << 3)
+#define PMD_SECT_S              (_AT(pmdval_t, 3) << 8)
+#define PMD_SECT_AF             (_AT(pmdval_t, 1) << 10)
+#define PMD_SECT_nG             (_AT(pmdval_t, 1) << 11)
+#define PMD_SECT_XN             (_AT(pmdval_t, 1) << 54)
+#define PMD_SECT_AP_WRITE       (_AT(pmdval_t, 0))
+#define PMD_SECT_AP_READ        (_AT(pmdval_t, 0))
+#define PMD_SECT_TEX(x)         (_AT(pmdval_t, 0))
+/*
+ * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
+ */
+#define PMD_SECT_UNCACHED       (_AT(pmdval_t, 0) << 2) /* strongly ordered */
+#define PMD_SECT_BUFFERED       (_AT(pmdval_t, 1) << 2) /* normal non-cacheable */
+#define PMD_SECT_WT             (_AT(pmdval_t, 2) << 2) /* normal inner write-through */
+#define PMD_SECT_WB             (_AT(pmdval_t, 3) << 2) /* normal inner write-back */
+#define PMD_SECT_WBWA           (_AT(pmdval_t, 7) << 2) /* normal inner write-alloc */
+/*
+ * + Level 3 descriptor (PTE)
+ */
+#define PTE_TYPE_MASK           (_AT(pteval_t, 3) << 0)
+#define PTE_TYPE_FAULT          (_AT(pteval_t, 0) << 0)
+#define PTE_TYPE_PAGE           (_AT(pteval_t, 3) << 0)
+#define PTE_BUFFERABLE          (_AT(pteval_t, 1) << 2)         /* AttrIndx[0] */
+#define PTE_CACHEABLE           (_AT(pteval_t, 1) << 3)         /* AttrIndx[1] */
+#define PTE_EXT_SHARED          (_AT(pteval_t, 3) << 8)         /* SH[1:0], inner shareable */
+#define PTE_EXT_AF              (_AT(pteval_t, 1) << 10)        /* Access Flag */
+#define PTE_EXT_NG              (_AT(pteval_t, 1) << 11)        /* nG */
+#define PTE_EXT_XN              (_AT(pteval_t, 1) << 54)        /* XN */
+/*
+ * 40-bit physical address supported.
+ */
+#define PHYS_MASK_SHIFT         (40)
+#define PHYS_MASK               ((1ULL << PHYS_MASK_SHIFT) - 1)
+#endif
diff --git a/arch/arm/include/asm/pgtable-3level-types.h b/arch/arm/include/asm/pgtable-3level-types.h
new file mode 100644
index 00000000000..921aa30259c
--- /dev/null
+++ b/arch/arm/include/asm/pgtable-3level-types.h
@@ -0,0 +1,70 @@
+/*
+ * arch/arm/include/asm/pgtable-3level-types.h
+ *
+ * Copyright (C) 2011 ARM Ltd.
+ * Author: Catalin Marinas <catalin.marinas@arm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef _ASM_PGTABLE_3LEVEL_TYPES_H
+#define _ASM_PGTABLE_3LEVEL_TYPES_H
+#include <asm/types.h>
+typedef u64 pteval_t;
+typedef u64 pmdval_t;
+typedef u64 pgdval_t;
+#undef STRICT_MM_TYPECHECKS
+#ifdef STRICT_MM_TYPECHECKS
+/*
+ * These are used to make use of C type-checking..
+ */
+typedef struct { pteval_t pte; } pte_t;
+typedef struct { pmdval_t pmd; } pmd_t;
+typedef struct { pgdval_t pgd; } pgd_t;
+typedef struct { pteval_t pgprot; } pgprot_t;
+#define pte_val(x)      ((x).pte)
+#define pmd_val(x)      ((x).pmd)
+#define pgd_val(x)      ((x).pgd)
+#define pgprot_val(x)   ((x).pgprot)
+#define __pte(x)        ((pte_t) { (x) } )
+#define __pmd(x)        ((pmd_t) { (x) } )
+#define __pgd(x)        ((pgd_t) { (x) } )
+#define __pgprot(x)     ((pgprot_t) { (x) } )
+#else   /* !STRICT_MM_TYPECHECKS */
+typedef pteval_t pte_t;
+typedef pmdval_t pmd_t;
+typedef pgdval_t pgd_t;
+typedef pteval_t pgprot_t;
+#define pte_val(x)      (x)
+#define pmd_val(x)      (x)
+#define pgd_val(x)      (x)
+#define pgprot_val(x)   (x)
+#define __pte(x)        (x)
+#define __pmd(x)        (x)
+#define __pgd(x)        (x)
+#define __pgprot(x)     (x)
+#endif  /* STRICT_MM_TYPECHECKS */
+#endif  /* _ASM_PGTABLE_3LEVEL_TYPES_H */
diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h
new file mode 100644
index 00000000000..759af70f9a0
--- /dev/null
+++ b/arch/arm/include/asm/pgtable-3level.h
@@ -0,0 +1,155 @@
+/*
+ * arch/arm/include/asm/pgtable-3level.h
+ *
+ * Copyright (C) 2011 ARM Ltd.
+ * Author: Catalin Marinas <catalin.marinas@arm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef _ASM_PGTABLE_3LEVEL_H
+#define _ASM_PGTABLE_3LEVEL_H
+/*
+ * With LPAE, there are 3 levels of page tables. Each level has 512 entries of
+ * 8 bytes each, occupying a 4K page. The first level table covers a range of
+ * 512GB, each entry representing 1GB. Since we are limited to 4GB input
+ * address range, only 4 entries in the PGD are used.
+ *
+ * There are enough spare bits in a page table entry for the kernel specific
+ * state.
+ */
+#define PTRS_PER_PTE            512
+#define PTRS_PER_PMD            512
+#define PTRS_PER_PGD            4
+#define PTE_HWTABLE_PTRS        (PTRS_PER_PTE)
+#define PTE_HWTABLE_OFF         (0)
+#define PTE_HWTABLE_SIZE        (PTRS_PER_PTE * sizeof(u64))
+/*
+ * PGDIR_SHIFT determines the size a top-level page table entry can map.
+ */
+#define PGDIR_SHIFT             30
+/*
+ * PMD_SHIFT determines the size a middle-level page table entry can map.
+ */
+#define PMD_SHIFT               21
+#define PMD_SIZE                (1UL << PMD_SHIFT)
+#define PMD_MASK                (~(PMD_SIZE-1))
+#define PGDIR_SIZE              (1UL << PGDIR_SHIFT)
+#define PGDIR_MASK              (~(PGDIR_SIZE-1))
+/*
+ * section address mask and size definitions.
+ */
+#define SECTION_SHIFT           21
+#define SECTION_SIZE            (1UL << SECTION_SHIFT)
+#define SECTION_MASK            (~(SECTION_SIZE-1))
+#define USER_PTRS_PER_PGD       (PAGE_OFFSET / PGDIR_SIZE)
+/*
+ * "Linux" PTE definitions for LPAE.
+ *
+ * These bits overlap with the hardware bits but the naming is preserved for
+ * consistency with the classic page table format.
+ */
+#define L_PTE_PRESENT           (_AT(pteval_t, 3) << 0)         /* Valid */
+#define L_PTE_FILE              (_AT(pteval_t, 1) << 2)         /* only when !PRESENT */
+#define L_PTE_BUFFERABLE        (_AT(pteval_t, 1) << 2)         /* AttrIndx[0] */
+#define L_PTE_CACHEABLE         (_AT(pteval_t, 1) << 3)         /* AttrIndx[1] */
+#define L_PTE_USER              (_AT(pteval_t, 1) << 6)         /* AP[1] */
+#define L_PTE_RDONLY            (_AT(pteval_t, 1) << 7)         /* AP[2] */
+#define L_PTE_SHARED            (_AT(pteval_t, 3) << 8)         /* SH[1:0], inner shareable */
+#define L_PTE_YOUNG             (_AT(pteval_t, 1) << 10)        /* AF */
+#define L_PTE_XN                (_AT(pteval_t, 1) << 54)        /* XN */
+#define L_PTE_DIRTY             (_AT(pteval_t, 1) << 55)        /* unused */
+#define L_PTE_SPECIAL           (_AT(pteval_t, 1) << 56)        /* unused */
+/*
+ * To be used in assembly code with the upper page attributes.
+ */
+#define L_PTE_XN_HIGH           (1 << (54 - 32))
+#define L_PTE_DIRTY_HIGH        (1 << (55 - 32))
+/*
+ * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
+ */
+#define L_PTE_MT_UNCACHED       (_AT(pteval_t, 0) << 2) /* strongly ordered */
+#define L_PTE_MT_BUFFERABLE     (_AT(pteval_t, 1) << 2) /* normal non-cacheable */
+#define L_PTE_MT_WRITETHROUGH   (_AT(pteval_t, 2) << 2) /* normal inner write-through */
+#define L_PTE_MT_WRITEBACK      (_AT(pteval_t, 3) << 2) /* normal inner write-back */
+#define L_PTE_MT_WRITEALLOC     (_AT(pteval_t, 7) << 2) /* normal inner write-alloc */
+#define L_PTE_MT_DEV_SHARED     (_AT(pteval_t, 4) << 2) /* device */
+#define L_PTE_MT_DEV_NONSHARED  (_AT(pteval_t, 4) << 2) /* device */
+#define L_PTE_MT_DEV_WC         (_AT(pteval_t, 1) << 2) /* normal non-cacheable */
+#define L_PTE_MT_DEV_CACHED     (_AT(pteval_t, 3) << 2) /* normal inner write-back */
+#define L_PTE_MT_MASK           (_AT(pteval_t, 7) << 2)
+/*
+ * Software PGD flags.
+ */
+#define L_PGD_SWAPPER           (_AT(pgdval_t, 1) << 55)        /* swapper_pg_dir entry */
+#ifndef __ASSEMBLY__
+#define pud_none(pud)           (!pud_val(pud))
+#define pud_bad(pud)            (!(pud_val(pud) & 2))
+#define pud_present(pud)        (pud_val(pud))
+#define pud_clear(pudp)                 \
+        do {                            \
+                *pudp = __pud(0);       \
+                clean_pmd_entry(pudp);  \
+        } while (0)
+#define set_pud(pudp, pud)              \
+        do {                            \
+                *pudp = pud;            \
+                flush_pmd_entry(pudp);  \
+        } while (0)
+static inline pmd_t *pud_page_vaddr(pud_t pud)
+{
+        return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
+}
+/* Find an entry in the second-level page table.. */
+#define pmd_index(addr)         (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
+static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
+{
+        return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr);
+}
+#define pmd_bad(pmd)            (!(pmd_val(pmd) & 2))
+#define copy_pmd(pmdpd,pmdps)           \
+        do {                            \
+                *pmdpd = *pmdps;        \
+                flush_pmd_entry(pmdpd); \
+        } while (0)
+#define pmd_clear(pmdp)                 \
+        do {                            \
+                *pmdp = __pmd(0);       \
+                clean_pmd_entry(pmdp);  \
+        } while (0)
+#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,__pte(pte_val(pte)|(ext)))
+#endif /* __ASSEMBLY__ */
+#endif /* _ASM_PGTABLE_3LEVEL_H */
diff --git a/arch/arm/include/asm/pgtable-hwdef.h b/arch/arm/include/asm/pgtable-hwdef.h
index 183111164ce..8426229ba29 100644
--- a/arch/arm/include/asm/pgtable-hwdef.h
+++ b/arch/arm/include/asm/pgtable-hwdef.h
@@ -10,6 +10,10 @@
 #ifndef _ASMARM_PGTABLE_HWDEF_H
 #define _ASMARM_PGTABLE_HWDEF_H
+#ifdef CONFIG_ARM_LPAE
+#include <asm/pgtable-3level-hwdef.h>
+#else
 #include <asm/pgtable-2level-hwdef.h>
+#endif
 #endif
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 9451dce3a55..f66626d71e7 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -11,20 +11,24 @@
 #define _ASMARM_PGTABLE_H
 #include <linux/const.h>
-#include <asm-generic/4level-fixup.h>
 #include <asm/proc-fns.h>
 #ifndef CONFIG_MMU
+#include <asm-generic/4level-fixup.h>
 #include "pgtable-nommu.h"
 #else
+#include <asm-generic/pgtable-nopud.h>
 #include <asm/memory.h>
-#include <mach/vmalloc.h>
 #include <asm/pgtable-hwdef.h>
+#ifdef CONFIG_ARM_LPAE
+#include <asm/pgtable-3level.h>
+#else
 #include <asm/pgtable-2level.h>
+#endif
 /*
 * Just any arbitrary offset to the start of the vmalloc VM area: the
@@ -33,15 +37,10 @@
 * any out-of-bounds memory accesses will hopefully be caught.
 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
 * area for the same reason. ;)
- *
- * Note that platforms may override VMALLOC_START, but they must provide
- * VMALLOC_END.  VMALLOC_END defines the (exclusive) limit of this space,
- * which may not overlap IO space.
 */
-#ifndef VMALLOC_START
 #define VMALLOC_OFFSET          (8*1024*1024)
 #define VMALLOC_START           (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#endif
+#define VMALLOC_END             0xff000000UL
 #define LIBRARY_TEXT_START      0x0c000000
@@ -163,39 +162,8 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 /* to find an entry in a kernel page-table-directory */
 #define pgd_offset_k(addr)      pgd_offset(&init_mm, addr)
-/*
- * The "pgd_xxx()" functions here are trivial for a folded two-level
- * setup: the pgd is never bad, and a pmd always exists (as it's folded
- * into the pgd entry)
- */
-#define pgd_none(pgd)           (0)
-#define pgd_bad(pgd)            (0)
-#define pgd_present(pgd)        (1)
-#define pgd_clear(pgdp)         do { } while (0)
-#define set_pgd(pgd,pgdp)       do { } while (0)
-#define set_pud(pud,pudp)       do { } while (0)
-/* Find an entry in the second-level page table.. */
-#define pmd_offset(dir, addr)   ((pmd_t *)(dir))
 #define pmd_none(pmd)           (!pmd_val(pmd))
 #define pmd_present(pmd)        (pmd_val(pmd))
-#define pmd_bad(pmd)            (pmd_val(pmd) & 2)
-#define copy_pmd(pmdpd,pmdps)           \
-        do {                            \
-                pmdpd[0] = pmdps[0];    \
-                pmdpd[1] = pmdps[1];    \
-                flush_pmd_entry(pmdpd); \
-        } while (0)
-#define pmd_clear(pmdp)                 \
-        do {                            \
-                pmdp[0] = __pmd(0);     \
-                pmdp[1] = __pmd(0);     \
-                clean_pmd_entry(pmdp);  \
-        } while (0)
 static inline pte_t *pmd_page_vaddr(pmd_t pmd)
 {
@@ -204,10 +172,6 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
 #define pmd_page(pmd)           pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
-/* we don't need complex calculations here as the pmd is folded into the pgd */
-#define pmd_addr_end(addr,end)  (end)
 #ifndef CONFIG_HIGHPTE
 #define __pte_map(pmd)          pmd_page_vaddr(*(pmd))
 #define __pte_unmap(pte)        do { } while (0)
@@ -229,7 +193,6 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
 #define pte_page(pte)           pfn_to_page(pte_pfn(pte))
 #define mk_pte(page,prot)       pfn_pte(page_to_pfn(page), prot)
-#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext)
 #define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
 #if __LINUX_ARM_ARCH__ < 6
@@ -336,6 +299,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 * We provide our own arch_get_unmapped_area to cope with VIPT caches.
 */
 #define HAVE_ARCH_UNMAPPED_AREA
+#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
 /*
 * remap a physical page `pfn' of size `size' with page protection `prot'
@@ -346,9 +310,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 #define pgtable_cache_init() do { } while (0)
-void identity_mapping_add(pgd_t *, unsigned long, unsigned long);
-void identity_mapping_del(pgd_t *, unsigned long, unsigned long);
 #endif /* !__ASSEMBLY__ */
 #endif /* CONFIG_MMU */
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index 0bda22c094a..b5a5be2536c 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -27,13 +27,22 @@ enum arm_pmu_type {
 /*
 * struct arm_pmu_platdata - ARM PMU platform data
 *
- * @handle_irq: an optional handler which will be called from the interrupt and
+ * @handle_irq: an optional handler which will be called from the
- * passed the address of the low level handler, and can be used to implement
+ *      interrupt and passed the address of the low level handler,
- * any platform specific handling before or after calling it.
+ *      and can be used to implement any platform specific handling
+ *      before or after calling it.
+ * @enable_irq: an optional handler which will be called after
+ *      request_irq and be used to handle some platform specific
+ *      irq enablement
+ * @disable_irq: an optional handler which will be called before
+ *      free_irq and be used to handle some platform specific
+ *      irq disablement
 */
 struct arm_pmu_platdata {
        irqreturn_t (*handle_irq)(int irq, void *dev,
                                  irq_handler_t pmu_handler);
+        void (*enable_irq)(int irq);
+        void (*disable_irq)(int irq);
 };
 #ifdef CONFIG_CPU_HAS_PMU
diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h
index 9e92cb205e6..f3628fb3d2b 100644
--- a/arch/arm/include/asm/proc-fns.h
+++ b/arch/arm/include/asm/proc-fns.h
@@ -65,7 +65,11 @@ extern struct processor {
         * Set a possibly extended PTE.  Non-extended PTEs should
         * ignore 'ext'.
         */
+#ifdef CONFIG_ARM_LPAE
+        void (*set_pte_ext)(pte_t *ptep, pte_t pte);
+#else
        void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext);
+#endif
        /* Suspend/resume */
        unsigned int suspend_size;
@@ -79,7 +83,11 @@ extern void cpu_proc_fin(void);
 extern int cpu_do_idle(void);
 extern void cpu_dcache_clean_area(void *, int);
 extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
+#ifdef CONFIG_ARM_LPAE
+extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte);
+#else
 extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
+#endif
 extern void cpu_reset(unsigned long addr) __attribute__((noreturn));
 /* These three are private to arch/arm/kernel/suspend.c */
@@ -107,6 +115,18 @@ extern void cpu_resume(void);
 #define cpu_switch_mm(pgd,mm) cpu_do_switch_mm(virt_to_phys(pgd),mm)
+#ifdef CONFIG_ARM_LPAE
+#define cpu_get_pgd()   \
+        ({                                              \
+                unsigned long pg, pg2;                  \
+                __asm__("mrrc   p15, 0, %0, %1, c2"     \
+                        : "=r" (pg), "=r" (pg2)         \
+                        :                               \
+                        : "cc");                        \
+                pg &= ~(PTRS_PER_PGD*sizeof(pgd_t)-1);  \
+                (pgd_t *)phys_to_virt(pg);              \
+        })
+#else
 #define cpu_get_pgd()   \
        ({                                              \
                unsigned long pg;                       \
@@ -115,6 +135,7 @@ extern void cpu_resume(void);
                pg &= ~0x3fff;                          \
                (pgd_t *)phys_to_virt(pg);              \
        })
+#endif
 #endif
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index b2d9df5667a..ce280b8d613 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -123,6 +123,8 @@ static inline void prefetch(const void *ptr)
 #endif
+#define HAVE_ARCH_PICK_MMAP_LAYOUT
 #endif
 #endif /* __ASM_ARM_PROCESSOR_H */
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index c8e6ddf3e86..e3f75726343 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -8,113 +8,7 @@
 #ifndef ASM_SCHED_CLOCK
 #define ASM_SCHED_CLOCK
-#include <linux/kernel.h>
-#include <linux/types.h>
-struct clock_data {
-        u64 epoch_ns;
-        u32 epoch_cyc;
-        u32 epoch_cyc_copy;
-        u32 mult;
-        u32 shift;
-};
-#define DEFINE_CLOCK_DATA(name) struct clock_data name
-static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
-{
-        return (cyc * mult) >> shift;
-}
-/*
- * Atomically update the sched_clock epoch.  Your update callback will
- * be called from a timer before the counter wraps - read the current
- * counter value, and call this function to safely move the epochs
- * forward.  Only use this from the update callback.
- */
-static inline void update_sched_clock(struct clock_data *cd, u32 cyc, u32 mask)
-{
-        unsigned long flags;
-        u64 ns = cd->epoch_ns +
-                cyc_to_ns((cyc - cd->epoch_cyc) & mask, cd->mult, cd->shift);
-        /*
-         * Write epoch_cyc and epoch_ns in a way that the update is
-         * detectable in cyc_to_fixed_sched_clock().
-         */
-        raw_local_irq_save(flags);
-        cd->epoch_cyc = cyc;
-        smp_wmb();
-        cd->epoch_ns = ns;
-        smp_wmb();
-        cd->epoch_cyc_copy = cyc;
-        raw_local_irq_restore(flags);
-}
-/*
- * If your clock rate is known at compile time, using this will allow
- * you to optimize the mult/shift loads away.  This is paired with
- * init_fixed_sched_clock() to ensure that your mult/shift are correct.
- */
-static inline unsigned long long cyc_to_fixed_sched_clock(struct clock_data *cd,
-        u32 cyc, u32 mask, u32 mult, u32 shift)
-{
-        u64 epoch_ns;
-        u32 epoch_cyc;
-        /*
-         * Load the epoch_cyc and epoch_ns atomically.  We do this by
-         * ensuring that we always write epoch_cyc, epoch_ns and
-         * epoch_cyc_copy in strict order, and read them in strict order.
-         * If epoch_cyc and epoch_cyc_copy are not equal, then we're in
-         * the middle of an update, and we should repeat the load.
-         */
-        do {
-                epoch_cyc = cd->epoch_cyc;
-                smp_rmb();
-                epoch_ns = cd->epoch_ns;
-                smp_rmb();
-        } while (epoch_cyc != cd->epoch_cyc_copy);
-        return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, mult, shift);
-}
-/*
- * Otherwise, you need to use this, which will obtain the mult/shift
- * from the clock_data structure.  Use init_sched_clock() with this.
- */
-static inline unsigned long long cyc_to_sched_clock(struct clock_data *cd,
-        u32 cyc, u32 mask)
-{
-        return cyc_to_fixed_sched_clock(cd, cyc, mask, cd->mult, cd->shift);
-}
-/*
- * Initialize the clock data - calculate the appropriate multiplier
- * and shift.  Also setup a timer to ensure that the epoch is refreshed
- * at the appropriate time interval, which will call your update
- * handler.
- */
-void init_sched_clock(struct clock_data *, void (*)(void),
-        unsigned int, unsigned long);
-/*
- * Use this initialization function rather than init_sched_clock() if
- * you're using cyc_to_fixed_sched_clock, which will warn if your
- * constants are incorrect.
- */
-static inline void init_fixed_sched_clock(struct clock_data *cd,
-        void (*update)(void), unsigned int bits, unsigned long rate,
-        u32 mult, u32 shift)
-{
-        init_sched_clock(cd, update, bits, rate);
-        if (cd->mult != mult || cd->shift != shift) {
-                pr_crit("sched_clock: wrong multiply/shift: %u>>%u vs calculated %u>>%u\n"
-                        "sched_clock: fix multiply/shift to avoid scheduler hiccups\n",
-                        mult, shift, cd->mult, cd->shift);
-        }
-}
 extern void sched_clock_postinit(void);
+extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
 #endif
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index 915696dd9c7..23ebc0c82a3 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -192,11 +192,7 @@ static const struct tagtable __tagtable_##fn __tag = { tag, fn }
 /*
 * Memory map description
 */
-#ifdef CONFIG_ARCH_EP93XX
+#define NR_BANKS        CONFIG_ARM_NR_BANKS
-# define NR_BANKS 16
-#else
-# define NR_BANKS 8
-#endif
 struct membank {
        phys_addr_t start;
diff --git a/arch/arm/include/asm/swab.h b/arch/arm/include/asm/swab.h
index 9997ad20eff..32ee164a2f6 100644
--- a/arch/arm/include/asm/swab.h
+++ b/arch/arm/include/asm/swab.h
@@ -24,12 +24,13 @@
 #if defined(__KERNEL__) && __LINUX_ARM_ARCH__ >= 6
-static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
+static inline __attribute_const__ __u32 __arch_swahb32(__u32 x)
 {
        __asm__ ("rev16 %0, %1" : "=r" (x) : "r" (x));
        return x;
 }
-#define __arch_swab16 __arch_swab16
+#define __arch_swahb32 __arch_swahb32
+#define __arch_swab16(x) ((__u16)__arch_swahb32(x))
 static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
 {
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 03775b14be8..e4c96cc6ec0 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -80,6 +80,14 @@ struct siginfo;
 void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info,
                unsigned long err, unsigned long trap);
+#ifdef CONFIG_ARM_LPAE
+#define FAULT_CODE_ALIGNMENT    33
+#define FAULT_CODE_DEBUG        34
+#else
+#define FAULT_CODE_ALIGNMENT    1
+#define FAULT_CODE_DEBUG        2
+#endif
 void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
                                       struct pt_regs *),
                     int sig, int code, const char *name);
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 265f908c4a6..5d3ed7e3856 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -202,8 +202,18 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
        tlb_remove_page(tlb, pte);
 }
+static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
+                                  unsigned long addr)
+{
+#ifdef CONFIG_ARM_LPAE
+        tlb_add_flush(tlb, addr);
+        tlb_remove_page(tlb, virt_to_page(pmdp));
+#endif
+}
 #define pte_free_tlb(tlb, ptep, addr)   __pte_free_tlb(tlb, ptep, addr)
-#define pmd_free_tlb(tlb, pmdp, addr)   pmd_free((tlb)->mm, pmdp)
+#define pmd_free_tlb(tlb, pmdp, addr)   __pmd_free_tlb(tlb, pmdp, addr)
+#define pud_free_tlb(tlb, pudp, addr)   pud_free((tlb)->mm, pudp)
 #define tlb_migrate_finish(mm)          do { } while (0)
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 16eed6aebfa..43b740d0e37 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -13,7 +13,7 @@ CFLAGS_REMOVE_return_address.o = -pg
 # Object file lists.
-obj-y           := elf.o entry-armv.o entry-common.o irq.o \
+obj-y           := elf.o entry-armv.o entry-common.o irq.o opcodes.o \
                   process.o ptrace.o return_address.o setup.o signal.o \
                   sys_arm.o stacktrace.o time.o traps.o
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index b145f16c91b..3a456c6c700 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -36,12 +36,11 @@
 #ifdef CONFIG_MULTI_IRQ_HANDLER
        ldr     r1, =handle_arch_irq
        mov     r0, sp
-        ldr     r1, [r1]
        adr     lr, BSYM(9997f)
-        teq     r1, #0
+        ldr     pc, [r1]
-        movne   pc, r1
+#else
-#endif
        arch_irq_handler_default
+#endif
 9997:
        .endm
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 08c82fd844a..14e277d2ff9 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -39,8 +39,14 @@
 #error KERNEL_RAM_VADDR must start at 0xXXXX8000
 #endif
+#ifdef CONFIG_ARM_LPAE
+        /* LPAE requires an additional page for the PGD */
+#define PG_DIR_SIZE     0x5000
+#define PMD_ORDER       3
+#else
 #define PG_DIR_SIZE     0x4000
 #define PMD_ORDER       2
+#endif
        .globl  swapper_pg_dir
        .equ    swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE
@@ -164,17 +170,36 @@ __create_page_tables:
        teq     r0, r6
        bne     1b
+#ifdef CONFIG_ARM_LPAE
+        /*
+         * Build the PGD table (first level) to point to the PMD table. A PGD
+         * entry is 64-bit wide.
+         */
+        mov     r0, r4
+        add     r3, r4, #0x1000                 @ first PMD table address
+        orr     r3, r3, #3                      @ PGD block type
+        mov     r6, #4                          @ PTRS_PER_PGD
+        mov     r7, #1 << (55 - 32)             @ L_PGD_SWAPPER
+1:      str     r3, [r0], #4                    @ set bottom PGD entry bits
+        str     r7, [r0], #4                    @ set top PGD entry bits
+        add     r3, r3, #0x1000                 @ next PMD table
+        subs    r6, r6, #1
+        bne     1b
+        add     r4, r4, #0x1000                 @ point to the PMD tables
+#endif
        ldr     r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags
        /*
         * Create identity mapping to cater for __enable_mmu.
         * This identity mapping will be removed by paging_init().
         */
-        adr     r0, __enable_mmu_loc
+        adr     r0, __turn_mmu_on_loc
        ldmia   r0, {r3, r5, r6}
        sub     r0, r0, r3                      @ virt->phys offset
-        add     r5, r5, r0                      @ phys __enable_mmu
+        add     r5, r5, r0                      @ phys __turn_mmu_on
-        add     r6, r6, r0                      @ phys __enable_mmu_end
+        add     r6, r6, r0                      @ phys __turn_mmu_on_end
        mov     r5, r5, lsr #SECTION_SHIFT
        mov     r6, r6, lsr #SECTION_SHIFT
@@ -219,8 +244,8 @@ __create_page_tables:
 #endif
        /*
-         * Then map boot params address in r2 or
+         * Then map boot params address in r2 or the first 1MB (2MB with LPAE)
-         * the first 1MB of ram if boot params address is not specified.
+         * of ram if boot params address is not specified.
         */
        mov     r0, r2, lsr #SECTION_SHIFT
        movs    r0, r0, lsl #SECTION_SHIFT
@@ -251,7 +276,15 @@ __create_page_tables:
        mov     r3, r7, lsr #SECTION_SHIFT
        ldr     r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
        orr     r3, r7, r3, lsl #SECTION_SHIFT
+#ifdef CONFIG_ARM_LPAE
+        mov     r7, #1 << (54 - 32)             @ XN
+#else
+        orr     r3, r3, #PMD_SECT_XN
+#endif
 1:      str     r3, [r0], #4
+#ifdef CONFIG_ARM_LPAE
+        str     r7, [r0], #4
+#endif
        add     r3, r3, #1 << SECTION_SHIFT
        cmp     r0, r6
        blo     1b
@@ -283,14 +316,17 @@ __create_page_tables:
        str     r3, [r0]
 #endif
 #endif
+#ifdef CONFIG_ARM_LPAE
+        sub     r4, r4, #0x1000         @ point to the PGD table
+#endif
        mov     pc, lr
 ENDPROC(__create_page_tables)
        .ltorg
        .align
-__enable_mmu_loc:
+__turn_mmu_on_loc:
        .long   .
-        .long   __enable_mmu
+        .long   __turn_mmu_on
-        .long   __enable_mmu_end
+        .long   __turn_mmu_on_end
 #if defined(CONFIG_SMP)
        __CPUINIT
@@ -374,12 +410,17 @@ __enable_mmu:
 #ifdef CONFIG_CPU_ICACHE_DISABLE
        bic     r0, r0, #CR_I
 #endif
+#ifdef CONFIG_ARM_LPAE
+        mov     r5, #0
+        mcrr    p15, 0, r4, r5, c2              @ load TTBR0
+#else
        mov     r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
                      domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
                      domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
                      domain_val(DOMAIN_IO, DOMAIN_CLIENT))
        mcr     p15, 0, r5, c3, c0, 0           @ load domain access register
        mcr     p15, 0, r4, c2, c0, 0           @ load page table pointer
+#endif
        b       __turn_mmu_on
 ENDPROC(__enable_mmu)
@@ -398,15 +439,19 @@ ENDPROC(__enable_mmu)
 * other registers depend on the function called upon completion
 */
        .align  5
-__turn_mmu_on:
+        .pushsection    .idmap.text, "ax"
+ENTRY(__turn_mmu_on)
        mov     r0, r0
+        instr_sync
        mcr     p15, 0, r0, c1, c0, 0           @ write control reg
        mrc     p15, 0, r3, c0, c0, 0           @ read id reg
+        instr_sync
        mov     r3, r3
        mov     r3, r13
        mov     pc, r3
-__enable_mmu_end:
+__turn_mmu_on_end:
 ENDPROC(__turn_mmu_on)
+        .popsection
 #ifdef CONFIG_SMP_ON_UP
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 814a52a9dc3..d6a95ef9131 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -1016,10 +1016,10 @@ static int __init arch_hw_breakpoint_init(void)
        }
        /* Register debug fault handler. */
-        hook_fault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT,
+        hook_fault_code(FAULT_CODE_DEBUG, hw_breakpoint_pending, SIGTRAP,
-                        "watchpoint debug exception");
+                        TRAP_HWBKPT, "watchpoint debug exception");
-        hook_ifault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT,
+        hook_ifault_code(FAULT_CODE_DEBUG, hw_breakpoint_pending, SIGTRAP,
-                        "breakpoint debug exception");
+                        TRAP_HWBKPT, "breakpoint debug exception");
        /* Register hotplug notifier. */
        register_cpu_notifier(&dbg_reset_nb);
diff --git a/arch/arm/kernel/kprobes-test.c b/arch/arm/kernel/kprobes-test.c
index e17cdd6d90d..1862d8f2fd4 100644
--- a/arch/arm/kernel/kprobes-test.c
+++ b/arch/arm/kernel/kprobes-test.c
@@ -202,6 +202,8 @@
 #include <linux/slab.h>
 #include <linux/kprobes.h>
+#include <asm/opcodes.h>
 #include "kprobes.h"
 #include "kprobes-test.h"
@@ -1050,65 +1052,9 @@ static int test_instance;
 static unsigned long test_check_cc(int cc, unsigned long cpsr)
 {
-        unsigned long temp;
+        int ret = arm_check_condition(cc << 28, cpsr);
-        switch (cc) {
-        case 0x0: /* eq */
-                return cpsr & PSR_Z_BIT;
-        case 0x1: /* ne */
-                return (~cpsr) & PSR_Z_BIT;
-        case 0x2: /* cs */
-                return cpsr & PSR_C_BIT;
-        case 0x3: /* cc */
-                return (~cpsr) & PSR_C_BIT;
-        case 0x4: /* mi */
-                return cpsr & PSR_N_BIT;
-        case 0x5: /* pl */
-                return (~cpsr) & PSR_N_BIT;
-        case 0x6: /* vs */
-                return cpsr & PSR_V_BIT;
-        case 0x7: /* vc */
-                return (~cpsr) & PSR_V_BIT;
-        case 0x8: /* hi */
+        return (ret != ARM_OPCODE_CONDTEST_FAIL);
-                cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
-                return cpsr & PSR_C_BIT;
-        case 0x9: /* ls */
-                cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
-                return (~cpsr) & PSR_C_BIT;
-        case 0xa: /* ge */
-                cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
-                return (~cpsr) & PSR_N_BIT;
-        case 0xb: /* lt */
-                cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
-                return cpsr & PSR_N_BIT;
-        case 0xc: /* gt */
-                temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
-                temp |= (cpsr << 1);       /* PSR_N_BIT |= PSR_Z_BIT */
-                return (~temp) & PSR_N_BIT;
-        case 0xd: /* le */
-                temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
-                temp |= (cpsr << 1);       /* PSR_N_BIT |= PSR_Z_BIT */
-                return temp & PSR_N_BIT;
-        case 0xe: /* al */
-        case 0xf: /* unconditional */
-                return true;
-        }
-        BUG();
-        return false;
 }
 static int is_last_scenario;
@@ -1128,7 +1074,9 @@ static unsigned long test_context_cpsr(int scenario)
        if (!test_case_is_thumb) {
                /* Testing ARM code */
-                probe_should_run = test_check_cc(current_instruction >> 28, cpsr) != 0;
+                int cc = current_instruction >> 28;
+                probe_should_run = test_check_cc(cc, cpsr) != 0;
                if (scenario == 15)
                        is_last_scenario = true;
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 29620b632ed..764bd456d84 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -12,12 +12,11 @@
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 #include <asm/mach-types.h>
+#include <asm/system.h>
 extern const unsigned char relocate_new_kernel[];
 extern const unsigned int relocate_new_kernel_size;
-extern void setup_mm_for_reboot(void);
 extern unsigned long kexec_start_address;
 extern unsigned long kexec_indirection_page;
 extern unsigned long kexec_mach_type;
@@ -111,14 +110,6 @@ void machine_kexec(struct kimage *image)
        if (kexec_reinit)
                kexec_reinit();
-        local_irq_disable();
-        local_fiq_disable();
+        soft_restart(reboot_code_buffer_phys);
-        setup_mm_for_reboot();
-        flush_cache_all();
-        outer_flush_all();
-        outer_disable();
-        cpu_proc_fin();
-        outer_inv_all();
-        flush_cache_all();
-        cpu_reset(reboot_code_buffer_phys);
 }
diff --git a/arch/arm/kernel/opcodes.c b/arch/arm/kernel/opcodes.c
new file mode 100644
index 00000000000..f8179c6a817
--- /dev/null
+++ b/arch/arm/kernel/opcodes.c
@@ -0,0 +1,72 @@
+/*
+ *  linux/arch/arm/kernel/opcodes.c
+ *
+ *  A32 condition code lookup feature moved from nwfpe/fpopcode.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/module.h>
+#include <asm/opcodes.h>
+#define ARM_OPCODE_CONDITION_UNCOND 0xf
+/*
+ * condition code lookup table
+ * index into the table is test code: EQ, NE, ... LT, GT, AL, NV
+ *
+ * bit position in short is condition code: NZCV
+ */
+static const unsigned short cc_map[16] = {
+        0xF0F0,                 /* EQ == Z set            */
+        0x0F0F,                 /* NE                     */
+        0xCCCC,                 /* CS == C set            */
+        0x3333,                 /* CC                     */
+        0xFF00,                 /* MI == N set            */
+        0x00FF,                 /* PL                     */
+        0xAAAA,                 /* VS == V set            */
+        0x5555,                 /* VC                     */
+        0x0C0C,                 /* HI == C set && Z clear */
+        0xF3F3,                 /* LS == C clear || Z set */
+        0xAA55,                 /* GE == (N==V)           */
+        0x55AA,                 /* LT == (N!=V)           */
+        0x0A05,                 /* GT == (!Z && (N==V))   */
+        0xF5FA,                 /* LE == (Z || (N!=V))    */
+        0xFFFF,                 /* AL always              */
+        0                       /* NV                     */
+};
+/*
+ * Returns:
+ * ARM_OPCODE_CONDTEST_FAIL   - if condition fails
+ * ARM_OPCODE_CONDTEST_PASS   - if condition passes (including AL)
+ * ARM_OPCODE_CONDTEST_UNCOND - if NV condition, or separate unconditional
+ *                              opcode space from v5 onwards
+ *
+ * Code that tests whether a conditional instruction would pass its condition
+ * check should check that return value == ARM_OPCODE_CONDTEST_PASS.
+ *
+ * Code that tests if a condition means that the instruction would be executed
+ * (regardless of conditional or unconditional) should instead check that the
+ * return value != ARM_OPCODE_CONDTEST_FAIL.
+ */
+asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr)
+{
+        u32 cc_bits  = opcode >> 28;
+        u32 psr_cond = psr >> 28;
+        unsigned int ret;
+        if (cc_bits != ARM_OPCODE_CONDITION_UNCOND) {
+                if ((cc_map[cc_bits] >> (psr_cond)) & 1)
+                        ret = ARM_OPCODE_CONDTEST_PASS;
+                else
+                        ret = ARM_OPCODE_CONDTEST_FAIL;
+        } else {
+                ret = ARM_OPCODE_CONDTEST_UNCOND;
+        }
+        return ret;
+}
+EXPORT_SYMBOL_GPL(arm_check_condition);
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 88b0941ce51..5bb91bf3d47 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -59,8 +59,7 @@ armpmu_get_pmu_id(void)
 }
 EXPORT_SYMBOL_GPL(armpmu_get_pmu_id);
-int
+int perf_num_counters(void)
-armpmu_get_max_events(void)
 {
        int max_events = 0;
@@ -69,12 +68,6 @@ armpmu_get_max_events(void)
        return max_events;
 }
-EXPORT_SYMBOL_GPL(armpmu_get_max_events);
-int perf_num_counters(void)
-{
-        return armpmu_get_max_events();
-}
 EXPORT_SYMBOL_GPL(perf_num_counters);
 #define HW_OP_UNSUPPORTED               0xFFFF
@@ -380,6 +373,8 @@ armpmu_release_hardware(struct arm_pmu *armpmu)
 {
        int i, irq, irqs;
        struct platform_device *pmu_device = armpmu->plat_device;
+        struct arm_pmu_platdata *plat =
+                dev_get_platdata(&pmu_device->dev);
        irqs = min(pmu_device->num_resources, num_possible_cpus());
@@ -387,8 +382,11 @@ armpmu_release_hardware(struct arm_pmu *armpmu)
                if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs))
                        continue;
                irq = platform_get_irq(pmu_device, i);
-                if (irq >= 0)
+                if (irq >= 0) {
+                        if (plat && plat->disable_irq)
+                                plat->disable_irq(irq);
                        free_irq(irq, armpmu);
+                }
        }
        release_pmu(armpmu->type);
@@ -448,7 +446,8 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu)
                                irq);
                        armpmu_release_hardware(armpmu);
                        return err;
-                }
+                } else if (plat && plat->enable_irq)
+                        plat->enable_irq(irq);
                cpumask_set_cpu(i, &armpmu->active_irqs);
        }
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
index e63d8115c01..533be9930ec 100644
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@ -65,13 +65,15 @@ enum armv6_counters {
 * accesses/misses in hardware.
 */
 static const unsigned armv6_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]          = ARMV6_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV6_PERFCTR_CPU_CYCLES,
-        [PERF_COUNT_HW_INSTRUCTIONS]        = ARMV6_PERFCTR_INSTR_EXEC,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV6_PERFCTR_INSTR_EXEC,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_CACHE_MISSES]        = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_MISSES]            = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6_PERFCTR_BR_EXEC,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV6_PERFCTR_BR_EXEC,
-        [PERF_COUNT_HW_BRANCH_MISSES]       = ARMV6_PERFCTR_BR_MISPREDICT,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV6_PERFCTR_BR_MISPREDICT,
-        [PERF_COUNT_HW_BUS_CYCLES]          = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_BUS_CYCLES]              = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV6_PERFCTR_IBUF_STALL,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = ARMV6_PERFCTR_LSU_FULL_STALL,
 };
 static const unsigned armv6_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -218,13 +220,15 @@ enum armv6mpcore_perf_types {
 * accesses/misses in hardware.
 */
 static const unsigned armv6mpcore_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]          = ARMV6MPCORE_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV6MPCORE_PERFCTR_CPU_CYCLES,
-        [PERF_COUNT_HW_INSTRUCTIONS]        = ARMV6MPCORE_PERFCTR_INSTR_EXEC,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV6MPCORE_PERFCTR_INSTR_EXEC,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_CACHE_MISSES]        = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_MISSES]            = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_BR_EXEC,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV6MPCORE_PERFCTR_BR_EXEC,
-        [PERF_COUNT_HW_BRANCH_MISSES]       = ARMV6MPCORE_PERFCTR_BR_MISPREDICT,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV6MPCORE_PERFCTR_BR_MISPREDICT,
-        [PERF_COUNT_HW_BUS_CYCLES]          = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_BUS_CYCLES]              = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV6MPCORE_PERFCTR_IBUF_STALL,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = ARMV6MPCORE_PERFCTR_LSU_FULL_STALL,
 };
 static const unsigned armv6mpcore_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 1ef6d0034b8..460bbbb6b88 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -28,165 +28,87 @@ static struct arm_pmu armv7pmu;
 * they are not available.
 */
 enum armv7_perf_types {
-        ARMV7_PERFCTR_PMNC_SW_INCR              = 0x00,
+        ARMV7_PERFCTR_PMNC_SW_INCR                      = 0x00,
-        ARMV7_PERFCTR_IFETCH_MISS               = 0x01,
+        ARMV7_PERFCTR_L1_ICACHE_REFILL                  = 0x01,
-        ARMV7_PERFCTR_ITLB_MISS                 = 0x02,
+        ARMV7_PERFCTR_ITLB_REFILL                       = 0x02,
-        ARMV7_PERFCTR_DCACHE_REFILL             = 0x03, /* L1 */
+        ARMV7_PERFCTR_L1_DCACHE_REFILL                  = 0x03,
-        ARMV7_PERFCTR_DCACHE_ACCESS             = 0x04, /* L1 */
+        ARMV7_PERFCTR_L1_DCACHE_ACCESS                  = 0x04,
-        ARMV7_PERFCTR_DTLB_REFILL               = 0x05,
+        ARMV7_PERFCTR_DTLB_REFILL                       = 0x05,
-        ARMV7_PERFCTR_DREAD                     = 0x06,
+        ARMV7_PERFCTR_MEM_READ                          = 0x06,
-        ARMV7_PERFCTR_DWRITE                    = 0x07,
+        ARMV7_PERFCTR_MEM_WRITE                         = 0x07,
-        ARMV7_PERFCTR_INSTR_EXECUTED            = 0x08,
+        ARMV7_PERFCTR_INSTR_EXECUTED                    = 0x08,
-        ARMV7_PERFCTR_EXC_TAKEN                 = 0x09,
+        ARMV7_PERFCTR_EXC_TAKEN                         = 0x09,
-        ARMV7_PERFCTR_EXC_EXECUTED              = 0x0A,
+        ARMV7_PERFCTR_EXC_EXECUTED                      = 0x0A,
-        ARMV7_PERFCTR_CID_WRITE                 = 0x0B,
+        ARMV7_PERFCTR_CID_WRITE                         = 0x0B,
-        /* ARMV7_PERFCTR_PC_WRITE is equivalent to HW_BRANCH_INSTRUCTIONS.
+        /*
+         * ARMV7_PERFCTR_PC_WRITE is equivalent to HW_BRANCH_INSTRUCTIONS.
         * It counts:
-         *  - all branch instructions,
+         *  - all (taken) branch instructions,
         *  - instructions that explicitly write the PC,
         *  - exception generating instructions.
         */
-        ARMV7_PERFCTR_PC_WRITE                  = 0x0C,
+        ARMV7_PERFCTR_PC_WRITE                          = 0x0C,
-        ARMV7_PERFCTR_PC_IMM_BRANCH             = 0x0D,
+        ARMV7_PERFCTR_PC_IMM_BRANCH                     = 0x0D,
-        ARMV7_PERFCTR_PC_PROC_RETURN            = 0x0E,
+        ARMV7_PERFCTR_PC_PROC_RETURN                    = 0x0E,
-        ARMV7_PERFCTR_UNALIGNED_ACCESS          = 0x0F,
+        ARMV7_PERFCTR_MEM_UNALIGNED_ACCESS              = 0x0F,
+        ARMV7_PERFCTR_PC_BRANCH_MIS_PRED                = 0x10,
+        ARMV7_PERFCTR_CLOCK_CYCLES                      = 0x11,
+        ARMV7_PERFCTR_PC_BRANCH_PRED                    = 0x12,
        /* These events are defined by the PMUv2 supplement (ARM DDI 0457A). */
-        ARMV7_PERFCTR_PC_BRANCH_MIS_PRED        = 0x10,
+        ARMV7_PERFCTR_MEM_ACCESS                        = 0x13,
-        ARMV7_PERFCTR_CLOCK_CYCLES              = 0x11,
+        ARMV7_PERFCTR_L1_ICACHE_ACCESS                  = 0x14,
-        ARMV7_PERFCTR_PC_BRANCH_PRED            = 0x12,
+        ARMV7_PERFCTR_L1_DCACHE_WB                      = 0x15,
-        ARMV7_PERFCTR_MEM_ACCESS                = 0x13,
+        ARMV7_PERFCTR_L2_CACHE_ACCESS                   = 0x16,
-        ARMV7_PERFCTR_L1_ICACHE_ACCESS          = 0x14,
+        ARMV7_PERFCTR_L2_CACHE_REFILL                   = 0x17,
-        ARMV7_PERFCTR_L1_DCACHE_WB              = 0x15,
+        ARMV7_PERFCTR_L2_CACHE_WB                       = 0x18,
-        ARMV7_PERFCTR_L2_DCACHE_ACCESS          = 0x16,
+        ARMV7_PERFCTR_BUS_ACCESS                        = 0x19,
-        ARMV7_PERFCTR_L2_DCACHE_REFILL          = 0x17,
+        ARMV7_PERFCTR_MEM_ERROR                         = 0x1A,
-        ARMV7_PERFCTR_L2_DCACHE_WB              = 0x18,
+        ARMV7_PERFCTR_INSTR_SPEC                        = 0x1B,
-        ARMV7_PERFCTR_BUS_ACCESS                = 0x19,
+        ARMV7_PERFCTR_TTBR_WRITE                        = 0x1C,
-        ARMV7_PERFCTR_MEMORY_ERROR              = 0x1A,
+        ARMV7_PERFCTR_BUS_CYCLES                        = 0x1D,
-        ARMV7_PERFCTR_INSTR_SPEC                = 0x1B,
-        ARMV7_PERFCTR_TTBR_WRITE                = 0x1C,
+        ARMV7_PERFCTR_CPU_CYCLES                        = 0xFF
-        ARMV7_PERFCTR_BUS_CYCLES                = 0x1D,
-        ARMV7_PERFCTR_CPU_CYCLES                = 0xFF
 };
 /* ARMv7 Cortex-A8 specific event types */
 enum armv7_a8_perf_types {
-        ARMV7_PERFCTR_WRITE_BUFFER_FULL         = 0x40,
+        ARMV7_A8_PERFCTR_L2_CACHE_ACCESS                = 0x43,
-        ARMV7_PERFCTR_L2_STORE_MERGED           = 0x41,
+        ARMV7_A8_PERFCTR_L2_CACHE_REFILL                = 0x44,
-        ARMV7_PERFCTR_L2_STORE_BUFF             = 0x42,
+        ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS               = 0x50,
-        ARMV7_PERFCTR_L2_ACCESS                 = 0x43,
+        ARMV7_A8_PERFCTR_STALL_ISIDE                    = 0x56,
-        ARMV7_PERFCTR_L2_CACH_MISS              = 0x44,
-        ARMV7_PERFCTR_AXI_READ_CYCLES           = 0x45,
-        ARMV7_PERFCTR_AXI_WRITE_CYCLES          = 0x46,
-        ARMV7_PERFCTR_MEMORY_REPLAY             = 0x47,
-        ARMV7_PERFCTR_UNALIGNED_ACCESS_REPLAY   = 0x48,
-        ARMV7_PERFCTR_L1_DATA_MISS              = 0x49,
-        ARMV7_PERFCTR_L1_INST_MISS              = 0x4A,
-        ARMV7_PERFCTR_L1_DATA_COLORING          = 0x4B,
-        ARMV7_PERFCTR_L1_NEON_DATA              = 0x4C,
-        ARMV7_PERFCTR_L1_NEON_CACH_DATA         = 0x4D,
-        ARMV7_PERFCTR_L2_NEON                   = 0x4E,
-        ARMV7_PERFCTR_L2_NEON_HIT               = 0x4F,
-        ARMV7_PERFCTR_L1_INST                   = 0x50,
-        ARMV7_PERFCTR_PC_RETURN_MIS_PRED        = 0x51,
-        ARMV7_PERFCTR_PC_BRANCH_FAILED          = 0x52,
-        ARMV7_PERFCTR_PC_BRANCH_TAKEN           = 0x53,
-        ARMV7_PERFCTR_PC_BRANCH_EXECUTED        = 0x54,
-        ARMV7_PERFCTR_OP_EXECUTED               = 0x55,
-        ARMV7_PERFCTR_CYCLES_INST_STALL         = 0x56,
-        ARMV7_PERFCTR_CYCLES_INST               = 0x57,
-        ARMV7_PERFCTR_CYCLES_NEON_DATA_STALL    = 0x58,
-        ARMV7_PERFCTR_CYCLES_NEON_INST_STALL    = 0x59,
-        ARMV7_PERFCTR_NEON_CYCLES               = 0x5A,
-        ARMV7_PERFCTR_PMU0_EVENTS               = 0x70,
-        ARMV7_PERFCTR_PMU1_EVENTS               = 0x71,
-        ARMV7_PERFCTR_PMU_EVENTS                = 0x72,
 };
 /* ARMv7 Cortex-A9 specific event types */
 enum armv7_a9_perf_types {
-        ARMV7_PERFCTR_JAVA_HW_BYTECODE_EXEC     = 0x40,
+        ARMV7_A9_PERFCTR_INSTR_CORE_RENAME              = 0x68,
-        ARMV7_PERFCTR_JAVA_SW_BYTECODE_EXEC     = 0x41,
+        ARMV7_A9_PERFCTR_STALL_ICACHE                   = 0x60,
-        ARMV7_PERFCTR_JAZELLE_BRANCH_EXEC       = 0x42,
+        ARMV7_A9_PERFCTR_STALL_DISPATCH                 = 0x66,
-        ARMV7_PERFCTR_COHERENT_LINE_MISS        = 0x50,
-        ARMV7_PERFCTR_COHERENT_LINE_HIT         = 0x51,
-        ARMV7_PERFCTR_ICACHE_DEP_STALL_CYCLES   = 0x60,
-        ARMV7_PERFCTR_DCACHE_DEP_STALL_CYCLES   = 0x61,
-        ARMV7_PERFCTR_TLB_MISS_DEP_STALL_CYCLES = 0x62,
-        ARMV7_PERFCTR_STREX_EXECUTED_PASSED     = 0x63,
-        ARMV7_PERFCTR_STREX_EXECUTED_FAILED     = 0x64,
-        ARMV7_PERFCTR_DATA_EVICTION             = 0x65,
-        ARMV7_PERFCTR_ISSUE_STAGE_NO_INST       = 0x66,
-        ARMV7_PERFCTR_ISSUE_STAGE_EMPTY         = 0x67,
-        ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE  = 0x68,
-        ARMV7_PERFCTR_PREDICTABLE_FUNCT_RETURNS = 0x6E,
-        ARMV7_PERFCTR_MAIN_UNIT_EXECUTED_INST   = 0x70,
-        ARMV7_PERFCTR_SECOND_UNIT_EXECUTED_INST = 0x71,
-        ARMV7_PERFCTR_LD_ST_UNIT_EXECUTED_INST  = 0x72,
-        ARMV7_PERFCTR_FP_EXECUTED_INST          = 0x73,
-        ARMV7_PERFCTR_NEON_EXECUTED_INST        = 0x74,
-        ARMV7_PERFCTR_PLD_FULL_DEP_STALL_CYCLES = 0x80,
-        ARMV7_PERFCTR_DATA_WR_DEP_STALL_CYCLES  = 0x81,
-        ARMV7_PERFCTR_ITLB_MISS_DEP_STALL_CYCLES        = 0x82,
-        ARMV7_PERFCTR_DTLB_MISS_DEP_STALL_CYCLES        = 0x83,
-        ARMV7_PERFCTR_MICRO_ITLB_MISS_DEP_STALL_CYCLES  = 0x84,
-        ARMV7_PERFCTR_MICRO_DTLB_MISS_DEP_STALL_CYCLES  = 0x85,
-        ARMV7_PERFCTR_DMB_DEP_STALL_CYCLES      = 0x86,
-        ARMV7_PERFCTR_INTGR_CLK_ENABLED_CYCLES  = 0x8A,
-        ARMV7_PERFCTR_DATA_ENGINE_CLK_EN_CYCLES = 0x8B,
-        ARMV7_PERFCTR_ISB_INST                  = 0x90,
-        ARMV7_PERFCTR_DSB_INST                  = 0x91,
-        ARMV7_PERFCTR_DMB_INST                  = 0x92,
-        ARMV7_PERFCTR_EXT_INTERRUPTS            = 0x93,
-        ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_COMPLETED     = 0xA0,
-        ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_SKIPPED       = 0xA1,
-        ARMV7_PERFCTR_PLE_FIFO_FLUSH            = 0xA2,
-        ARMV7_PERFCTR_PLE_RQST_COMPLETED        = 0xA3,
-        ARMV7_PERFCTR_PLE_FIFO_OVERFLOW         = 0xA4,
-        ARMV7_PERFCTR_PLE_RQST_PROG             = 0xA5
 };
 /* ARMv7 Cortex-A5 specific event types */
 enum armv7_a5_perf_types {
-        ARMV7_PERFCTR_IRQ_TAKEN                 = 0x86,
+        ARMV7_A5_PERFCTR_PREFETCH_LINEFILL              = 0xc2,
-        ARMV7_PERFCTR_FIQ_TAKEN                 = 0x87,
+        ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP         = 0xc3,
-        ARMV7_PERFCTR_EXT_MEM_RQST              = 0xc0,
-        ARMV7_PERFCTR_NC_EXT_MEM_RQST           = 0xc1,
-        ARMV7_PERFCTR_PREFETCH_LINEFILL         = 0xc2,
-        ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP    = 0xc3,
-        ARMV7_PERFCTR_ENTER_READ_ALLOC          = 0xc4,
-        ARMV7_PERFCTR_READ_ALLOC                = 0xc5,
-        ARMV7_PERFCTR_STALL_SB_FULL             = 0xc9,
 };
 /* ARMv7 Cortex-A15 specific event types */
 enum armv7_a15_perf_types {
-        ARMV7_PERFCTR_L1_DCACHE_READ_ACCESS     = 0x40,
+        ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ         = 0x40,
-        ARMV7_PERFCTR_L1_DCACHE_WRITE_ACCESS    = 0x41,
+        ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE        = 0x41,
-        ARMV7_PERFCTR_L1_DCACHE_READ_REFILL     = 0x42,
+        ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ         = 0x42,
-        ARMV7_PERFCTR_L1_DCACHE_WRITE_REFILL    = 0x43,
+        ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_WRITE        = 0x43,
-        ARMV7_PERFCTR_L1_DTLB_READ_REFILL       = 0x4C,
+        ARMV7_A15_PERFCTR_DTLB_REFILL_L1_READ           = 0x4C,
-        ARMV7_PERFCTR_L1_DTLB_WRITE_REFILL      = 0x4D,
+        ARMV7_A15_PERFCTR_DTLB_REFILL_L1_WRITE          = 0x4D,
-        ARMV7_PERFCTR_L2_DCACHE_READ_ACCESS     = 0x50,
+        ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_READ          = 0x50,
-        ARMV7_PERFCTR_L2_DCACHE_WRITE_ACCESS    = 0x51,
+        ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_WRITE         = 0x51,
-        ARMV7_PERFCTR_L2_DCACHE_READ_REFILL     = 0x52,
+        ARMV7_A15_PERFCTR_L2_CACHE_REFILL_READ          = 0x52,
-        ARMV7_PERFCTR_L2_DCACHE_WRITE_REFILL    = 0x53,
+        ARMV7_A15_PERFCTR_L2_CACHE_REFILL_WRITE         = 0x53,
-        ARMV7_PERFCTR_SPEC_PC_WRITE             = 0x76,
+        ARMV7_A15_PERFCTR_PC_WRITE_SPEC                 = 0x76,
 };
 /*
@@ -197,13 +119,15 @@ enum armv7_a15_perf_types {
 * accesses/misses in hardware.
 */
 static const unsigned armv7_a8_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]          = ARMV7_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV7_PERFCTR_CPU_CYCLES,
-        [PERF_COUNT_HW_INSTRUCTIONS]        = ARMV7_PERFCTR_INSTR_EXECUTED,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV7_PERFCTR_INSTR_EXECUTED,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
-        [PERF_COUNT_HW_CACHE_MISSES]        = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_MISSES]            = ARMV7_PERFCTR_L1_DCACHE_REFILL,
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV7_PERFCTR_PC_WRITE,
-        [PERF_COUNT_HW_BRANCH_MISSES]       = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-        [PERF_COUNT_HW_BUS_CYCLES]          = ARMV7_PERFCTR_CLOCK_CYCLES,
+        [PERF_COUNT_HW_BUS_CYCLES]              = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV7_A8_PERFCTR_STALL_ISIDE,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = HW_OP_UNSUPPORTED,
 };
 static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -217,12 +141,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
                 * combined.
                 */
                [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_DCACHE_ACCESS,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_DCACHE_REFILL,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
                },
                [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_DCACHE_ACCESS,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_DCACHE_REFILL,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -231,12 +155,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
        },
        [C(L1I)] = {
                [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_INST,
+                        [C(RESULT_ACCESS)]      = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_INST_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                },
                [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_INST,
+                        [C(RESULT_ACCESS)]      = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_INST_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -245,12 +169,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
        },
        [C(LL)] = {
                [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L2_ACCESS,
+                        [C(RESULT_ACCESS)]      = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L2_CACH_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_A8_PERFCTR_L2_CACHE_REFILL,
                },
                [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L2_ACCESS,
+                        [C(RESULT_ACCESS)]      = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L2_CACH_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_A8_PERFCTR_L2_CACHE_REFILL,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -274,11 +198,11 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
        [C(ITLB)] = {
                [C(OP_READ)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                },
                [C(OP_WRITE)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -287,14 +211,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
        },
        [C(BPU)] = {
                [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_WRITE,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
-                        [C(RESULT_MISS)]
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                },
                [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_WRITE,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
-                        [C(RESULT_MISS)]
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -321,14 +243,15 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
 * Cortex-A9 HW events mapping
 */
 static const unsigned armv7_a9_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]          = ARMV7_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV7_PERFCTR_CPU_CYCLES,
-        [PERF_COUNT_HW_INSTRUCTIONS]        =
+        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV7_A9_PERFCTR_INSTR_CORE_RENAME,
-                                        ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = ARMV7_PERFCTR_DCACHE_ACCESS,
+        [PERF_COUNT_HW_CACHE_MISSES]            = ARMV7_PERFCTR_L1_DCACHE_REFILL,
-        [PERF_COUNT_HW_CACHE_MISSES]        = ARMV7_PERFCTR_DCACHE_REFILL,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV7_PERFCTR_PC_WRITE,
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-        [PERF_COUNT_HW_BRANCH_MISSES]       = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+        [PERF_COUNT_HW_BUS_CYCLES]              = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_BUS_CYCLES]          = ARMV7_PERFCTR_CLOCK_CYCLES,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV7_A9_PERFCTR_STALL_ICACHE,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = ARMV7_A9_PERFCTR_STALL_DISPATCH,
 };
 static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -342,12 +265,12 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
                 * combined.
                 */
                [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_DCACHE_ACCESS,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_DCACHE_REFILL,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
                },
                [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_DCACHE_ACCESS,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_DCACHE_REFILL,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -357,11 +280,11 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
        [C(L1I)] = {
                [C(OP_READ)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_IFETCH_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                },
                [C(OP_WRITE)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_IFETCH_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -399,11 +322,11 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
        [C(ITLB)] = {
                [C(OP_READ)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                },
                [C(OP_WRITE)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -412,14 +335,12 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
        },
        [C(BPU)] = {
                [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_WRITE,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
-                        [C(RESULT_MISS)]
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                },
                [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_WRITE,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
-                        [C(RESULT_MISS)]
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -446,13 +367,15 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
 * Cortex-A5 HW events mapping
 */
 static const unsigned armv7_a5_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]          = ARMV7_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV7_PERFCTR_CPU_CYCLES,
-        [PERF_COUNT_HW_INSTRUCTIONS]        = ARMV7_PERFCTR_INSTR_EXECUTED,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV7_PERFCTR_INSTR_EXECUTED,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
-        [PERF_COUNT_HW_CACHE_MISSES]        = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_MISSES]            = ARMV7_PERFCTR_L1_DCACHE_REFILL,
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV7_PERFCTR_PC_WRITE,
-        [PERF_COUNT_HW_BRANCH_MISSES]       = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-        [PERF_COUNT_HW_BUS_CYCLES]          = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_BUS_CYCLES]              = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = HW_OP_UNSUPPORTED,
 };
 static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -460,42 +383,34 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
                                        [PERF_COUNT_HW_CACHE_RESULT_MAX] = {
        [C(L1D)] = {
                [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
-                                        = ARMV7_PERFCTR_DCACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_DCACHE_REFILL,
                },
                [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
-                                        = ARMV7_PERFCTR_DCACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_DCACHE_REFILL,
                },
                [C(OP_PREFETCH)] = {
-                        [C(RESULT_ACCESS)]
+                        [C(RESULT_ACCESS)]      = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL,
-                                        = ARMV7_PERFCTR_PREFETCH_LINEFILL,
+                        [C(RESULT_MISS)]        = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP,
                },
        },
        [C(L1I)] = {
                [C(OP_READ)] = {
                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_IFETCH_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                },
                [C(OP_WRITE)] = {
                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_IFETCH_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                },
                /*
                 * The prefetch counters don't differentiate between the I
                 * side and the D side.
                 */
                [C(OP_PREFETCH)] = {
-                        [C(RESULT_ACCESS)]
+                        [C(RESULT_ACCESS)]      = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL,
-                                        = ARMV7_PERFCTR_PREFETCH_LINEFILL,
+                        [C(RESULT_MISS)]        = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP,
                },
        },
        [C(LL)] = {
@@ -529,11 +444,11 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
        [C(ITLB)] = {
                [C(OP_READ)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                },
                [C(OP_WRITE)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -543,13 +458,11 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
        [C(BPU)] = {
                [C(OP_READ)] = {
                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
-                        [C(RESULT_MISS)]
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                },
                [C(OP_WRITE)] = {
                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
-                        [C(RESULT_MISS)]
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -562,13 +475,15 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
 * Cortex-A15 HW events mapping
 */
 static const unsigned armv7_a15_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]          = ARMV7_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV7_PERFCTR_CPU_CYCLES,
-        [PERF_COUNT_HW_INSTRUCTIONS]        = ARMV7_PERFCTR_INSTR_EXECUTED,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV7_PERFCTR_INSTR_EXECUTED,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
-        [PERF_COUNT_HW_CACHE_MISSES]        = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_MISSES]            = ARMV7_PERFCTR_L1_DCACHE_REFILL,
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_SPEC_PC_WRITE,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV7_A15_PERFCTR_PC_WRITE_SPEC,
-        [PERF_COUNT_HW_BRANCH_MISSES]       = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-        [PERF_COUNT_HW_BUS_CYCLES]          = ARMV7_PERFCTR_BUS_CYCLES,
+        [PERF_COUNT_HW_BUS_CYCLES]              = ARMV7_PERFCTR_BUS_CYCLES,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = HW_OP_UNSUPPORTED,
 };
 static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -576,16 +491,12 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
                                        [PERF_COUNT_HW_CACHE_RESULT_MAX] = {
        [C(L1D)] = {
                [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]
+                        [C(RESULT_ACCESS)]      = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ,
-                                        = ARMV7_PERFCTR_L1_DCACHE_READ_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_L1_DCACHE_READ_REFILL,
                },
                [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]
+                        [C(RESULT_ACCESS)]      = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE,
-                                        = ARMV7_PERFCTR_L1_DCACHE_WRITE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_WRITE,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_L1_DCACHE_WRITE_REFILL,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -601,11 +512,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
                 */
                [C(OP_READ)] = {
                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_IFETCH_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                },
                [C(OP_WRITE)] = {
                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_IFETCH_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -614,16 +525,12 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
        },
        [C(LL)] = {
                [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]
+                        [C(RESULT_ACCESS)]      = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_READ,
-                                        = ARMV7_PERFCTR_L2_DCACHE_READ_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_READ,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_L2_DCACHE_READ_REFILL,
                },
                [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]
+                        [C(RESULT_ACCESS)]      = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_WRITE,
-                                        = ARMV7_PERFCTR_L2_DCACHE_WRITE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_WRITE,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_L2_DCACHE_WRITE_REFILL,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -633,13 +540,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
        [C(DTLB)] = {
                [C(OP_READ)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]
+                        [C(RESULT_MISS)]        = ARMV7_A15_PERFCTR_DTLB_REFILL_L1_READ,
-                                        = ARMV7_PERFCTR_L1_DTLB_READ_REFILL,
                },
                [C(OP_WRITE)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]
+                        [C(RESULT_MISS)]        = ARMV7_A15_PERFCTR_DTLB_REFILL_L1_WRITE,
-                                        = ARMV7_PERFCTR_L1_DTLB_WRITE_REFILL,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -649,11 +554,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
        [C(ITLB)] = {
                [C(OP_READ)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                },
                [C(OP_WRITE)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -663,13 +568,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
        [C(BPU)] = {
                [C(OP_READ)] = {
                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
-                        [C(RESULT_MISS)]
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                },
                [C(OP_WRITE)] = {
                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
-                        [C(RESULT_MISS)]
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                },
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c
index e0cca10a841..3b99d826982 100644
--- a/arch/arm/kernel/perf_event_xscale.c
+++ b/arch/arm/kernel/perf_event_xscale.c
@@ -48,13 +48,15 @@ enum xscale_counters {
 };
 static const unsigned xscale_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]          = XSCALE_PERFCTR_CCNT,
+        [PERF_COUNT_HW_CPU_CYCLES]              = XSCALE_PERFCTR_CCNT,
-        [PERF_COUNT_HW_INSTRUCTIONS]        = XSCALE_PERFCTR_INSTRUCTION,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = XSCALE_PERFCTR_INSTRUCTION,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_CACHE_MISSES]        = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_MISSES]            = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = XSCALE_PERFCTR_BRANCH,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = XSCALE_PERFCTR_BRANCH,
-        [PERF_COUNT_HW_BRANCH_MISSES]       = XSCALE_PERFCTR_BRANCH_MISS,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = XSCALE_PERFCTR_BRANCH_MISS,
-        [PERF_COUNT_HW_BUS_CYCLES]          = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_BUS_CYCLES]              = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = XSCALE_PERFCTR_ICACHE_NO_DELIVER,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = HW_OP_UNSUPPORTED,
 };
 static const unsigned xscale_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 17859ce4e7b..b29776aa658 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -92,17 +92,23 @@ static int __init hlt_setup(char *__unused)
 __setup("nohlt", nohlt_setup);
 __setup("hlt", hlt_setup);
-void soft_restart(unsigned long addr)
+extern void call_with_stack(void (*fn)(void *), void *arg, void *sp);
+typedef void (*phys_reset_t)(unsigned long);
+/*
+ * A temporary stack to use for CPU reset. This is static so that we
+ * don't clobber it with the identity mapping. When running with this
+ * stack, any references to the current task *will not work* so you
+ * should really do as little as possible before jumping to your reset
+ * code.
+ */
+static u64 soft_restart_stack[16];
+static void __soft_restart(void *addr)
 {
-        /* Disable interrupts first */
+        phys_reset_t phys_reset;
-        local_irq_disable();
-        local_fiq_disable();
-        /*
+        /* Take out a flat memory mapping. */
-         * Tell the mm system that we are going to reboot -
-         * we may need it to insert some 1:1 mappings so that
-         * soft boot works.
-         */
        setup_mm_for_reboot();
        /* Clean and invalidate caches */
@@ -114,7 +120,31 @@ void soft_restart(unsigned long addr)
        /* Push out any further dirty data, and ensure cache is empty */
        flush_cache_all();
-        cpu_reset(addr);
+        /* Switch to the identity mapping. */
+        phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset);
+        phys_reset((unsigned long)addr);
+        /* Should never get here. */
+        BUG();
+}
+void soft_restart(unsigned long addr)
+{
+        u64 *stack = soft_restart_stack + ARRAY_SIZE(soft_restart_stack);
+        /* Disable interrupts first */
+        local_irq_disable();
+        local_fiq_disable();
+        /* Disable the L2 if we're the last man standing. */
+        if (num_online_cpus() == 1)
+                outer_disable();
+        /* Change to the new stack and continue with the reset. */
+        call_with_stack(__soft_restart, (void *)addr, (void *)stack);
+        /* Should never get here. */
+        BUG();
 }
 static void null_restart(char mode, const char *cmd)
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 9a46370fe9d..5416c7c1252 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -14,61 +14,153 @@
 #include <asm/sched_clock.h>
+struct clock_data {
+        u64 epoch_ns;
+        u32 epoch_cyc;
+        u32 epoch_cyc_copy;
+        u32 mult;
+        u32 shift;
+};
 static void sched_clock_poll(unsigned long wrap_ticks);
 static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0);
-static void (*sched_clock_update_fn)(void);
+static struct clock_data cd = {
+        .mult   = NSEC_PER_SEC / HZ,
+};
+static u32 __read_mostly sched_clock_mask = 0xffffffff;
+static u32 notrace jiffy_sched_clock_read(void)
+{
+        return (u32)(jiffies - INITIAL_JIFFIES);
+}
+static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read;
+static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
+{
+        return (cyc * mult) >> shift;
+}
+static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask)
+{
+        u64 epoch_ns;
+        u32 epoch_cyc;
+        /*
+         * Load the epoch_cyc and epoch_ns atomically.  We do this by
+         * ensuring that we always write epoch_cyc, epoch_ns and
+         * epoch_cyc_copy in strict order, and read them in strict order.
+         * If epoch_cyc and epoch_cyc_copy are not equal, then we're in
+         * the middle of an update, and we should repeat the load.
+         */
+        do {
+                epoch_cyc = cd.epoch_cyc;
+                smp_rmb();
+                epoch_ns = cd.epoch_ns;
+                smp_rmb();
+        } while (epoch_cyc != cd.epoch_cyc_copy);
+        return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, cd.mult, cd.shift);
+}
+/*
+ * Atomically update the sched_clock epoch.
+ */
+static void notrace update_sched_clock(void)
+{
+        unsigned long flags;
+        u32 cyc;
+        u64 ns;
+        cyc = read_sched_clock();
+        ns = cd.epoch_ns +
+                cyc_to_ns((cyc - cd.epoch_cyc) & sched_clock_mask,
+                          cd.mult, cd.shift);
+        /*
+         * Write epoch_cyc and epoch_ns in a way that the update is
+         * detectable in cyc_to_fixed_sched_clock().
+         */
+        raw_local_irq_save(flags);
+        cd.epoch_cyc = cyc;
+        smp_wmb();
+        cd.epoch_ns = ns;
+        smp_wmb();
+        cd.epoch_cyc_copy = cyc;
+        raw_local_irq_restore(flags);
+}
 static void sched_clock_poll(unsigned long wrap_ticks)
 {
        mod_timer(&sched_clock_timer, round_jiffies(jiffies + wrap_ticks));
-        sched_clock_update_fn();
+        update_sched_clock();
 }
-void __init init_sched_clock(struct clock_data *cd, void (*update)(void),
+void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
-        unsigned int clock_bits, unsigned long rate)
 {
        unsigned long r, w;
        u64 res, wrap;
        char r_unit;
-        sched_clock_update_fn = update;
+        BUG_ON(bits > 32);
+        WARN_ON(!irqs_disabled());
+        WARN_ON(read_sched_clock != jiffy_sched_clock_read);
+        read_sched_clock = read;
+        sched_clock_mask = (1 << bits) - 1;
        /* calculate the mult/shift to convert counter ticks to ns. */
-        clocks_calc_mult_shift(&cd->mult, &cd->shift, rate, NSEC_PER_SEC, 0);
+        clocks_calc_mult_shift(&cd.mult, &cd.shift, rate, NSEC_PER_SEC, 0);
        r = rate;
        if (r >= 4000000) {
                r /= 1000000;
                r_unit = 'M';
-        } else {
+        } else if (r >= 1000) {
                r /= 1000;
                r_unit = 'k';
-        }
+        } else
+                r_unit = ' ';
        /* calculate how many ns until we wrap */
-        wrap = cyc_to_ns((1ULL << clock_bits) - 1, cd->mult, cd->shift);
+        wrap = cyc_to_ns((1ULL << bits) - 1, cd.mult, cd.shift);
        do_div(wrap, NSEC_PER_MSEC);
        w = wrap;
        /* calculate the ns resolution of this counter */
-        res = cyc_to_ns(1ULL, cd->mult, cd->shift);
+        res = cyc_to_ns(1ULL, cd.mult, cd.shift);
        pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lums\n",
-                clock_bits, r, r_unit, res, w);
+                bits, r, r_unit, res, w);
        /*
         * Start the timer to keep sched_clock() properly updated and
         * sets the initial epoch.
         */
        sched_clock_timer.data = msecs_to_jiffies(w - (w / 10));
-        update();
+        update_sched_clock();
        /*
         * Ensure that sched_clock() starts off at 0ns
         */
-        cd->epoch_ns = 0;
+        cd.epoch_ns = 0;
+        pr_debug("Registered %pF as sched_clock source\n", read);
+}
+unsigned long long notrace sched_clock(void)
+{
+        u32 cyc = read_sched_clock();
+        return cyc_to_sched_clock(cyc, sched_clock_mask);
 }
 void __init sched_clock_postinit(void)
 {
+        /*
+         * If no sched_clock function has been provided at that point,
+         * make it the final one one.
+         */
+        if (read_sched_clock == jiffy_sched_clock_read)
+                setup_sched_clock(jiffy_sched_clock_read, 32, HZ);
        sched_clock_poll(sched_clock_timer.data);
 }
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 8b13930cdb0..095d6611c84 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -31,6 +31,7 @@
 #include <linux/memblock.h>
 #include <linux/bug.h>
 #include <linux/compiler.h>
+#include <linux/sort.h>
 #include <asm/unified.h>
 #include <asm/cpu.h>
@@ -890,6 +891,12 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr)
        return mdesc;
 }
+static int __init meminfo_cmp(const void *_a, const void *_b)
+{
+        const struct membank *a = _a, *b = _b;
+        long cmp = bank_pfn_start(a) - bank_pfn_start(b);
+        return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
+}
 void __init setup_arch(char **cmdline_p)
 {
@@ -922,6 +929,7 @@ void __init setup_arch(char **cmdline_p)
        parse_early_param();
+        sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
        sanity_check_meminfo();
        arm_memblock_init(&meminfo, mdesc);
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 020e99c845e..1f268bda455 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -54,14 +54,18 @@ ENDPROC(cpu_suspend_abort)
 * r0 = control register value
 */
        .align  5
+        .pushsection    .idmap.text,"ax"
 ENTRY(cpu_resume_mmu)
        ldr     r3, =cpu_resume_after_mmu
+        instr_sync
        mcr     p15, 0, r0, c1, c0, 0   @ turn on MMU, I-cache, etc
        mrc     p15, 0, r0, c0, c0, 0   @ read id reg
+        instr_sync
        mov     r0, r0
        mov     r0, r0
        mov     pc, r3                  @ jump to virtual address
 ENDPROC(cpu_resume_mmu)
+        .popsection
 cpu_resume_after_mmu:
        bl      cpu_init                @ restore the und/abt/irq banked regs
        mov     r0, #0                  @ return zero on success
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index ef5640b9e21..57db122a4f6 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -31,6 +31,7 @@
 #include <asm/cpu.h>
 #include <asm/cputype.h>
 #include <asm/exception.h>
+#include <asm/idmap.h>
 #include <asm/topology.h>
 #include <asm/mmu_context.h>
 #include <asm/pgtable.h>
@@ -61,7 +62,6 @@ int __cpuinit __cpu_up(unsigned int cpu)
 {
        struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu);
        struct task_struct *idle = ci->idle;
-        pgd_t *pgd;
        int ret;
        /*
@@ -84,29 +84,11 @@ int __cpuinit __cpu_up(unsigned int cpu)
        }
        /*
-         * Allocate initial page tables to allow the new CPU to
-         * enable the MMU safely.  This essentially means a set
-         * of our "standard" page tables, with the addition of
-         * a 1:1 mapping for the physical address of the kernel.
-         */
-        pgd = pgd_alloc(&init_mm);
-        if (!pgd)
-                return -ENOMEM;
-        if (PHYS_OFFSET != PAGE_OFFSET) {
-#ifndef CONFIG_HOTPLUG_CPU
-                identity_mapping_add(pgd, __pa(__init_begin), __pa(__init_end));
-#endif
-                identity_mapping_add(pgd, __pa(_stext), __pa(_etext));
-                identity_mapping_add(pgd, __pa(_sdata), __pa(_edata));
-        }
-        /*
         * We need to tell the secondary core where to find
         * its stack and the page tables.
         */
        secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
-        secondary_data.pgdir = virt_to_phys(pgd);
+        secondary_data.pgdir = virt_to_phys(idmap_pgd);
        secondary_data.swapper_pg_dir = virt_to_phys(swapper_pg_dir);
        __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data));
        outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1));
@@ -142,16 +124,6 @@ int __cpuinit __cpu_up(unsigned int cpu)
        secondary_data.stack = NULL;
        secondary_data.pgdir = 0;
-        if (PHYS_OFFSET != PAGE_OFFSET) {
-#ifndef CONFIG_HOTPLUG_CPU
-                identity_mapping_del(pgd, __pa(__init_begin), __pa(__init_end));
-#endif
-                identity_mapping_del(pgd, __pa(_stext), __pa(_etext));
-                identity_mapping_del(pgd, __pa(_sdata), __pa(_edata));
-        }
-        pgd_free(&init_mm, pgd);
        return ret;
 }
@@ -550,6 +522,10 @@ static void ipi_cpu_stop(unsigned int cpu)
        local_fiq_disable();
        local_irq_disable();
+#ifdef CONFIG_HOTPLUG_CPU
+        platform_cpu_kill(cpu);
+#endif
        while (1)
                cpu_relax();
 }
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index a8a6682d6b5..c8e938553d4 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -10,8 +10,11 @@
 */
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/clk.h>
+#include <linux/cpufreq.h>
 #include <linux/delay.h>
 #include <linux/device.h>
+#include <linux/err.h>
 #include <linux/smp.h>
 #include <linux/jiffies.h>
 #include <linux/clockchips.h>
@@ -25,6 +28,7 @@
 /* set up by the platform code */
 void __iomem *twd_base;
+static struct clk *twd_clk;
 static unsigned long twd_timer_rate;
 static struct clock_event_device __percpu **twd_evt;
@@ -89,6 +93,52 @@ void twd_timer_stop(struct clock_event_device *clk)
        disable_percpu_irq(clk->irq);
 }
+#ifdef CONFIG_CPU_FREQ
+/*
+ * Updates clockevent frequency when the cpu frequency changes.
+ * Called on the cpu that is changing frequency with interrupts disabled.
+ */
+static void twd_update_frequency(void *data)
+{
+        twd_timer_rate = clk_get_rate(twd_clk);
+        clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
+}
+static int twd_cpufreq_transition(struct notifier_block *nb,
+        unsigned long state, void *data)
+{
+        struct cpufreq_freqs *freqs = data;
+        /*
+         * The twd clock events must be reprogrammed to account for the new
+         * frequency.  The timer is local to a cpu, so cross-call to the
+         * changing cpu.
+         */
+        if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE)
+                smp_call_function_single(freqs->cpu, twd_update_frequency,
+                        NULL, 1);
+        return NOTIFY_OK;
+}
+static struct notifier_block twd_cpufreq_nb = {
+        .notifier_call = twd_cpufreq_transition,
+};
+static int twd_cpufreq_init(void)
+{
+        if (!IS_ERR(twd_clk))
+                return cpufreq_register_notifier(&twd_cpufreq_nb,
+                        CPUFREQ_TRANSITION_NOTIFIER);
+        return 0;
+}
+core_initcall(twd_cpufreq_init);
+#endif
 static void __cpuinit twd_calibrate_rate(void)
 {
        unsigned long count;
@@ -140,6 +190,35 @@ static irqreturn_t twd_handler(int irq, void *dev_id)
        return IRQ_NONE;
 }
+static struct clk *twd_get_clock(void)
+{
+        struct clk *clk;
+        int err;
+        clk = clk_get_sys("smp_twd", NULL);
+        if (IS_ERR(clk)) {
+                pr_err("smp_twd: clock not found: %d\n", (int)PTR_ERR(clk));
+                return clk;
+        }
+        err = clk_prepare(clk);
+        if (err) {
+                pr_err("smp_twd: clock failed to prepare: %d\n", err);
+                clk_put(clk);
+                return ERR_PTR(err);
+        }
+        err = clk_enable(clk);
+        if (err) {
+                pr_err("smp_twd: clock failed to enable: %d\n", err);
+                clk_unprepare(clk);
+                clk_put(clk);
+                return ERR_PTR(err);
+        }
+        return clk;
+}
 /*
 * Setup the local clock events for a CPU.
 */
@@ -165,7 +244,13 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
                }
        }
-        twd_calibrate_rate();
+        if (!twd_clk)
+                twd_clk = twd_get_clock();
+        if (!IS_ERR_OR_NULL(twd_clk))
+                twd_timer_rate = clk_get_rate(twd_clk);
+        else
+                twd_calibrate_rate();
        clk->name = "local_timer";
        clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
@@ -173,15 +258,11 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
        clk->rating = 350;
        clk->set_mode = twd_set_mode;
        clk->set_next_event = twd_set_next_event;
-        clk->shift = 20;
-        clk->mult = div_sc(twd_timer_rate, NSEC_PER_SEC, clk->shift);
-        clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk);
-        clk->min_delta_ns = clockevent_delta2ns(0xf, clk);
        this_cpu_clk = __this_cpu_ptr(twd_evt);
        *this_cpu_clk = clk;
-        clockevents_register_device(clk);
+        clockevents_config_and_register(clk, twd_timer_rate,
+                                        0xf, 0xffffffff);
        enable_percpu_irq(clk->irq, 0);
 }
diff --git a/arch/arm/kernel/suspend.c b/arch/arm/kernel/suspend.c
index 93a22d282c1..1794cc3b0f1 100644
--- a/arch/arm/kernel/suspend.c
+++ b/arch/arm/kernel/suspend.c
@@ -1,13 +1,12 @@
 #include <linux/init.h>
+#include <asm/idmap.h>
 #include <asm/pgalloc.h>
 #include <asm/pgtable.h>
 #include <asm/memory.h>
 #include <asm/suspend.h>
 #include <asm/tlbflush.h>
-static pgd_t *suspend_pgd;
 extern int __cpu_suspend(unsigned long, int (*)(unsigned long));
 extern void cpu_resume_mmu(void);
@@ -21,7 +20,7 @@ void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr)
        *save_ptr = virt_to_phys(ptr);
        /* This must correspond to the LDM in cpu_resume() assembly */
-        *ptr++ = virt_to_phys(suspend_pgd);
+        *ptr++ = virt_to_phys(idmap_pgd);
        *ptr++ = sp;
        *ptr++ = virt_to_phys(cpu_do_resume);
@@ -42,7 +41,7 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
        struct mm_struct *mm = current->active_mm;
        int ret;
-        if (!suspend_pgd)
+        if (!idmap_pgd)
                return -EINVAL;
        /*
@@ -59,14 +58,3 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
        return ret;
 }
-static int __init cpu_suspend_init(void)
-{
-        suspend_pgd = pgd_alloc(&init_mm);
-        if (suspend_pgd) {
-                unsigned long addr = virt_to_phys(cpu_resume_mmu);
-                identity_mapping_add(suspend_pgd, addr, addr + SECTION_SIZE);
-        }
-        return suspend_pgd ? 0 : -ENOMEM;
-}
-core_initcall(cpu_suspend_init);
diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c
index 5f452f8fde0..df745188f5d 100644
--- a/arch/arm/kernel/swp_emulate.c
+++ b/arch/arm/kernel/swp_emulate.c
@@ -25,6 +25,7 @@
 #include <linux/syscalls.h>
 #include <linux/perf_event.h>
+#include <asm/opcodes.h>
 #include <asm/traps.h>
 #include <asm/uaccess.h>
@@ -185,6 +186,21 @@ static int swp_handler(struct pt_regs *regs, unsigned int instr)
        perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);
+        res = arm_check_condition(instr, regs->ARM_cpsr);
+        switch (res) {
+        case ARM_OPCODE_CONDTEST_PASS:
+                break;
+        case ARM_OPCODE_CONDTEST_FAIL:
+                /* Condition failed - return to next instruction */
+                regs->ARM_pc += 4;
+                return 0;
+        case ARM_OPCODE_CONDTEST_UNCOND:
+                /* If unconditional encoding - not a SWP, undef */
+                return -EFAULT;
+        default:
+                return -EINVAL;
+        }
        if (current->pid != previous_pid) {
                pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
                         current->comm, (unsigned long)current->pid);
diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c
index 30e302d33e0..01ec453bb92 100644
--- a/arch/arm/kernel/tcm.c
+++ b/arch/arm/kernel/tcm.c
@@ -180,9 +180,9 @@ static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks,
 */
 void __init tcm_init(void)
 {
-        u32 tcm_status = read_cpuid_tcmstatus();
+        u32 tcm_status;
-        u8 dtcm_banks = (tcm_status >> 16) & 0x03;
+        u8 dtcm_banks;
-        u8 itcm_banks = (tcm_status & 0x03);
+        u8 itcm_banks;
        size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data;
        size_t itcm_code_sz = &__eitcm_text - &__sitcm_text;
        char *start;
@@ -191,6 +191,22 @@ void __init tcm_init(void)
        int ret;
        int i;
+        /*
+         * Prior to ARMv5 there is no TCM, and trying to read the status
+         * register will hang the processor.
+         */
+        if (cpu_architecture() < CPU_ARCH_ARMv5) {
+                if (dtcm_code_sz || itcm_code_sz)
+                        pr_info("CPU TCM: %u bytes of DTCM and %u bytes of "
+                                "ITCM code compiled in, but no TCM present "
+                                "in pre-v5 CPU\n", dtcm_code_sz, itcm_code_sz);
+                return;
+        }
+        tcm_status = read_cpuid_tcmstatus();
+        dtcm_banks = (tcm_status >> 16) & 0x03;
+        itcm_banks = (tcm_status & 0x03);
        /* Values greater than 2 for D/ITCM banks are "reserved" */
        if (dtcm_banks > 2)
                dtcm_banks = 0;
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 20b3041e086..f76e7554867 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -13,6 +13,12 @@
        *(.proc.info.init)                                              \
        VMLINUX_SYMBOL(__proc_info_end) = .;
+#define IDMAP_TEXT                                                      \
+        ALIGN_FUNCTION();                                               \
+        VMLINUX_SYMBOL(__idmap_text_start) = .;                         \
+        *(.idmap.text)                                                  \
+        VMLINUX_SYMBOL(__idmap_text_end) = .;
 #ifdef CONFIG_HOTPLUG_CPU
 #define ARM_CPU_DISCARD(x)
 #define ARM_CPU_KEEP(x)         x
@@ -92,6 +98,7 @@ SECTIONS
                        SCHED_TEXT
                        LOCK_TEXT
                        KPROBES_TEXT
+                        IDMAP_TEXT
 #ifdef CONFIG_MMU
                        *(.fixup)
 #endif
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index cf73a7f742d..0ade0acc1ed 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -13,7 +13,8 @@ lib-y		:= backtrace.o changebit.o csumipv6.o csumpartial.o   \
                   testchangebit.o testclearbit.o testsetbit.o        \
                   ashldi3.o ashrdi3.o lshrdi3.o muldi3.o             \
                   ucmpdi2.o lib1funcs.o div64.o                      \
-                   io-readsb.o io-writesb.o io-readsl.o io-writesl.o
+                   io-readsb.o io-writesb.o io-readsl.o io-writesl.o  \
+                   call_with_stack.o
 mmu-y   := clear_user.o copy_page.o getuser.o putuser.o
diff --git a/arch/arm/lib/call_with_stack.S b/arch/arm/lib/call_with_stack.S
new file mode 100644
index 00000000000..916c80f13ae
--- /dev/null
+++ b/arch/arm/lib/call_with_stack.S
@@ -0,0 +1,44 @@
+/*
+ * arch/arm/lib/call_with_stack.S
+ *
+ * Copyright (C) 2011 ARM Ltd.
+ * Written by Will Deacon <will.deacon@arm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+/*
+ * void call_with_stack(void (*fn)(void *), void *arg, void *sp)
+ *
+ * Change the stack to that pointed at by sp, then invoke fn(arg) with
+ * the new stack.
+ */
+ENTRY(call_with_stack)
+        str     sp, [r2, #-4]!
+        str     lr, [r2, #-4]!
+        mov     sp, r2
+        mov     r2, r0
+        mov     r0, r1
+        adr     lr, BSYM(1f)
+        mov     pc, r2
+1:      ldr     lr, [sp]
+        ldr     sp, [sp, #4]
+        mov     pc, lr
+ENDPROC(call_with_stack)
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
index 4298e7806c7..4ca09ef7ca2 100644
--- a/arch/arm/mach-at91/include/mach/io.h
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -30,14 +30,6 @@
 #ifndef __ASSEMBLY__
-#ifndef CONFIG_ARCH_AT91X40
-#define __arch_ioremap  at91_ioremap
-#define __arch_iounmap  at91_iounmap
-#endif
-void __iomem *at91_ioremap(unsigned long phys, size_t size, unsigned int type);
-void at91_iounmap(volatile void __iomem *addr);
 static inline unsigned int at91_sys_read(unsigned int reg_offset)
 {
        void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
diff --git a/arch/arm/mach-at91/include/mach/vmalloc.h b/arch/arm/mach-at91/include/mach/vmalloc.h
deleted file mode 100644
index 8e4a1bd0ab1..00000000000
--- a/arch/arm/mach-at91/include/mach/vmalloc.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/vmalloc.h
- *
- *  Copyright (C) 2003 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-#include <mach/hardware.h>
-#define VMALLOC_END             (AT91_VIRT_BASE & PGDIR_MASK)
-#endif
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index aa64294c7db..cf98a8f94dc 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -73,24 +73,6 @@ static struct map_desc at91_io_desc __initdata = {
        .type           = MT_DEVICE,
 };
-void __iomem *at91_ioremap(unsigned long p, size_t size, unsigned int type)
-{
-        if (p >= AT91_BASE_SYS && p <= (AT91_BASE_SYS + SZ_16K - 1))
-                return (void __iomem *)AT91_IO_P2V(p);
-        return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
-}
-EXPORT_SYMBOL(at91_ioremap);
-void at91_iounmap(volatile void __iomem *addr)
-{
-        unsigned long virt = (unsigned long)addr;
-        if (virt >= VMALLOC_START && virt < VMALLOC_END)
-                __iounmap(addr);
-}
-EXPORT_SYMBOL(at91_iounmap);
 #define AT91_DBGU0      0xfffff200
 #define AT91_DBGU1      0xffffee00
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
index f4d4d6d174d..1a1a27dd565 100644
--- a/arch/arm/mach-bcmring/dma.c
+++ b/arch/arm/mach-bcmring/dma.c
@@ -1615,7 +1615,7 @@ DMA_MemType_t dma_mem_type(void *addr)
 {
        unsigned long addrVal = (unsigned long)addr;
-        if (addrVal >= VMALLOC_END) {
+        if (addrVal >= CONSISTENT_BASE) {
                /* NOTE: DMA virtual memory space starts at 0xFFxxxxxx */
                /* dma_alloc_xxx pages are physically and virtually contiguous */
diff --git a/arch/arm/mach-bcmring/include/mach/vmalloc.h b/arch/arm/mach-bcmring/include/mach/vmalloc.h
deleted file mode 100644
index 7397bd7817d..00000000000
--- a/arch/arm/mach-bcmring/include/mach/vmalloc.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- *
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-/*
- * Move VMALLOC_END to 0xf0000000 so that the vm space can range from
- * 0xe0000000 to 0xefffffff. This gives us 256 MB of vm space and handles
- * larger physical memory designs better.
- */
-#define VMALLOC_END       0xf0000000UL
diff --git a/arch/arm/mach-clps711x/include/mach/vmalloc.h b/arch/arm/mach-clps711x/include/mach/vmalloc.h
deleted file mode 100644
index 467b96137e4..00000000000
--- a/arch/arm/mach-clps711x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/mach-clps711x/include/mach/vmalloc.h
- *
- *  Copyright (C) 2000 Deep Blue Solutions Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END       0xd0000000UL
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index 9b8c3d59731..2c5fb4c7e50 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -26,6 +26,7 @@
 #include <linux/mtd/partitions.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
@@ -201,6 +202,7 @@ MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
        .map_io         = cns3420_map_io,
        .init_irq       = cns3xxx_init_irq,
        .timer          = &cns3xxx_timer,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = cns3420_init,
        .restart        = cns3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
index d87bfc397d3..01c57df5f71 100644
--- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
+++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
@@ -8,8 +8,6 @@
 * published by the Free Software Foundation.
 */
-#include <asm/hardware/entry-macro-gic.S>
                .macro  disable_fiq
                .endm
diff --git a/arch/arm/mach-cns3xxx/include/mach/vmalloc.h b/arch/arm/mach-cns3xxx/include/mach/vmalloc.h
deleted file mode 100644
index 1dd231d2f77..00000000000
--- a/arch/arm/mach-cns3xxx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * Copyright 2000 Russell King.
- * Copyright 2003 ARM Limited
- * Copyright 2008 Cavium Networks
- *
- * This file is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, Version 2, as
- * published by the Free Software Foundation.
- */
-#define VMALLOC_END             0xd8000000UL
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 495e31306fc..2db78bd5c83 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -4,7 +4,7 @@
 #
 # Common objects
-obj-y                   := time.o clock.o serial.o io.o psc.o \
+obj-y                   := time.o clock.o serial.o psc.o \
                           dma.o usb.o common.o sram.o aemif.o
 obj-$(CONFIG_DAVINCI_MUX)               += mux.o
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
index d1b954955c1..b2267d1e1a7 100644
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ b/arch/arm/mach-davinci/include/mach/io.h
@@ -21,12 +21,4 @@
 #define __mem_pci(a)            (a)
 #define __mem_isa(a)            (a)
-#ifndef __ASSEMBLER__
-#define __arch_ioremap          davinci_ioremap
-#define __arch_iounmap          davinci_iounmap
-void __iomem *davinci_ioremap(unsigned long phys, size_t size,
-                              unsigned int type);
-void davinci_iounmap(volatile void __iomem *addr);
-#endif
 #endif /* __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-davinci/include/mach/vmalloc.h b/arch/arm/mach-davinci/include/mach/vmalloc.h
deleted file mode 100644
index d49646a8e20..00000000000
--- a/arch/arm/mach-davinci/include/mach/vmalloc.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * DaVinci vmalloc definitions
- *
- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <mach/hardware.h>
-/* Allow vmalloc range until the IO virtual range minus a 2M "hole" */
-#define VMALLOC_END       (IO_VIRT - (2<<20))
diff --git a/arch/arm/mach-davinci/io.c b/arch/arm/mach-davinci/io.c
deleted file mode 100644
index 8ea60a8b249..00000000000
--- a/arch/arm/mach-davinci/io.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * DaVinci I/O mapping code
- *
- * Copyright (C) 2005-2006 Texas Instruments
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/module.h>
-#include <linux/io.h>
-#include <asm/tlb.h>
-#include <asm/mach/map.h>
-#include <mach/common.h>
-/*
- * Intercept ioremap() requests for addresses in our fixed mapping regions.
- */
-void __iomem *davinci_ioremap(unsigned long p, size_t size, unsigned int type)
-{
-        struct map_desc *desc = davinci_soc_info.io_desc;
-        int desc_num = davinci_soc_info.io_desc_num;
-        int i;
-        for (i = 0; i < desc_num; i++, desc++) {
-                unsigned long iophys = __pfn_to_phys(desc->pfn);
-                unsigned long iosize = desc->length;
-                if (p >= iophys && (p + size) <= (iophys + iosize))
-                        return __io(desc->virtual + p - iophys);
-        }
-        return __arm_ioremap_caller(p, size, type,
-                                        __builtin_return_address(0));
-}
-EXPORT_SYMBOL(davinci_ioremap);
-void davinci_iounmap(volatile void __iomem *addr)
-{
-        unsigned long virt = (unsigned long)addr;
-        if (virt >= VMALLOC_START && virt < VMALLOC_END)
-                __iounmap(addr);
-}
-EXPORT_SYMBOL(davinci_iounmap);
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index b20ec9af788..ad1165d488c 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -11,8 +11,6 @@
 #ifndef __ASM_ARCH_DOVE_H
 #define __ASM_ARCH_DOVE_H
-#include <mach/vmalloc.h>
 /*
 * Marvell Dove address maps.
 *
diff --git a/arch/arm/mach-dove/include/mach/vmalloc.h b/arch/arm/mach-dove/include/mach/vmalloc.h
deleted file mode 100644
index a28792cf761..00000000000
--- a/arch/arm/mach-dove/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-dove/include/mach/vmalloc.h
- */
-#define VMALLOC_END     0xfd800000UL
diff --git a/arch/arm/mach-ebsa110/include/mach/vmalloc.h b/arch/arm/mach-ebsa110/include/mach/vmalloc.h
deleted file mode 100644
index ea141b7a3e0..00000000000
--- a/arch/arm/mach-ebsa110/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- *  arch/arm/mach-ebsa110/include/mach/vmalloc.h
- *
- *  Copyright (C) 1998 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#define VMALLOC_END       0xdf000000UL
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 7b41651728c..681e939407d 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -16,6 +16,7 @@
 #include <mach/hardware.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -36,6 +37,7 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = adssphere_init_machine,
        .restart        = ep93xx_restart,
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index c5731c68acc..d115653edca 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -39,6 +39,7 @@
 #include <mach/ep93xx_spi.h>
 #include <mach/gpio-ep93xx.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -250,6 +251,7 @@ MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
        .restart        = ep93xx_restart,
@@ -262,6 +264,7 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
        .restart        = ep93xx_restart,
@@ -274,6 +277,7 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
        .restart        = ep93xx_restart,
@@ -286,6 +290,7 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
        .restart        = ep93xx_restart,
@@ -298,6 +303,7 @@ MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
        .restart        = ep93xx_restart,
@@ -310,6 +316,7 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
        .restart        = ep93xx_restart,
@@ -322,6 +329,7 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
        .restart        = ep93xx_restart,
@@ -334,6 +342,7 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = edb93xx_init_machine,
        .restart        = ep93xx_restart,
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 7b89e8a1bb7..af46970dc58 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -16,6 +16,7 @@
 #include <mach/hardware.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -36,6 +37,7 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = gesbc9312_init_machine,
        .restart        = ep93xx_restart,
diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
index 96b85e2c2c0..9be6edcf904 100644
--- a/arch/arm/mach-ep93xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
@@ -9,51 +9,9 @@
 * the Free Software Foundation; either version 2 of the License, or (at
 * your option) any later version.
 */
-#include <mach/ep93xx-regs.h>
                .macro  disable_fiq
                .endm
-                .macro  get_irqnr_preamble, base, tmp
-                .endm
                .macro  arch_ret_to_user, tmp1, tmp2
                .endm
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \base, =(EP93XX_AHB_VIRT_BASE)
-                orr     \base, \base, #0x000b0000
-                mov     \irqnr, #0
-                ldr     \irqstat, [\base]               @ lower 32 interrupts
-                cmp     \irqstat, #0
-                bne     1001f
-                eor     \base, \base, #0x00070000
-                ldr     \irqstat, [\base]               @ upper 32 interrupts
-                cmp     \irqstat, #0
-                beq     1002f
-                mov     \irqnr, #0x20
-1001:
-                movs    \tmp, \irqstat, lsl #16
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #16
-                movs    \tmp, \irqstat, lsl #8
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #8
-                movs    \tmp, \irqstat, lsl #4
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #4
-                movs    \tmp, \irqstat, lsl #2
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #2
-                movs    \tmp, \irqstat, lsl #1
-                addeq   \irqnr, \irqnr, #1
-                orrs    \base, \base, #1
-1002:
-                .endm
diff --git a/arch/arm/mach-ep93xx/include/mach/vmalloc.h b/arch/arm/mach-ep93xx/include/mach/vmalloc.h
deleted file mode 100644
index 1b3f25d03d3..00000000000
--- a/arch/arm/mach-ep93xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-ep93xx/include/mach/vmalloc.h
- */
-#define VMALLOC_END     0xfe800000UL
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index 050ce9216d7..7b98084f0c9 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -18,6 +18,7 @@
 #include <mach/hardware.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -80,6 +81,7 @@ MACHINE_START(MICRO9, "Contec Micro9-High")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = micro9_init_machine,
        .restart        = ep93xx_restart,
@@ -92,6 +94,7 @@ MACHINE_START(MICRO9M, "Contec Micro9-Mid")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = micro9_init_machine,
        .restart        = ep93xx_restart,
@@ -104,6 +107,7 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = micro9_init_machine,
        .restart        = ep93xx_restart,
@@ -116,6 +120,7 @@ MACHINE_START(MICRO9S, "Contec Micro9-Slim")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = micro9_init_machine,
        .restart        = ep93xx_restart,
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index 188cbdb4dbd..f4e553eca21 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -25,6 +25,7 @@
 #include <mach/fb.h>
 #include <mach/gpio-ep93xx.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -80,6 +81,7 @@ MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = simone_init_machine,
        .restart        = ep93xx_restart,
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index 797afdee80a..fd846331ddf 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -31,6 +31,7 @@
 #include <mach/fb.h>
 #include <mach/gpio-ep93xx.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -177,6 +178,7 @@ MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
        .atag_offset    = 0x100,
        .map_io         = ep93xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = snappercl15_init_machine,
        .restart        = ep93xx_restart,
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index de9bb541b55..79f8ecf07a1 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -23,6 +23,7 @@
 #include <mach/hardware.h>
 #include <mach/ts72xx.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
 #include <asm/mach/arch.h>
@@ -247,6 +248,7 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
        .atag_offset    = 0x100,
        .map_io         = ts72xx_map_io,
        .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &ep93xx_timer,
        .init_machine   = ts72xx_init_machine,
        .restart        = ep93xx_restart,
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 724ec0f3560..e1efbca2a53 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -17,6 +17,8 @@ choice
 config ARCH_EXYNOS4
        bool "SAMSUNG EXYNOS4"
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
        help
          Samsung EXYNOS4 SoCs based systems
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 6f567a4d851..d2acb0f948c 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -175,11 +175,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
                .length         = SZ_4K,
                .type           = MT_DEVICE,
        }, {
-                .virtual        = (unsigned long)S5P_VA_SROMC,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_SROMC),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
                .virtual        = (unsigned long)S3C_VA_USB_HSPHY,
                .pfn            = __phys_to_pfn(EXYNOS4_PA_HSPHY),
                .length         = SZ_4K,
diff --git a/arch/arm/mach-exynos/include/mach/entry-macro.S b/arch/arm/mach-exynos/include/mach/entry-macro.S
index f5e9fd8e37b..3ba4f547534 100644
--- a/arch/arm/mach-exynos/include/mach/entry-macro.S
+++ b/arch/arm/mach-exynos/include/mach/entry-macro.S
@@ -9,83 +9,8 @@
 * warranty of any kind, whether express or implied.
 */
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <asm/hardware/gic.h>
                .macro  disable_fiq
                .endm
-                .macro  get_irqnr_preamble, base, tmp
-                mov     \tmp, #0
-                mrc     p15, 0, \base, c0, c0, 5
-                and     \base, \base, #3
-                cmp     \base, #0
-                beq     1f
-                ldr     \tmp, =gic_bank_offset
-                ldr     \tmp, [\tmp]
-                cmp     \base, #1
-                beq     1f
-                cmp     \base, #2
-                addeq   \tmp, \tmp, \tmp
-                addne   \tmp, \tmp, \tmp, LSL #1
-1:              ldr     \base, =gic_cpu_base_addr
-                ldr     \base, [\base]
-                add     \base, \base, \tmp
-                .endm
                .macro  arch_ret_to_user, tmp1, tmp2
                .endm
-                /*
-                 * The interrupt numbering scheme is defined in the
-                 * interrupt controller spec.  To wit:
-                 *
-                 * Interrupts 0-15 are IPI
-                 * 16-28 are reserved
-                 * 29-31 are local.  We allow 30 to be used for the watchdog.
-                 * 32-1020 are global
-                 * 1021-1022 are reserved
-                 * 1023 is "spurious" (no interrupt)
-                 *
-                 * For now, we ignore all local interrupts so only return an interrupt if it's
-                 * between 30 and 1020.  The test_for_ipi routine below will pick up on IPIs.
-                 *
-                 * A simple read from the controller will tell us the number of the highest
-                 * priority enabled interrupt.  We then just need to check whether it is in the
-                 * valid range for an IRQ (30-1020 inclusive).
-                 */
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
-                ldr     \tmp, =1021
-                bic     \irqnr, \irqstat, #0x1c00
-                cmp     \irqnr, #15
-                cmpcc   \irqnr, \irqnr
-                cmpne   \irqnr, \tmp
-                cmpcs   \irqnr, \irqnr
-                addne   \irqnr, \irqnr, #32
-                .endm
-                /* We assume that irqstat (the raw value of the IRQ acknowledge
-                 * register) is preserved from the macro above.
-                 * If there is an IPI, we immediately signal end of interrupt on the
-                 * controller, since this requires the original irqstat value which
-                 * we won't easily be able to recreate later.
-                 */
-                .macro test_for_ipi, irqnr, irqstat, base, tmp
-                bic     \irqnr, \irqstat, #0x1c00
-                cmp     \irqnr, #16
-                strcc   \irqstat, [\base, #GIC_CPU_EOI]
-                cmpcs   \irqnr, \irqnr
-                .endm
diff --git a/arch/arm/mach-exynos/include/mach/vmalloc.h b/arch/arm/mach-exynos/include/mach/vmalloc.h
deleted file mode 100644
index 284330e571d..00000000000
--- a/arch/arm/mach-exynos/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* linux/arch/arm/mach-exynos4/include/mach/vmalloc.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
- *
- * Based on arch/arm/mach-s5p6440/include/mach/vmalloc.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * EXYNOS4 vmalloc definition
-*/
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H __FILE__
-#define VMALLOC_END     0xF6000000UL
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-exynos/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c
index 9a2b99646d2..d726fcd3acf 100644
--- a/arch/arm/mach-exynos/mach-armlex4210.c
+++ b/arch/arm/mach-exynos/mach-armlex4210.c
@@ -16,6 +16,7 @@
 #include <linux/smsc911x.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <plat/cpu.h>
@@ -211,6 +212,7 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = armlex4210_map_io,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = armlex4210_machine_init,
        .timer          = &exynos4_timer,
        .restart        = exynos4_restart,
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 5f6b97f04b7..635fb97e31a 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -32,6 +32,7 @@
 #include <media/v4l2-mediabus.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <plat/adc.h>
@@ -1334,6 +1335,7 @@ MACHINE_START(NURI, "NURI")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = nuri_map_io,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = nuri_machine_init,
        .timer          = &exynos4_timer,
        .reserve        = &nuri_reserve,
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 9536b335691..586eb995aa9 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -22,6 +22,7 @@
 #include <linux/lcd.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <video/platform_lcd.h>
@@ -695,6 +696,7 @@ MACHINE_START(ORIGEN, "ORIGEN")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = origen_map_io,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = origen_machine_init,
        .timer          = &exynos4_timer,
        .reserve        = &origen_reserve,
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index 375b5aa5e16..d00e4f016a6 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -21,6 +21,7 @@
 #include <linux/serial_core.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <plat/backlight.h>
@@ -288,6 +289,7 @@ MACHINE_START(SMDK4212, "SMDK4212")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = smdk4x12_map_io,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = smdk4x12_machine_init,
        .timer          = &exynos4_timer,
        .restart        = exynos4_restart,
@@ -299,6 +301,7 @@ MACHINE_START(SMDK4412, "SMDK4412")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = smdk4x12_map_io,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = smdk4x12_machine_init,
        .timer          = &exynos4_timer,
        .restart        = exynos4_restart,
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index f2552ff5ddb..5b365613b47 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -21,6 +21,7 @@
 #include <linux/pwm_backlight.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <video/platform_lcd.h>
@@ -376,6 +377,7 @@ MACHINE_START(SMDKV310, "SMDKV310")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = smdkv310_map_io,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = smdkv310_machine_init,
        .timer          = &exynos4_timer,
        .reserve        = &smdkv310_reserve,
@@ -387,6 +389,7 @@ MACHINE_START(SMDKC210, "SMDKC210")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = smdkv310_map_io,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = smdkv310_machine_init,
        .timer          = &exynos4_timer,
        .restart        = exynos4_restart,
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 0078d062616..52aea972746 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -24,6 +24,7 @@
 #include <linux/i2c/atmel_mxt_ts.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <plat/regs-serial.h>
@@ -1059,6 +1060,7 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = universal_map_io,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = universal_machine_init,
        .timer          = &exynos4_timer,
        .reserve        = &universal_reserve,
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 69ffb2fb387..60bc45e3e70 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -32,7 +32,6 @@
 #include <plat/cpu.h>
-extern unsigned int gic_bank_offset;
 extern void exynos4_secondary_startup(void);
 #define CPU1_BOOT_REG           (samsung_rev() == EXYNOS4210_REV_1_1 ? \
@@ -65,31 +64,6 @@ static void __iomem *scu_base_addr(void)
 static DEFINE_SPINLOCK(boot_lock);
-static void __cpuinit exynos4_gic_secondary_init(void)
-{
-        void __iomem *dist_base = S5P_VA_GIC_DIST +
-                                (gic_bank_offset * smp_processor_id());
-        void __iomem *cpu_base = S5P_VA_GIC_CPU +
-                                (gic_bank_offset * smp_processor_id());
-        int i;
-        /*
-         * Deal with the banked PPI and SGI interrupts - disable all
-         * PPI interrupts, ensure all SGI interrupts are enabled.
-         */
-        __raw_writel(0xffff0000, dist_base + GIC_DIST_ENABLE_CLEAR);
-        __raw_writel(0x0000ffff, dist_base + GIC_DIST_ENABLE_SET);
-        /*
-         * Set priority on PPI and SGI interrupts
-         */
-        for (i = 0; i < 32; i += 4)
-                __raw_writel(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4);
-        __raw_writel(0xf0, cpu_base + GIC_CPU_PRIMASK);
-        __raw_writel(1, cpu_base + GIC_CPU_CTRL);
-}
 void __cpuinit platform_secondary_init(unsigned int cpu)
 {
        /*
@@ -97,7 +71,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
         * core (e.g. timer irq), then they will not have been enabled
         * for us: do so
         */
-        exynos4_gic_secondary_init();
+        gic_secondary_init(0);
        /*
         * let the primary processor know we're out of the
diff --git a/arch/arm/mach-footbridge/include/mach/vmalloc.h b/arch/arm/mach-footbridge/include/mach/vmalloc.h
deleted file mode 100644
index 40ba78e5782..00000000000
--- a/arch/arm/mach-footbridge/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- *  arch/arm/mach-footbridge/include/mach/vmalloc.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#define VMALLOC_END       0xf0000000UL
diff --git a/arch/arm/mach-gemini/include/mach/vmalloc.h b/arch/arm/mach-gemini/include/mach/vmalloc.h
deleted file mode 100644
index 45371eb86fc..00000000000
--- a/arch/arm/mach-gemini/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- *  Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#define VMALLOC_END     0xf0000000UL
diff --git a/arch/arm/mach-h720x/include/mach/vmalloc.h b/arch/arm/mach-h720x/include/mach/vmalloc.h
deleted file mode 100644
index 8520b4a4d4e..00000000000
--- a/arch/arm/mach-h720x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * arch/arm/mach-h720x/include/mach/vmalloc.h
- */
-#ifndef __ARCH_ARM_VMALLOC_H
-#define __ARCH_ARM_VMALLOC_H
-#define VMALLOC_END       0xd0000000UL
-#endif
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 4508384f100..804c4a55f80 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -144,6 +144,7 @@ DT_MACHINE_START(HIGHBANK, "Highbank")
        .map_io         = highbank_map_io,
        .init_irq       = highbank_init_irq,
        .timer          = &highbank_timer,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = highbank_init,
        .dt_compat      = highbank_match,
        .restart        = highbank_restart,
diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S
index 73c11297509..a14f9e62ca9 100644
--- a/arch/arm/mach-highbank/include/mach/entry-macro.S
+++ b/arch/arm/mach-highbank/include/mach/entry-macro.S
@@ -1,5 +1,3 @@
-#include <asm/hardware/entry-macro-gic.S>
        .macro  disable_fiq
        .endm
diff --git a/arch/arm/mach-highbank/include/mach/vmalloc.h b/arch/arm/mach-highbank/include/mach/vmalloc.h
deleted file mode 100644
index 1969e954277..00000000000
--- a/arch/arm/mach-highbank/include/mach/vmalloc.h
+++ /dev/null
@@ -1 +0,0 @@
-#define VMALLOC_END             0xFEE00000UL
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index c44aa974e79..35a218cb5c7 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -132,7 +132,7 @@ config MACH_MX25_3DS
        select IMX_HAVE_PLATFORM_MXC_NAND
        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
-config MACH_EUKREA_CPUIMX25
+config MACH_EUKREA_CPUIMX25SD
        bool "Support Eukrea CPUIMX25 Platform"
        select SOC_IMX25
        select IMX_HAVE_PLATFORM_FLEXCAN
@@ -148,7 +148,7 @@ config MACH_EUKREA_CPUIMX25
 choice
        prompt "Baseboard"
-        depends on MACH_EUKREA_CPUIMX25
+        depends on MACH_EUKREA_CPUIMX25SD
        default MACH_EUKREA_MBIMXSD25_BASEBOARD
 config MACH_EUKREA_MBIMXSD25_BASEBOARD
@@ -542,7 +542,7 @@ config MACH_MX35_3DS
          Include support for MX35PDK platform. This includes specific
          configurations for the board and its peripherals.
-config MACH_EUKREA_CPUIMX35
+config MACH_EUKREA_CPUIMX35SD
        bool "Support Eukrea CPUIMX35 Platform"
        select SOC_IMX35
        select IMX_HAVE_PLATFORM_FLEXCAN
@@ -560,7 +560,7 @@ config MACH_EUKREA_CPUIMX35
 choice
        prompt "Baseboard"
-        depends on MACH_EUKREA_CPUIMX35
+        depends on MACH_EUKREA_CPUIMX35SD
        default MACH_EUKREA_MBIMXSD35_BASEBOARD
 config MACH_EUKREA_MBIMXSD35_BASEBOARD
@@ -596,12 +596,12 @@ comment "i.MX6 family:"
 config SOC_IMX6Q
        bool "i.MX6 Quad support"
        select ARM_GIC
-        select CACHE_L2X0
        select CPU_V7
        select HAVE_ARM_SCU
        select HAVE_IMX_GPC
        select HAVE_IMX_MMDC
        select HAVE_IMX_SRC
+        select HAVE_SMP
        select USE_OF
        help
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index aba73214c2a..d97f409ce98 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
 # i.MX25 based machines
 obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
-obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-eukrea_cpuimx25.o
+obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o
 obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o
 # i.MX27 based machines
@@ -57,7 +57,7 @@ obj-$(CONFIG_MACH_BUG) += mach-bug.o
 # i.MX35 based machines
 obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
 obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
-obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o
+obj-$(CONFIG_MACH_EUKREA_CPUIMX35SD) += mach-cpuimx35.o
 obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o
 obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index 8116f119517..ac8238caecb 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -507,7 +507,7 @@ static struct clk_lookup lookups[] = {
 int __init mx35_clocks_init()
 {
-        unsigned int cgr2 = 3 << 26, cgr3 = 0;
+        unsigned int cgr2 = 3 << 26;
 #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
        cgr2 |= 3 << 16;
@@ -521,6 +521,12 @@ int __init mx35_clocks_init()
        __raw_writel((3 << 18), CCM_BASE + CCM_CGR0);
        __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16),
                        CCM_BASE + CCM_CGR1);
+        __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
+        __raw_writel(0, CCM_BASE + CCM_CGR3);
+        clk_enable(&iim_clk);
+        imx_print_silicon_rev("i.MX35", mx35_revision());
+        clk_disable(&iim_clk);
        /*
         * Check if we came up in internal boot mode. If yes, we need some
@@ -529,17 +535,11 @@ int __init mx35_clocks_init()
         */
        if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) {
                /* Additionally turn on UART1, SCC, and IIM clocks */
-                cgr2 |= 3 << 16 | 3 << 4;
+                clk_enable(&iim_clk);
-                cgr3 |= 3 << 2;
+                clk_enable(&uart1_clk);
+                clk_enable(&scc_clk);
        }
-        __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
-        __raw_writel(cgr3, CCM_BASE + CCM_CGR3);
-        clk_enable(&iim_clk);
-        imx_print_silicon_rev("i.MX35", mx35_revision());
-        clk_disable(&iim_clk);
 #ifdef CONFIG_MXC_USE_EPIT
        epit_timer_init(&epit1_clk,
                        MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index 012e120509e..8ecc872b254 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -53,12 +53,18 @@ static const struct imxi2c_platform_data
        .bitrate =              100000,
 };
+#define TSC2007_IRQGPIO         IMX_GPIO_NR(3, 2)
+static int tsc2007_get_pendown_state(void)
+{
+        return !gpio_get_value(TSC2007_IRQGPIO);
+}
 static struct tsc2007_platform_data tsc2007_info = {
        .model                  = 2007,
        .x_plate_ohms           = 180,
+        .get_pendown_state = tsc2007_get_pendown_state,
 };
-#define TSC2007_IRQGPIO         IMX_GPIO_NR(3, 2)
 static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
        {
                I2C_BOARD_INFO("pcf8563", 0x51),
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index dfd18f3b50e..350e26636a0 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -6,6 +6,8 @@ config ARCH_INTEGRATOR_AP
        bool "Support Integrator/AP and Integrator/PP2 platforms"
        select CLKSRC_MMIO
        select MIGHT_HAVE_PCI
+        select SERIAL_AMBA_PL010
+        select SERIAL_AMBA_PL010_CONSOLE
        help
          Include support for the ARM(R) Integrator/AP and
          Integrator/PP2 platforms.
@@ -15,6 +17,8 @@ config ARCH_INTEGRATOR_CP
        select ARCH_CINTEGRATOR
        select ARM_TIMER_SP804
        select PLAT_VERSATILE_CLCD
+        select SERIAL_AMBA_PL011
+        select SERIAL_AMBA_PL011_CONSOLE
        help
          Include support for the ARM(R) Integrator CP platform.
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 0a3e0974398..019f0ab08f6 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -29,6 +29,7 @@
 #include <mach/cm.h>
 #include <asm/system.h>
 #include <asm/leds.h>
+#include <asm/mach-types.h>
 #include <asm/mach/time.h>
 #include <asm/pgtable.h>
@@ -44,7 +45,6 @@ static struct amba_device rtc_device = {
                .flags  = IORESOURCE_MEM,
        },
        .irq            = { IRQ_RTCINT, NO_IRQ },
-        .periphid       = 0x00041030,
 };
 static struct amba_device uart0_device = {
@@ -58,7 +58,6 @@ static struct amba_device uart0_device = {
                .flags  = IORESOURCE_MEM,
        },
        .irq            = { IRQ_UARTINT0, NO_IRQ },
-        .periphid       = 0x0041010,
 };
 static struct amba_device uart1_device = {
@@ -72,7 +71,6 @@ static struct amba_device uart1_device = {
                .flags  = IORESOURCE_MEM,
        },
        .irq            = { IRQ_UARTINT1, NO_IRQ },
-        .periphid       = 0x0041010,
 };
 static struct amba_device kmi0_device = {
@@ -85,7 +83,6 @@ static struct amba_device kmi0_device = {
                .flags  = IORESOURCE_MEM,
        },
        .irq            = { IRQ_KMIINT0, NO_IRQ },
-        .periphid       = 0x00041050,
 };
 static struct amba_device kmi1_device = {
@@ -98,7 +95,6 @@ static struct amba_device kmi1_device = {
                .flags  = IORESOURCE_MEM,
        },
        .irq            = { IRQ_KMIINT1, NO_IRQ },
-        .periphid       = 0x00041050,
 };
 static struct amba_device *amba_devs[] __initdata = {
@@ -157,6 +153,19 @@ static int __init integrator_init(void)
 {
        int i;
+        /*
+         * The Integrator/AP lacks necessary AMBA PrimeCell IDs, so we need to
+         * hard-code them. The Integator/CP and forward have proper cell IDs.
+         * Else we leave them undefined to the bus driver can autoprobe them.
+         */
+        if (machine_is_integrator()) {
+                rtc_device.periphid     = 0x00041030;
+                uart0_device.periphid   = 0x00041010;
+                uart1_device.periphid   = 0x00041010;
+                kmi0_device.periphid    = 0x00041050;
+                kmi1_device.periphid    = 0x00041050;
+        }
        for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
                struct amba_device *d = amba_devs[i];
                amba_device_register(d, &iomem_resource);
diff --git a/arch/arm/mach-integrator/include/mach/vmalloc.h b/arch/arm/mach-integrator/include/mach/vmalloc.h
deleted file mode 100644
index 2f5a2bafb11..00000000000
--- a/arch/arm/mach-integrator/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/mach-integrator/include/mach/vmalloc.h
- *
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END       0xd0000000UL
diff --git a/arch/arm/mach-iop13xx/include/mach/vmalloc.h b/arch/arm/mach-iop13xx/include/mach/vmalloc.h
deleted file mode 100644
index c5345674034..00000000000
--- a/arch/arm/mach-iop13xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
-#ifndef _VMALLOC_H_
-#define _VMALLOC_H_
-#define VMALLOC_END     0xfa000000UL
-#endif
diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h
index 059c783ce0b..2d88264b986 100644
--- a/arch/arm/mach-iop32x/include/mach/io.h
+++ b/arch/arm/mach-iop32x/include/mach/io.h
@@ -13,15 +13,8 @@
 #include <asm/hardware/iop3xx.h>
-extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
-        unsigned int mtype);
-extern void __iop3xx_iounmap(void __iomem *addr);
 #define IO_SPACE_LIMIT          0xffffffff
 #define __io(p)         ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
 #define __mem_pci(a)            (a)
-#define __arch_ioremap  __iop3xx_ioremap
-#define __arch_iounmap  __iop3xx_iounmap
 #endif
diff --git a/arch/arm/mach-iop32x/include/mach/vmalloc.h b/arch/arm/mach-iop32x/include/mach/vmalloc.h
deleted file mode 100644
index c4862d48e58..00000000000
--- a/arch/arm/mach-iop32x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-iop32x/include/mach/vmalloc.h
- */
-#define VMALLOC_END     0xfe000000UL
diff --git a/arch/arm/mach-iop33x/include/mach/io.h b/arch/arm/mach-iop33x/include/mach/io.h
index 39e893e97c2..a8a66fc8fbd 100644
--- a/arch/arm/mach-iop33x/include/mach/io.h
+++ b/arch/arm/mach-iop33x/include/mach/io.h
@@ -13,15 +13,8 @@
 #include <asm/hardware/iop3xx.h>
-extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
-        unsigned int mtype);
-extern void __iop3xx_iounmap(void __iomem *addr);
 #define IO_SPACE_LIMIT          0xffffffff
 #define __io(p)         ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
 #define __mem_pci(a)            (a)
-#define __arch_ioremap  __iop3xx_ioremap
-#define __arch_iounmap  __iop3xx_iounmap
 #endif
diff --git a/arch/arm/mach-iop33x/include/mach/vmalloc.h b/arch/arm/mach-iop33x/include/mach/vmalloc.h
deleted file mode 100644
index 48331dc2370..00000000000
--- a/arch/arm/mach-iop33x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-iop33x/include/mach/vmalloc.h
- */
-#define VMALLOC_END     0xfe000000UL
diff --git a/arch/arm/mach-ixp2000/include/mach/vmalloc.h b/arch/arm/mach-ixp2000/include/mach/vmalloc.h
deleted file mode 100644
index 61c8dae24f9..00000000000
--- a/arch/arm/mach-ixp2000/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/mach-ixp2000/include/mach/vmalloc.h
- *
- * Author: Naeem Afzal <naeem.m.afzal@intel.com>
- *
- * Copyright 2002 Intel Corp.
- *
- *  This program is free software; you can redistribute  it and/or modify it
- *  under  the terms of  the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the  License, or (at your
- *  option) any later version.
- *
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts.  That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_END         0xfb000000UL
diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h
index a1749d0fd89..4ce4353b9f7 100644
--- a/arch/arm/mach-ixp23xx/include/mach/io.h
+++ b/arch/arm/mach-ixp23xx/include/mach/io.h
@@ -20,33 +20,4 @@
 #define __io(p)         ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))
 #define __mem_pci(a)    (a)
-static inline void __iomem *
-ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned int mtype)
-{
-        if (addr >= IXP23XX_PCI_MEM_START &&
-                addr <= IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE) {
-                if (addr + size > IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE)
-                        return NULL;
-                return (void __iomem *)
-                        ((addr - IXP23XX_PCI_MEM_START) + IXP23XX_PCI_MEM_VIRT);
-        }
-        return __arm_ioremap(addr, size, mtype);
-}
-static inline void
-ixp23xx_iounmap(void __iomem *addr)
-{
-        if ((((u32)addr) >= IXP23XX_PCI_MEM_VIRT) &&
-            (((u32)addr) < IXP23XX_PCI_MEM_VIRT + IXP23XX_PCI_MEM_SIZE))
-                return;
-        __iounmap(addr);
-}
-#define __arch_ioremap  ixp23xx_ioremap
-#define __arch_iounmap  ixp23xx_iounmap
 #endif
diff --git a/arch/arm/mach-ixp23xx/include/mach/vmalloc.h b/arch/arm/mach-ixp23xx/include/mach/vmalloc.h
deleted file mode 100644
index 896c56a1c00..00000000000
--- a/arch/arm/mach-ixp23xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * arch/arm/mach-ixp23xx/include/mach/vmalloc.h
- *
- * Copyright (c) 2005 MontaVista Software, Inc.
- *
- * NPU mappings end at 0xf0000000 and we allocate 64MB for board
- * specific static I/O.
- */
-#define VMALLOC_END     (0xec000000UL)
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 04aa12103bc..3841ab4146b 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -17,7 +17,6 @@
 #include <linux/mm.h>
 #include <linux/init.h>
 #include <linux/serial.h>
-#include <linux/sched.h>
 #include <linux/tty.h>
 #include <linux/platform_device.h>
 #include <linux/serial_core.h>
@@ -403,18 +402,9 @@ void __init ixp4xx_sys_init(void)
 /*
 * sched_clock()
 */
-static DEFINE_CLOCK_DATA(cd);
+static u32 notrace ixp4xx_read_sched_clock(void)
-unsigned long long notrace sched_clock(void)
 {
-        u32 cyc = *IXP4XX_OSTS;
+        return *IXP4XX_OSTS;
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-static void notrace ixp4xx_update_sched_clock(void)
-{
-        u32 cyc = *IXP4XX_OSTS;
-        update_sched_clock(&cd, cyc, (u32)~0);
 }
 /*
@@ -430,7 +420,7 @@ unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ;
 EXPORT_SYMBOL(ixp4xx_timer_freq);
 static void __init ixp4xx_clocksource_init(void)
 {
-        init_sched_clock(&cd, ixp4xx_update_sched_clock, 32, ixp4xx_timer_freq);
+        setup_sched_clock(ixp4xx_read_sched_clock, 32, ixp4xx_timer_freq);
        clocksource_mmio_init(NULL, "OSTS", ixp4xx_timer_freq, 200, 32,
                        ixp4xx_clocksource_read);
diff --git a/arch/arm/mach-ixp4xx/include/mach/vmalloc.h b/arch/arm/mach-ixp4xx/include/mach/vmalloc.h
deleted file mode 100644
index 9bcd64d5985..00000000000
--- a/arch/arm/mach-ixp4xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-ixp4xx/include/mach/vmalloc.h
- */
-#define VMALLOC_END       (0xff000000UL)
diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h
index 1aaddc364f2..49dd0cb5e16 100644
--- a/arch/arm/mach-kirkwood/include/mach/io.h
+++ b/arch/arm/mach-kirkwood/include/mach/io.h
@@ -19,31 +19,6 @@ static inline void __iomem *__io(unsigned long addr)
                                        + KIRKWOOD_PCIE_IO_VIRT_BASE);
 }
-static inline void __iomem *
-__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype)
-{
-        void __iomem *retval;
-        unsigned long offs = paddr - KIRKWOOD_REGS_PHYS_BASE;
-        if (mtype == MT_DEVICE && size && offs < KIRKWOOD_REGS_SIZE &&
-            size <= KIRKWOOD_REGS_SIZE && offs + size <= KIRKWOOD_REGS_SIZE) {
-                retval = (void __iomem *)KIRKWOOD_REGS_VIRT_BASE + offs;
-        } else {
-                retval = __arm_ioremap(paddr, size, mtype);
-        }
-        return retval;
-}
-static inline void
-__arch_iounmap(void __iomem *addr)
-{
-        if (addr < (void __iomem *)KIRKWOOD_REGS_VIRT_BASE ||
-            addr >= (void __iomem *)(KIRKWOOD_REGS_VIRT_BASE + KIRKWOOD_REGS_SIZE))
-                __iounmap(addr);
-}
-#define __arch_ioremap          __arch_ioremap
-#define __arch_iounmap          __arch_iounmap
 #define __io(a)                 __io(a)
 #define __mem_pci(a)            (a)
diff --git a/arch/arm/mach-kirkwood/include/mach/vmalloc.h b/arch/arm/mach-kirkwood/include/mach/vmalloc.h
deleted file mode 100644
index bf162ca3d2c..00000000000
--- a/arch/arm/mach-kirkwood/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-kirkwood/include/mach/vmalloc.h
- */
-#define VMALLOC_END     0xfe800000UL
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
index 85bff6b7699..4ea70e5f713 100644
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -107,7 +107,7 @@ static void __init sheevaplug_init(void)
        kirkwood_init();
        /* setup gpio pin select */
-        if (machine_is_sheeva_esata())
+        if (machine_is_esata_sheevaplug())
                kirkwood_mpp_conf(sheeva_esata_mpp_config);
        else
                kirkwood_mpp_conf(sheevaplug_mpp_config);
@@ -123,11 +123,11 @@ static void __init sheevaplug_init(void)
        kirkwood_ge00_init(&sheevaplug_ge00_data);
        /* honor lower power consumption for plugs with out eSATA */
-        if (machine_is_sheeva_esata())
+        if (machine_is_esata_sheevaplug())
                kirkwood_sata_init(&sheeva_esata_sata_data);
        /* enable sd wp and sd cd on plugs with esata */
-        if (machine_is_sheeva_esata())
+        if (machine_is_esata_sheevaplug())
                kirkwood_sdio_init(&sheeva_esata_mvsdio_data);
        else
                kirkwood_sdio_init(&sheevaplug_mvsdio_data);
diff --git a/arch/arm/mach-ks8695/include/mach/vmalloc.h b/arch/arm/mach-ks8695/include/mach/vmalloc.h
deleted file mode 100644
index 744ac66be3a..00000000000
--- a/arch/arm/mach-ks8695/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-ks8695/include/mach/vmalloc.h
- *
- * Copyright (C) 2006 Ben Dooks
- * Copyright (C) 2006 Simtec Electronics <linux@simtec.co.uk>
- *
- * KS8695 vmalloc definition
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-#define VMALLOC_END       (KS8695_IO_VA & PGDIR_MASK)
-#endif
diff --git a/arch/arm/mach-lpc32xx/include/mach/vmalloc.h b/arch/arm/mach-lpc32xx/include/mach/vmalloc.h
deleted file mode 100644
index 720fa43a60b..00000000000
--- a/arch/arm/mach-lpc32xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * arch/arm/mach-lpc32xx/include/mach/vmalloc.h
- *
- * Author: Kevin Wells <kevin.wells@nxp.com>
- *
- * Copyright (C) 2010 NXP Semiconductors
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-#define VMALLOC_END     0xF0000000UL
-#endif
diff --git a/arch/arm/mach-mmp/include/mach/vmalloc.h b/arch/arm/mach-mmp/include/mach/vmalloc.h
deleted file mode 100644
index 1d0bac003ad..00000000000
--- a/arch/arm/mach-mmp/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * linux/arch/arm/mach-mmp/include/mach/vmalloc.h
- */
-#define VMALLOC_END     0xfe000000UL
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 4e91ee6e27c..71fc4ee4602 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -25,7 +25,6 @@
 #include <linux/io.h>
 #include <linux/irq.h>
-#include <linux/sched.h>
 #include <asm/sched_clock.h>
 #include <mach/addr-map.h>
@@ -42,8 +41,6 @@
 #define MAX_DELTA               (0xfffffffe)
 #define MIN_DELTA               (16)
-static DEFINE_CLOCK_DATA(cd);
 /*
 * FIXME: the timer needs some delay to stablize the counter capture
 */
@@ -59,16 +56,9 @@ static inline uint32_t timer_read(void)
        return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(1));
 }
-unsigned long long notrace sched_clock(void)
+static u32 notrace mmp_read_sched_clock(void)
 {
-        u32 cyc = timer_read();
+        return timer_read();
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-static void notrace mmp_update_sched_clock(void)
-{
-        u32 cyc = timer_read();
-        update_sched_clock(&cd, cyc, (u32)~0);
 }
 static irqreturn_t timer_interrupt(int irq, void *dev_id)
@@ -201,7 +191,7 @@ void __init timer_init(int irq)
 {
        timer_config();
-        init_sched_clock(&cd, mmp_update_sched_clock, 32, CLOCK_TICK_RATE);
+        setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE);
        ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift);
        ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt);
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index ebde97f5d5f..e6beaff7621 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -67,6 +67,7 @@ config MSM_SOC_REV_A
        bool
 config  ARCH_MSM_SCORPIONMP
        bool
+        select HAVE_SMP
 config  ARCH_MSM_ARM11
        bool
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 6dc1cbd2a59..ed359812853 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -99,6 +99,7 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
        .map_io = msm8960_map_io,
        .init_irq = msm8960_init_irq,
        .timer = &msm_timer,
+        .handle_irq = gic_handle_irq,
        .init_machine = msm8960_sim_init,
 MACHINE_END
@@ -108,6 +109,7 @@ MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
        .map_io = msm8960_map_io,
        .init_irq = msm8960_init_irq,
        .timer = &msm_timer,
+        .handle_irq = gic_handle_irq,
        .init_machine = msm8960_rumi3_init,
 MACHINE_END
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 44bf7168837..0a113424632 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -108,6 +108,7 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
        .reserve = msm8x60_reserve,
        .map_io = msm8x60_map_io,
        .init_irq = msm8x60_init_irq,
+        .handle_irq = gic_handle_irq,
        .init_machine = msm8x60_init,
        .timer = &msm_timer,
 MACHINE_END
@@ -117,6 +118,7 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
        .reserve = msm8x60_reserve,
        .map_io = msm8x60_map_io,
        .init_irq = msm8x60_init_irq,
+        .handle_irq = gic_handle_irq,
        .init_machine = msm8x60_init,
        .timer = &msm_timer,
 MACHINE_END
@@ -126,6 +128,7 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
        .reserve = msm8x60_reserve,
        .map_io = msm8x60_map_io,
        .init_irq = msm8x60_init_irq,
+        .handle_irq = gic_handle_irq,
        .init_machine = msm8x60_init,
        .timer = &msm_timer,
 MACHINE_END
@@ -135,6 +138,7 @@ MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
        .reserve = msm8x60_reserve,
        .map_io = msm8x60_map_io,
        .init_irq = msm8x60_init_irq,
+        .handle_irq = gic_handle_irq,
        .init_machine = msm8x60_init,
        .timer = &msm_timer,
 MACHINE_END
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
deleted file mode 100644
index 717076f3ca7..00000000000
--- a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Low-level IRQ helper macros
- *
- * Copyright (c) 2010, Code Aurora Forum. All rights reserved.
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#include <asm/hardware/entry-macro-gic.S>
-        .macro  disable_fiq
-        .endm
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-vic.S b/arch/arm/mach-msm/include/mach/entry-macro-vic.S
deleted file mode 100644
index 70563ed11b3..00000000000
--- a/arch/arm/mach-msm/include/mach/entry-macro-vic.S
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (C) 2007 Google, Inc.
- * Author: Brian Swetland <swetland@google.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-#include <mach/msm_iomap.h>
-        .macro  disable_fiq
-        .endm
-        .macro  get_irqnr_preamble, base, tmp
-        @ enable imprecise aborts
-        cpsie   a
-        mov     \base, #MSM_VIC_BASE
-        .endm
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        @ 0xD0 has irq# or old irq# if the irq has been handled
-        @ 0xD4 has irq# or -1 if none pending *but* if you just
-        @ read 0xD4 you never get the first irq for some reason
-        ldr     \irqnr, [\base, #0xD0]
-        ldr     \irqnr, [\base, #0xD4]
-        cmp     \irqnr, #0xffffffff
-        .endm
diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S
index b16f082eeb6..41f7003ef34 100644
--- a/arch/arm/mach-msm/include/mach/entry-macro.S
+++ b/arch/arm/mach-msm/include/mach/entry-macro.S
@@ -16,8 +16,27 @@
 *
 */
-#if defined(CONFIG_ARM_GIC)
+        .macro  disable_fiq
-#include <mach/entry-macro-qgic.S>
+        .endm
-#else
-#include <mach/entry-macro-vic.S>
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+#if !defined(CONFIG_ARM_GIC)
+#include <mach/msm_iomap.h>
+        .macro  get_irqnr_preamble, base, tmp
+        @ enable imprecise aborts
+        cpsie   a
+        mov     \base, #MSM_VIC_BASE
+        .endm
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+        @ 0xD0 has irq# or old irq# if the irq has been handled
+        @ 0xD4 has irq# or -1 if none pending *but* if you just
+        @ read 0xD4 you never get the first irq for some reason
+        ldr     \irqnr, [\base, #0xD0]
+        ldr     \irqnr, [\base, #0xD4]
+        cmp     \irqnr, #0xffffffff
+        .endm
 #endif
diff --git a/arch/arm/mach-msm/include/mach/vmalloc.h b/arch/arm/mach-msm/include/mach/vmalloc.h
deleted file mode 100644
index d138448eff1..00000000000
--- a/arch/arm/mach-msm/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* arch/arm/mach-msm/include/mach/vmalloc.h
- *
- * Copyright (C) 2007 Google, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-#ifndef __ASM_ARCH_MSM_VMALLOC_H
-#define __ASM_ARCH_MSM_VMALLOC_H
-#define VMALLOC_END       0xd0000000UL
-#endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/vmalloc.h b/arch/arm/mach-mv78xx0/include/mach/vmalloc.h
deleted file mode 100644
index ba26fe98e64..00000000000
--- a/arch/arm/mach-mv78xx0/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-mv78xx0/include/mach/vmalloc.h
- */
-#define VMALLOC_END     0xfe000000UL
diff --git a/arch/arm/mach-mxs/include/mach/vmalloc.h b/arch/arm/mach-mxs/include/mach/vmalloc.h
deleted file mode 100644
index 103b0165ed0..00000000000
--- a/arch/arm/mach-mxs/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- *  Copyright (C) 2000 Russell King.
- *  Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __MACH_MXS_VMALLOC_H__
-#define __MACH_MXS_VMALLOC_H__
-/* vmalloc ending address */
-#define VMALLOC_END       0xf4000000UL
-#endif /* __MACH_MXS_VMALLOC_H__ */
diff --git a/arch/arm/mach-netx/include/mach/entry-macro.S b/arch/arm/mach-netx/include/mach/entry-macro.S
index 844f1f9acbd..6e9f1cbe163 100644
--- a/arch/arm/mach-netx/include/mach/entry-macro.S
+++ b/arch/arm/mach-netx/include/mach/entry-macro.S
@@ -18,22 +18,9 @@
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
-#include <mach/hardware.h>
                .macro  disable_fiq
                .endm
-                .macro  get_irqnr_preamble, base, tmp
-                ldr     \base, =io_p2v(0x001ff000)
-                .endm
                .macro  arch_ret_to_user, tmp1, tmp2
                .endm
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \irqstat, [\base, #0]
-                clz     \irqnr, \irqstat
-                rsb     \irqnr, \irqnr, #31
-                cmp     \irqstat, #0
-                .endm
diff --git a/arch/arm/mach-netx/include/mach/vmalloc.h b/arch/arm/mach-netx/include/mach/vmalloc.h
deleted file mode 100644
index 871f1ef7bff..00000000000
--- a/arch/arm/mach-netx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- *  arch/arm/mach-netx/include/mach/vmalloc.h
- *
- * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END       0xd0000000UL
diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c
index 5384b5a78f6..180ea899a48 100644
--- a/arch/arm/mach-netx/nxdb500.c
+++ b/arch/arm/mach-netx/nxdb500.c
@@ -28,6 +28,7 @@
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/vic.h>
 #include <mach/netx-regs.h>
 #include <mach/eth.h>
@@ -203,6 +204,7 @@ MACHINE_START(NXDB500, "Hilscher nxdb500")
        .atag_offset    = 0x100,
        .map_io         = netx_map_io,
        .init_irq       = netx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &netx_timer,
        .init_machine   = nxdb500_init,
        .restart        = netx_restart,
diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c
index 2df3783ef45..58009e29b20 100644
--- a/arch/arm/mach-netx/nxdkn.c
+++ b/arch/arm/mach-netx/nxdkn.c
@@ -28,6 +28,7 @@
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/vic.h>
 #include <mach/netx-regs.h>
 #include <mach/eth.h>
@@ -96,6 +97,7 @@ MACHINE_START(NXDKN, "Hilscher nxdkn")
        .atag_offset    = 0x100,
        .map_io         = netx_map_io,
        .init_irq       = netx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &netx_timer,
        .init_machine   = nxdkn_init,
        .restart        = netx_restart,
diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c
index 26255b2ce47..122e99826ef 100644
--- a/arch/arm/mach-netx/nxeb500hmi.c
+++ b/arch/arm/mach-netx/nxeb500hmi.c
@@ -28,6 +28,7 @@
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/vic.h>
 #include <mach/netx-regs.h>
 #include <mach/eth.h>
@@ -180,6 +181,7 @@ MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi")
        .atag_offset    = 0x100,
        .map_io         = netx_map_io,
        .init_irq       = netx_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &netx_timer,
        .init_machine   = nxeb500hmi_init,
        .restart        = netx_restart,
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 68c7b79bad7..7c878bf0034 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -21,6 +21,7 @@
 #include <linux/mtd/onenand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/io.h>
+#include <asm/hardware/vic.h>
 #include <asm/sizes.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -282,6 +283,7 @@ MACHINE_START(NOMADIK, "NHK8815")
        .atag_offset    = 0x100,
        .map_io         = cpu8815_map_io,
        .init_irq       = cpu8815_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &nomadik_timer,
        .init_machine   = nhk8815_platform_init,
        .restart        = cpu8815_restart,
diff --git a/arch/arm/mach-nomadik/include/mach/entry-macro.S b/arch/arm/mach-nomadik/include/mach/entry-macro.S
index 49f1aa3bb42..98ea1c1fbba 100644
--- a/arch/arm/mach-nomadik/include/mach/entry-macro.S
+++ b/arch/arm/mach-nomadik/include/mach/entry-macro.S
@@ -6,38 +6,8 @@
 * warranty of any kind, whether express or implied.
 */
-#include <mach/hardware.h>
-#include <mach/irqs.h>
        .macro  disable_fiq
        .endm
-        .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =IO_ADDRESS(NOMADIK_IC_BASE)
-        .endm
        .macro  arch_ret_to_user, tmp1, tmp2
        .endm
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        /* This stanza gets the irq mask from one of two status registers */
-        mov     \irqnr, #0
-        ldr     \irqstat, [\base, #VIC_REG_IRQSR0]      @ get masked status
-        cmp     \irqstat, #0
-        bne     1001f
-        add     \irqnr, \irqnr, #32
-        ldr     \irqstat, [\base, #VIC_REG_IRQSR1]      @ get masked status
-1001:   tst     \irqstat, #15
-        bne     1002f
-        add     \irqnr, \irqnr, #4
-        movs    \irqstat, \irqstat, lsr #4
-        bne     1001b
-1002:   tst     \irqstat, #1
-        bne     1003f
-        add     \irqnr, \irqnr, #1
-        movs    \irqstat, \irqstat, lsr #1
-        bne     1002b
-1003:   /* EQ will be set if no irqs pending */
-        .endm
diff --git a/arch/arm/mach-nomadik/include/mach/vmalloc.h b/arch/arm/mach-nomadik/include/mach/vmalloc.h
deleted file mode 100644
index f83d574d944..00000000000
--- a/arch/arm/mach-nomadik/include/mach/vmalloc.h
+++ /dev/null
@@ -1,2 +0,0 @@
-#define VMALLOC_END       0xe8000000UL
diff --git a/arch/arm/mach-omap1/include/mach/vmalloc.h b/arch/arm/mach-omap1/include/mach/vmalloc.h
deleted file mode 100644
index 22ec4a47957..00000000000
--- a/arch/arm/mach-omap1/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/mach-omap1/include/mach/vmalloc.h
- *
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#define VMALLOC_END     0xd8000000UL
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 7969cfda445..8e55b6fb347 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -121,7 +121,6 @@ void __init omap16xx_map_io(void)
 void omap1_init_early(void)
 {
        omap_check_revision();
-        omap_ioremap_init();
        /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
         * on a Posted Write in the TIPB Bridge".
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 485a21d3100..b8faffa44f9 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -37,7 +37,6 @@
 #include <linux/init.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
-#include <linux/sched.h>
 #include <linux/spinlock.h>
 #include <linux/clk.h>
 #include <linux/err.h>
@@ -190,30 +189,9 @@ static __init void omap_init_mpu_timer(unsigned long rate)
 * ---------------------------------------------------------------------------
 */
-static DEFINE_CLOCK_DATA(cd);
+static u32 notrace omap_mpu_read_sched_clock(void)
-static inline unsigned long long notrace _omap_mpu_sched_clock(void)
-{
-        u32 cyc = ~omap_mpu_timer_read(1);
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-#ifndef CONFIG_OMAP_32K_TIMER
-unsigned long long notrace sched_clock(void)
-{
-        return _omap_mpu_sched_clock();
-}
-#else
-static unsigned long long notrace omap_mpu_sched_clock(void)
-{
-        return _omap_mpu_sched_clock();
-}
-#endif
-static void notrace mpu_update_sched_clock(void)
 {
-        u32 cyc = ~omap_mpu_timer_read(1);
+        return ~omap_mpu_timer_read(1);
-        update_sched_clock(&cd, cyc, (u32)~0);
 }
 static void __init omap_init_clocksource(unsigned long rate)
@@ -223,7 +201,7 @@ static void __init omap_init_clocksource(unsigned long rate)
                        "%s: can't register clocksource!\n";
        omap_mpu_timer_start(1, ~0, 1);
-        init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
+        setup_sched_clock(omap_mpu_read_sched_clock, 32, rate);
        if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate,
                        300, 32, clocksource_mmio_readl_down))
@@ -254,30 +232,6 @@ static inline void omap_mpu_timer_init(void)
 }
 #endif  /* CONFIG_OMAP_MPU_TIMER */
-#if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER)
-static unsigned long long (*preferred_sched_clock)(void);
-unsigned long long notrace sched_clock(void)
-{
-        if (!preferred_sched_clock)
-                return 0;
-        return preferred_sched_clock();
-}
-static inline void preferred_sched_clock_init(bool use_32k_sched_clock)
-{
-        if (use_32k_sched_clock)
-                preferred_sched_clock = omap_32k_sched_clock;
-        else
-                preferred_sched_clock = omap_mpu_sched_clock;
-}
-#else
-static inline void preferred_sched_clock_init(bool use_32k_sched_clcok)
-{
-}
-#endif
 static inline int omap_32k_timer_usable(void)
 {
        int res = false;
@@ -299,12 +253,8 @@ static inline int omap_32k_timer_usable(void)
 */
 static void __init omap1_timer_init(void)
 {
-        if (omap_32k_timer_usable()) {
+        if (!omap_32k_timer_usable())
-                preferred_sched_clock_init(1);
-        } else {
                omap_mpu_timer_init();
-                preferred_sched_clock_init(0);
-        }
 }
 struct sys_timer omap1_timer = {
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index e1293aa513d..4f01533083c 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -25,6 +25,7 @@ config ARCH_OMAP2
        depends on ARCH_OMAP2PLUS
        default y
        select CPU_V6
+        select MULTI_IRQ_HANDLER
 config ARCH_OMAP3
        bool "TI OMAP3"
@@ -36,13 +37,16 @@ config ARCH_OMAP3
        select ARCH_HAS_OPP
        select PM_OPP if PM
        select ARM_CPU_SUSPEND if PM
+        select MULTI_IRQ_HANDLER
 config ARCH_OMAP4
        bool "TI OMAP4"
        default y
        depends on ARCH_OMAP2PLUS
+        select CACHE_L2X0
        select CPU_V7
        select ARM_GIC
+        select HAVE_SMP
        select LOCAL_TIMERS if SMP
        select PL310_ERRATA_588369
        select PL310_ERRATA_727915
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 2e730242132..7370983f809 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -301,6 +301,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
        .map_io         = omap243x_map_io,
        .init_early     = omap2430_init_early,
        .init_irq       = omap2_init_irq,
+        .handle_irq     = omap2_intc_handle_irq,
        .init_machine   = omap_2430sdp_init,
        .timer          = &omap2_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 7111677c7e6..9996334cb68 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -728,6 +728,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
        .map_io         = omap3_map_io,
        .init_early     = omap3430_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap_3430sdp_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index a01d08118a4..6ef350d1ae4 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -215,6 +215,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
        .map_io         = omap3_map_io,
        .init_early     = omap3630_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap_sdp_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 8a46ad8f122..bad5d5a5ef7 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -27,6 +27,7 @@
 #include <linux/leds_pwm.h>
 #include <mach/hardware.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -983,6 +984,7 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
        .map_io         = omap4_map_io,
        .init_early     = omap4430_init_early,
        .init_irq       = gic_init_irq,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = omap_4430sdp_init,
        .timer          = &omap4_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index c1d6b6338b0..c3851e8de28 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -98,6 +98,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
        .map_io         = omap3_map_io,
        .init_early     = am35xx_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = am3517_crane_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 18c079070ec..f5a3a3f1173 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -491,6 +491,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
        .map_io         = omap3_map_io,
        .init_early     = am35xx_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = am3517_evm_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 75c731c45b2..ac773829941 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -354,6 +354,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
        .map_io         = omap242x_map_io,
        .init_early     = omap2420_init_early,
        .init_irq       = omap2_init_irq,
+        .handle_irq     = omap2_intc_handle_irq,
        .init_machine   = omap_apollon_init,
        .timer          = &omap2_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index c3402cdf0ba..1545102d1f9 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -634,6 +634,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = cm_t35_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
@@ -645,6 +646,7 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730")
        .map_io         = omap3_map_io,
        .init_early     = omap3630_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = cm_t3730_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 0b06ac3d440..f36d694d215 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -299,6 +299,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
        .map_io         = omap3_map_io,
        .init_early     = am35xx_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = cm_t3517_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 519e5f9d491..e873063f4fd 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -660,6 +660,7 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = devkit8000_init,
        .timer          = &omap3_secure_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index f462d8c65bc..f8c5b2cc7c9 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -122,6 +122,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
        .map_io         = omap243x_map_io,
        .init_early     = omap2430_init_early,
        .init_irq       = omap2_init_irq,
+        .handle_irq     = omap2_intc_handle_irq,
        .init_machine   = omap_generic_init,
        .timer          = &omap2_timer,
        .dt_compat      = omap243x_boards_compat,
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 34ccde484fa..54af800d143 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -396,6 +396,7 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
        .map_io         = omap242x_map_io,
        .init_early     = omap2420_init_early,
        .init_irq       = omap2_init_irq,
+        .handle_irq     = omap2_intc_handle_irq,
        .init_machine   = omap_h4_init,
        .timer          = &omap2_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index e1850d55561..a59ace0ed56 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -672,6 +672,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = igep_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
@@ -683,6 +684,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = igep_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 84bbdd6e5af..2d2a61f7dcb 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -434,6 +434,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
        .map_io         = omap3_map_io,
        .init_early     = omap3430_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap_ldp_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index cc1dd541224..cef2cf1c0b8 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -689,6 +689,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
        .map_io         = omap242x_map_io,
        .init_early     = omap2420_init_early,
        .init_irq       = omap2_init_irq,
+        .handle_irq     = omap2_intc_handle_irq,
        .init_machine   = n8x0_init_machine,
        .timer          = &omap2_timer,
        .restart        = omap_prcm_restart,
@@ -700,6 +701,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
        .map_io         = omap242x_map_io,
        .init_early     = omap2420_init_early,
        .init_irq       = omap2_init_irq,
+        .handle_irq     = omap2_intc_handle_irq,
        .init_machine   = n8x0_init_machine,
        .timer          = &omap2_timer,
        .restart        = omap_prcm_restart,
@@ -711,6 +713,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
        .map_io         = omap242x_map_io,
        .init_early     = omap2420_init_early,
        .init_irq       = omap2_init_irq,
+        .handle_irq     = omap2_intc_handle_irq,
        .init_machine   = n8x0_init_machine,
        .timer          = &omap2_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index bb6031f6dcb..7ffcd2839e7 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -559,6 +559,7 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
        .map_io         = omap3_map_io,
        .init_early     = omap3_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap3_beagle_init,
        .timer          = &omap3_secure_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 60912e47325..003fe34c934 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -681,6 +681,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap3_evm_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 7ecf04a3ff1..4198dd017d8 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -208,6 +208,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap3logic_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
@@ -218,6 +219,7 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap3logic_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 7071a2473a6..1644b73017f 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -606,6 +606,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap3pandora_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 6e47987d989..cb089a46f62 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -454,6 +454,7 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
        .map_io                 = omap3_map_io,
        .init_early             = omap35xx_init_early,
        .init_irq               = omap3_init_irq,
+        .handle_irq             = omap3_intc_handle_irq,
        .init_machine           = omap3_stalker_init,
        .timer                  = &omap3_secure_timer,
        .restart                = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 5bb590a40f2..a0b851aafcc 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -381,6 +381,7 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
        .map_io         = omap3_map_io,
        .init_early     = omap3430_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap3_touchbook_init,
        .timer          = &omap3_secure_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 955cbee91b4..8b06c6a60d0 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -30,6 +30,7 @@
 #include <linux/wl12xx.h>
 #include <mach/hardware.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -576,6 +577,7 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
        .map_io         = omap4_map_io,
        .init_early     = omap4430_init_early,
        .init_irq       = gic_init_irq,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = omap4_panda_init,
        .timer          = &omap4_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index c14d7812999..52c0cef7716 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -562,6 +562,7 @@ MACHINE_START(OVERO, "Gumstix Overo")
        .map_io         = omap3_map_io,
        .init_early     = omap35xx_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = overo_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 0c67ecc244d..8678b386c6a 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -149,6 +149,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
        .map_io         = omap3_map_io,
        .init_early     = omap3630_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = rm680_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index c3e716ad2b5..27f01f051df 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -127,6 +127,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
        .map_io         = omap3_map_io,
        .init_early     = omap3430_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = rx51_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index 68d6f1c875b..5c20bcc57f2 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -135,6 +135,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
        .map_io         = omap3_map_io,
        .init_early     = omap3430_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap_zoom_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
@@ -146,6 +147,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
        .map_io         = omap3_map_io,
        .init_early     = omap3630_init_early,
        .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = omap_zoom_init,
        .timer          = &omap3_timer,
        .restart        = omap_prcm_restart,
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 1df1b396fc3..cda888a2e63 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -154,6 +154,8 @@ void omap_intc_restore_context(void);
 void omap3_intc_suspend(void);
 void omap3_intc_prepare_idle(void);
 void omap3_intc_resume_idle(void);
+void omap2_intc_handle_irq(struct pt_regs *regs);
+void omap3_intc_handle_irq(struct pt_regs *regs);
 /*
 * wfi used in low power code. Directly opcode is used instead
@@ -170,8 +172,6 @@ void omap3_intc_resume_idle(void);
 extern void __iomem *l2cache_base;
 #endif
-extern void __iomem *gic_dist_base_addr;
 extern void __init gic_init_irq(void);
 extern void omap_smc1(u32 fn, u32 arg);
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 942bb4f19f9..e20332f4abd 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -34,6 +34,7 @@
 #include "pm.h"
 #include "control.h"
+#include "common.h"
 #ifdef CONFIG_CPU_IDLE
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index dce9905d64b..bc6cf863a56 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -22,12 +22,13 @@
 #include <linux/io.h>
 #include <linux/clk.h>
 #include <linux/err.h>
+#include <linux/delay.h>
 #include <video/omapdss.h>
 #include <plat/omap_hwmod.h>
 #include <plat/omap_device.h>
 #include <plat/omap-pm.h>
-#include <plat/common.h>
+#include "common.h"
 #include "control.h"
 #include "display.h"
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index feb90a10945..56964a0c4c7 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -10,146 +10,9 @@
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
-#include <mach/hardware.h>
-#include <mach/io.h>
-#include <mach/irqs.h>
-#include <asm/hardware/gic.h>
-#include <plat/omap24xx.h>
-#include <plat/omap34xx.h>
-#include <plat/omap44xx.h>
-#include <plat/multi.h>
-#define OMAP2_IRQ_BASE          OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
-#define OMAP3_IRQ_BASE          OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
-#define OMAP4_IRQ_BASE          OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
-#define INTCPS_SIR_IRQ_OFFSET   0x0040  /* omap2/3 active interrupt offset */
-#define ACTIVEIRQ_MASK          0x7f    /* omap2/3 active interrupt bits */
                .macro  disable_fiq
                .endm
                .macro  arch_ret_to_user, tmp1, tmp2
                .endm
-/*
- * Unoptimized irq functions for multi-omap2, 3 and 4
- */
-#ifdef MULTI_OMAP2
-                /*
-                 * Configure the interrupt base on the first interrupt.
-                 * See also omap_irq_base_init for setting omap_irq_base.
-                 */
-                .macro  get_irqnr_preamble, base, tmp
-                ldr     \base, =omap_irq_base   @ irq base address
-                ldr     \base, [\base, #0]      @ irq base value
-                .endm
-                /* Check the pending interrupts. Note that base already set */
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                tst     \base, #0x100           @ gic address?
-                bne     4401f                   @ found gic
-                /* Handle omap2 and omap3 */
-                ldr     \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
-                cmp     \irqnr, #0x0
-                bne     9998f
-                ldr     \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
-                cmp     \irqnr, #0x0
-                bne     9998f
-                ldr     \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
-                cmp     \irqnr, #0x0
-                bne     9998f
-                /*
-                 * ti816x has additional IRQ pending register. Checking this
-                 * register on omap2 & omap3 has no effect (read as 0).
-                 */
-                ldr     \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
-                cmp     \irqnr, #0x0
-9998:
-                ldrne   \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
-                and     \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
-                b       9999f
-                /* Handle omap4 */
-4401:           ldr     \irqstat, [\base, #GIC_CPU_INTACK]
-                ldr     \tmp, =1021
-                bic     \irqnr, \irqstat, #0x1c00
-                cmp     \irqnr, #15
-                cmpcc   \irqnr, \irqnr
-                cmpne   \irqnr, \tmp
-                cmpcs   \irqnr, \irqnr
-9999:
-                .endm
-#ifdef CONFIG_SMP
-                /* We assume that irqstat (the raw value of the IRQ acknowledge
-                 * register) is preserved from the macro above.
-                 * If there is an IPI, we immediately signal end of interrupt
-                 * on the controller, since this requires the original irqstat
-                 * value which we won't easily be able to recreate later.
-                 */
-                .macro test_for_ipi, irqnr, irqstat, base, tmp
-                bic     \irqnr, \irqstat, #0x1c00
-                cmp     \irqnr, #16
-                it      cc
-                strcc   \irqstat, [\base, #GIC_CPU_EOI]
-                it      cs
-                cmpcs   \irqnr, \irqnr
-                .endm
-#endif  /* CONFIG_SMP */
-#else   /* MULTI_OMAP2 */
-/*
- * Optimized irq functions for omap2, 3 and 4
- */
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-                .macro  get_irqnr_preamble, base, tmp
-#ifdef CONFIG_ARCH_OMAP2
-                ldr     \base, =OMAP2_IRQ_BASE
-#else
-                ldr     \base, =OMAP3_IRQ_BASE
-#endif
-                .endm
-                /* Check the pending interrupts. Note that base already set */
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
-                cmp     \irqnr, #0x0
-                bne     9999f
-                ldr     \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
-                cmp     \irqnr, #0x0
-                bne     9999f
-                ldr     \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
-                cmp     \irqnr, #0x0
-#ifdef CONFIG_SOC_OMAPTI816X
-                bne     9999f
-                ldr     \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
-                cmp     \irqnr, #0x0
-#endif
-9999:
-                ldrne   \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
-                and     \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
-                .endm
-#endif
-#ifdef CONFIG_ARCH_OMAP4
-#define HAVE_GET_IRQNR_PREAMBLE
-#include <asm/hardware/entry-macro-gic.S>
-                .macro  get_irqnr_preamble, base, tmp
-                ldr     \base, =OMAP4_IRQ_BASE
-                .endm
-#endif
-#endif  /* MULTI_OMAP2 */
diff --git a/arch/arm/mach-omap2/include/mach/vmalloc.h b/arch/arm/mach-omap2/include/mach/vmalloc.h
deleted file mode 100644
index 86631994776..00000000000
--- a/arch/arm/mach-omap2/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/plat-omap/include/mach/vmalloc.h
- *
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#define VMALLOC_END       0xf8000000UL
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 33f090ce022..3f565dd2ea8 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -316,13 +316,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
        return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
 }
-/* See irq.c, omap4-common.c and entry-macro.S */
-void __iomem *omap_irq_base;
 static void __init omap_common_init_early(void)
 {
        omap2_check_revision();
-        omap_ioremap_init();
        omap_init_consistent_dma_size();
 }
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 65f1be6a182..42b1d659191 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -15,6 +15,7 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <mach/hardware.h>
+#include <asm/exception.h>
 #include <asm/mach/irq.h>
@@ -35,6 +36,11 @@
 /* Number of IRQ state bits in each MIR register */
 #define IRQ_BITS_PER_REG        32
+#define OMAP2_IRQ_BASE          OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
+#define OMAP3_IRQ_BASE          OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
+#define INTCPS_SIR_IRQ_OFFSET   0x0040  /* omap2/3 active interrupt offset */
+#define ACTIVEIRQ_MASK          0x7f    /* omap2/3 active interrupt bits */
 /*
 * OMAP2 has a number of different interrupt controllers, each interrupt
 * controller is identified as its own "bank". Register definitions are
@@ -143,6 +149,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
 static void __init omap_init_irq(u32 base, int nr_irqs)
 {
+        void __iomem *omap_irq_base;
        unsigned long nr_of_irqs = 0;
        unsigned int nr_banks = 0;
        int i, j;
@@ -191,6 +198,44 @@ void __init ti816x_init_irq(void)
        omap_init_irq(OMAP34XX_IC_BASE, 128);
 }
+static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs)
+{
+        u32 irqnr;
+        do {
+                irqnr = readl_relaxed(base_addr + 0x98);
+                if (irqnr)
+                        goto out;
+                irqnr = readl_relaxed(base_addr + 0xb8);
+                if (irqnr)
+                        goto out;
+                irqnr = readl_relaxed(base_addr + 0xd8);
+#ifdef CONFIG_SOC_OMAPTI816X
+                if (irqnr)
+                        goto out;
+                irqnr = readl_relaxed(base_addr + 0xf8);
+#endif
+out:
+                if (!irqnr)
+                        break;
+                irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET);
+                irqnr &= ACTIVEIRQ_MASK;
+                if (irqnr)
+                        handle_IRQ(irqnr, regs);
+        } while (irqnr);
+}
+asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs)
+{
+        void __iomem *base_addr = OMAP2_IRQ_BASE;
+        omap_intc_handle_irq(base_addr, regs);
+}
 #ifdef CONFIG_ARCH_OMAP3
 static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
@@ -263,4 +308,10 @@ void omap3_intc_resume_idle(void)
        /* Re-enable autoidle */
        intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG);
 }
+asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs)
+{
+        void __iomem *base_addr = OMAP3_IRQ_BASE;
+        omap_intc_handle_irq(base_addr, regs);
+}
 #endif /* CONFIG_ARCH_OMAP3 */
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index f327d7472ca..beecfdd56ea 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -29,11 +29,11 @@
 void __iomem *l2cache_base;
 #endif
-void __iomem *gic_dist_base_addr;
 void __init gic_init_irq(void)
 {
+        void __iomem *omap_irq_base;
+        void __iomem *gic_dist_base_addr;
        /* Static mapping, never released */
        gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
        BUG_ON(!gic_dist_base_addr);
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 7f8915ad509..eef43e2e163 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -3247,18 +3247,14 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
 /* 3430ES1-only hwmods */
 static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
-        &omap3xxx_iva_hwmod,
        &omap3430es1_dss_core_hwmod,
-        &omap3xxx_mailbox_hwmod,
        NULL
 };
 /* 3430ES2+-only hwmods */
 static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
-        &omap3xxx_iva_hwmod,
        &omap3xxx_dss_core_hwmod,
        &omap3xxx_usbhsotg_hwmod,
-        &omap3xxx_mailbox_hwmod,
        NULL
 };
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 9edcd520510..6eeff0e0ae0 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -254,7 +254,6 @@ static struct omap_dm_timer clksrc;
 /*
 * clocksource
 */
-static DEFINE_CLOCK_DATA(cd);
 static cycle_t clocksource_read_cycles(struct clocksource *cs)
 {
        return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1);
@@ -268,23 +267,12 @@ static struct clocksource clocksource_gpt = {
        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
-static void notrace dmtimer_update_sched_clock(void)
+static u32 notrace dmtimer_read_sched_clock(void)
 {
-        u32 cyc;
-        cyc = __omap_dm_timer_read_counter(&clksrc, 1);
-        update_sched_clock(&cd, cyc, (u32)~0);
-}
-unsigned long long notrace sched_clock(void)
-{
-        u32 cyc = 0;
        if (clksrc.reserved)
-                cyc = __omap_dm_timer_read_counter(&clksrc, 1);
+                return __omap_dm_timer_read_counter(clksrc.io_base, 1);
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
+        return 0;
 }
 /* Setup free-running counter for clocksource */
@@ -301,7 +289,7 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,
        __omap_dm_timer_load_start(&clksrc,
                        OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
-        init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate);
+        setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
        if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
                pr_err("Could not register clocksource %s\n",
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
index c5196101a23..e9d9afdc265 100644
--- a/arch/arm/mach-orion5x/include/mach/io.h
+++ b/arch/arm/mach-orion5x/include/mach/io.h
@@ -15,31 +15,6 @@
 #define IO_SPACE_LIMIT          0xffffffff
-static inline void __iomem *
-__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype)
-{
-        void __iomem *retval;
-        unsigned long offs = paddr - ORION5X_REGS_PHYS_BASE;
-        if (mtype == MT_DEVICE && size && offs < ORION5X_REGS_SIZE &&
-            size <= ORION5X_REGS_SIZE && offs + size <= ORION5X_REGS_SIZE) {
-                retval = (void __iomem *)ORION5X_REGS_VIRT_BASE + offs;
-        } else {
-                retval = __arm_ioremap(paddr, size, mtype);
-        }
-        return retval;
-}
-static inline void
-__arch_iounmap(void __iomem *addr)
-{
-        if (addr < (void __iomem *)ORION5X_REGS_VIRT_BASE ||
-            addr >= (void __iomem *)(ORION5X_REGS_VIRT_BASE + ORION5X_REGS_SIZE))
-                __iounmap(addr);
-}
-#define __arch_ioremap          __arch_ioremap
-#define __arch_iounmap          __arch_iounmap
 #define __io(a)                 __typesafe_io(a)
 #define __mem_pci(a)            (a)
diff --git a/arch/arm/mach-orion5x/include/mach/vmalloc.h b/arch/arm/mach-orion5x/include/mach/vmalloc.h
deleted file mode 100644
index 06b50aeff7b..00000000000
--- a/arch/arm/mach-orion5x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-orion5x/include/mach/vmalloc.h
- */
-#define VMALLOC_END       0xfd800000UL
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index 62c156b20cc..5d640874558 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -178,7 +178,7 @@ static struct hw_pci qnap_ts209_pci __initdata = {
 static int __init qnap_ts209_pci_init(void)
 {
-        if (machine_is_ts_x09())
+        if (machine_is_ts209())
                pci_common_init(&qnap_ts209_pci);
        return 0;
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
index 34d08347be5..ad871bd7b1a 100644
--- a/arch/arm/mach-picoxcell/common.c
+++ b/arch/arm/mach-picoxcell/common.c
@@ -11,6 +11,7 @@
 #include <linux/irqdomain.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
@@ -33,22 +34,20 @@ static const char *picoxcell_dt_match[] = {
 };
 static const struct of_device_id vic_of_match[] __initconst = {
-        { .compatible = "arm,pl192-vic" },
+        { .compatible = "arm,pl192-vic", .data = vic_of_init, },
        { /* Sentinel */ }
 };
 static void __init picoxcell_init_irq(void)
 {
-        vic_init(IO_ADDRESS(PICOXCELL_VIC0_BASE), 0, ~0, 0);
+        of_irq_init(vic_of_match);
-        vic_init(IO_ADDRESS(PICOXCELL_VIC1_BASE), 32, ~0, 0);
-        irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC0_BASE, 0);
-        irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC1_BASE, 32);
 }
 DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
        .map_io         = picoxcell_map_io,
        .nr_irqs        = ARCH_NR_IRQS,
        .init_irq       = picoxcell_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &picoxcell_timer,
        .init_machine   = picoxcell_init_machine,
        .dt_compat      = picoxcell_dt_match,
diff --git a/arch/arm/mach-picoxcell/include/mach/entry-macro.S b/arch/arm/mach-picoxcell/include/mach/entry-macro.S
index a6b09f75d9d..9b505ac00be 100644
--- a/arch/arm/mach-picoxcell/include/mach/entry-macro.S
+++ b/arch/arm/mach-picoxcell/include/mach/entry-macro.S
@@ -9,11 +9,8 @@
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
-#include <mach/hardware.h>
+        .macro  disable_fiq
-#include <mach/irqs.h>
+        .endm
-#include <mach/map.h>
-#define VA_VIC0         IO_ADDRESS(PICOXCELL_VIC0_BASE)
+        .macro  arch_ret_to_user, tmp1, tmp2
-#define VA_VIC1         IO_ADDRESS(PICOXCELL_VIC1_BASE)
+        .endm
-#include <asm/entry-macro-vic2.S>
diff --git a/arch/arm/mach-picoxcell/include/mach/vmalloc.h b/arch/arm/mach-picoxcell/include/mach/vmalloc.h
deleted file mode 100644
index 0216cc4b1f0..00000000000
--- a/arch/arm/mach-picoxcell/include/mach/vmalloc.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * Copyright (c) 2011 Picochip Ltd., Jamie Iles
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#define VMALLOC_END     0xfe000000UL
diff --git a/arch/arm/mach-picoxcell/time.c b/arch/arm/mach-picoxcell/time.c
index 90a554ff449..6c89cf8ab22 100644
--- a/arch/arm/mach-picoxcell/time.c
+++ b/arch/arm/mach-picoxcell/time.c
@@ -11,7 +11,6 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
-#include <linux/sched.h>
 #include <asm/mach/time.h>
 #include <asm/sched_clock.h>
@@ -66,21 +65,11 @@ static void picoxcell_add_clocksource(struct device_node *source_timer)
        dw_apb_clocksource_register(cs);
 }
-static DEFINE_CLOCK_DATA(cd);
 static void __iomem *sched_io_base;
-unsigned long long notrace sched_clock(void)
+unsigned u32 notrace picoxcell_read_sched_clock(void)
 {
-        cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0;
+        return __raw_readl(sched_io_base);
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-static void notrace picoxcell_update_sched_clock(void)
-{
-        cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0;
-        update_sched_clock(&cd, cyc, (u32)~0);
 }
 static const struct of_device_id picoxcell_rtc_ids[] __initconst = {
@@ -100,7 +89,7 @@ static void picoxcell_init_sched_clock(void)
        timer_get_base_and_rate(sched_timer, &sched_io_base, &rate);
        of_node_put(sched_timer);
-        init_sched_clock(&cd, picoxcell_update_sched_clock, 32, rate);
+        setup_sched_clock(picoxcell_read_sched_clock, 32, rate);
 }
 static const struct of_device_id picoxcell_timer_ids[] __initconst = {
diff --git a/arch/arm/mach-pnx4008/include/mach/vmalloc.h b/arch/arm/mach-pnx4008/include/mach/vmalloc.h
deleted file mode 100644
index 184913c7114..00000000000
--- a/arch/arm/mach-pnx4008/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/mach-pnx4008/include/mach/vmalloc.h
- *
- * Author: Vitaly Wool <source@mvista.com>
- *
- * 2006 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts.  That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_END       0xd0000000UL
diff --git a/arch/arm/mach-prima2/include/mach/map.h b/arch/arm/mach-prima2/include/mach/map.h
index 66b1ae2e553..6f243532570 100644
--- a/arch/arm/mach-prima2/include/mach/map.h
+++ b/arch/arm/mach-prima2/include/mach/map.h
@@ -9,8 +9,10 @@
 #ifndef __MACH_PRIMA2_MAP_H__
 #define __MACH_PRIMA2_MAP_H__
-#include <mach/vmalloc.h>
+#include <linux/const.h>
-#define SIRFSOC_VA(x)                   (VMALLOC_END + ((x) & 0x00FFF000))
+#define SIRFSOC_VA_BASE         _AC(0xFEC00000, UL)
+#define SIRFSOC_VA(x)           (SIRFSOC_VA_BASE + ((x) & 0x00FFF000))
 #endif
diff --git a/arch/arm/mach-prima2/include/mach/vmalloc.h b/arch/arm/mach-prima2/include/mach/vmalloc.h
deleted file mode 100644
index c9f90fec78e..00000000000
--- a/arch/arm/mach-prima2/include/mach/vmalloc.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * arch/arm/ach-prima2/include/mach/vmalloc.h
- *
- * Copyright (c) 2010 – 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- *
- * Licensed under GPLv2 or later.
- */
-#ifndef __MACH_VMALLOC_H
-#define __MACH_VMALLOC_H
-#include <linux/const.h>
-#define VMALLOC_END    _AC(0xFEC00000, UL)
-#endif
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S
index a73bc86a3c2..260c0c17692 100644
--- a/arch/arm/mach-pxa/include/mach/entry-macro.S
+++ b/arch/arm/mach-pxa/include/mach/entry-macro.S
@@ -7,45 +7,9 @@
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
-#include <mach/hardware.h>
-#include <mach/irqs.h>
                .macro  disable_fiq
                .endm
-                .macro  get_irqnr_preamble, base, tmp
-                .endm
                .macro  arch_ret_to_user, tmp1, tmp2
                .endm
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                mrc     p15, 0, \tmp, c0, c0, 0         @ CPUID
-                mov     \tmp, \tmp, lsr #13
-                and     \tmp, \tmp, #0x7                @ Core G
-                cmp     \tmp, #1
-                bhi     1002f
-                @ Core Generation 1 (PXA25x)
-                mov     \base, #io_p2v(0x40000000)      @ IIR Ctl = 0x40d00000
-                add     \base, \base, #0x00d00000
-                ldr     \irqstat, [\base, #0]           @ ICIP
-                ldr     \irqnr, [\base, #4]             @ ICMR
-                ands    \irqnr, \irqstat, \irqnr
-                beq     1001f
-                rsb     \irqstat, \irqnr, #0
-                and     \irqstat, \irqstat, \irqnr
-                clz     \irqnr, \irqstat
-                rsb     \irqnr, \irqnr, #(31 + PXA_IRQ(0))
-                b       1001f
-1002:
-                @ Core Generation 2 (PXA27x) or Core Generation 3 (PXA3xx)
-                mrc     p6, 0, \irqstat, c5, c0, 0      @ ICHP
-                tst     \irqstat, #0x80000000
-                beq     1001f
-                bic     \irqstat, \irqstat, #0x80000000
-                mov     \irqnr, \irqstat, lsr #16
-                add     \irqnr, \irqnr, #(PXA_IRQ(0))
-1001:
-                .endm
diff --git a/arch/arm/mach-pxa/include/mach/vmalloc.h b/arch/arm/mach-pxa/include/mach/vmalloc.h
deleted file mode 100644
index bfecfbf5f46..00000000000
--- a/arch/arm/mach-pxa/include/mach/vmalloc.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * arch/arm/mach-pxa/include/mach/vmalloc.h
- *
- * Author:      Nicolas Pitre
- * Copyright:   (C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#define VMALLOC_END       (0xe8000000UL)
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index de684701449..b503049d6d2 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -16,7 +16,6 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/clockchips.h>
-#include <linux/sched.h>
 #include <asm/div64.h>
 #include <asm/mach/irq.h>
@@ -32,18 +31,10 @@
 * long as there is always less than 582 seconds between successive
 * calls to sched_clock() which should always be the case in practice.
 */
-static DEFINE_CLOCK_DATA(cd);
-unsigned long long notrace sched_clock(void)
+static u32 notrace pxa_read_sched_clock(void)
 {
-        u32 cyc = OSCR;
+        return OSCR;
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-static void notrace pxa_update_sched_clock(void)
-{
-        u32 cyc = OSCR;
-        update_sched_clock(&cd, cyc, (u32)~0);
 }
@@ -119,7 +110,7 @@ static void __init pxa_timer_init(void)
        OIER = 0;
        OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
-        init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate);
+        setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate);
        clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4);
        ckevt_pxa_osmr0.max_delta_ns =
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index dba6d0c1fc1..c593be428b8 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -12,6 +12,8 @@ config REALVIEW_EB_A9MP
        bool "Support Multicore Cortex-A9 Tile"
        depends on MACH_REALVIEW_EB
        select CPU_V7
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
        help
          Enable support for the Cortex-A9MPCore tile fitted to the
          Realview(R) Emulation Baseboard platform.
@@ -21,6 +23,8 @@ config REALVIEW_EB_ARM11MP
        depends on MACH_REALVIEW_EB
        select CPU_V6K
        select ARCH_HAS_BARRIERS if SMP
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
        help
          Enable support for the ARM11MPCore tile fitted to the Realview(R)
          Emulation Baseboard platform.
@@ -39,6 +43,8 @@ config MACH_REALVIEW_PB11MP
        select CPU_V6K
        select ARM_GIC
        select HAVE_PATA_PLATFORM
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
        select ARCH_HAS_BARRIERS if SMP
        help
          Include support for the ARM(R) RealView(R) Platform Baseboard for
@@ -51,6 +57,7 @@ config MACH_REALVIEW_PB1176
        select CPU_V6
        select ARM_GIC
        select HAVE_TCM
+        select MIGHT_HAVE_CACHE_L2X0
        help
          Include support for the ARM(R) RealView(R) Platform Baseboard for
          ARM1176JZF-S.
@@ -78,6 +85,8 @@ config MACH_REALVIEW_PBX
        bool "Support RealView(R) Platform Baseboard Explore"
        select ARM_GIC
        select HAVE_PATA_PLATFORM
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
        select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET
        select ZONE_DMA if SPARSEMEM
        help
diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S
index 4071164aeba..e8a5179c265 100644
--- a/arch/arm/mach-realview/include/mach/entry-macro.S
+++ b/arch/arm/mach-realview/include/mach/entry-macro.S
@@ -7,8 +7,6 @@
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
-#include <mach/hardware.h>
-#include <asm/hardware/entry-macro-gic.S>
                .macro  disable_fiq
                .endm
diff --git a/arch/arm/mach-realview/include/mach/vmalloc.h b/arch/arm/mach-realview/include/mach/vmalloc.h
deleted file mode 100644
index a2a4c686140..00000000000
--- a/arch/arm/mach-realview/include/mach/vmalloc.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- *  arch/arm/mach-realview/include/mach/vmalloc.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END             0xf8000000UL
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 4b796241dd7..f92a920cf50 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -91,8 +91,8 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
 static struct map_desc realview_eb11mp_io_desc[] __initdata = {
        {
-                .virtual        = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
+                .virtual        = IO_ADDRESS(REALVIEW_EB11MP_SCU_BASE),
-                .pfn            = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_EB11MP_SCU_BASE),
                .length         = SZ_4K,
                .type           = MT_DEVICE,
        }, {
@@ -469,6 +469,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
        .init_early     = realview_init_early,
        .init_irq       = gic_init_irq,
        .timer          = &realview_eb_timer,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = realview_eb_init,
 #ifdef CONFIG_ZONE_DMA
        .dma_zone_size  = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 09e630bfa44..8ec37b29e0f 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -392,6 +392,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
        .init_early     = realview_init_early,
        .init_irq       = gic_init_irq,
        .timer          = &realview_pb1176_timer,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = realview_pb1176_init,
 #ifdef CONFIG_ZONE_DMA
        .dma_zone_size  = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index e38e85b6472..f035fda8b61 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -366,6 +366,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
        .init_early     = realview_init_early,
        .init_irq       = gic_init_irq,
        .timer          = &realview_pb11mp_timer,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = realview_pb11mp_init,
 #ifdef CONFIG_ZONE_DMA
        .dma_zone_size  = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 04d1e495309..0109c8b440c 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -316,6 +316,7 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
        .init_early     = realview_init_early,
        .init_irq       = gic_init_irq,
        .timer          = &realview_pba8_timer,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = realview_pba8_init,
 #ifdef CONFIG_ZONE_DMA
        .dma_zone_size  = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index d515452323a..0194b3e26dc 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -98,8 +98,8 @@ static struct map_desc realview_pbx_io_desc[] __initdata = {
 static struct map_desc realview_local_io_desc[] __initdata = {
        {
-                .virtual        = IO_ADDRESS(REALVIEW_PBX_TILE_GIC_CPU_BASE),
+                .virtual        = IO_ADDRESS(REALVIEW_PBX_TILE_SCU_BASE),
-                .pfn            = __phys_to_pfn(REALVIEW_PBX_TILE_GIC_CPU_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_PBX_TILE_SCU_BASE),
                .length         = SZ_4K,
                .type           = MT_DEVICE,
        }, {
@@ -399,6 +399,7 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
        .init_early     = realview_init_early,
        .init_irq       = gic_init_irq,
        .timer          = &realview_pbx_timer,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = realview_pbx_init,
 #ifdef CONFIG_ZONE_DMA
        .dma_zone_size  = SZ_256M,
diff --git a/arch/arm/mach-rpc/include/mach/vmalloc.h b/arch/arm/mach-rpc/include/mach/vmalloc.h
deleted file mode 100644
index fb700228637..00000000000
--- a/arch/arm/mach-rpc/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- *  arch/arm/mach-rpc/include/mach/vmalloc.h
- *
- *  Copyright (C) 1997 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#define VMALLOC_END       0xdc000000UL
diff --git a/arch/arm/mach-s3c2410/include/mach/vmalloc.h b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
deleted file mode 100644
index 7a311e8dddb..00000000000
--- a/arch/arm/mach-s3c2410/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/vmalloc.h
- *
- * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
- *
- * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
- *                    http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 vmalloc definition
-*/
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-#define VMALLOC_END     0xF6000000UL
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
index dd362604dcc..dc2bc15142c 100644
--- a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
@@ -12,7 +12,8 @@
 * warranty of any kind, whether express or implied.
 */
-#include <mach/map.h>
+                .macro  disable_fiq
-#include <mach/irqs.h>
+                .endm
-#include <asm/entry-macro-vic2.S>
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
diff --git a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
deleted file mode 100644
index 23f75e556a3..00000000000
--- a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* arch/arm/mach-s3c64xx/include/mach/vmalloc.h
- *
- * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
- *
- * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
- *                    http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C6400 vmalloc definition
-*/
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-#define VMALLOC_END     0xF6000000UL
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index a2ea6e5ee46..b86f2779e4e 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -30,6 +30,7 @@
 #include <video/platform_lcd.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
@@ -237,6 +238,7 @@ MACHINE_START(ANW6410, "A&W6410")
        .atag_offset    = 0x100,
        .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = anw6410_map_io,
        .init_machine   = anw6410_machine_init,
        .timer          = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 3615d83d7b5..f1c848aa4a1 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -37,6 +37,7 @@
 #include <linux/mfd/wm831x/irq.h>
 #include <linux/mfd/wm831x/gpio.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
@@ -712,6 +713,7 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
        /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
        .atag_offset    = 0x100,
        .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = crag6410_map_io,
        .init_machine   = crag6410_machine_init,
        .timer          = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 8707bee2f0d..521e07b8501 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -29,6 +29,7 @@
 #include <mach/hardware.h>
 #include <mach/map.h>
+#include <asm/hardware/vic.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>
@@ -268,6 +269,7 @@ MACHINE_START(HMT, "Airgoo-HMT")
        /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */
        .atag_offset    = 0x100,
        .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = hmt_map_io,
        .init_machine   = hmt_machine_init,
        .timer          = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 4fba2328a04..c34c2ab22ea 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -24,6 +24,7 @@
 #include <linux/serial_core.h>
 #include <linux/types.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -346,6 +347,7 @@ MACHINE_START(MINI6410, "MINI6410")
        /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
        .atag_offset    = 0x100,
        .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = mini6410_map_io,
        .init_machine   = mini6410_machine_init,
        .timer          = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index 9ec4d571073..0efa2ba783b 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -25,6 +25,7 @@
 #include <video/platform_lcd.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
@@ -100,6 +101,7 @@ MACHINE_START(NCP, "NCP")
        /* Maintainer: Samsung Electronics */
        .atag_offset    = 0x100,
        .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = ncp_map_io,
        .init_machine   = ncp_machine_init,
        .timer          = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 0cb7116d7b5..be2a9a22ab7 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -25,6 +25,7 @@
 #include <linux/serial_core.h>
 #include <linux/types.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -327,6 +328,7 @@ MACHINE_START(REAL6410, "REAL6410")
        .atag_offset    = 0x100,
        .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = real6410_map_io,
        .init_machine   = real6410_machine_init,
        .timer          = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index f1f57bd5ce1..3f42431d4dd 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -17,6 +17,7 @@
 #include <linux/leds.h>
 #include <linux/platform_device.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -148,6 +149,7 @@ MACHINE_START(SMARTQ5, "SmartQ 5")
        /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
        .atag_offset    = 0x100,
        .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = smartq_map_io,
        .init_machine   = smartq5_machine_init,
        .timer          = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index 63117d84182..e5c09b6db96 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -17,6 +17,7 @@
 #include <linux/leds.h>
 #include <linux/platform_device.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -164,6 +165,7 @@ MACHINE_START(SMARTQ7, "SmartQ 7")
        /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
        .atag_offset    = 0x100,
        .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = smartq_map_io,
        .init_machine   = smartq7_machine_init,
        .timer          = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index 64375d7dda5..5f096534f4c 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -22,6 +22,7 @@
 #include <asm/mach-types.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
@@ -89,6 +90,7 @@ MACHINE_START(SMDK6400, "SMDK6400")
        .atag_offset    = 0x100,
        .init_irq       = s3c6400_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = smdk6400_map_io,
        .init_machine   = smdk6400_machine_init,
        .timer          = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index f239b0a53a6..ca6fc204f0e 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -43,6 +43,7 @@
 #include <video/platform_lcd.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
@@ -701,6 +702,7 @@ MACHINE_START(SMDK6410, "SMDK6410")
        .atag_offset    = 0x100,
        .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = smdk6410_map_io,
        .init_machine   = smdk6410_machine_init,
        .timer          = &s3c24xx_timer,
diff --git a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
index 10b62b4f821..fbb246d0a3d 100644
--- a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
@@ -10,7 +10,8 @@
 * published by the Free Software Foundation.
 */
-#include <mach/map.h>
+                .macro  disable_fiq
-#include <plat/irqs.h>
+                .endm
-#include <asm/entry-macro-vic2.S>
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
diff --git a/arch/arm/mach-s5p64x0/include/mach/vmalloc.h b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
deleted file mode 100644
index 38dcc71a03c..00000000000
--- a/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C6400 vmalloc definition
-*/
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-#define VMALLOC_END     0xF6000000UL
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 14ace6d282e..34d98a1dae5 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -27,6 +27,7 @@
 #include <video/platform_lcd.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/irq.h>
@@ -243,6 +244,7 @@ MACHINE_START(SMDK6440, "SMDK6440")
        .atag_offset    = 0x100,
        .init_irq       = s5p6440_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = smdk6440_map_io,
        .init_machine   = smdk6440_machine_init,
        .timer          = &s5p_timer,
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 924478a19b9..135cf5d8473 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -27,6 +27,7 @@
 #include <video/platform_lcd.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/irq.h>
@@ -263,6 +264,7 @@ MACHINE_START(SMDK6450, "SMDK6450")
        .atag_offset    = 0x100,
        .init_irq       = s5p6450_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = smdk6450_map_io,
        .init_machine   = smdk6450_machine_init,
        .timer          = &s5p_timer,
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
index ba76af052c8..b8c242edfa2 100644
--- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
@@ -12,39 +12,14 @@
 * warranty of any kind, whether express or implied.
 */
-#include <asm/hardware/vic.h>
-#include <mach/map.h>
-#include <plat/irqs.h>
        .macro  disable_fiq
        .endm
        .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =VA_VIC0
        .endm
        .macro  arch_ret_to_user, tmp1, tmp2
        .endm
        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        @ check the vic0
-        mov     \irqnr, # S5P_IRQ_OFFSET + 31
-        ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
-        teq     \irqstat, #0
-        @ otherwise try vic1
-        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-        @ otherwise try vic2
-        addeq   \tmp, \base, #(VA_VIC2 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-        clzne   \irqstat, \irqstat
-        subne   \irqnr, \irqnr, \irqstat
        .endm
diff --git a/arch/arm/mach-s5pc100/include/mach/vmalloc.h b/arch/arm/mach-s5pc100/include/mach/vmalloc.h
deleted file mode 100644
index 44c8e5726d9..00000000000
--- a/arch/arm/mach-s5pc100/include/mach/vmalloc.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* arch/arm/mach-s5pc100/include/mach/vmalloc.h
- *
- * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C6400 vmalloc definition
-*/
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-#define VMALLOC_END     0xF6000000UL
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index ead292ce1e0..674d22992f3 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -25,6 +25,7 @@
 #include <linux/input.h>
 #include <linux/pwm_backlight.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -251,6 +252,7 @@ MACHINE_START(SMDKC100, "SMDKC100")
        /* Maintainer: Byungho Min <bhmin@samsung.com> */
        .atag_offset    = 0x100,
        .init_irq       = s5pc100_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = smdkc100_map_io,
        .init_machine   = smdkc100_machine_init,
        .timer          = &s3c24xx_timer,
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
index 3aa41ac59f0..bebca1b5d0b 100644
--- a/arch/arm/mach-s5pv210/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
@@ -10,45 +10,8 @@
 * published by the Free Software Foundation.
 */
-#include <asm/hardware/vic.h>
-#include <mach/map.h>
-#include <plat/irqs.h>
        .macro  disable_fiq
        .endm
-        .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =VA_VIC0
-        .endm
        .macro  arch_ret_to_user, tmp1, tmp2
        .endm
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        @ check the vic0
-        mov     \irqnr, # S5P_IRQ_OFFSET + 31
-        ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
-        teq     \irqstat, #0
-        @ otherwise try vic1
-        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-        @ otherwise try vic2
-        addeq   \tmp, \base, #(VA_VIC2 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-        @ otherwise try vic3
-        addeq   \tmp, \base, #(VA_VIC3 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-        clzne   \irqstat, \irqstat
-        subne   \irqnr, \irqnr, \irqstat
-        .endm
diff --git a/arch/arm/mach-s5pv210/include/mach/vmalloc.h b/arch/arm/mach-s5pv210/include/mach/vmalloc.h
deleted file mode 100644
index a6c659d68a5..00000000000
--- a/arch/arm/mach-s5pv210/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/vmalloc.h
- *
- * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Based on arch/arm/mach-s5p6442/include/mach/vmalloc.h
- *
- * S5PV210 vmalloc definition
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H __FILE__
-#define VMALLOC_END     0xF6000000UL
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index edc52968315..6f7dfe993c1 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -22,6 +22,7 @@
 #include <linux/input.h>
 #include <linux/gpio.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>
@@ -681,6 +682,7 @@ MACHINE_START(AQUILA, "Aquila")
           Kyungmin Park <kyungmin.park@samsung.com> */
        .atag_offset    = 0x100,
        .init_irq       = s5pv210_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = aquila_map_io,
        .init_machine   = aquila_machine_init,
        .timer          = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index b5a1dc3ed9c..12c69371739 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -27,6 +27,7 @@
 #include <linux/gpio.h>
 #include <linux/interrupt.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>
@@ -957,6 +958,7 @@ MACHINE_START(GONI, "GONI")
        /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */
        .atag_offset    = 0x100,
        .init_irq       = s5pv210_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = goni_map_io,
        .init_machine   = goni_machine_init,
        .timer          = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index 553319f70e5..9405da4ae3a 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -15,6 +15,7 @@
 #include <linux/i2c.h>
 #include <linux/sysdev.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>
@@ -139,6 +140,7 @@ MACHINE_START(SMDKC110, "SMDKC110")
        /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
        .atag_offset    = 0x100,
        .init_irq       = s5pv210_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = smdkc110_map_io,
        .init_machine   = smdkc110_machine_init,
        .timer          = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 9c6de570431..cf4da739382 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -20,6 +20,7 @@
 #include <linux/delay.h>
 #include <linux/pwm_backlight.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>
@@ -317,6 +318,7 @@ MACHINE_START(SMDKV210, "SMDKV210")
        /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
        .atag_offset    = 0x100,
        .init_irq       = s5pv210_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = smdkv210_map_io,
        .init_machine   = smdkv210_machine_init,
        .timer          = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c
index db6409a3abd..74e99bc0dc9 100644
--- a/arch/arm/mach-s5pv210/mach-torbreck.c
+++ b/arch/arm/mach-s5pv210/mach-torbreck.c
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/serial_core.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>
@@ -128,6 +129,7 @@ MACHINE_START(TORBRECK, "TORBRECK")
        /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */
        .atag_offset    = 0x100,
        .init_irq       = s5pv210_init_irq,
+        .handle_irq     = vic_handle_irq,
        .map_io         = torbreck_map_io,
        .init_machine   = torbreck_machine_init,
        .timer          = &s5p_timer,
diff --git a/arch/arm/mach-sa1100/include/mach/vmalloc.h b/arch/arm/mach-sa1100/include/mach/vmalloc.h
deleted file mode 100644
index b3d00239848..00000000000
--- a/arch/arm/mach-sa1100/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
-/*
- * arch/arm/mach-sa1100/include/mach/vmalloc.h
- */
-#define VMALLOC_END       (0xe8000000UL)
diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c
index ed77f85b995..85f6ee67222 100644
--- a/arch/arm/mach-sa1100/nanoengine.c
+++ b/arch/arm/mach-sa1100/nanoengine.c
@@ -19,6 +19,7 @@
 #include <asm/mach-types.h>
 #include <asm/setup.h>
+#include <asm/page.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index fa6602491d5..69e33535dee 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -12,7 +12,6 @@
 #include <linux/errno.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
-#include <linux/sched.h>        /* just for sched_clock() - funny that */
 #include <linux/timex.h>
 #include <linux/clockchips.h>
@@ -20,29 +19,9 @@
 #include <asm/sched_clock.h>
 #include <mach/hardware.h>
-/*
+static u32 notrace sa1100_read_sched_clock(void)
- * This is the SA11x0 sched_clock implementation.
- */
-static DEFINE_CLOCK_DATA(cd);
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 3.6864MHz,
- * NSEC_PER_SEC, 60).
- * This gives a resolution of about 271ns and a wrap period of about 19min.
- */
-#define SC_MULT         2275555556u
-#define SC_SHIFT        23
-unsigned long long notrace sched_clock(void)
-{
-        u32 cyc = OSCR;
-        return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
-}
-static void notrace sa1100_update_sched_clock(void)
 {
-        u32 cyc = OSCR;
+        return OSCR;
-        update_sched_clock(&cd, cyc, (u32)~0);
 }
 #define MIN_OSCR_DELTA 2
@@ -109,8 +88,7 @@ static void __init sa1100_timer_init(void)
        OIER = 0;
        OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
-        init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32,
+        setup_sched_clock(sa1100_read_sched_clock, 32, 3686400);
-                               3686400, SC_MULT, SC_SHIFT);
        clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4);
        ckevt_sa1100_osmr0.max_delta_ns =
diff --git a/arch/arm/mach-shark/include/mach/vmalloc.h b/arch/arm/mach-shark/include/mach/vmalloc.h
deleted file mode 100644
index b10df988526..00000000000
--- a/arch/arm/mach-shark/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
-/*
- * arch/arm/mach-shark/include/mach/vmalloc.h
- */
-#define VMALLOC_END       0xd0000000UL
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 737bdc631b0..5ca1f9d6699 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -28,7 +28,6 @@ pfc-$(CONFIG_ARCH_SH73A0)	+= pfc-sh73a0.o
 obj-$(CONFIG_ARCH_SH7367)       += entry-intc.o
 obj-$(CONFIG_ARCH_SH7377)       += entry-intc.o
 obj-$(CONFIG_ARCH_SH7372)       += entry-intc.o
-obj-$(CONFIG_ARCH_SH73A0)       += entry-gic.o
 # PM objects
 obj-$(CONFIG_SUSPEND)           += suspend.o
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 7119b87cbfa..a4e6ca04e31 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -466,8 +466,6 @@ static struct map_desc ag5evm_io_desc[] __initdata = {
 static void __init ag5evm_map_io(void)
 {
        iotable_init(ag5evm_io_desc, ARRAY_SIZE(ag5evm_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
        /* setup early devices and console here as well */
        sh73a0_add_early_devices();
@@ -609,7 +607,7 @@ MACHINE_START(AG5EVM, "ag5evm")
        .map_io         = ag5evm_map_io,
        .nr_irqs        = NR_IRQS_LEGACY,
        .init_irq       = sh73a0_init_irq,
-        .handle_irq     = shmobile_handle_irq_gic,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = ag5evm_init,
        .timer          = &ag5evm_timer,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 4c865ece9ac..6a6f9f7568c 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -1172,8 +1172,6 @@ static struct map_desc ap4evb_io_desc[] __initdata = {
 static void __init ap4evb_map_io(void)
 {
        iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
        /* setup early devices and console here as well */
        sh7372_add_early_devices();
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index 8b620bf0622..72d557281b1 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -261,8 +261,6 @@ static struct map_desc g3evm_io_desc[] __initdata = {
 static void __init g3evm_map_io(void)
 {
        iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
        /* setup early devices and console here as well */
        sh7367_add_early_devices();
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index 7719ddc5f59..2220b885cff 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -275,8 +275,6 @@ static struct map_desc g4evm_io_desc[] __initdata = {
 static void __init g4evm_map_io(void)
 {
        iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
        /* setup early devices and console here as well */
        sh7377_add_early_devices();
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index f44150b5ae4..857ceeec1bb 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -551,7 +551,7 @@ MACHINE_START(KOTA2, "kota2")
        .map_io         = kota2_map_io,
        .nr_irqs        = NR_IRQS_LEGACY,
        .init_irq       = sh73a0_init_irq,
-        .handle_irq     = shmobile_handle_irq_gic,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = kota2_init,
        .timer          = &kota2_timer,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 9c5e598e0e3..ed525668739 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -1390,8 +1390,6 @@ static struct map_desc mackerel_io_desc[] __initdata = {
 static void __init mackerel_map_io(void)
 {
        iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
        /* setup early devices and console here as well */
        sh7372_add_early_devices();
diff --git a/arch/arm/mach-shmobile/entry-gic.S b/arch/arm/mach-shmobile/entry-gic.S
deleted file mode 100644
index e20239b08c8..00000000000
--- a/arch/arm/mach-shmobile/entry-gic.S
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * ARM Interrupt demux handler using GIC
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2011 Paul Mundt
- * Copyright (C) 2010 - 2011 Renesas Solutions Corp.
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#include <asm/assembler.h>
-#include <asm/entry-macro-multi.S>
-#include <asm/hardware/gic.h>
-#include <asm/hardware/entry-macro-gic.S>
-        arch_irq_handler shmobile_handle_irq_gic
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 834bd6cd508..4bf82c15677 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -7,7 +7,6 @@ extern void shmobile_secondary_vector(void);
 struct clk;
 extern int clk_init(void);
 extern void shmobile_handle_irq_intc(struct pt_regs *);
-extern void shmobile_handle_irq_gic(struct pt_regs *);
 extern struct platform_suspend_ops shmobile_suspend_ops;
 struct cpuidle_driver;
 extern void (*shmobile_cpuidle_modes[])(void);
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S
index 8d4a416d428..2a57b2964ee 100644
--- a/arch/arm/mach-shmobile/include/mach/entry-macro.S
+++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S
@@ -18,14 +18,5 @@
        .macro  disable_fiq
        .endm
-        .macro  get_irqnr_preamble, base, tmp
-        .endm
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        .endm
-        .macro  test_for_ipi, irqnr, irqstat, base, tmp
-        .endm
        .macro  arch_ret_to_user, tmp1, tmp2
        .endm
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
index 7bf0890e16b..de795b42232 100644
--- a/arch/arm/mach-shmobile/include/mach/gpio.h
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -12,8 +12,6 @@
 #include <linux/kernel.h>
 #include <linux/errno.h>
-#define ARCH_NR_GPIOS 1024
 #include <linux/sh_pfc.h>
 #ifdef CONFIG_GPIOLIB
diff --git a/arch/arm/mach-shmobile/include/mach/vmalloc.h b/arch/arm/mach-shmobile/include/mach/vmalloc.h
deleted file mode 100644
index 2b8fd8b942f..00000000000
--- a/arch/arm/mach-shmobile/include/mach/vmalloc.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __ASM_MACH_VMALLOC_H
-#define __ASM_MACH_VMALLOC_H
-/* Vmalloc at ... - 0xe5ffffff */
-#define VMALLOC_END 0xe6000000UL
-#endif /* __ASM_MACH_VMALLOC_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
index 53da4224ba3..de3bb41c8e9 100644
--- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
@@ -11,35 +11,8 @@
 * warranty of any kind, whether express or implied.
 */
-#include <asm/hardware/vic.h>
-#include <mach/hardware.h>
                .macro  disable_fiq
                .endm
-                .macro  get_irqnr_preamble, base, tmp
-                .endm
                .macro  arch_ret_to_user, tmp1, tmp2
                .endm
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \base, =VA_SPEAR3XX_ML1_VIC_BASE
-                ldr     \irqstat, [\base, #VIC_IRQ_STATUS]      @ get status
-                teq     \irqstat, #0
-                beq     1001f                           @ this will set/reset
-                                                        @ zero register
-                /*
-                 * Following code will find bit position of least significang
-                 * bit set in irqstat, using following equation
-                 * least significant bit set in n = (n & ~(n-1))
-                 */
-                sub     \tmp, \irqstat, #1              @ tmp = irqstat - 1
-                mvn     \tmp, \tmp                      @ tmp = ~tmp
-                and     \irqstat, \irqstat, \tmp        @ irqstat &= tmp
-                /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
-                clz     \tmp, \irqstat                  @ tmp = leading zeros
-                rsb     \irqnr, \tmp, #0x1F             @ irqnr = 32 - tmp - 1
-1001:           /* EQ will be set if no irqs pending */
-                .endm
diff --git a/arch/arm/mach-spear3xx/include/mach/vmalloc.h b/arch/arm/mach-spear3xx/include/mach/vmalloc.h
deleted file mode 100644
index df977b3c9a6..00000000000
--- a/arch/arm/mach-spear3xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-spear3xx/include/mach/vmalloc.h
- *
- * Defining Vmalloc area for SPEAr3xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#ifndef __MACH_VMALLOC_H
-#define __MACH_VMALLOC_H
-#include <plat/vmalloc.h>
-#endif /* __MACH_VMALLOC_H */
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index 8b429f05b61..3462ab9d612 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -11,6 +11,7 @@
 * warranty of any kind, whether express or implied.
 */
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>
@@ -67,6 +68,7 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")
        .atag_offset    =       0x100,
        .map_io         =       spear3xx_map_io,
        .init_irq       =       spear3xx_init_irq,
+        .handle_irq     =       vic_handle_irq,
        .timer          =       &spear3xx_timer,
        .init_machine   =       spear300_evb_init,
        .restart        =       spear_restart,
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
index a11d6ead0ae..f92c4993f65 100644
--- a/arch/arm/mach-spear3xx/spear310_evb.c
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -11,6 +11,7 @@
 * warranty of any kind, whether express or implied.
 */
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>
@@ -73,6 +74,7 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")
        .atag_offset    =       0x100,
        .map_io         =       spear3xx_map_io,
        .init_irq       =       spear3xx_init_irq,
+        .handle_irq     =       vic_handle_irq,
        .timer          =       &spear3xx_timer,
        .init_machine   =       spear310_evb_init,
        .restart        =       spear_restart,
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index 4239a70686c..105334ab702 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -11,6 +11,7 @@
 * warranty of any kind, whether express or implied.
 */
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>
@@ -71,6 +72,7 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")
        .atag_offset    =       0x100,
        .map_io         =       spear3xx_map_io,
        .init_irq       =       spear3xx_init_irq,
+        .handle_irq     =       vic_handle_irq,
        .timer          =       &spear3xx_timer,
        .init_machine   =       spear320_evb_init,
        .restart        =       spear_restart,
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
index 8a0b0ed7b20..d490a910d92 100644
--- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
@@ -11,44 +11,8 @@
 * warranty of any kind, whether express or implied.
 */
-#include <asm/hardware/vic.h>
-#include <mach/hardware.h>
                .macro  disable_fiq
                .endm
-                .macro  get_irqnr_preamble, base, tmp
-                .endm
                .macro  arch_ret_to_user, tmp1, tmp2
                .endm
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \base, =VA_SPEAR6XX_CPU_VIC_PRI_BASE
-                ldr     \irqstat, [\base, #VIC_IRQ_STATUS]      @ get status
-                mov     \irqnr, #0
-                teq     \irqstat, #0
-                bne     1001f
-                ldr     \base, =VA_SPEAR6XX_CPU_VIC_SEC_BASE
-                ldr     \irqstat, [\base, #VIC_IRQ_STATUS]      @ get status
-                teq     \irqstat, #0
-                beq     1002f                           @ this will set/reset
-                                                        @ zero register
-                mov     \irqnr, #32
-1001:
-                /*
-                 * Following code will find bit position of least significang
-                 * bit set in irqstat, using following equation
-                 * least significant bit set in n = (n & ~(n-1))
-                 */
-                sub     \tmp, \irqstat, #1              @ tmp = irqstat - 1
-                mvn     \tmp, \tmp                      @ tmp = ~tmp
-                and     \irqstat, \irqstat, \tmp        @ irqstat &= tmp
-                /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
-                clz     \tmp, \irqstat                  @ tmp = leading zeros
-                rsb     \tmp, \tmp, #0x1F               @ tmp = 32 - tmp - 1
-                add     \irqnr, \irqnr, \tmp
-1002:           /* EQ will be set if no irqs pending */
-                .endm
diff --git a/arch/arm/mach-spear6xx/include/mach/vmalloc.h b/arch/arm/mach-spear6xx/include/mach/vmalloc.h
deleted file mode 100644
index 4a0b56cb2a9..00000000000
--- a/arch/arm/mach-spear6xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-spear6xx/include/mach/vmalloc.h
- *
- * Defining Vmalloc area for SPEAr6xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Rajeev Kumar<rajeev-dlh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#ifndef __MACH_VMALLOC_H
-#define __MACH_VMALLOC_H
-#include <plat/vmalloc.h>
-#endif  /* __MACH_VMALLOC_H */
diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c
index 0a16559ba26..c6e4254741c 100644
--- a/arch/arm/mach-spear6xx/spear600_evb.c
+++ b/arch/arm/mach-spear6xx/spear600_evb.c
@@ -11,6 +11,7 @@
 * warranty of any kind, whether express or implied.
 */
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>
@@ -46,6 +47,7 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
        .atag_offset    =       0x100,
        .map_io         =       spear6xx_map_io,
        .init_irq       =       spear6xx_init_irq,
+        .handle_irq     =       vic_handle_irq,
        .timer          =       &spear6xx_timer,
        .init_machine   =       spear600_evb_init,
        .restart        =       spear_restart,
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index aaaa17c9d21..e417a8383db 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -32,6 +32,7 @@
 #include <linux/i2c.h>
 #include <linux/i2c-tegra.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
@@ -130,6 +131,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
+        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_dt_init,
        .restart        = tegra_assert_system_reset,
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index 7eaa52de756..70ee674131f 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -31,6 +31,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
+#include <asm/hardware/gic.h>
 #include <asm/setup.h>
 #include <mach/tegra_wm8903_pdata.h>
@@ -187,6 +188,7 @@ MACHINE_START(HARMONY, "harmony")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
+        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_harmony_init,
        .restart        = tegra_assert_system_reset,
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 28c97e31740..33d6205ad30 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -29,6 +29,7 @@
 #include <linux/gpio.h>
 #include <linux/rfkill-gpio.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
@@ -190,6 +191,7 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
+        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_paz00_init,
        .restart        = tegra_assert_system_reset,
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
index 9b2eca1f528..c1599eb8e0c 100644
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -34,6 +34,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include "board.h"
 #include "board-seaboard.h"
@@ -284,6 +285,7 @@ MACHINE_START(SEABOARD, "seaboard")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
+        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_seaboard_init,
        .restart        = tegra_assert_system_reset,
@@ -294,6 +296,7 @@ MACHINE_START(KAEN, "kaen")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
+        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_kaen_init,
        .restart        = tegra_assert_system_reset,
@@ -304,6 +307,7 @@ MACHINE_START(WARIO, "wario")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
+        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_wario_init,
        .restart        = tegra_assert_system_reset,
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index 1fa9e48e8ec..c242314a1db 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -26,6 +26,7 @@
 #include <linux/i2c.h>
 #include <linux/gpio.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/setup.h>
@@ -176,6 +177,7 @@ MACHINE_START(TRIMSLICE, "trimslice")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
+        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_trimslice_init,
        .restart        = tegra_assert_system_reset,
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S
index dd165c53889..ac11262149c 100644
--- a/arch/arm/mach-tegra/include/mach/entry-macro.S
+++ b/arch/arm/mach-tegra/include/mach/entry-macro.S
@@ -12,30 +12,15 @@
 * GNU General Public License for more details.
 *
 */
-#include <mach/iomap.h>
-#include <mach/io.h>
-#if defined(CONFIG_ARM_GIC)
-#define HAVE_GET_IRQNR_PREAMBLE
-#include <asm/hardware/entry-macro-gic.S>
-        /* Uses the GIC interrupt controller built into the cpu */
-#define ICTRL_BASE (IO_CPU_VIRT + 0x100)
        .macro  disable_fiq
        .endm
-        .macro  get_irqnr_preamble, base, tmp
+        .macro  arch_ret_to_user, tmp1, tmp2
-        movw \base, #(ICTRL_BASE & 0x0000ffff)
-        movt \base, #((ICTRL_BASE & 0xffff0000) >> 16)
        .endm
-        .macro  arch_ret_to_user, tmp1, tmp2
+#if !defined(CONFIG_ARM_GIC)
-        .endm
-#else
        /* legacy interrupt controller for AP16 */
-        .macro  disable_fiq
-        .endm
        .macro  get_irqnr_preamble, base, tmp
        @ enable imprecise aborts
@@ -46,9 +31,6 @@
        orr \base, #0x0000f000
        .endm
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
        ldr \irqnr, [\base, #0x20]      @ EVT_IRQ_STS
        cmp \irqnr, #0x80
diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h
index 35a011fbc42..f15defffb5d 100644
--- a/arch/arm/mach-tegra/include/mach/io.h
+++ b/arch/arm/mach-tegra/include/mach/io.h
@@ -71,12 +71,6 @@
 #ifndef __ASSEMBLER__
-#define __arch_ioremap          tegra_ioremap
-#define __arch_iounmap          tegra_iounmap
-void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type);
-void tegra_iounmap(volatile void __iomem *addr);
 #define IO_ADDRESS(n) (IO_TO_VIRT(n))
 #ifdef CONFIG_TEGRA_PCI
diff --git a/arch/arm/mach-tegra/include/mach/vmalloc.h b/arch/arm/mach-tegra/include/mach/vmalloc.h
deleted file mode 100644
index fd6aa65b2dc..00000000000
--- a/arch/arm/mach-tegra/include/mach/vmalloc.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * arch/arm/mach-tegra/include/mach/vmalloc.h
- *
- * Copyright (C) 2010 Google, Inc.
- *
- * Author:
- *      Colin Cross <ccross@google.com>
- *      Erik Gilling <konkers@google.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-#ifndef __MACH_TEGRA_VMALLOC_H
-#define __MACH_TEGRA_VMALLOC_H
-#include <asm/sizes.h>
-#define VMALLOC_END        0xFE000000UL
-#endif
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index 5489f8b5d6a..d23ee2db282 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -60,24 +60,3 @@ void __init tegra_map_common_io(void)
 {
        iotable_init(tegra_io_desc, ARRAY_SIZE(tegra_io_desc));
 }
-/*
- * Intercept ioremap() requests for addresses in our fixed mapping regions.
- */
-void __iomem *tegra_ioremap(unsigned long p, size_t size, unsigned int type)
-{
-        void __iomem *v = IO_ADDRESS(p);
-        if (v == NULL)
-                v = __arm_ioremap(p, size, type);
-        return v;
-}
-EXPORT_SYMBOL(tegra_ioremap);
-void tegra_iounmap(volatile void __iomem *addr)
-{
-        unsigned long virt = (unsigned long)addr;
-        if (virt >= VMALLOC_START && virt < VMALLOC_END)
-                __iounmap(addr);
-}
-EXPORT_SYMBOL(tegra_iounmap);
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index e2272d263a8..732c724008b 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -19,7 +19,6 @@
 #include <linux/init.h>
 #include <linux/err.h>
-#include <linux/sched.h>
 #include <linux/time.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
@@ -106,25 +105,9 @@ static struct clock_event_device tegra_clockevent = {
        .set_mode       = tegra_timer_set_mode,
 };
-static DEFINE_CLOCK_DATA(cd);
+static u32 notrace tegra_read_sched_clock(void)
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 1MHz, NSEC_PER_SEC, 60).
- * This gives a resolution of about 1us and a wrap period of about 1h11min.
- */
-#define SC_MULT         4194304000u
-#define SC_SHIFT        22
-unsigned long long notrace sched_clock(void)
-{
-        u32 cyc = timer_readl(TIMERUS_CNTR_1US);
-        return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
-}
-static void notrace tegra_update_sched_clock(void)
 {
-        u32 cyc = timer_readl(TIMERUS_CNTR_1US);
+        return timer_readl(TIMERUS_CNTR_1US);
-        update_sched_clock(&cd, cyc, (u32)~0);
 }
 /*
@@ -218,8 +201,7 @@ static void __init tegra_init_timer(void)
                WARN(1, "Unknown clock rate");
        }
-        init_fixed_sched_clock(&cd, tegra_update_sched_clock, 32,
+        setup_sched_clock(tegra_read_sched_clock, 32, 1000000);
-                               1000000, SC_MULT, SC_SHIFT);
        if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,
                "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) {
diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S
index 20731ae39d3..7181d6ac665 100644
--- a/arch/arm/mach-u300/include/mach/entry-macro.S
+++ b/arch/arm/mach-u300/include/mach/entry-macro.S
@@ -8,33 +8,9 @@
 * Low-level IRQ helper macros for ST-Ericsson U300
 * Author: Linus Walleij <linus.walleij@stericsson.com>
 */
-#include <mach/hardware.h>
-#include <asm/hardware/vic.h>
        .macro  disable_fiq
        .endm
-        .macro  get_irqnr_preamble, base, tmp
-        .endm
        .macro  arch_ret_to_user, tmp1, tmp2
        .endm
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        ldr     \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON0_BASE
-        ldr     \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
-        mov     \irqnr, #0
-        teq     \irqstat, #0
-        bne     1002f
-1001:   ldr     \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON1_BASE
-        ldr     \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
-        mov     \irqnr, #32
-        teq     \irqstat, #0
-        beq     1003f
-1002:   tst     \irqstat, #1
-        bne     1003f
-        add     \irqnr, \irqnr, #1
-        movs    \irqstat, \irqstat, lsr #1
-        bne     1002b
-1003:           /* EQ will be set if no irqs pending */
-        .endm
diff --git a/arch/arm/mach-u300/include/mach/vmalloc.h b/arch/arm/mach-u300/include/mach/vmalloc.h
deleted file mode 100644
index ec423b92b81..00000000000
--- a/arch/arm/mach-u300/include/mach/vmalloc.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- *
- * arch/arm/mach-u300/include/mach/vmalloc.h
- *
- *
- * Copyright (C) 2006-2009 ST-Ericsson AB
- * License terms: GNU General Public License (GPL) version 2
- * Virtual memory allocations
- * End must be above the I/O registers and on an even 2MiB boundary.
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- */
-#define VMALLOC_END     0xfe800000UL
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index 5f51bdeef0e..bc1c7897e82 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -9,7 +9,6 @@
 * Author: Linus Walleij <linus.walleij@stericsson.com>
 */
 #include <linux/interrupt.h>
-#include <linux/sched.h>
 #include <linux/time.h>
 #include <linux/timex.h>
 #include <linux/clockchips.h>
@@ -337,18 +336,10 @@ static struct irqaction u300_timer_irq = {
 * this wraps around for now, since it is just a relative time
 * stamp. (Inspired by OMAP implementation.)
 */
-static DEFINE_CLOCK_DATA(cd);
-unsigned long long notrace sched_clock(void)
+static u32 notrace u300_read_sched_clock(void)
 {
-        u32 cyc = readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
+        return readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-static void notrace u300_update_sched_clock(void)
-{
-        u32 cyc = readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
-        update_sched_clock(&cd, cyc, (u32)~0);
 }
@@ -366,7 +357,7 @@ static void __init u300_timer_init(void)
        clk_enable(clk);
        rate = clk_get_rate(clk);
-        init_sched_clock(&cd, u300_update_sched_clock, 32, rate);
+        setup_sched_clock(u300_read_sched_clock, 32, rate);
        /*
         * Disable the "OS" and "DD" timers - these are designed for Symbian!
diff --git a/arch/arm/mach-u300/u300.c b/arch/arm/mach-u300/u300.c
index a75c9b83974..def45bda293 100644
--- a/arch/arm/mach-u300/u300.c
+++ b/arch/arm/mach-u300/u300.c
@@ -19,6 +19,7 @@
 #include <linux/io.h>
 #include <mach/hardware.h>
 #include <mach/platform.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/memory.h>
@@ -49,6 +50,7 @@ MACHINE_START(U300, MACH_U300_STRING)
        .atag_offset    = BOOT_PARAMS_OFFSET,
        .map_io         = u300_map_io,
        .init_irq       = u300_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &u300_timer,
        .init_machine   = u300_init_machine,
        .restart        = u300_restart,
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index bdd7b80dd7a..de1f5f8f733 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -33,6 +33,7 @@
 #include <linux/leds.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <plat/i2c.h>
 #include <plat/ste_dma40.h>
@@ -695,6 +696,7 @@ MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
        .init_irq       = ux500_init_irq,
        /* we re-use nomadik timer here */
        .timer          = &ux500_timer,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = mop500_init_machine,
 MACHINE_END
@@ -703,6 +705,7 @@ MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
        .map_io         = u8500_map_io,
        .init_irq       = ux500_init_irq,
        .timer          = &ux500_timer,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = hrefv60_init_machine,
 MACHINE_END
@@ -712,5 +715,6 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
        .init_irq       = ux500_init_irq,
        /* we re-use nomadik timer here */
        .timer          = &ux500_timer,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = snowball_init_machine,
 MACHINE_END
diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c
index 82025ba70c0..fe1569b67c9 100644
--- a/arch/arm/mach-ux500/board-u5500.c
+++ b/arch/arm/mach-ux500/board-u5500.c
@@ -12,6 +12,7 @@
 #include <linux/i2c.h>
 #include <linux/mfd/ab5500/ab5500.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
@@ -149,5 +150,6 @@ MACHINE_START(U5500, "ST-Ericsson U5500 Platform")
        .map_io         = u5500_map_io,
        .init_irq       = ux500_init_irq,
        .timer          = &ux500_timer,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = u5500_init_machine,
 MACHINE_END
diff --git a/arch/arm/mach-ux500/cpu-db5500.c b/arch/arm/mach-ux500/cpu-db5500.c
index 9de1af00809..5323286b265 100644
--- a/arch/arm/mach-ux500/cpu-db5500.c
+++ b/arch/arm/mach-ux500/cpu-db5500.c
@@ -30,12 +30,11 @@ static struct map_desc u5500_uart_io_desc[] __initdata = {
 };
 static struct map_desc u5500_io_desc[] __initdata = {
-        __IO_DEV_DESC(U5500_GIC_CPU_BASE, SZ_4K),
+        /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
+        __IO_DEV_DESC(U5500_SCU_BASE, SZ_4K),
        __IO_DEV_DESC(U5500_GIC_DIST_BASE, SZ_4K),
        __IO_DEV_DESC(U5500_L2CC_BASE, SZ_4K),
-        __IO_DEV_DESC(U5500_TWD_BASE, SZ_4K),
        __IO_DEV_DESC(U5500_MTU0_BASE, SZ_4K),
-        __IO_DEV_DESC(U5500_SCU_BASE, SZ_4K),
        __IO_DEV_DESC(U5500_BACKUPRAM0_BASE, SZ_8K),
        __IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K),
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 13e8890a8b8..7f2729c05db 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -35,12 +35,11 @@ static struct map_desc u8500_uart_io_desc[] __initdata = {
 };
 static struct map_desc u8500_io_desc[] __initdata = {
-        __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K),
+        /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
+        __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
        __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
        __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
-        __IO_DEV_DESC(U8500_TWD_BASE, SZ_4K),
        __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
-        __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
        __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
        __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S
index 071bba94f72..e16299e1020 100644
--- a/arch/arm/mach-ux500/include/mach/entry-macro.S
+++ b/arch/arm/mach-ux500/include/mach/entry-macro.S
@@ -10,8 +10,6 @@
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
-#include <mach/hardware.h>
-#include <asm/hardware/entry-macro-gic.S>
                .macro  disable_fiq
                .endm
diff --git a/arch/arm/mach-ux500/include/mach/gpio.h b/arch/arm/mach-ux500/include/mach/gpio.h
index 7389df911b1..c01ef66537f 100644
--- a/arch/arm/mach-ux500/include/mach/gpio.h
+++ b/arch/arm/mach-ux500/include/mach/gpio.h
@@ -1,10 +1,5 @@
 #ifndef __ASM_ARCH_GPIO_H
 #define __ASM_ARCH_GPIO_H
-/*
- * 288 (#267 is the highest one actually hooked up) onchip GPIOs, plus enough
- * room for a couple of GPIO expanders.
- */
-#define ARCH_NR_GPIOS   350
 #endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-ux500/include/mach/vmalloc.h b/arch/arm/mach-ux500/include/mach/vmalloc.h
deleted file mode 100644
index a4945cb4117..00000000000
--- a/arch/arm/mach-ux500/include/mach/vmalloc.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- *  Copyright (C) 2009 ST-Ericsson
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END     0xf0000000UL
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index b7a6a4b1a1d..cbcda61162d 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -141,11 +141,6 @@ static struct map_desc versatile_io_desc[] __initdata = {
        },
 #ifdef CONFIG_MACH_VERSATILE_AB
        {
-                .virtual        =  IO_ADDRESS(VERSATILE_GPIO0_BASE),
-                .pfn            = __phys_to_pfn(VERSATILE_GPIO0_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                .virtual        =  IO_ADDRESS(VERSATILE_IB2_BASE),
                .pfn            = __phys_to_pfn(VERSATILE_IB2_BASE),
                .length         = SZ_64M,
diff --git a/arch/arm/mach-versatile/include/mach/entry-macro.S b/arch/arm/mach-versatile/include/mach/entry-macro.S
index e6f7c166316..b6f0dbf122e 100644
--- a/arch/arm/mach-versatile/include/mach/entry-macro.S
+++ b/arch/arm/mach-versatile/include/mach/entry-macro.S
@@ -7,39 +7,9 @@
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
-#include <mach/hardware.h>
-#include <mach/platform.h>
-#include <asm/hardware/vic.h>
                .macro  disable_fiq
                .endm
-                .macro  get_irqnr_preamble, base, tmp
-                ldr     \base, =IO_ADDRESS(VERSATILE_VIC_BASE)
-                .endm
                .macro  arch_ret_to_user, tmp1, tmp2
                .endm
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \irqstat, [\base, #VIC_IRQ_STATUS]      @ get masked status
-                mov     \irqnr, #0
-                teq     \irqstat, #0
-                beq     1003f
-1001:           tst     \irqstat, #15
-                bne     1002f
-                add     \irqnr, \irqnr, #4
-                movs    \irqstat, \irqstat, lsr #4
-                bne     1001b
-1002:           tst     \irqstat, #1
-                bne     1003f
-                add     \irqnr, \irqnr, #1
-                movs    \irqstat, \irqstat, lsr #1
-                bne     1002b
-1003:           /* EQ will be set if no irqs pending */
-@               clz     \irqnr, \irqstat
-@1003:          /* EQ will be set if we reach MAXIRQNUM */
-                .endm
diff --git a/arch/arm/mach-versatile/include/mach/vmalloc.h b/arch/arm/mach-versatile/include/mach/vmalloc.h
deleted file mode 100644
index 7d8e069ad51..00000000000
--- a/arch/arm/mach-versatile/include/mach/vmalloc.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- *  arch/arm/mach-versatile/include/mach/vmalloc.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END             0xd8000000UL
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index f1277ac92fa..63b8dd2b9f4 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -27,6 +27,7 @@
 #include <mach/hardware.h>
 #include <asm/irq.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -39,6 +40,7 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
        .map_io         = versatile_map_io,
        .init_early     = versatile_init_early,
        .init_irq       = versatile_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &versatile_timer,
        .init_machine   = versatile_init,
        .restart        = versatile_restart,
diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c
index f48f2e4b667..ae5ad3c8f3d 100644
--- a/arch/arm/mach-versatile/versatile_dt.c
+++ b/arch/arm/mach-versatile/versatile_dt.c
@@ -24,6 +24,7 @@
 #include <linux/init.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -45,6 +46,7 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)")
        .map_io         = versatile_map_io,
        .init_early     = versatile_init_early,
        .init_irq       = versatile_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &versatile_timer,
        .init_machine   = versatile_dt_init,
        .dt_compat      = versatile_dt_match,
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index 839bea63382..7aab79b665e 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -28,6 +28,7 @@
 #include <linux/io.h>
 #include <mach/hardware.h>
+#include <asm/hardware/vic.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>
@@ -107,6 +108,7 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
        .map_io         = versatile_map_io,
        .init_early     = versatile_init_early,
        .init_irq       = versatile_init_irq,
+        .handle_irq     = vic_handle_irq,
        .timer          = &versatile_timer,
        .init_machine   = versatile_pb_init,
        .restart        = versatile_restart,
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 931148487f0..9b3d0fbaee7 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -8,5 +8,7 @@ config ARCH_VEXPRESS_CA9X4
        select ARM_ERRATA_720789
        select ARM_ERRATA_751472
        select ARM_ERRATA_753970
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
 endmenu
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S
index 73c11297509..a14f9e62ca9 100644
--- a/arch/arm/mach-vexpress/include/mach/entry-macro.S
+++ b/arch/arm/mach-vexpress/include/mach/entry-macro.S
@@ -1,5 +1,3 @@
-#include <asm/hardware/entry-macro-gic.S>
        .macro  disable_fiq
        .endm
diff --git a/arch/arm/mach-vexpress/include/mach/vmalloc.h b/arch/arm/mach-vexpress/include/mach/vmalloc.h
deleted file mode 100644
index f43a36ef678..00000000000
--- a/arch/arm/mach-vexpress/include/mach/vmalloc.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- *  arch/arm/mach-vexpress/include/mach/vmalloc.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END             0xf8000000UL
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index b9a465bd2d0..6dd10e320ef 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -23,6 +23,7 @@
 #include <asm/hardware/arm_timer.h>
 #include <asm/hardware/timer-sp.h>
 #include <asm/hardware/sp810.h>
+#include <asm/hardware/gic.h>
 #include <mach/ct-ca9x4.h>
 #include <mach/motherboard.h>
@@ -447,6 +448,7 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express")
        .init_early     = v2m_init_early,
        .init_irq       = v2m_init_irq,
        .timer          = &v2m_timer,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = v2m_init,
        .restart        = v2m_restart,
 MACHINE_END
diff --git a/arch/arm/mach-vt8500/include/mach/vmalloc.h b/arch/arm/mach-vt8500/include/mach/vmalloc.h
deleted file mode 100644
index 4642290ce41..00000000000
--- a/arch/arm/mach-vt8500/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/mach-vt8500/include/mach/vmalloc.h
- *
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END     0xd0000000UL
diff --git a/arch/arm/mach-w90x900/include/mach/vmalloc.h b/arch/arm/mach-w90x900/include/mach/vmalloc.h
deleted file mode 100644
index b067e44500a..00000000000
--- a/arch/arm/mach-w90x900/include/mach/vmalloc.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * arch/arm/mach-w90x900/include/mach/vmalloc.h
- *
- * Copyright (c) 2008 Nuvoton technology corporation
- * All rights reserved.
- *
- * Wan ZongShun <mcuos.com@gmail.com>
- *
- * Based on arch/arm/mach-s3c2410/include/mach/vmalloc.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-#define VMALLOC_END       (0xe0000000UL)
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 73e93687b81..ab5cfddc0d7 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -112,6 +112,7 @@ static const char *xilinx_dt_match[] = {
 MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
        .map_io         = xilinx_map_io,
        .init_irq       = xilinx_irq_init,
+        .handle_irq     = gic_handle_irq,
        .init_machine   = xilinx_init_machine,
        .timer          = &xttcpss_sys_timer,
        .dt_compat      = xilinx_dt_match,
diff --git a/arch/arm/mach-zynq/include/mach/entry-macro.S b/arch/arm/mach-zynq/include/mach/entry-macro.S
index 3cfc01b3746..d621fb73256 100644
--- a/arch/arm/mach-zynq/include/mach/entry-macro.S
+++ b/arch/arm/mach-zynq/include/mach/entry-macro.S
@@ -20,9 +20,6 @@
 * GNU General Public License for more details.
 */
-#include <mach/hardware.h>
-#include <asm/hardware/entry-macro-gic.S>
                .macro  disable_fiq
                .endm
diff --git a/arch/arm/mach-zynq/include/mach/vmalloc.h b/arch/arm/mach-zynq/include/mach/vmalloc.h
deleted file mode 100644
index 2398eff1e8b..00000000000
--- a/arch/arm/mach-zynq/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* arch/arm/mach-zynq/include/mach/vmalloc.h
- *
- *  Copyright (C) 2011 Xilinx
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __MACH_VMALLOC_H__
-#define __MACH_VMALLOC_H__
-#define VMALLOC_END       0xE0000000UL
-#endif
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 67f75a0b66d..4cefb57d9ed 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -629,6 +629,23 @@ config IO_36
 comment "Processor Features"
+config ARM_LPAE
+        bool "Support for the Large Physical Address Extension"
+        depends on MMU && CPU_V7
+        help
+          Say Y if you have an ARMv7 processor supporting the LPAE page
+          table format and you would like to access memory beyond the
+          4GB limit. The resulting kernel image will not run on
+          processors without the LPA extension.
+          If unsure, say N.
+config ARCH_PHYS_ADDR_T_64BIT
+        def_bool ARM_LPAE
+config ARCH_DMA_ADDR_T_64BIT
+        bool
 config ARM_THUMB
        bool "Support Thumb user binaries"
        depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_V6 || CPU_V6K || CPU_V7 || CPU_FEROCEON
@@ -816,14 +833,23 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
          Say Y here to use the Feroceon L2 cache in writethrough mode.
          Unless you specifically require this, say N for writeback mode.
+config MIGHT_HAVE_CACHE_L2X0
+        bool
+        help
+          This option should be selected by machines which have a L2x0
+          or PL310 cache controller, but where its use is optional.
+          The only effect of this option is to make CACHE_L2X0 and
+          related options available to the user for configuration.
+          Boards or SoCs which always require the cache controller
+          support to be present should select CACHE_L2X0 directly
+          instead of this option, thus preventing the user from
+          inadvertently configuring a broken kernel.
 config CACHE_L2X0
-        bool "Enable the L2x0 outer cache controller"
+        bool "Enable the L2x0 outer cache controller" if MIGHT_HAVE_CACHE_L2X0
-        depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
+        default MIGHT_HAVE_CACHE_L2X0
-                   REALVIEW_EB_A9MP || ARCH_IMX_V6_V7 || MACH_REALVIEW_PBX || \
-                   ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
-                   ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \
-                   ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_HIGHBANK
-        default y
        select OUTER_CACHE
        select OUTER_CACHE_SYNC
        help
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index c335c76e0d8..caf14dc059e 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -968,7 +968,7 @@ static int __init alignment_init(void)
                ai_usermode = safe_usermode(ai_usermode, false);
        }
-        hook_fault_code(1, do_alignment, SIGBUS, BUS_ADRALN,
+        hook_fault_code(FAULT_CODE_ALIGNMENT, do_alignment, SIGBUS, BUS_ADRALN,
                        "alignment exception");
        /*
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 93aac068da9..ee9bb363d60 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -22,6 +22,21 @@ unsigned int cpu_last_asid = ASID_FIRST_VERSION;
 DEFINE_PER_CPU(struct mm_struct *, current_mm);
 #endif
+#ifdef CONFIG_ARM_LPAE
+#define cpu_set_asid(asid) {                                            \
+        unsigned long ttbl, ttbh;                                       \
+        asm volatile(                                                   \
+        "       mrrc    p15, 0, %0, %1, c2              @ read TTBR0\n" \
+        "       mov     %1, %2, lsl #(48 - 32)          @ set ASID\n"   \
+        "       mcrr    p15, 0, %0, %1, c2              @ set TTBR0\n"  \
+        : "=&r" (ttbl), "=&r" (ttbh)                                    \
+        : "r" (asid & ~ASID_MASK));                                     \
+}
+#else
+#define cpu_set_asid(asid) \
+        asm("   mcr     p15, 0, %0, c13, c0, 1\n" : : "r" (asid))
+#endif
 /*
 * We fork()ed a process, and we need a new context for the child
 * to run in.  We reserve version 0 for initial tasks so we will
@@ -37,7 +52,7 @@ void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 static void flush_context(void)
 {
        /* set the reserved ASID before flushing the TLB */
-        asm("mcr        p15, 0, %0, c13, c0, 1\n" : : "r" (0));
+        cpu_set_asid(0);
        isb();
        local_flush_tlb_all();
        if (icache_is_vivt_asid_tagged()) {
@@ -99,7 +114,7 @@ static void reset_context(void *info)
        set_mm_context(mm, asid);
        /* set the new ASID */
-        asm("mcr        p15, 0, %0, c13, c0, 1\n" : : "r" (mm->context.id));
+        cpu_set_asid(mm->context.id);
        isb();
 }
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index aa33949fef6..bb7eac381a8 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -27,19 +27,6 @@
 #include "fault.h"
-/*
- * Fault status register encodings.  We steal bit 31 for our own purposes.
- */
-#define FSR_LNX_PF              (1 << 31)
-#define FSR_WRITE               (1 << 11)
-#define FSR_FS4                 (1 << 10)
-#define FSR_FS3_0               (15)
-static inline int fsr_fs(unsigned int fsr)
-{
-        return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6;
-}
 #ifdef CONFIG_MMU
 #ifdef CONFIG_KPROBES
@@ -123,8 +110,10 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
                pte = pte_offset_map(pmd, addr);
                printk(", *pte=%08llx", (long long)pte_val(*pte));
+#ifndef CONFIG_ARM_LPAE
                printk(", *ppte=%08llx",
                       (long long)pte_val(pte[PTE_HWTABLE_PTRS]));
+#endif
                pte_unmap(pte);
        } while(0);
@@ -231,7 +220,7 @@ static inline bool access_error(unsigned int fsr, struct vm_area_struct *vma)
 static int __kprobes
 __do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr,
-                struct task_struct *tsk)
+                unsigned int flags, struct task_struct *tsk)
 {
        struct vm_area_struct *vma;
        int fault;
@@ -253,18 +242,7 @@ good_area:
                goto out;
        }
-        /*
+        return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);
-         * If for any reason at all we couldn't handle the fault, make
-         * sure we exit gracefully rather than endlessly redo the fault.
-         */
-        fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, (fsr & FSR_WRITE) ? FAULT_FLAG_WRITE : 0);
-        if (unlikely(fault & VM_FAULT_ERROR))
-                return fault;
-        if (fault & VM_FAULT_MAJOR)
-                tsk->maj_flt++;
-        else
-                tsk->min_flt++;
-        return fault;
 check_stack:
        if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr))
@@ -279,6 +257,9 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
        struct task_struct *tsk;
        struct mm_struct *mm;
        int fault, sig, code;
+        int write = fsr & FSR_WRITE;
+        unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
+                                (write ? FAULT_FLAG_WRITE : 0);
        if (notify_page_fault(regs, fsr))
                return 0;
@@ -305,6 +286,7 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
        if (!down_read_trylock(&mm->mmap_sem)) {
                if (!user_mode(regs) && !search_exception_tables(regs->ARM_pc))
                        goto no_context;
+retry:
                down_read(&mm->mmap_sem);
        } else {
                /*
@@ -320,14 +302,41 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
 #endif
        }
-        fault = __do_page_fault(mm, addr, fsr, tsk);
+        fault = __do_page_fault(mm, addr, fsr, flags, tsk);
-        up_read(&mm->mmap_sem);
+        /* If we need to retry but a fatal signal is pending, handle the
+         * signal first. We do not need to release the mmap_sem because
+         * it would already be released in __lock_page_or_retry in
+         * mm/filemap.c. */
+        if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
+                return 0;
+        /*
+         * Major/minor page fault accounting is only done on the
+         * initial attempt. If we go through a retry, it is extremely
+         * likely that the page will be found in page cache at that point.
+         */
        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
-        if (fault & VM_FAULT_MAJOR)
+        if (flags & FAULT_FLAG_ALLOW_RETRY) {
-                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, addr);
+                if (fault & VM_FAULT_MAJOR) {
-        else if (fault & VM_FAULT_MINOR)
+                        tsk->maj_flt++;
-                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, addr);
+                        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
+                                        regs, addr);
+                } else {
+                        tsk->min_flt++;
+                        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
+                                        regs, addr);
+                }
+                if (fault & VM_FAULT_RETRY) {
+                        /* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
+                        * of starvation. */
+                        flags &= ~FAULT_FLAG_ALLOW_RETRY;
+                        goto retry;
+                }
+        }
+        up_read(&mm->mmap_sem);
        /*
         * Handle the "normal" case first - VM_FAULT_MAJOR / VM_FAULT_MINOR
@@ -441,6 +450,12 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
        pmd = pmd_offset(pud, addr);
        pmd_k = pmd_offset(pud_k, addr);
+#ifdef CONFIG_ARM_LPAE
+        /*
+         * Only one hardware entry per PMD with LPAE.
+         */
+        index = 0;
+#else
        /*
         * On ARM one Linux PGD entry contains two hardware entries (see page
         * tables layout in pgtable.h). We normally guarantee that we always
@@ -450,6 +465,7 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
         * for the first of pair.
         */
        index = (addr >> SECTION_SHIFT) & 1;
+#endif
        if (pmd_none(pmd_k[index]))
                goto bad_area;
@@ -489,55 +505,20 @@ do_bad(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
        return 1;
 }
-static struct fsr_info {
+struct fsr_info {
        int     (*fn)(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
        int     sig;
        int     code;
        const char *name;
-} fsr_info[] = {
-        /*
-         * The following are the standard ARMv3 and ARMv4 aborts.  ARMv5
-         * defines these to be "precise" aborts.
-         */
-        { do_bad,               SIGSEGV, 0,             "vector exception"                 },
-        { do_bad,               SIGBUS,  BUS_ADRALN,    "alignment exception"              },
-        { do_bad,               SIGKILL, 0,             "terminal exception"               },
-        { do_bad,               SIGBUS,  BUS_ADRALN,    "alignment exception"              },
-        { do_bad,               SIGBUS,  0,             "external abort on linefetch"      },
-        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "section translation fault"        },
-        { do_bad,               SIGBUS,  0,             "external abort on linefetch"      },
-        { do_page_fault,        SIGSEGV, SEGV_MAPERR,   "page translation fault"           },
-        { do_bad,               SIGBUS,  0,             "external abort on non-linefetch"  },
-        { do_bad,               SIGSEGV, SEGV_ACCERR,   "section domain fault"             },
-        { do_bad,               SIGBUS,  0,             "external abort on non-linefetch"  },
-        { do_bad,               SIGSEGV, SEGV_ACCERR,   "page domain fault"                },
-        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
-        { do_sect_fault,        SIGSEGV, SEGV_ACCERR,   "section permission fault"         },
-        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
-        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "page permission fault"            },
-        /*
-         * The following are "imprecise" aborts, which are signalled by bit
-         * 10 of the FSR, and may not be recoverable.  These are only
-         * supported if the CPU abort handler supports bit 10.
-         */
-        { do_bad,               SIGBUS,  0,             "unknown 16"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 17"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 18"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 19"                       },
-        { do_bad,               SIGBUS,  0,             "lock abort"                       }, /* xscale */
-        { do_bad,               SIGBUS,  0,             "unknown 21"                       },
-        { do_bad,               SIGBUS,  BUS_OBJERR,    "imprecise external abort"         }, /* xscale */
-        { do_bad,               SIGBUS,  0,             "unknown 23"                       },
-        { do_bad,               SIGBUS,  0,             "dcache parity error"              }, /* xscale */
-        { do_bad,               SIGBUS,  0,             "unknown 25"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 26"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 27"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 28"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 29"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 30"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 31"                       }
 };
+/* FSR definition */
+#ifdef CONFIG_ARM_LPAE
+#include "fsr-3level.c"
+#else
+#include "fsr-2level.c"
+#endif
 void __init
 hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *),
                int sig, int code, const char *name)
@@ -573,42 +554,6 @@ do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
        arm_notify_die("", regs, &info, fsr, 0);
 }
-static struct fsr_info ifsr_info[] = {
-        { do_bad,               SIGBUS,  0,             "unknown 0"                        },
-        { do_bad,               SIGBUS,  0,             "unknown 1"                        },
-        { do_bad,               SIGBUS,  0,             "debug event"                      },
-        { do_bad,               SIGSEGV, SEGV_ACCERR,   "section access flag fault"        },
-        { do_bad,               SIGBUS,  0,             "unknown 4"                        },
-        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "section translation fault"        },
-        { do_bad,               SIGSEGV, SEGV_ACCERR,   "page access flag fault"           },
-        { do_page_fault,        SIGSEGV, SEGV_MAPERR,   "page translation fault"           },
-        { do_bad,               SIGBUS,  0,             "external abort on non-linefetch"  },
-        { do_bad,               SIGSEGV, SEGV_ACCERR,   "section domain fault"             },
-        { do_bad,               SIGBUS,  0,             "unknown 10"                       },
-        { do_bad,               SIGSEGV, SEGV_ACCERR,   "page domain fault"                },
-        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
-        { do_sect_fault,        SIGSEGV, SEGV_ACCERR,   "section permission fault"         },
-        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
-        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "page permission fault"            },
-        { do_bad,               SIGBUS,  0,             "unknown 16"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 17"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 18"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 19"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 20"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 21"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 22"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 23"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 24"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 25"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 26"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 27"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 28"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 29"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 30"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 31"                       },
-};
 void __init
 hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *),
                 int sig, int code, const char *name)
@@ -641,6 +586,7 @@ do_PrefetchAbort(unsigned long addr, unsigned int ifsr, struct pt_regs *regs)
        arm_notify_die("", regs, &info, ifsr, 0);
 }
+#ifndef CONFIG_ARM_LPAE
 static int __init exceptions_init(void)
 {
        if (cpu_architecture() >= CPU_ARCH_ARMv6) {
@@ -663,3 +609,4 @@ static int __init exceptions_init(void)
 }
 arch_initcall(exceptions_init);
+#endif
diff --git a/arch/arm/mm/fault.h b/arch/arm/mm/fault.h
index 49e9e3804de..cf08bdfbe0d 100644
--- a/arch/arm/mm/fault.h
+++ b/arch/arm/mm/fault.h
@@ -1,3 +1,28 @@
-void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
+#ifndef __ARCH_ARM_FAULT_H
+#define __ARCH_ARM_FAULT_H
+/*
+ * Fault status register encodings.  We steal bit 31 for our own purposes.
+ */
+#define FSR_LNX_PF              (1 << 31)
+#define FSR_WRITE               (1 << 11)
+#define FSR_FS4                 (1 << 10)
+#define FSR_FS3_0               (15)
+#define FSR_FS5_0               (0x3f)
+#ifdef CONFIG_ARM_LPAE
+static inline int fsr_fs(unsigned int fsr)
+{
+        return fsr & FSR_FS5_0;
+}
+#else
+static inline int fsr_fs(unsigned int fsr)
+{
+        return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6;
+}
+#endif
+void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
 unsigned long search_exception_table(unsigned long addr);
+#endif  /* __ARCH_ARM_FAULT_H */
diff --git a/arch/arm/mm/fsr-2level.c b/arch/arm/mm/fsr-2level.c
new file mode 100644
index 00000000000..18ca74c0f34
--- /dev/null
+++ b/arch/arm/mm/fsr-2level.c
@@ -0,0 +1,78 @@
+static struct fsr_info fsr_info[] = {
+        /*
+         * The following are the standard ARMv3 and ARMv4 aborts.  ARMv5
+         * defines these to be "precise" aborts.
+         */
+        { do_bad,               SIGSEGV, 0,             "vector exception"                 },
+        { do_bad,               SIGBUS,  BUS_ADRALN,    "alignment exception"              },
+        { do_bad,               SIGKILL, 0,             "terminal exception"               },
+        { do_bad,               SIGBUS,  BUS_ADRALN,    "alignment exception"              },
+        { do_bad,               SIGBUS,  0,             "external abort on linefetch"      },
+        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "section translation fault"        },
+        { do_bad,               SIGBUS,  0,             "external abort on linefetch"      },
+        { do_page_fault,        SIGSEGV, SEGV_MAPERR,   "page translation fault"           },
+        { do_bad,               SIGBUS,  0,             "external abort on non-linefetch"  },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "section domain fault"             },
+        { do_bad,               SIGBUS,  0,             "external abort on non-linefetch"  },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "page domain fault"                },
+        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
+        { do_sect_fault,        SIGSEGV, SEGV_ACCERR,   "section permission fault"         },
+        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
+        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "page permission fault"            },
+        /*
+         * The following are "imprecise" aborts, which are signalled by bit
+         * 10 of the FSR, and may not be recoverable.  These are only
+         * supported if the CPU abort handler supports bit 10.
+         */
+        { do_bad,               SIGBUS,  0,             "unknown 16"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 17"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 18"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 19"                       },
+        { do_bad,               SIGBUS,  0,             "lock abort"                       }, /* xscale */
+        { do_bad,               SIGBUS,  0,             "unknown 21"                       },
+        { do_bad,               SIGBUS,  BUS_OBJERR,    "imprecise external abort"         }, /* xscale */
+        { do_bad,               SIGBUS,  0,             "unknown 23"                       },
+        { do_bad,               SIGBUS,  0,             "dcache parity error"              }, /* xscale */
+        { do_bad,               SIGBUS,  0,             "unknown 25"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 26"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 27"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 28"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 29"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 30"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 31"                       },
+};
+static struct fsr_info ifsr_info[] = {
+        { do_bad,               SIGBUS,  0,             "unknown 0"                        },
+        { do_bad,               SIGBUS,  0,             "unknown 1"                        },
+        { do_bad,               SIGBUS,  0,             "debug event"                      },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "section access flag fault"        },
+        { do_bad,               SIGBUS,  0,             "unknown 4"                        },
+        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "section translation fault"        },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "page access flag fault"           },
+        { do_page_fault,        SIGSEGV, SEGV_MAPERR,   "page translation fault"           },
+        { do_bad,               SIGBUS,  0,             "external abort on non-linefetch"  },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "section domain fault"             },
+        { do_bad,               SIGBUS,  0,             "unknown 10"                       },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "page domain fault"                },
+        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
+        { do_sect_fault,        SIGSEGV, SEGV_ACCERR,   "section permission fault"         },
+        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
+        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "page permission fault"            },
+        { do_bad,               SIGBUS,  0,             "unknown 16"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 17"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 18"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 19"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 20"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 21"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 22"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 23"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 24"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 25"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 26"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 27"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 28"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 29"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 30"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 31"                       },
+};
diff --git a/arch/arm/mm/fsr-3level.c b/arch/arm/mm/fsr-3level.c
new file mode 100644
index 00000000000..05a4e943183
--- /dev/null
+++ b/arch/arm/mm/fsr-3level.c
@@ -0,0 +1,68 @@
+static struct fsr_info fsr_info[] = {
+        { do_bad,               SIGBUS,  0,             "unknown 0"                     },
+        { do_bad,               SIGBUS,  0,             "unknown 1"                     },
+        { do_bad,               SIGBUS,  0,             "unknown 2"                     },
+        { do_bad,               SIGBUS,  0,             "unknown 3"                     },
+        { do_bad,               SIGBUS,  0,             "reserved translation fault"    },
+        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "level 1 translation fault"     },
+        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "level 2 translation fault"     },
+        { do_page_fault,        SIGSEGV, SEGV_MAPERR,   "level 3 translation fault"     },
+        { do_bad,               SIGBUS,  0,             "reserved access flag fault"    },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "level 1 access flag fault"     },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "level 2 access flag fault"     },
+        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "level 3 access flag fault"     },
+        { do_bad,               SIGBUS,  0,             "reserved permission fault"     },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "level 1 permission fault"      },
+        { do_sect_fault,        SIGSEGV, SEGV_ACCERR,   "level 2 permission fault"      },
+        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "level 3 permission fault"      },
+        { do_bad,               SIGBUS,  0,             "synchronous external abort"    },
+        { do_bad,               SIGBUS,  0,             "asynchronous external abort"   },
+        { do_bad,               SIGBUS,  0,             "unknown 18"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 19"                    },
+        { do_bad,               SIGBUS,  0,             "synchronous abort (translation table walk)" },
+        { do_bad,               SIGBUS,  0,             "synchronous abort (translation table walk)" },
+        { do_bad,               SIGBUS,  0,             "synchronous abort (translation table walk)" },
+        { do_bad,               SIGBUS,  0,             "synchronous abort (translation table walk)" },
+        { do_bad,               SIGBUS,  0,             "synchronous parity error"      },
+        { do_bad,               SIGBUS,  0,             "asynchronous parity error"     },
+        { do_bad,               SIGBUS,  0,             "unknown 26"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 27"                    },
+        { do_bad,               SIGBUS,  0,             "synchronous parity error (translation table walk" },
+        { do_bad,               SIGBUS,  0,             "synchronous parity error (translation table walk" },
+        { do_bad,               SIGBUS,  0,             "synchronous parity error (translation table walk" },
+        { do_bad,               SIGBUS,  0,             "synchronous parity error (translation table walk" },
+        { do_bad,               SIGBUS,  0,             "unknown 32"                    },
+        { do_bad,               SIGBUS,  BUS_ADRALN,    "alignment fault"               },
+        { do_bad,               SIGBUS,  0,             "debug event"                   },
+        { do_bad,               SIGBUS,  0,             "unknown 35"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 36"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 37"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 38"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 39"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 40"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 41"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 42"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 43"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 44"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 45"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 46"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 47"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 48"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 49"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 50"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 51"                    },
+        { do_bad,               SIGBUS,  0,             "implementation fault (lockdown abort)" },
+        { do_bad,               SIGBUS,  0,             "unknown 53"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 54"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 55"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 56"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 57"                    },
+        { do_bad,               SIGBUS,  0,             "implementation fault (coprocessor abort)" },
+        { do_bad,               SIGBUS,  0,             "unknown 59"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 60"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 61"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 62"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 63"                    },
+};
+#define ifsr_info       fsr_info
diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c
index 296ad2eaddb..feacf4c7671 100644
--- a/arch/arm/mm/idmap.c
+++ b/arch/arm/mm/idmap.c
@@ -1,9 +1,38 @@
 #include <linux/kernel.h>
 #include <asm/cputype.h>
+#include <asm/idmap.h>
 #include <asm/pgalloc.h>
 #include <asm/pgtable.h>
+#include <asm/sections.h>
+pgd_t *idmap_pgd;
+#ifdef CONFIG_ARM_LPAE
+static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
+        unsigned long prot)
+{
+        pmd_t *pmd;
+        unsigned long next;
+        if (pud_none_or_clear_bad(pud) || (pud_val(*pud) & L_PGD_SWAPPER)) {
+                pmd = pmd_alloc_one(&init_mm, addr);
+                if (!pmd) {
+                        pr_warning("Failed to allocate identity pmd.\n");
+                        return;
+                }
+                pud_populate(&init_mm, pud, pmd);
+                pmd += pmd_index(addr);
+        } else
+                pmd = pmd_offset(pud, addr);
+        do {
+                next = pmd_addr_end(addr, end);
+                *pmd = __pmd((addr & PMD_MASK) | prot);
+                flush_pmd_entry(pmd);
+        } while (pmd++, addr = next, addr != end);
+}
+#else   /* !CONFIG_ARM_LPAE */
 static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
        unsigned long prot)
 {
@@ -15,6 +44,7 @@ static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
        pmd[1] = __pmd(addr);
        flush_pmd_entry(pmd);
 }
+#endif  /* CONFIG_ARM_LPAE */
 static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
        unsigned long prot)
@@ -28,11 +58,11 @@ static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
        } while (pud++, addr = next, addr != end);
 }
-void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end)
+static void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end)
 {
        unsigned long prot, next;
-        prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE;
+        prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF;
        if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
                prot |= PMD_BIT4;
@@ -43,48 +73,41 @@ void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end)
        } while (pgd++, addr = next, addr != end);
 }
-#ifdef CONFIG_SMP
+extern char  __idmap_text_start[], __idmap_text_end[];
-static void idmap_del_pmd(pud_t *pud, unsigned long addr, unsigned long end)
-{
-        pmd_t *pmd = pmd_offset(pud, addr);
-        pmd_clear(pmd);
-}
-static void idmap_del_pud(pgd_t *pgd, unsigned long addr, unsigned long end)
+static int __init init_static_idmap(void)
 {
-        pud_t *pud = pud_offset(pgd, addr);
+        phys_addr_t idmap_start, idmap_end;
-        unsigned long next;
-        do {
+        idmap_pgd = pgd_alloc(&init_mm);
-                next = pud_addr_end(addr, end);
+        if (!idmap_pgd)
-                idmap_del_pmd(pud, addr, next);
+                return -ENOMEM;
-        } while (pud++, addr = next, addr != end);
-}
-void identity_mapping_del(pgd_t *pgd, unsigned long addr, unsigned long end)
+        /* Add an identity mapping for the physical address of the section. */
-{
+        idmap_start = virt_to_phys((void *)__idmap_text_start);
-        unsigned long next;
+        idmap_end = virt_to_phys((void *)__idmap_text_end);
-        pgd += pgd_index(addr);
+        pr_info("Setting up static identity map for 0x%llx - 0x%llx\n",
-        do {
+                (long long)idmap_start, (long long)idmap_end);
-                next = pgd_addr_end(addr, end);
+        identity_mapping_add(idmap_pgd, idmap_start, idmap_end);
-                idmap_del_pud(pgd, addr, next);
-        } while (pgd++, addr = next, addr != end);
+        return 0;
 }
-#endif
+early_initcall(init_static_idmap);
 /*
- * In order to soft-boot, we need to insert a 1:1 mapping in place of
+ * In order to soft-boot, we need to switch to a 1:1 mapping for the
- * the user-mode pages.  This will then ensure that we have predictable
+ * cpu_reset functions. This will then ensure that we have predictable
- * results when turning the mmu off
+ * results when turning off the mmu.
 */
 void setup_mm_for_reboot(void)
 {
-        /*
+        /* Clean and invalidate L1. */
-         * We need to access to user-mode page tables here. For kernel threads
+        flush_cache_all();
-         * we don't have any user-mode mappings so we use the context that we
-         * "borrowed".
+        /* Switch to the identity mapping. */
-         */
+        cpu_switch_mm(idmap_pgd, &init_mm);
-        identity_mapping_add(current->active_mm->pgd, 0, TASK_SIZE);
+        /* Flush the TLB. */
        local_flush_tlb_all();
 }
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index fbdd12ea3a5..786adddf1a8 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -20,7 +20,6 @@
 #include <linux/highmem.h>
 #include <linux/gfp.h>
 #include <linux/memblock.h>
-#include <linux/sort.h>
 #include <asm/mach-types.h>
 #include <asm/prom.h>
@@ -134,30 +133,18 @@ void show_mem(unsigned int filter)
 }
 static void __init find_limits(unsigned long *min, unsigned long *max_low,
-        unsigned long *max_high)
+                               unsigned long *max_high)
 {
        struct meminfo *mi = &meminfo;
        int i;
-        *min = -1UL;
+        /* This assumes the meminfo array is properly sorted */
-        *max_low = *max_high = 0;
+        *min = bank_pfn_start(&mi->bank[0]);
+        for_each_bank (i, mi)
-        for_each_bank (i, mi) {
+                if (mi->bank[i].highmem)
-                struct membank *bank = &mi->bank[i];
+                                break;
-                unsigned long start, end;
+        *max_low = bank_pfn_end(&mi->bank[i - 1]);
+        *max_high = bank_pfn_end(&mi->bank[mi->nr_banks - 1]);
-                start = bank_pfn_start(bank);
-                end = bank_pfn_end(bank);
-                if (*min > start)
-                        *min = start;
-                if (*max_high < end)
-                        *max_high = end;
-                if (bank->highmem)
-                        continue;
-                if (*max_low < end)
-                        *max_low = end;
-        }
 }
 static void __init arm_bootmem_init(unsigned long start_pfn,
@@ -319,19 +306,10 @@ static void arm_memory_present(void)
 }
 #endif
-static int __init meminfo_cmp(const void *_a, const void *_b)
-{
-        const struct membank *a = _a, *b = _b;
-        long cmp = bank_pfn_start(a) - bank_pfn_start(b);
-        return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
-}
 void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc)
 {
        int i;
-        sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
        memblock_init();
        for (i = 0; i < mi->nr_banks; i++)
                memblock_add(mi->bank[i].start, mi->bank[i].size);
@@ -403,8 +381,6 @@ void __init bootmem_init(void)
         */
        arm_bootmem_free(min, max_low, max_high);
-        high_memory = __va(((phys_addr_t)max_low << PAGE_SHIFT) - 1) + 1;
        /*
         * This doesn't seem to be used by the Linux memory manager any
         * more, but is used by ll_rw_block.  If we can get rid of it, we
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index bdb248c4f55..80632e8d753 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -36,12 +36,6 @@
 #include <asm/mach/map.h>
 #include "mm.h"
-/*
- * Used by ioremap() and iounmap() code to mark (super)section-mapped
- * I/O regions in vm_struct->flags field.
- */
-#define VM_ARM_SECTION_MAPPING  0x80000000
 int ioremap_page(unsigned long virt, unsigned long phys,
                 const struct mem_type *mtype)
 {
@@ -64,7 +58,7 @@ void __check_kvm_seq(struct mm_struct *mm)
        } while (seq != init_mm.context.kvm_seq);
 }
-#ifndef CONFIG_SMP
+#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
 /*
 * Section support is unsafe on SMP - If you iounmap and ioremap a region,
 * the other CPUs will not see this change until their next context switch.
@@ -79,13 +73,16 @@ static void unmap_area_sections(unsigned long virt, unsigned long size)
 {
        unsigned long addr = virt, end = virt + (size & ~(SZ_1M - 1));
        pgd_t *pgd;
+        pud_t *pud;
+        pmd_t *pmdp;
        flush_cache_vunmap(addr, end);
        pgd = pgd_offset_k(addr);
+        pud = pud_offset(pgd, addr);
+        pmdp = pmd_offset(pud, addr);
        do {
-                pmd_t pmd, *pmdp = pmd_offset(pgd, addr);
+                pmd_t pmd = *pmdp;
-                pmd = *pmdp;
                if (!pmd_none(pmd)) {
                        /*
                         * Clear the PMD from the page table, and
@@ -104,8 +101,8 @@ static void unmap_area_sections(unsigned long virt, unsigned long size)
                                pte_free_kernel(&init_mm, pmd_page_vaddr(pmd));
                }
-                addr += PGDIR_SIZE;
+                addr += PMD_SIZE;
-                pgd++;
+                pmdp += 2;
        } while (addr < end);
        /*
@@ -124,6 +121,8 @@ remap_area_sections(unsigned long virt, unsigned long pfn,
 {
        unsigned long addr = virt, end = virt + size;
        pgd_t *pgd;
+        pud_t *pud;
+        pmd_t *pmd;
        /*
         * Remove and free any PTE-based mapping, and
@@ -132,17 +131,17 @@ remap_area_sections(unsigned long virt, unsigned long pfn,
        unmap_area_sections(virt, size);
        pgd = pgd_offset_k(addr);
+        pud = pud_offset(pgd, addr);
+        pmd = pmd_offset(pud, addr);
        do {
-                pmd_t *pmd = pmd_offset(pgd, addr);
                pmd[0] = __pmd(__pfn_to_phys(pfn) | type->prot_sect);
                pfn += SZ_1M >> PAGE_SHIFT;
                pmd[1] = __pmd(__pfn_to_phys(pfn) | type->prot_sect);
                pfn += SZ_1M >> PAGE_SHIFT;
                flush_pmd_entry(pmd);
-                addr += PGDIR_SIZE;
+                addr += PMD_SIZE;
-                pgd++;
+                pmd += 2;
        } while (addr < end);
        return 0;
@@ -154,6 +153,8 @@ remap_area_supersections(unsigned long virt, unsigned long pfn,
 {
        unsigned long addr = virt, end = virt + size;
        pgd_t *pgd;
+        pud_t *pud;
+        pmd_t *pmd;
        /*
         * Remove and free any PTE-based mapping, and
@@ -162,6 +163,8 @@ remap_area_supersections(unsigned long virt, unsigned long pfn,
        unmap_area_sections(virt, size);
        pgd = pgd_offset_k(virt);
+        pud = pud_offset(pgd, addr);
+        pmd = pmd_offset(pud, addr);
        do {
                unsigned long super_pmd_val, i;
@@ -170,14 +173,12 @@ remap_area_supersections(unsigned long virt, unsigned long pfn,
                super_pmd_val |= ((pfn >> (32 - PAGE_SHIFT)) & 0xf) << 20;
                for (i = 0; i < 8; i++) {
-                        pmd_t *pmd = pmd_offset(pgd, addr);
                        pmd[0] = __pmd(super_pmd_val);
                        pmd[1] = __pmd(super_pmd_val);
                        flush_pmd_entry(pmd);
-                        addr += PGDIR_SIZE;
+                        addr += PMD_SIZE;
-                        pgd++;
+                        pmd += 2;
                }
                pfn += SUPERSECTION_SIZE >> PAGE_SHIFT;
@@ -195,17 +196,13 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
        unsigned long addr;
        struct vm_struct * area;
+#ifndef CONFIG_ARM_LPAE
        /*
         * High mappings must be supersection aligned
         */
        if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK))
                return NULL;
+#endif
-        /*
-         * Don't allow RAM to be mapped - this causes problems with ARMv6+
-         */
-        if (WARN_ON(pfn_valid(pfn)))
-                return NULL;
        type = get_mem_type(mtype);
        if (!type)
@@ -216,12 +213,40 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
         */
        size = PAGE_ALIGN(offset + size);
+        /*
+         * Try to reuse one of the static mapping whenever possible.
+         */
+        read_lock(&vmlist_lock);
+        for (area = vmlist; area; area = area->next) {
+                if (!size || (sizeof(phys_addr_t) == 4 && pfn >= 0x100000))
+                        break;
+                if (!(area->flags & VM_ARM_STATIC_MAPPING))
+                        continue;
+                if ((area->flags & VM_ARM_MTYPE_MASK) != VM_ARM_MTYPE(mtype))
+                        continue;
+                if (__phys_to_pfn(area->phys_addr) > pfn ||
+                    __pfn_to_phys(pfn) + size-1 > area->phys_addr + area->size-1)
+                        continue;
+                /* we can drop the lock here as we know *area is static */
+                read_unlock(&vmlist_lock);
+                addr = (unsigned long)area->addr;
+                addr += __pfn_to_phys(pfn) - area->phys_addr;
+                return (void __iomem *) (offset + addr);
+        }
+        read_unlock(&vmlist_lock);
+        /*
+         * Don't allow RAM to be mapped - this causes problems with ARMv6+
+         */
+        if (WARN_ON(pfn_valid(pfn)))
+                return NULL;
        area = get_vm_area_caller(size, VM_IOREMAP, caller);
        if (!area)
                return NULL;
        addr = (unsigned long)area->addr;
-#ifndef CONFIG_SMP
+#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
        if (DOMAIN_IO == 0 &&
            (((cpu_architecture() >= CPU_ARCH_ARMv6) && (get_cr() & CR_XP)) ||
               cpu_is_xsc3()) && pfn >= 0x100000 &&
@@ -313,28 +338,34 @@ __arm_ioremap_exec(unsigned long phys_addr, size_t size, bool cached)
 void __iounmap(volatile void __iomem *io_addr)
 {
        void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr);
-#ifndef CONFIG_SMP
+        struct vm_struct *vm;
-        struct vm_struct **p, *tmp;
-        /*
+        read_lock(&vmlist_lock);
-         * If this is a section based mapping we need to handle it
+        for (vm = vmlist; vm; vm = vm->next) {
-         * specially as the VM subsystem does not know how to handle
+                if (vm->addr > addr)
-         * such a beast. We need the lock here b/c we need to clear
+                        break;
-         * all the mappings before the area can be reclaimed
+                if (!(vm->flags & VM_IOREMAP))
-         * by someone else.
+                        continue;
-         */
+                /* If this is a static mapping we must leave it alone */
-        write_lock(&vmlist_lock);
+                if ((vm->flags & VM_ARM_STATIC_MAPPING) &&
-        for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) {
+                    (vm->addr <= addr) && (vm->addr + vm->size > addr)) {
-                if ((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) {
+                        read_unlock(&vmlist_lock);
-                        if (tmp->flags & VM_ARM_SECTION_MAPPING) {
+                        return;
-                                unmap_area_sections((unsigned long)tmp->addr,
+                }
-                                                    tmp->size);
+#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
-                        }
+                /*
+                 * If this is a section based mapping we need to handle it
+                 * specially as the VM subsystem does not know how to handle
+                 * such a beast.
+                 */
+                if ((vm->addr == addr) &&
+                    (vm->flags & VM_ARM_SECTION_MAPPING)) {
+                        unmap_area_sections((unsigned long)vm->addr, vm->size);
                        break;
                }
-        }
-        write_unlock(&vmlist_lock);
 #endif
+        }
+        read_unlock(&vmlist_lock);
        vunmap(addr);
 }
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index ad7cce3bc43..70f6d3ea483 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -21,6 +21,20 @@ const struct mem_type *get_mem_type(unsigned int type);
 extern void __flush_dcache_page(struct address_space *mapping, struct page *page);
+/*
+ * ARM specific vm_struct->flags bits.
+ */
+/* (super)section-mapped I/O regions used by ioremap()/iounmap() */
+#define VM_ARM_SECTION_MAPPING  0x80000000
+/* permanent static mappings from iotable_init() */
+#define VM_ARM_STATIC_MAPPING   0x40000000
+/* mapping type (attributes) for permanent static mappings */
+#define VM_ARM_MTYPE(mt)                ((mt) << 20)
+#define VM_ARM_MTYPE_MASK       (0x1f << 20)
 #endif
 #ifdef CONFIG_ZONE_DMA
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index 44b628e4d6e..ce8cb1970d7 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -11,10 +11,49 @@
 #include <linux/random.h>
 #include <asm/cachetype.h>
+static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr,
+                                              unsigned long pgoff)
+{
+        unsigned long base = addr & ~(SHMLBA-1);
+        unsigned long off = (pgoff << PAGE_SHIFT) & (SHMLBA-1);
+        if (base + off <= addr)
+                return base + off;
+        return base - off;
+}
 #define COLOUR_ALIGN(addr,pgoff)                \
        ((((addr)+SHMLBA-1)&~(SHMLBA-1)) +      \
         (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1)))
+/* gap between mmap and stack */
+#define MIN_GAP (128*1024*1024UL)
+#define MAX_GAP ((TASK_SIZE)/6*5)
+static int mmap_is_legacy(void)
+{
+        if (current->personality & ADDR_COMPAT_LAYOUT)
+                return 1;
+        if (rlimit(RLIMIT_STACK) == RLIM_INFINITY)
+                return 1;
+        return sysctl_legacy_va_layout;
+}
+static unsigned long mmap_base(unsigned long rnd)
+{
+        unsigned long gap = rlimit(RLIMIT_STACK);
+        if (gap < MIN_GAP)
+                gap = MIN_GAP;
+        else if (gap > MAX_GAP)
+                gap = MAX_GAP;
+        return PAGE_ALIGN(TASK_SIZE - gap - rnd);
+}
 /*
 * We need to ensure that shared mappings are correctly aligned to
 * avoid aliasing issues with VIPT caches.  We need to ensure that
@@ -68,13 +107,9 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
        if (len > mm->cached_hole_size) {
                start_addr = addr = mm->free_area_cache;
        } else {
-                start_addr = addr = TASK_UNMAPPED_BASE;
+                start_addr = addr = mm->mmap_base;
                mm->cached_hole_size = 0;
        }
-        /* 8 bits of randomness in 20 address space bits */
-        if ((current->flags & PF_RANDOMIZE) &&
-            !(current->personality & ADDR_NO_RANDOMIZE))
-                addr += (get_random_int() % (1 << 8)) << PAGE_SHIFT;
 full_search:
        if (do_align)
@@ -111,6 +146,134 @@ full_search:
        }
 }
+unsigned long
+arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
+                        const unsigned long len, const unsigned long pgoff,
+                        const unsigned long flags)
+{
+        struct vm_area_struct *vma;
+        struct mm_struct *mm = current->mm;
+        unsigned long addr = addr0;
+        int do_align = 0;
+        int aliasing = cache_is_vipt_aliasing();
+        /*
+         * We only need to do colour alignment if either the I or D
+         * caches alias.
+         */
+        if (aliasing)
+                do_align = filp || (flags & MAP_SHARED);
+        /* requested length too big for entire address space */
+        if (len > TASK_SIZE)
+                return -ENOMEM;
+        if (flags & MAP_FIXED) {
+                if (aliasing && flags & MAP_SHARED &&
+                    (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1))
+                        return -EINVAL;
+                return addr;
+        }
+        /* requesting a specific address */
+        if (addr) {
+                if (do_align)
+                        addr = COLOUR_ALIGN(addr, pgoff);
+                else
+                        addr = PAGE_ALIGN(addr);
+                vma = find_vma(mm, addr);
+                if (TASK_SIZE - len >= addr &&
+                                (!vma || addr + len <= vma->vm_start))
+                        return addr;
+        }
+        /* check if free_area_cache is useful for us */
+        if (len <= mm->cached_hole_size) {
+                mm->cached_hole_size = 0;
+                mm->free_area_cache = mm->mmap_base;
+        }
+        /* either no address requested or can't fit in requested address hole */
+        addr = mm->free_area_cache;
+        if (do_align) {
+                unsigned long base = COLOUR_ALIGN_DOWN(addr - len, pgoff);
+                addr = base + len;
+        }
+        /* make sure it can fit in the remaining address space */
+        if (addr > len) {
+                vma = find_vma(mm, addr-len);
+                if (!vma || addr <= vma->vm_start)
+                        /* remember the address as a hint for next time */
+                        return (mm->free_area_cache = addr-len);
+        }
+        if (mm->mmap_base < len)
+                goto bottomup;
+        addr = mm->mmap_base - len;
+        if (do_align)
+                addr = COLOUR_ALIGN_DOWN(addr, pgoff);
+        do {
+                /*
+                 * Lookup failure means no vma is above this address,
+                 * else if new region fits below vma->vm_start,
+                 * return with success:
+                 */
+                vma = find_vma(mm, addr);
+                if (!vma || addr+len <= vma->vm_start)
+                        /* remember the address as a hint for next time */
+                        return (mm->free_area_cache = addr);
+                /* remember the largest hole we saw so far */
+                if (addr + mm->cached_hole_size < vma->vm_start)
+                        mm->cached_hole_size = vma->vm_start - addr;
+                /* try just below the current vma->vm_start */
+                addr = vma->vm_start - len;
+                if (do_align)
+                        addr = COLOUR_ALIGN_DOWN(addr, pgoff);
+        } while (len < vma->vm_start);
+bottomup:
+        /*
+         * A failed mmap() very likely causes application failure,
+         * so fall back to the bottom-up function here. This scenario
+         * can happen with large stack limits and large mmap()
+         * allocations.
+         */
+        mm->cached_hole_size = ~0UL;
+        mm->free_area_cache = TASK_UNMAPPED_BASE;
+        addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags);
+        /*
+         * Restore the topdown base:
+         */
+        mm->free_area_cache = mm->mmap_base;
+        mm->cached_hole_size = ~0UL;
+        return addr;
+}
+void arch_pick_mmap_layout(struct mm_struct *mm)
+{
+        unsigned long random_factor = 0UL;
+        /* 8 bits of randomness in 20 address space bits */
+        if ((current->flags & PF_RANDOMIZE) &&
+            !(current->personality & ADDR_NO_RANDOMIZE))
+                random_factor = (get_random_int() % (1 << 8)) << PAGE_SHIFT;
+        if (mmap_is_legacy()) {
+                mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
+                mm->get_unmapped_area = arch_get_unmapped_area;
+                mm->unmap_area = arch_unmap_area;
+        } else {
+                mm->mmap_base = mmap_base(random_factor);
+                mm->get_unmapped_area = arch_get_unmapped_area_topdown;
+                mm->unmap_area = arch_unmap_area_topdown;
+        }
+}
 /*
 * You really shouldn't be using read() or write() on /dev/mem.  This
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index dc8c550e6cb..94c5a0c94f5 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -15,6 +15,7 @@
 #include <linux/nodemask.h>
 #include <linux/memblock.h>
 #include <linux/fs.h>
+#include <linux/vmalloc.h>
 #include <asm/cputype.h>
 #include <asm/sections.h>
@@ -150,6 +151,7 @@ static int __init early_nowrite(char *__unused)
 }
 early_param("nowb", early_nowrite);
+#ifndef CONFIG_ARM_LPAE
 static int __init early_ecc(char *p)
 {
        if (memcmp(p, "on", 2) == 0)
@@ -159,6 +161,7 @@ static int __init early_ecc(char *p)
        return 0;
 }
 early_param("ecc", early_ecc);
+#endif
 static int __init noalign_setup(char *__unused)
 {
@@ -228,10 +231,12 @@ static struct mem_type mem_types[] = {
                .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
                .domain    = DOMAIN_KERNEL,
        },
+#ifndef CONFIG_ARM_LPAE
        [MT_MINICLEAN] = {
                .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_MINICACHE,
                .domain    = DOMAIN_KERNEL,
        },
+#endif
        [MT_LOW_VECTORS] = {
                .prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
                                L_PTE_RDONLY,
@@ -429,6 +434,7 @@ static void __init build_mem_type_table(void)
         * ARMv6 and above have extended page tables.
         */
        if (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP)) {
+#ifndef CONFIG_ARM_LPAE
                /*
                 * Mark cache clean areas and XIP ROM read only
                 * from SVC mode and no access from userspace.
@@ -436,6 +442,7 @@ static void __init build_mem_type_table(void)
                mem_types[MT_ROM].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
                mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
                mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
+#endif
                if (is_smp()) {
                        /*
@@ -474,6 +481,18 @@ static void __init build_mem_type_table(void)
                mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_BUFFERABLE;
        }
+#ifdef CONFIG_ARM_LPAE
+        /*
+         * Do not generate access flag faults for the kernel mappings.
+         */
+        for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
+                mem_types[i].prot_pte |= PTE_EXT_AF;
+                mem_types[i].prot_sect |= PMD_SECT_AF;
+        }
+        kern_pgprot |= PTE_EXT_AF;
+        vecs_pgprot |= PTE_EXT_AF;
+#endif
        for (i = 0; i < 16; i++) {
                unsigned long v = pgprot_val(protection_map[i]);
                protection_map[i] = __pgprot(v | user_pgprot);
@@ -529,13 +548,18 @@ EXPORT_SYMBOL(phys_mem_access_prot);
 #define vectors_base()  (vectors_high() ? 0xffff0000 : 0)
-static void __init *early_alloc(unsigned long sz)
+static void __init *early_alloc_aligned(unsigned long sz, unsigned long align)
 {
-        void *ptr = __va(memblock_alloc(sz, sz));
+        void *ptr = __va(memblock_alloc(sz, align));
        memset(ptr, 0, sz);
        return ptr;
 }
+static void __init *early_alloc(unsigned long sz)
+{
+        return early_alloc_aligned(sz, sz);
+}
 static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, unsigned long prot)
 {
        if (pmd_none(*pmd)) {
@@ -572,8 +596,10 @@ static void __init alloc_init_section(pud_t *pud, unsigned long addr,
        if (((addr | end | phys) & ~SECTION_MASK) == 0) {
                pmd_t *p = pmd;
+#ifndef CONFIG_ARM_LPAE
                if (addr & SECTION_SIZE)
                        pmd++;
+#endif
                do {
                        *pmd = __pmd(phys | type->prot_sect);
@@ -603,6 +629,7 @@ static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
        } while (pud++, addr = next, addr != end);
 }
+#ifndef CONFIG_ARM_LPAE
 static void __init create_36bit_mapping(struct map_desc *md,
                                        const struct mem_type *type)
 {
@@ -662,6 +689,7 @@ static void __init create_36bit_mapping(struct map_desc *md,
                pgd += SUPERSECTION_SIZE >> PGDIR_SHIFT;
        } while (addr != end);
 }
+#endif  /* !CONFIG_ARM_LPAE */
 /*
 * Create the page directory entries and any necessary
@@ -685,14 +713,16 @@ static void __init create_mapping(struct map_desc *md)
        }
        if ((md->type == MT_DEVICE || md->type == MT_ROM) &&
-            md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) {
+            md->virtual >= PAGE_OFFSET &&
+            (md->virtual < VMALLOC_START || md->virtual >= VMALLOC_END)) {
                printk(KERN_WARNING "BUG: mapping for 0x%08llx"
-                       " at 0x%08lx overlaps vmalloc space\n",
+                       " at 0x%08lx out of vmalloc space\n",
                       (long long)__pfn_to_phys((u64)md->pfn), md->virtual);
        }
        type = &mem_types[md->type];
+#ifndef CONFIG_ARM_LPAE
        /*
         * Catch 36-bit addresses
         */
@@ -700,6 +730,7 @@ static void __init create_mapping(struct map_desc *md)
                create_36bit_mapping(md, type);
                return;
        }
+#endif
        addr = md->virtual & PAGE_MASK;
        phys = __pfn_to_phys(md->pfn);
@@ -729,18 +760,33 @@ static void __init create_mapping(struct map_desc *md)
 */
 void __init iotable_init(struct map_desc *io_desc, int nr)
 {
-        int i;
+        struct map_desc *md;
+        struct vm_struct *vm;
+        if (!nr)
+                return;
-        for (i = 0; i < nr; i++)
+        vm = early_alloc_aligned(sizeof(*vm) * nr, __alignof__(*vm));
-                create_mapping(io_desc + i);
+        for (md = io_desc; nr; md++, nr--) {
+                create_mapping(md);
+                vm->addr = (void *)(md->virtual & PAGE_MASK);
+                vm->size = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK));
+                vm->phys_addr = __pfn_to_phys(md->pfn); 
+                vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING; 
+                vm->flags |= VM_ARM_MTYPE(md->type);
+                vm->caller = iotable_init;
+                vm_area_add_early(vm++);
+        }
 }
-static void * __initdata vmalloc_min = (void *)(VMALLOC_END - SZ_128M);
+static void * __initdata vmalloc_min =
+        (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
 /*
 * vmalloc=size forces the vmalloc area to be exactly 'size'
 * bytes. This can be used to increase (or decrease) the vmalloc
- * area - the default is 128m.
+ * area - the default is 240m.
 */
 static int __init early_vmalloc(char *arg)
 {
@@ -775,6 +821,9 @@ void __init sanity_check_meminfo(void)
                struct membank *bank = &meminfo.bank[j];
                *bank = meminfo.bank[i];
+                if (bank->start > ULONG_MAX)
+                        highmem = 1;
 #ifdef CONFIG_HIGHMEM
                if (__va(bank->start) >= vmalloc_min ||
                    __va(bank->start) < (void *)PAGE_OFFSET)
@@ -786,7 +835,7 @@ void __init sanity_check_meminfo(void)
                 * Split those memory banks which are partially overlapping
                 * the vmalloc area greatly simplifying things later.
                 */
-                if (__va(bank->start) < vmalloc_min &&
+                if (!highmem && __va(bank->start) < vmalloc_min &&
                    bank->size > vmalloc_min - __va(bank->start)) {
                        if (meminfo.nr_banks >= NR_BANKS) {
                                printk(KERN_CRIT "NR_BANKS too low, "
@@ -807,6 +856,17 @@ void __init sanity_check_meminfo(void)
                bank->highmem = highmem;
                /*
+                 * Highmem banks not allowed with !CONFIG_HIGHMEM.
+                 */
+                if (highmem) {
+                        printk(KERN_NOTICE "Ignoring RAM at %.8llx-%.8llx "
+                               "(!CONFIG_HIGHMEM).\n",
+                               (unsigned long long)bank->start,
+                               (unsigned long long)bank->start + bank->size - 1);
+                        continue;
+                }
+                /*
                 * Check whether this memory bank would entirely overlap
                 * the vmalloc area.
                 */
@@ -860,6 +920,7 @@ void __init sanity_check_meminfo(void)
        }
 #endif
        meminfo.nr_banks = j;
+        high_memory = __va(lowmem_limit - 1) + 1;
        memblock_set_current_limit(lowmem_limit);
 }
@@ -890,14 +951,20 @@ static inline void prepare_page_table(void)
        /*
         * Clear out all the kernel space mappings, except for the first
-         * memory bank, up to the end of the vmalloc region.
+         * memory bank, up to the vmalloc region.
         */
        for (addr = __phys_to_virt(end);
-             addr < VMALLOC_END; addr += PMD_SIZE)
+             addr < VMALLOC_START; addr += PMD_SIZE)
                pmd_clear(pmd_off_k(addr));
 }
+#ifdef CONFIG_ARM_LPAE
+/* the first page is reserved for pgd */
+#define SWAPPER_PG_DIR_SIZE     (PAGE_SIZE + \
+                                 PTRS_PER_PGD * PTRS_PER_PMD * sizeof(pmd_t))
+#else
 #define SWAPPER_PG_DIR_SIZE     (PTRS_PER_PGD * sizeof(pgd_t))
+#endif
 /*
 * Reserve the special regions of memory
@@ -920,8 +987,8 @@ void __init arm_mm_memblock_reserve(void)
 }
 /*
- * Set up device the mappings.  Since we clear out the page tables for all
+ * Set up the device mappings.  Since we clear out the page tables for all
- * mappings above VMALLOC_END, we will remove any debug device mappings.
+ * mappings above VMALLOC_START, we will remove any debug device mappings.
 * This means you have to be careful how you debug this function, or any
 * called function.  This means you can't use any function or debugging
 * method which may touch any device, otherwise the kernel _will_ crash.
@@ -936,7 +1003,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
         */
        vectors_page = early_alloc(PAGE_SIZE);
-        for (addr = VMALLOC_END; addr; addr += PMD_SIZE)
+        for (addr = VMALLOC_START; addr; addr += PMD_SIZE)
                pmd_clear(pmd_off_k(addr));
        /*
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 88417514b2c..4fc6794cca4 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -29,6 +29,8 @@ void __init arm_mm_memblock_reserve(void)
 void __init sanity_check_meminfo(void)
 {
+        phys_addr_t end = bank_phys_end(&meminfo.bank[meminfo.nr_banks - 1]);
+        high_memory = __va(end - 1) + 1;
 }
 /*
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index b2027c154b2..a3e78ccabd6 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -10,6 +10,7 @@
 #include <linux/mm.h>
 #include <linux/gfp.h>
 #include <linux/highmem.h>
+#include <linux/slab.h>
 #include <asm/pgalloc.h>
 #include <asm/page.h>
@@ -17,6 +18,14 @@
 #include "mm.h"
+#ifdef CONFIG_ARM_LPAE
+#define __pgd_alloc()   kmalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL)
+#define __pgd_free(pgd) kfree(pgd)
+#else
+#define __pgd_alloc()   (pgd_t *)__get_free_pages(GFP_KERNEL, 2)
+#define __pgd_free(pgd) free_pages((unsigned long)pgd, 2)
+#endif
 /*
 * need to get a 16k page for level 1
 */
@@ -27,7 +36,7 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
        pmd_t *new_pmd, *init_pmd;
        pte_t *new_pte, *init_pte;
-        new_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL, 2);
+        new_pgd = __pgd_alloc();
        if (!new_pgd)
                goto no_pgd;
@@ -42,10 +51,25 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
        clean_dcache_area(new_pgd, PTRS_PER_PGD * sizeof(pgd_t));
+#ifdef CONFIG_ARM_LPAE
+        /*
+         * Allocate PMD table for modules and pkmap mappings.
+         */
+        new_pud = pud_alloc(mm, new_pgd + pgd_index(MODULES_VADDR),
+                            MODULES_VADDR);
+        if (!new_pud)
+                goto no_pud;
+        new_pmd = pmd_alloc(mm, new_pud, 0);
+        if (!new_pmd)
+                goto no_pmd;
+#endif
        if (!vectors_high()) {
                /*
                 * On ARM, first page must always be allocated since it
-                 * contains the machine vectors.
+                 * contains the machine vectors. The vectors are always high
+                 * with LPAE.
                 */
                new_pud = pud_alloc(mm, new_pgd, 0);
                if (!new_pud)
@@ -74,7 +98,7 @@ no_pte:
 no_pmd:
        pud_free(mm, new_pud);
 no_pud:
-        free_pages((unsigned long)new_pgd, 2);
+        __pgd_free(new_pgd);
 no_pgd:
        return NULL;
 }
@@ -111,5 +135,24 @@ no_pud:
        pgd_clear(pgd);
        pud_free(mm, pud);
 no_pgd:
-        free_pages((unsigned long) pgd_base, 2);
+#ifdef CONFIG_ARM_LPAE
+        /*
+         * Free modules/pkmap or identity pmd tables.
+         */
+        for (pgd = pgd_base; pgd < pgd_base + PTRS_PER_PGD; pgd++) {
+                if (pgd_none_or_clear_bad(pgd))
+                        continue;
+                if (pgd_val(*pgd) & L_PGD_SWAPPER)
+                        continue;
+                pud = pud_offset(pgd, 0);
+                if (pud_none_or_clear_bad(pud))
+                        continue;
+                pmd = pmd_offset(pud, 0);
+                pud_clear(pud);
+                pmd_free(mm, pmd);
+                pgd_clear(pgd);
+                pud_free(mm, pud);
+        }
+#endif
+        __pgd_free(pgd_base);
 }
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 67469665d47..234951345eb 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -95,6 +95,7 @@ ENTRY(cpu_arm1020_proc_fin)
 * loc: location to jump to for soft reset
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm1020_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -107,6 +108,8 @@ ENTRY(cpu_arm1020_reset)
        bic     ip, ip, #0x1100                 @ ...i...s........
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_arm1020_reset)
+        .popsection
 /*
 * cpu_arm1020_do_idle()
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 4251421c0ed..c244b06caac 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -95,6 +95,7 @@ ENTRY(cpu_arm1020e_proc_fin)
 * loc: location to jump to for soft reset
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm1020e_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -107,6 +108,8 @@ ENTRY(cpu_arm1020e_reset)
        bic     ip, ip, #0x1100                 @ ...i...s........
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_arm1020e_reset)
+        .popsection
 /*
 * cpu_arm1020e_do_idle()
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index d283cf3d06e..38fe22efd18 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -84,6 +84,7 @@ ENTRY(cpu_arm1022_proc_fin)
 * loc: location to jump to for soft reset
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm1022_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -96,6 +97,8 @@ ENTRY(cpu_arm1022_reset)
        bic     ip, ip, #0x1100                 @ ...i...s........
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_arm1022_reset)
+        .popsection
 /*
 * cpu_arm1022_do_idle()
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 678a1ceafed..3eb9c3c26c7 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -84,6 +84,7 @@ ENTRY(cpu_arm1026_proc_fin)
 * loc: location to jump to for soft reset
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm1026_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -96,6 +97,8 @@ ENTRY(cpu_arm1026_reset)
        bic     ip, ip, #0x1100                 @ ...i...s........
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_arm1026_reset)
+        .popsection
 /*
 * cpu_arm1026_do_idle()
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index e5b974cddac..4fbeb5b8e6c 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -225,6 +225,7 @@ ENTRY(cpu_arm7_set_pte_ext)
 * Params  : r0 = address to jump to
 * Notes   : This sets up everything for a reset
 */
+                .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm6_reset)
 ENTRY(cpu_arm7_reset)
                mov     r1, #0
@@ -235,6 +236,9 @@ ENTRY(cpu_arm7_reset)
                mov     r1, #0x30
                mcr     p15, 0, r1, c1, c0, 0           @ turn off MMU etc
                mov     pc, r0
+ENDPROC(cpu_arm6_reset)
+ENDPROC(cpu_arm7_reset)
+                .popsection
                __CPUINIT
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index 55f4e290665..0ac908c7ade 100644
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -101,6 +101,7 @@ ENTRY(cpu_arm720_set_pte_ext)
 * Params  : r0 = address to jump to
 * Notes   : This sets up everything for a reset
 */
+                .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm720_reset)
                mov     ip, #0
                mcr     p15, 0, ip, c7, c7, 0           @ invalidate cache
@@ -112,6 +113,8 @@ ENTRY(cpu_arm720_reset)
                bic     ip, ip, #0x2100                 @ ..v....s........
                mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
                mov     pc, r0
+ENDPROC(cpu_arm720_reset)
+                .popsection
        __CPUINIT
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index 4506be3adda..dc5de5d53f2 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -49,6 +49,7 @@ ENTRY(cpu_arm740_proc_fin)
 * Params  : r0 = address to jump to
 * Notes   : This sets up everything for a reset
 */
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm740_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c0, 0           @ invalidate cache
@@ -56,6 +57,8 @@ ENTRY(cpu_arm740_reset)
        bic     ip, ip, #0x0000000c             @ ............wc..
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_arm740_reset)
+        .popsection
        __CPUINIT
diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S
index 7e0e1fe4ed4..6ddea3e464b 100644
--- a/arch/arm/mm/proc-arm7tdmi.S
+++ b/arch/arm/mm/proc-arm7tdmi.S
@@ -45,8 +45,11 @@ ENTRY(cpu_arm7tdmi_proc_fin)
 * Params  : loc(r0)    address to jump to
 * Purpose : Sets up everything for a reset and jump to the location for soft reset.
 */
+                .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm7tdmi_reset)
                mov     pc, r0
+ENDPROC(cpu_arm7tdmi_reset)
+                .popsection
                __CPUINIT
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 88fb3d9e064..cb941ae95f6 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -85,6 +85,7 @@ ENTRY(cpu_arm920_proc_fin)
 * loc: location to jump to for soft reset
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm920_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -97,6 +98,8 @@ ENTRY(cpu_arm920_reset)
        bic     ip, ip, #0x1100                 @ ...i...s........
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_arm920_reset)
+        .popsection
 /*
 * cpu_arm920_do_idle()
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 490e1883385..4ec0e074dd5 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -87,6 +87,7 @@ ENTRY(cpu_arm922_proc_fin)
 * loc: location to jump to for soft reset
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm922_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -99,6 +100,8 @@ ENTRY(cpu_arm922_reset)
        bic     ip, ip, #0x1100                 @ ...i...s........
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_arm922_reset)
+        .popsection
 /*
 * cpu_arm922_do_idle()
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 51d494be057..9dccd9a365b 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -108,6 +108,7 @@ ENTRY(cpu_arm925_proc_fin)
 * loc: location to jump to for soft reset
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm925_reset)
        /* Send software reset to MPU and DSP */
        mov     ip, #0xff000000
@@ -115,6 +116,8 @@ ENTRY(cpu_arm925_reset)
        orr     ip, ip, #0x0000ce00
        mov     r4, #1
        strh    r4, [ip, #0x10]
+ENDPROC(cpu_arm925_reset)
+        .popsection
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 9f8fd91f918..820259b81a1 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -77,6 +77,7 @@ ENTRY(cpu_arm926_proc_fin)
 * loc: location to jump to for soft reset
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm926_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -89,6 +90,8 @@ ENTRY(cpu_arm926_reset)
        bic     ip, ip, #0x1100                 @ ...i...s........
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_arm926_reset)
+        .popsection
 /*
 * cpu_arm926_do_idle()
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index ac750d50615..9fdc0a17097 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -48,6 +48,7 @@ ENTRY(cpu_arm940_proc_fin)
 * Params  : r0 = address to jump to
 * Notes   : This sets up everything for a reset
 */
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm940_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c5, 0           @ flush I cache
@@ -58,6 +59,8 @@ ENTRY(cpu_arm940_reset)
        bic     ip, ip, #0x00001000             @ i-cache
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_arm940_reset)
+        .popsection
 /*
 * cpu_arm940_do_idle()
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index 683af3a182b..f684cfedcca 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -55,6 +55,7 @@ ENTRY(cpu_arm946_proc_fin)
 * Params  : r0 = address to jump to
 * Notes   : This sets up everything for a reset
 */
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm946_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c5, 0           @ flush I cache
@@ -65,6 +66,8 @@ ENTRY(cpu_arm946_reset)
        bic     ip, ip, #0x00001000             @ i-cache
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_arm946_reset)
+        .popsection
 /*
 * cpu_arm946_do_idle()
diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S
index 2120f9e2af7..8881391dfb9 100644
--- a/arch/arm/mm/proc-arm9tdmi.S
+++ b/arch/arm/mm/proc-arm9tdmi.S
@@ -45,8 +45,11 @@ ENTRY(cpu_arm9tdmi_proc_fin)
 * Params  : loc(r0)    address to jump to
 * Purpose : Sets up everything for a reset and jump to the location for soft reset.
 */
+                .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm9tdmi_reset)
                mov     pc, r0
+ENDPROC(cpu_arm9tdmi_reset)
+                .popsection
                __CPUINIT
diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S
index 4c7a5710472..272558a133a 100644
--- a/arch/arm/mm/proc-fa526.S
+++ b/arch/arm/mm/proc-fa526.S
@@ -57,6 +57,7 @@ ENTRY(cpu_fa526_proc_fin)
 * loc: location to jump to for soft reset
 */
        .align  4
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_fa526_reset)
 /* TODO: Use CP8 if possible... */
        mov     ip, #0
@@ -73,6 +74,8 @@ ENTRY(cpu_fa526_reset)
        nop
        nop
        mov     pc, r0
+ENDPROC(cpu_fa526_reset)
+        .popsection
 /*
 * cpu_fa526_do_idle()
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index 8a6c2f78c1c..ba3c500584a 100644
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -98,6 +98,7 @@ ENTRY(cpu_feroceon_proc_fin)
 * loc: location to jump to for soft reset
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_feroceon_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -110,6 +111,8 @@ ENTRY(cpu_feroceon_reset)
        bic     ip, ip, #0x1100                 @ ...i...s........
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_feroceon_reset)
+        .popsection
 /*
 * cpu_feroceon_do_idle()
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index 307a4def8d3..2d8ff3ad86d 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -91,8 +91,9 @@
 #if L_PTE_SHARED != PTE_EXT_SHARED
 #error PTE shared bit mismatch
 #endif
-#if (L_PTE_XN+L_PTE_USER+L_PTE_RDONLY+L_PTE_DIRTY+L_PTE_YOUNG+\
+#if !defined (CONFIG_ARM_LPAE) && \
-     L_PTE_FILE+L_PTE_PRESENT) > L_PTE_SHARED
+        (L_PTE_XN+L_PTE_USER+L_PTE_RDONLY+L_PTE_DIRTY+L_PTE_YOUNG+\
+         L_PTE_FILE+L_PTE_PRESENT) > L_PTE_SHARED
 #error Invalid Linux PTE bit settings
 #endif
 #endif  /* CONFIG_MMU */
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
index db52b0fb14a..cdfedc5b8ad 100644
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -69,6 +69,7 @@ ENTRY(cpu_mohawk_proc_fin)
 * (same as arm926)
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_mohawk_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -79,6 +80,8 @@ ENTRY(cpu_mohawk_reset)
        bic     ip, ip, #0x1100                 @ ...i...s........
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_mohawk_reset)
+        .popsection
 /*
 * cpu_mohawk_do_idle()
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S
index d50ada26edd..775d70fba93 100644
--- a/arch/arm/mm/proc-sa110.S
+++ b/arch/arm/mm/proc-sa110.S
@@ -62,6 +62,7 @@ ENTRY(cpu_sa110_proc_fin)
 * loc: location to jump to for soft reset
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_sa110_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -74,6 +75,8 @@ ENTRY(cpu_sa110_reset)
        bic     ip, ip, #0x1100                 @ ...i...s........
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_sa110_reset)
+        .popsection
 /*
 * cpu_sa110_do_idle(type)
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 7d91545d089..3aa0da11fd8 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -70,6 +70,7 @@ ENTRY(cpu_sa1100_proc_fin)
 * loc: location to jump to for soft reset
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_sa1100_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -82,6 +83,8 @@ ENTRY(cpu_sa1100_reset)
        bic     ip, ip, #0x1100                 @ ...i...s........
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_sa1100_reset)
+        .popsection
 /*
 * cpu_sa1100_do_idle(type)
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index d061d2fa550..5900cd520e8 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -55,6 +55,7 @@ ENTRY(cpu_v6_proc_fin)
 *      - loc   - location to jump to for soft reset
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_v6_reset)
        mrc     p15, 0, r1, c1, c0, 0           @ ctrl register
        bic     r1, r1, #0x1                    @ ...............m
@@ -62,6 +63,8 @@ ENTRY(cpu_v6_reset)
        mov     r1, #0
        mcr     p15, 0, r1, c7, c5, 4           @ ISB
        mov     pc, r0
+ENDPROC(cpu_v6_reset)
+        .popsection
 /*
 *      cpu_v6_do_idle()
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S
new file mode 100644
index 00000000000..3a4b3e7b888
--- /dev/null
+++ b/arch/arm/mm/proc-v7-2level.S
@@ -0,0 +1,171 @@
+/*
+ * arch/arm/mm/proc-v7-2level.S
+ *
+ * Copyright (C) 2001 Deep Blue Solutions Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#define TTB_S           (1 << 1)
+#define TTB_RGN_NC      (0 << 3)
+#define TTB_RGN_OC_WBWA (1 << 3)
+#define TTB_RGN_OC_WT   (2 << 3)
+#define TTB_RGN_OC_WB   (3 << 3)
+#define TTB_NOS         (1 << 5)
+#define TTB_IRGN_NC     ((0 << 0) | (0 << 6))
+#define TTB_IRGN_WBWA   ((0 << 0) | (1 << 6))
+#define TTB_IRGN_WT     ((1 << 0) | (0 << 6))
+#define TTB_IRGN_WB     ((1 << 0) | (1 << 6))
+/* PTWs cacheable, inner WB not shareable, outer WB not shareable */
+#define TTB_FLAGS_UP    TTB_IRGN_WB|TTB_RGN_OC_WB
+#define PMD_FLAGS_UP    PMD_SECT_WB
+/* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */
+#define TTB_FLAGS_SMP   TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA
+#define PMD_FLAGS_SMP   PMD_SECT_WBWA|PMD_SECT_S
+/*
+ *      cpu_v7_switch_mm(pgd_phys, tsk)
+ *
+ *      Set the translation table base pointer to be pgd_phys
+ *
+ *      - pgd_phys - physical address of new TTB
+ *
+ *      It is assumed that:
+ *      - we are not using split page tables
+ */
+ENTRY(cpu_v7_switch_mm)
+#ifdef CONFIG_MMU
+        mov     r2, #0
+        ldr     r1, [r1, #MM_CONTEXT_ID]        @ get mm->context.id
+        ALT_SMP(orr     r0, r0, #TTB_FLAGS_SMP)
+        ALT_UP(orr      r0, r0, #TTB_FLAGS_UP)
+#ifdef CONFIG_ARM_ERRATA_430973
+        mcr     p15, 0, r2, c7, c5, 6           @ flush BTAC/BTB
+#endif
+#ifdef CONFIG_ARM_ERRATA_754322
+        dsb
+#endif
+        mcr     p15, 0, r2, c13, c0, 1          @ set reserved context ID
+        isb
+1:      mcr     p15, 0, r0, c2, c0, 0           @ set TTB 0
+        isb
+#ifdef CONFIG_ARM_ERRATA_754322
+        dsb
+#endif
+        mcr     p15, 0, r1, c13, c0, 1          @ set context ID
+        isb
+#endif
+        mov     pc, lr
+ENDPROC(cpu_v7_switch_mm)
+/*
+ *      cpu_v7_set_pte_ext(ptep, pte)
+ *
+ *      Set a level 2 translation table entry.
+ *
+ *      - ptep  - pointer to level 2 translation table entry
+ *                (hardware version is stored at +2048 bytes)
+ *      - pte   - PTE value to store
+ *      - ext   - value for extended PTE bits
+ */
+ENTRY(cpu_v7_set_pte_ext)
+#ifdef CONFIG_MMU
+        str     r1, [r0]                        @ linux version
+        bic     r3, r1, #0x000003f0
+        bic     r3, r3, #PTE_TYPE_MASK
+        orr     r3, r3, r2
+        orr     r3, r3, #PTE_EXT_AP0 | 2
+        tst     r1, #1 << 4
+        orrne   r3, r3, #PTE_EXT_TEX(1)
+        eor     r1, r1, #L_PTE_DIRTY
+        tst     r1, #L_PTE_RDONLY | L_PTE_DIRTY
+        orrne   r3, r3, #PTE_EXT_APX
+        tst     r1, #L_PTE_USER
+        orrne   r3, r3, #PTE_EXT_AP1
+#ifdef CONFIG_CPU_USE_DOMAINS
+        @ allow kernel read/write access to read-only user pages
+        tstne   r3, #PTE_EXT_APX
+        bicne   r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
+#endif
+        tst     r1, #L_PTE_XN
+        orrne   r3, r3, #PTE_EXT_XN
+        tst     r1, #L_PTE_YOUNG
+        tstne   r1, #L_PTE_PRESENT
+        moveq   r3, #0
+ ARM(   str     r3, [r0, #2048]! )
+ THUMB( add     r0, r0, #2048 )
+ THUMB( str     r3, [r0] )
+        mcr     p15, 0, r0, c7, c10, 1          @ flush_pte
+#endif
+        mov     pc, lr
+ENDPROC(cpu_v7_set_pte_ext)
+        /*
+         * Memory region attributes with SCTLR.TRE=1
+         *
+         *   n = TEX[0],C,B
+         *   TR = PRRR[2n+1:2n]         - memory type
+         *   IR = NMRR[2n+1:2n]         - inner cacheable property
+         *   OR = NMRR[2n+17:2n+16]     - outer cacheable property
+         *
+         *                      n       TR      IR      OR
+         *   UNCACHED           000     00
+         *   BUFFERABLE         001     10      00      00
+         *   WRITETHROUGH       010     10      10      10
+         *   WRITEBACK          011     10      11      11
+         *   reserved           110
+         *   WRITEALLOC         111     10      01      01
+         *   DEV_SHARED         100     01
+         *   DEV_NONSHARED      100     01
+         *   DEV_WC             001     10
+         *   DEV_CACHED         011     10
+         *
+         * Other attributes:
+         *
+         *   DS0 = PRRR[16] = 0         - device shareable property
+         *   DS1 = PRRR[17] = 1         - device shareable property
+         *   NS0 = PRRR[18] = 0         - normal shareable property
+         *   NS1 = PRRR[19] = 1         - normal shareable property
+         *   NOS = PRRR[24+n] = 1       - not outer shareable
+         */
+.equ    PRRR,   0xff0a81a8
+.equ    NMRR,   0x40e040e0
+        /*
+         * Macro for setting up the TTBRx and TTBCR registers.
+         * - \ttb0 and \ttb1 updated with the corresponding flags.
+         */
+        .macro  v7_ttb_setup, zero, ttbr0, ttbr1, tmp
+        mcr     p15, 0, \zero, c2, c0, 2        @ TTB control register
+        ALT_SMP(orr     \ttbr0, \ttbr0, #TTB_FLAGS_SMP)
+        ALT_UP(orr      \ttbr0, \ttbr0, #TTB_FLAGS_UP)
+        ALT_SMP(orr     \ttbr1, \ttbr1, #TTB_FLAGS_SMP)
+        ALT_UP(orr      \ttbr1, \ttbr1, #TTB_FLAGS_UP)
+        mcr     p15, 0, \ttbr1, c2, c0, 1       @ load TTB1
+        .endm
+        __CPUINIT
+        /*   AT
+         *  TFR   EV X F   I D LR    S
+         * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM
+         * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
+         *    1    0 110       0011 1100 .111 1101 < we want
+         */
+        .align  2
+        .type   v7_crval, #object
+v7_crval:
+        crval   clear=0x0120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
+        .previous
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
new file mode 100644
index 00000000000..8de0f1dd154
--- /dev/null
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -0,0 +1,150 @@
+/*
+ * arch/arm/mm/proc-v7-3level.S
+ *
+ * Copyright (C) 2001 Deep Blue Solutions Ltd.
+ * Copyright (C) 2011 ARM Ltd.
+ * Author: Catalin Marinas <catalin.marinas@arm.com>
+ *   based on arch/arm/mm/proc-v7-2level.S
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#define TTB_IRGN_NC     (0 << 8)
+#define TTB_IRGN_WBWA   (1 << 8)
+#define TTB_IRGN_WT     (2 << 8)
+#define TTB_IRGN_WB     (3 << 8)
+#define TTB_RGN_NC      (0 << 10)
+#define TTB_RGN_OC_WBWA (1 << 10)
+#define TTB_RGN_OC_WT   (2 << 10)
+#define TTB_RGN_OC_WB   (3 << 10)
+#define TTB_S           (3 << 12)
+#define TTB_EAE         (1 << 31)
+/* PTWs cacheable, inner WB not shareable, outer WB not shareable */
+#define TTB_FLAGS_UP    (TTB_IRGN_WB|TTB_RGN_OC_WB)
+#define PMD_FLAGS_UP    (PMD_SECT_WB)
+/* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */
+#define TTB_FLAGS_SMP   (TTB_IRGN_WBWA|TTB_S|TTB_RGN_OC_WBWA)
+#define PMD_FLAGS_SMP   (PMD_SECT_WBWA|PMD_SECT_S)
+/*
+ * cpu_v7_switch_mm(pgd_phys, tsk)
+ *
+ * Set the translation table base pointer to be pgd_phys (physical address of
+ * the new TTB).
+ */
+ENTRY(cpu_v7_switch_mm)
+#ifdef CONFIG_MMU
+        ldr     r1, [r1, #MM_CONTEXT_ID]        @ get mm->context.id
+        and     r3, r1, #0xff
+        mov     r3, r3, lsl #(48 - 32)          @ ASID
+        mcrr    p15, 0, r0, r3, c2              @ set TTB 0
+        isb
+#endif
+        mov     pc, lr
+ENDPROC(cpu_v7_switch_mm)
+/*
+ * cpu_v7_set_pte_ext(ptep, pte)
+ *
+ * Set a level 2 translation table entry.
+ * - ptep - pointer to level 3 translation table entry
+ * - pte - PTE value to store (64-bit in r2 and r3)
+ */
+ENTRY(cpu_v7_set_pte_ext)
+#ifdef CONFIG_MMU
+        tst     r2, #L_PTE_PRESENT
+        beq     1f
+        tst     r3, #1 << (55 - 32)             @ L_PTE_DIRTY
+        orreq   r2, #L_PTE_RDONLY
+1:      strd    r2, r3, [r0]
+        mcr     p15, 0, r0, c7, c10, 1          @ flush_pte
+#endif
+        mov     pc, lr
+ENDPROC(cpu_v7_set_pte_ext)
+        /*
+         * Memory region attributes for LPAE (defined in pgtable-3level.h):
+         *
+         *   n = AttrIndx[2:0]
+         *
+         *                      n       MAIR
+         *   UNCACHED           000     00000000
+         *   BUFFERABLE         001     01000100
+         *   DEV_WC             001     01000100
+         *   WRITETHROUGH       010     10101010
+         *   WRITEBACK          011     11101110
+         *   DEV_CACHED         011     11101110
+         *   DEV_SHARED         100     00000100
+         *   DEV_NONSHARED      100     00000100
+         *   unused             101
+         *   unused             110
+         *   WRITEALLOC         111     11111111
+         */
+.equ    PRRR,   0xeeaa4400                      @ MAIR0
+.equ    NMRR,   0xff000004                      @ MAIR1
+        /*
+         * Macro for setting up the TTBRx and TTBCR registers.
+         * - \ttbr1 updated.
+         */
+        .macro  v7_ttb_setup, zero, ttbr0, ttbr1, tmp
+        ldr     \tmp, =swapper_pg_dir           @ swapper_pg_dir virtual address
+        cmp     \ttbr1, \tmp                    @ PHYS_OFFSET > PAGE_OFFSET? (branch below)
+        mrc     p15, 0, \tmp, c2, c0, 2         @ TTB control register
+        orr     \tmp, \tmp, #TTB_EAE
+        ALT_SMP(orr     \tmp, \tmp, #TTB_FLAGS_SMP)
+        ALT_UP(orr      \tmp, \tmp, #TTB_FLAGS_UP)
+        ALT_SMP(orr     \tmp, \tmp, #TTB_FLAGS_SMP << 16)
+        ALT_UP(orr      \tmp, \tmp, #TTB_FLAGS_UP << 16)
+        /*
+         * TTBR0/TTBR1 split (PAGE_OFFSET):
+         *   0x40000000: T0SZ = 2, T1SZ = 0 (not used)
+         *   0x80000000: T0SZ = 0, T1SZ = 1
+         *   0xc0000000: T0SZ = 0, T1SZ = 2
+         *
+         * Only use this feature if PHYS_OFFSET <= PAGE_OFFSET, otherwise
+         * booting secondary CPUs would end up using TTBR1 for the identity
+         * mapping set up in TTBR0.
+         */
+        bhi     9001f                           @ PHYS_OFFSET > PAGE_OFFSET?
+        orr     \tmp, \tmp, #(((PAGE_OFFSET >> 30) - 1) << 16) @ TTBCR.T1SZ
+#if defined CONFIG_VMSPLIT_2G
+        /* PAGE_OFFSET == 0x80000000, T1SZ == 1 */
+        add     \ttbr1, \ttbr1, #1 << 4         @ skip two L1 entries
+#elif defined CONFIG_VMSPLIT_3G
+        /* PAGE_OFFSET == 0xc0000000, T1SZ == 2 */
+        add     \ttbr1, \ttbr1, #4096 * (1 + 3) @ only L2 used, skip pgd+3*pmd
+#endif
+        /* CONFIG_VMSPLIT_1G does not need TTBR1 adjustment */
+9001:   mcr     p15, 0, \tmp, c2, c0, 2         @ TTB control register
+        mcrr    p15, 1, \ttbr1, \zero, c2       @ load TTBR1
+        .endm
+        __CPUINIT
+        /*
+         *   AT
+         *  TFR   EV X F   IHD LR    S
+         * .EEE ..EE PUI. .TAT 4RVI ZWRS BLDP WCAM
+         * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
+         *   11    0 110    1  0011 1100 .111 1101 < we want
+         */
+        .align  2
+        .type   v7_crval, #object
+v7_crval:
+        crval   clear=0x0120c302, mmuset=0x30c23c7d, ucset=0x00c01c7c
+        .previous
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 2c559ac3814..7e9b5bf910c 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -19,24 +19,11 @@
 #include "proc-macros.S"
-#define TTB_S           (1 << 1)
+#ifdef CONFIG_ARM_LPAE
-#define TTB_RGN_NC      (0 << 3)
+#include "proc-v7-3level.S"
-#define TTB_RGN_OC_WBWA (1 << 3)
+#else
-#define TTB_RGN_OC_WT   (2 << 3)
+#include "proc-v7-2level.S"
-#define TTB_RGN_OC_WB   (3 << 3)
+#endif
-#define TTB_NOS         (1 << 5)
-#define TTB_IRGN_NC     ((0 << 0) | (0 << 6))
-#define TTB_IRGN_WBWA   ((0 << 0) | (1 << 6))
-#define TTB_IRGN_WT     ((1 << 0) | (0 << 6))
-#define TTB_IRGN_WB     ((1 << 0) | (1 << 6))
-/* PTWs cacheable, inner WB not shareable, outer WB not shareable */
-#define TTB_FLAGS_UP    TTB_IRGN_WB|TTB_RGN_OC_WB
-#define PMD_FLAGS_UP    PMD_SECT_WB
-/* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */
-#define TTB_FLAGS_SMP   TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA
-#define PMD_FLAGS_SMP   PMD_SECT_WBWA|PMD_SECT_S
 ENTRY(cpu_v7_proc_init)
        mov     pc, lr
@@ -63,6 +50,7 @@ ENDPROC(cpu_v7_proc_fin)
 *      caches disabled.
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_v7_reset)
        mrc     p15, 0, r1, c1, c0, 0           @ ctrl register
        bic     r1, r1, #0x1                    @ ...............m
@@ -71,6 +59,7 @@ ENTRY(cpu_v7_reset)
        isb
        mov     pc, r0
 ENDPROC(cpu_v7_reset)
+        .popsection
 /*
 *      cpu_v7_do_idle()
@@ -97,127 +86,12 @@ ENTRY(cpu_v7_dcache_clean_area)
        mov     pc, lr
 ENDPROC(cpu_v7_dcache_clean_area)
-/*
- *      cpu_v7_switch_mm(pgd_phys, tsk)
- *
- *      Set the translation table base pointer to be pgd_phys
- *
- *      - pgd_phys - physical address of new TTB
- *
- *      It is assumed that:
- *      - we are not using split page tables
- */
-ENTRY(cpu_v7_switch_mm)
-#ifdef CONFIG_MMU
-        mov     r2, #0
-        ldr     r1, [r1, #MM_CONTEXT_ID]        @ get mm->context.id
-        ALT_SMP(orr     r0, r0, #TTB_FLAGS_SMP)
-        ALT_UP(orr      r0, r0, #TTB_FLAGS_UP)
-#ifdef CONFIG_ARM_ERRATA_430973
-        mcr     p15, 0, r2, c7, c5, 6           @ flush BTAC/BTB
-#endif
-#ifdef CONFIG_ARM_ERRATA_754322
-        dsb
-#endif
-        mcr     p15, 0, r2, c13, c0, 1          @ set reserved context ID
-        isb
-1:      mcr     p15, 0, r0, c2, c0, 0           @ set TTB 0
-        isb
-#ifdef CONFIG_ARM_ERRATA_754322
-        dsb
-#endif
-        mcr     p15, 0, r1, c13, c0, 1          @ set context ID
-        isb
-#endif
-        mov     pc, lr
-ENDPROC(cpu_v7_switch_mm)
-/*
- *      cpu_v7_set_pte_ext(ptep, pte)
- *
- *      Set a level 2 translation table entry.
- *
- *      - ptep  - pointer to level 2 translation table entry
- *                (hardware version is stored at +2048 bytes)
- *      - pte   - PTE value to store
- *      - ext   - value for extended PTE bits
- */
-ENTRY(cpu_v7_set_pte_ext)
-#ifdef CONFIG_MMU
-        str     r1, [r0]                        @ linux version
-        bic     r3, r1, #0x000003f0
-        bic     r3, r3, #PTE_TYPE_MASK
-        orr     r3, r3, r2
-        orr     r3, r3, #PTE_EXT_AP0 | 2
-        tst     r1, #1 << 4
-        orrne   r3, r3, #PTE_EXT_TEX(1)
-        eor     r1, r1, #L_PTE_DIRTY
-        tst     r1, #L_PTE_RDONLY | L_PTE_DIRTY
-        orrne   r3, r3, #PTE_EXT_APX
-        tst     r1, #L_PTE_USER
-        orrne   r3, r3, #PTE_EXT_AP1
-#ifdef CONFIG_CPU_USE_DOMAINS
-        @ allow kernel read/write access to read-only user pages
-        tstne   r3, #PTE_EXT_APX
-        bicne   r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
-#endif
-        tst     r1, #L_PTE_XN
-        orrne   r3, r3, #PTE_EXT_XN
-        tst     r1, #L_PTE_YOUNG
-        tstne   r1, #L_PTE_PRESENT
-        moveq   r3, #0
- ARM(   str     r3, [r0, #2048]! )
- THUMB( add     r0, r0, #2048 )
- THUMB( str     r3, [r0] )
-        mcr     p15, 0, r0, c7, c10, 1          @ flush_pte
-#endif
-        mov     pc, lr
-ENDPROC(cpu_v7_set_pte_ext)
        string  cpu_v7_name, "ARMv7 Processor"
        .align
-        /*
-         * Memory region attributes with SCTLR.TRE=1
-         *
-         *   n = TEX[0],C,B
-         *   TR = PRRR[2n+1:2n]         - memory type
-         *   IR = NMRR[2n+1:2n]         - inner cacheable property
-         *   OR = NMRR[2n+17:2n+16]     - outer cacheable property
-         *
-         *                      n       TR      IR      OR
-         *   UNCACHED           000     00
-         *   BUFFERABLE         001     10      00      00
-         *   WRITETHROUGH       010     10      10      10
-         *   WRITEBACK          011     10      11      11
-         *   reserved           110
-         *   WRITEALLOC         111     10      01      01
-         *   DEV_SHARED         100     01
-         *   DEV_NONSHARED      100     01
-         *   DEV_WC             001     10
-         *   DEV_CACHED         011     10
-         *
-         * Other attributes:
-         *
-         *   DS0 = PRRR[16] = 0         - device shareable property
-         *   DS1 = PRRR[17] = 1         - device shareable property
-         *   NS0 = PRRR[18] = 0         - normal shareable property
-         *   NS1 = PRRR[19] = 1         - normal shareable property
-         *   NOS = PRRR[24+n] = 1       - not outer shareable
-         */
-.equ    PRRR,   0xff0a81a8
-.equ    NMRR,   0x40e040e0
 /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */
 .globl  cpu_v7_suspend_size
-.equ    cpu_v7_suspend_size, 4 * 7
+.equ    cpu_v7_suspend_size, 4 * 8
 #ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_v7_do_suspend)
        stmfd   sp!, {r4 - r10, lr}
@@ -226,10 +100,11 @@ ENTRY(cpu_v7_do_suspend)
        stmia   r0!, {r4 - r5}
        mrc     p15, 0, r6, c3, c0, 0   @ Domain ID
        mrc     p15, 0, r7, c2, c0, 1   @ TTB 1
+        mrc     p15, 0, r11, c2, c0, 2  @ TTB control register
        mrc     p15, 0, r8, c1, c0, 0   @ Control register
        mrc     p15, 0, r9, c1, c0, 1   @ Auxiliary control register
        mrc     p15, 0, r10, c1, c0, 2  @ Co-processor access control
-        stmia   r0, {r6 - r10}
+        stmia   r0, {r6 - r11}
        ldmfd   sp!, {r4 - r10, pc}
 ENDPROC(cpu_v7_do_suspend)
@@ -241,13 +116,15 @@ ENTRY(cpu_v7_do_resume)
        ldmia   r0!, {r4 - r5}
        mcr     p15, 0, r4, c13, c0, 0  @ FCSE/PID
        mcr     p15, 0, r5, c13, c0, 3  @ User r/o thread ID
-        ldmia   r0, {r6 - r10}
+        ldmia   r0, {r6 - r11}
        mcr     p15, 0, r6, c3, c0, 0   @ Domain ID
+#ifndef CONFIG_ARM_LPAE
        ALT_SMP(orr     r1, r1, #TTB_FLAGS_SMP)
        ALT_UP(orr      r1, r1, #TTB_FLAGS_UP)
+#endif
        mcr     p15, 0, r1, c2, c0, 0   @ TTB 0
        mcr     p15, 0, r7, c2, c0, 1   @ TTB 1
-        mcr     p15, 0, ip, c2, c0, 2   @ TTB control register
+        mcr     p15, 0, r11, c2, c0, 2  @ TTB control register
        mrc     p15, 0, r4, c1, c0, 1   @ Read Auxiliary control register
        teq     r4, r9                  @ Is it already set?
        mcrne   p15, 0, r9, c1, c0, 1   @ No, so write it
@@ -284,6 +161,7 @@ __v7_ca5mp_setup:
 __v7_ca9mp_setup:
        mov     r10, #(1 << 0)                  @ TLB ops broadcasting
        b       1f
+__v7_ca7mp_setup:
 __v7_ca15mp_setup:
        mov     r10, #0
 1:
@@ -363,11 +241,13 @@ __v7_setup:
        orreq   r10, r10, #1 << 6               @ set bit #6
        mcreq   p15, 0, r10, c15, c0, 1         @ write diagnostic register
 #endif
-#ifdef CONFIG_ARM_ERRATA_751472
+#if defined(CONFIG_ARM_ERRATA_751472) && defined(CONFIG_SMP)
-        cmp     r6, #0x30                       @ present prior to r3p0
+        ALT_SMP(cmp r6, #0x30)                  @ present prior to r3p0
+        ALT_UP_B(1f)
        mrclt   p15, 0, r10, c15, c0, 1         @ read diagnostic register
        orrlt   r10, r10, #1 << 11              @ set bit #11
        mcrlt   p15, 0, r10, c15, c0, 1         @ write diagnostic register
+1:
 #endif
 3:      mov     r10, #0
@@ -377,12 +257,7 @@ __v7_setup:
        dsb
 #ifdef CONFIG_MMU
        mcr     p15, 0, r10, c8, c7, 0          @ invalidate I + D TLBs
-        mcr     p15, 0, r10, c2, c0, 2          @ TTB control register
+        v7_ttb_setup r10, r4, r8, r5            @ TTBCR, TTBRx setup
-        ALT_SMP(orr     r4, r4, #TTB_FLAGS_SMP)
-        ALT_UP(orr      r4, r4, #TTB_FLAGS_UP)
-        ALT_SMP(orr     r8, r8, #TTB_FLAGS_SMP)
-        ALT_UP(orr      r8, r8, #TTB_FLAGS_UP)
-        mcr     p15, 0, r8, c2, c0, 1           @ load TTB1
        ldr     r5, =PRRR                       @ PRRR
        ldr     r6, =NMRR                       @ NMRR
        mcr     p15, 0, r5, c10, c2, 0          @ write PRRR
@@ -404,16 +279,7 @@ __v7_setup:
        mov     pc, lr                          @ return to head.S:__ret
 ENDPROC(__v7_setup)
-        /*   AT
+        .align  2
-         *  TFR   EV X F   I D LR    S
-         * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM
-         * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
-         *    1    0 110       0011 1100 .111 1101 < we want
-         */
-        .type   v7_crval, #object
-v7_crval:
-        crval   clear=0x0120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
 __v7_setup_stack:
        .space  4 * 11                          @ 11 registers
@@ -435,11 +301,11 @@ __v7_setup_stack:
         */
 .macro __v7_proc initfunc, mm_mmuflags = 0, io_mmuflags = 0, hwcaps = 0
        ALT_SMP(.long   PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \
-                        PMD_FLAGS_SMP | \mm_mmuflags)
+                        PMD_SECT_AF | PMD_FLAGS_SMP | \mm_mmuflags)
        ALT_UP(.long    PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \
-                        PMD_FLAGS_UP | \mm_mmuflags)
+                        PMD_SECT_AF | PMD_FLAGS_UP | \mm_mmuflags)
-        .long   PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_AP_WRITE | \
+        .long   PMD_TYPE_SECT | PMD_SECT_AP_WRITE | \
-                PMD_SECT_AP_READ | \io_mmuflags
+                PMD_SECT_AP_READ | PMD_SECT_AF | \io_mmuflags
        W(b)    \initfunc
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -452,6 +318,7 @@ __v7_setup_stack:
        .long   v7_cache_fns
 .endm
+#ifndef CONFIG_ARM_LPAE
        /*
         * ARM Ltd. Cortex A5 processor.
         */
@@ -463,6 +330,16 @@ __v7_ca5mp_proc_info:
        .size   __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info
        /*
+         * ARM Ltd. Cortex A7 processor.
+         */
+        .type   __v7_ca7mp_proc_info, #object
+__v7_ca7mp_proc_info:
+        .long   0x410fc070
+        .long   0xff0ffff0
+        __v7_proc __v7_ca7mp_setup, hwcaps = HWCAP_IDIV
+        .size   __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
+        /*
         * ARM Ltd. Cortex A9 processor.
         */
        .type   __v7_ca9mp_proc_info, #object
@@ -471,6 +348,7 @@ __v7_ca9mp_proc_info:
        .long   0xff0ffff0
        __v7_proc __v7_ca9mp_setup
        .size   __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info
+#endif  /* CONFIG_ARM_LPAE */
        /*
         * ARM Ltd. Cortex A15 processor.
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index abf0507a08a..b0d57869da2 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -105,6 +105,7 @@ ENTRY(cpu_xsc3_proc_fin)
 * loc: location to jump to for soft reset
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_xsc3_reset)
        mov     r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
        msr     cpsr_c, r1                      @ reset CPSR
@@ -119,6 +120,8 @@ ENTRY(cpu_xsc3_reset)
        @ already containing those two last instructions to survive.
        mcr     p15, 0, ip, c8, c7, 0           @ invalidate I and D TLBs
        mov     pc, r0
+ENDPROC(cpu_xsc3_reset)
+        .popsection
 /*
 * cpu_xsc3_do_idle()
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 3277904beba..4ffebaa595e 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -142,6 +142,7 @@ ENTRY(cpu_xscale_proc_fin)
 * Beware PXA270 erratum E7.
 */
        .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_xscale_reset)
        mov     r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
        msr     cpsr_c, r1                      @ reset CPSR
@@ -160,6 +161,8 @@ ENTRY(cpu_xscale_reset)
        @ already containing those two last instructions to survive.
        mcr     p15, 0, ip, c8, c7, 0           @ invalidate I & D TLBs
        mov     pc, r0
+ENDPROC(cpu_xscale_reset)
+        .popsection
 /*
 * cpu_xscale_do_idle()
diff --git a/arch/arm/nwfpe/entry.S b/arch/arm/nwfpe/entry.S
index cafa1835433..d18dde95b8a 100644
--- a/arch/arm/nwfpe/entry.S
+++ b/arch/arm/nwfpe/entry.S
@@ -20,6 +20,8 @@
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
+#include <asm/opcodes.h>
 /* This is the kernel's entry point into the floating point emulator.
 It is called from the kernel with code similar to this:
@@ -81,11 +83,11 @@ nwfpe_enter:
        mov     r6, r0                  @ save the opcode
 emulate:
        ldr     r1, [sp, #S_PSR]        @ fetch the PSR
-        bl      checkCondition          @ check the condition
+        bl      arm_check_condition     @ check the condition
-        cmp     r0, #0                  @ r0 = 0 ==> condition failed
+        cmp     r0, #ARM_OPCODE_CONDTEST_PASS   @ condition passed?
        @ if condition code failed to match, next insn
-        beq     next                    @ get the next instruction;
+        bne     next                    @ get the next instruction;
        mov     r0, r6                  @ prepare for EmulateAll()
        bl      EmulateAll              @ emulate the instruction
diff --git a/arch/arm/nwfpe/fpopcode.c b/arch/arm/nwfpe/fpopcode.c
index 922b8110758..ff983467308 100644
--- a/arch/arm/nwfpe/fpopcode.c
+++ b/arch/arm/nwfpe/fpopcode.c
@@ -61,29 +61,3 @@ const float32 float32Constant[] = {
        0x41200000              /* single 10.0 */
 };
-/* condition code lookup table
- index into the table is test code: EQ, NE, ... LT, GT, AL, NV
- bit position in short is condition code: NZCV */
-static const unsigned short aCC[16] = {
-        0xF0F0,                 // EQ == Z set
-        0x0F0F,                 // NE
-        0xCCCC,                 // CS == C set
-        0x3333,                 // CC
-        0xFF00,                 // MI == N set
-        0x00FF,                 // PL
-        0xAAAA,                 // VS == V set
-        0x5555,                 // VC
-        0x0C0C,                 // HI == C set && Z clear
-        0xF3F3,                 // LS == C clear || Z set
-        0xAA55,                 // GE == (N==V)
-        0x55AA,                 // LT == (N!=V)
-        0x0A05,                 // GT == (!Z && (N==V))
-        0xF5FA,                 // LE == (Z || (N!=V))
-        0xFFFF,                 // AL always
-        0                       // NV
-};
-unsigned int checkCondition(const unsigned int opcode, const unsigned int ccodes)
-{
-        return (aCC[opcode >> 28] >> (ccodes >> 28)) & 1;
-}
diff --git a/arch/arm/nwfpe/fpopcode.h b/arch/arm/nwfpe/fpopcode.h
index 786e4c96156..78f02dbfaa8 100644
--- a/arch/arm/nwfpe/fpopcode.h
+++ b/arch/arm/nwfpe/fpopcode.h
@@ -475,9 +475,6 @@ static inline unsigned int getDestinationSize(const unsigned int opcode)
        return (nRc);
 }
-extern unsigned int checkCondition(const unsigned int opcode,
-                                   const unsigned int ccodes);
 extern const float64 float64Constant[];
 extern const float32 float32Constant[];
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
index c074e66ad22..4e0a371630b 100644
--- a/arch/arm/oprofile/common.c
+++ b/arch/arm/oprofile/common.c
@@ -116,7 +116,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
        return oprofile_perf_init(ops);
 }
-void __exit oprofile_arch_exit(void)
+void oprofile_arch_exit(void)
 {
        oprofile_perf_exit();
 }
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile
index f5aebfec4f2..a99dc15a70f 100644
--- a/arch/arm/plat-iop/Makefile
+++ b/arch/arm/plat-iop/Makefile
@@ -10,7 +10,6 @@ obj-$(CONFIG_ARCH_IOP32X) += i2c.o
 obj-$(CONFIG_ARCH_IOP32X) += pci.o
 obj-$(CONFIG_ARCH_IOP32X) += setup.o
 obj-$(CONFIG_ARCH_IOP32X) += time.o
-obj-$(CONFIG_ARCH_IOP32X) += io.o
 obj-$(CONFIG_ARCH_IOP32X) += cp6.o
 obj-$(CONFIG_ARCH_IOP32X) += adma.o
 obj-$(CONFIG_ARCH_IOP32X) += pmu.o
@@ -22,7 +21,6 @@ obj-$(CONFIG_ARCH_IOP33X) += i2c.o
 obj-$(CONFIG_ARCH_IOP33X) += pci.o
 obj-$(CONFIG_ARCH_IOP33X) += setup.o
 obj-$(CONFIG_ARCH_IOP33X) += time.o
-obj-$(CONFIG_ARCH_IOP33X) += io.o
 obj-$(CONFIG_ARCH_IOP33X) += cp6.o
 obj-$(CONFIG_ARCH_IOP33X) += adma.o
 obj-$(CONFIG_ARCH_IOP33X) += pmu.o
diff --git a/arch/arm/plat-iop/io.c b/arch/arm/plat-iop/io.c
deleted file mode 100644
index e15bc17db90..00000000000
--- a/arch/arm/plat-iop/io.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * iop3xx custom ioremap implementation
- * Copyright (c) 2006, Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
- * Place - Suite 330, Boston, MA 02111-1307 USA.
- *
- */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/io.h>
-#include <mach/hardware.h>
-void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size,
-        unsigned int mtype)
-{
-        void __iomem * retval;
-        switch (cookie) {
-        case IOP3XX_PCI_LOWER_IO_PA ... IOP3XX_PCI_UPPER_IO_PA:
-                retval = (void *) IOP3XX_PCI_IO_PHYS_TO_VIRT(cookie);
-                break;
-        case IOP3XX_PERIPHERAL_PHYS_BASE ... IOP3XX_PERIPHERAL_UPPER_PA:
-                retval = (void *) IOP3XX_PMMR_PHYS_TO_VIRT(cookie);
-                break;
-        default:
-                retval = __arm_ioremap_caller(cookie, size, mtype,
-                                __builtin_return_address(0));
-        }
-        return retval;
-}
-EXPORT_SYMBOL(__iop3xx_ioremap);
-void __iop3xx_iounmap(void __iomem *addr)
-{
-        extern void __iounmap(volatile void __iomem *addr);
-        switch ((u32) addr) {
-        case IOP3XX_PCI_LOWER_IO_VA ... IOP3XX_PCI_UPPER_IO_VA:
-        case IOP3XX_PERIPHERAL_VIRT_BASE ... IOP3XX_PERIPHERAL_UPPER_VA:
-                goto skip;
-        }
-        __iounmap(addr);
-skip:
-        return;
-}
-EXPORT_SYMBOL(__iop3xx_iounmap);
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 568dd0223d1..cbfbbe46178 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -18,7 +18,6 @@
 #include <linux/time.h>
 #include <linux/init.h>
 #include <linux/timex.h>
-#include <linux/sched.h>
 #include <linux/io.h>
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
@@ -52,21 +51,12 @@ static struct clocksource iop_clocksource = {
        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
-static DEFINE_CLOCK_DATA(cd);
 /*
 * IOP sched_clock() implementation via its clocksource.
 */
-unsigned long long notrace sched_clock(void)
+static u32 notrace iop_read_sched_clock(void)
 {
-        u32 cyc = 0xffffffffu - read_tcr1();
+        return 0xffffffffu - read_tcr1();
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-static void notrace iop_update_sched_clock(void)
-{
-        u32 cyc = 0xffffffffu - read_tcr1();
-        update_sched_clock(&cd, cyc, (u32)~0);
 }
 /*
@@ -152,7 +142,7 @@ void __init iop_init_time(unsigned long tick_rate)
 {
        u32 timer_ctl;
-        init_sched_clock(&cd, iop_update_sched_clock, 32, tick_rate);
+        setup_sched_clock(iop_read_sched_clock, 32, tick_rate);
        ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ);
        iop_tick_rate = tick_rate;
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index b3a1f2b3ada..b30708e28c1 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -20,6 +20,7 @@ config ARCH_IMX_V6_V7
        bool "i.MX3, i.MX6"
        select AUTO_ZRELADDR if !ZBOOT_ROM
        select ARM_PATCH_PHYS_VIRT
+        select MIGHT_HAVE_CACHE_L2X0
        help
          This enables support for systems based on the Freescale i.MX3 and i.MX6
          family.
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index b9f0f5f499a..076db84f3e3 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -5,7 +5,6 @@
 # Common support
 obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o
-obj-$(CONFIG_ARM_GIC) += gic.o
 obj-$(CONFIG_MXC_TZIC) += tzic.o
 obj-$(CONFIG_MXC_AVIC) += avic.o
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index adbff706ef6..73db34bf588 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -98,7 +98,7 @@ static int mxc_set_target(struct cpufreq_policy *policy,
        return ret;
 }
-static int __init mxc_cpufreq_init(struct cpufreq_policy *policy)
+static int mxc_cpufreq_init(struct cpufreq_policy *policy)
 {
        int ret;
        int i;
diff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c
deleted file mode 100644
index 12f8f810901..00000000000
--- a/arch/arm/plat-mxc/gic.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-#include <linux/io.h>
-#include <asm/exception.h>
-#include <asm/localtimer.h>
-#include <asm/hardware/gic.h>
-#ifdef CONFIG_SMP
-#include <asm/smp.h>
-#endif
-asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
-{
-        u32 irqstat, irqnr;
-        do {
-                irqstat = readl_relaxed(gic_cpu_base_addr + GIC_CPU_INTACK);
-                irqnr = irqstat & 0x3ff;
-                if (irqnr == 1023)
-                        break;
-                if (irqnr > 15 && irqnr < 1021)
-                        handle_IRQ(irqnr, regs);
-#ifdef CONFIG_SMP
-                else {
-                        writel_relaxed(irqstat, gic_cpu_base_addr +
-                                                GIC_CPU_EOI);
-                        handle_IPI(irqnr, regs);
-                }
-#endif
-        } while (1);
-}
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 18e5065df3c..83cca9bcfc9 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -89,7 +89,6 @@ extern void imx_print_silicon_rev(const char *cpu, int srev);
 void avic_handle_irq(struct pt_regs *);
 void tzic_handle_irq(struct pt_regs *);
-void gic_handle_irq(struct pt_regs *);
 #define imx1_handle_irq avic_handle_irq
 #define imx21_handle_irq avic_handle_irq
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index ca5cf26a04b..def5d30cb67 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -9,19 +9,8 @@
 * published by the Free Software Foundation.
 */
-/* Unused, we use CONFIG_MULTI_IRQ_HANDLER */
        .macro  disable_fiq
        .endm
-        .macro  get_irqnr_preamble, base, tmp
-        .endm
        .macro  arch_ret_to_user, tmp1, tmp2
        .endm
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        .endm
-        .macro test_for_ipi, irqnr, irqstat, base, tmp
-        .endm
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index 97b19e7800b..2b7c08d13e8 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -12,8 +12,6 @@
 #ifndef __MACH_MX1_H__
 #define __MACH_MX1_H__
-#include <mach/vmalloc.h>
 /*
 * Memory map
 */
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index 88fd4045256..477971b0093 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -98,6 +98,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
        case MACH_TYPE_PCM043:
        case MACH_TYPE_LILLY1131:
        case MACH_TYPE_VPR200:
+        case MACH_TYPE_EUKREA_CPUIMX35SD:
                uart_base = MX3X_UART1_BASE_ADDR;
                break;
        case MACH_TYPE_MAGX_ZN5:
diff --git a/arch/arm/plat-mxc/include/mach/vmalloc.h b/arch/arm/plat-mxc/include/mach/vmalloc.h
deleted file mode 100644
index ef6379c474b..00000000000
--- a/arch/arm/plat-mxc/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- *  Copyright (C) 2000 Russell King.
- *  Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __ASM_ARCH_MXC_VMALLOC_H__
-#define __ASM_ARCH_MXC_VMALLOC_H__
-/* vmalloc ending address */
-#define VMALLOC_END       0xf4000000UL
-#endif /* __ASM_ARCH_MXC_VMALLOC_H__ */
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 845de59f07e..e032717f7d0 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -77,6 +77,15 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
                do_div(c, period_ns);
                duty_cycles = c;
+                /*
+                 * according to imx pwm RM, the real period value should be
+                 * PERIOD value in PWMPR plus 2.
+                 */
+                if (period_cycles > 2)
+                        period_cycles -= 2;
+                else
+                        period_cycles = 0;
                writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
                writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 4b0fe285e83..1c96cdb4c35 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -108,18 +108,9 @@ static void gpt_irq_acknowledge(void)
 static void __iomem *sched_clock_reg;
-static DEFINE_CLOCK_DATA(cd);
+static u32 notrace mxc_read_sched_clock(void)
-unsigned long long notrace sched_clock(void)
 {
-        cycle_t cyc = sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
+        return sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-static void notrace mxc_update_sched_clock(void)
-{
-        cycle_t cyc = sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
-        update_sched_clock(&cd, cyc, (u32)~0);
 }
 static int __init mxc_clocksource_init(struct clk *timer_clk)
@@ -129,7 +120,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk)
        sched_clock_reg = reg;
-        init_sched_clock(&cd, mxc_update_sched_clock, 32, c);
+        setup_sched_clock(mxc_read_sched_clock, 32, c);
        return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32,
                        clocksource_mmio_readl_up);
 }
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index 30b6433d910..ad1b45b605a 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -17,7 +17,6 @@
 #include <linux/clk.h>
 #include <linux/jiffies.h>
 #include <linux/err.h>
-#include <linux/sched.h>
 #include <asm/mach/time.h>
 #include <asm/sched_clock.h>
@@ -79,23 +78,12 @@ void __iomem *mtu_base; /* Assigned by machine code */
 * local implementation which uses the clocksource to get some
 * better resolution when scheduling the kernel.
 */
-static DEFINE_CLOCK_DATA(cd);
+static u32 notrace nomadik_read_sched_clock(void)
-unsigned long long notrace sched_clock(void)
 {
-        u32 cyc;
        if (unlikely(!mtu_base))
                return 0;
-        cyc = -readl(mtu_base + MTU_VAL(0));
+        return -readl(mtu_base + MTU_VAL(0));
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-static void notrace nomadik_update_sched_clock(void)
-{
-        u32 cyc = -readl(mtu_base + MTU_VAL(0));
-        update_sched_clock(&cd, cyc, (u32)~0);
 }
 #endif
@@ -231,9 +219,11 @@ void __init nmdk_timer_init(void)
                        rate, 200, 32, clocksource_mmio_readl_down))
                pr_err("timer: failed to initialize clock source %s\n",
                       "mtu_0");
 #ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
-        init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate);
+        setup_sched_clock(nomadik_read_sched_clock, 32, rate);
 #endif
        /* Timer 1 is used for events */
        clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE);
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 985262242f2..3df04d944e4 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -4,7 +4,7 @@
 # Common support
 obj-y := common.o sram.o clock.o devices.o dma.o mux.o \
-         usb.o fb.o io.o counter_32k.o
+         usb.o fb.o counter_32k.o
 obj-m :=
 obj-n :=
 obj-  :=
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index d9f10a31e60..2ee6341fffd 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -14,6 +14,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/dma-mapping.h>
 #include <linux/omapfb.h>
 #include <plat/common.h>
@@ -66,3 +67,10 @@ void __init omap_reserve(void)
        omap_vram_reserve_sdram_memblock();
        omap_dsp_reserve_sdram_memblock();
 }
+void __init omap_init_consistent_dma_size(void)
+{
+#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE
+        init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20);
+#endif
+}
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index a6cbb712da5..5f0f2292b7f 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -17,7 +17,6 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
-#include <linux/sched.h>
 #include <linux/clocksource.h>
 #include <asm/sched_clock.h>
@@ -37,41 +36,9 @@ static void __iomem *timer_32k_base;
 #define OMAP16XX_TIMER_32K_SYNCHRONIZED         0xfffbc410
-/*
+static u32 notrace omap_32k_read_sched_clock(void)
- * Returns current time from boot in nsecs. It's OK for this to wrap
- * around for now, as it's just a relative time stamp.
- */
-static DEFINE_CLOCK_DATA(cd);
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 32768, NSEC_PER_SEC, 60).
- * This gives a resolution of about 30us and a wrap period of about 36hrs.
- */
-#define SC_MULT         4000000000u
-#define SC_SHIFT        17
-static inline unsigned long long notrace _omap_32k_sched_clock(void)
-{
-        u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
-        return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
-}
-#if defined(CONFIG_OMAP_32K_TIMER) && !defined(CONFIG_OMAP_MPU_TIMER)
-unsigned long long notrace sched_clock(void)
-{
-        return _omap_32k_sched_clock();
-}
-#else
-unsigned long long notrace omap_32k_sched_clock(void)
-{
-        return _omap_32k_sched_clock();
-}
-#endif
-static void notrace omap_update_sched_clock(void)
 {
-        u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
+        return timer_32k_base ? __raw_readl(timer_32k_base) : 0;
-        update_sched_clock(&cd, cyc, (u32)~0);
 }
 /**
@@ -147,8 +114,7 @@ int __init omap_init_clocksource_32k(void)
                                          clocksource_mmio_readl_up))
                        printk(err, "32k_counter");
-                init_fixed_sched_clock(&cd, omap_update_sched_clock, 32,
+                setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
-                                       32768, SC_MULT, SC_SHIFT);
        }
        return 0;
 }
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 257f9770b2d..b4d7ec3fbfb 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -31,7 +31,6 @@
 #include <plat/omap_hwmod.h>
 extern int __init omap_init_clocksource_32k(void);
-extern unsigned long long notrace omap_32k_sched_clock(void);
 extern void omap_reserve(void);
 extern int omap_dss_reset(struct omap_hwmod *);
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index 62f4477666c..1234944a4da 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -247,8 +247,6 @@
 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
 */
-void omap_ioremap_init(void);
 extern u8 omap_readb(u32 pa);
 extern u16 omap_readw(u32 pa);
 extern u32 omap_readl(u32 pa);
@@ -260,12 +258,6 @@ struct omap_sdrc_params;
 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
                                      struct omap_sdrc_params *sdrc_cs1);
-#define __arch_ioremap  omap_ioremap
-#define __arch_iounmap  omap_iounmap
-void __iomem *omap_ioremap(unsigned long phys, size_t size, unsigned int type);
-void omap_iounmap(volatile void __iomem *addr);
 extern void __init omap_init_consistent_dma_size(void);
 #endif
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index d3a9fcd53c4..ebda7382c65 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -436,10 +436,6 @@
 #define INTCPS_NR_MIR_REGS      3
 #define INTCPS_NR_IRQS          96
-#ifndef __ASSEMBLY__
-extern void __iomem *omap_irq_base;
-#endif
 #include <mach/hardware.h>
 #ifdef CONFIG_FIQ
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
deleted file mode 100644
index 333871f5999..00000000000
--- a/arch/arm/plat-omap/io.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * Common io.c file
- * This file is created by Russell King <rmk+kernel@arm.linux.org.uk>
- *
- * Copyright (C) 2009 Texas Instruments
- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/module.h>
-#include <linux/io.h>
-#include <linux/mm.h>
-#include <linux/dma-mapping.h>
-#include <plat/omap7xx.h>
-#include <plat/omap1510.h>
-#include <plat/omap16xx.h>
-#include <plat/omap24xx.h>
-#include <plat/omap34xx.h>
-#include <plat/omap44xx.h>
-#define BETWEEN(p,st,sz)        ((p) >= (st) && (p) < ((st) + (sz)))
-#define XLATE(p,pst,vst)        ((void __iomem *)((p) - (pst) + (vst)))
-static int initialized;
-/*
- * Intercept ioremap() requests for addresses in our fixed mapping regions.
- */
-void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
-{
-        WARN(!initialized, "Do not use ioremap before init_early\n");
-#ifdef CONFIG_ARCH_OMAP1
-        if (cpu_class_is_omap1()) {
-                if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE))
-                        return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT);
-        }
-        if (cpu_is_omap7xx()) {
-                if (BETWEEN(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_SIZE))
-                        return XLATE(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_START);
-                if (BETWEEN(p, OMAP7XX_DSPREG_BASE, OMAP7XX_DSPREG_SIZE))
-                        return XLATE(p, OMAP7XX_DSPREG_BASE,
-                                        OMAP7XX_DSPREG_START);
-        }
-        if (cpu_is_omap15xx()) {
-                if (BETWEEN(p, OMAP1510_DSP_BASE, OMAP1510_DSP_SIZE))
-                        return XLATE(p, OMAP1510_DSP_BASE, OMAP1510_DSP_START);
-                if (BETWEEN(p, OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_SIZE))
-                        return XLATE(p, OMAP1510_DSPREG_BASE,
-                                        OMAP1510_DSPREG_START);
-        }
-        if (cpu_is_omap16xx()) {
-                if (BETWEEN(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_SIZE))
-                        return XLATE(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_START);
-                if (BETWEEN(p, OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_SIZE))
-                        return XLATE(p, OMAP16XX_DSPREG_BASE,
-                                        OMAP16XX_DSPREG_START);
-        }
-#endif
-#ifdef CONFIG_ARCH_OMAP2
-        if (cpu_is_omap24xx()) {
-                if (BETWEEN(p, L3_24XX_PHYS, L3_24XX_SIZE))
-                        return XLATE(p, L3_24XX_PHYS, L3_24XX_VIRT);
-                if (BETWEEN(p, L4_24XX_PHYS, L4_24XX_SIZE))
-                        return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT);
-        }
-        if (cpu_is_omap2420()) {
-                if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE))
-                        return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT);
-                if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE))
-                        return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE);
-                if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE))
-                        return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT);
-        }
-        if (cpu_is_omap2430()) {
-                if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE))
-                        return XLATE(p, L4_WK_243X_PHYS, L4_WK_243X_VIRT);
-                if (BETWEEN(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_SIZE))
-                        return XLATE(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_VIRT);
-                if (BETWEEN(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_SIZE))
-                        return XLATE(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_VIRT);
-                if (BETWEEN(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_SIZE))
-                        return XLATE(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_VIRT);
-        }
-#endif
-#ifdef CONFIG_ARCH_OMAP3
-        if (cpu_is_ti816x()) {
-                if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
-                        return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
-        } else if (cpu_is_omap34xx()) {
-                if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE))
-                        return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT);
-                if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
-                        return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
-                if (BETWEEN(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_SIZE))
-                        return XLATE(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_VIRT);
-                if (BETWEEN(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_SIZE))
-                        return XLATE(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_VIRT);
-                if (BETWEEN(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_SIZE))
-                        return XLATE(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_VIRT);
-                if (BETWEEN(p, L4_PER_34XX_PHYS, L4_PER_34XX_SIZE))
-                        return XLATE(p, L4_PER_34XX_PHYS, L4_PER_34XX_VIRT);
-                if (BETWEEN(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_SIZE))
-                        return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT);
-        }
-#endif
-#ifdef CONFIG_ARCH_OMAP4
-        if (cpu_is_omap44xx()) {
-                if (BETWEEN(p, L3_44XX_PHYS, L3_44XX_SIZE))
-                        return XLATE(p, L3_44XX_PHYS, L3_44XX_VIRT);
-                if (BETWEEN(p, L4_44XX_PHYS, L4_44XX_SIZE))
-                        return XLATE(p, L4_44XX_PHYS, L4_44XX_VIRT);
-                if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE))
-                        return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT);
-                if (BETWEEN(p, OMAP44XX_EMIF1_PHYS, OMAP44XX_EMIF1_SIZE))
-                        return XLATE(p, OMAP44XX_EMIF1_PHYS,            \
-                                                        OMAP44XX_EMIF1_VIRT);
-                if (BETWEEN(p, OMAP44XX_EMIF2_PHYS, OMAP44XX_EMIF2_SIZE))
-                        return XLATE(p, OMAP44XX_EMIF2_PHYS,            \
-                                                        OMAP44XX_EMIF2_VIRT);
-                if (BETWEEN(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_SIZE))
-                        return XLATE(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_VIRT);
-                if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE))
-                        return XLATE(p, L4_PER_44XX_PHYS, L4_PER_44XX_VIRT);
-                if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE))
-                        return XLATE(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_VIRT);
-        }
-#endif
-        return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
-}
-EXPORT_SYMBOL(omap_ioremap);
-void omap_iounmap(volatile void __iomem *addr)
-{
-        unsigned long virt = (unsigned long)addr;
-        if (virt >= VMALLOC_START && virt < VMALLOC_END)
-                __iounmap(addr);
-}
-EXPORT_SYMBOL(omap_iounmap);
-void __init omap_init_consistent_dma_size(void)
-{
-#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE
-        init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20);
-#endif
-}
-void __init omap_ioremap_init(void)
-{
-        initialized++;
-}
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 41ab97ebe4c..10d16088813 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -384,12 +384,16 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
        struct orion_gpio_chip *ochip;
        struct irq_chip_generic *gc;
        struct irq_chip_type *ct;
+        char gc_label[16];
        if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips))
                return;
+        snprintf(gc_label, sizeof(gc_label), "orion_gpio%d",
+                orion_gpio_chip_count);
        ochip = orion_gpio_chips + orion_gpio_chip_count;
-        ochip->chip.label = "orion_gpio";
+        ochip->chip.label = kstrdup(gc_label, GFP_KERNEL);
        ochip->chip.request = orion_gpio_request;
        ochip->chip.direction_input = orion_gpio_direction_input;
        ochip->chip.get = orion_gpio_get;
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 69a61367e4b..1ed8d1397fc 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -12,7 +12,6 @@
 */
 #include <linux/kernel.h>
-#include <linux/sched.h>
 #include <linux/timer.h>
 #include <linux/clockchips.h>
 #include <linux/interrupt.h>
@@ -60,24 +59,10 @@ static u32 ticks_per_jiffy;
 * Orion's sched_clock implementation. It has a resolution of
 * at least 7.5ns (133MHz TCLK).
 */
-static DEFINE_CLOCK_DATA(cd);
-unsigned long long notrace sched_clock(void)
+static u32 notrace orion_read_sched_clock(void)
 {
-        u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF);
+        return ~readl(timer_base + TIMER0_VAL_OFF);
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-static void notrace orion_update_sched_clock(void)
-{
-        u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF);
-        update_sched_clock(&cd, cyc, (u32)~0);
-}
-static void __init setup_sched_clock(unsigned long tclk)
-{
-        init_sched_clock(&cd, orion_update_sched_clock, 32, tclk);
 }
 /*
@@ -217,7 +202,7 @@ orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask,
        /*
         * Set scale and timer for sched_clock.
         */
-        setup_sched_clock(tclk);
+        setup_sched_clock(orion_read_sched_clock, 32, tclk);
        /*
         * Setup free-running clocksource timer (interrupts
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 9b9968fa869..8167ce66188 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -11,6 +11,7 @@ config PLAT_S5P
        default y
        select ARM_VIC if !ARCH_EXYNOS4
        select ARM_GIC if ARCH_EXYNOS4
+        select GIC_NON_BANKED if ARCH_EXYNOS4
        select NO_IOPORT
        select ARCH_REQUIRE_GPIOLIB
        select S3C_GPIO_TRACK
diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-s5p/s5p-time.c
index c833e7b5759..17c0a2c58df 100644
--- a/arch/arm/plat-s5p/s5p-time.c
+++ b/arch/arm/plat-s5p/s5p-time.c
@@ -10,7 +10,6 @@
 * published by the Free Software Foundation.
 */
-#include <linux/sched.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/err.h>
@@ -321,26 +320,14 @@ static void __iomem *s5p_timer_reg(void)
 * this wraps around for now, since it is just a relative time
 * stamp. (Inspired by U300 implementation.)
 */
-static DEFINE_CLOCK_DATA(cd);
+static u32 notrace s5p_read_sched_clock(void)
-unsigned long long notrace sched_clock(void)
 {
        void __iomem *reg = s5p_timer_reg();
        if (!reg)
                return 0;
-        return cyc_to_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
+        return ~__raw_readl(reg);
-}
-static void notrace s5p_update_sched_clock(void)
-{
-        void __iomem *reg = s5p_timer_reg();
-        if (!reg)
-                return;
-        update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
 }
 static void __init s5p_clocksource_init(void)
@@ -358,7 +345,7 @@ static void __init s5p_clocksource_init(void)
        s5p_time_setup(timer_source.source_id, TCNT_MAX);
        s5p_time_start(timer_source.source_id, PERIODIC);
-        init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
+        setup_sched_clock(s5p_read_sched_clock, 32, clock_rate);
        if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
                        clock_rate, 250, 32, clocksource_mmio_readl_down))
diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
index dac4760c0f0..95509d8eb14 100644
--- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
@@ -202,14 +202,6 @@ extern int s3c_plltab_register(struct cpufreq_frequency_table *plls,
 extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void);
 extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void);
-extern void s3c2410_iotiming_debugfs(struct seq_file *seq,
-                                     struct s3c_cpufreq_config *cfg,
-                                     union s3c_iobank *iob);
-extern void s3c2412_iotiming_debugfs(struct seq_file *seq,
-                                     struct s3c_cpufreq_config *cfg,
-                                     union s3c_iobank *iob);
 #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS
 #define s3c_cpufreq_debugfs_call(x) x
 #else
@@ -226,6 +218,10 @@ extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg);
 extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg);
 #ifdef CONFIG_S3C2410_IOTIMING
+extern void s3c2410_iotiming_debugfs(struct seq_file *seq,
+                                     struct s3c_cpufreq_config *cfg,
+                                     union s3c_iobank *iob);
 extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg,
                                 struct s3c_iotimings *iot);
@@ -235,6 +231,7 @@ extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg,
 extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
                                 struct s3c_iotimings *iot);
 #else
+#define s3c2410_iotiming_debugfs NULL
 #define s3c2410_iotiming_calc NULL
 #define s3c2410_iotiming_get NULL
 #define s3c2410_iotiming_set NULL
@@ -242,8 +239,10 @@ extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
 /* S3C2412 compatible routines */
-extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg,
+#ifdef CONFIG_S3C2412_IOTIMING
-                                struct s3c_iotimings *timings);
+extern void s3c2412_iotiming_debugfs(struct seq_file *seq,
+                                     struct s3c_cpufreq_config *cfg,
+                                     union s3c_iobank *iob);
 extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg,
                                struct s3c_iotimings *timings);
@@ -253,6 +252,12 @@ extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg,
 extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg,
                                 struct s3c_iotimings *iot);
+#else
+#define s3c2412_iotiming_debugfs NULL
+#define s3c2412_iotiming_calc NULL
+#define s3c2412_iotiming_get NULL
+#define s3c2412_iotiming_set NULL
+#endif /* CONFIG_S3C2412_IOTIMING */
 #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG
 #define s3c_freq_dbg(x...) printk(KERN_INFO x)
diff --git a/arch/arm/plat-spear/include/plat/vmalloc.h b/arch/arm/plat-spear/include/plat/vmalloc.h
deleted file mode 100644
index 8c8b24d0704..00000000000
--- a/arch/arm/plat-spear/include/plat/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/plat-spear/include/plat/vmalloc.h
- *
- * Defining Vmalloc area for SPEAr platform
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#ifndef __PLAT_VMALLOC_H
-#define __PLAT_VMALLOC_H
-#define VMALLOC_END             0xF0000000UL
-#endif /* __PLAT_VMALLOC_H */
diff --git a/arch/arm/plat-versatile/sched-clock.c b/arch/arm/plat-versatile/sched-clock.c
index 3d6a4c292ca..b33b74c8723 100644
--- a/arch/arm/plat-versatile/sched-clock.c
+++ b/arch/arm/plat-versatile/sched-clock.c
@@ -18,41 +18,24 @@
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
+#include <linux/kernel.h>
 #include <linux/io.h>
-#include <linux/sched.h>
 #include <asm/sched_clock.h>
 #include <plat/sched_clock.h>
-static DEFINE_CLOCK_DATA(cd);
 static void __iomem *ctr;
-/*
+static u32 notrace versatile_read_sched_clock(void)
- * Constants generated by clocks_calc_mult_shift(m, s, 24MHz, NSEC_PER_SEC, 60).
- * This gives a resolution of about 41ns and a wrap period of about 178s.
- */
-#define SC_MULT         2796202667u
-#define SC_SHIFT        26
-unsigned long long notrace sched_clock(void)
 {
-        if (ctr) {
+        if (ctr)
-                u32 cyc = readl(ctr);
+                return readl(ctr);
-                return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0,
-                                                SC_MULT, SC_SHIFT);
-        } else
-                return 0;
-}
-static void notrace versatile_update_sched_clock(void)
+        return 0;
-{
-        u32 cyc = readl(ctr);
-        update_sched_clock(&cd, cyc, (u32)~0);
 }
 void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate)
 {
        ctr = reg;
-        init_fixed_sched_clock(&cd, versatile_update_sched_clock,
+        setup_sched_clock(versatile_read_sched_clock, 32, rate);
-                               32, rate, SC_MULT, SC_SHIFT);
 }
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index ccbe16f4722..f9c9f33f8cb 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -16,7 +16,7 @@
 # are merged into mainline or have been edited in the machine database
 # within the last 12 months.  References to machine_is_NAME() do not count!
 #
-# Last update: Sat May 7 08:48:24 2011
+# Last update: Tue Dec 6 11:07:38 2011
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -269,7 +269,7 @@ dns323			MACH_DNS323		DNS323			1542
 omap3_beagle            MACH_OMAP3_BEAGLE       OMAP3_BEAGLE            1546
 nokia_n810              MACH_NOKIA_N810         NOKIA_N810              1548
 pcm038                  MACH_PCM038             PCM038                  1551
-ts_x09                  MACH_TS209              TS209                   1565
+ts209                   MACH_TS209              TS209                   1565
 at91cap9adk             MACH_AT91CAP9ADK        AT91CAP9ADK             1566
 mx31moboard             MACH_MX31MOBOARD        MX31MOBOARD             1574
 vision_ep9307           MACH_VISION_EP9307      VISION_EP9307           1578
@@ -321,7 +321,6 @@ lb88rc8480		MACH_LB88RC8480		LB88RC8480		1769
 mx25_3ds                MACH_MX25_3DS           MX25_3DS                1771
 omap3530_lv_som         MACH_OMAP3530_LV_SOM    OMAP3530_LV_SOM         1773
 davinci_da830_evm       MACH_DAVINCI_DA830_EVM  DAVINCI_DA830_EVM       1781
-at572d940hfek           MACH_AT572D940HFEB      AT572D940HFEB           1783
 dove_db                 MACH_DOVE_DB            DOVE_DB                 1788
 overo                   MACH_OVERO              OVERO                   1798
 at2440evb               MACH_AT2440EVB          AT2440EVB               1799
@@ -459,7 +458,7 @@ guruplug		MACH_GURUPLUG		GURUPLUG		2659
 spear310                MACH_SPEAR310           SPEAR310                2660
 spear320                MACH_SPEAR320           SPEAR320                2661
 aquila                  MACH_AQUILA             AQUILA                  2676
-sheeva_esata            MACH_ESATA_SHEEVAPLUG   ESATA_SHEEVAPLUG        2678
+esata_sheevaplug        MACH_ESATA_SHEEVAPLUG   ESATA_SHEEVAPLUG        2678
 msm7x30_surf            MACH_MSM7X30_SURF       MSM7X30_SURF            2679
 ea2478devkit            MACH_EA2478DEVKIT       EA2478DEVKIT            2683
 terastation_wxl         MACH_TERASTATION_WXL    TERASTATION_WXL         2697
@@ -491,380 +490,53 @@ eukrea_cpuimx35sd	MACH_EUKREA_CPUIMX35SD	EUKREA_CPUIMX35SD	2821
 eukrea_cpuimx51sd       MACH_EUKREA_CPUIMX51SD  EUKREA_CPUIMX51SD       2822
 eukrea_cpuimx51         MACH_EUKREA_CPUIMX51    EUKREA_CPUIMX51         2823
 smdkc210                MACH_SMDKC210           SMDKC210                2838
-omap3_braillo           MACH_OMAP3_BRAILLO      OMAP3_BRAILLO           2839
-spyplug                 MACH_SPYPLUG            SPYPLUG                 2840
-ginger                  MACH_GINGER             GINGER                  2841
-tny_t3530               MACH_TNY_T3530          TNY_T3530               2842
 pca102                  MACH_PCA102             PCA102                  2843
-spade                   MACH_SPADE              SPADE                   2844
-mxc25_topaz             MACH_MXC25_TOPAZ        MXC25_TOPAZ             2845
 t5325                   MACH_T5325              T5325                   2846
-gw2361                  MACH_GW2361             GW2361                  2847
-elog                    MACH_ELOG               ELOG                    2848
 income                  MACH_INCOME             INCOME                  2849
-bcm589x                 MACH_BCM589X            BCM589X                 2850
-etna                    MACH_ETNA               ETNA                    2851
-hawks                   MACH_HAWKS              HAWKS                   2852
-meson                   MACH_MESON              MESON                   2853
-xsbase255               MACH_XSBASE255          XSBASE255               2854
-pvm2030                 MACH_PVM2030            PVM2030                 2855
-mioa502                 MACH_MIOA502            MIOA502                 2856
 vvbox_sdorig2           MACH_VVBOX_SDORIG2      VVBOX_SDORIG2           2857
 vvbox_sdlite2           MACH_VVBOX_SDLITE2      VVBOX_SDLITE2           2858
 vvbox_sdpro4            MACH_VVBOX_SDPRO4       VVBOX_SDPRO4            2859
-htc_spv_m700            MACH_HTC_SPV_M700       HTC_SPV_M700            2860
 mx257sx                 MACH_MX257SX            MX257SX                 2861
 goni                    MACH_GONI               GONI                    2862
-msm8x55_svlte_ffa       MACH_MSM8X55_SVLTE_FFA  MSM8X55_SVLTE_FFA       2863
-msm8x55_svlte_surf      MACH_MSM8X55_SVLTE_SURF MSM8X55_SVLTE_SURF      2864
-quickstep               MACH_QUICKSTEP          QUICKSTEP               2865
-dmw96                   MACH_DMW96              DMW96                   2866
-hammerhead              MACH_HAMMERHEAD         HAMMERHEAD              2867
-trident                 MACH_TRIDENT            TRIDENT                 2868
-lightning               MACH_LIGHTNING          LIGHTNING               2869
-iconnect                MACH_ICONNECT           ICONNECT                2870
-autobot                 MACH_AUTOBOT            AUTOBOT                 2871
-coconut                 MACH_COCONUT            COCONUT                 2872
-durian                  MACH_DURIAN             DURIAN                  2873
-cayenne                 MACH_CAYENNE            CAYENNE                 2874
-fuji                    MACH_FUJI               FUJI                    2875
-synology_6282           MACH_SYNOLOGY_6282      SYNOLOGY_6282           2876
-em1sy                   MACH_EM1SY              EM1SY                   2877
-m502                    MACH_M502               M502                    2878
-matrix518               MACH_MATRIX518          MATRIX518               2879
-tiny_gurnard            MACH_TINY_GURNARD       TINY_GURNARD            2880
-spear1310               MACH_SPEAR1310          SPEAR1310               2881
 bv07                    MACH_BV07               BV07                    2882
-mxt_td61                MACH_MXT_TD61           MXT_TD61                2883
 openrd_ultimate         MACH_OPENRD_ULTIMATE    OPENRD_ULTIMATE         2884
 devixp                  MACH_DEVIXP             DEVIXP                  2885
 miccpt                  MACH_MICCPT             MICCPT                  2886
 mic256                  MACH_MIC256             MIC256                  2887
-as1167                  MACH_AS1167             AS1167                  2888
-omap3_ibiza             MACH_OMAP3_IBIZA        OMAP3_IBIZA             2889
 u5500                   MACH_U5500              U5500                   2890
-davinci_picto           MACH_DAVINCI_PICTO      DAVINCI_PICTO           2891
-mecha                   MACH_MECHA              MECHA                   2892
-bubba3                  MACH_BUBBA3             BUBBA3                  2893
-pupitre                 MACH_PUPITRE            PUPITRE                 2894
-tegra_vogue             MACH_TEGRA_VOGUE        TEGRA_VOGUE             2896
-tegra_e1165             MACH_TEGRA_E1165        TEGRA_E1165             2897
-simplenet               MACH_SIMPLENET          SIMPLENET               2898
-ec4350tbm               MACH_EC4350TBM          EC4350TBM               2899
-pec_tc                  MACH_PEC_TC             PEC_TC                  2900
-pec_hc2                 MACH_PEC_HC2            PEC_HC2                 2901
-esl_mobilis_a           MACH_ESL_MOBILIS_A      ESL_MOBILIS_A           2902
-esl_mobilis_b           MACH_ESL_MOBILIS_B      ESL_MOBILIS_B           2903
-esl_wave_a              MACH_ESL_WAVE_A         ESL_WAVE_A              2904
-esl_wave_b              MACH_ESL_WAVE_B         ESL_WAVE_B              2905
-unisense_mmm            MACH_UNISENSE_MMM       UNISENSE_MMM            2906
-blueshark               MACH_BLUESHARK          BLUESHARK               2907
-e10                     MACH_E10                E10                     2908
-app3k_robin             MACH_APP3K_ROBIN        APP3K_ROBIN             2909
-pov15hd                 MACH_POV15HD            POV15HD                 2910
-stella                  MACH_STELLA             STELLA                  2911
 linkstation_lschl       MACH_LINKSTATION_LSCHL  LINKSTATION_LSCHL       2913
-netwalker               MACH_NETWALKER          NETWALKER               2914
-acsx106                 MACH_ACSX106            ACSX106                 2915
-atlas5_c1               MACH_ATLAS5_C1          ATLAS5_C1               2916
-nsb3ast                 MACH_NSB3AST            NSB3AST                 2917
-gnet_slc                MACH_GNET_SLC           GNET_SLC                2918
-af4000                  MACH_AF4000             AF4000                  2919
-ark9431                 MACH_ARK9431            ARK9431                 2920
-fs_s5pc100              MACH_FS_S5PC100         FS_S5PC100              2921
-omap3505nova8           MACH_OMAP3505NOVA8      OMAP3505NOVA8           2922
-omap3621_edp1           MACH_OMAP3621_EDP1      OMAP3621_EDP1           2923
-oratisaes               MACH_ORATISAES          ORATISAES               2924
 smdkv310                MACH_SMDKV310           SMDKV310                2925
-siemens_l0              MACH_SIEMENS_L0         SIEMENS_L0              2926
-ventana                 MACH_VENTANA            VENTANA                 2927
 wm8505_7in_netbook      MACH_WM8505_7IN_NETBOOK WM8505_7IN_NETBOOK      2928
-ec4350sdb               MACH_EC4350SDB          EC4350SDB               2929
-mimas                   MACH_MIMAS              MIMAS                   2930
-titan                   MACH_TITAN              TITAN                   2931
 craneboard              MACH_CRANEBOARD         CRANEBOARD              2932
-es2440                  MACH_ES2440             ES2440                  2933
-najay_a9263             MACH_NAJAY_A9263        NAJAY_A9263             2934
-htctornado              MACH_HTCTORNADO         HTCTORNADO              2935
-dimm_mx257              MACH_DIMM_MX257         DIMM_MX257              2936
-jigen301                MACH_JIGEN              JIGEN                   2937
 smdk6450                MACH_SMDK6450           SMDK6450                2938
-meno_qng                MACH_MENO_QNG           MENO_QNG                2939
-ns2416                  MACH_NS2416             NS2416                  2940
-rpc353                  MACH_RPC353             RPC353                  2941
-tq6410                  MACH_TQ6410             TQ6410                  2942
-sky6410                 MACH_SKY6410            SKY6410                 2943
-dynasty                 MACH_DYNASTY            DYNASTY                 2944
-vivo                    MACH_VIVO               VIVO                    2945
-bury_bl7582             MACH_BURY_BL7582        BURY_BL7582             2946
-bury_bps5270            MACH_BURY_BPS5270       BURY_BPS5270            2947
-basi                    MACH_BASI               BASI                    2948
-tn200                   MACH_TN200              TN200                   2949
-c2mmi                   MACH_C2MMI              C2MMI                   2950
-meson_6236m             MACH_MESON_6236M        MESON_6236M             2951
-meson_8626m             MACH_MESON_8626M        MESON_8626M             2952
-tube                    MACH_TUBE               TUBE                    2953
-messina                 MACH_MESSINA            MESSINA                 2954
-mx50_arm2               MACH_MX50_ARM2          MX50_ARM2               2955
-cetus9263               MACH_CETUS9263          CETUS9263               2956
 brownstone              MACH_BROWNSTONE         BROWNSTONE              2957
-vmx25                   MACH_VMX25              VMX25                   2958
-vmx51                   MACH_VMX51              VMX51                   2959
-abacus                  MACH_ABACUS             ABACUS                  2960
-cm4745                  MACH_CM4745             CM4745                  2961
-oratislink              MACH_ORATISLINK         ORATISLINK              2962
-davinci_dm365_dvr       MACH_DAVINCI_DM365_DVR  DAVINCI_DM365_DVR       2963
-netviz                  MACH_NETVIZ             NETVIZ                  2964
 flexibity               MACH_FLEXIBITY          FLEXIBITY               2965
-wlan_computer           MACH_WLAN_COMPUTER      WLAN_COMPUTER           2966
-lpc24xx                 MACH_LPC24XX            LPC24XX                 2967
-spica                   MACH_SPICA              SPICA                   2968
-gpsdisplay              MACH_GPSDISPLAY         GPSDISPLAY              2969
-bipnet                  MACH_BIPNET             BIPNET                  2970
-overo_ctu_inertial      MACH_OVERO_CTU_INERTIAL OVERO_CTU_INERTIAL      2971
-davinci_dm355_mmm       MACH_DAVINCI_DM355_MMM  DAVINCI_DM355_MMM       2972
-pc9260_v2               MACH_PC9260_V2          PC9260_V2               2973
-ptx7545                 MACH_PTX7545            PTX7545                 2974
-tm_efdc                 MACH_TM_EFDC            TM_EFDC                 2975
-omap3_waldo1            MACH_OMAP3_WALDO1       OMAP3_WALDO1            2977
-flyer                   MACH_FLYER              FLYER                   2978
-tornado3240             MACH_TORNADO3240        TORNADO3240             2979
-soli_01                 MACH_SOLI_01            SOLI_01                 2980
-omapl138_europalc       MACH_OMAPL138_EUROPALC  OMAPL138_EUROPALC       2981
-helios_v1               MACH_HELIOS_V1          HELIOS_V1               2982
-netspace_lite_v2        MACH_NETSPACE_LITE_V2   NETSPACE_LITE_V2        2983
-ssc                     MACH_SSC                SSC                     2984
-premierwave_en          MACH_PREMIERWAVE_EN     PREMIERWAVE_EN          2985
-wasabi                  MACH_WASABI             WASABI                  2986
 mx50_rdp                MACH_MX50_RDP           MX50_RDP                2988
 universal_c210          MACH_UNIVERSAL_C210     UNIVERSAL_C210          2989
 real6410                MACH_REAL6410           REAL6410                2990
-spx_sakura              MACH_SPX_SAKURA         SPX_SAKURA              2991
-ij3k_2440               MACH_IJ3K_2440          IJ3K_2440               2992
-omap3_bc10              MACH_OMAP3_BC10         OMAP3_BC10              2993
-thebe                   MACH_THEBE              THEBE                   2994
-rv082                   MACH_RV082              RV082                   2995
-armlguest               MACH_ARMLGUEST          ARMLGUEST               2996
-tjinc1000               MACH_TJINC1000          TJINC1000               2997
 dockstar                MACH_DOCKSTAR           DOCKSTAR                2998
-ax8008                  MACH_AX8008             AX8008                  2999
-gnet_sgce               MACH_GNET_SGCE          GNET_SGCE               3000
-pxwnas_500_1000         MACH_PXWNAS_500_1000    PXWNAS_500_1000         3001
-ea20                    MACH_EA20               EA20                    3002
-awm2                    MACH_AWM2               AWM2                    3003
 ti8148evm               MACH_TI8148EVM          TI8148EVM               3004
 seaboard                MACH_SEABOARD           SEABOARD                3005
-linkstation_chlv2       MACH_LINKSTATION_CHLV2  LINKSTATION_CHLV2       3006
-tera_pro2_rack          MACH_TERA_PRO2_RACK     TERA_PRO2_RACK          3007
-rubys                   MACH_RUBYS              RUBYS                   3008
-aquarius                MACH_AQUARIUS           AQUARIUS                3009
 mx53_ard                MACH_MX53_ARD           MX53_ARD                3010
 mx53_smd                MACH_MX53_SMD           MX53_SMD                3011
-lswxl                   MACH_LSWXL              LSWXL                   3012
-dove_avng_v3            MACH_DOVE_AVNG_V3       DOVE_AVNG_V3            3013
-sdi_ess_9263            MACH_SDI_ESS_9263       SDI_ESS_9263            3014
-jocpu550                MACH_JOCPU550           JOCPU550                3015
 msm8x60_rumi3           MACH_MSM8X60_RUMI3      MSM8X60_RUMI3           3016
 msm8x60_ffa             MACH_MSM8X60_FFA        MSM8X60_FFA             3017
-yanomami                MACH_YANOMAMI           YANOMAMI                3018
-gta04                   MACH_GTA04              GTA04                   3019
 cm_a510                 MACH_CM_A510            CM_A510                 3020
-omap3_rfs200            MACH_OMAP3_RFS200       OMAP3_RFS200            3021
-kx33xx                  MACH_KX33XX             KX33XX                  3022
-ptx7510                 MACH_PTX7510            PTX7510                 3023
-top9000                 MACH_TOP9000            TOP9000                 3024
-teenote                 MACH_TEENOTE            TEENOTE                 3025
-ts3                     MACH_TS3                TS3                     3026
-a0                      MACH_A0                 A0                      3027
-fsm9xxx_surf            MACH_FSM9XXX_SURF       FSM9XXX_SURF            3028
-fsm9xxx_ffa             MACH_FSM9XXX_FFA        FSM9XXX_FFA             3029
-frrhwcdma60w            MACH_FRRHWCDMA60W       FRRHWCDMA60W            3030
-remus                   MACH_REMUS              REMUS                   3031
-at91cap7xdk             MACH_AT91CAP7XDK        AT91CAP7XDK             3032
-at91cap7stk             MACH_AT91CAP7STK        AT91CAP7STK             3033
-kt_sbc_sam9_1           MACH_KT_SBC_SAM9_1      KT_SBC_SAM9_1           3034
-armada_xp_db            MACH_ARMADA_XP_DB       ARMADA_XP_DB            3036
-spdm                    MACH_SPDM               SPDM                    3037
-gtib                    MACH_GTIB               GTIB                    3038
-dgm3240                 MACH_DGM3240            DGM3240                 3039
-htcmega                 MACH_HTCMEGA            HTCMEGA                 3041
-tricorder               MACH_TRICORDER          TRICORDER               3042
 tx28                    MACH_TX28               TX28                    3043
-bstbrd                  MACH_BSTBRD             BSTBRD                  3044
-pwb3090                 MACH_PWB3090            PWB3090                 3045
-idea6410                MACH_IDEA6410           IDEA6410                3046
-qbc9263                 MACH_QBC9263            QBC9263                 3047
-borabora                MACH_BORABORA           BORABORA                3048
-valdez                  MACH_VALDEZ             VALDEZ                  3049
-ls9g20                  MACH_LS9G20             LS9G20                  3050
-mios_v1                 MACH_MIOS_V1            MIOS_V1                 3051
-s5pc110_crespo          MACH_S5PC110_CRESPO     S5PC110_CRESPO          3052
-controltek9g20          MACH_CONTROLTEK9G20     CONTROLTEK9G20          3053
-tin307                  MACH_TIN307             TIN307                  3054
-tin510                  MACH_TIN510             TIN510                  3055
-bluecheese              MACH_BLUECHEESE         BLUECHEESE              3057
-tem3x30                 MACH_TEM3X30            TEM3X30                 3058
-harvest_desoto          MACH_HARVEST_DESOTO     HARVEST_DESOTO          3059
-msm8x60_qrdc            MACH_MSM8X60_QRDC       MSM8X60_QRDC            3060
-spear900                MACH_SPEAR900           SPEAR900                3061
 pcontrol_g20            MACH_PCONTROL_G20       PCONTROL_G20            3062
-rdstor                  MACH_RDSTOR             RDSTOR                  3063
-usdloader               MACH_USDLOADER          USDLOADER               3064
-tsoploader              MACH_TSOPLOADER         TSOPLOADER              3065
-kronos                  MACH_KRONOS             KRONOS                  3066
-ffcore                  MACH_FFCORE             FFCORE                  3067
-mone                    MACH_MONE               MONE                    3068
-unit2s                  MACH_UNIT2S             UNIT2S                  3069
-acer_a5                 MACH_ACER_A5            ACER_A5                 3070
-etherpro_isp            MACH_ETHERPRO_ISP       ETHERPRO_ISP            3071
-stretchs7000            MACH_STRETCHS7000       STRETCHS7000            3072
-p87_smartsim            MACH_P87_SMARTSIM       P87_SMARTSIM            3073
-tulip                   MACH_TULIP              TULIP                   3074
-sunflower               MACH_SUNFLOWER          SUNFLOWER               3075
-rib                     MACH_RIB                RIB                     3076
-clod                    MACH_CLOD               CLOD                    3077
-rump                    MACH_RUMP               RUMP                    3078
-tenderloin              MACH_TENDERLOIN         TENDERLOIN              3079
-shortloin               MACH_SHORTLOIN          SHORTLOIN               3080
-antares                 MACH_ANTARES            ANTARES                 3082
-wb40n                   MACH_WB40N              WB40N                   3083
-herring                 MACH_HERRING            HERRING                 3084
-naxy400                 MACH_NAXY400            NAXY400                 3085
-naxy1200                MACH_NAXY1200           NAXY1200                3086
 vpr200                  MACH_VPR200             VPR200                  3087
-bug20                   MACH_BUG20              BUG20                   3088
-goflexnet               MACH_GOFLEXNET          GOFLEXNET               3089
 torbreck                MACH_TORBRECK           TORBRECK                3090
-saarb_mg1               MACH_SAARB_MG1          SAARB_MG1               3091
-callisto                MACH_CALLISTO           CALLISTO                3092
-multhsu                 MACH_MULTHSU            MULTHSU                 3093
-saluda                  MACH_SALUDA             SALUDA                  3094
-pemp_omap3_apollo       MACH_PEMP_OMAP3_APOLLO  PEMP_OMAP3_APOLLO       3095
-vc0718                  MACH_VC0718             VC0718                  3096
-mvblx                   MACH_MVBLX              MVBLX                   3097
-inhand_apeiron          MACH_INHAND_APEIRON     INHAND_APEIRON          3098
-inhand_fury             MACH_INHAND_FURY        INHAND_FURY             3099
-inhand_siren            MACH_INHAND_SIREN       INHAND_SIREN            3100
-hdnvp                   MACH_HDNVP              HDNVP                   3101
-softwinner              MACH_SOFTWINNER         SOFTWINNER              3102
 prima2_evb              MACH_PRIMA2_EVB         PRIMA2_EVB              3103
-nas6210                 MACH_NAS6210            NAS6210                 3104
-unisdev                 MACH_UNISDEV            UNISDEV                 3105
-sbca11                  MACH_SBCA11             SBCA11                  3106
-saga                    MACH_SAGA               SAGA                    3107
-ns_k330                 MACH_NS_K330            NS_K330                 3108
-tanna                   MACH_TANNA              TANNA                   3109
-imate8502               MACH_IMATE8502          IMATE8502               3110
-aspen                   MACH_ASPEN              ASPEN                   3111
-daintree_cwac           MACH_DAINTREE_CWAC      DAINTREE_CWAC           3112
-zmx25                   MACH_ZMX25              ZMX25                   3113
-maple1                  MACH_MAPLE1             MAPLE1                  3114
-qsd8x72_surf            MACH_QSD8X72_SURF       QSD8X72_SURF            3115
-qsd8x72_ffa             MACH_QSD8X72_FFA        QSD8X72_FFA             3116
-abilene                 MACH_ABILENE            ABILENE                 3117
-eigen_ttr               MACH_EIGEN_TTR          EIGEN_TTR               3118
-iomega_ix2_200          MACH_IOMEGA_IX2_200     IOMEGA_IX2_200          3119
-coretec_vcx7400         MACH_CORETEC_VCX7400    CORETEC_VCX7400         3120
-santiago                MACH_SANTIAGO           SANTIAGO                3121
-mx257sol                MACH_MX257SOL           MX257SOL                3122
-strasbourg              MACH_STRASBOURG         STRASBOURG              3123
-msm8x60_fluid           MACH_MSM8X60_FLUID      MSM8X60_FLUID           3124
-smartqv5                MACH_SMARTQV5           SMARTQV5                3125
-smartqv3                MACH_SMARTQV3           SMARTQV3                3126
-smartqv7                MACH_SMARTQV7           SMARTQV7                3127
 paz00                   MACH_PAZ00              PAZ00                   3128
 acmenetusfoxg20         MACH_ACMENETUSFOXG20    ACMENETUSFOXG20         3129
-fwbd_0404               MACH_FWBD_0404          FWBD_0404               3131
-hdgu                    MACH_HDGU               HDGU                    3132
-pyramid                 MACH_PYRAMID            PYRAMID                 3133
-epiphan                 MACH_EPIPHAN            EPIPHAN                 3134
-omap_bender             MACH_OMAP_BENDER        OMAP_BENDER             3135
-gurnard                 MACH_GURNARD            GURNARD                 3136
-gtl_it5100              MACH_GTL_IT5100         GTL_IT5100              3137
-bcm2708                 MACH_BCM2708            BCM2708                 3138
-mx51_ggc                MACH_MX51_GGC           MX51_GGC                3139
-sharespace              MACH_SHARESPACE         SHARESPACE              3140
-haba_knx_explorer       MACH_HABA_KNX_EXPLORER  HABA_KNX_EXPLORER       3141
-simtec_kirkmod          MACH_SIMTEC_KIRKMOD     SIMTEC_KIRKMOD          3142
-crux                    MACH_CRUX               CRUX                    3143
-mx51_bravo              MACH_MX51_BRAVO         MX51_BRAVO              3144
-charon                  MACH_CHARON             CHARON                  3145
-picocom3                MACH_PICOCOM3           PICOCOM3                3146
-picocom4                MACH_PICOCOM4           PICOCOM4                3147
-serrano                 MACH_SERRANO            SERRANO                 3148
-doubleshot              MACH_DOUBLESHOT         DOUBLESHOT              3149
-evsy                    MACH_EVSY               EVSY                    3150
-huashan                 MACH_HUASHAN            HUASHAN                 3151
-lausanne                MACH_LAUSANNE           LAUSANNE                3152
-emerald                 MACH_EMERALD            EMERALD                 3153
-tqma35                  MACH_TQMA35             TQMA35                  3154
-marvel                  MACH_MARVEL             MARVEL                  3155
-manuae                  MACH_MANUAE             MANUAE                  3156
-chacha                  MACH_CHACHA             CHACHA                  3157
-lemon                   MACH_LEMON              LEMON                   3158
-csc                     MACH_CSC                CSC                     3159
-gira_knxip_router       MACH_GIRA_KNXIP_ROUTER  GIRA_KNXIP_ROUTER       3160
-t20                     MACH_T20                T20                     3161
-hdmini                  MACH_HDMINI             HDMINI                  3162
-sciphone_g2             MACH_SCIPHONE_G2        SCIPHONE_G2             3163
-express                 MACH_EXPRESS            EXPRESS                 3164
-express_kt              MACH_EXPRESS_KT         EXPRESS_KT              3165
-maximasp                MACH_MAXIMASP           MAXIMASP                3166
-nitrogen_imx51          MACH_NITROGEN_IMX51     NITROGEN_IMX51          3167
-nitrogen_imx53          MACH_NITROGEN_IMX53     NITROGEN_IMX53          3168
-sunfire                 MACH_SUNFIRE            SUNFIRE                 3169
-arowana                 MACH_AROWANA            AROWANA                 3170
-tegra_daytona           MACH_TEGRA_DAYTONA      TEGRA_DAYTONA           3171
-tegra_swordfish         MACH_TEGRA_SWORDFISH    TEGRA_SWORDFISH         3172
-edison                  MACH_EDISON             EDISON                  3173
-svp8500v1               MACH_SVP8500V1          SVP8500V1               3174
-svp8500v2               MACH_SVP8500V2          SVP8500V2               3175
-svp5500                 MACH_SVP5500            SVP5500                 3176
-b5500                   MACH_B5500              B5500                   3177
-s5500                   MACH_S5500              S5500                   3178
-icon                    MACH_ICON               ICON                    3179
-elephant                MACH_ELEPHANT           ELEPHANT                3180
-shooter                 MACH_SHOOTER            SHOOTER                 3182
-spade_lte               MACH_SPADE_LTE          SPADE_LTE               3183
-philhwani               MACH_PHILHWANI          PHILHWANI               3184
-gsncomm                 MACH_GSNCOMM            GSNCOMM                 3185
-strasbourg_a2           MACH_STRASBOURG_A2      STRASBOURG_A2           3186
-mmm                     MACH_MMM                MMM                     3187
-davinci_dm365_bv        MACH_DAVINCI_DM365_BV   DAVINCI_DM365_BV        3188
 ag5evm                  MACH_AG5EVM             AG5EVM                  3189
-sc575plc                MACH_SC575PLC           SC575PLC                3190
-sc575hmi                MACH_SC575IPC           SC575IPC                3191
-omap3_tdm3730           MACH_OMAP3_TDM3730      OMAP3_TDM3730           3192
-top9000_eval            MACH_TOP9000_EVAL       TOP9000_EVAL            3194
-top9000_su              MACH_TOP9000_SU         TOP9000_SU              3195
-utm300                  MACH_UTM300             UTM300                  3196
 tsunagi                 MACH_TSUNAGI            TSUNAGI                 3197
-ts75xx                  MACH_TS75XX             TS75XX                  3198
-ts47xx                  MACH_TS47XX             TS47XX                  3200
-da850_k5                MACH_DA850_K5           DA850_K5                3201
-ax502                   MACH_AX502              AX502                   3202
-igep0032                MACH_IGEP0032           IGEP0032                3203
-antero                  MACH_ANTERO             ANTERO                  3204
-synergy                 MACH_SYNERGY            SYNERGY                 3205
 ics_if_voip             MACH_ICS_IF_VOIP        ICS_IF_VOIP             3206
 wlf_cragg_6410          MACH_WLF_CRAGG_6410     WLF_CRAGG_6410          3207
-punica                  MACH_PUNICA             PUNICA                  3208
 trimslice               MACH_TRIMSLICE          TRIMSLICE               3209
-mx27_wmultra            MACH_MX27_WMULTRA       MX27_WMULTRA            3210
 mackerel                MACH_MACKEREL           MACKEREL                3211
-fa9x27                  MACH_FA9X27             FA9X27                  3213
-ns2816tb                MACH_NS2816TB           NS2816TB                3214
-ns2816_ntpad            MACH_NS2816_NTPAD       NS2816_NTPAD            3215
-ns2816_ntnb             MACH_NS2816_NTNB        NS2816_NTNB             3216
 kaen                    MACH_KAEN               KAEN                    3217
-nv1000                  MACH_NV1000             NV1000                  3218
-nuc950ts                MACH_NUC950TS           NUC950TS                3219
 nokia_rm680             MACH_NOKIA_RM680        NOKIA_RM680             3220
-ast2200                 MACH_AST2200            AST2200                 3221
-lead                    MACH_LEAD               LEAD                    3222
-unino1                  MACH_UNINO1             UNINO1                  3223
-greeco                  MACH_GREECO             GREECO                  3224
-verdi                   MACH_VERDI              VERDI                   3225
 dm6446_adbox            MACH_DM6446_ADBOX       DM6446_ADBOX            3226
 quad_salsa              MACH_QUAD_SALSA         QUAD_SALSA              3227
 abb_gma_1_1             MACH_ABB_GMA_1_1        ABB_GMA_1_1             3228
@@ -949,13 +621,11 @@ koi			MACH_KOI		KOI			3312
 ts4800                  MACH_TS4800             TS4800                  3313
 tqma9263                MACH_TQMA9263           TQMA9263                3314
 holiday                 MACH_HOLIDAY            HOLIDAY                 3315
-dma_6410                MACH_DMA6410            DMA6410                 3316
 pcats_overlay           MACH_PCATS_OVERLAY      PCATS_OVERLAY           3317
 hwgw6410                MACH_HWGW6410           HWGW6410                3318
 shenzhou                MACH_SHENZHOU           SHENZHOU                3319
 cwme9210                MACH_CWME9210           CWME9210                3320
 cwme9210js              MACH_CWME9210JS         CWME9210JS              3321
-pgs_v1                  MACH_PGS_SITARA         PGS_SITARA              3322
 colibri_tegra2          MACH_COLIBRI_TEGRA2     COLIBRI_TEGRA2          3323
 w21                     MACH_W21                W21                     3324
 polysat1                MACH_POLYSAT1           POLYSAT1                3325
@@ -1021,13 +691,11 @@ viprinet		MACH_VIPRINET		VIPRINET		3385
 bockw                   MACH_BOCKW              BOCKW                   3386
 eva2000                 MACH_EVA2000            EVA2000                 3387
 steelyard               MACH_STEELYARD          STEELYARD               3388
-sdh001                  MACH_MACH_SDH001        MACH_SDH001             3390
 nsslsboard              MACH_NSSLSBOARD         NSSLSBOARD              3392
 geneva_b5               MACH_GENEVA_B5          GENEVA_B5               3393
 spear1340               MACH_SPEAR1340          SPEAR1340               3394
 rexmas                  MACH_REXMAS             REXMAS                  3395
 msm8960_cdp             MACH_MSM8960_CDP        MSM8960_CDP             3396
-msm8960_mdp             MACH_MSM8960_MDP        MSM8960_MDP             3397
 msm8960_fluid           MACH_MSM8960_FLUID      MSM8960_FLUID           3398
 msm8960_apq             MACH_MSM8960_APQ        MSM8960_APQ             3399
 helios_v2               MACH_HELIOS_V2          HELIOS_V2               3400
@@ -1123,6 +791,381 @@ blissc			MACH_BLISSC		BLISSC			3491
 thales_adc              MACH_THALES_ADC         THALES_ADC              3492
 ubisys_p9d_evp          MACH_UBISYS_P9D_EVP     UBISYS_P9D_EVP          3493
 atdgp318                MACH_ATDGP318           ATDGP318                3494
+dma210u                 MACH_DMA210U            DMA210U                 3495
+em_t3                   MACH_EM_T3              EM_T3                   3496
+htx3250                 MACH_HTX3250            HTX3250                 3497
+g50                     MACH_G50                G50                     3498
+eco5                    MACH_ECO5               ECO5                    3499
+wintergrasp             MACH_WINTERGRASP        WINTERGRASP             3500
+puro                    MACH_PURO               PURO                    3501
+shooter_k               MACH_SHOOTER_K          SHOOTER_K               3502
+nspire                  MACH_NSPIRE             NSPIRE                  3503
+mickxx                  MACH_MICKXX             MICKXX                  3504
+lxmb                    MACH_LXMB               LXMB                    3505
+adam                    MACH_ADAM               ADAM                    3507
+b1004                   MACH_B1004              B1004                   3508
+oboea                   MACH_OBOEA              OBOEA                   3509
+a1015                   MACH_A1015              A1015                   3510
+robin_vbdt30            MACH_ROBIN_VBDT30       ROBIN_VBDT30            3511
+tegra_enterprise        MACH_TEGRA_ENTERPRISE   TEGRA_ENTERPRISE        3512
+rfl108200_mk10          MACH_RFL108200_MK10     RFL108200_MK10          3513
+rfl108300_mk16          MACH_RFL108300_MK16     RFL108300_MK16          3514
+rover_v7                MACH_ROVER_V7           ROVER_V7                3515
+miphone                 MACH_MIPHONE            MIPHONE                 3516
+femtobts                MACH_FEMTOBTS           FEMTOBTS                3517
+monopoli                MACH_MONOPOLI           MONOPOLI                3518
+boss                    MACH_BOSS               BOSS                    3519
+davinci_dm368_vtam      MACH_DAVINCI_DM368_VTAM DAVINCI_DM368_VTAM      3520
+clcon                   MACH_CLCON              CLCON                   3521
+nokia_rm696             MACH_NOKIA_RM696        NOKIA_RM696             3522
+tahiti                  MACH_TAHITI             TAHITI                  3523
+fighter                 MACH_FIGHTER            FIGHTER                 3524
+sgh_i710                MACH_SGH_I710           SGH_I710                3525
+integreproscb           MACH_INTEGREPROSCB      INTEGREPROSCB           3526
+monza                   MACH_MONZA              MONZA                   3527
+calimain                MACH_CALIMAIN           CALIMAIN                3528
+mx6q_sabreauto          MACH_MX6Q_SABREAUTO     MX6Q_SABREAUTO          3529
+gma01x                  MACH_GMA01X             GMA01X                  3530
+sbc51                   MACH_SBC51              SBC51                   3531
+fit                     MACH_FIT                FIT                     3532
+steelhead               MACH_STEELHEAD          STEELHEAD               3533
+panther                 MACH_PANTHER            PANTHER                 3534
+msm8960_liquid          MACH_MSM8960_LIQUID     MSM8960_LIQUID          3535
+lexikonct               MACH_LEXIKONCT          LEXIKONCT               3536
+ns2816_stb              MACH_NS2816_STB         NS2816_STB              3537
+sei_mm2_lpc3250         MACH_SEI_MM2_LPC3250    SEI_MM2_LPC3250         3538
+cmimx53                 MACH_CMIMX53            CMIMX53                 3539
+sandwich                MACH_SANDWICH           SANDWICH                3540
+chief                   MACH_CHIEF              CHIEF                   3541
+pogo_e02                MACH_POGO_E02           POGO_E02                3542
+mikrap_x168             MACH_MIKRAP_X168        MIKRAP_X168             3543
+htcmozart               MACH_HTCMOZART          HTCMOZART               3544
+htcgold                 MACH_HTCGOLD            HTCGOLD                 3545
+mt72xx                  MACH_MT72XX             MT72XX                  3546
+mx51_ivy                MACH_MX51_IVY           MX51_IVY                3547
+mx51_lvd                MACH_MX51_LVD           MX51_LVD                3548
+omap3_wiser2            MACH_OMAP3_WISER2       OMAP3_WISER2            3549
+dreamplug               MACH_DREAMPLUG          DREAMPLUG               3550
+cobas_c_111             MACH_COBAS_C_111        COBAS_C_111             3551
+cobas_u_411             MACH_COBAS_U_411        COBAS_U_411             3552
+hssd                    MACH_HSSD               HSSD                    3553
+iom35x                  MACH_IOM35X             IOM35X                  3554
+psom_omap               MACH_PSOM_OMAP          PSOM_OMAP               3555
+iphone_2g               MACH_IPHONE_2G          IPHONE_2G               3556
+iphone_3g               MACH_IPHONE_3G          IPHONE_3G               3557
+ipod_touch_1g           MACH_IPOD_TOUCH_1G      IPOD_TOUCH_1G           3558
+pharos_tpc              MACH_PHAROS_TPC         PHAROS_TPC              3559
+mx53_hydra              MACH_MX53_HYDRA         MX53_HYDRA              3560
+ns2816_dev_board        MACH_NS2816_DEV_BOARD   NS2816_DEV_BOARD        3561
+iphone_3gs              MACH_IPHONE_3GS         IPHONE_3GS              3562
+iphone_4                MACH_IPHONE_4           IPHONE_4                3563
+ipod_touch_4g           MACH_IPOD_TOUCH_4G      IPOD_TOUCH_4G           3564
+dragon_e1100            MACH_DRAGON_E1100       DRAGON_E1100            3565
+topside                 MACH_TOPSIDE            TOPSIDE                 3566
+irisiii                 MACH_IRISIII            IRISIII                 3567
+deto_macarm9            MACH_DETO_MACARM9       DETO_MACARM9            3568
+eti_d1                  MACH_ETI_D1             ETI_D1                  3569
+som3530sdk              MACH_SOM3530SDK         SOM3530SDK              3570
+oc_engine               MACH_OC_ENGINE          OC_ENGINE               3571
+apq8064_sim             MACH_APQ8064_SIM        APQ8064_SIM             3572
+alps                    MACH_ALPS               ALPS                    3575
+tny_t3730               MACH_TNY_T3730          TNY_T3730               3576
+geryon_nfe              MACH_GERYON_NFE         GERYON_NFE              3577
+ns2816_ref_board        MACH_NS2816_REF_BOARD   NS2816_REF_BOARD        3578
+silverstone             MACH_SILVERSTONE        SILVERSTONE             3579
+mtt2440                 MACH_MTT2440            MTT2440                 3580
+ynicdb                  MACH_YNICDB             YNICDB                  3581
+bct                     MACH_BCT                BCT                     3582
+tuscan                  MACH_TUSCAN             TUSCAN                  3583
+xbt_sam9g45             MACH_XBT_SAM9G45        XBT_SAM9G45             3584
+enbw_cmc                MACH_ENBW_CMC           ENBW_CMC                3585
+ch104mx257              MACH_CH104MX257         CH104MX257              3587
+openpri                 MACH_OPENPRI            OPENPRI                 3588
+am335xevm               MACH_AM335XEVM          AM335XEVM               3589
+picodmb                 MACH_PICODMB            PICODMB                 3590
+waluigi                 MACH_WALUIGI            WALUIGI                 3591
+punicag7                MACH_PUNICAG7           PUNICAG7                3592
+ipad_1g                 MACH_IPAD_1G            IPAD_1G                 3593
+appletv_2g              MACH_APPLETV_2G         APPLETV_2G              3594
+mach_ecog45             MACH_MACH_ECOG45        MACH_ECOG45             3595
+ait_cam_enc_4xx         MACH_AIT_CAM_ENC_4XX    AIT_CAM_ENC_4XX         3596
+runnymede               MACH_RUNNYMEDE          RUNNYMEDE               3597
+play                    MACH_PLAY               PLAY                    3598
+hw90260                 MACH_HW90260            HW90260                 3599
+tagh                    MACH_TAGH               TAGH                    3600
+filbert                 MACH_FILBERT            FILBERT                 3601
+getinge_netcomv3        MACH_GETINGE_NETCOMV3   GETINGE_NETCOMV3        3602
+cw20                    MACH_CW20               CW20                    3603
+cinema                  MACH_CINEMA             CINEMA                  3604
+cinema_tea              MACH_CINEMA_TEA         CINEMA_TEA              3605
+cinema_coffee           MACH_CINEMA_COFFEE      CINEMA_COFFEE           3606
+cinema_juice            MACH_CINEMA_JUICE       CINEMA_JUICE            3607
+mx53_mirage2            MACH_MX53_MIRAGE2       MX53_MIRAGE2            3609
+mx53_efikasb            MACH_MX53_EFIKASB       MX53_EFIKASB            3610
+stm_b2000               MACH_STM_B2000          STM_B2000               3612
 m28evk                  MACH_M28EVK             M28EVK                  3613
+pda                     MACH_PDA                PDA                     3614
+meraki_mr58             MACH_MERAKI_MR58        MERAKI_MR58             3615
+kota2                   MACH_KOTA2              KOTA2                   3616
+letcool                 MACH_LETCOOL            LETCOOL                 3617
+mx27iat                 MACH_MX27IAT            MX27IAT                 3618
+apollo_td               MACH_APOLLO_TD          APOLLO_TD               3619
+arena                   MACH_ARENA              ARENA                   3620
+gsngateway              MACH_GSNGATEWAY         GSNGATEWAY              3621
+lf2000                  MACH_LF2000             LF2000                  3622
+bonito                  MACH_BONITO             BONITO                  3623
+asymptote               MACH_ASYMPTOTE          ASYMPTOTE               3624
+bst2brd                 MACH_BST2BRD            BST2BRD                 3625
+tx335s                  MACH_TX335S             TX335S                  3626
+pelco_tesla             MACH_PELCO_TESLA        PELCO_TESLA             3627
+rrhtestplat             MACH_RRHTESTPLAT        RRHTESTPLAT             3628
+vidtonic_pro            MACH_VIDTONIC_PRO       VIDTONIC_PRO            3629
+pl_apollo               MACH_PL_APOLLO          PL_APOLLO               3630
+pl_phoenix              MACH_PL_PHOENIX         PL_PHOENIX              3631
+m28cu3                  MACH_M28CU3             M28CU3                  3632
+vvbox_hd                MACH_VVBOX_HD           VVBOX_HD                3633
+coreware_sam9260_       MACH_COREWARE_SAM9260_  COREWARE_SAM9260_       3634
+marmaduke               MACH_MARMADUKE          MARMADUKE               3635
+amg_xlcore_camera       MACH_AMG_XLCORE_CAMERA  AMG_XLCORE_CAMERA       3636
+omap3_egf               MACH_OMAP3_EGF          OMAP3_EGF               3637
 smdk4212                MACH_SMDK4212           SMDK4212                3638
+dnp9200                 MACH_DNP9200            DNP9200                 3639
+tf101                   MACH_TF101              TF101                   3640
+omap3silvio             MACH_OMAP3SILVIO        OMAP3SILVIO             3641
+picasso2                MACH_PICASSO2           PICASSO2                3642
+vangogh2                MACH_VANGOGH2           VANGOGH2                3643
+olpc_xo_1_75            MACH_OLPC_XO_1_75       OLPC_XO_1_75            3644
+gx400                   MACH_GX400              GX400                   3645
+gs300                   MACH_GS300              GS300                   3646
+acer_a9                 MACH_ACER_A9            ACER_A9                 3647
+vivow_evm               MACH_VIVOW_EVM          VIVOW_EVM               3648
+veloce_cxq              MACH_VELOCE_CXQ         VELOCE_CXQ              3649
+veloce_cxm              MACH_VELOCE_CXM         VELOCE_CXM              3650
+p1852                   MACH_P1852              P1852                   3651
+naxy100                 MACH_NAXY100            NAXY100                 3652
+taishan                 MACH_TAISHAN            TAISHAN                 3653
+touchlink               MACH_TOUCHLINK          TOUCHLINK               3654
+stm32f103ze             MACH_STM32F103ZE        STM32F103ZE             3655
+mcx                     MACH_MCX                MCX                     3656
+stm_nmhdk_fli7610       MACH_STM_NMHDK_FLI7610  STM_NMHDK_FLI7610       3657
+top28x                  MACH_TOP28X             TOP28X                  3658
+okl4vp_microvisor       MACH_OKL4VP_MICROVISOR  OKL4VP_MICROVISOR       3659
+pop                     MACH_POP                POP                     3660
+layer                   MACH_LAYER              LAYER                   3661
+trondheim               MACH_TRONDHEIM          TRONDHEIM               3662
+eva                     MACH_EVA                EVA                     3663
+trust_taurus            MACH_TRUST_TAURUS       TRUST_TAURUS            3664
+ns2816_huashan          MACH_NS2816_HUASHAN     NS2816_HUASHAN          3665
+ns2816_yangcheng        MACH_NS2816_YANGCHENG   NS2816_YANGCHENG        3666
+p852                    MACH_P852               P852                    3667
+flea3                   MACH_FLEA3              FLEA3                   3668
+bowfin                  MACH_BOWFIN             BOWFIN                  3669
+mv88de3100              MACH_MV88DE3100         MV88DE3100              3670
+pia_am35x               MACH_PIA_AM35X          PIA_AM35X               3671
+cedar                   MACH_CEDAR              CEDAR                   3672
+picasso_e               MACH_PICASSO_E          PICASSO_E               3673
+samsung_e60             MACH_SAMSUNG_E60        SAMSUNG_E60             3674
+sdvr_mini               MACH_SDVR_MINI          SDVR_MINI               3676
+omap3_ij3k              MACH_OMAP3_IJ3K         OMAP3_IJ3K              3677
+modasmc1                MACH_MODASMC1           MODASMC1                3678
+apq8064_rumi3           MACH_APQ8064_RUMI3      APQ8064_RUMI3           3679
+matrix506               MACH_MATRIX506          MATRIX506               3680
+msm9615_mtp             MACH_MSM9615_MTP        MSM9615_MTP             3681
+dm36x_spawndc           MACH_DM36X_SPAWNDC      DM36X_SPAWNDC           3682
+sff792                  MACH_SFF792             SFF792                  3683
+am335xiaevm             MACH_AM335XIAEVM        AM335XIAEVM             3684
+g3c2440                 MACH_G3C2440            G3C2440                 3685
+tion270                 MACH_TION270            TION270                 3686
+w22q7arm02              MACH_W22Q7ARM02         W22Q7ARM02              3687
+omap_cat                MACH_OMAP_CAT           OMAP_CAT                3688
+at91sam9n12ek           MACH_AT91SAM9N12EK      AT91SAM9N12EK           3689
+morrison                MACH_MORRISON           MORRISON                3690
+svdu                    MACH_SVDU               SVDU                    3691
+lpp01                   MACH_LPP01              LPP01                   3692
+ubc283                  MACH_UBC283             UBC283                  3693
+zeppelin                MACH_ZEPPELIN           ZEPPELIN                3694
+motus                   MACH_MOTUS              MOTUS                   3695
+neomainboard            MACH_NEOMAINBOARD       NEOMAINBOARD            3696
+devkit3250              MACH_DEVKIT3250         DEVKIT3250              3697
+devkit7000              MACH_DEVKIT7000         DEVKIT7000              3698
+fmc_uic                 MACH_FMC_UIC            FMC_UIC                 3699
+fmc_dcm                 MACH_FMC_DCM            FMC_DCM                 3700
+batwm                   MACH_BATWM              BATWM                   3701
+atlas6cb                MACH_ATLAS6CB           ATLAS6CB                3702
+blue                    MACH_BLUE               BLUE                    3705
+colorado                MACH_COLORADO           COLORADO                3706
+popc                    MACH_POPC               POPC                    3707
+promwad_jade            MACH_PROMWAD_JADE       PROMWAD_JADE            3708
+amp                     MACH_AMP                AMP                     3709
+gnet_amp                MACH_GNET_AMP           GNET_AMP                3710
+toques                  MACH_TOQUES             TOQUES                  3711
+dct_storm               MACH_DCT_STORM          DCT_STORM               3713
+owl                     MACH_OWL                OWL                     3715
+cogent_csb1741          MACH_COGENT_CSB1741     COGENT_CSB1741          3716
+adillustra610           MACH_ADILLUSTRA610      ADILLUSTRA610           3718
+ecafe_na04              MACH_ECAFE_NA04         ECAFE_NA04              3719
+popct                   MACH_POPCT              POPCT                   3720
+omap3_helena            MACH_OMAP3_HELENA       OMAP3_HELENA            3721
+ach                     MACH_ACH                ACH                     3722
+module_dtb              MACH_MODULE_DTB         MODULE_DTB              3723
+oslo_elisabeth          MACH_OSLO_ELISABETH     OSLO_ELISABETH          3725
+tt01                    MACH_TT01               TT01                    3726
+msm8930_cdp             MACH_MSM8930_CDP        MSM8930_CDP             3727
+msm8930_mtp             MACH_MSM8930_MTP        MSM8930_MTP             3728
+msm8930_fluid           MACH_MSM8930_FLUID      MSM8930_FLUID           3729
+ltu11                   MACH_LTU11              LTU11                   3730
+am1808_spawnco          MACH_AM1808_SPAWNCO     AM1808_SPAWNCO          3731
+flx6410                 MACH_FLX6410            FLX6410                 3732
+mx6q_qsb                MACH_MX6Q_QSB           MX6Q_QSB                3733
+mx53_plt424             MACH_MX53_PLT424        MX53_PLT424             3734
+jasmine                 MACH_JASMINE            JASMINE                 3735
+l138_owlboard_plus      MACH_L138_OWLBOARD_PLUS L138_OWLBOARD_PLUS      3736
+wr21                    MACH_WR21               WR21                    3737
+peaboy                  MACH_PEABOY             PEABOY                  3739
+mx28_plato              MACH_MX28_PLATO         MX28_PLATO              3740
+kacom2                  MACH_KACOM2             KACOM2                  3741
+slco                    MACH_SLCO               SLCO                    3742
+imx51pico               MACH_IMX51PICO          IMX51PICO               3743
+glink1                  MACH_GLINK1             GLINK1                  3744
+diamond                 MACH_DIAMOND            DIAMOND                 3745
+d9000                   MACH_D9000              D9000                   3746
+w5300e01                MACH_W5300E01           W5300E01                3747
+im6000                  MACH_IM6000             IM6000                  3748
+mx51_fred51             MACH_MX51_FRED51        MX51_FRED51             3749
+stm32f2                 MACH_STM32F2            STM32F2                 3750
+ville                   MACH_VILLE              VILLE                   3751
+ptip_murnau             MACH_PTIP_MURNAU        PTIP_MURNAU             3752
+ptip_classic            MACH_PTIP_CLASSIC       PTIP_CLASSIC            3753
+mx53grb                 MACH_MX53GRB            MX53GRB                 3754
+gagarin                 MACH_GAGARIN            GAGARIN                 3755
+nas2big                 MACH_NAS2BIG            NAS2BIG                 3757
+superfemto              MACH_SUPERFEMTO         SUPERFEMTO              3758
+teufel                  MACH_TEUFEL             TEUFEL                  3759
+dinara                  MACH_DINARA             DINARA                  3760
+vanquish                MACH_VANQUISH           VANQUISH                3761
+zipabox1                MACH_ZIPABOX1           ZIPABOX1                3762
+u9540                   MACH_U9540              U9540                   3763
+jet                     MACH_JET                JET                     3764
 smdk4412                MACH_SMDK4412           SMDK4412                3765
+elite                   MACH_ELITE              ELITE                   3766
+spear320_hmi            MACH_SPEAR320_HMI       SPEAR320_HMI            3767
+ontario                 MACH_ONTARIO            ONTARIO                 3768
+mx6q_sabrelite          MACH_MX6Q_SABRELITE     MX6Q_SABRELITE          3769
+vc200                   MACH_VC200              VC200                   3770
+msm7625a_ffa            MACH_MSM7625A_FFA       MSM7625A_FFA            3771
+msm7625a_surf           MACH_MSM7625A_SURF      MSM7625A_SURF           3772
+benthossbp              MACH_BENTHOSSBP         BENTHOSSBP              3773
+smdk5210                MACH_SMDK5210           SMDK5210                3774
+empq2300                MACH_EMPQ2300           EMPQ2300                3775
+minipos                 MACH_MINIPOS            MINIPOS                 3776
+omap5_sevm              MACH_OMAP5_SEVM         OMAP5_SEVM              3777
+shelter                 MACH_SHELTER            SHELTER                 3778
+omap3_devkit8500        MACH_OMAP3_DEVKIT8500   OMAP3_DEVKIT8500        3779
+edgetd                  MACH_EDGETD             EDGETD                  3780
+copperyard              MACH_COPPERYARD         COPPERYARD              3781
+edge                    MACH_EDGE               EDGE                    3782
+edge_u                  MACH_EDGE_U             EDGE_U                  3783
+edge_td                 MACH_EDGE_TD            EDGE_TD                 3784
+wdss                    MACH_WDSS               WDSS                    3785
+dl_pb25                 MACH_DL_PB25            DL_PB25                 3786
+dss11                   MACH_DSS11              DSS11                   3787
+cpa                     MACH_CPA                CPA                     3788
+aptp2000                MACH_APTP2000           APTP2000                3789
+marzen                  MACH_MARZEN             MARZEN                  3790
+st_turbine              MACH_ST_TURBINE         ST_TURBINE              3791
+gtl_it3300              MACH_GTL_IT3300         GTL_IT3300              3792
+mx6_mule                MACH_MX6_MULE           MX6_MULE                3793
+v7pxa_dt                MACH_V7PXA_DT           V7PXA_DT                3794
+v7mmp_dt                MACH_V7MMP_DT           V7MMP_DT                3795
+dragon7                 MACH_DRAGON7            DRAGON7                 3796
+krome                   MACH_KROME              KROME                   3797
+oratisdante             MACH_ORATISDANTE        ORATISDANTE             3798
+fathom                  MACH_FATHOM             FATHOM                  3799
+dns325                  MACH_DNS325             DNS325                  3800
+sarnen                  MACH_SARNEN             SARNEN                  3801
+ubisys_g1               MACH_UBISYS_G1          UBISYS_G1               3802
+mx53_pf1                MACH_MX53_PF1           MX53_PF1                3803
+asanti                  MACH_ASANTI             ASANTI                  3804
+volta                   MACH_VOLTA              VOLTA                   3805
+knight                  MACH_KNIGHT             KNIGHT                  3807
+beaglebone              MACH_BEAGLEBONE         BEAGLEBONE              3808
+becker                  MACH_BECKER             BECKER                  3809
+fc360                   MACH_FC360              FC360                   3810
+pmi2_xls                MACH_PMI2_XLS           PMI2_XLS                3811
+taranto                 MACH_TARANTO            TARANTO                 3812
+plutux                  MACH_PLUTUX             PLUTUX                  3813
+ipmp_medcom             MACH_IPMP_MEDCOM        IPMP_MEDCOM             3814
+absolut                 MACH_ABSOLUT            ABSOLUT                 3815
+awpb3                   MACH_AWPB3              AWPB3                   3816
+nfp32xx_dt              MACH_NFP32XX_DT         NFP32XX_DT              3817
+dl_pb53                 MACH_DL_PB53            DL_PB53                 3818
+acu_ii                  MACH_ACU_II             ACU_II                  3819
+avalon                  MACH_AVALON             AVALON                  3820
+sphinx                  MACH_SPHINX             SPHINX                  3821
+titan_t                 MACH_TITAN_T            TITAN_T                 3822
+harvest_boris           MACH_HARVEST_BORIS      HARVEST_BORIS           3823
+mach_msm7x30_m3s        MACH_MACH_MSM7X30_M3S   MACH_MSM7X30_M3S        3824
+smdk5250                MACH_SMDK5250           SMDK5250                3825
+imxt_lite               MACH_IMXT_LITE          IMXT_LITE               3826
+imxt_std                MACH_IMXT_STD           IMXT_STD                3827
+imxt_log                MACH_IMXT_LOG           IMXT_LOG                3828
+imxt_nav                MACH_IMXT_NAV           IMXT_NAV                3829
+imxt_full               MACH_IMXT_FULL          IMXT_FULL               3830
+ag09015                 MACH_AG09015            AG09015                 3831
+am3517_mt_ventoux       MACH_AM3517_MT_VENTOUX  AM3517_MT_VENTOUX       3832
+dp1arm9                 MACH_DP1ARM9            DP1ARM9                 3833
+picasso_m               MACH_PICASSO_M          PICASSO_M               3834
+video_gadget            MACH_VIDEO_GADGET       VIDEO_GADGET            3835
+mtt_om3x                MACH_MTT_OM3X           MTT_OM3X                3836
+mx6q_arm2               MACH_MX6Q_ARM2          MX6Q_ARM2               3837
+picosam9g45             MACH_PICOSAM9G45        PICOSAM9G45             3838
+vpm_dm365               MACH_VPM_DM365          VPM_DM365               3839
+bonfire                 MACH_BONFIRE            BONFIRE                 3840
+mt2p2d                  MACH_MT2P2D             MT2P2D                  3841
+sigpda01                MACH_SIGPDA01           SIGPDA01                3842
+cn27                    MACH_CN27               CN27                    3843
+mx25_cwtap              MACH_MX25_CWTAP         MX25_CWTAP              3844
+apf28                   MACH_APF28              APF28                   3845
+pelco_maxwell           MACH_PELCO_MAXWELL      PELCO_MAXWELL           3846
+ge_phoenix              MACH_GE_PHOENIX         GE_PHOENIX              3847
+empc_a500               MACH_EMPC_A500          EMPC_A500               3848
+ims_arm9                MACH_IMS_ARM9           IMS_ARM9                3849
+mini2416                MACH_MINI2416           MINI2416                3850
+mini2450                MACH_MINI2450           MINI2450                3851
+mini310                 MACH_MINI310            MINI310                 3852
+spear_hurricane         MACH_SPEAR_HURRICANE    SPEAR_HURRICANE         3853
+mt7208                  MACH_MT7208             MT7208                  3854
+lpc178x                 MACH_LPC178X            LPC178X                 3855
+farleys                 MACH_FARLEYS            FARLEYS                 3856
+efm32gg_dk3750          MACH_EFM32GG_DK3750     EFM32GG_DK3750          3857
+zeus_board              MACH_ZEUS_BOARD         ZEUS_BOARD              3858
+cc51                    MACH_CC51               CC51                    3859
+fxi_c210                MACH_FXI_C210           FXI_C210                3860
+msm8627_cdp             MACH_MSM8627_CDP        MSM8627_CDP             3861
+msm8627_mtp             MACH_MSM8627_MTP        MSM8627_MTP             3862
+armadillo800eva         MACH_ARMADILLO800EVA    ARMADILLO800EVA         3863
+primou                  MACH_PRIMOU             PRIMOU                  3864
+primoc                  MACH_PRIMOC             PRIMOC                  3865
+primoct                 MACH_PRIMOCT            PRIMOCT                 3866
+a9500                   MACH_A9500              A9500                   3867
+pluto                   MACH_PLUTO              PLUTO                   3869
+acfx100                 MACH_ACFX100            ACFX100                 3870
+msm8625_rumi3           MACH_MSM8625_RUMI3      MSM8625_RUMI3           3871
+valente                 MACH_VALENTE            VALENTE                 3872
+crfs_rfeye              MACH_CRFS_RFEYE         CRFS_RFEYE              3873
+rfeye                   MACH_RFEYE              RFEYE                   3874
+phidget_sbc3            MACH_PHIDGET_SBC3       PHIDGET_SBC3            3875
+tcw_mika                MACH_TCW_MIKA           TCW_MIKA                3876
+imx28_egf               MACH_IMX28_EGF          IMX28_EGF               3877
+valente_wx              MACH_VALENTE_WX         VALENTE_WX              3878
+huangshans              MACH_HUANGSHANS         HUANGSHANS              3879
+bosphorus1              MACH_BOSPHORUS1         BOSPHORUS1              3880
+prima                   MACH_PRIMA              PRIMA                   3881
+evita_ulk               MACH_EVITA_ULK          EVITA_ULK               3884
+merisc600               MACH_MERISC600          MERISC600               3885
+dolak                   MACH_DOLAK              DOLAK                   3886
+sbc53                   MACH_SBC53              SBC53                   3887
+elite_ulk               MACH_ELITE_ULK          ELITE_ULK               3888
+pov2                    MACH_POV2               POV2                    3889
+ipod_touch_2g           MACH_IPOD_TOUCH_2G      IPOD_TOUCH_2G           3890
+da850_pqab              MACH_DA850_PQAB         DA850_PQAB              3891
diff --git a/arch/ia64/include/asm/cputime.h b/arch/ia64/include/asm/cputime.h
index 6073b187528..5a274af31b2 100644
--- a/arch/ia64/include/asm/cputime.h
+++ b/arch/ia64/include/asm/cputime.h
@@ -60,6 +60,7 @@ typedef u64 cputime64_t;
 */
 #define cputime_to_usecs(__ct)          ((__ct) / NSEC_PER_USEC)
 #define usecs_to_cputime(__usecs)       ((__usecs) * NSEC_PER_USEC)
+#define usecs_to_cputime64(__usecs)     usecs_to_cputime(__usecs)
 /*
 * Convert cputime <-> seconds
diff --git a/arch/powerpc/include/asm/cputime.h b/arch/powerpc/include/asm/cputime.h
index 1cf20bdfbec..98b7c4b49c9 100644
--- a/arch/powerpc/include/asm/cputime.h
+++ b/arch/powerpc/include/asm/cputime.h
@@ -150,6 +150,8 @@ static inline cputime_t usecs_to_cputime(const unsigned long us)
        return ct;
 }
+#define usecs_to_cputime64(us)          usecs_to_cputime(us)
 /*
 * Convert cputime <-> seconds
 */
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index d4df013ad77..69c7377d207 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -381,39 +381,6 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
 }
 #endif
-static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
-                                             unsigned long pte_index)
-{
-        unsigned long rb, va_low;
-        rb = (v & ~0x7fUL) << 16;               /* AVA field */
-        va_low = pte_index >> 3;
-        if (v & HPTE_V_SECONDARY)
-                va_low = ~va_low;
-        /* xor vsid from AVA */
-        if (!(v & HPTE_V_1TB_SEG))
-                va_low ^= v >> 12;
-        else
-                va_low ^= v >> 24;
-        va_low &= 0x7ff;
-        if (v & HPTE_V_LARGE) {
-                rb |= 1;                        /* L field */
-                if (cpu_has_feature(CPU_FTR_ARCH_206) &&
-                    (r & 0xff000)) {
-                        /* non-16MB large page, must be 64k */
-                        /* (masks depend on page size) */
-                        rb |= 0x1000;           /* page encoding in LP field */
-                        rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
-                        rb |= (va_low & 0xfe);  /* AVAL field (P7 doesn't seem to care) */
-                }
-        } else {
-                /* 4kB page */
-                rb |= (va_low & 0x7ff) << 12;   /* remaining 11b of VA */
-        }
-        rb |= (v >> 54) & 0x300;                /* B field */
-        return rb;
-}
 /* Magic register values loaded into r3 and r4 before the 'sc' assembly
 * instruction for the OSI hypercalls */
 #define OSI_SC_MAGIC_R3                 0x113724FA
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h
index e43fe42b987..d0ac94f98f9 100644
--- a/arch/powerpc/include/asm/kvm_book3s_64.h
+++ b/arch/powerpc/include/asm/kvm_book3s_64.h
@@ -29,4 +29,37 @@ static inline struct kvmppc_book3s_shadow_vcpu *to_svcpu(struct kvm_vcpu *vcpu)
 #define SPAPR_TCE_SHIFT         12
+static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
+                                             unsigned long pte_index)
+{
+        unsigned long rb, va_low;
+        rb = (v & ~0x7fUL) << 16;               /* AVA field */
+        va_low = pte_index >> 3;
+        if (v & HPTE_V_SECONDARY)
+                va_low = ~va_low;
+        /* xor vsid from AVA */
+        if (!(v & HPTE_V_1TB_SEG))
+                va_low ^= v >> 12;
+        else
+                va_low ^= v >> 24;
+        va_low &= 0x7ff;
+        if (v & HPTE_V_LARGE) {
+                rb |= 1;                        /* L field */
+                if (cpu_has_feature(CPU_FTR_ARCH_206) &&
+                    (r & 0xff000)) {
+                        /* non-16MB large page, must be 64k */
+                        /* (masks depend on page size) */
+                        rb |= 0x1000;           /* page encoding in LP field */
+                        rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
+                        rb |= (va_low & 0xfe);  /* AVAL field (P7 doesn't seem to care) */
+                }
+        } else {
+                /* 4kB page */
+                rb |= (va_low & 0x7ff) << 12;   /* remaining 11b of VA */
+        }
+        rb |= (v >> 54) & 0x300;                /* B field */
+        return rb;
+}
 #endif /* __ASM_KVM_BOOK3S_64_H__ */
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 0cb137a9b03..336983da9e7 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -538,7 +538,7 @@ static void kvmppc_start_thread(struct kvm_vcpu *vcpu)
        tpaca->kvm_hstate.napping = 0;
        vcpu->cpu = vc->pcpu;
        smp_wmb();
-#ifdef CONFIG_PPC_ICP_NATIVE
+#if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP)
        if (vcpu->arch.ptid) {
                tpaca->cpu_start = 0x80;
                wmb();
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index 3c791e1eb67..e2cfb9e1e20 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -658,10 +658,12 @@ program_interrupt:
                        ulong cmd = kvmppc_get_gpr(vcpu, 3);
                        int i;
+#ifdef CONFIG_KVM_BOOK3S_64_PR
                        if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
                                r = RESUME_GUEST;
                                break;
                        }
+#endif
                        run->papr_hcall.nr = cmd;
                        for (i = 0; i < 9; ++i) {
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
index 26d20903f2b..8c0d45a6faf 100644
--- a/arch/powerpc/kvm/e500.c
+++ b/arch/powerpc/kvm/e500.c
@@ -15,6 +15,7 @@
 #include <linux/kvm_host.h>
 #include <linux/slab.h>
 #include <linux/err.h>
+#include <linux/export.h>
 #include <asm/reg.h>
 #include <asm/cputable.h>
diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h
index 08143487829..b9acaaa175d 100644
--- a/arch/s390/include/asm/cputime.h
+++ b/arch/s390/include/asm/cputime.h
@@ -87,6 +87,8 @@ usecs_to_cputime(const unsigned int m)
        return (cputime_t) m * 4096;
 }
+#define usecs_to_cputime64(m)           usecs_to_cputime(m)
 /*
 * Convert cputime to milliseconds and back.
 */
diff --git a/arch/sh/oprofile/common.c b/arch/sh/oprofile/common.c
index b4c2d2b946d..e4dd5d5a111 100644
--- a/arch/sh/oprofile/common.c
+++ b/arch/sh/oprofile/common.c
@@ -49,7 +49,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
        return oprofile_perf_init(ops);
 }
-void __exit oprofile_arch_exit(void)
+void oprofile_arch_exit(void)
 {
        oprofile_perf_exit();
        kfree(sh_pmu_op_name);
@@ -60,5 +60,5 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
        ops->backtrace = sh_backtrace;
        return -ENODEV;
 }
-void __exit oprofile_arch_exit(void) {}
+void oprofile_arch_exit(void) {}
 #endif /* CONFIG_HW_PERF_EVENTS */
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 8d601b18bf9..121f1be4da1 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1169,7 +1169,7 @@ again:
                 */
                c = &unconstrained;
        } else if (intel_try_alt_er(event, orig_idx)) {
-                raw_spin_unlock(&era->lock);
+                raw_spin_unlock_irqrestore(&era->lock, flags);
                goto again;
        }
        raw_spin_unlock_irqrestore(&era->lock, flags);
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index 76e3f1cd036..405f2620392 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -338,11 +338,15 @@ static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
                return HRTIMER_NORESTART;
 }
-static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period)
+static void create_pit_timer(struct kvm *kvm, u32 val, int is_period)
 {
+        struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
        struct kvm_timer *pt = &ps->pit_timer;
        s64 interval;
+        if (!irqchip_in_kernel(kvm))
+                return;
        interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
        pr_debug("create pit timer, interval is %llu nsec\n", interval);
@@ -394,13 +398,13 @@ static void pit_load_count(struct kvm *kvm, int channel, u32 val)
        /* FIXME: enhance mode 4 precision */
        case 4:
                if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) {
-                        create_pit_timer(ps, val, 0);
+                        create_pit_timer(kvm, val, 0);
                }
                break;
        case 2:
        case 3:
                if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){
-                        create_pit_timer(ps, val, 1);
+                        create_pit_timer(kvm, val, 1);
                }
                break;
        default:
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index c38efd7b792..4c938da2ba0 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -602,7 +602,6 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
 {
        struct kvm_cpuid_entry2 *best;
        struct kvm_lapic *apic = vcpu->arch.apic;
-        u32 timer_mode_mask;
        best = kvm_find_cpuid_entry(vcpu, 1, 0);
        if (!best)
@@ -615,15 +614,12 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
                        best->ecx |= bit(X86_FEATURE_OSXSAVE);
        }
-        if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
+        if (apic) {
-                best->function == 0x1) {
+                if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
-                best->ecx |= bit(X86_FEATURE_TSC_DEADLINE_TIMER);
+                        apic->lapic_timer.timer_mode_mask = 3 << 17;
-                timer_mode_mask = 3 << 17;
+                else
-        } else
+                        apic->lapic_timer.timer_mode_mask = 1 << 17;
-                timer_mode_mask = 1 << 17;
+        }
-        if (apic)
-                apic->lapic_timer.timer_mode_mask = timer_mode_mask;
 }
 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
@@ -2135,6 +2131,9 @@ int kvm_dev_ioctl_check_extension(long ext)
        case KVM_CAP_TSC_CONTROL:
                r = kvm_has_tsc_control;
                break;
+        case KVM_CAP_TSC_DEADLINE_TIMER:
+                r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
+                break;
        default:
                r = 0;
                break;
diff --git a/block/blk-map.c b/block/blk-map.c
index 164cd005970..623e1cd4cff 100644
--- a/block/blk-map.c
+++ b/block/blk-map.c
@@ -311,7 +311,7 @@ int blk_rq_map_kern(struct request_queue *q, struct request *rq, void *kbuf,
        if (IS_ERR(bio))
                return PTR_ERR(bio);
-        if (rq_data_dir(rq) == WRITE)
+        if (!reading)
                bio->bi_rw |= REQ_WRITE;
        if (do_copy)
diff --git a/block/blk-tag.c b/block/blk-tag.c
index e74d6d13838..4af6f5cc116 100644
--- a/block/blk-tag.c
+++ b/block/blk-tag.c
@@ -282,18 +282,9 @@ EXPORT_SYMBOL(blk_queue_resize_tags);
 void blk_queue_end_tag(struct request_queue *q, struct request *rq)
 {
        struct blk_queue_tag *bqt = q->queue_tags;
-        int tag = rq->tag;
+        unsigned tag = rq->tag; /* negative tags invalid */
-        BUG_ON(tag == -1);
+        BUG_ON(tag >= bqt->real_max_depth);
-        if (unlikely(tag >= bqt->max_depth)) {
-                /*
-                 * This can happen after tag depth has been reduced.
-                 * But tag shouldn't be larger than real_max_depth.
-                 */
-                WARN_ON(tag >= bqt->real_max_depth);
-                return;
-        }
        list_del_init(&rq->queuelist);
        rq->cmd_flags &= ~REQ_QUEUED;
diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c
index 4c12869fcf7..3548705b04e 100644
--- a/block/cfq-iosched.c
+++ b/block/cfq-iosched.c
@@ -1655,6 +1655,8 @@ cfq_merged_requests(struct request_queue *q, struct request *rq,
                    struct request *next)
 {
        struct cfq_queue *cfqq = RQ_CFQQ(rq);
+        struct cfq_data *cfqd = q->elevator->elevator_data;
        /*
         * reposition in fifo if next is older than rq
         */
@@ -1669,6 +1671,16 @@ cfq_merged_requests(struct request_queue *q, struct request *rq,
        cfq_remove_request(next);
        cfq_blkiocg_update_io_merged_stats(&(RQ_CFQG(rq))->blkg,
                                        rq_data_dir(next), rq_is_sync(next));
+        cfqq = RQ_CFQQ(next);
+        /*
+         * all requests of this queue are merged to other queues, delete it
+         * from the service tree. If it's the active_queue,
+         * cfq_dispatch_requests() will choose to expire it or do idle
+         */
+        if (cfq_cfqq_on_rr(cfqq) && RB_EMPTY_ROOT(&cfqq->sort_list) &&
+            cfqq != cfqd->active_queue)
+                cfq_del_cfqq_rr(cfqd, cfqq);
 }
 static int cfq_allow_merge(struct request_queue *q, struct request *rq,
diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c
index 59feefe0e3e..fb6b6d28b60 100644
--- a/drivers/clocksource/clksrc-dbx500-prcmu.c
+++ b/drivers/clocksource/clksrc-dbx500-prcmu.c
@@ -58,25 +58,15 @@ static struct clocksource clocksource_dbx500_prcmu = {
 };
 #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
-static DEFINE_CLOCK_DATA(cd);
-unsigned long long notrace sched_clock(void)
+static u32 notrace dbx500_prcmu_sched_clock_read(void)
 {
-        u32 cyc;
        if (unlikely(!clksrc_dbx500_timer_base))
                return 0;
-        cyc = clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu);
+        return clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu);
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
 }
-static void notrace clksrc_dbx500_prcmu_update_sched_clock(void)
-{
-        u32 cyc = clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu);
-        update_sched_clock(&cd, cyc, (u32)~0);
-}
 #endif
 void __init clksrc_dbx500_prcmu_init(void __iomem *base)
@@ -97,7 +87,7 @@ void __init clksrc_dbx500_prcmu_init(void __iomem *base)
                       clksrc_dbx500_timer_base + PRCMU_TIMER_REF);
        }
 #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
-        init_sched_clock(&cd, clksrc_dbx500_prcmu_update_sched_clock,
+        setup_sched_clock(dbx500_prcmu_sched_clock_read,
                         32, RATE_32K);
 #endif
        clocksource_calc_mult_shift(&clocksource_dbx500_prcmu,
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index ab8f469f5cf..5a99bb3f255 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -124,7 +124,7 @@ config MV_XOR
 config MX3_IPU
        bool "MX3x Image Processing Unit support"
-        depends on ARCH_MX3
+        depends on SOC_IMX31 || SOC_IMX35
        select DMA_ENGINE
        default y
        help
@@ -216,7 +216,7 @@ config PCH_DMA
 config IMX_SDMA
        tristate "i.MX SDMA support"
-        depends on ARCH_MX25 || ARCH_MX3 || ARCH_MX5
+        depends on ARCH_MX25 || SOC_IMX31 || SOC_IMX35 || ARCH_MX5
        select DMA_ENGINE
        help
          Support the i.MX SDMA engine. This engine is integrated into
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index c681dc149d2..b9da8900ae4 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -756,9 +756,9 @@ intel_enable_semaphores(struct drm_device *dev)
        if (i915_semaphores >= 0)
                return i915_semaphores;
-        /* Enable semaphores on SNB when IO remapping is off */
+        /* Disable semaphores on SNB */
        if (INTEL_INFO(dev)->gen == 6)
-                return !intel_iommu_enabled;
+                return 0;
        return 1;
 }
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d809b038ca8..daa5743ccbd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7922,13 +7922,11 @@ static bool intel_enable_rc6(struct drm_device *dev)
                return 0;
        /*
-         * Enable rc6 on Sandybridge if DMA remapping is disabled
+         * Disable rc6 on Sandybridge
         */
        if (INTEL_INFO(dev)->gen == 6) {
-                DRM_DEBUG_DRIVER("Sandybridge: intel_iommu_enabled %s -- RC6 %sabled\n",
+                DRM_DEBUG_DRIVER("Sandybridge: RC6 disabled\n");
-                                 intel_iommu_enabled ? "true" : "false",
+                return 0;
-                                 !intel_iommu_enabled ? "en" : "dis");
-                return !intel_iommu_enabled;
        }
        DRM_DEBUG_DRIVER("RC6 enabled\n");
        return 1;
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 5e00d1670aa..92c9628c572 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3276,6 +3276,18 @@ int evergreen_init(struct radeon_device *rdev)
                        rdev->accel_working = false;
                }
        }
+        /* Don't start up if the MC ucode is missing on BTC parts.
+         * The default clocks and voltages before the MC ucode
+         * is loaded are not suffient for advanced operations.
+         */
+        if (ASIC_IS_DCE5(rdev)) {
+                if (!rdev->mc_fw && !(rdev->flags & RADEON_IS_IGP)) {
+                        DRM_ERROR("radeon: MC ucode required for NI+.\n");
+                        return -EINVAL;
+                }
+        }
        return 0;
 }
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 8aa1dbb45c6..f94b33ae221 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -1093,7 +1093,6 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
        struct vmw_surface *surface = NULL;
        struct vmw_dma_buffer *bo = NULL;
        struct ttm_base_object *user_obj;
-        u64 required_size;
        int ret;
        /**
@@ -1102,8 +1101,9 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
         * requested framebuffer.
         */
-        required_size = mode_cmd->pitch * mode_cmd->height;
+        if (!vmw_kms_validate_mode_vram(dev_priv,
-        if (unlikely(required_size > (u64) dev_priv->vram_size)) {
+                                        mode_cmd->pitch,
+                                        mode_cmd->height)) {
                DRM_ERROR("VRAM size is too small for requested mode.\n");
                return ERR_PTR(-ENOMEM);
        }
diff --git a/drivers/input/mouse/sentelic.c b/drivers/input/mouse/sentelic.c
index c5b12d2e955..86d6f39178b 100644
--- a/drivers/input/mouse/sentelic.c
+++ b/drivers/input/mouse/sentelic.c
@@ -2,7 +2,7 @@
 * Finger Sensing Pad PS/2 mouse driver.
 *
 * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd.
- * Copyright (C) 2005-2010 Tai-hwa Liang, Sentelic Corporation.
+ * Copyright (C) 2005-2011 Tai-hwa Liang, Sentelic Corporation.
 *
 *   This program is free software; you can redistribute it and/or
 *   modify it under the terms of the GNU General Public License
@@ -162,7 +162,7 @@ static int fsp_reg_write(struct psmouse *psmouse, int reg_addr, int reg_val)
        ps2_sendbyte(ps2dev, v, FSP_CMD_TIMEOUT2);
        if (ps2_sendbyte(ps2dev, 0xf3, FSP_CMD_TIMEOUT) < 0)
-                return -1;
+                goto out;
        if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) {
                /* inversion is required */
@@ -261,7 +261,7 @@ static int fsp_page_reg_write(struct psmouse *psmouse, int reg_val)
        ps2_sendbyte(ps2dev, 0x88, FSP_CMD_TIMEOUT2);
        if (ps2_sendbyte(ps2dev, 0xf3, FSP_CMD_TIMEOUT) < 0)
-                return -1;
+                goto out;
        if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) {
                ps2_sendbyte(ps2dev, 0x47, FSP_CMD_TIMEOUT2);
@@ -309,7 +309,7 @@ static int fsp_get_buttons(struct psmouse *psmouse, int *btn)
        };
        int val;
-        if (fsp_reg_read(psmouse, FSP_REG_TMOD_STATUS1, &val) == -1)
+        if (fsp_reg_read(psmouse, FSP_REG_TMOD_STATUS, &val) == -1)
                return -EIO;
        *btn = buttons[(val & 0x30) >> 4];
diff --git a/drivers/input/mouse/sentelic.h b/drivers/input/mouse/sentelic.h
index ed1395ac7b8..2e4af24f8c1 100644
--- a/drivers/input/mouse/sentelic.h
+++ b/drivers/input/mouse/sentelic.h
@@ -2,7 +2,7 @@
 * Finger Sensing Pad PS/2 mouse driver.
 *
 * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd.
- * Copyright (C) 2005-2009 Tai-hwa Liang, Sentelic Corporation.
+ * Copyright (C) 2005-2011 Tai-hwa Liang, Sentelic Corporation.
 *
 *   This program is free software; you can redistribute it and/or
 *   modify it under the terms of the GNU General Public License
@@ -33,6 +33,7 @@
 /* Finger-sensing Pad control registers */
 #define FSP_REG_SYSCTL1         0x10
 #define FSP_BIT_EN_REG_CLK      BIT(5)
+#define FSP_REG_TMOD_STATUS     0x20
 #define FSP_REG_OPC_QDOWN       0x31
 #define FSP_BIT_EN_OPC_TAG      BIT(7)
 #define FSP_REG_OPTZ_XLO        0x34
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index 2fb2963df55..5b5fa5cdaa3 100644
--- a/drivers/iommu/iommu.c
+++ b/drivers/iommu/iommu.c
@@ -90,7 +90,7 @@ struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
        if (bus == NULL || bus->iommu_ops == NULL)
                return NULL;
-        domain = kmalloc(sizeof(*domain), GFP_KERNEL);
+        domain = kzalloc(sizeof(*domain), GFP_KERNEL);
        if (!domain)
                return NULL;
diff --git a/drivers/media/video/gspca/gspca.c b/drivers/media/video/gspca/gspca.c
index 881e04c7ffe..2ca10dfec91 100644
--- a/drivers/media/video/gspca/gspca.c
+++ b/drivers/media/video/gspca/gspca.c
@@ -838,13 +838,13 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)
        gspca_dev->usb_err = 0;
        /* do the specific subdriver stuff before endpoint selection */
-        gspca_dev->alt = 0;
+        intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface);
+        gspca_dev->alt = gspca_dev->cam.bulk ? intf->num_altsetting : 0;
        if (gspca_dev->sd_desc->isoc_init) {
                ret = gspca_dev->sd_desc->isoc_init(gspca_dev);
                if (ret < 0)
                        goto unlock;
        }
-        intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface);
        xfer = gspca_dev->cam.bulk ? USB_ENDPOINT_XFER_BULK
                                   : USB_ENDPOINT_XFER_ISOC;
@@ -957,7 +957,7 @@ retry:
                                ret = -EIO;
                                goto out;
                        }
-                        alt = ep_tb[--alt_idx].alt;
+                        gspca_dev->alt = ep_tb[--alt_idx].alt;
                }
        }
 out:
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 50b5f9926f6..0726e59fd41 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -675,7 +675,8 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
              unsigned int status)
 {
        /* First check for errors */
-        if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
+        if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_STARTBITERR|
+                      MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
                u32 remain, success;
                /* Terminate the DMA transfer */
@@ -754,8 +755,12 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
        }
        if (!cmd->data || cmd->error) {
-                if (host->data)
+                if (host->data) {
+                        /* Terminate the DMA transfer */
+                        if (dma_inprogress(host))
+                                mmci_dma_data_error(host);
                        mmci_stop_data(host);
+                }
                mmci_request_end(host, cmd->mrq);
        } else if (!(cmd->data->flags & MMC_DATA_READ)) {
                mmci_start_data(host, cmd->data);
@@ -955,8 +960,9 @@ static irqreturn_t mmci_irq(int irq, void *dev_id)
                dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status);
                data = host->data;
-                if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|
+                if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_STARTBITERR|
-                              MCI_RXOVERRUN|MCI_DATAEND|MCI_DATABLOCKEND) && data)
+                              MCI_TXUNDERRUN|MCI_RXOVERRUN|MCI_DATAEND|
+                              MCI_DATABLOCKEND) && data)
                        mmci_data_irq(host, data, status);
                cmd = host->cmd;
diff --git a/drivers/net/ethernet/marvell/skge.c b/drivers/net/ethernet/marvell/skge.c
index c7b60839ac9..dea0cb4400e 100644
--- a/drivers/net/ethernet/marvell/skge.c
+++ b/drivers/net/ethernet/marvell/skge.c
@@ -2606,6 +2606,9 @@ static int skge_up(struct net_device *dev)
        spin_unlock_irq(&hw->hw_lock);
        napi_enable(&skge->napi);
+        skge_set_multicast(dev);
        return 0;
 free_tx_ring:
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_cq.c b/drivers/net/ethernet/mellanox/mlx4/en_cq.c
index 227997d775e..5829e0b47e7 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_cq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_cq.c
@@ -147,6 +147,7 @@ void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
        mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size);
        if (priv->mdev->dev->caps.comp_pool && cq->vector)
                mlx4_release_eq(priv->mdev->dev, cq->vector);
+        cq->vector = 0;
        cq->buf_size = 0;
        cq->buf = NULL;
 }
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index cbd5d701c7e..63b3ec48c20 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -314,7 +314,7 @@ static const struct of_dev_auxdata *of_dev_lookup(const struct of_dev_auxdata *l
        if (!lookup)
                return NULL;
-        for(; lookup->name != NULL; lookup++) {
+        for(; lookup->compatible != NULL; lookup++) {
                if (!of_device_is_compatible(np, lookup->compatible))
                        continue;
                if (of_address_to_resource(np, 0, &res))
diff --git a/drivers/watchdog/coh901327_wdt.c b/drivers/watchdog/coh901327_wdt.c
index 03f449a430d..5b89f7d6cd0 100644
--- a/drivers/watchdog/coh901327_wdt.c
+++ b/drivers/watchdog/coh901327_wdt.c
@@ -76,8 +76,6 @@ static int irq;
 static void __iomem *virtbase;
 static unsigned long coh901327_users;
 static unsigned long boot_status;
-static u16 wdogenablestore;
-static u16 irqmaskstore;
 static struct device *parent;
 /*
@@ -461,6 +459,10 @@ out:
 }
 #ifdef CONFIG_PM
+static u16 wdogenablestore;
+static u16 irqmaskstore;
 static int coh901327_suspend(struct platform_device *pdev, pm_message_t state)
 {
        irqmaskstore = readw(virtbase + U300_WDOG_IMR) & 0x0001U;
diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c
index 3774c9b8dac..8464ea1c36a 100644
--- a/drivers/watchdog/hpwdt.c
+++ b/drivers/watchdog/hpwdt.c
@@ -231,6 +231,7 @@ static int __devinit cru_detect(unsigned long map_entry,
        cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
+        set_memory_x((unsigned long)bios32_entrypoint, (2 * PAGE_SIZE));
        asminline_call(&cmn_regs, bios32_entrypoint);
        if (cmn_regs.u1.ral != 0) {
@@ -248,8 +249,10 @@ static int __devinit cru_detect(unsigned long map_entry,
                if ((physical_bios_base + physical_bios_offset)) {
                        cru_rom_addr =
                                ioremap(cru_physical_address, cru_length);
-                        if (cru_rom_addr)
+                        if (cru_rom_addr) {
+                                set_memory_x((unsigned long)cru_rom_addr, cru_length);
                                retval = 0;
+                        }
                }
                printk(KERN_DEBUG "hpwdt: CRU Base Address:   0x%lx\n",
diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c
index ba6ad662635..99796c5d913 100644
--- a/drivers/watchdog/iTCO_wdt.c
+++ b/drivers/watchdog/iTCO_wdt.c
@@ -384,10 +384,10 @@ MODULE_PARM_DESC(nowayout,
        "Watchdog cannot be stopped once started (default="
                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
-static int turn_SMI_watchdog_clear_off = 0;
+static int turn_SMI_watchdog_clear_off = 1;
 module_param(turn_SMI_watchdog_clear_off, int, 0);
 MODULE_PARM_DESC(turn_SMI_watchdog_clear_off,
-        "Turn off SMI clearing watchdog (default=0)");
+        "Turn off SMI clearing watchdog (depends on TCO-version)(default=1)");
 /*
 * Some TCO specific functions
@@ -813,7 +813,7 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
                ret = -EIO;
                goto out_unmap;
        }
-        if (turn_SMI_watchdog_clear_off) {
+        if (turn_SMI_watchdog_clear_off >= iTCO_wdt_private.iTCO_version) {
                /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */
                val32 = inl(SMI_EN);
                val32 &= 0xffffdfff;    /* Turn off SMI clearing watchdog */
diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c
index cc2cfbe33b3..bfaf9bb1ee0 100644
--- a/drivers/watchdog/sp805_wdt.c
+++ b/drivers/watchdog/sp805_wdt.c
@@ -351,7 +351,7 @@ static int __devexit sp805_wdt_remove(struct amba_device *adev)
        return 0;
 }
-static struct amba_id sp805_wdt_ids[] __initdata = {
+static struct amba_id sp805_wdt_ids[] = {
        {
                .id     = 0x00141805,
                .mask   = 0x00ffffff,
diff --git a/fs/ceph/dir.c b/fs/ceph/dir.c
index 3eeb9766126..98954003a8d 100644
--- a/fs/ceph/dir.c
+++ b/fs/ceph/dir.c
@@ -1094,42 +1094,19 @@ static int ceph_snapdir_d_revalidate(struct dentry *dentry,
 /*
 * Set/clear/test dir complete flag on the dir's dentry.
 */
-static struct dentry * __d_find_any_alias(struct inode *inode)
-{
-        struct dentry *alias;
-        if (list_empty(&inode->i_dentry))
-                return NULL;
-        alias = list_first_entry(&inode->i_dentry, struct dentry, d_alias);
-        return alias;
-}
 void ceph_dir_set_complete(struct inode *inode)
 {
-        struct dentry *dentry = __d_find_any_alias(inode);
+        /* not yet implemented */
-        
-        if (dentry && ceph_dentry(dentry)) {
-                dout(" marking %p (%p) complete\n", inode, dentry);
-                set_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags);
-        }
 }
 void ceph_dir_clear_complete(struct inode *inode)
 {
-        struct dentry *dentry = __d_find_any_alias(inode);
+        /* not yet implemented */
-        if (dentry && ceph_dentry(dentry)) {
-                dout(" marking %p (%p) NOT complete\n", inode, dentry);
-                clear_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags);
-        }
 }
 bool ceph_dir_test_complete(struct inode *inode)
 {
-        struct dentry *dentry = __d_find_any_alias(inode);
+        /* not yet implemented */
-        if (dentry && ceph_dentry(dentry))
-                return test_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags);
        return false;
 }
diff --git a/fs/locks.c b/fs/locks.c
index 3b0d05dcd7c..637694bf3a0 100644
--- a/fs/locks.c
+++ b/fs/locks.c
@@ -1205,6 +1205,8 @@ int __break_lease(struct inode *inode, unsigned int mode)
        int want_write = (mode & O_ACCMODE) != O_RDONLY;
        new_fl = lease_alloc(NULL, want_write ? F_WRLCK : F_RDLCK);
+        if (IS_ERR(new_fl))
+                return PTR_ERR(new_fl);
        lock_flocks();
@@ -1221,12 +1223,6 @@ int __break_lease(struct inode *inode, unsigned int mode)
                if (fl->fl_owner == current->files)
                        i_have_this_lease = 1;
-        if (IS_ERR(new_fl) && !i_have_this_lease
-                        && ((mode & O_NONBLOCK) == 0)) {
-                error = PTR_ERR(new_fl);
-                goto out;
-        }
        break_time = 0;
        if (lease_break_time > 0) {
                break_time = jiffies + lease_break_time * HZ;
@@ -1284,8 +1280,7 @@ restart:
 out:
        unlock_flocks();
-        if (!IS_ERR(new_fl))
+        locks_free_lock(new_fl);
-                locks_free_lock(new_fl);
        return error;
 }
diff --git a/fs/proc/stat.c b/fs/proc/stat.c
index 2a30d67dd6b..0855e6f2039 100644
--- a/fs/proc/stat.c
+++ b/fs/proc/stat.c
@@ -32,7 +32,7 @@ static cputime64_t get_idle_time(int cpu)
                idle = kstat_cpu(cpu).cpustat.idle;
                idle = cputime64_add(idle, arch_idle_time(cpu));
        } else
-                idle = nsecs_to_jiffies64(1000 * idle_time);
+                idle = usecs_to_cputime64(idle_time);
        return idle;
 }
@@ -46,7 +46,7 @@ static cputime64_t get_iowait_time(int cpu)
                /* !NO_HZ so we can rely on cpustat.iowait */
                iowait = kstat_cpu(cpu).cpustat.iowait;
        else
-                iowait = nsecs_to_jiffies64(1000 * iowait_time);
+                iowait = usecs_to_cputime64(iowait_time);
        return iowait;
 }
diff --git a/fs/xfs/xfs_super.c b/fs/xfs/xfs_super.c
index 3eca58f51ae..8a899496fd5 100644
--- a/fs/xfs/xfs_super.c
+++ b/fs/xfs/xfs_super.c
@@ -869,27 +869,6 @@ xfs_fs_dirty_inode(
 }
 STATIC int
-xfs_log_inode(
-        struct xfs_inode        *ip)
-{
-        struct xfs_mount        *mp = ip->i_mount;
-        struct xfs_trans        *tp;
-        int                     error;
-        tp = xfs_trans_alloc(mp, XFS_TRANS_FSYNC_TS);
-        error = xfs_trans_reserve(tp, 0, XFS_FSYNC_TS_LOG_RES(mp), 0, 0, 0);
-        if (error) {
-                xfs_trans_cancel(tp, 0);
-                return error;
-        }
-        xfs_ilock(ip, XFS_ILOCK_EXCL);
-        xfs_trans_ijoin(tp, ip, XFS_ILOCK_EXCL);
-        xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE);
-        return xfs_trans_commit(tp, 0);
-}
-STATIC int
 xfs_fs_write_inode(
        struct inode            *inode,
        struct writeback_control *wbc)
@@ -902,10 +881,8 @@ xfs_fs_write_inode(
        if (XFS_FORCED_SHUTDOWN(mp))
                return -XFS_ERROR(EIO);
-        if (!ip->i_update_core)
-                return 0;
-        if (wbc->sync_mode == WB_SYNC_ALL) {
+        if (wbc->sync_mode == WB_SYNC_ALL || wbc->for_kupdate) {
                /*
                 * Make sure the inode has made it it into the log.  Instead
                 * of forcing it all the way to stable storage using a
@@ -913,11 +890,14 @@ xfs_fs_write_inode(
                 * ->sync_fs call do that for thus, which reduces the number
                 * of synchronous log forces dramatically.
                 */
-                error = xfs_log_inode(ip);
+                error = xfs_log_dirty_inode(ip, NULL, 0);
                if (error)
                        goto out;
                return 0;
        } else {
+                if (!ip->i_update_core)
+                        return 0;
                /*
                 * We make this non-blocking if the inode is contended, return
                 * EAGAIN to indicate to the caller that they did not succeed.
diff --git a/fs/xfs/xfs_sync.c b/fs/xfs/xfs_sync.c
index be5c51d8f75..f0994aedcd1 100644
--- a/fs/xfs/xfs_sync.c
+++ b/fs/xfs/xfs_sync.c
@@ -336,6 +336,32 @@ xfs_sync_fsdata(
        return error;
 }
+int
+xfs_log_dirty_inode(
+        struct xfs_inode        *ip,
+        struct xfs_perag        *pag,
+        int                     flags)
+{
+        struct xfs_mount        *mp = ip->i_mount;
+        struct xfs_trans        *tp;
+        int                     error;
+        if (!ip->i_update_core)
+                return 0;
+        tp = xfs_trans_alloc(mp, XFS_TRANS_FSYNC_TS);
+        error = xfs_trans_reserve(tp, 0, XFS_FSYNC_TS_LOG_RES(mp), 0, 0, 0);
+        if (error) {
+                xfs_trans_cancel(tp, 0);
+                return error;
+        }
+        xfs_ilock(ip, XFS_ILOCK_EXCL);
+        xfs_trans_ijoin(tp, ip, XFS_ILOCK_EXCL);
+        xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE);
+        return xfs_trans_commit(tp, 0);
+}
 /*
 * When remounting a filesystem read-only or freezing the filesystem, we have
 * two phases to execute. This first phase is syncing the data before we
@@ -359,6 +385,16 @@ xfs_quiesce_data(
 {
        int                     error, error2 = 0;
+        /*
+         * Log all pending size and timestamp updates.  The vfs writeback
+         * code is supposed to do this, but due to its overagressive
+         * livelock detection it will skip inodes where appending writes
+         * were written out in the first non-blocking sync phase if their
+         * completion took long enough that it happened after taking the
+         * timestamp for the cut-off in the blocking phase.
+         */
+        xfs_inode_ag_iterator(mp, xfs_log_dirty_inode, 0);
        xfs_qm_sync(mp, SYNC_TRYLOCK);
        xfs_qm_sync(mp, SYNC_WAIT);
diff --git a/fs/xfs/xfs_sync.h b/fs/xfs/xfs_sync.h
index 941202e7ac6..fa965479d78 100644
--- a/fs/xfs/xfs_sync.h
+++ b/fs/xfs/xfs_sync.h
@@ -34,6 +34,8 @@ void xfs_quiesce_attr(struct xfs_mount *mp);
 void xfs_flush_inodes(struct xfs_inode *ip);
+int xfs_log_dirty_inode(struct xfs_inode *ip, struct xfs_perag *pag, int flags);
 int xfs_reclaim_inodes(struct xfs_mount *mp, int mode);
 int xfs_reclaim_inodes_count(struct xfs_mount *mp);
 void xfs_reclaim_inodes_nr(struct xfs_mount *mp, int nr_to_scan);
diff --git a/include/asm-generic/cputime.h b/include/asm-generic/cputime.h
index 62ce6823c0f..12a1764f612 100644
--- a/include/asm-generic/cputime.h
+++ b/include/asm-generic/cputime.h
@@ -40,6 +40,7 @@ typedef u64 cputime64_t;
 */
 #define cputime_to_usecs(__ct)          jiffies_to_usecs(__ct)
 #define usecs_to_cputime(__msecs)       usecs_to_jiffies(__msecs)
+#define usecs_to_cputime64(__msecs)     nsecs_to_jiffies64((__msecs) * 1000)
 /*
 * Convert cputime to seconds and back.
diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
index 99834e581b9..bd4272b61a1 100644
--- a/include/linux/irqdomain.h
+++ b/include/linux/irqdomain.h
@@ -91,10 +91,11 @@ static inline unsigned int irq_domain_to_irq(struct irq_domain *d,
 extern void irq_domain_add(struct irq_domain *domain);
 extern void irq_domain_del(struct irq_domain *domain);
+extern struct irq_domain_ops irq_domain_simple_ops;
 #endif /* CONFIG_IRQ_DOMAIN */
 #if defined(CONFIG_IRQ_DOMAIN) && defined(CONFIG_OF_IRQ)
-extern struct irq_domain_ops irq_domain_simple_ops;
 extern void irq_domain_add_simple(struct device_node *controller, int irq_base);
 extern void irq_domain_generate_simple(const struct of_device_id *match,
                                        u64 phys_base, unsigned int irq_start);
diff --git a/include/linux/kvm.h b/include/linux/kvm.h
index c3892fc1d53..68e67e50d02 100644
--- a/include/linux/kvm.h
+++ b/include/linux/kvm.h
@@ -557,6 +557,7 @@ struct kvm_ppc_pvinfo {
 #define KVM_CAP_MAX_VCPUS 66       /* returns max vcpus per vm */
 #define KVM_CAP_PPC_PAPR 68
 #define KVM_CAP_S390_GMAP 71
+#define KVM_CAP_TSC_DEADLINE_TIMER 72
 #ifdef KVM_CAP_IRQ_ROUTING
diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h
index 4bde182fcf9..dcdfc2bda92 100644
--- a/include/linux/vmalloc.h
+++ b/include/linux/vmalloc.h
@@ -131,6 +131,7 @@ extern long vwrite(char *buf, char *addr, unsigned long count);
 */
 extern rwlock_t vmlist_lock;
 extern struct vm_struct *vmlist;
+extern __init void vm_area_add_early(struct vm_struct *vm);
 extern __init void vm_area_register_early(struct vm_struct *vm, size_t align);
 #ifdef CONFIG_SMP
diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h
index 873d5be7926..e5a7b9aaf55 100644
--- a/include/net/ip_vs.h
+++ b/include/net/ip_vs.h
@@ -1207,7 +1207,7 @@ extern void ip_vs_control_cleanup(void);
 extern struct ip_vs_dest *
 ip_vs_find_dest(struct net *net, int af, const union nf_inet_addr *daddr,
                __be16 dport, const union nf_inet_addr *vaddr, __be16 vport,
-                __u16 protocol, __u32 fwmark);
+                __u16 protocol, __u32 fwmark, __u32 flags);
 extern struct ip_vs_dest *ip_vs_try_bind_dest(struct ip_vs_conn *cp);
diff --git a/kernel/futex.c b/kernel/futex.c
index ea87f4d2f45..1614be20173 100644
--- a/kernel/futex.c
+++ b/kernel/futex.c
@@ -314,17 +314,29 @@ again:
 #endif
        lock_page(page_head);
+        /*
+         * If page_head->mapping is NULL, then it cannot be a PageAnon
+         * page; but it might be the ZERO_PAGE or in the gate area or
+         * in a special mapping (all cases which we are happy to fail);
+         * or it may have been a good file page when get_user_pages_fast
+         * found it, but truncated or holepunched or subjected to
+         * invalidate_complete_page2 before we got the page lock (also
+         * cases which we are happy to fail).  And we hold a reference,
+         * so refcount care in invalidate_complete_page's remove_mapping
+         * prevents drop_caches from setting mapping to NULL beneath us.
+         *
+         * The case we do have to guard against is when memory pressure made
+         * shmem_writepage move it from filecache to swapcache beneath us:
+         * an unlikely race, but we do need to retry for page_head->mapping.
+         */
        if (!page_head->mapping) {
+                int shmem_swizzled = PageSwapCache(page_head);
                unlock_page(page_head);
                put_page(page_head);
-                /*
+                if (shmem_swizzled)
-                * ZERO_PAGE pages don't have a mapping. Avoid a busy loop
+                        goto again;
-                * trying to find one. RW mapping would have COW'd (and thus
+                return -EFAULT;
-                * have a mapping) so this page is RO and won't ever change.
-                */
-                if ((page_head == ZERO_PAGE(address)))
-                        return -EFAULT;
-                goto again;
        }
        /*
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
index 200ce832c58..7ca523b249e 100644
--- a/kernel/irq/irqdomain.c
+++ b/kernel/irq/irqdomain.c
@@ -143,11 +143,6 @@ int irq_domain_simple_dt_translate(struct irq_domain *d,
        return 0;
 }
-struct irq_domain_ops irq_domain_simple_ops = {
-        .dt_translate = irq_domain_simple_dt_translate,
-};
-EXPORT_SYMBOL_GPL(irq_domain_simple_ops);
 /**
 * irq_domain_create_simple() - Set up a 'simple' translation range
 */
@@ -182,3 +177,10 @@ void irq_domain_generate_simple(const struct of_device_id *match,
 }
 EXPORT_SYMBOL_GPL(irq_domain_generate_simple);
 #endif /* CONFIG_OF_IRQ */
+struct irq_domain_ops irq_domain_simple_ops = {
+#ifdef CONFIG_OF_IRQ
+        .dt_translate = irq_domain_simple_dt_translate,
+#endif /* CONFIG_OF_IRQ */
+};
+EXPORT_SYMBOL_GPL(irq_domain_simple_ops);
diff --git a/kernel/time/clockevents.c b/kernel/time/clockevents.c
index c4eb71c8b2e..1ecd6ba36d6 100644
--- a/kernel/time/clockevents.c
+++ b/kernel/time/clockevents.c
@@ -387,7 +387,6 @@ void clockevents_exchange_device(struct clock_event_device *old,
         * released list and do a notify add later.
         */
        if (old) {
-                old->event_handler = clockevents_handle_noop;
                clockevents_set_mode(old, CLOCK_EVT_MODE_UNUSED);
                list_del(&old->list);
                list_add(&old->list, &clockevents_released);
diff --git a/mm/hugetlb.c b/mm/hugetlb.c
index 73f17c0293c..2316840b337 100644
--- a/mm/hugetlb.c
+++ b/mm/hugetlb.c
@@ -901,7 +901,6 @@ retry:
        h->resv_huge_pages += delta;
        ret = 0;
-        spin_unlock(&hugetlb_lock);
        /* Free the needed pages to the hugetlb pool */
        list_for_each_entry_safe(page, tmp, &surplus_list, lru) {
                if ((--needed) < 0)
@@ -915,6 +914,7 @@ retry:
                VM_BUG_ON(page_count(page));
                enqueue_huge_page(h, page);
        }
+        spin_unlock(&hugetlb_lock);
        /* Free unnecessary surplus pages to the buddy allocator */
 free:
diff --git a/mm/mempolicy.c b/mm/mempolicy.c
index adc39548181..c3fdbcb1765 100644
--- a/mm/mempolicy.c
+++ b/mm/mempolicy.c
@@ -636,6 +636,7 @@ static int mbind_range(struct mm_struct *mm, unsigned long start,
        struct vm_area_struct *prev;
        struct vm_area_struct *vma;
        int err = 0;
+        pgoff_t pgoff;
        unsigned long vmstart;
        unsigned long vmend;
@@ -643,13 +644,21 @@ static int mbind_range(struct mm_struct *mm, unsigned long start,
        if (!vma || vma->vm_start > start)
                return -EFAULT;
+        if (start > vma->vm_start)
+                prev = vma;
        for (; vma && vma->vm_start < end; prev = vma, vma = next) {
                next = vma->vm_next;
                vmstart = max(start, vma->vm_start);
                vmend   = min(end, vma->vm_end);
+                if (mpol_equal(vma_policy(vma), new_pol))
+                        continue;
+                pgoff = vma->vm_pgoff +
+                        ((vmstart - vma->vm_start) >> PAGE_SHIFT);
                prev = vma_merge(mm, prev, vmstart, vmend, vma->vm_flags,
-                                  vma->anon_vma, vma->vm_file, vma->vm_pgoff,
+                                  vma->anon_vma, vma->vm_file, pgoff,
                                  new_pol);
                if (prev) {
                        vma = prev;
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index 27be2f0d4cb..21fdf46ad5a 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -1118,6 +1118,32 @@ void *vm_map_ram(struct page **pages, unsigned int count, int node, pgprot_t pro
 EXPORT_SYMBOL(vm_map_ram);
 /**
+ * vm_area_add_early - add vmap area early during boot
+ * @vm: vm_struct to add
+ *
+ * This function is used to add fixed kernel vm area to vmlist before
+ * vmalloc_init() is called.  @vm->addr, @vm->size, and @vm->flags
+ * should contain proper values and the other fields should be zero.
+ *
+ * DO NOT USE THIS FUNCTION UNLESS YOU KNOW WHAT YOU'RE DOING.
+ */
+void __init vm_area_add_early(struct vm_struct *vm)
+{
+        struct vm_struct *tmp, **p;
+        BUG_ON(vmap_initialized);
+        for (p = &vmlist; (tmp = *p) != NULL; p = &tmp->next) {
+                if (tmp->addr >= vm->addr) {
+                        BUG_ON(tmp->addr < vm->addr + vm->size);
+                        break;
+                } else
+                        BUG_ON(tmp->addr + tmp->size > vm->addr);
+        }
+        vm->next = *p;
+        *p = vm;
+}
+/**
 * vm_area_register_early - register vmap area early during boot
 * @vm: vm_struct to register
 * @align: requested alignment
@@ -1139,8 +1165,7 @@ void __init vm_area_register_early(struct vm_struct *vm, size_t align)
        vm->addr = (void *)addr;
-        vm->next = vmlist;
+        vm_area_add_early(vm);
-        vmlist = vm;
 }
 void __init vmalloc_init(void)
diff --git a/net/netfilter/ipvs/ip_vs_conn.c b/net/netfilter/ipvs/ip_vs_conn.c
index 12571fb2881..29fa5badde7 100644
--- a/net/netfilter/ipvs/ip_vs_conn.c
+++ b/net/netfilter/ipvs/ip_vs_conn.c
@@ -616,7 +616,7 @@ struct ip_vs_dest *ip_vs_try_bind_dest(struct ip_vs_conn *cp)
        if ((cp) && (!cp->dest)) {
                dest = ip_vs_find_dest(ip_vs_conn_net(cp), cp->af, &cp->daddr,
                                       cp->dport, &cp->vaddr, cp->vport,
-                                       cp->protocol, cp->fwmark);
+                                       cp->protocol, cp->fwmark, cp->flags);
                ip_vs_bind_dest(cp, dest);
                return dest;
        } else
diff --git a/net/netfilter/ipvs/ip_vs_ctl.c b/net/netfilter/ipvs/ip_vs_ctl.c
index 008bf97cc91..e1a66cf37f9 100644
--- a/net/netfilter/ipvs/ip_vs_ctl.c
+++ b/net/netfilter/ipvs/ip_vs_ctl.c
@@ -619,15 +619,21 @@ struct ip_vs_dest *ip_vs_find_dest(struct net  *net, int af,
                                   const union nf_inet_addr *daddr,
                                   __be16 dport,
                                   const union nf_inet_addr *vaddr,
-                                   __be16 vport, __u16 protocol, __u32 fwmark)
+                                   __be16 vport, __u16 protocol, __u32 fwmark,
+                                   __u32 flags)
 {
        struct ip_vs_dest *dest;
        struct ip_vs_service *svc;
+        __be16 port = dport;
        svc = ip_vs_service_get(net, af, fwmark, protocol, vaddr, vport);
        if (!svc)
                return NULL;
-        dest = ip_vs_lookup_dest(svc, daddr, dport);
+        if (fwmark && (flags & IP_VS_CONN_F_FWD_MASK) != IP_VS_CONN_F_MASQ)
+                port = 0;
+        dest = ip_vs_lookup_dest(svc, daddr, port);
+        if (!dest)
+                dest = ip_vs_lookup_dest(svc, daddr, port ^ dport);
        if (dest)
                atomic_inc(&dest->refcnt);
        ip_vs_service_put(svc);
diff --git a/net/netfilter/ipvs/ip_vs_sync.c b/net/netfilter/ipvs/ip_vs_sync.c
index 3cdd479f9b5..2b6678c0ce1 100644
--- a/net/netfilter/ipvs/ip_vs_sync.c
+++ b/net/netfilter/ipvs/ip_vs_sync.c
@@ -740,7 +740,7 @@ static void ip_vs_proc_conn(struct net *net, struct ip_vs_conn_param *param,
                 * but still handled.
                 */
                dest = ip_vs_find_dest(net, type, daddr, dport, param->vaddr,
-                                       param->vport, protocol, fwmark);
+                                       param->vport, protocol, fwmark, flags);
                /*  Set the approprite ativity flag */
                if (protocol == IPPROTO_TCP) {
diff --git a/net/netfilter/nf_conntrack_netlink.c b/net/netfilter/nf_conntrack_netlink.c
index ef21b221f03..257e77256c5 100644
--- a/net/netfilter/nf_conntrack_netlink.c
+++ b/net/netfilter/nf_conntrack_netlink.c
@@ -135,7 +135,7 @@ nla_put_failure:
 static inline int
 ctnetlink_dump_timeout(struct sk_buff *skb, const struct nf_conn *ct)
 {
-        long timeout = (ct->timeout.expires - jiffies) / HZ;
+        long timeout = ((long)ct->timeout.expires - (long)jiffies) / HZ;
        if (timeout < 0)
                timeout = 0;
@@ -1358,12 +1358,15 @@ ctnetlink_create_conntrack(struct net *net, u16 zone,
                                                    nf_ct_protonum(ct));
                if (helper == NULL) {
                        rcu_read_unlock();
+                        spin_unlock_bh(&nf_conntrack_lock);
 #ifdef CONFIG_MODULES
                        if (request_module("nfct-helper-%s", helpname) < 0) {
+                                spin_lock_bh(&nf_conntrack_lock);
                                err = -EOPNOTSUPP;
                                goto err1;
                        }
+                        spin_lock_bh(&nf_conntrack_lock);
                        rcu_read_lock();
                        helper = __nf_conntrack_helper_find(helpname,
                                                            nf_ct_l3num(ct),
@@ -1638,7 +1641,7 @@ ctnetlink_exp_dump_expect(struct sk_buff *skb,
                          const struct nf_conntrack_expect *exp)
 {
        struct nf_conn *master = exp->master;
-        long timeout = (exp->timeout.expires - jiffies) / HZ;
+        long timeout = ((long)exp->timeout.expires - (long)jiffies) / HZ;
        struct nf_conn_help *help;
        if (timeout < 0)
@@ -1869,25 +1872,30 @@ ctnetlink_get_expect(struct sock *ctnl, struct sk_buff *skb,
        err = -ENOMEM;
        skb2 = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL);
-        if (skb2 == NULL)
+        if (skb2 == NULL) {
+                nf_ct_expect_put(exp);
                goto out;
+        }
        rcu_read_lock();
        err = ctnetlink_exp_fill_info(skb2, NETLINK_CB(skb).pid,
                                      nlh->nlmsg_seq, IPCTNL_MSG_EXP_NEW, exp);
        rcu_read_unlock();
+        nf_ct_expect_put(exp);
        if (err <= 0)
                goto free;
-        nf_ct_expect_put(exp);
+        err = netlink_unicast(ctnl, skb2, NETLINK_CB(skb).pid, MSG_DONTWAIT);
+        if (err < 0)
+                goto out;
-        return netlink_unicast(ctnl, skb2, NETLINK_CB(skb).pid, MSG_DONTWAIT);
+        return 0;
 free:
        kfree_skb(skb2);
 out:
-        nf_ct_expect_put(exp);
+        /* this avoids a loop in nfnetlink. */
-        return err;
+        return err == -EAGAIN ? -ENOBUFS : err;
 }
 static int
diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index 3891702b81d..d9d4970b9b0 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -2448,8 +2448,12 @@ static int packet_do_bind(struct sock *sk, struct net_device *dev, __be16 protoc
 {
        struct packet_sock *po = pkt_sk(sk);
-        if (po->fanout)
+        if (po->fanout) {
+                if (dev)
+                        dev_put(dev);
                return -EINVAL;
+        }
        lock_sock(sk);
diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c
index eb3b9a86c6e..a4ab207cdc5 100644
--- a/net/sched/sch_netem.c
+++ b/net/sched/sch_netem.c
@@ -488,7 +488,7 @@ static int get_dist_table(struct Qdisc *sch, const struct nlattr *attr)
                return -EINVAL;
        s = sizeof(struct disttable) + n * sizeof(s16);
-        d = kmalloc(s, GFP_KERNEL);
+        d = kmalloc(s, GFP_KERNEL | __GFP_NOWARN);
        if (!d)
                d = vmalloc(s);
        if (!d)
@@ -501,9 +501,10 @@ static int get_dist_table(struct Qdisc *sch, const struct nlattr *attr)
        root_lock = qdisc_root_sleeping_lock(sch);
        spin_lock_bh(root_lock);
-        dist_free(q->delay_dist);
+        swap(q->delay_dist, d);
-        q->delay_dist = d;
        spin_unlock_bh(root_lock);
+        dist_free(d);
        return 0;
 }
diff --git a/sound/soc/codecs/wm8776.c b/sound/soc/codecs/wm8776.c
index bfdc52370ad..d3b0a20744f 100644
--- a/sound/soc/codecs/wm8776.c
+++ b/sound/soc/codecs/wm8776.c
@@ -235,6 +235,7 @@ static int wm8776_hw_params(struct snd_pcm_substream *substream,
        switch (snd_pcm_format_width(params_format(params))) {
        case 16:
                iface = 0;
+                break;
        case 20:
                iface = 0x10;
                break;
diff --git a/virt/kvm/assigned-dev.c b/virt/kvm/assigned-dev.c
index 3ad0925d23a..758e3b36d4c 100644
--- a/virt/kvm/assigned-dev.c
+++ b/virt/kvm/assigned-dev.c
@@ -17,6 +17,8 @@
 #include <linux/pci.h>
 #include <linux/interrupt.h>
 #include <linux/slab.h>
+#include <linux/namei.h>
+#include <linux/fs.h>
 #include "irq.h"
 static struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head,
@@ -480,12 +482,76 @@ out:
        return r;
 }
+/*
+ * We want to test whether the caller has been granted permissions to
+ * use this device.  To be able to configure and control the device,
+ * the user needs access to PCI configuration space and BAR resources.
+ * These are accessed through PCI sysfs.  PCI config space is often
+ * passed to the process calling this ioctl via file descriptor, so we
+ * can't rely on access to that file.  We can check for permissions
+ * on each of the BAR resource files, which is a pretty clear
+ * indicator that the user has been granted access to the device.
+ */
+static int probe_sysfs_permissions(struct pci_dev *dev)
+{
+#ifdef CONFIG_SYSFS
+        int i;
+        bool bar_found = false;
+        for (i = PCI_STD_RESOURCES; i <= PCI_STD_RESOURCE_END; i++) {
+                char *kpath, *syspath;
+                struct path path;
+                struct inode *inode;
+                int r;
+                if (!pci_resource_len(dev, i))
+                        continue;
+                kpath = kobject_get_path(&dev->dev.kobj, GFP_KERNEL);
+                if (!kpath)
+                        return -ENOMEM;
+                /* Per sysfs-rules, sysfs is always at /sys */
+                syspath = kasprintf(GFP_KERNEL, "/sys%s/resource%d", kpath, i);
+                kfree(kpath);
+                if (!syspath)
+                        return -ENOMEM;
+                r = kern_path(syspath, LOOKUP_FOLLOW, &path);
+                kfree(syspath);
+                if (r)
+                        return r;
+                inode = path.dentry->d_inode;
+                r = inode_permission(inode, MAY_READ | MAY_WRITE | MAY_ACCESS);
+                path_put(&path);
+                if (r)
+                        return r;
+                bar_found = true;
+        }
+        /* If no resources, probably something special */
+        if (!bar_found)
+                return -EPERM;
+        return 0;
+#else
+        return -EINVAL; /* No way to control the device without sysfs */
+#endif
+}
 static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
                                      struct kvm_assigned_pci_dev *assigned_dev)
 {
        int r = 0, idx;
        struct kvm_assigned_dev_kernel *match;
        struct pci_dev *dev;
+        u8 header_type;
+        if (!(assigned_dev->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU))
+                return -EINVAL;
        mutex_lock(&kvm->lock);
        idx = srcu_read_lock(&kvm->srcu);
@@ -513,6 +579,18 @@ static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
                r = -EINVAL;
                goto out_free;
        }
+        /* Don't allow bridges to be assigned */
+        pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
+        if ((header_type & PCI_HEADER_TYPE) != PCI_HEADER_TYPE_NORMAL) {
+                r = -EPERM;
+                goto out_put;
+        }
+        r = probe_sysfs_permissions(dev);
+        if (r)
+                goto out_put;
        if (pci_enable_device(dev)) {
                printk(KERN_INFO "%s: Could not enable PCI device\n", __func__);
                r = -EBUSY;
@@ -544,16 +622,14 @@ static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
        list_add(&match->list, &kvm->arch.assigned_dev_head);
-        if (assigned_dev->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU) {
+        if (!kvm->arch.iommu_domain) {
-                if (!kvm->arch.iommu_domain) {
+                r = kvm_iommu_map_guest(kvm);
-                        r = kvm_iommu_map_guest(kvm);
-                        if (r)
-                                goto out_list_del;
-                }
-                r = kvm_assign_device(kvm, match);
                if (r)
                        goto out_list_del;
        }
+        r = kvm_assign_device(kvm, match);
+        if (r)
+                goto out_list_del;
 out:
        srcu_read_unlock(&kvm->srcu, idx);
@@ -593,8 +669,7 @@ static int kvm_vm_ioctl_deassign_device(struct kvm *kvm,
                goto out;
        }
-        if (match->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU)
+        kvm_deassign_device(kvm, match);
-                kvm_deassign_device(kvm, match);
        kvm_free_assigned_device(kvm, match);