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-rw-r--r--drivers/staging/tm6000/tm6000-core.c12
-rw-r--r--drivers/staging/tm6000/tm6000-stds.c774
-rw-r--r--drivers/staging/tm6000/tm6000-video.c9
-rw-r--r--drivers/staging/tm6000/tm6000.h4
4 files changed, 130 insertions, 669 deletions
diff --git a/drivers/staging/tm6000/tm6000-core.c b/drivers/staging/tm6000/tm6000-core.c
index f4b9fcd4985..259cf802ea8 100644
--- a/drivers/staging/tm6000/tm6000-core.c
+++ b/drivers/staging/tm6000/tm6000-core.c
@@ -327,7 +327,7 @@ int tm6000_init_analog_mode(struct tm6000_core *dev)
327 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f); 327 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f);
328 328
329 msleep(100); 329 msleep(100);
330 tm6000_set_standard(dev, &dev->norm); 330 tm6000_set_standard(dev);
331 tm6000_set_vbi(dev); 331 tm6000_set_vbi(dev);
332 tm6000_set_audio_bitrate(dev, 48000); 332 tm6000_set_audio_bitrate(dev, 48000);
333 333
@@ -489,14 +489,6 @@ struct reg_init tm6010_init_tab[] = {
489 { TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0 }, 489 { TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0 },
490 { TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2 }, 490 { TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2 },
491 { TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60 }, 491 { TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60 },
492 { TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00},
493 { TM6010_REQ08_R04_A_SIF_AMP_CTRL, 0x80},
494 { TM6010_REQ08_R0C_A_ASD_THRES2, 0x0a},
495 { TM6010_REQ08_R0D_A_AMD_THRES, 0x40},
496 { TM6010_REQ08_R1A_A_NICAM_SER_MAX, 0x64},
497 { TM6010_REQ08_R1B_A_NICAM_SER_MIN, 0x20},
498 { TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe},
499 { TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01},
500 { TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc }, 492 { TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc },
501 493
502 { TM6010_REQ07_R3F_RESET, 0x01 }, 494 { TM6010_REQ07_R3F_RESET, 0x01 },
@@ -657,7 +649,7 @@ int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate)
657} 649}
658EXPORT_SYMBOL_GPL(tm6000_set_audio_bitrate); 650EXPORT_SYMBOL_GPL(tm6000_set_audio_bitrate);
659 651
660int tm6000_set_audio_input(struct tm6000_core *dev, enum tm6000_inaudio ainp) 652int tm6000_set_audio_rinput(struct tm6000_core *dev)
661{ 653{
662 if (dev->dev_type == TM6010) { 654 if (dev->dev_type == TM6010) {
663 /* Audio crossbar setting, default SIF1 */ 655 /* Audio crossbar setting, default SIF1 */
diff --git a/drivers/staging/tm6000/tm6000-stds.c b/drivers/staging/tm6000/tm6000-stds.c
index 588b1fc7f88..8b29d732ddc 100644
--- a/drivers/staging/tm6000/tm6000-stds.c
+++ b/drivers/staging/tm6000/tm6000-stds.c
@@ -25,422 +25,23 @@
25static unsigned int tm6010_a_mode = 0; 25static unsigned int tm6010_a_mode = 0;
26module_param(tm6010_a_mode, int, 0644); 26module_param(tm6010_a_mode, int, 0644);
27MODULE_PARM_DESC(tm6010_a_mode, "set tm6010 sif audio mode"); 27MODULE_PARM_DESC(tm6010_a_mode, "set tm6010 sif audio mode");
28
28struct tm6000_reg_settings { 29struct tm6000_reg_settings {
29 unsigned char req; 30 unsigned char req;
30 unsigned char reg; 31 unsigned char reg;
31 unsigned char value; 32 unsigned char value;
32}; 33};
33 34
34enum tm6000_audio_std {
35 BG_NICAM,
36 BTSC,
37 BG_A2,
38 DK_NICAM,
39 EIAJ,
40 FM_RADIO,
41 I_NICAM,
42 KOREA_A2,
43 L_NICAM,
44};
45
46struct tm6000_std_tv_settings {
47 v4l2_std_id id;
48 enum tm6000_audio_std audio_default_std;
49
50 struct tm6000_reg_settings sif[12];
51 struct tm6000_reg_settings nosif[12];
52 struct tm6000_reg_settings common[26];
53};
54 35
55struct tm6000_std_settings { 36struct tm6000_std_settings {
56 v4l2_std_id id; 37 v4l2_std_id id;
57 enum tm6000_audio_std audio_default_std; 38 struct tm6000_reg_settings common[27];
58 struct tm6000_reg_settings common[37];
59};
60
61static struct tm6000_std_tv_settings tv_stds[] = {
62 {
63 .id = V4L2_STD_PAL_M,
64 .audio_default_std = BTSC,
65 .sif = {
66 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2},
67 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
68 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
69 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08},
70 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
71 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
72 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
73 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
74 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62},
75 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe},
76 {TM6010_REQ07_RFE_POWER_DOWN, 0xcb},
77 {0, 0, 0},
78 },
79 .nosif = {
80 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
81 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
82 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
83 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
84 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
85 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
86 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
87 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
88 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60},
89 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
90 {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
91 {0, 0, 0},
92 },
93 .common = {
94 {TM6010_REQ07_R3F_RESET, 0x01},
95 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x04},
96 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
97 {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
98 {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00},
99 {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x31},
100 {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e},
101 {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x83},
102 {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x0a},
103 {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe0},
104 {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
105 {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
106 {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
107 {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
108 {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88},
109 {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x20},
110 {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61},
111 {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c},
112 {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
113 {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52},
114 {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
115
116 {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc},
117 {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
118
119 {TM6010_REQ07_R3F_RESET, 0x00},
120
121 {0, 0, 0},
122 },
123 }, {
124 .id = V4L2_STD_PAL_Nc,
125 .audio_default_std = BTSC,
126 .sif = {
127 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2},
128 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
129 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
130 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08},
131 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
132 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
133 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
134 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
135 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62},
136 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe},
137 {TM6010_REQ07_RFE_POWER_DOWN, 0xcb},
138 {0, 0, 0},
139 },
140 .nosif = {
141 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
142 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
143 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
144 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
145 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
146 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
147 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
148 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
149 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60},
150 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
151 {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
152 {0, 0, 0},
153 },
154 .common = {
155 {TM6010_REQ07_R3F_RESET, 0x01},
156 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x36},
157 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
158 {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
159 {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02},
160 {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x31},
161 {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e},
162 {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x91},
163 {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x1f},
164 {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0x0c},
165 {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
166 {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
167 {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
168 {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
169 {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c},
170 {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c},
171 {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
172 {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c},
173 {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
174 {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52},
175 {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
176
177 {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc},
178 {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
179
180 {TM6010_REQ07_R3F_RESET, 0x00},
181
182 {0, 0, 0},
183 },
184 }, {
185 .id = V4L2_STD_PAL,
186 .audio_default_std = BG_A2,
187 .sif = {
188 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2},
189 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
190 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
191 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08},
192 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
193 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
194 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
195 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
196 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62},
197 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe},
198 {TM6010_REQ07_RFE_POWER_DOWN, 0xcb},
199 {0, 0, 0}
200 },
201 .nosif = {
202 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
203 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
204 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
205 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
206 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
207 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
208 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
209 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
210 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60},
211 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
212 {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
213 {0, 0, 0},
214 },
215 .common = {
216 {TM6010_REQ07_R3F_RESET, 0x01},
217 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x32},
218 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
219 {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
220 {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02},
221 {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x31},
222 {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x25},
223 {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0xd5},
224 {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x63},
225 {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0x50},
226 {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
227 {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
228 {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
229 {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
230 {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c},
231 {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c},
232 {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
233 {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c},
234 {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
235 {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52},
236 {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
237
238 {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc},
239 {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
240
241 {TM6010_REQ07_R3F_RESET, 0x00},
242
243 {0, 0, 0},
244 },
245 }, {
246 .id = V4L2_STD_SECAM_B | V4L2_STD_SECAM_G,
247 .audio_default_std = BG_NICAM,
248 .sif = {
249 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2},
250 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
251 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
252 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08},
253 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
254 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
255 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
256 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
257 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62},
258 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe},
259 {TM6010_REQ07_RFE_POWER_DOWN, 0xcb},
260 {0, 0, 0},
261 },
262 .nosif = {
263 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
264 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
265 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
266 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
267 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
268 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
269 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
270 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
271 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60},
272 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
273 {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
274 {0, 0, 0},
275 },
276 .common = {
277 {TM6010_REQ07_R3F_RESET, 0x01},
278 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x38},
279 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
280 {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
281 {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02},
282 {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x31},
283 {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x24},
284 {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x92},
285 {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xe8},
286 {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xed},
287 {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
288 {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
289 {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
290 {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
291 {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c},
292 {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c},
293 {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
294 {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x2c},
295 {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x18},
296 {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42},
297 {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF},
298
299 {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
300
301 {TM6010_REQ07_R3F_RESET, 0x00},
302 {0, 0, 0},
303 },
304 }, {
305 .id = V4L2_STD_SECAM_DK,
306 .audio_default_std = DK_NICAM,
307 .sif = {
308 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2},
309 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
310 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
311 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08},
312 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
313 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
314 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
315 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
316 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62},
317 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe},
318 {TM6010_REQ07_RFE_POWER_DOWN, 0xcb},
319 {0, 0, 0},
320 },
321 .nosif = {
322 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
323 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
324 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
325 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
326 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
327 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
328 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
329 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
330 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60},
331 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
332 {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
333 {0, 0, 0},
334 },
335 .common = {
336 {TM6010_REQ07_R3F_RESET, 0x01},
337 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x38},
338 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
339 {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
340 {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02},
341 {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x31},
342 {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x24},
343 {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x92},
344 {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xe8},
345 {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xed},
346 {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
347 {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
348 {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
349 {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
350 {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c},
351 {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c},
352 {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
353 {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x2c},
354 {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x18},
355 {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42},
356 {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF},
357
358 {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
359
360 {TM6010_REQ07_R3F_RESET, 0x00},
361 {0, 0, 0},
362 },
363 }, {
364 .id = V4L2_STD_NTSC,
365 .audio_default_std = BTSC,
366 .sif = {
367 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2},
368 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
369 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
370 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08},
371 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
372 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
373 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
374 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
375 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62},
376 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe},
377 {TM6010_REQ07_RFE_POWER_DOWN, 0xcb},
378 {0, 0, 0},
379 },
380 .nosif = {
381 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
382 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8},
383 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
384 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
385 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
386 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
387 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
388 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
389 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60},
390 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
391 {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
392 {0, 0, 0},
393 },
394 .common = {
395 {TM6010_REQ07_R3F_RESET, 0x01},
396 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00},
397 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0f},
398 {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
399 {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00},
400 {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x31},
401 {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e},
402 {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b},
403 {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2},
404 {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9},
405 {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
406 {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
407 {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
408 {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
409 {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88},
410 {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22},
411 {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61},
412 {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c},
413 {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c},
414 {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42},
415 {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F},
416
417 {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdd},
418 {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
419
420 {TM6010_REQ07_R3F_RESET, 0x00},
421
422 {0, 0, 0},
423 },
424 },
425}; 39};
426 40
427static struct tm6000_std_settings composite_stds[] = { 41static struct tm6000_std_settings composite_stds[] = {
428 { 42 {
429 .id = V4L2_STD_PAL_M, 43 .id = V4L2_STD_PAL_M,
430 .audio_default_std = BTSC,
431 .common = { 44 .common = {
432 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
433 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4},
434 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
435 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
436 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
437 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
438 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
439 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
440 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
441 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
442 {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
443
444 {TM6010_REQ07_R3F_RESET, 0x01}, 45 {TM6010_REQ07_R3F_RESET, 0x01},
445 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x04}, 46 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x04},
446 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, 47 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
@@ -470,20 +71,7 @@ static struct tm6000_std_settings composite_stds[] = {
470 }, 71 },
471 }, { 72 }, {
472 .id = V4L2_STD_PAL_Nc, 73 .id = V4L2_STD_PAL_Nc,
473 .audio_default_std = BTSC,
474 .common = { 74 .common = {
475 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
476 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4},
477 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
478 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
479 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
480 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
481 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
482 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
483 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
484 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
485 {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
486
487 {TM6010_REQ07_R3F_RESET, 0x01}, 75 {TM6010_REQ07_R3F_RESET, 0x01},
488 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x36}, 76 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x36},
489 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, 77 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
@@ -513,20 +101,7 @@ static struct tm6000_std_settings composite_stds[] = {
513 }, 101 },
514 }, { 102 }, {
515 .id = V4L2_STD_PAL, 103 .id = V4L2_STD_PAL,
516 .audio_default_std = BG_A2,
517 .common = { 104 .common = {
518 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
519 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4},
520 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
521 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
522 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
523 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
524 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
525 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
526 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
527 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
528 {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
529
530 {TM6010_REQ07_R3F_RESET, 0x01}, 105 {TM6010_REQ07_R3F_RESET, 0x01},
531 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x32}, 106 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x32},
532 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, 107 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
@@ -556,62 +131,7 @@ static struct tm6000_std_settings composite_stds[] = {
556 }, 131 },
557 }, { 132 }, {
558 .id = V4L2_STD_SECAM, 133 .id = V4L2_STD_SECAM,
559 .audio_default_std = BG_NICAM,
560 .common = {
561 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
562 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4},
563 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
564 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
565 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
566 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
567 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
568 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
569 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
570 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
571 {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
572
573 {TM6010_REQ07_R3F_RESET, 0x01},
574 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x38},
575 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
576 {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
577 {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02},
578 {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x31},
579 {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x24},
580 {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x92},
581 {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xe8},
582 {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xed},
583 {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
584 {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
585 {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
586 {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
587 {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c},
588 {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c},
589 {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
590 {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x2c},
591 {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x18},
592 {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42},
593 {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF},
594
595 {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
596 {TM6010_REQ07_R3F_RESET, 0x00},
597 {0, 0, 0},
598 },
599 }, {
600 .id = V4L2_STD_SECAM_DK,
601 .audio_default_std = DK_NICAM,
602 .common = { 134 .common = {
603 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
604 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4},
605 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
606 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
607 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
608 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
609 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
610 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
611 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
612 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
613 {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
614
615 {TM6010_REQ07_R3F_RESET, 0x01}, 135 {TM6010_REQ07_R3F_RESET, 0x01},
616 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x38}, 136 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x38},
617 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, 137 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
@@ -640,20 +160,7 @@ static struct tm6000_std_settings composite_stds[] = {
640 }, 160 },
641 }, { 161 }, {
642 .id = V4L2_STD_NTSC, 162 .id = V4L2_STD_NTSC,
643 .audio_default_std = BTSC,
644 .common = { 163 .common = {
645 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
646 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4},
647 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3},
648 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f},
649 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1},
650 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0},
651 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
652 {TM6010_REQ08_RED_GAIN_SEL, 0xe8},
653 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
654 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
655 {TM6010_REQ07_RFE_POWER_DOWN, 0x8b},
656
657 {TM6010_REQ07_R3F_RESET, 0x01}, 164 {TM6010_REQ07_R3F_RESET, 0x01},
658 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00}, 165 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00},
659 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0f}, 166 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0f},
@@ -687,20 +194,7 @@ static struct tm6000_std_settings composite_stds[] = {
687static struct tm6000_std_settings svideo_stds[] = { 194static struct tm6000_std_settings svideo_stds[] = {
688 { 195 {
689 .id = V4L2_STD_PAL_M, 196 .id = V4L2_STD_PAL_M,
690 .audio_default_std = BTSC,
691 .common = { 197 .common = {
692 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
693 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc},
694 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8},
695 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00},
696 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2},
697 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0},
698 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
699 {TM6010_REQ08_RED_GAIN_SEL, 0xe0},
700 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
701 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
702 {TM6010_REQ07_RFE_POWER_DOWN, 0x8a},
703
704 {TM6010_REQ07_R3F_RESET, 0x01}, 198 {TM6010_REQ07_R3F_RESET, 0x01},
705 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x05}, 199 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x05},
706 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, 200 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
@@ -730,20 +224,7 @@ static struct tm6000_std_settings svideo_stds[] = {
730 }, 224 },
731 }, { 225 }, {
732 .id = V4L2_STD_PAL_Nc, 226 .id = V4L2_STD_PAL_Nc,
733 .audio_default_std = BTSC,
734 .common = { 227 .common = {
735 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
736 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc},
737 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8},
738 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00},
739 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2},
740 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0},
741 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
742 {TM6010_REQ08_RED_GAIN_SEL, 0xe0},
743 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
744 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
745 {TM6010_REQ07_RFE_POWER_DOWN, 0x8a},
746
747 {TM6010_REQ07_R3F_RESET, 0x01}, 228 {TM6010_REQ07_R3F_RESET, 0x01},
748 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x37}, 229 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x37},
749 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, 230 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
@@ -773,20 +254,7 @@ static struct tm6000_std_settings svideo_stds[] = {
773 }, 254 },
774 }, { 255 }, {
775 .id = V4L2_STD_PAL, 256 .id = V4L2_STD_PAL,
776 .audio_default_std = BG_A2,
777 .common = { 257 .common = {
778 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
779 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc},
780 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8},
781 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00},
782 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2},
783 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0},
784 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
785 {TM6010_REQ08_RED_GAIN_SEL, 0xe0},
786 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
787 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
788 {TM6010_REQ07_RFE_POWER_DOWN, 0x8a},
789
790 {TM6010_REQ07_R3F_RESET, 0x01}, 258 {TM6010_REQ07_R3F_RESET, 0x01},
791 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x33}, 259 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x33},
792 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, 260 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
@@ -816,62 +284,7 @@ static struct tm6000_std_settings svideo_stds[] = {
816 }, 284 },
817 }, { 285 }, {
818 .id = V4L2_STD_SECAM, 286 .id = V4L2_STD_SECAM,
819 .audio_default_std = BG_NICAM,
820 .common = {
821 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
822 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc},
823 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8},
824 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00},
825 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2},
826 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0},
827 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
828 {TM6010_REQ08_RED_GAIN_SEL, 0xe0},
829 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
830 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
831 {TM6010_REQ07_RFE_POWER_DOWN, 0x8a},
832
833 {TM6010_REQ07_R3F_RESET, 0x01},
834 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x39},
835 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
836 {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f},
837 {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x03},
838 {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x31},
839 {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x24},
840 {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x92},
841 {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xe8},
842 {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xed},
843 {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c},
844 {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc},
845 {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc},
846 {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd},
847 {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c},
848 {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2a},
849 {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1},
850 {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x2c},
851 {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x18},
852 {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42},
853 {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF},
854
855 {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07},
856 {TM6010_REQ07_R3F_RESET, 0x00},
857 {0, 0, 0},
858 },
859 }, {
860 .id = V4L2_STD_SECAM_DK,
861 .audio_default_std = DK_NICAM,
862 .common = { 287 .common = {
863 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
864 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc},
865 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8},
866 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00},
867 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2},
868 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0},
869 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
870 {TM6010_REQ08_RED_GAIN_SEL, 0xe0},
871 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
872 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
873 {TM6010_REQ07_RFE_POWER_DOWN, 0x8a},
874
875 {TM6010_REQ07_R3F_RESET, 0x01}, 288 {TM6010_REQ07_R3F_RESET, 0x01},
876 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x39}, 289 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x39},
877 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, 290 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e},
@@ -900,20 +313,7 @@ static struct tm6000_std_settings svideo_stds[] = {
900 }, 313 },
901 }, { 314 }, {
902 .id = V4L2_STD_NTSC, 315 .id = V4L2_STD_NTSC,
903 .audio_default_std = BTSC,
904 .common = { 316 .common = {
905 {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0},
906 {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc},
907 {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8},
908 {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00},
909 {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2},
910 {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0},
911 {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2},
912 {TM6010_REQ08_RED_GAIN_SEL, 0xe0},
913 {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68},
914 {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc},
915 {TM6010_REQ07_RFE_POWER_DOWN, 0x8a},
916
917 {TM6010_REQ07_R3F_RESET, 0x01}, 317 {TM6010_REQ07_R3F_RESET, 0x01},
918 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x01}, 318 {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x01},
919 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0f}, 319 {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0f},
@@ -946,8 +346,7 @@ static struct tm6000_std_settings svideo_stds[] = {
946}; 346};
947 347
948 348
949static int tm6000_set_audio_std(struct tm6000_core *dev, 349static int tm6000_set_audio_std(struct tm6000_core *dev)
950 enum tm6000_audio_std std)
951{ 350{
952 uint8_t areg_02 = 0x04; /* GC1 Fixed gain 0dB */ 351 uint8_t areg_02 = 0x04; /* GC1 Fixed gain 0dB */
953 uint8_t areg_05 = 0x01; /* Auto 4.5 = M Japan, Auto 6.5 = DK */ 352 uint8_t areg_05 = 0x01; /* Auto 4.5 = M Japan, Auto 6.5 = DK */
@@ -1112,10 +511,6 @@ static int tm6000_load_std(struct tm6000_core *dev,
1112 if (!set[i].req) 511 if (!set[i].req)
1113 return 0; 512 return 0;
1114 513
1115 if ((dev->dev_type != TM6010) &&
1116 (set[i].req == REQ_08_SET_GET_AVREG_BIT))
1117 continue;
1118
1119 rc = tm6000_set_reg(dev, set[i].req, set[i].reg, set[i].value); 514 rc = tm6000_set_reg(dev, set[i].req, set[i].reg, set[i].value);
1120 if (rc < 0) { 515 if (rc < 0) {
1121 printk(KERN_ERR "Error %i while setting " 516 printk(KERN_ERR "Error %i while setting "
@@ -1128,53 +523,126 @@ static int tm6000_load_std(struct tm6000_core *dev,
1128 return 0; 523 return 0;
1129} 524}
1130 525
1131static int tm6000_set_tv(struct tm6000_core *dev, int pos) 526int tm6000_set_standard(struct tm6000_core *dev)
1132{
1133 int rc;
1134
1135 /* FIXME: This code is for tm6010 - not tested yet - doesn't work with
1136 tm5600
1137 */
1138
1139 /* FIXME: This is tuner-dependent */
1140 int nosif = 0;
1141
1142 if (nosif) {
1143 rc = tm6000_load_std(dev, tv_stds[pos].nosif,
1144 sizeof(tv_stds[pos].nosif));
1145 } else {
1146 rc = tm6000_load_std(dev, tv_stds[pos].sif,
1147 sizeof(tv_stds[pos].sif));
1148 }
1149 if (rc < 0)
1150 return rc;
1151 rc = tm6000_load_std(dev, tv_stds[pos].common,
1152 sizeof(tv_stds[pos].common));
1153
1154 tm6000_set_audio_std(dev, tv_stds[pos].audio_default_std);
1155
1156 return rc;
1157}
1158
1159int tm6000_set_standard(struct tm6000_core *dev, v4l2_std_id * norm)
1160{ 527{
1161 int i, rc = 0; 528 int i, rc = 0;
529 u8 reg_07_fe = 0x8a;
530 u8 reg_08_f1 = 0xfc;
531 u8 reg_08_e2 = 0xf0;
532 u8 reg_08_e6 = 0x0f;
1162 533
1163 dev->norm = *norm;
1164 tm6000_get_std_res(dev); 534 tm6000_get_std_res(dev);
1165 535
1166 switch (dev->input) { 536 if (dev->radio) {
1167 case TM6000_INPUT_TV: 537 /* todo */
1168 for (i = 0; i < ARRAY_SIZE(tv_stds); i++) { 538 }
1169 if (*norm & tv_stds[i].id) { 539
1170 rc = tm6000_set_tv(dev, i); 540 if (dev->dev_type == TM6010) {
1171 goto ret; 541 switch (dev->vinput[dev->input].vmux) {
1172 } 542 case TM6000_VMUX_VIDEO_A:
543 tm6000_set_reg(dev, TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4);
544 tm6000_set_reg(dev, TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1);
545 tm6000_set_reg(dev, TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0);
546 tm6000_set_reg(dev, TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2);
547 tm6000_set_reg(dev, TM6010_REQ08_RED_GAIN_SEL, 0xe8);
548 reg_07_fe |= 0x01;
549 break;
550 case TM6000_VMUX_VIDEO_B:
551 tm6000_set_reg(dev, TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8);
552 tm6000_set_reg(dev, TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1);
553 tm6000_set_reg(dev, TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0);
554 tm6000_set_reg(dev, TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2);
555 tm6000_set_reg(dev, TM6010_REQ08_RED_GAIN_SEL, 0xe8);
556 reg_07_fe |= 0x01;
557 break;
558 case TM6000_VMUX_VIDEO_AB:
559 tm6000_set_reg(dev, TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc);
560 tm6000_set_reg(dev, TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8);
561 reg_08_e6 = 0x00;
562 tm6000_set_reg(dev, TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2);
563 tm6000_set_reg(dev, TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0);
564 tm6000_set_reg(dev, TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2);
565 tm6000_set_reg(dev, TM6010_REQ08_RED_GAIN_SEL, 0xe0);
566 break;
567 default:
568 break;
1173 } 569 }
1174 return -EINVAL; 570 switch (dev->vinput[dev->input].amux) {
1175 case TM6000_INPUT_SVIDEO: 571 case TM6000_AMUX_ADC1:
572 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
573 0x00, 0x0f);
574 break;
575 case TM6000_AMUX_ADC2:
576 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
577 0x08, 0x0f);
578 break;
579 case TM6000_AMUX_SIF1:
580 reg_08_e2 |= 0x02;
581 reg_08_e6 = 0x08;
582 reg_07_fe |= 0x40;
583 reg_08_f1 |= 0x02;
584 tm6000_set_reg(dev, TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3);
585 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
586 0x02, 0x0f);
587 break;
588 case TM6000_AMUX_SIF2:
589 reg_08_e2 |= 0x02;
590 reg_08_e6 = 0x08;
591 reg_07_fe |= 0x40;
592 reg_08_f1 |= 0x02;
593 tm6000_set_reg(dev, TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf7);
594 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
595 0x02, 0x0f);
596 break;
597 default:
598 break;
599 }
600 tm6000_set_reg(dev, TM6010_REQ08_RE2_POWER_DOWN_CTRL1, reg_08_e2);
601 tm6000_set_reg(dev, TM6010_REQ08_RE6_POWER_DOWN_CTRL2, reg_08_e6);
602 tm6000_set_reg(dev, TM6010_REQ08_RF1_AADC_POWER_DOWN, reg_08_f1);
603 tm6000_set_reg(dev, TM6010_REQ07_RFE_POWER_DOWN, reg_07_fe);
604 } else {
605 switch (dev->vinput[dev->input].vmux) {
606 case TM6000_VMUX_VIDEO_A:
607 tm6000_set_reg(dev, TM6000_REQ07_RE3_VADC_INP_LPF_SEL1, 0x10);
608 tm6000_set_reg(dev, TM6000_REQ07_RE5_VADC_INP_LPF_SEL2, 0x00);
609 tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0x0f);
610 tm6000_set_reg(dev,
611 REQ_03_SET_GET_MCU_PIN, dev->vinput[dev->input].v_gpio, 0);
612 break;
613 case TM6000_VMUX_VIDEO_B:
614 tm6000_set_reg(dev, TM6000_REQ07_RE3_VADC_INP_LPF_SEL1, 0x00);
615 tm6000_set_reg(dev, TM6000_REQ07_RE5_VADC_INP_LPF_SEL2, 0x00);
616 tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0x0f);
617 tm6000_set_reg(dev,
618 REQ_03_SET_GET_MCU_PIN, dev->vinput[dev->input].v_gpio, 0);
619 break;
620 case TM6000_VMUX_VIDEO_AB:
621 tm6000_set_reg(dev, TM6000_REQ07_RE3_VADC_INP_LPF_SEL1, 0x10);
622 tm6000_set_reg(dev, TM6000_REQ07_RE5_VADC_INP_LPF_SEL2, 0x10);
623 tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0x00);
624 tm6000_set_reg(dev,
625 REQ_03_SET_GET_MCU_PIN, dev->vinput[dev->input].v_gpio, 1);
626 break;
627 default:
628 break;
629 }
630 switch (dev->vinput[dev->input].amux) {
631 case TM6000_AMUX_ADC1:
632 tm6000_set_reg_mask(dev,
633 TM6000_REQ07_REB_VADC_AADC_MODE, 0x00, 0x0f);
634 break;
635 case TM6000_AMUX_ADC2:
636 tm6000_set_reg_mask(dev,
637 TM6000_REQ07_REB_VADC_AADC_MODE, 0x04, 0x0f);
638 break;
639 default:
640 break;
641 }
642 }
643 if (dev->vinput[dev->input].type == TM6000_INPUT_SVIDEO) {
1176 for (i = 0; i < ARRAY_SIZE(svideo_stds); i++) { 644 for (i = 0; i < ARRAY_SIZE(svideo_stds); i++) {
1177 if (*norm & svideo_stds[i].id) { 645 if (dev->norm & svideo_stds[i].id) {
1178 rc = tm6000_load_std(dev, svideo_stds[i].common, 646 rc = tm6000_load_std(dev, svideo_stds[i].common,
1179 sizeof(svideo_stds[i]. 647 sizeof(svideo_stds[i].
1180 common)); 648 common));
@@ -1182,14 +650,13 @@ int tm6000_set_standard(struct tm6000_core *dev, v4l2_std_id * norm)
1182 } 650 }
1183 } 651 }
1184 return -EINVAL; 652 return -EINVAL;
1185 case TM6000_INPUT_COMPOSITE: 653 } else {
1186 for (i = 0; i < ARRAY_SIZE(composite_stds); i++) { 654 for (i = 0; i < ARRAY_SIZE(composite_stds); i++) {
1187 if (*norm & composite_stds[i].id) { 655 if (dev->norm & composite_stds[i].id) {
1188 rc = tm6000_load_std(dev, 656 rc = tm6000_load_std(dev,
1189 composite_stds[i].common, 657 composite_stds[i].common,
1190 sizeof(composite_stds[i]. 658 sizeof(composite_stds[i].
1191 common)); 659 common));
1192 tm6000_set_audio_std(dev, composite_stds[i].audio_default_std);
1193 goto ret; 660 goto ret;
1194 } 661 }
1195 } 662 }
@@ -1200,6 +667,11 @@ ret:
1200 if (rc < 0) 667 if (rc < 0)
1201 return rc; 668 return rc;
1202 669
670 if ((dev->dev_type == TM6010) &&
671 ((dev->vinput[dev->input].amux == TM6000_AMUX_SIF1) ||
672 (dev->vinput[dev->input].amux == TM6000_AMUX_SIF2)))
673 tm6000_set_audio_std(dev);
674
1203 msleep(40); 675 msleep(40);
1204 676
1205 677
diff --git a/drivers/staging/tm6000/tm6000-video.c b/drivers/staging/tm6000/tm6000-video.c
index 8b3bf7e3e39..a9a5919c28e 100644
--- a/drivers/staging/tm6000/tm6000-video.c
+++ b/drivers/staging/tm6000/tm6000-video.c
@@ -1271,6 +1271,7 @@ static int vidioc_s_tuner(struct file *file, void *priv,
1271 dprintk(dev, 3, "audio mode: %x\n", t->audmode); 1271 dprintk(dev, 3, "audio mode: %x\n", t->audmode);
1272 1272
1273 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_tuner, t); 1273 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_tuner, t);
1274
1274 return 0; 1275 return 0;
1275} 1276}
1276 1277
@@ -1537,16 +1538,12 @@ static int tm6000_open(struct file *file)
1537 1538
1538 if (fh->radio) { 1539 if (fh->radio) {
1539 dprintk(dev, V4L2_DEBUG_OPEN, "video_open: setting radio device\n"); 1540 dprintk(dev, V4L2_DEBUG_OPEN, "video_open: setting radio device\n");
1540 tm6000_set_audio_input(dev, dev->aradio); 1541 dev->input = 5;
1541 tm6000_set_volume(dev, dev->ctl_volume); 1542 tm6000_set_audio_rinput(dev);
1542 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_radio); 1543 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_radio);
1543 tm6000_prepare_isoc(dev); 1544 tm6000_prepare_isoc(dev);
1544 tm6000_start_thread(dev); 1545 tm6000_start_thread(dev);
1545 } 1546 }
1546 else {
1547 tm6000_set_audio_input(dev, dev->avideo);
1548 tm6000_set_volume(dev, dev->ctl_volume);
1549 }
1550 1547
1551 return 0; 1548 return 0;
1552} 1549}
diff --git a/drivers/staging/tm6000/tm6000.h b/drivers/staging/tm6000/tm6000.h
index 650decd2afa..e4ca8968451 100644
--- a/drivers/staging/tm6000/tm6000.h
+++ b/drivers/staging/tm6000/tm6000.h
@@ -320,7 +320,7 @@ int tm6000_init(struct tm6000_core *dev);
320int tm6000_init_analog_mode(struct tm6000_core *dev); 320int tm6000_init_analog_mode(struct tm6000_core *dev);
321int tm6000_init_digital_mode(struct tm6000_core *dev); 321int tm6000_init_digital_mode(struct tm6000_core *dev);
322int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate); 322int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate);
323int tm6000_set_audio_input(struct tm6000_core *dev, enum tm6000_inaudio ainp); 323int tm6000_set_audio_rinput(struct tm6000_core *dev);
324int tm6000_tvaudio_set_mute(struct tm6000_core *dev, u8 mute); 324int tm6000_tvaudio_set_mute(struct tm6000_core *dev, u8 mute);
325void tm6000_set_volume(struct tm6000_core *dev, int vol); 325void tm6000_set_volume(struct tm6000_core *dev, int vol);
326 326
@@ -341,7 +341,7 @@ int tm6000_call_fillbuf(struct tm6000_core *dev, enum tm6000_ops_type type,
341 341
342/* In tm6000-stds.c */ 342/* In tm6000-stds.c */
343void tm6000_get_std_res(struct tm6000_core *dev); 343void tm6000_get_std_res(struct tm6000_core *dev);
344int tm6000_set_standard(struct tm6000_core *dev, v4l2_std_id *norm); 344int tm6000_set_standard(struct tm6000_core *dev);
345 345
346/* In tm6000-i2c.c */ 346/* In tm6000-i2c.c */
347int tm6000_i2c_register(struct tm6000_core *dev); 347int tm6000_i2c_register(struct tm6000_core *dev);
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-19 06:27:33 -0400