diff options
author | Jonathan Herman <hermanjl@cs.unc.edu> | 2013-01-17 16:15:55 -0500 |
---|---|---|
committer | Jonathan Herman <hermanjl@cs.unc.edu> | 2013-01-17 16:15:55 -0500 |
commit | 8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch) | |
tree | a8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /include/video/omapdss.h | |
parent | 406089d01562f1e2bf9f089fd7637009ebaad589 (diff) |
Patched in Tegra support.
Diffstat (limited to 'include/video/omapdss.h')
-rw-r--r-- | include/video/omapdss.h | 487 |
1 files changed, 104 insertions, 383 deletions
diff --git a/include/video/omapdss.h b/include/video/omapdss.h index caefa093337..3b55ef22f8d 100644 --- a/include/video/omapdss.h +++ b/include/video/omapdss.h | |||
@@ -21,7 +21,6 @@ | |||
21 | #include <linux/list.h> | 21 | #include <linux/list.h> |
22 | #include <linux/kobject.h> | 22 | #include <linux/kobject.h> |
23 | #include <linux/device.h> | 23 | #include <linux/device.h> |
24 | #include <linux/interrupt.h> | ||
25 | 24 | ||
26 | #define DISPC_IRQ_FRAMEDONE (1 << 0) | 25 | #define DISPC_IRQ_FRAMEDONE (1 << 0) |
27 | #define DISPC_IRQ_VSYNC (1 << 1) | 26 | #define DISPC_IRQ_VSYNC (1 << 1) |
@@ -42,23 +41,11 @@ | |||
42 | #define DISPC_IRQ_WAKEUP (1 << 16) | 41 | #define DISPC_IRQ_WAKEUP (1 << 16) |
43 | #define DISPC_IRQ_SYNC_LOST2 (1 << 17) | 42 | #define DISPC_IRQ_SYNC_LOST2 (1 << 17) |
44 | #define DISPC_IRQ_VSYNC2 (1 << 18) | 43 | #define DISPC_IRQ_VSYNC2 (1 << 18) |
45 | #define DISPC_IRQ_VID3_END_WIN (1 << 19) | ||
46 | #define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20) | ||
47 | #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21) | 44 | #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21) |
48 | #define DISPC_IRQ_FRAMEDONE2 (1 << 22) | 45 | #define DISPC_IRQ_FRAMEDONE2 (1 << 22) |
49 | #define DISPC_IRQ_FRAMEDONEWB (1 << 23) | ||
50 | #define DISPC_IRQ_FRAMEDONETV (1 << 24) | ||
51 | #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25) | ||
52 | #define DISPC_IRQ_SYNC_LOST3 (1 << 27) | ||
53 | #define DISPC_IRQ_VSYNC3 (1 << 28) | ||
54 | #define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29) | ||
55 | #define DISPC_IRQ_FRAMEDONE3 (1 << 30) | ||
56 | 46 | ||
57 | struct omap_dss_device; | 47 | struct omap_dss_device; |
58 | struct omap_overlay_manager; | 48 | struct omap_overlay_manager; |
59 | struct dss_lcd_mgr_config; | ||
60 | struct snd_aes_iec958; | ||
61 | struct snd_cea_861_aud_if; | ||
62 | 49 | ||
63 | enum omap_display_type { | 50 | enum omap_display_type { |
64 | OMAP_DISPLAY_TYPE_NONE = 0, | 51 | OMAP_DISPLAY_TYPE_NONE = 0, |
@@ -73,16 +60,13 @@ enum omap_display_type { | |||
73 | enum omap_plane { | 60 | enum omap_plane { |
74 | OMAP_DSS_GFX = 0, | 61 | OMAP_DSS_GFX = 0, |
75 | OMAP_DSS_VIDEO1 = 1, | 62 | OMAP_DSS_VIDEO1 = 1, |
76 | OMAP_DSS_VIDEO2 = 2, | 63 | OMAP_DSS_VIDEO2 = 2 |
77 | OMAP_DSS_VIDEO3 = 3, | ||
78 | OMAP_DSS_WB = 4, | ||
79 | }; | 64 | }; |
80 | 65 | ||
81 | enum omap_channel { | 66 | enum omap_channel { |
82 | OMAP_DSS_CHANNEL_LCD = 0, | 67 | OMAP_DSS_CHANNEL_LCD = 0, |
83 | OMAP_DSS_CHANNEL_DIGIT = 1, | 68 | OMAP_DSS_CHANNEL_DIGIT = 1, |
84 | OMAP_DSS_CHANNEL_LCD2 = 2, | 69 | OMAP_DSS_CHANNEL_LCD2 = 2, |
85 | OMAP_DSS_CHANNEL_LCD3 = 3, | ||
86 | }; | 70 | }; |
87 | 71 | ||
88 | enum omap_color_mode { | 72 | enum omap_color_mode { |
@@ -107,6 +91,11 @@ enum omap_color_mode { | |||
107 | OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */ | 91 | OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */ |
108 | }; | 92 | }; |
109 | 93 | ||
94 | enum omap_lcd_display_type { | ||
95 | OMAP_DSS_LCD_DISPLAY_STN, | ||
96 | OMAP_DSS_LCD_DISPLAY_TFT, | ||
97 | }; | ||
98 | |||
110 | enum omap_dss_load_mode { | 99 | enum omap_dss_load_mode { |
111 | OMAP_DSS_LOAD_CLUT_AND_FRAME = 0, | 100 | OMAP_DSS_LOAD_CLUT_AND_FRAME = 0, |
112 | OMAP_DSS_LOAD_CLUT_ONLY = 1, | 101 | OMAP_DSS_LOAD_CLUT_ONLY = 1, |
@@ -124,15 +113,15 @@ enum omap_rfbi_te_mode { | |||
124 | OMAP_DSS_RFBI_TE_MODE_2 = 2, | 113 | OMAP_DSS_RFBI_TE_MODE_2 = 2, |
125 | }; | 114 | }; |
126 | 115 | ||
127 | enum omap_dss_signal_level { | 116 | enum omap_panel_config { |
128 | OMAPDSS_SIG_ACTIVE_HIGH = 0, | 117 | OMAP_DSS_LCD_IVS = 1<<0, |
129 | OMAPDSS_SIG_ACTIVE_LOW = 1, | 118 | OMAP_DSS_LCD_IHS = 1<<1, |
130 | }; | 119 | OMAP_DSS_LCD_IPC = 1<<2, |
120 | OMAP_DSS_LCD_IEO = 1<<3, | ||
121 | OMAP_DSS_LCD_RF = 1<<4, | ||
122 | OMAP_DSS_LCD_ONOFF = 1<<5, | ||
131 | 123 | ||
132 | enum omap_dss_signal_edge { | 124 | OMAP_DSS_LCD_TFT = 1<<20, |
133 | OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES, | ||
134 | OMAPDSS_DRIVE_SIG_RISING_EDGE, | ||
135 | OMAPDSS_DRIVE_SIG_FALLING_EDGE, | ||
136 | }; | 125 | }; |
137 | 126 | ||
138 | enum omap_dss_venc_type { | 127 | enum omap_dss_venc_type { |
@@ -140,18 +129,6 @@ enum omap_dss_venc_type { | |||
140 | OMAP_DSS_VENC_TYPE_SVIDEO, | 129 | OMAP_DSS_VENC_TYPE_SVIDEO, |
141 | }; | 130 | }; |
142 | 131 | ||
143 | enum omap_dss_dsi_pixel_format { | ||
144 | OMAP_DSS_DSI_FMT_RGB888, | ||
145 | OMAP_DSS_DSI_FMT_RGB666, | ||
146 | OMAP_DSS_DSI_FMT_RGB666_PACKED, | ||
147 | OMAP_DSS_DSI_FMT_RGB565, | ||
148 | }; | ||
149 | |||
150 | enum omap_dss_dsi_mode { | ||
151 | OMAP_DSS_DSI_CMD_MODE = 0, | ||
152 | OMAP_DSS_DSI_VIDEO_MODE, | ||
153 | }; | ||
154 | |||
155 | enum omap_display_caps { | 132 | enum omap_display_caps { |
156 | OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0, | 133 | OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0, |
157 | OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1, | 134 | OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1, |
@@ -160,19 +137,19 @@ enum omap_display_caps { | |||
160 | enum omap_dss_display_state { | 137 | enum omap_dss_display_state { |
161 | OMAP_DSS_DISPLAY_DISABLED = 0, | 138 | OMAP_DSS_DISPLAY_DISABLED = 0, |
162 | OMAP_DSS_DISPLAY_ACTIVE, | 139 | OMAP_DSS_DISPLAY_ACTIVE, |
140 | OMAP_DSS_DISPLAY_SUSPENDED, | ||
163 | }; | 141 | }; |
164 | 142 | ||
165 | enum omap_dss_audio_state { | 143 | /* XXX perhaps this should be removed */ |
166 | OMAP_DSS_AUDIO_DISABLED = 0, | 144 | enum omap_dss_overlay_managers { |
167 | OMAP_DSS_AUDIO_ENABLED, | 145 | OMAP_DSS_OVL_MGR_LCD, |
168 | OMAP_DSS_AUDIO_CONFIGURED, | 146 | OMAP_DSS_OVL_MGR_TV, |
169 | OMAP_DSS_AUDIO_PLAYING, | 147 | OMAP_DSS_OVL_MGR_LCD2, |
170 | }; | 148 | }; |
171 | 149 | ||
172 | enum omap_dss_rotation_type { | 150 | enum omap_dss_rotation_type { |
173 | OMAP_DSS_ROT_DMA = 1 << 0, | 151 | OMAP_DSS_ROT_DMA = 0, |
174 | OMAP_DSS_ROT_VRFB = 1 << 1, | 152 | OMAP_DSS_ROT_VRFB = 1, |
175 | OMAP_DSS_ROT_TILER = 1 << 2, | ||
176 | }; | 153 | }; |
177 | 154 | ||
178 | /* clockwise rotation angle */ | 155 | /* clockwise rotation angle */ |
@@ -185,15 +162,11 @@ enum omap_dss_rotation_angle { | |||
185 | 162 | ||
186 | enum omap_overlay_caps { | 163 | enum omap_overlay_caps { |
187 | OMAP_DSS_OVL_CAP_SCALE = 1 << 0, | 164 | OMAP_DSS_OVL_CAP_SCALE = 1 << 0, |
188 | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1, | 165 | OMAP_DSS_OVL_CAP_DISPC = 1 << 1, |
189 | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2, | ||
190 | OMAP_DSS_OVL_CAP_ZORDER = 1 << 3, | ||
191 | OMAP_DSS_OVL_CAP_POS = 1 << 4, | ||
192 | OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5, | ||
193 | }; | 166 | }; |
194 | 167 | ||
195 | enum omap_overlay_manager_caps { | 168 | enum omap_overlay_manager_caps { |
196 | OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */ | 169 | OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0, |
197 | }; | 170 | }; |
198 | 171 | ||
199 | enum omap_dss_clk_source { | 172 | enum omap_dss_clk_source { |
@@ -207,20 +180,6 @@ enum omap_dss_clk_source { | |||
207 | OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */ | 180 | OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */ |
208 | }; | 181 | }; |
209 | 182 | ||
210 | enum omap_hdmi_flags { | ||
211 | OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0, | ||
212 | }; | ||
213 | |||
214 | enum omap_dss_output_id { | ||
215 | OMAP_DSS_OUTPUT_DPI = 1 << 0, | ||
216 | OMAP_DSS_OUTPUT_DBI = 1 << 1, | ||
217 | OMAP_DSS_OUTPUT_SDI = 1 << 2, | ||
218 | OMAP_DSS_OUTPUT_DSI1 = 1 << 3, | ||
219 | OMAP_DSS_OUTPUT_DSI2 = 1 << 4, | ||
220 | OMAP_DSS_OUTPUT_VENC = 1 << 5, | ||
221 | OMAP_DSS_OUTPUT_HDMI = 1 << 6, | ||
222 | }; | ||
223 | |||
224 | /* RFBI */ | 183 | /* RFBI */ |
225 | 184 | ||
226 | struct rfbi_timings { | 185 | struct rfbi_timings { |
@@ -256,77 +215,26 @@ void rfbi_bus_lock(void); | |||
256 | void rfbi_bus_unlock(void); | 215 | void rfbi_bus_unlock(void); |
257 | 216 | ||
258 | /* DSI */ | 217 | /* DSI */ |
259 | |||
260 | struct omap_dss_dsi_videomode_timings { | ||
261 | /* DSI video mode blanking data */ | ||
262 | /* Unit: byte clock cycles */ | ||
263 | u16 hsa; | ||
264 | u16 hfp; | ||
265 | u16 hbp; | ||
266 | /* Unit: line clocks */ | ||
267 | u16 vsa; | ||
268 | u16 vfp; | ||
269 | u16 vbp; | ||
270 | |||
271 | /* DSI blanking modes */ | ||
272 | int blanking_mode; | ||
273 | int hsa_blanking_mode; | ||
274 | int hbp_blanking_mode; | ||
275 | int hfp_blanking_mode; | ||
276 | |||
277 | /* Video port sync events */ | ||
278 | bool vp_vsync_end; | ||
279 | bool vp_hsync_end; | ||
280 | |||
281 | bool ddr_clk_always_on; | ||
282 | int window_sync; | ||
283 | }; | ||
284 | |||
285 | void dsi_bus_lock(struct omap_dss_device *dssdev); | 218 | void dsi_bus_lock(struct omap_dss_device *dssdev); |
286 | void dsi_bus_unlock(struct omap_dss_device *dssdev); | 219 | void dsi_bus_unlock(struct omap_dss_device *dssdev); |
287 | int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data, | 220 | int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data, |
288 | int len); | 221 | int len); |
289 | int dsi_vc_generic_write(struct omap_dss_device *dssdev, int channel, u8 *data, | 222 | int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel, |
290 | int len); | 223 | u8 dcs_cmd); |
291 | int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd); | ||
292 | int dsi_vc_generic_write_0(struct omap_dss_device *dssdev, int channel); | ||
293 | int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, | 224 | int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, |
294 | u8 param); | 225 | u8 param); |
295 | int dsi_vc_generic_write_1(struct omap_dss_device *dssdev, int channel, | ||
296 | u8 param); | ||
297 | int dsi_vc_generic_write_2(struct omap_dss_device *dssdev, int channel, | ||
298 | u8 param1, u8 param2); | ||
299 | int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel, | 226 | int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel, |
300 | u8 *data, int len); | 227 | u8 *data, int len); |
301 | int dsi_vc_generic_write_nosync(struct omap_dss_device *dssdev, int channel, | ||
302 | u8 *data, int len); | ||
303 | int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, | 228 | int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, |
304 | u8 *buf, int buflen); | 229 | u8 *buf, int buflen); |
305 | int dsi_vc_generic_read_0(struct omap_dss_device *dssdev, int channel, u8 *buf, | 230 | int dsi_vc_dcs_read_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, |
306 | int buflen); | 231 | u8 *data); |
307 | int dsi_vc_generic_read_1(struct omap_dss_device *dssdev, int channel, u8 param, | 232 | int dsi_vc_dcs_read_2(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, |
308 | u8 *buf, int buflen); | 233 | u8 *data1, u8 *data2); |
309 | int dsi_vc_generic_read_2(struct omap_dss_device *dssdev, int channel, | ||
310 | u8 param1, u8 param2, u8 *buf, int buflen); | ||
311 | int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel, | 234 | int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel, |
312 | u16 len); | 235 | u16 len); |
313 | int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel); | 236 | int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel); |
314 | int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel); | 237 | int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel); |
315 | int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel); | ||
316 | void dsi_disable_video_output(struct omap_dss_device *dssdev, int channel); | ||
317 | |||
318 | enum omapdss_version { | ||
319 | OMAPDSS_VER_UNKNOWN = 0, | ||
320 | OMAPDSS_VER_OMAP24xx, | ||
321 | OMAPDSS_VER_OMAP34xx_ES1, /* OMAP3430 ES1.0, 2.0 */ | ||
322 | OMAPDSS_VER_OMAP34xx_ES3, /* OMAP3430 ES3.0+ */ | ||
323 | OMAPDSS_VER_OMAP3630, | ||
324 | OMAPDSS_VER_AM35xx, | ||
325 | OMAPDSS_VER_OMAP4430_ES1, /* OMAP4430 ES1.0 */ | ||
326 | OMAPDSS_VER_OMAP4430_ES2, /* OMAP4430 ES2.0, 2.1, 2.2 */ | ||
327 | OMAPDSS_VER_OMAP4, /* All other OMAP4s */ | ||
328 | OMAPDSS_VER_OMAP5, | ||
329 | }; | ||
330 | 238 | ||
331 | /* Board specific data */ | 239 | /* Board specific data */ |
332 | struct omap_dss_board_info { | 240 | struct omap_dss_board_info { |
@@ -334,16 +242,23 @@ struct omap_dss_board_info { | |||
334 | int num_devices; | 242 | int num_devices; |
335 | struct omap_dss_device **devices; | 243 | struct omap_dss_device **devices; |
336 | struct omap_dss_device *default_device; | 244 | struct omap_dss_device *default_device; |
337 | int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask); | 245 | void (*dsi_mux_pads)(bool enable); |
338 | void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask); | ||
339 | int (*set_min_bus_tput)(struct device *dev, unsigned long r); | ||
340 | enum omapdss_version version; | ||
341 | }; | 246 | }; |
342 | 247 | ||
248 | #if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS) | ||
343 | /* Init with the board info */ | 249 | /* Init with the board info */ |
344 | extern int omap_display_init(struct omap_dss_board_info *board_data); | 250 | extern int omap_display_init(struct omap_dss_board_info *board_data); |
345 | /* HDMI mux init*/ | 251 | #else |
346 | extern int omap_hdmi_init(enum omap_hdmi_flags flags); | 252 | static inline int omap_display_init(struct omap_dss_board_info *board_data) |
253 | { | ||
254 | return 0; | ||
255 | } | ||
256 | #endif | ||
257 | |||
258 | struct omap_display_platform_data { | ||
259 | struct omap_dss_board_info *board_data; | ||
260 | /* TODO: Additional members to be added when PM is considered */ | ||
261 | }; | ||
347 | 262 | ||
348 | struct omap_video_timings { | 263 | struct omap_video_timings { |
349 | /* Unit: pixels */ | 264 | /* Unit: pixels */ |
@@ -364,19 +279,6 @@ struct omap_video_timings { | |||
364 | u16 vfp; /* Vertical front porch */ | 279 | u16 vfp; /* Vertical front porch */ |
365 | /* Unit: line clocks */ | 280 | /* Unit: line clocks */ |
366 | u16 vbp; /* Vertical back porch */ | 281 | u16 vbp; /* Vertical back porch */ |
367 | |||
368 | /* Vsync logic level */ | ||
369 | enum omap_dss_signal_level vsync_level; | ||
370 | /* Hsync logic level */ | ||
371 | enum omap_dss_signal_level hsync_level; | ||
372 | /* Interlaced or Progressive timings */ | ||
373 | bool interlace; | ||
374 | /* Pixel clock edge to drive LCD data */ | ||
375 | enum omap_dss_signal_edge data_pclk_edge; | ||
376 | /* Data enable logic level */ | ||
377 | enum omap_dss_signal_level de_level; | ||
378 | /* Pixel clock edges to drive HSYNC and VSYNC signals */ | ||
379 | enum omap_dss_signal_edge sync_pclk_edge; | ||
380 | }; | 282 | }; |
381 | 283 | ||
382 | #ifdef CONFIG_OMAP2_DSS_VENC | 284 | #ifdef CONFIG_OMAP2_DSS_VENC |
@@ -395,7 +297,10 @@ struct omap_dss_cpr_coefs { | |||
395 | }; | 297 | }; |
396 | 298 | ||
397 | struct omap_overlay_info { | 299 | struct omap_overlay_info { |
300 | bool enabled; | ||
301 | |||
398 | u32 paddr; | 302 | u32 paddr; |
303 | void __iomem *vaddr; | ||
399 | u32 p_uv_addr; /* for NV12 format */ | 304 | u32 p_uv_addr; /* for NV12 format */ |
400 | u16 screen_width; | 305 | u16 screen_width; |
401 | u16 width; | 306 | u16 width; |
@@ -411,7 +316,6 @@ struct omap_overlay_info { | |||
411 | u16 out_height; /* if 0, out_height == height */ | 316 | u16 out_height; /* if 0, out_height == height */ |
412 | u8 global_alpha; | 317 | u8 global_alpha; |
413 | u8 pre_mult_alpha; | 318 | u8 pre_mult_alpha; |
414 | u8 zorder; | ||
415 | }; | 319 | }; |
416 | 320 | ||
417 | struct omap_overlay { | 321 | struct omap_overlay { |
@@ -420,27 +324,16 @@ struct omap_overlay { | |||
420 | 324 | ||
421 | /* static fields */ | 325 | /* static fields */ |
422 | const char *name; | 326 | const char *name; |
423 | enum omap_plane id; | 327 | int id; |
424 | enum omap_color_mode supported_modes; | 328 | enum omap_color_mode supported_modes; |
425 | enum omap_overlay_caps caps; | 329 | enum omap_overlay_caps caps; |
426 | 330 | ||
427 | /* dynamic fields */ | 331 | /* dynamic fields */ |
428 | struct omap_overlay_manager *manager; | 332 | struct omap_overlay_manager *manager; |
333 | struct omap_overlay_info info; | ||
429 | 334 | ||
430 | /* | 335 | /* if true, info has been changed, but not applied() yet */ |
431 | * The following functions do not block: | 336 | bool info_dirty; |
432 | * | ||
433 | * is_enabled | ||
434 | * set_overlay_info | ||
435 | * get_overlay_info | ||
436 | * | ||
437 | * The rest of the functions may block and cannot be called from | ||
438 | * interrupt context | ||
439 | */ | ||
440 | |||
441 | int (*enable)(struct omap_overlay *ovl); | ||
442 | int (*disable)(struct omap_overlay *ovl); | ||
443 | bool (*is_enabled)(struct omap_overlay *ovl); | ||
444 | 337 | ||
445 | int (*set_manager)(struct omap_overlay *ovl, | 338 | int (*set_manager)(struct omap_overlay *ovl, |
446 | struct omap_overlay_manager *mgr); | 339 | struct omap_overlay_manager *mgr); |
@@ -452,8 +345,6 @@ struct omap_overlay { | |||
452 | struct omap_overlay_info *info); | 345 | struct omap_overlay_info *info); |
453 | 346 | ||
454 | int (*wait_for_go)(struct omap_overlay *ovl); | 347 | int (*wait_for_go)(struct omap_overlay *ovl); |
455 | |||
456 | struct omap_dss_device *(*get_device)(struct omap_overlay *ovl); | ||
457 | }; | 348 | }; |
458 | 349 | ||
459 | struct omap_overlay_manager_info { | 350 | struct omap_overlay_manager_info { |
@@ -463,7 +354,7 @@ struct omap_overlay_manager_info { | |||
463 | u32 trans_key; | 354 | u32 trans_key; |
464 | bool trans_enabled; | 355 | bool trans_enabled; |
465 | 356 | ||
466 | bool partial_alpha_enabled; | 357 | bool alpha_enabled; |
467 | 358 | ||
468 | bool cpr_enable; | 359 | bool cpr_enable; |
469 | struct omap_dss_cpr_coefs cpr_coefs; | 360 | struct omap_dss_cpr_coefs cpr_coefs; |
@@ -471,32 +362,27 @@ struct omap_overlay_manager_info { | |||
471 | 362 | ||
472 | struct omap_overlay_manager { | 363 | struct omap_overlay_manager { |
473 | struct kobject kobj; | 364 | struct kobject kobj; |
365 | struct list_head list; | ||
474 | 366 | ||
475 | /* static fields */ | 367 | /* static fields */ |
476 | const char *name; | 368 | const char *name; |
477 | enum omap_channel id; | 369 | int id; |
478 | enum omap_overlay_manager_caps caps; | 370 | enum omap_overlay_manager_caps caps; |
479 | struct list_head overlays; | 371 | int num_overlays; |
372 | struct omap_overlay **overlays; | ||
480 | enum omap_display_type supported_displays; | 373 | enum omap_display_type supported_displays; |
481 | enum omap_dss_output_id supported_outputs; | ||
482 | 374 | ||
483 | /* dynamic fields */ | 375 | /* dynamic fields */ |
484 | struct omap_dss_output *output; | 376 | struct omap_dss_device *device; |
485 | 377 | struct omap_overlay_manager_info info; | |
486 | /* | 378 | |
487 | * The following functions do not block: | 379 | bool device_changed; |
488 | * | 380 | /* if true, info has been changed but not applied() yet */ |
489 | * set_manager_info | 381 | bool info_dirty; |
490 | * get_manager_info | 382 | |
491 | * apply | 383 | int (*set_device)(struct omap_overlay_manager *mgr, |
492 | * | 384 | struct omap_dss_device *dssdev); |
493 | * The rest of the functions may block and cannot be called from | 385 | int (*unset_device)(struct omap_overlay_manager *mgr); |
494 | * interrupt context | ||
495 | */ | ||
496 | |||
497 | int (*set_output)(struct omap_overlay_manager *mgr, | ||
498 | struct omap_dss_output *output); | ||
499 | int (*unset_output)(struct omap_overlay_manager *mgr); | ||
500 | 386 | ||
501 | int (*set_manager_info)(struct omap_overlay_manager *mgr, | 387 | int (*set_manager_info)(struct omap_overlay_manager *mgr, |
502 | struct omap_overlay_manager_info *info); | 388 | struct omap_overlay_manager_info *info); |
@@ -507,53 +393,8 @@ struct omap_overlay_manager { | |||
507 | int (*wait_for_go)(struct omap_overlay_manager *mgr); | 393 | int (*wait_for_go)(struct omap_overlay_manager *mgr); |
508 | int (*wait_for_vsync)(struct omap_overlay_manager *mgr); | 394 | int (*wait_for_vsync)(struct omap_overlay_manager *mgr); |
509 | 395 | ||
510 | struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr); | 396 | int (*enable)(struct omap_overlay_manager *mgr); |
511 | }; | 397 | int (*disable)(struct omap_overlay_manager *mgr); |
512 | |||
513 | /* 22 pins means 1 clk lane and 10 data lanes */ | ||
514 | #define OMAP_DSS_MAX_DSI_PINS 22 | ||
515 | |||
516 | struct omap_dsi_pin_config { | ||
517 | int num_pins; | ||
518 | /* | ||
519 | * pin numbers in the following order: | ||
520 | * clk+, clk- | ||
521 | * data1+, data1- | ||
522 | * data2+, data2- | ||
523 | * ... | ||
524 | */ | ||
525 | int pins[OMAP_DSS_MAX_DSI_PINS]; | ||
526 | }; | ||
527 | |||
528 | struct omap_dss_writeback_info { | ||
529 | u32 paddr; | ||
530 | u32 p_uv_addr; | ||
531 | u16 buf_width; | ||
532 | u16 width; | ||
533 | u16 height; | ||
534 | enum omap_color_mode color_mode; | ||
535 | u8 rotation; | ||
536 | enum omap_dss_rotation_type rotation_type; | ||
537 | bool mirror; | ||
538 | u8 pre_mult_alpha; | ||
539 | }; | ||
540 | |||
541 | struct omap_dss_output { | ||
542 | struct list_head list; | ||
543 | |||
544 | /* display type supported by the output */ | ||
545 | enum omap_display_type type; | ||
546 | |||
547 | /* output instance */ | ||
548 | enum omap_dss_output_id id; | ||
549 | |||
550 | /* output's platform device pointer */ | ||
551 | struct platform_device *pdev; | ||
552 | |||
553 | /* dynamic fields */ | ||
554 | struct omap_overlay_manager *manager; | ||
555 | |||
556 | struct omap_dss_device *device; | ||
557 | }; | 398 | }; |
558 | 399 | ||
559 | struct omap_dss_device { | 400 | struct omap_dss_device { |
@@ -578,6 +419,17 @@ struct omap_dss_device { | |||
578 | } sdi; | 419 | } sdi; |
579 | 420 | ||
580 | struct { | 421 | struct { |
422 | u8 clk_lane; | ||
423 | u8 clk_pol; | ||
424 | u8 data1_lane; | ||
425 | u8 data1_pol; | ||
426 | u8 data2_lane; | ||
427 | u8 data2_pol; | ||
428 | u8 data3_lane; | ||
429 | u8 data3_pol; | ||
430 | u8 data4_lane; | ||
431 | u8 data4_pol; | ||
432 | |||
581 | int module; | 433 | int module; |
582 | 434 | ||
583 | bool ext_te; | 435 | bool ext_te; |
@@ -602,7 +454,6 @@ struct omap_dss_device { | |||
602 | } dispc; | 454 | } dispc; |
603 | 455 | ||
604 | struct { | 456 | struct { |
605 | /* regn is one greater than TRM's REGN value */ | ||
606 | u16 regn; | 457 | u16 regn; |
607 | u16 regm; | 458 | u16 regm; |
608 | u16 regm_dispc; | 459 | u16 regm_dispc; |
@@ -613,7 +464,6 @@ struct omap_dss_device { | |||
613 | } dsi; | 464 | } dsi; |
614 | 465 | ||
615 | struct { | 466 | struct { |
616 | /* regn is one greater than TRM's REGN value */ | ||
617 | u16 regn; | 467 | u16 regn; |
618 | u16 regm2; | 468 | u16 regm2; |
619 | } hdmi; | 469 | } hdmi; |
@@ -622,9 +472,11 @@ struct omap_dss_device { | |||
622 | struct { | 472 | struct { |
623 | struct omap_video_timings timings; | 473 | struct omap_video_timings timings; |
624 | 474 | ||
625 | enum omap_dss_dsi_pixel_format dsi_pix_fmt; | 475 | int acbi; /* ac-bias pin transitions per interrupt */ |
626 | enum omap_dss_dsi_mode dsi_mode; | 476 | /* Unit: line clocks */ |
627 | struct omap_dss_dsi_videomode_timings dsi_vm_timings; | 477 | int acb; /* ac-bias pin frequency */ |
478 | |||
479 | enum omap_panel_config config; | ||
628 | } panel; | 480 | } panel; |
629 | 481 | ||
630 | struct { | 482 | struct { |
@@ -650,12 +502,10 @@ struct omap_dss_device { | |||
650 | 502 | ||
651 | enum omap_display_caps caps; | 503 | enum omap_display_caps caps; |
652 | 504 | ||
653 | struct omap_dss_output *output; | 505 | struct omap_overlay_manager *manager; |
654 | 506 | ||
655 | enum omap_dss_display_state state; | 507 | enum omap_dss_display_state state; |
656 | 508 | ||
657 | enum omap_dss_audio_state audio_state; | ||
658 | |||
659 | /* platform specific */ | 509 | /* platform specific */ |
660 | int (*platform_enable)(struct omap_dss_device *dssdev); | 510 | int (*platform_enable)(struct omap_dss_device *dssdev); |
661 | void (*platform_disable)(struct omap_dss_device *dssdev); | 511 | void (*platform_disable)(struct omap_dss_device *dssdev); |
@@ -663,18 +513,6 @@ struct omap_dss_device { | |||
663 | int (*get_backlight)(struct omap_dss_device *dssdev); | 513 | int (*get_backlight)(struct omap_dss_device *dssdev); |
664 | }; | 514 | }; |
665 | 515 | ||
666 | struct omap_dss_hdmi_data | ||
667 | { | ||
668 | int ct_cp_hpd_gpio; | ||
669 | int ls_oe_gpio; | ||
670 | int hpd_gpio; | ||
671 | }; | ||
672 | |||
673 | struct omap_dss_audio { | ||
674 | struct snd_aes_iec958 *iec; | ||
675 | struct snd_cea_861_aud_if *cea; | ||
676 | }; | ||
677 | |||
678 | struct omap_dss_driver { | 516 | struct omap_dss_driver { |
679 | struct device_driver driver; | 517 | struct device_driver driver; |
680 | 518 | ||
@@ -683,6 +521,8 @@ struct omap_dss_driver { | |||
683 | 521 | ||
684 | int (*enable)(struct omap_dss_device *display); | 522 | int (*enable)(struct omap_dss_device *display); |
685 | void (*disable)(struct omap_dss_device *display); | 523 | void (*disable)(struct omap_dss_device *display); |
524 | int (*suspend)(struct omap_dss_device *display); | ||
525 | int (*resume)(struct omap_dss_device *display); | ||
686 | int (*run_test)(struct omap_dss_device *display, int test); | 526 | int (*run_test)(struct omap_dss_device *display, int test); |
687 | 527 | ||
688 | int (*update)(struct omap_dss_device *dssdev, | 528 | int (*update)(struct omap_dss_device *dssdev, |
@@ -717,31 +557,8 @@ struct omap_dss_driver { | |||
717 | 557 | ||
718 | int (*set_wss)(struct omap_dss_device *dssdev, u32 wss); | 558 | int (*set_wss)(struct omap_dss_device *dssdev, u32 wss); |
719 | u32 (*get_wss)(struct omap_dss_device *dssdev); | 559 | u32 (*get_wss)(struct omap_dss_device *dssdev); |
720 | |||
721 | int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len); | ||
722 | bool (*detect)(struct omap_dss_device *dssdev); | ||
723 | |||
724 | /* | ||
725 | * For display drivers that support audio. This encompasses | ||
726 | * HDMI and DisplayPort at the moment. | ||
727 | */ | ||
728 | /* | ||
729 | * Note: These functions might sleep. Do not call while | ||
730 | * holding a spinlock/readlock. | ||
731 | */ | ||
732 | int (*audio_enable)(struct omap_dss_device *dssdev); | ||
733 | void (*audio_disable)(struct omap_dss_device *dssdev); | ||
734 | bool (*audio_supported)(struct omap_dss_device *dssdev); | ||
735 | int (*audio_config)(struct omap_dss_device *dssdev, | ||
736 | struct omap_dss_audio *audio); | ||
737 | /* Note: These functions may not sleep */ | ||
738 | int (*audio_start)(struct omap_dss_device *dssdev); | ||
739 | void (*audio_stop)(struct omap_dss_device *dssdev); | ||
740 | |||
741 | }; | 560 | }; |
742 | 561 | ||
743 | enum omapdss_version omapdss_get_version(void); | ||
744 | |||
745 | int omap_dss_register_driver(struct omap_dss_driver *); | 562 | int omap_dss_register_driver(struct omap_dss_driver *); |
746 | void omap_dss_unregister_driver(struct omap_dss_driver *); | 563 | void omap_dss_unregister_driver(struct omap_dss_driver *); |
747 | 564 | ||
@@ -751,77 +568,27 @@ void omap_dss_put_device(struct omap_dss_device *dssdev); | |||
751 | struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from); | 568 | struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from); |
752 | struct omap_dss_device *omap_dss_find_device(void *data, | 569 | struct omap_dss_device *omap_dss_find_device(void *data, |
753 | int (*match)(struct omap_dss_device *dssdev, void *data)); | 570 | int (*match)(struct omap_dss_device *dssdev, void *data)); |
754 | const char *omapdss_get_default_display_name(void); | ||
755 | 571 | ||
756 | int omap_dss_start_device(struct omap_dss_device *dssdev); | 572 | int omap_dss_start_device(struct omap_dss_device *dssdev); |
757 | void omap_dss_stop_device(struct omap_dss_device *dssdev); | 573 | void omap_dss_stop_device(struct omap_dss_device *dssdev); |
758 | 574 | ||
759 | int dss_feat_get_num_mgrs(void); | ||
760 | int dss_feat_get_num_ovls(void); | ||
761 | enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel); | ||
762 | enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel); | ||
763 | enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane); | ||
764 | |||
765 | |||
766 | |||
767 | int omap_dss_get_num_overlay_managers(void); | 575 | int omap_dss_get_num_overlay_managers(void); |
768 | struct omap_overlay_manager *omap_dss_get_overlay_manager(int num); | 576 | struct omap_overlay_manager *omap_dss_get_overlay_manager(int num); |
769 | 577 | ||
770 | int omap_dss_get_num_overlays(void); | 578 | int omap_dss_get_num_overlays(void); |
771 | struct omap_overlay *omap_dss_get_overlay(int num); | 579 | struct omap_overlay *omap_dss_get_overlay(int num); |
772 | 580 | ||
773 | struct omap_dss_output *omap_dss_get_output(enum omap_dss_output_id id); | ||
774 | int omapdss_output_set_device(struct omap_dss_output *out, | ||
775 | struct omap_dss_device *dssdev); | ||
776 | int omapdss_output_unset_device(struct omap_dss_output *out); | ||
777 | |||
778 | void omapdss_default_get_resolution(struct omap_dss_device *dssdev, | 581 | void omapdss_default_get_resolution(struct omap_dss_device *dssdev, |
779 | u16 *xres, u16 *yres); | 582 | u16 *xres, u16 *yres); |
780 | int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev); | 583 | int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev); |
781 | void omapdss_default_get_timings(struct omap_dss_device *dssdev, | ||
782 | struct omap_video_timings *timings); | ||
783 | 584 | ||
784 | typedef void (*omap_dispc_isr_t) (void *arg, u32 mask); | 585 | typedef void (*omap_dispc_isr_t) (void *arg, u32 mask); |
785 | int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask); | 586 | int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask); |
786 | int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask); | 587 | int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask); |
787 | 588 | ||
788 | u32 dispc_read_irqstatus(void); | 589 | int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout); |
789 | void dispc_clear_irqstatus(u32 mask); | 590 | int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask, |
790 | u32 dispc_read_irqenable(void); | 591 | unsigned long timeout); |
791 | void dispc_write_irqenable(u32 mask); | ||
792 | |||
793 | int dispc_request_irq(irq_handler_t handler, void *dev_id); | ||
794 | void dispc_free_irq(void *dev_id); | ||
795 | |||
796 | int dispc_runtime_get(void); | ||
797 | void dispc_runtime_put(void); | ||
798 | |||
799 | void dispc_mgr_enable(enum omap_channel channel, bool enable); | ||
800 | bool dispc_mgr_is_enabled(enum omap_channel channel); | ||
801 | u32 dispc_mgr_get_vsync_irq(enum omap_channel channel); | ||
802 | u32 dispc_mgr_get_framedone_irq(enum omap_channel channel); | ||
803 | u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel); | ||
804 | bool dispc_mgr_go_busy(enum omap_channel channel); | ||
805 | void dispc_mgr_go(enum omap_channel channel); | ||
806 | void dispc_mgr_set_lcd_config(enum omap_channel channel, | ||
807 | const struct dss_lcd_mgr_config *config); | ||
808 | void dispc_mgr_set_timings(enum omap_channel channel, | ||
809 | const struct omap_video_timings *timings); | ||
810 | void dispc_mgr_setup(enum omap_channel channel, | ||
811 | const struct omap_overlay_manager_info *info); | ||
812 | |||
813 | int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel, | ||
814 | const struct omap_overlay_info *oi, | ||
815 | const struct omap_video_timings *timings, | ||
816 | int *x_predecim, int *y_predecim); | ||
817 | |||
818 | int dispc_ovl_enable(enum omap_plane plane, bool enable); | ||
819 | bool dispc_ovl_enabled(enum omap_plane plane); | ||
820 | void dispc_ovl_set_channel_out(enum omap_plane plane, | ||
821 | enum omap_channel channel); | ||
822 | int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi, | ||
823 | bool replication, const struct omap_video_timings *mgr_timings, | ||
824 | bool mem_to_mem); | ||
825 | 592 | ||
826 | #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver) | 593 | #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver) |
827 | #define to_dss_device(x) container_of((x), struct omap_dss_device, dev) | 594 | #define to_dss_device(x) container_of((x), struct omap_dss_device, dev) |
@@ -829,25 +596,17 @@ int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi, | |||
829 | void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel, | 596 | void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel, |
830 | bool enable); | 597 | bool enable); |
831 | int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable); | 598 | int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable); |
832 | void omapdss_dsi_set_timings(struct omap_dss_device *dssdev, | 599 | |
833 | struct omap_video_timings *timings); | 600 | int omap_dsi_prepare_update(struct omap_dss_device *dssdev, |
834 | void omapdss_dsi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h); | 601 | u16 *x, u16 *y, u16 *w, u16 *h, |
835 | void omapdss_dsi_set_pixel_format(struct omap_dss_device *dssdev, | 602 | bool enlarge_update_area); |
836 | enum omap_dss_dsi_pixel_format fmt); | 603 | int omap_dsi_update(struct omap_dss_device *dssdev, |
837 | void omapdss_dsi_set_operation_mode(struct omap_dss_device *dssdev, | 604 | int channel, |
838 | enum omap_dss_dsi_mode mode); | 605 | u16 x, u16 y, u16 w, u16 h, |
839 | void omapdss_dsi_set_videomode_timings(struct omap_dss_device *dssdev, | ||
840 | struct omap_dss_dsi_videomode_timings *timings); | ||
841 | |||
842 | int omap_dsi_update(struct omap_dss_device *dssdev, int channel, | ||
843 | void (*callback)(int, void *), void *data); | 606 | void (*callback)(int, void *), void *data); |
844 | int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel); | 607 | int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel); |
845 | int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id); | 608 | int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id); |
846 | void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel); | 609 | void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel); |
847 | int omapdss_dsi_configure_pins(struct omap_dss_device *dssdev, | ||
848 | const struct omap_dsi_pin_config *pin_cfg); | ||
849 | int omapdss_dsi_set_clocks(struct omap_dss_device *dssdev, | ||
850 | unsigned long ddr_clk, unsigned long lp_clk); | ||
851 | 610 | ||
852 | int omapdss_dsi_display_enable(struct omap_dss_device *dssdev); | 611 | int omapdss_dsi_display_enable(struct omap_dss_device *dssdev); |
853 | void omapdss_dsi_display_disable(struct omap_dss_device *dssdev, | 612 | void omapdss_dsi_display_disable(struct omap_dss_device *dssdev, |
@@ -855,60 +614,22 @@ void omapdss_dsi_display_disable(struct omap_dss_device *dssdev, | |||
855 | 614 | ||
856 | int omapdss_dpi_display_enable(struct omap_dss_device *dssdev); | 615 | int omapdss_dpi_display_enable(struct omap_dss_device *dssdev); |
857 | void omapdss_dpi_display_disable(struct omap_dss_device *dssdev); | 616 | void omapdss_dpi_display_disable(struct omap_dss_device *dssdev); |
858 | void omapdss_dpi_set_timings(struct omap_dss_device *dssdev, | 617 | void dpi_set_timings(struct omap_dss_device *dssdev, |
859 | struct omap_video_timings *timings); | 618 | struct omap_video_timings *timings); |
860 | int dpi_check_timings(struct omap_dss_device *dssdev, | 619 | int dpi_check_timings(struct omap_dss_device *dssdev, |
861 | struct omap_video_timings *timings); | 620 | struct omap_video_timings *timings); |
862 | void omapdss_dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines); | ||
863 | 621 | ||
864 | int omapdss_sdi_display_enable(struct omap_dss_device *dssdev); | 622 | int omapdss_sdi_display_enable(struct omap_dss_device *dssdev); |
865 | void omapdss_sdi_display_disable(struct omap_dss_device *dssdev); | 623 | void omapdss_sdi_display_disable(struct omap_dss_device *dssdev); |
866 | void omapdss_sdi_set_timings(struct omap_dss_device *dssdev, | ||
867 | struct omap_video_timings *timings); | ||
868 | void omapdss_sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs); | ||
869 | 624 | ||
870 | int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev); | 625 | int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev); |
871 | void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev); | 626 | void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev); |
872 | int omap_rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *), | 627 | int omap_rfbi_prepare_update(struct omap_dss_device *dssdev, |
873 | void *data); | 628 | u16 *x, u16 *y, u16 *w, u16 *h); |
874 | int omap_rfbi_configure(struct omap_dss_device *dssdev); | 629 | int omap_rfbi_update(struct omap_dss_device *dssdev, |
875 | void omapdss_rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h); | 630 | u16 x, u16 y, u16 w, u16 h, |
876 | void omapdss_rfbi_set_pixel_size(struct omap_dss_device *dssdev, | 631 | void (*callback)(void *), void *data); |
877 | int pixel_size); | 632 | int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size, |
878 | void omapdss_rfbi_set_data_lines(struct omap_dss_device *dssdev, | ||
879 | int data_lines); | 633 | int data_lines); |
880 | void omapdss_rfbi_set_interface_timings(struct omap_dss_device *dssdev, | ||
881 | struct rfbi_timings *timings); | ||
882 | |||
883 | int omapdss_compat_init(void); | ||
884 | void omapdss_compat_uninit(void); | ||
885 | |||
886 | struct dss_mgr_ops { | ||
887 | void (*start_update)(struct omap_overlay_manager *mgr); | ||
888 | int (*enable)(struct omap_overlay_manager *mgr); | ||
889 | void (*disable)(struct omap_overlay_manager *mgr); | ||
890 | void (*set_timings)(struct omap_overlay_manager *mgr, | ||
891 | const struct omap_video_timings *timings); | ||
892 | void (*set_lcd_config)(struct omap_overlay_manager *mgr, | ||
893 | const struct dss_lcd_mgr_config *config); | ||
894 | int (*register_framedone_handler)(struct omap_overlay_manager *mgr, | ||
895 | void (*handler)(void *), void *data); | ||
896 | void (*unregister_framedone_handler)(struct omap_overlay_manager *mgr, | ||
897 | void (*handler)(void *), void *data); | ||
898 | }; | ||
899 | 634 | ||
900 | int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops); | ||
901 | void dss_uninstall_mgr_ops(void); | ||
902 | |||
903 | void dss_mgr_set_timings(struct omap_overlay_manager *mgr, | ||
904 | const struct omap_video_timings *timings); | ||
905 | void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr, | ||
906 | const struct dss_lcd_mgr_config *config); | ||
907 | int dss_mgr_enable(struct omap_overlay_manager *mgr); | ||
908 | void dss_mgr_disable(struct omap_overlay_manager *mgr); | ||
909 | void dss_mgr_start_update(struct omap_overlay_manager *mgr); | ||
910 | int dss_mgr_register_framedone_handler(struct omap_overlay_manager *mgr, | ||
911 | void (*handler)(void *), void *data); | ||
912 | void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr, | ||
913 | void (*handler)(void *), void *data); | ||
914 | #endif | 635 | #endif |