diff options
author | Jonathan Herman <hermanjl@cs.unc.edu> | 2013-01-17 16:15:55 -0500 |
---|---|---|
committer | Jonathan Herman <hermanjl@cs.unc.edu> | 2013-01-17 16:15:55 -0500 |
commit | 8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch) | |
tree | a8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /drivers/hwmon/dme1737.c | |
parent | 406089d01562f1e2bf9f089fd7637009ebaad589 (diff) |
Patched in Tegra support.
Diffstat (limited to 'drivers/hwmon/dme1737.c')
-rw-r--r-- | drivers/hwmon/dme1737.c | 567 |
1 files changed, 256 insertions, 311 deletions
diff --git a/drivers/hwmon/dme1737.c b/drivers/hwmon/dme1737.c index 7430f70ae45..d9c59271391 100644 --- a/drivers/hwmon/dme1737.c +++ b/drivers/hwmon/dme1737.c | |||
@@ -45,7 +45,7 @@ | |||
45 | static struct platform_device *pdev; | 45 | static struct platform_device *pdev; |
46 | 46 | ||
47 | /* Module load parameters */ | 47 | /* Module load parameters */ |
48 | static bool force_start; | 48 | static int force_start; |
49 | module_param(force_start, bool, 0); | 49 | module_param(force_start, bool, 0); |
50 | MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs"); | 50 | MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs"); |
51 | 51 | ||
@@ -53,7 +53,7 @@ static unsigned short force_id; | |||
53 | module_param(force_id, ushort, 0); | 53 | module_param(force_id, ushort, 0); |
54 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | 54 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); |
55 | 55 | ||
56 | static bool probe_all_addr; | 56 | static int probe_all_addr; |
57 | module_param(probe_all_addr, bool, 0); | 57 | module_param(probe_all_addr, bool, 0); |
58 | MODULE_PARM_DESC(probe_all_addr, "Include probing of non-standard LPC " | 58 | MODULE_PARM_DESC(probe_all_addr, "Include probing of non-standard LPC " |
59 | "addresses"); | 59 | "addresses"); |
@@ -82,12 +82,12 @@ enum chips { dme1737, sch5027, sch311x, sch5127 }; | |||
82 | * --------------------------------------------------------------------- */ | 82 | * --------------------------------------------------------------------- */ |
83 | 83 | ||
84 | /* Voltages (in) numbered 0-7 (ix) */ | 84 | /* Voltages (in) numbered 0-7 (ix) */ |
85 | #define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) : \ | 85 | #define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) : \ |
86 | (ix) < 7 ? 0x94 + (ix) : \ | 86 | (ix) < 7 ? 0x94 + (ix) : \ |
87 | 0x1f) | 87 | 0x1f) |
88 | #define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \ | 88 | #define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \ |
89 | : 0x91 + (ix) * 2) | 89 | : 0x91 + (ix) * 2) |
90 | #define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \ | 90 | #define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \ |
91 | : 0x92 + (ix) * 2) | 91 | : 0x92 + (ix) * 2) |
92 | 92 | ||
93 | /* Temperatures (temp) numbered 0-2 (ix) */ | 93 | /* Temperatures (temp) numbered 0-2 (ix) */ |
@@ -97,16 +97,14 @@ enum chips { dme1737, sch5027, sch311x, sch5127 }; | |||
97 | #define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \ | 97 | #define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \ |
98 | : 0x1c + (ix)) | 98 | : 0x1c + (ix)) |
99 | 99 | ||
100 | /* | 100 | /* Voltage and temperature LSBs |
101 | * Voltage and temperature LSBs | ||
102 | * The LSBs (4 bits each) are stored in 5 registers with the following layouts: | 101 | * The LSBs (4 bits each) are stored in 5 registers with the following layouts: |
103 | * IN_TEMP_LSB(0) = [in5, in6] | 102 | * IN_TEMP_LSB(0) = [in5, in6] |
104 | * IN_TEMP_LSB(1) = [temp3, temp1] | 103 | * IN_TEMP_LSB(1) = [temp3, temp1] |
105 | * IN_TEMP_LSB(2) = [in4, temp2] | 104 | * IN_TEMP_LSB(2) = [in4, temp2] |
106 | * IN_TEMP_LSB(3) = [in3, in0] | 105 | * IN_TEMP_LSB(3) = [in3, in0] |
107 | * IN_TEMP_LSB(4) = [in2, in1] | 106 | * IN_TEMP_LSB(4) = [in2, in1] |
108 | * IN_TEMP_LSB(5) = [res, in7] | 107 | * IN_TEMP_LSB(5) = [res, in7] */ |
109 | */ | ||
110 | #define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix)) | 108 | #define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix)) |
111 | static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0, 5}; | 109 | static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0, 5}; |
112 | static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4, 4}; | 110 | static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4, 4}; |
@@ -129,30 +127,24 @@ static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0}; | |||
129 | #define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */ | 127 | #define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */ |
130 | #define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \ | 128 | #define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \ |
131 | : 0xa3 + (ix)) | 129 | : 0xa3 + (ix)) |
132 | /* | 130 | /* The layout of the ramp rate registers is different from the other pwm |
133 | * The layout of the ramp rate registers is different from the other pwm | ||
134 | * registers. The bits for the 3 PWMs are stored in 2 registers: | 131 | * registers. The bits for the 3 PWMs are stored in 2 registers: |
135 | * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0] | 132 | * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0] |
136 | * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] | 133 | * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */ |
137 | */ | ||
138 | #define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */ | 134 | #define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */ |
139 | 135 | ||
140 | /* Thermal zones 0-2 */ | 136 | /* Thermal zones 0-2 */ |
141 | #define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix)) | 137 | #define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix)) |
142 | #define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix)) | 138 | #define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix)) |
143 | /* | 139 | /* The layout of the hysteresis registers is different from the other zone |
144 | * The layout of the hysteresis registers is different from the other zone | ||
145 | * registers. The bits for the 3 zones are stored in 2 registers: | 140 | * registers. The bits for the 3 zones are stored in 2 registers: |
146 | * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] | 141 | * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] |
147 | * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] | 142 | * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */ |
148 | */ | ||
149 | #define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix)) | 143 | #define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix)) |
150 | 144 | ||
151 | /* | 145 | /* Alarm registers and bit mapping |
152 | * Alarm registers and bit mapping | ||
153 | * The 3 8-bit alarm registers will be concatenated to a single 32-bit | 146 | * The 3 8-bit alarm registers will be concatenated to a single 32-bit |
154 | * alarm value [0, ALARM3, ALARM2, ALARM1]. | 147 | * alarm value [0, ALARM3, ALARM2, ALARM1]. */ |
155 | */ | ||
156 | #define DME1737_REG_ALARM1 0x41 | 148 | #define DME1737_REG_ALARM1 0x41 |
157 | #define DME1737_REG_ALARM2 0x42 | 149 | #define DME1737_REG_ALARM2 0x42 |
158 | #define DME1737_REG_ALARM3 0x83 | 150 | #define DME1737_REG_ALARM3 0x83 |
@@ -265,11 +257,9 @@ static const int IN_NOMINAL_SCH5127[] = {2500, 2250, 3300, 1125, 1125, 3300, | |||
265 | (type) == sch5127 ? IN_NOMINAL_SCH5127 : \ | 257 | (type) == sch5127 ? IN_NOMINAL_SCH5127 : \ |
266 | IN_NOMINAL_DME1737) | 258 | IN_NOMINAL_DME1737) |
267 | 259 | ||
268 | /* | 260 | /* Voltage input |
269 | * Voltage input | ||
270 | * Voltage inputs have 16 bits resolution, limit values have 8 bits | 261 | * Voltage inputs have 16 bits resolution, limit values have 8 bits |
271 | * resolution. | 262 | * resolution. */ |
272 | */ | ||
273 | static inline int IN_FROM_REG(int reg, int nominal, int res) | 263 | static inline int IN_FROM_REG(int reg, int nominal, int res) |
274 | { | 264 | { |
275 | return (reg * nominal + (3 << (res - 3))) / (3 << (res - 2)); | 265 | return (reg * nominal + (3 << (res - 3))) / (3 << (res - 2)); |
@@ -280,12 +270,10 @@ static inline int IN_TO_REG(int val, int nominal) | |||
280 | return SENSORS_LIMIT((val * 192 + nominal / 2) / nominal, 0, 255); | 270 | return SENSORS_LIMIT((val * 192 + nominal / 2) / nominal, 0, 255); |
281 | } | 271 | } |
282 | 272 | ||
283 | /* | 273 | /* Temperature input |
284 | * Temperature input | ||
285 | * The register values represent temperatures in 2's complement notation from | 274 | * The register values represent temperatures in 2's complement notation from |
286 | * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit | 275 | * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit |
287 | * values have 8 bits resolution. | 276 | * values have 8 bits resolution. */ |
288 | */ | ||
289 | static inline int TEMP_FROM_REG(int reg, int res) | 277 | static inline int TEMP_FROM_REG(int reg, int res) |
290 | { | 278 | { |
291 | return (reg * 1000) >> (res - 8); | 279 | return (reg * 1000) >> (res - 8); |
@@ -312,19 +300,18 @@ static int TEMP_RANGE_TO_REG(int val, int reg) | |||
312 | int i; | 300 | int i; |
313 | 301 | ||
314 | for (i = 15; i > 0; i--) { | 302 | for (i = 15; i > 0; i--) { |
315 | if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2) | 303 | if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2) { |
316 | break; | 304 | break; |
305 | } | ||
317 | } | 306 | } |
318 | 307 | ||
319 | return (reg & 0x0f) | (i << 4); | 308 | return (reg & 0x0f) | (i << 4); |
320 | } | 309 | } |
321 | 310 | ||
322 | /* | 311 | /* Temperature hysteresis |
323 | * Temperature hysteresis | ||
324 | * Register layout: | 312 | * Register layout: |
325 | * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] | 313 | * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] |
326 | * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] | 314 | * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */ |
327 | */ | ||
328 | static inline int TEMP_HYST_FROM_REG(int reg, int ix) | 315 | static inline int TEMP_HYST_FROM_REG(int reg, int ix) |
329 | { | 316 | { |
330 | return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000; | 317 | return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000; |
@@ -340,10 +327,11 @@ static inline int TEMP_HYST_TO_REG(int val, int ix, int reg) | |||
340 | /* Fan input RPM */ | 327 | /* Fan input RPM */ |
341 | static inline int FAN_FROM_REG(int reg, int tpc) | 328 | static inline int FAN_FROM_REG(int reg, int tpc) |
342 | { | 329 | { |
343 | if (tpc) | 330 | if (tpc) { |
344 | return tpc * reg; | 331 | return tpc * reg; |
345 | else | 332 | } else { |
346 | return (reg == 0 || reg == 0xffff) ? 0 : 90000 * 60 / reg; | 333 | return (reg == 0 || reg == 0xffff) ? 0 : 90000 * 60 / reg; |
334 | } | ||
347 | } | 335 | } |
348 | 336 | ||
349 | static inline int FAN_TO_REG(int val, int tpc) | 337 | static inline int FAN_TO_REG(int val, int tpc) |
@@ -356,21 +344,17 @@ static inline int FAN_TO_REG(int val, int tpc) | |||
356 | } | 344 | } |
357 | } | 345 | } |
358 | 346 | ||
359 | /* | 347 | /* Fan TPC (tach pulse count) |
360 | * Fan TPC (tach pulse count) | ||
361 | * Converts a register value to a TPC multiplier or returns 0 if the tachometer | 348 | * Converts a register value to a TPC multiplier or returns 0 if the tachometer |
362 | * is configured in legacy (non-tpc) mode | 349 | * is configured in legacy (non-tpc) mode */ |
363 | */ | ||
364 | static inline int FAN_TPC_FROM_REG(int reg) | 350 | static inline int FAN_TPC_FROM_REG(int reg) |
365 | { | 351 | { |
366 | return (reg & 0x20) ? 0 : 60 >> (reg & 0x03); | 352 | return (reg & 0x20) ? 0 : 60 >> (reg & 0x03); |
367 | } | 353 | } |
368 | 354 | ||
369 | /* | 355 | /* Fan type |
370 | * Fan type | ||
371 | * The type of a fan is expressed in number of pulses-per-revolution that it | 356 | * The type of a fan is expressed in number of pulses-per-revolution that it |
372 | * emits | 357 | * emits */ |
373 | */ | ||
374 | static inline int FAN_TYPE_FROM_REG(int reg) | 358 | static inline int FAN_TYPE_FROM_REG(int reg) |
375 | { | 359 | { |
376 | int edge = (reg >> 1) & 0x03; | 360 | int edge = (reg >> 1) & 0x03; |
@@ -394,8 +378,9 @@ static int FAN_MAX_FROM_REG(int reg) | |||
394 | int i; | 378 | int i; |
395 | 379 | ||
396 | for (i = 10; i > 0; i--) { | 380 | for (i = 10; i > 0; i--) { |
397 | if (reg == FAN_MAX[i]) | 381 | if (reg == FAN_MAX[i]) { |
398 | break; | 382 | break; |
383 | } | ||
399 | } | 384 | } |
400 | 385 | ||
401 | return 1000 + i * 500; | 386 | return 1000 + i * 500; |
@@ -406,15 +391,15 @@ static int FAN_MAX_TO_REG(int val) | |||
406 | int i; | 391 | int i; |
407 | 392 | ||
408 | for (i = 10; i > 0; i--) { | 393 | for (i = 10; i > 0; i--) { |
409 | if (val > (1000 + (i - 1) * 500)) | 394 | if (val > (1000 + (i - 1) * 500)) { |
410 | break; | 395 | break; |
396 | } | ||
411 | } | 397 | } |
412 | 398 | ||
413 | return FAN_MAX[i]; | 399 | return FAN_MAX[i]; |
414 | } | 400 | } |
415 | 401 | ||
416 | /* | 402 | /* PWM enable |
417 | * PWM enable | ||
418 | * Register to enable mapping: | 403 | * Register to enable mapping: |
419 | * 000: 2 fan on zone 1 auto | 404 | * 000: 2 fan on zone 1 auto |
420 | * 001: 2 fan on zone 2 auto | 405 | * 001: 2 fan on zone 2 auto |
@@ -423,8 +408,7 @@ static int FAN_MAX_TO_REG(int val) | |||
423 | * 100: -1 fan disabled | 408 | * 100: -1 fan disabled |
424 | * 101: 2 fan on hottest of zones 2,3 auto | 409 | * 101: 2 fan on hottest of zones 2,3 auto |
425 | * 110: 2 fan on hottest of zones 1,2,3 auto | 410 | * 110: 2 fan on hottest of zones 1,2,3 auto |
426 | * 111: 1 fan in manual mode | 411 | * 111: 1 fan in manual mode */ |
427 | */ | ||
428 | static inline int PWM_EN_FROM_REG(int reg) | 412 | static inline int PWM_EN_FROM_REG(int reg) |
429 | { | 413 | { |
430 | static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1}; | 414 | static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1}; |
@@ -439,8 +423,7 @@ static inline int PWM_EN_TO_REG(int val, int reg) | |||
439 | return (reg & 0x1f) | ((en & 0x07) << 5); | 423 | return (reg & 0x1f) | ((en & 0x07) << 5); |
440 | } | 424 | } |
441 | 425 | ||
442 | /* | 426 | /* PWM auto channels zone |
443 | * PWM auto channels zone | ||
444 | * Register to auto channels zone mapping (ACZ is a bitfield with bit x | 427 | * Register to auto channels zone mapping (ACZ is a bitfield with bit x |
445 | * corresponding to zone x+1): | 428 | * corresponding to zone x+1): |
446 | * 000: 001 fan on zone 1 auto | 429 | * 000: 001 fan on zone 1 auto |
@@ -450,8 +433,7 @@ static inline int PWM_EN_TO_REG(int val, int reg) | |||
450 | * 100: 000 fan disabled | 433 | * 100: 000 fan disabled |
451 | * 101: 110 fan on hottest of zones 2,3 auto | 434 | * 101: 110 fan on hottest of zones 2,3 auto |
452 | * 110: 111 fan on hottest of zones 1,2,3 auto | 435 | * 110: 111 fan on hottest of zones 1,2,3 auto |
453 | * 111: 000 fan in manual mode | 436 | * 111: 000 fan in manual mode */ |
454 | */ | ||
455 | static inline int PWM_ACZ_FROM_REG(int reg) | 437 | static inline int PWM_ACZ_FROM_REG(int reg) |
456 | { | 438 | { |
457 | static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0}; | 439 | static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0}; |
@@ -486,20 +468,19 @@ static int PWM_FREQ_TO_REG(int val, int reg) | |||
486 | i = 11; | 468 | i = 11; |
487 | } else { | 469 | } else { |
488 | for (i = 9; i > 0; i--) { | 470 | for (i = 9; i > 0; i--) { |
489 | if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2) | 471 | if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2) { |
490 | break; | 472 | break; |
473 | } | ||
491 | } | 474 | } |
492 | } | 475 | } |
493 | 476 | ||
494 | return (reg & 0xf0) | i; | 477 | return (reg & 0xf0) | i; |
495 | } | 478 | } |
496 | 479 | ||
497 | /* | 480 | /* PWM ramp rate |
498 | * PWM ramp rate | ||
499 | * Register layout: | 481 | * Register layout: |
500 | * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0] | 482 | * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0] |
501 | * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] | 483 | * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */ |
502 | */ | ||
503 | static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5}; | 484 | static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5}; |
504 | 485 | ||
505 | static inline int PWM_RR_FROM_REG(int reg, int ix) | 486 | static inline int PWM_RR_FROM_REG(int reg, int ix) |
@@ -514,8 +495,9 @@ static int PWM_RR_TO_REG(int val, int ix, int reg) | |||
514 | int i; | 495 | int i; |
515 | 496 | ||
516 | for (i = 0; i < 7; i++) { | 497 | for (i = 0; i < 7; i++) { |
517 | if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2) | 498 | if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2) { |
518 | break; | 499 | break; |
500 | } | ||
519 | } | 501 | } |
520 | 502 | ||
521 | return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i; | 503 | return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i; |
@@ -534,11 +516,9 @@ static inline int PWM_RR_EN_TO_REG(int val, int ix, int reg) | |||
534 | return val ? reg | en : reg & ~en; | 516 | return val ? reg | en : reg & ~en; |
535 | } | 517 | } |
536 | 518 | ||
537 | /* | 519 | /* PWM min/off |
538 | * PWM min/off | ||
539 | * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for | 520 | * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for |
540 | * the register layout). | 521 | * the register layout). */ |
541 | */ | ||
542 | static inline int PWM_OFF_FROM_REG(int reg, int ix) | 522 | static inline int PWM_OFF_FROM_REG(int reg, int ix) |
543 | { | 523 | { |
544 | return (reg >> (ix + 5)) & 0x01; | 524 | return (reg >> (ix + 5)) & 0x01; |
@@ -624,13 +604,12 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
624 | 604 | ||
625 | /* In (voltage) registers */ | 605 | /* In (voltage) registers */ |
626 | for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { | 606 | for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { |
627 | /* | 607 | /* Voltage inputs are stored as 16 bit values even |
628 | * Voltage inputs are stored as 16 bit values even | ||
629 | * though they have only 12 bits resolution. This is | 608 | * though they have only 12 bits resolution. This is |
630 | * to make it consistent with the temp inputs. | 609 | * to make it consistent with the temp inputs. */ |
631 | */ | 610 | if (ix == 7 && !(data->has_features & HAS_IN7)) { |
632 | if (ix == 7 && !(data->has_features & HAS_IN7)) | ||
633 | continue; | 611 | continue; |
612 | } | ||
634 | data->in[ix] = dme1737_read(data, | 613 | data->in[ix] = dme1737_read(data, |
635 | DME1737_REG_IN(ix)) << 8; | 614 | DME1737_REG_IN(ix)) << 8; |
636 | data->in_min[ix] = dme1737_read(data, | 615 | data->in_min[ix] = dme1737_read(data, |
@@ -641,13 +620,11 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
641 | 620 | ||
642 | /* Temp registers */ | 621 | /* Temp registers */ |
643 | for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { | 622 | for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { |
644 | /* | 623 | /* Temp inputs are stored as 16 bit values even |
645 | * Temp inputs are stored as 16 bit values even | ||
646 | * though they have only 12 bits resolution. This is | 624 | * though they have only 12 bits resolution. This is |
647 | * to take advantage of implicit conversions between | 625 | * to take advantage of implicit conversions between |
648 | * register values (2's complement) and temp values | 626 | * register values (2's complement) and temp values |
649 | * (signed decimal). | 627 | * (signed decimal). */ |
650 | */ | ||
651 | data->temp[ix] = dme1737_read(data, | 628 | data->temp[ix] = dme1737_read(data, |
652 | DME1737_REG_TEMP(ix)) << 8; | 629 | DME1737_REG_TEMP(ix)) << 8; |
653 | data->temp_min[ix] = dme1737_read(data, | 630 | data->temp_min[ix] = dme1737_read(data, |
@@ -660,21 +637,21 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
660 | } | 637 | } |
661 | } | 638 | } |
662 | 639 | ||
663 | /* | 640 | /* In and temp LSB registers |
664 | * In and temp LSB registers | ||
665 | * The LSBs are latched when the MSBs are read, so the order in | 641 | * The LSBs are latched when the MSBs are read, so the order in |
666 | * which the registers are read (MSB first, then LSB) is | 642 | * which the registers are read (MSB first, then LSB) is |
667 | * important! | 643 | * important! */ |
668 | */ | ||
669 | for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) { | 644 | for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) { |
670 | if (ix == 5 && !(data->has_features & HAS_IN7)) | 645 | if (ix == 5 && !(data->has_features & HAS_IN7)) { |
671 | continue; | 646 | continue; |
647 | } | ||
672 | lsb[ix] = dme1737_read(data, | 648 | lsb[ix] = dme1737_read(data, |
673 | DME1737_REG_IN_TEMP_LSB(ix)); | 649 | DME1737_REG_IN_TEMP_LSB(ix)); |
674 | } | 650 | } |
675 | for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { | 651 | for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { |
676 | if (ix == 7 && !(data->has_features & HAS_IN7)) | 652 | if (ix == 7 && !(data->has_features & HAS_IN7)) { |
677 | continue; | 653 | continue; |
654 | } | ||
678 | data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] << | 655 | data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] << |
679 | DME1737_REG_IN_LSB_SHL[ix]) & 0xf0; | 656 | DME1737_REG_IN_LSB_SHL[ix]) & 0xf0; |
680 | } | 657 | } |
@@ -685,12 +662,11 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
685 | 662 | ||
686 | /* Fan registers */ | 663 | /* Fan registers */ |
687 | for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) { | 664 | for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) { |
688 | /* | 665 | /* Skip reading registers if optional fans are not |
689 | * Skip reading registers if optional fans are not | 666 | * present */ |
690 | * present | 667 | if (!(data->has_features & HAS_FAN(ix))) { |
691 | */ | ||
692 | if (!(data->has_features & HAS_FAN(ix))) | ||
693 | continue; | 668 | continue; |
669 | } | ||
694 | data->fan[ix] = dme1737_read(data, | 670 | data->fan[ix] = dme1737_read(data, |
695 | DME1737_REG_FAN(ix)); | 671 | DME1737_REG_FAN(ix)); |
696 | data->fan[ix] |= dme1737_read(data, | 672 | data->fan[ix] |= dme1737_read(data, |
@@ -710,12 +686,11 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
710 | 686 | ||
711 | /* PWM registers */ | 687 | /* PWM registers */ |
712 | for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) { | 688 | for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) { |
713 | /* | 689 | /* Skip reading registers if optional PWMs are not |
714 | * Skip reading registers if optional PWMs are not | 690 | * present */ |
715 | * present | 691 | if (!(data->has_features & HAS_PWM(ix))) { |
716 | */ | ||
717 | if (!(data->has_features & HAS_PWM(ix))) | ||
718 | continue; | 692 | continue; |
693 | } | ||
719 | data->pwm[ix] = dme1737_read(data, | 694 | data->pwm[ix] = dme1737_read(data, |
720 | DME1737_REG_PWM(ix)); | 695 | DME1737_REG_PWM(ix)); |
721 | data->pwm_freq[ix] = dme1737_read(data, | 696 | data->pwm_freq[ix] = dme1737_read(data, |
@@ -736,8 +711,9 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
736 | /* Thermal zone registers */ | 711 | /* Thermal zone registers */ |
737 | for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) { | 712 | for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) { |
738 | /* Skip reading registers if zone3 is not present */ | 713 | /* Skip reading registers if zone3 is not present */ |
739 | if ((ix == 2) && !(data->has_features & HAS_ZONE3)) | 714 | if ((ix == 2) && !(data->has_features & HAS_ZONE3)) { |
740 | continue; | 715 | continue; |
716 | } | ||
741 | /* sch5127 zone2 registers are special */ | 717 | /* sch5127 zone2 registers are special */ |
742 | if ((ix == 1) && (data->type == sch5127)) { | 718 | if ((ix == 1) && (data->type == sch5127)) { |
743 | data->zone_low[1] = dme1737_read(data, | 719 | data->zone_low[1] = dme1737_read(data, |
@@ -761,10 +737,8 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
761 | /* Alarm registers */ | 737 | /* Alarm registers */ |
762 | data->alarms = dme1737_read(data, | 738 | data->alarms = dme1737_read(data, |
763 | DME1737_REG_ALARM1); | 739 | DME1737_REG_ALARM1); |
764 | /* | 740 | /* Bit 7 tells us if the other alarm registers are non-zero and |
765 | * Bit 7 tells us if the other alarm registers are non-zero and | 741 | * therefore also need to be read */ |
766 | * therefore also need to be read | ||
767 | */ | ||
768 | if (data->alarms & 0x80) { | 742 | if (data->alarms & 0x80) { |
769 | data->alarms |= dme1737_read(data, | 743 | data->alarms |= dme1737_read(data, |
770 | DME1737_REG_ALARM2) << 8; | 744 | DME1737_REG_ALARM2) << 8; |
@@ -772,18 +746,22 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
772 | DME1737_REG_ALARM3) << 16; | 746 | DME1737_REG_ALARM3) << 16; |
773 | } | 747 | } |
774 | 748 | ||
775 | /* | 749 | /* The ISA chips require explicit clearing of alarm bits. |
776 | * The ISA chips require explicit clearing of alarm bits. | ||
777 | * Don't worry, an alarm will come back if the condition | 750 | * Don't worry, an alarm will come back if the condition |
778 | * that causes it still exists | 751 | * that causes it still exists */ |
779 | */ | ||
780 | if (!data->client) { | 752 | if (!data->client) { |
781 | if (data->alarms & 0xff0000) | 753 | if (data->alarms & 0xff0000) { |
782 | dme1737_write(data, DME1737_REG_ALARM3, 0xff); | 754 | dme1737_write(data, DME1737_REG_ALARM3, |
783 | if (data->alarms & 0xff00) | 755 | 0xff); |
784 | dme1737_write(data, DME1737_REG_ALARM2, 0xff); | 756 | } |
785 | if (data->alarms & 0xff) | 757 | if (data->alarms & 0xff00) { |
786 | dme1737_write(data, DME1737_REG_ALARM1, 0xff); | 758 | dme1737_write(data, DME1737_REG_ALARM2, |
759 | 0xff); | ||
760 | } | ||
761 | if (data->alarms & 0xff) { | ||
762 | dme1737_write(data, DME1737_REG_ALARM1, | ||
763 | 0xff); | ||
764 | } | ||
787 | } | 765 | } |
788 | 766 | ||
789 | data->last_update = jiffies; | 767 | data->last_update = jiffies; |
@@ -844,12 +822,7 @@ static ssize_t set_in(struct device *dev, struct device_attribute *attr, | |||
844 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | 822 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
845 | int ix = sensor_attr_2->index; | 823 | int ix = sensor_attr_2->index; |
846 | int fn = sensor_attr_2->nr; | 824 | int fn = sensor_attr_2->nr; |
847 | long val; | 825 | long val = simple_strtol(buf, NULL, 10); |
848 | int err; | ||
849 | |||
850 | err = kstrtol(buf, 10, &val); | ||
851 | if (err) | ||
852 | return err; | ||
853 | 826 | ||
854 | mutex_lock(&data->update_lock); | 827 | mutex_lock(&data->update_lock); |
855 | switch (fn) { | 828 | switch (fn) { |
@@ -928,12 +901,7 @@ static ssize_t set_temp(struct device *dev, struct device_attribute *attr, | |||
928 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | 901 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
929 | int ix = sensor_attr_2->index; | 902 | int ix = sensor_attr_2->index; |
930 | int fn = sensor_attr_2->nr; | 903 | int fn = sensor_attr_2->nr; |
931 | long val; | 904 | long val = simple_strtol(buf, NULL, 10); |
932 | int err; | ||
933 | |||
934 | err = kstrtol(buf, 10, &val); | ||
935 | if (err) | ||
936 | return err; | ||
937 | 905 | ||
938 | mutex_lock(&data->update_lock); | 906 | mutex_lock(&data->update_lock); |
939 | switch (fn) { | 907 | switch (fn) { |
@@ -984,10 +952,11 @@ static ssize_t show_zone(struct device *dev, struct device_attribute *attr, | |||
984 | switch (fn) { | 952 | switch (fn) { |
985 | case SYS_ZONE_AUTO_CHANNELS_TEMP: | 953 | case SYS_ZONE_AUTO_CHANNELS_TEMP: |
986 | /* check config2 for non-standard temp-to-zone mapping */ | 954 | /* check config2 for non-standard temp-to-zone mapping */ |
987 | if ((ix == 1) && (data->config2 & 0x02)) | 955 | if ((ix == 1) && (data->config2 & 0x02)) { |
988 | res = 4; | 956 | res = 4; |
989 | else | 957 | } else { |
990 | res = 1 << ix; | 958 | res = 1 << ix; |
959 | } | ||
991 | break; | 960 | break; |
992 | case SYS_ZONE_AUTO_POINT1_TEMP_HYST: | 961 | case SYS_ZONE_AUTO_POINT1_TEMP_HYST: |
993 | res = TEMP_FROM_REG(data->zone_low[ix], 8) - | 962 | res = TEMP_FROM_REG(data->zone_low[ix], 8) - |
@@ -1020,12 +989,7 @@ static ssize_t set_zone(struct device *dev, struct device_attribute *attr, | |||
1020 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | 989 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
1021 | int ix = sensor_attr_2->index; | 990 | int ix = sensor_attr_2->index; |
1022 | int fn = sensor_attr_2->nr; | 991 | int fn = sensor_attr_2->nr; |
1023 | long val; | 992 | long val = simple_strtol(buf, NULL, 10); |
1024 | int err; | ||
1025 | |||
1026 | err = kstrtol(buf, 10, &val); | ||
1027 | if (err) | ||
1028 | return err; | ||
1029 | 993 | ||
1030 | mutex_lock(&data->update_lock); | 994 | mutex_lock(&data->update_lock); |
1031 | switch (fn) { | 995 | switch (fn) { |
@@ -1050,10 +1014,8 @@ static ssize_t set_zone(struct device *dev, struct device_attribute *attr, | |||
1050 | /* Refresh the cache */ | 1014 | /* Refresh the cache */ |
1051 | data->zone_low[ix] = dme1737_read(data, | 1015 | data->zone_low[ix] = dme1737_read(data, |
1052 | DME1737_REG_ZONE_LOW(ix)); | 1016 | DME1737_REG_ZONE_LOW(ix)); |
1053 | /* | 1017 | /* Modify the temp range value (which is stored in the upper |
1054 | * Modify the temp range value (which is stored in the upper | 1018 | * nibble of the pwm_freq register) */ |
1055 | * nibble of the pwm_freq register) | ||
1056 | */ | ||
1057 | data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val - | 1019 | data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val - |
1058 | TEMP_FROM_REG(data->zone_low[ix], 8), | 1020 | TEMP_FROM_REG(data->zone_low[ix], 8), |
1059 | dme1737_read(data, | 1021 | dme1737_read(data, |
@@ -1133,12 +1095,7 @@ static ssize_t set_fan(struct device *dev, struct device_attribute *attr, | |||
1133 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | 1095 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
1134 | int ix = sensor_attr_2->index; | 1096 | int ix = sensor_attr_2->index; |
1135 | int fn = sensor_attr_2->nr; | 1097 | int fn = sensor_attr_2->nr; |
1136 | long val; | 1098 | long val = simple_strtol(buf, NULL, 10); |
1137 | int err; | ||
1138 | |||
1139 | err = kstrtol(buf, 10, &val); | ||
1140 | if (err) | ||
1141 | return err; | ||
1142 | 1099 | ||
1143 | mutex_lock(&data->update_lock); | 1100 | mutex_lock(&data->update_lock); |
1144 | switch (fn) { | 1101 | switch (fn) { |
@@ -1213,19 +1170,21 @@ static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, | |||
1213 | 1170 | ||
1214 | switch (fn) { | 1171 | switch (fn) { |
1215 | case SYS_PWM: | 1172 | case SYS_PWM: |
1216 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) | 1173 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) { |
1217 | res = 255; | 1174 | res = 255; |
1218 | else | 1175 | } else { |
1219 | res = data->pwm[ix]; | 1176 | res = data->pwm[ix]; |
1177 | } | ||
1220 | break; | 1178 | break; |
1221 | case SYS_PWM_FREQ: | 1179 | case SYS_PWM_FREQ: |
1222 | res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]); | 1180 | res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]); |
1223 | break; | 1181 | break; |
1224 | case SYS_PWM_ENABLE: | 1182 | case SYS_PWM_ENABLE: |
1225 | if (ix >= 3) | 1183 | if (ix >= 3) { |
1226 | res = 1; /* pwm[5-6] hard-wired to manual mode */ | 1184 | res = 1; /* pwm[5-6] hard-wired to manual mode */ |
1227 | else | 1185 | } else { |
1228 | res = PWM_EN_FROM_REG(data->pwm_config[ix]); | 1186 | res = PWM_EN_FROM_REG(data->pwm_config[ix]); |
1187 | } | ||
1229 | break; | 1188 | break; |
1230 | case SYS_PWM_RAMP_RATE: | 1189 | case SYS_PWM_RAMP_RATE: |
1231 | /* Only valid for pwm[1-3] */ | 1190 | /* Only valid for pwm[1-3] */ |
@@ -1233,17 +1192,19 @@ static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, | |||
1233 | break; | 1192 | break; |
1234 | case SYS_PWM_AUTO_CHANNELS_ZONE: | 1193 | case SYS_PWM_AUTO_CHANNELS_ZONE: |
1235 | /* Only valid for pwm[1-3] */ | 1194 | /* Only valid for pwm[1-3] */ |
1236 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) | 1195 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { |
1237 | res = PWM_ACZ_FROM_REG(data->pwm_config[ix]); | 1196 | res = PWM_ACZ_FROM_REG(data->pwm_config[ix]); |
1238 | else | 1197 | } else { |
1239 | res = data->pwm_acz[ix]; | 1198 | res = data->pwm_acz[ix]; |
1199 | } | ||
1240 | break; | 1200 | break; |
1241 | case SYS_PWM_AUTO_PWM_MIN: | 1201 | case SYS_PWM_AUTO_PWM_MIN: |
1242 | /* Only valid for pwm[1-3] */ | 1202 | /* Only valid for pwm[1-3] */ |
1243 | if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) | 1203 | if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) { |
1244 | res = data->pwm_min[ix]; | 1204 | res = data->pwm_min[ix]; |
1245 | else | 1205 | } else { |
1246 | res = 0; | 1206 | res = 0; |
1207 | } | ||
1247 | break; | 1208 | break; |
1248 | case SYS_PWM_AUTO_POINT1_PWM: | 1209 | case SYS_PWM_AUTO_POINT1_PWM: |
1249 | /* Only valid for pwm[1-3] */ | 1210 | /* Only valid for pwm[1-3] */ |
@@ -1262,7 +1223,7 @@ static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, | |||
1262 | } | 1223 | } |
1263 | 1224 | ||
1264 | static struct attribute *dme1737_pwm_chmod_attr[]; | 1225 | static struct attribute *dme1737_pwm_chmod_attr[]; |
1265 | static void dme1737_chmod_file(struct device*, struct attribute*, umode_t); | 1226 | static void dme1737_chmod_file(struct device*, struct attribute*, mode_t); |
1266 | 1227 | ||
1267 | static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | 1228 | static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, |
1268 | const char *buf, size_t count) | 1229 | const char *buf, size_t count) |
@@ -1272,12 +1233,7 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
1272 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); | 1233 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
1273 | int ix = sensor_attr_2->index; | 1234 | int ix = sensor_attr_2->index; |
1274 | int fn = sensor_attr_2->nr; | 1235 | int fn = sensor_attr_2->nr; |
1275 | long val; | 1236 | long val = simple_strtol(buf, NULL, 10); |
1276 | int err; | ||
1277 | |||
1278 | err = kstrtol(buf, 10, &val); | ||
1279 | if (err) | ||
1280 | return err; | ||
1281 | 1237 | ||
1282 | mutex_lock(&data->update_lock); | 1238 | mutex_lock(&data->update_lock); |
1283 | switch (fn) { | 1239 | switch (fn) { |
@@ -1351,10 +1307,8 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
1351 | /* Change permissions of pwm[ix] to read-only */ | 1307 | /* Change permissions of pwm[ix] to read-only */ |
1352 | dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], | 1308 | dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], |
1353 | S_IRUGO); | 1309 | S_IRUGO); |
1354 | /* | 1310 | /* Turn on auto mode using the saved zone channel |
1355 | * Turn on auto mode using the saved zone channel | 1311 | * assignment */ |
1356 | * assignment | ||
1357 | */ | ||
1358 | data->pwm_config[ix] = PWM_ACZ_TO_REG( | 1312 | data->pwm_config[ix] = PWM_ACZ_TO_REG( |
1359 | data->pwm_acz[ix], | 1313 | data->pwm_acz[ix], |
1360 | data->pwm_config[ix]); | 1314 | data->pwm_config[ix]); |
@@ -1384,10 +1338,8 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
1384 | data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix, | 1338 | data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix, |
1385 | data->pwm_rr[ix > 0]); | 1339 | data->pwm_rr[ix > 0]); |
1386 | } | 1340 | } |
1387 | /* | 1341 | /* Enable/disable the feature only if the associated PWM |
1388 | * Enable/disable the feature only if the associated PWM | 1342 | * output is in automatic mode. */ |
1389 | * output is in automatic mode. | ||
1390 | */ | ||
1391 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { | 1343 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { |
1392 | data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix, | 1344 | data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix, |
1393 | data->pwm_rr[ix > 0]); | 1345 | data->pwm_rr[ix > 0]); |
@@ -1409,19 +1361,15 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
1409 | data->pwm_config[ix] = dme1737_read(data, | 1361 | data->pwm_config[ix] = dme1737_read(data, |
1410 | DME1737_REG_PWM_CONFIG(ix)); | 1362 | DME1737_REG_PWM_CONFIG(ix)); |
1411 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { | 1363 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { |
1412 | /* | 1364 | /* PWM is already in auto mode so update the temp |
1413 | * PWM is already in auto mode so update the temp | 1365 | * channel assignment */ |
1414 | * channel assignment | ||
1415 | */ | ||
1416 | data->pwm_config[ix] = PWM_ACZ_TO_REG(val, | 1366 | data->pwm_config[ix] = PWM_ACZ_TO_REG(val, |
1417 | data->pwm_config[ix]); | 1367 | data->pwm_config[ix]); |
1418 | dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), | 1368 | dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), |
1419 | data->pwm_config[ix]); | 1369 | data->pwm_config[ix]); |
1420 | } else { | 1370 | } else { |
1421 | /* | 1371 | /* PWM is not in auto mode so we save the temp |
1422 | * PWM is not in auto mode so we save the temp | 1372 | * channel assignment for later use */ |
1423 | * channel assignment for later use | ||
1424 | */ | ||
1425 | data->pwm_acz[ix] = val; | 1373 | data->pwm_acz[ix] = val; |
1426 | } | 1374 | } |
1427 | break; | 1375 | break; |
@@ -1430,12 +1378,10 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, | |||
1430 | /* Refresh the cache */ | 1378 | /* Refresh the cache */ |
1431 | data->pwm_min[ix] = dme1737_read(data, | 1379 | data->pwm_min[ix] = dme1737_read(data, |
1432 | DME1737_REG_PWM_MIN(ix)); | 1380 | DME1737_REG_PWM_MIN(ix)); |
1433 | /* | 1381 | /* There are only 2 values supported for the auto_pwm_min |
1434 | * There are only 2 values supported for the auto_pwm_min | ||
1435 | * value: 0 or auto_point1_pwm. So if the temperature drops | 1382 | * value: 0 or auto_point1_pwm. So if the temperature drops |
1436 | * below the auto_point1_temp_hyst value, the fan either turns | 1383 | * below the auto_point1_temp_hyst value, the fan either turns |
1437 | * off or runs at auto_point1_pwm duty-cycle. | 1384 | * off or runs at auto_point1_pwm duty-cycle. */ |
1438 | */ | ||
1439 | if (val > ((data->pwm_min[ix] + 1) / 2)) { | 1385 | if (val > ((data->pwm_min[ix] + 1) / 2)) { |
1440 | data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix, | 1386 | data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix, |
1441 | dme1737_read(data, | 1387 | dme1737_read(data, |
@@ -1480,12 +1426,7 @@ static ssize_t set_vrm(struct device *dev, struct device_attribute *attr, | |||
1480 | const char *buf, size_t count) | 1426 | const char *buf, size_t count) |
1481 | { | 1427 | { |
1482 | struct dme1737_data *data = dev_get_drvdata(dev); | 1428 | struct dme1737_data *data = dev_get_drvdata(dev); |
1483 | long val; | 1429 | long val = simple_strtol(buf, NULL, 10); |
1484 | int err; | ||
1485 | |||
1486 | err = kstrtol(buf, 10, &val); | ||
1487 | if (err) | ||
1488 | return err; | ||
1489 | 1430 | ||
1490 | data->vrm = val; | 1431 | data->vrm = val; |
1491 | return count; | 1432 | return count; |
@@ -1645,12 +1586,10 @@ static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm); | |||
1645 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL); | 1586 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL); |
1646 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */ | 1587 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */ |
1647 | 1588 | ||
1648 | /* | 1589 | /* This struct holds all the attributes that are always present and need to be |
1649 | * This struct holds all the attributes that are always present and need to be | ||
1650 | * created unconditionally. The attributes that need modification of their | 1590 | * created unconditionally. The attributes that need modification of their |
1651 | * permissions are created read-only and write permissions are added or removed | 1591 | * permissions are created read-only and write permissions are added or removed |
1652 | * on the fly when required | 1592 | * on the fly when required */ |
1653 | */ | ||
1654 | static struct attribute *dme1737_attr[] = { | 1593 | static struct attribute *dme1737_attr[] = { |
1655 | /* Voltages */ | 1594 | /* Voltages */ |
1656 | &sensor_dev_attr_in0_input.dev_attr.attr, | 1595 | &sensor_dev_attr_in0_input.dev_attr.attr, |
@@ -1713,11 +1652,9 @@ static const struct attribute_group dme1737_group = { | |||
1713 | .attrs = dme1737_attr, | 1652 | .attrs = dme1737_attr, |
1714 | }; | 1653 | }; |
1715 | 1654 | ||
1716 | /* | 1655 | /* The following struct holds temp offset attributes, which are not available |
1717 | * The following struct holds temp offset attributes, which are not available | ||
1718 | * in all chips. The following chips support them: | 1656 | * in all chips. The following chips support them: |
1719 | * DME1737, SCH311x | 1657 | * DME1737, SCH311x */ |
1720 | */ | ||
1721 | static struct attribute *dme1737_temp_offset_attr[] = { | 1658 | static struct attribute *dme1737_temp_offset_attr[] = { |
1722 | &sensor_dev_attr_temp1_offset.dev_attr.attr, | 1659 | &sensor_dev_attr_temp1_offset.dev_attr.attr, |
1723 | &sensor_dev_attr_temp2_offset.dev_attr.attr, | 1660 | &sensor_dev_attr_temp2_offset.dev_attr.attr, |
@@ -1729,11 +1666,9 @@ static const struct attribute_group dme1737_temp_offset_group = { | |||
1729 | .attrs = dme1737_temp_offset_attr, | 1666 | .attrs = dme1737_temp_offset_attr, |
1730 | }; | 1667 | }; |
1731 | 1668 | ||
1732 | /* | 1669 | /* The following struct holds VID related attributes, which are not available |
1733 | * The following struct holds VID related attributes, which are not available | ||
1734 | * in all chips. The following chips support them: | 1670 | * in all chips. The following chips support them: |
1735 | * DME1737 | 1671 | * DME1737 */ |
1736 | */ | ||
1737 | static struct attribute *dme1737_vid_attr[] = { | 1672 | static struct attribute *dme1737_vid_attr[] = { |
1738 | &dev_attr_vrm.attr, | 1673 | &dev_attr_vrm.attr, |
1739 | &dev_attr_cpu0_vid.attr, | 1674 | &dev_attr_cpu0_vid.attr, |
@@ -1744,11 +1679,9 @@ static const struct attribute_group dme1737_vid_group = { | |||
1744 | .attrs = dme1737_vid_attr, | 1679 | .attrs = dme1737_vid_attr, |
1745 | }; | 1680 | }; |
1746 | 1681 | ||
1747 | /* | 1682 | /* The following struct holds temp zone 3 related attributes, which are not |
1748 | * The following struct holds temp zone 3 related attributes, which are not | ||
1749 | * available in all chips. The following chips support them: | 1683 | * available in all chips. The following chips support them: |
1750 | * DME1737, SCH311x, SCH5027 | 1684 | * DME1737, SCH311x, SCH5027 */ |
1751 | */ | ||
1752 | static struct attribute *dme1737_zone3_attr[] = { | 1685 | static struct attribute *dme1737_zone3_attr[] = { |
1753 | &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr, | 1686 | &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr, |
1754 | &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr, | 1687 | &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr, |
@@ -1762,11 +1695,9 @@ static const struct attribute_group dme1737_zone3_group = { | |||
1762 | }; | 1695 | }; |
1763 | 1696 | ||
1764 | 1697 | ||
1765 | /* | 1698 | /* The following struct holds temp zone hysteresis related attributes, which |
1766 | * The following struct holds temp zone hysteresis related attributes, which | ||
1767 | * are not available in all chips. The following chips support them: | 1699 | * are not available in all chips. The following chips support them: |
1768 | * DME1737, SCH311x | 1700 | * DME1737, SCH311x */ |
1769 | */ | ||
1770 | static struct attribute *dme1737_zone_hyst_attr[] = { | 1701 | static struct attribute *dme1737_zone_hyst_attr[] = { |
1771 | &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr, | 1702 | &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr, |
1772 | &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr, | 1703 | &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr, |
@@ -1778,11 +1709,9 @@ static const struct attribute_group dme1737_zone_hyst_group = { | |||
1778 | .attrs = dme1737_zone_hyst_attr, | 1709 | .attrs = dme1737_zone_hyst_attr, |
1779 | }; | 1710 | }; |
1780 | 1711 | ||
1781 | /* | 1712 | /* The following struct holds voltage in7 related attributes, which |
1782 | * The following struct holds voltage in7 related attributes, which | ||
1783 | * are not available in all chips. The following chips support them: | 1713 | * are not available in all chips. The following chips support them: |
1784 | * SCH5127 | 1714 | * SCH5127 */ |
1785 | */ | ||
1786 | static struct attribute *dme1737_in7_attr[] = { | 1715 | static struct attribute *dme1737_in7_attr[] = { |
1787 | &sensor_dev_attr_in7_input.dev_attr.attr, | 1716 | &sensor_dev_attr_in7_input.dev_attr.attr, |
1788 | &sensor_dev_attr_in7_min.dev_attr.attr, | 1717 | &sensor_dev_attr_in7_min.dev_attr.attr, |
@@ -1795,11 +1724,9 @@ static const struct attribute_group dme1737_in7_group = { | |||
1795 | .attrs = dme1737_in7_attr, | 1724 | .attrs = dme1737_in7_attr, |
1796 | }; | 1725 | }; |
1797 | 1726 | ||
1798 | /* | 1727 | /* The following structs hold the PWM attributes, some of which are optional. |
1799 | * The following structs hold the PWM attributes, some of which are optional. | ||
1800 | * Their creation depends on the chip configuration which is determined during | 1728 | * Their creation depends on the chip configuration which is determined during |
1801 | * module load. | 1729 | * module load. */ |
1802 | */ | ||
1803 | static struct attribute *dme1737_pwm1_attr[] = { | 1730 | static struct attribute *dme1737_pwm1_attr[] = { |
1804 | &sensor_dev_attr_pwm1.dev_attr.attr, | 1731 | &sensor_dev_attr_pwm1.dev_attr.attr, |
1805 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, | 1732 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, |
@@ -1852,22 +1779,18 @@ static const struct attribute_group dme1737_pwm_group[] = { | |||
1852 | { .attrs = dme1737_pwm6_attr }, | 1779 | { .attrs = dme1737_pwm6_attr }, |
1853 | }; | 1780 | }; |
1854 | 1781 | ||
1855 | /* | 1782 | /* The following struct holds auto PWM min attributes, which are not available |
1856 | * The following struct holds auto PWM min attributes, which are not available | ||
1857 | * in all chips. Their creation depends on the chip type which is determined | 1783 | * in all chips. Their creation depends on the chip type which is determined |
1858 | * during module load. | 1784 | * during module load. */ |
1859 | */ | ||
1860 | static struct attribute *dme1737_auto_pwm_min_attr[] = { | 1785 | static struct attribute *dme1737_auto_pwm_min_attr[] = { |
1861 | &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr, | 1786 | &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr, |
1862 | &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr, | 1787 | &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr, |
1863 | &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr, | 1788 | &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr, |
1864 | }; | 1789 | }; |
1865 | 1790 | ||
1866 | /* | 1791 | /* The following structs hold the fan attributes, some of which are optional. |
1867 | * The following structs hold the fan attributes, some of which are optional. | ||
1868 | * Their creation depends on the chip configuration which is determined during | 1792 | * Their creation depends on the chip configuration which is determined during |
1869 | * module load. | 1793 | * module load. */ |
1870 | */ | ||
1871 | static struct attribute *dme1737_fan1_attr[] = { | 1794 | static struct attribute *dme1737_fan1_attr[] = { |
1872 | &sensor_dev_attr_fan1_input.dev_attr.attr, | 1795 | &sensor_dev_attr_fan1_input.dev_attr.attr, |
1873 | &sensor_dev_attr_fan1_min.dev_attr.attr, | 1796 | &sensor_dev_attr_fan1_min.dev_attr.attr, |
@@ -1920,10 +1843,8 @@ static const struct attribute_group dme1737_fan_group[] = { | |||
1920 | { .attrs = dme1737_fan6_attr }, | 1843 | { .attrs = dme1737_fan6_attr }, |
1921 | }; | 1844 | }; |
1922 | 1845 | ||
1923 | /* | 1846 | /* The permissions of the following zone attributes are changed to read- |
1924 | * The permissions of the following zone attributes are changed to read- | 1847 | * writeable if the chip is *not* locked. Otherwise they stay read-only. */ |
1925 | * writeable if the chip is *not* locked. Otherwise they stay read-only. | ||
1926 | */ | ||
1927 | static struct attribute *dme1737_zone_chmod_attr[] = { | 1848 | static struct attribute *dme1737_zone_chmod_attr[] = { |
1928 | &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr, | 1849 | &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr, |
1929 | &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr, | 1850 | &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr, |
@@ -1939,10 +1860,8 @@ static const struct attribute_group dme1737_zone_chmod_group = { | |||
1939 | }; | 1860 | }; |
1940 | 1861 | ||
1941 | 1862 | ||
1942 | /* | 1863 | /* The permissions of the following zone 3 attributes are changed to read- |
1943 | * The permissions of the following zone 3 attributes are changed to read- | 1864 | * writeable if the chip is *not* locked. Otherwise they stay read-only. */ |
1944 | * writeable if the chip is *not* locked. Otherwise they stay read-only. | ||
1945 | */ | ||
1946 | static struct attribute *dme1737_zone3_chmod_attr[] = { | 1865 | static struct attribute *dme1737_zone3_chmod_attr[] = { |
1947 | &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr, | 1866 | &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr, |
1948 | &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr, | 1867 | &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr, |
@@ -1954,11 +1873,9 @@ static const struct attribute_group dme1737_zone3_chmod_group = { | |||
1954 | .attrs = dme1737_zone3_chmod_attr, | 1873 | .attrs = dme1737_zone3_chmod_attr, |
1955 | }; | 1874 | }; |
1956 | 1875 | ||
1957 | /* | 1876 | /* The permissions of the following PWM attributes are changed to read- |
1958 | * The permissions of the following PWM attributes are changed to read- | ||
1959 | * writeable if the chip is *not* locked and the respective PWM is available. | 1877 | * writeable if the chip is *not* locked and the respective PWM is available. |
1960 | * Otherwise they stay read-only. | 1878 | * Otherwise they stay read-only. */ |
1961 | */ | ||
1962 | static struct attribute *dme1737_pwm1_chmod_attr[] = { | 1879 | static struct attribute *dme1737_pwm1_chmod_attr[] = { |
1963 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, | 1880 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, |
1964 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, | 1881 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, |
@@ -2003,10 +1920,8 @@ static const struct attribute_group dme1737_pwm_chmod_group[] = { | |||
2003 | { .attrs = dme1737_pwm6_chmod_attr }, | 1920 | { .attrs = dme1737_pwm6_chmod_attr }, |
2004 | }; | 1921 | }; |
2005 | 1922 | ||
2006 | /* | 1923 | /* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the |
2007 | * Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the | 1924 | * chip is not locked. Otherwise they are read-only. */ |
2008 | * chip is not locked. Otherwise they are read-only. | ||
2009 | */ | ||
2010 | static struct attribute *dme1737_pwm_chmod_attr[] = { | 1925 | static struct attribute *dme1737_pwm_chmod_attr[] = { |
2011 | &sensor_dev_attr_pwm1.dev_attr.attr, | 1926 | &sensor_dev_attr_pwm1.dev_attr.attr, |
2012 | &sensor_dev_attr_pwm2.dev_attr.attr, | 1927 | &sensor_dev_attr_pwm2.dev_attr.attr, |
@@ -2046,7 +1961,7 @@ static inline void dme1737_sio_outb(int sio_cip, int reg, int val) | |||
2046 | static int dme1737_i2c_get_features(int, struct dme1737_data*); | 1961 | static int dme1737_i2c_get_features(int, struct dme1737_data*); |
2047 | 1962 | ||
2048 | static void dme1737_chmod_file(struct device *dev, | 1963 | static void dme1737_chmod_file(struct device *dev, |
2049 | struct attribute *attr, umode_t mode) | 1964 | struct attribute *attr, mode_t mode) |
2050 | { | 1965 | { |
2051 | if (sysfs_chmod_file(&dev->kobj, attr, mode)) { | 1966 | if (sysfs_chmod_file(&dev->kobj, attr, mode)) { |
2052 | dev_warn(dev, "Failed to change permissions of %s.\n", | 1967 | dev_warn(dev, "Failed to change permissions of %s.\n", |
@@ -2056,12 +1971,13 @@ static void dme1737_chmod_file(struct device *dev, | |||
2056 | 1971 | ||
2057 | static void dme1737_chmod_group(struct device *dev, | 1972 | static void dme1737_chmod_group(struct device *dev, |
2058 | const struct attribute_group *group, | 1973 | const struct attribute_group *group, |
2059 | umode_t mode) | 1974 | mode_t mode) |
2060 | { | 1975 | { |
2061 | struct attribute **attr; | 1976 | struct attribute **attr; |
2062 | 1977 | ||
2063 | for (attr = group->attrs; *attr; attr++) | 1978 | for (attr = group->attrs; *attr; attr++) { |
2064 | dme1737_chmod_file(dev, *attr, mode); | 1979 | dme1737_chmod_file(dev, *attr, mode); |
1980 | } | ||
2065 | } | 1981 | } |
2066 | 1982 | ||
2067 | static void dme1737_remove_files(struct device *dev) | 1983 | static void dme1737_remove_files(struct device *dev) |
@@ -2087,20 +2003,26 @@ static void dme1737_remove_files(struct device *dev) | |||
2087 | } | 2003 | } |
2088 | } | 2004 | } |
2089 | 2005 | ||
2090 | if (data->has_features & HAS_TEMP_OFFSET) | 2006 | if (data->has_features & HAS_TEMP_OFFSET) { |
2091 | sysfs_remove_group(&dev->kobj, &dme1737_temp_offset_group); | 2007 | sysfs_remove_group(&dev->kobj, &dme1737_temp_offset_group); |
2092 | if (data->has_features & HAS_VID) | 2008 | } |
2009 | if (data->has_features & HAS_VID) { | ||
2093 | sysfs_remove_group(&dev->kobj, &dme1737_vid_group); | 2010 | sysfs_remove_group(&dev->kobj, &dme1737_vid_group); |
2094 | if (data->has_features & HAS_ZONE3) | 2011 | } |
2012 | if (data->has_features & HAS_ZONE3) { | ||
2095 | sysfs_remove_group(&dev->kobj, &dme1737_zone3_group); | 2013 | sysfs_remove_group(&dev->kobj, &dme1737_zone3_group); |
2096 | if (data->has_features & HAS_ZONE_HYST) | 2014 | } |
2015 | if (data->has_features & HAS_ZONE_HYST) { | ||
2097 | sysfs_remove_group(&dev->kobj, &dme1737_zone_hyst_group); | 2016 | sysfs_remove_group(&dev->kobj, &dme1737_zone_hyst_group); |
2098 | if (data->has_features & HAS_IN7) | 2017 | } |
2018 | if (data->has_features & HAS_IN7) { | ||
2099 | sysfs_remove_group(&dev->kobj, &dme1737_in7_group); | 2019 | sysfs_remove_group(&dev->kobj, &dme1737_in7_group); |
2020 | } | ||
2100 | sysfs_remove_group(&dev->kobj, &dme1737_group); | 2021 | sysfs_remove_group(&dev->kobj, &dme1737_group); |
2101 | 2022 | ||
2102 | if (!data->client) | 2023 | if (!data->client) { |
2103 | sysfs_remove_file(&dev->kobj, &dev_attr_name.attr); | 2024 | sysfs_remove_file(&dev->kobj, &dev_attr_name.attr); |
2025 | } | ||
2104 | } | 2026 | } |
2105 | 2027 | ||
2106 | static int dme1737_create_files(struct device *dev) | 2028 | static int dme1737_create_files(struct device *dev) |
@@ -2111,41 +2033,48 @@ static int dme1737_create_files(struct device *dev) | |||
2111 | /* Create a name attribute for ISA devices */ | 2033 | /* Create a name attribute for ISA devices */ |
2112 | if (!data->client) { | 2034 | if (!data->client) { |
2113 | err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr); | 2035 | err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr); |
2114 | if (err) | 2036 | if (err) { |
2115 | goto exit; | 2037 | goto exit; |
2038 | } | ||
2116 | } | 2039 | } |
2117 | 2040 | ||
2118 | /* Create standard sysfs attributes */ | 2041 | /* Create standard sysfs attributes */ |
2119 | err = sysfs_create_group(&dev->kobj, &dme1737_group); | 2042 | err = sysfs_create_group(&dev->kobj, &dme1737_group); |
2120 | if (err) | 2043 | if (err) { |
2121 | goto exit_remove; | 2044 | goto exit_remove; |
2045 | } | ||
2122 | 2046 | ||
2123 | /* Create chip-dependent sysfs attributes */ | 2047 | /* Create chip-dependent sysfs attributes */ |
2124 | if (data->has_features & HAS_TEMP_OFFSET) { | 2048 | if (data->has_features & HAS_TEMP_OFFSET) { |
2125 | err = sysfs_create_group(&dev->kobj, | 2049 | err = sysfs_create_group(&dev->kobj, |
2126 | &dme1737_temp_offset_group); | 2050 | &dme1737_temp_offset_group); |
2127 | if (err) | 2051 | if (err) { |
2128 | goto exit_remove; | 2052 | goto exit_remove; |
2053 | } | ||
2129 | } | 2054 | } |
2130 | if (data->has_features & HAS_VID) { | 2055 | if (data->has_features & HAS_VID) { |
2131 | err = sysfs_create_group(&dev->kobj, &dme1737_vid_group); | 2056 | err = sysfs_create_group(&dev->kobj, &dme1737_vid_group); |
2132 | if (err) | 2057 | if (err) { |
2133 | goto exit_remove; | 2058 | goto exit_remove; |
2059 | } | ||
2134 | } | 2060 | } |
2135 | if (data->has_features & HAS_ZONE3) { | 2061 | if (data->has_features & HAS_ZONE3) { |
2136 | err = sysfs_create_group(&dev->kobj, &dme1737_zone3_group); | 2062 | err = sysfs_create_group(&dev->kobj, &dme1737_zone3_group); |
2137 | if (err) | 2063 | if (err) { |
2138 | goto exit_remove; | 2064 | goto exit_remove; |
2065 | } | ||
2139 | } | 2066 | } |
2140 | if (data->has_features & HAS_ZONE_HYST) { | 2067 | if (data->has_features & HAS_ZONE_HYST) { |
2141 | err = sysfs_create_group(&dev->kobj, &dme1737_zone_hyst_group); | 2068 | err = sysfs_create_group(&dev->kobj, &dme1737_zone_hyst_group); |
2142 | if (err) | 2069 | if (err) { |
2143 | goto exit_remove; | 2070 | goto exit_remove; |
2071 | } | ||
2144 | } | 2072 | } |
2145 | if (data->has_features & HAS_IN7) { | 2073 | if (data->has_features & HAS_IN7) { |
2146 | err = sysfs_create_group(&dev->kobj, &dme1737_in7_group); | 2074 | err = sysfs_create_group(&dev->kobj, &dme1737_in7_group); |
2147 | if (err) | 2075 | if (err) { |
2148 | goto exit_remove; | 2076 | goto exit_remove; |
2077 | } | ||
2149 | } | 2078 | } |
2150 | 2079 | ||
2151 | /* Create fan sysfs attributes */ | 2080 | /* Create fan sysfs attributes */ |
@@ -2153,8 +2082,9 @@ static int dme1737_create_files(struct device *dev) | |||
2153 | if (data->has_features & HAS_FAN(ix)) { | 2082 | if (data->has_features & HAS_FAN(ix)) { |
2154 | err = sysfs_create_group(&dev->kobj, | 2083 | err = sysfs_create_group(&dev->kobj, |
2155 | &dme1737_fan_group[ix]); | 2084 | &dme1737_fan_group[ix]); |
2156 | if (err) | 2085 | if (err) { |
2157 | goto exit_remove; | 2086 | goto exit_remove; |
2087 | } | ||
2158 | } | 2088 | } |
2159 | } | 2089 | } |
2160 | 2090 | ||
@@ -2163,21 +2093,21 @@ static int dme1737_create_files(struct device *dev) | |||
2163 | if (data->has_features & HAS_PWM(ix)) { | 2093 | if (data->has_features & HAS_PWM(ix)) { |
2164 | err = sysfs_create_group(&dev->kobj, | 2094 | err = sysfs_create_group(&dev->kobj, |
2165 | &dme1737_pwm_group[ix]); | 2095 | &dme1737_pwm_group[ix]); |
2166 | if (err) | 2096 | if (err) { |
2167 | goto exit_remove; | 2097 | goto exit_remove; |
2098 | } | ||
2168 | if ((data->has_features & HAS_PWM_MIN) && (ix < 3)) { | 2099 | if ((data->has_features & HAS_PWM_MIN) && (ix < 3)) { |
2169 | err = sysfs_create_file(&dev->kobj, | 2100 | err = sysfs_create_file(&dev->kobj, |
2170 | dme1737_auto_pwm_min_attr[ix]); | 2101 | dme1737_auto_pwm_min_attr[ix]); |
2171 | if (err) | 2102 | if (err) { |
2172 | goto exit_remove; | 2103 | goto exit_remove; |
2104 | } | ||
2173 | } | 2105 | } |
2174 | } | 2106 | } |
2175 | } | 2107 | } |
2176 | 2108 | ||
2177 | /* | 2109 | /* Inform if the device is locked. Otherwise change the permissions of |
2178 | * Inform if the device is locked. Otherwise change the permissions of | 2110 | * selected attributes from read-only to read-writeable. */ |
2179 | * selected attributes from read-only to read-writeable. | ||
2180 | */ | ||
2181 | if (data->config & 0x02) { | 2111 | if (data->config & 0x02) { |
2182 | dev_info(dev, "Device is locked. Some attributes " | 2112 | dev_info(dev, "Device is locked. Some attributes " |
2183 | "will be read-only.\n"); | 2113 | "will be read-only.\n"); |
@@ -2264,30 +2194,26 @@ static int dme1737_init_device(struct device *dev) | |||
2264 | return -EFAULT; | 2194 | return -EFAULT; |
2265 | } | 2195 | } |
2266 | 2196 | ||
2267 | /* | 2197 | /* Determine which optional fan and pwm features are enabled (only |
2268 | * Determine which optional fan and pwm features are enabled (only | 2198 | * valid for I2C devices) */ |
2269 | * valid for I2C devices) | ||
2270 | */ | ||
2271 | if (client) { /* I2C chip */ | 2199 | if (client) { /* I2C chip */ |
2272 | data->config2 = dme1737_read(data, DME1737_REG_CONFIG2); | 2200 | data->config2 = dme1737_read(data, DME1737_REG_CONFIG2); |
2273 | /* Check if optional fan3 input is enabled */ | 2201 | /* Check if optional fan3 input is enabled */ |
2274 | if (data->config2 & 0x04) | 2202 | if (data->config2 & 0x04) { |
2275 | data->has_features |= HAS_FAN(2); | 2203 | data->has_features |= HAS_FAN(2); |
2204 | } | ||
2276 | 2205 | ||
2277 | /* | 2206 | /* Fan4 and pwm3 are only available if the client's I2C address |
2278 | * Fan4 and pwm3 are only available if the client's I2C address | ||
2279 | * is the default 0x2e. Otherwise the I/Os associated with | 2207 | * is the default 0x2e. Otherwise the I/Os associated with |
2280 | * these functions are used for addr enable/select. | 2208 | * these functions are used for addr enable/select. */ |
2281 | */ | 2209 | if (client->addr == 0x2e) { |
2282 | if (client->addr == 0x2e) | ||
2283 | data->has_features |= HAS_FAN(3) | HAS_PWM(2); | 2210 | data->has_features |= HAS_FAN(3) | HAS_PWM(2); |
2211 | } | ||
2284 | 2212 | ||
2285 | /* | 2213 | /* Determine which of the optional fan[5-6] and pwm[5-6] |
2286 | * Determine which of the optional fan[5-6] and pwm[5-6] | ||
2287 | * features are enabled. For this, we need to query the runtime | 2214 | * features are enabled. For this, we need to query the runtime |
2288 | * registers through the Super-IO LPC interface. Try both | 2215 | * registers through the Super-IO LPC interface. Try both |
2289 | * config ports 0x2e and 0x4e. | 2216 | * config ports 0x2e and 0x4e. */ |
2290 | */ | ||
2291 | if (dme1737_i2c_get_features(0x2e, data) && | 2217 | if (dme1737_i2c_get_features(0x2e, data) && |
2292 | dme1737_i2c_get_features(0x4e, data)) { | 2218 | dme1737_i2c_get_features(0x4e, data)) { |
2293 | dev_warn(dev, "Failed to query Super-IO for optional " | 2219 | dev_warn(dev, "Failed to query Super-IO for optional " |
@@ -2345,11 +2271,9 @@ static int dme1737_init_device(struct device *dev) | |||
2345 | ((reg >> 4) & 0x03) + 1); | 2271 | ((reg >> 4) & 0x03) + 1); |
2346 | } | 2272 | } |
2347 | 2273 | ||
2348 | /* | 2274 | /* Switch pwm[1-3] to manual mode if they are currently disabled and |
2349 | * Switch pwm[1-3] to manual mode if they are currently disabled and | ||
2350 | * set the duty-cycles to 0% (which is identical to the PWMs being | 2275 | * set the duty-cycles to 0% (which is identical to the PWMs being |
2351 | * disabled). | 2276 | * disabled). */ |
2352 | */ | ||
2353 | if (!(data->config & 0x02)) { | 2277 | if (!(data->config & 0x02)) { |
2354 | for (ix = 0; ix < 3; ix++) { | 2278 | for (ix = 0; ix < 3; ix++) { |
2355 | data->pwm_config[ix] = dme1737_read(data, | 2279 | data->pwm_config[ix] = dme1737_read(data, |
@@ -2374,8 +2298,9 @@ static int dme1737_init_device(struct device *dev) | |||
2374 | data->pwm_acz[2] = 4; /* pwm3 -> zone3 */ | 2298 | data->pwm_acz[2] = 4; /* pwm3 -> zone3 */ |
2375 | 2299 | ||
2376 | /* Set VRM */ | 2300 | /* Set VRM */ |
2377 | if (data->has_features & HAS_VID) | 2301 | if (data->has_features & HAS_VID) { |
2378 | data->vrm = vid_which_vrm(); | 2302 | data->vrm = vid_which_vrm(); |
2303 | } | ||
2379 | 2304 | ||
2380 | return 0; | 2305 | return 0; |
2381 | } | 2306 | } |
@@ -2393,10 +2318,8 @@ static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data) | |||
2393 | 2318 | ||
2394 | dme1737_sio_enter(sio_cip); | 2319 | dme1737_sio_enter(sio_cip); |
2395 | 2320 | ||
2396 | /* | 2321 | /* Check device ID |
2397 | * Check device ID | 2322 | * We currently know about two kinds of DME1737 and SCH5027. */ |
2398 | * We currently know about two kinds of DME1737 and SCH5027. | ||
2399 | */ | ||
2400 | reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); | 2323 | reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); |
2401 | if (!(reg == DME1737_ID_1 || reg == DME1737_ID_2 || | 2324 | if (!(reg == DME1737_ID_1 || reg == DME1737_ID_2 || |
2402 | reg == SCH5027_ID)) { | 2325 | reg == SCH5027_ID)) { |
@@ -2415,19 +2338,21 @@ static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data) | |||
2415 | goto exit; | 2338 | goto exit; |
2416 | } | 2339 | } |
2417 | 2340 | ||
2418 | /* | 2341 | /* Read the runtime registers to determine which optional features |
2419 | * Read the runtime registers to determine which optional features | ||
2420 | * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set | 2342 | * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set |
2421 | * to '10' if the respective feature is enabled. | 2343 | * to '10' if the respective feature is enabled. */ |
2422 | */ | 2344 | if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */ |
2423 | if ((inb(addr + 0x43) & 0x0c) == 0x08) /* fan6 */ | ||
2424 | data->has_features |= HAS_FAN(5); | 2345 | data->has_features |= HAS_FAN(5); |
2425 | if ((inb(addr + 0x44) & 0x0c) == 0x08) /* pwm6 */ | 2346 | } |
2347 | if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */ | ||
2426 | data->has_features |= HAS_PWM(5); | 2348 | data->has_features |= HAS_PWM(5); |
2427 | if ((inb(addr + 0x45) & 0x0c) == 0x08) /* fan5 */ | 2349 | } |
2350 | if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */ | ||
2428 | data->has_features |= HAS_FAN(4); | 2351 | data->has_features |= HAS_FAN(4); |
2429 | if ((inb(addr + 0x46) & 0x0c) == 0x08) /* pwm5 */ | 2352 | } |
2353 | if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */ | ||
2430 | data->has_features |= HAS_PWM(4); | 2354 | data->has_features |= HAS_PWM(4); |
2355 | } | ||
2431 | 2356 | ||
2432 | exit: | 2357 | exit: |
2433 | dme1737_sio_exit(sio_cip); | 2358 | dme1737_sio_exit(sio_cip); |
@@ -2444,8 +2369,9 @@ static int dme1737_i2c_detect(struct i2c_client *client, | |||
2444 | u8 company, verstep = 0; | 2369 | u8 company, verstep = 0; |
2445 | const char *name; | 2370 | const char *name; |
2446 | 2371 | ||
2447 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | 2372 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { |
2448 | return -ENODEV; | 2373 | return -ENODEV; |
2374 | } | ||
2449 | 2375 | ||
2450 | company = i2c_smbus_read_byte_data(client, DME1737_REG_COMPANY); | 2376 | company = i2c_smbus_read_byte_data(client, DME1737_REG_COMPANY); |
2451 | verstep = i2c_smbus_read_byte_data(client, DME1737_REG_VERSTEP); | 2377 | verstep = i2c_smbus_read_byte_data(client, DME1737_REG_VERSTEP); |
@@ -2475,9 +2401,11 @@ static int dme1737_i2c_probe(struct i2c_client *client, | |||
2475 | struct device *dev = &client->dev; | 2401 | struct device *dev = &client->dev; |
2476 | int err; | 2402 | int err; |
2477 | 2403 | ||
2478 | data = devm_kzalloc(dev, sizeof(struct dme1737_data), GFP_KERNEL); | 2404 | data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL); |
2479 | if (!data) | 2405 | if (!data) { |
2480 | return -ENOMEM; | 2406 | err = -ENOMEM; |
2407 | goto exit; | ||
2408 | } | ||
2481 | 2409 | ||
2482 | i2c_set_clientdata(client, data); | 2410 | i2c_set_clientdata(client, data); |
2483 | data->type = id->driver_data; | 2411 | data->type = id->driver_data; |
@@ -2489,14 +2417,14 @@ static int dme1737_i2c_probe(struct i2c_client *client, | |||
2489 | err = dme1737_init_device(dev); | 2417 | err = dme1737_init_device(dev); |
2490 | if (err) { | 2418 | if (err) { |
2491 | dev_err(dev, "Failed to initialize device.\n"); | 2419 | dev_err(dev, "Failed to initialize device.\n"); |
2492 | return err; | 2420 | goto exit_kfree; |
2493 | } | 2421 | } |
2494 | 2422 | ||
2495 | /* Create sysfs files */ | 2423 | /* Create sysfs files */ |
2496 | err = dme1737_create_files(dev); | 2424 | err = dme1737_create_files(dev); |
2497 | if (err) { | 2425 | if (err) { |
2498 | dev_err(dev, "Failed to create sysfs files.\n"); | 2426 | dev_err(dev, "Failed to create sysfs files.\n"); |
2499 | return err; | 2427 | goto exit_kfree; |
2500 | } | 2428 | } |
2501 | 2429 | ||
2502 | /* Register device */ | 2430 | /* Register device */ |
@@ -2511,6 +2439,9 @@ static int dme1737_i2c_probe(struct i2c_client *client, | |||
2511 | 2439 | ||
2512 | exit_remove: | 2440 | exit_remove: |
2513 | dme1737_remove_files(dev); | 2441 | dme1737_remove_files(dev); |
2442 | exit_kfree: | ||
2443 | kfree(data); | ||
2444 | exit: | ||
2514 | return err; | 2445 | return err; |
2515 | } | 2446 | } |
2516 | 2447 | ||
@@ -2521,6 +2452,7 @@ static int dme1737_i2c_remove(struct i2c_client *client) | |||
2521 | hwmon_device_unregister(data->hwmon_dev); | 2452 | hwmon_device_unregister(data->hwmon_dev); |
2522 | dme1737_remove_files(&client->dev); | 2453 | dme1737_remove_files(&client->dev); |
2523 | 2454 | ||
2455 | kfree(data); | ||
2524 | return 0; | 2456 | return 0; |
2525 | } | 2457 | } |
2526 | 2458 | ||
@@ -2554,10 +2486,8 @@ static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr) | |||
2554 | 2486 | ||
2555 | dme1737_sio_enter(sio_cip); | 2487 | dme1737_sio_enter(sio_cip); |
2556 | 2488 | ||
2557 | /* | 2489 | /* Check device ID |
2558 | * Check device ID | 2490 | * We currently know about SCH3112, SCH3114, SCH3116, and SCH5127 */ |
2559 | * We currently know about SCH3112, SCH3114, SCH3116, and SCH5127 | ||
2560 | */ | ||
2561 | reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); | 2491 | reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); |
2562 | if (!(reg == SCH3112_ID || reg == SCH3114_ID || reg == SCH3116_ID || | 2492 | if (!(reg == SCH3112_ID || reg == SCH3114_ID || reg == SCH3116_ID || |
2563 | reg == SCH5127_ID)) { | 2493 | reg == SCH5127_ID)) { |
@@ -2577,10 +2507,8 @@ static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr) | |||
2577 | goto exit; | 2507 | goto exit; |
2578 | } | 2508 | } |
2579 | 2509 | ||
2580 | /* | 2510 | /* Access to the hwmon registers is through an index/data register |
2581 | * Access to the hwmon registers is through an index/data register | 2511 | * pair located at offset 0x70/0x71. */ |
2582 | * pair located at offset 0x70/0x71. | ||
2583 | */ | ||
2584 | *addr = base_addr + 0x70; | 2512 | *addr = base_addr + 0x70; |
2585 | 2513 | ||
2586 | exit: | 2514 | exit: |
@@ -2630,7 +2558,7 @@ exit: | |||
2630 | return err; | 2558 | return err; |
2631 | } | 2559 | } |
2632 | 2560 | ||
2633 | static int dme1737_isa_probe(struct platform_device *pdev) | 2561 | static int __devinit dme1737_isa_probe(struct platform_device *pdev) |
2634 | { | 2562 | { |
2635 | u8 company, device; | 2563 | u8 company, device; |
2636 | struct resource *res; | 2564 | struct resource *res; |
@@ -2639,16 +2567,19 @@ static int dme1737_isa_probe(struct platform_device *pdev) | |||
2639 | int err; | 2567 | int err; |
2640 | 2568 | ||
2641 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | 2569 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); |
2642 | if (!devm_request_region(dev, res->start, DME1737_EXTENT, "dme1737")) { | 2570 | if (!request_region(res->start, DME1737_EXTENT, "dme1737")) { |
2643 | dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n", | 2571 | dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n", |
2644 | (unsigned short)res->start, | 2572 | (unsigned short)res->start, |
2645 | (unsigned short)res->start + DME1737_EXTENT - 1); | 2573 | (unsigned short)res->start + DME1737_EXTENT - 1); |
2646 | return -EBUSY; | 2574 | err = -EBUSY; |
2575 | goto exit; | ||
2647 | } | 2576 | } |
2648 | 2577 | ||
2649 | data = devm_kzalloc(dev, sizeof(struct dme1737_data), GFP_KERNEL); | 2578 | data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL); |
2650 | if (!data) | 2579 | if (!data) { |
2651 | return -ENOMEM; | 2580 | err = -ENOMEM; |
2581 | goto exit_release_region; | ||
2582 | } | ||
2652 | 2583 | ||
2653 | data->addr = res->start; | 2584 | data->addr = res->start; |
2654 | platform_set_drvdata(pdev, data); | 2585 | platform_set_drvdata(pdev, data); |
@@ -2674,14 +2605,16 @@ static int dme1737_isa_probe(struct platform_device *pdev) | |||
2674 | (device == SCH5127_DEVICE)) { | 2605 | (device == SCH5127_DEVICE)) { |
2675 | data->type = sch5127; | 2606 | data->type = sch5127; |
2676 | } else { | 2607 | } else { |
2677 | return -ENODEV; | 2608 | err = -ENODEV; |
2609 | goto exit_kfree; | ||
2678 | } | 2610 | } |
2679 | } | 2611 | } |
2680 | 2612 | ||
2681 | if (data->type == sch5127) | 2613 | if (data->type == sch5127) { |
2682 | data->name = "sch5127"; | 2614 | data->name = "sch5127"; |
2683 | else | 2615 | } else { |
2684 | data->name = "sch311x"; | 2616 | data->name = "sch311x"; |
2617 | } | ||
2685 | 2618 | ||
2686 | /* Initialize the mutex */ | 2619 | /* Initialize the mutex */ |
2687 | mutex_init(&data->update_lock); | 2620 | mutex_init(&data->update_lock); |
@@ -2693,14 +2626,14 @@ static int dme1737_isa_probe(struct platform_device *pdev) | |||
2693 | err = dme1737_init_device(dev); | 2626 | err = dme1737_init_device(dev); |
2694 | if (err) { | 2627 | if (err) { |
2695 | dev_err(dev, "Failed to initialize device.\n"); | 2628 | dev_err(dev, "Failed to initialize device.\n"); |
2696 | return err; | 2629 | goto exit_kfree; |
2697 | } | 2630 | } |
2698 | 2631 | ||
2699 | /* Create sysfs files */ | 2632 | /* Create sysfs files */ |
2700 | err = dme1737_create_files(dev); | 2633 | err = dme1737_create_files(dev); |
2701 | if (err) { | 2634 | if (err) { |
2702 | dev_err(dev, "Failed to create sysfs files.\n"); | 2635 | dev_err(dev, "Failed to create sysfs files.\n"); |
2703 | return err; | 2636 | goto exit_kfree; |
2704 | } | 2637 | } |
2705 | 2638 | ||
2706 | /* Register device */ | 2639 | /* Register device */ |
@@ -2715,15 +2648,24 @@ static int dme1737_isa_probe(struct platform_device *pdev) | |||
2715 | 2648 | ||
2716 | exit_remove_files: | 2649 | exit_remove_files: |
2717 | dme1737_remove_files(dev); | 2650 | dme1737_remove_files(dev); |
2651 | exit_kfree: | ||
2652 | platform_set_drvdata(pdev, NULL); | ||
2653 | kfree(data); | ||
2654 | exit_release_region: | ||
2655 | release_region(res->start, DME1737_EXTENT); | ||
2656 | exit: | ||
2718 | return err; | 2657 | return err; |
2719 | } | 2658 | } |
2720 | 2659 | ||
2721 | static int dme1737_isa_remove(struct platform_device *pdev) | 2660 | static int __devexit dme1737_isa_remove(struct platform_device *pdev) |
2722 | { | 2661 | { |
2723 | struct dme1737_data *data = platform_get_drvdata(pdev); | 2662 | struct dme1737_data *data = platform_get_drvdata(pdev); |
2724 | 2663 | ||
2725 | hwmon_device_unregister(data->hwmon_dev); | 2664 | hwmon_device_unregister(data->hwmon_dev); |
2726 | dme1737_remove_files(&pdev->dev); | 2665 | dme1737_remove_files(&pdev->dev); |
2666 | release_region(data->addr, DME1737_EXTENT); | ||
2667 | platform_set_drvdata(pdev, NULL); | ||
2668 | kfree(data); | ||
2727 | 2669 | ||
2728 | return 0; | 2670 | return 0; |
2729 | } | 2671 | } |
@@ -2734,7 +2676,7 @@ static struct platform_driver dme1737_isa_driver = { | |||
2734 | .name = "dme1737", | 2676 | .name = "dme1737", |
2735 | }, | 2677 | }, |
2736 | .probe = dme1737_isa_probe, | 2678 | .probe = dme1737_isa_probe, |
2737 | .remove = dme1737_isa_remove, | 2679 | .remove = __devexit_p(dme1737_isa_remove), |
2738 | }; | 2680 | }; |
2739 | 2681 | ||
2740 | /* --------------------------------------------------------------------- | 2682 | /* --------------------------------------------------------------------- |
@@ -2747,8 +2689,9 @@ static int __init dme1737_init(void) | |||
2747 | unsigned short addr; | 2689 | unsigned short addr; |
2748 | 2690 | ||
2749 | err = i2c_add_driver(&dme1737_i2c_driver); | 2691 | err = i2c_add_driver(&dme1737_i2c_driver); |
2750 | if (err) | 2692 | if (err) { |
2751 | goto exit; | 2693 | goto exit; |
2694 | } | ||
2752 | 2695 | ||
2753 | if (dme1737_isa_detect(0x2e, &addr) && | 2696 | if (dme1737_isa_detect(0x2e, &addr) && |
2754 | dme1737_isa_detect(0x4e, &addr) && | 2697 | dme1737_isa_detect(0x4e, &addr) && |
@@ -2760,13 +2703,15 @@ static int __init dme1737_init(void) | |||
2760 | } | 2703 | } |
2761 | 2704 | ||
2762 | err = platform_driver_register(&dme1737_isa_driver); | 2705 | err = platform_driver_register(&dme1737_isa_driver); |
2763 | if (err) | 2706 | if (err) { |
2764 | goto exit_del_i2c_driver; | 2707 | goto exit_del_i2c_driver; |
2708 | } | ||
2765 | 2709 | ||
2766 | /* Sets global pdev as a side effect */ | 2710 | /* Sets global pdev as a side effect */ |
2767 | err = dme1737_isa_device_add(addr); | 2711 | err = dme1737_isa_device_add(addr); |
2768 | if (err) | 2712 | if (err) { |
2769 | goto exit_del_isa_driver; | 2713 | goto exit_del_isa_driver; |
2714 | } | ||
2770 | 2715 | ||
2771 | return 0; | 2716 | return 0; |
2772 | 2717 | ||