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authorRajendra Nayak <rnayak@ti.com>2012-11-06 17:28:25 -0500
committerPaul Walmsley <paul@pwsan.com>2012-11-12 21:18:50 -0500
commit91c5b6d243d957deff3c265b2764e89a65879d69 (patch)
tree1c90660504ad2d4194f9aa754b68d3de3f66e385 /arch
parentc4a1ea2c6229b18c10c5a49a0f8f4ad2c3e2355d (diff)
ARM: OMAP4: clock: Cleanup !CONFIG_COMMON_CLK parts
Clean all #ifdef's added to OMAP4 clock code to make it COMMON clk ready, now that CONFIG_COMMON_CLK is enabled. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Mike Turquette <mturquette@ti.com> [paul@pwsan.com: remove some ifdefs in mach-omap2/io.c] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/dpll44xx.c33
-rw-r--r--arch/arm/mach-omap2/io.c6
2 files changed, 0 insertions, 39 deletions
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index aa75a3c1002..d3326c474fd 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -21,11 +21,7 @@
21#include "cm-regbits-44xx.h" 21#include "cm-regbits-44xx.h"
22 22
23/* Supported only on OMAP4 */ 23/* Supported only on OMAP4 */
24#ifdef CONFIG_COMMON_CLK
25int omap4_dpllmx_gatectrl_read(struct clk_hw_omap *clk) 24int omap4_dpllmx_gatectrl_read(struct clk_hw_omap *clk)
26#else
27int omap4_dpllmx_gatectrl_read(struct clk *clk)
28#endif
29{ 25{
30 u32 v; 26 u32 v;
31 u32 mask; 27 u32 mask;
@@ -44,11 +40,7 @@ int omap4_dpllmx_gatectrl_read(struct clk *clk)
44 return v; 40 return v;
45} 41}
46 42
47#ifdef CONFIG_COMMON_CLK
48void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk) 43void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk)
49#else
50void omap4_dpllmx_allow_gatectrl(struct clk *clk)
51#endif
52{ 44{
53 u32 v; 45 u32 v;
54 u32 mask; 46 u32 mask;
@@ -66,11 +58,7 @@ void omap4_dpllmx_allow_gatectrl(struct clk *clk)
66 __raw_writel(v, clk->clksel_reg); 58 __raw_writel(v, clk->clksel_reg);
67} 59}
68 60
69#ifdef CONFIG_COMMON_CLK
70void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk) 61void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk)
71#else
72void omap4_dpllmx_deny_gatectrl(struct clk *clk)
73#endif
74{ 62{
75 u32 v; 63 u32 v;
76 u32 mask; 64 u32 mask;
@@ -88,17 +76,10 @@ void omap4_dpllmx_deny_gatectrl(struct clk *clk)
88 __raw_writel(v, clk->clksel_reg); 76 __raw_writel(v, clk->clksel_reg);
89} 77}
90 78
91#ifdef CONFIG_COMMON_CLK
92const struct clk_hw_omap_ops clkhwops_omap4_dpllmx = { 79const struct clk_hw_omap_ops clkhwops_omap4_dpllmx = {
93 .allow_idle = omap4_dpllmx_allow_gatectrl, 80 .allow_idle = omap4_dpllmx_allow_gatectrl,
94 .deny_idle = omap4_dpllmx_deny_gatectrl, 81 .deny_idle = omap4_dpllmx_deny_gatectrl,
95}; 82};
96#else
97const struct clkops clkops_omap4_dpllmx_ops = {
98 .allow_idle = omap4_dpllmx_allow_gatectrl,
99 .deny_idle = omap4_dpllmx_deny_gatectrl,
100};
101#endif
102 83
103/** 84/**
104 * omap4_dpll_regm4xen_recalc - compute DPLL rate, considering REGM4XEN bit 85 * omap4_dpll_regm4xen_recalc - compute DPLL rate, considering REGM4XEN bit
@@ -109,15 +90,10 @@ const struct clkops clkops_omap4_dpllmx_ops = {
109 * OMAP4 ABE DPLL. Returns the DPLL's output rate (before M-dividers) 90 * OMAP4 ABE DPLL. Returns the DPLL's output rate (before M-dividers)
110 * upon success, or 0 upon error. 91 * upon success, or 0 upon error.
111 */ 92 */
112#ifdef CONFIG_COMMON_CLK
113unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw, 93unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw,
114 unsigned long parent_rate) 94 unsigned long parent_rate)
115{ 95{
116 struct clk_hw_omap *clk = to_clk_hw_omap(hw); 96 struct clk_hw_omap *clk = to_clk_hw_omap(hw);
117#else
118unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk)
119{
120#endif
121 u32 v; 97 u32 v;
122 unsigned long rate; 98 unsigned long rate;
123 struct dpll_data *dd; 99 struct dpll_data *dd;
@@ -149,16 +125,11 @@ unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk)
149 * M-dividers) upon success, -EINVAL if @clk is null or not a DPLL, or 125 * M-dividers) upon success, -EINVAL if @clk is null or not a DPLL, or
150 * ~0 if an error occurred in omap2_dpll_round_rate(). 126 * ~0 if an error occurred in omap2_dpll_round_rate().
151 */ 127 */
152#ifdef CONFIG_COMMON_CLK
153long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw, 128long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw,
154 unsigned long target_rate, 129 unsigned long target_rate,
155 unsigned long *parent_rate) 130 unsigned long *parent_rate)
156{ 131{
157 struct clk_hw_omap *clk = to_clk_hw_omap(hw); 132 struct clk_hw_omap *clk = to_clk_hw_omap(hw);
158#else
159long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate)
160{
161#endif
162 u32 v; 133 u32 v;
163 struct dpll_data *dd; 134 struct dpll_data *dd;
164 long r; 135 long r;
@@ -174,11 +145,7 @@ long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate)
174 if (v) 145 if (v)
175 target_rate = target_rate / OMAP4430_REGM4XEN_MULT; 146 target_rate = target_rate / OMAP4430_REGM4XEN_MULT;
176 147
177#ifdef CONFIG_COMMON_CLK
178 r = omap2_dpll_round_rate(hw, target_rate, NULL); 148 r = omap2_dpll_round_rate(hw, target_rate, NULL);
179#else
180 r = omap2_dpll_round_rate(clk, target_rate);
181#endif
182 if (r == ~0) 149 if (r == ~0)
183 return r; 150 return r;
184 151
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 41c601311b3..4332080731c 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -407,9 +407,7 @@ void __init omap2420_init_late(void)
407 omap_mux_late_init(); 407 omap_mux_late_init();
408 omap2_common_pm_late_init(); 408 omap2_common_pm_late_init();
409 omap2_pm_init(); 409 omap2_pm_init();
410#ifdef CONFIG_COMMON_CLK
411 omap2_clk_enable_autoidle_all(); 410 omap2_clk_enable_autoidle_all();
412#endif
413} 411}
414#endif 412#endif
415 413
@@ -565,9 +563,7 @@ void __init ti81xx_init_late(void)
565 omap_mux_late_init(); 563 omap_mux_late_init();
566 omap2_common_pm_late_init(); 564 omap2_common_pm_late_init();
567 omap3_pm_init(); 565 omap3_pm_init();
568#ifdef CONFIG_COMMON_CLK
569 omap2_clk_enable_autoidle_all(); 566 omap2_clk_enable_autoidle_all();
570#endif
571} 567}
572#endif 568#endif
573 569
@@ -621,9 +617,7 @@ void __init omap4430_init_late(void)
621 omap_mux_late_init(); 617 omap_mux_late_init();
622 omap2_common_pm_late_init(); 618 omap2_common_pm_late_init();
623 omap4_pm_init(); 619 omap4_pm_init();
624#ifdef CONFIG_COMMON_CLK
625 omap2_clk_enable_autoidle_all(); 620 omap2_clk_enable_autoidle_all();
626#endif
627} 621}
628#endif 622#endif
629 623