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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2011-11-22 09:38:02 -0500
committerRalf Baechle <ralf@linux-mips.org>2011-12-07 17:03:44 -0500
commite84de0c61905030a0fe66b7210b6f1bb7c3e1eab (patch)
tree005bbd00a34966e36dd99dcbfd66428bf97769fa /arch/mips/sgi-ip22/ip22-mc.c
parent5611cc4572e889b62a7b4c72a413536bf6a9c416 (diff)
MIPS: GIO bus support for SGI IP22/28
SGI IP22/IP28 machines have GIO busses for adding graphics and other extension cards. This patch adds support for GIO driver/device handling and converts the newport console driver to a GIO driver. [ralf@linux-mips.org: Fixed build error caused by the modules.h -> export.h changes.] Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Acked-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> To: linux-fbdev@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2886/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sgi-ip22/ip22-mc.c')
-rw-r--r--arch/mips/sgi-ip22/ip22-mc.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/sgi-ip22/ip22-mc.c b/arch/mips/sgi-ip22/ip22-mc.c
index d22262ee685..75ada8a9713 100644
--- a/arch/mips/sgi-ip22/ip22-mc.c
+++ b/arch/mips/sgi-ip22/ip22-mc.c
@@ -139,11 +139,11 @@ void __init sgimc_init(void)
139 * zero. 139 * zero.
140 */ 140 */
141 /* don't touch parity settings for IP28 */ 141 /* don't touch parity settings for IP28 */
142#ifndef CONFIG_SGI_IP28
143 tmp = sgimc->cpuctrl0; 142 tmp = sgimc->cpuctrl0;
144 tmp |= (SGIMC_CCTRL0_EPERRGIO | SGIMC_CCTRL0_EPERRMEM | 143#ifndef CONFIG_SGI_IP28
145 SGIMC_CCTRL0_R4KNOCHKPARR); 144 tmp |= SGIMC_CCTRL0_EPERRGIO | SGIMC_CCTRL0_EPERRMEM;
146#endif 145#endif
146 tmp |= SGIMC_CCTRL0_R4KNOCHKPARR;
147 sgimc->cpuctrl0 = tmp; 147 sgimc->cpuctrl0 = tmp;
148 148
149 /* Step 3: Setup the MC write buffer depth, this is controlled 149 /* Step 3: Setup the MC write buffer depth, this is controlled
@@ -178,7 +178,8 @@ void __init sgimc_init(void)
178 */ 178 */
179 179
180 /* First the basic invariants across all GIO64 implementations. */ 180 /* First the basic invariants across all GIO64 implementations. */
181 tmp = SGIMC_GIOPAR_HPC64; /* All 1st HPC's interface at 64bits */ 181 tmp = sgimc->giopar & SGIMC_GIOPAR_GFX64; /* keep gfx 64bit settings */
182 tmp |= SGIMC_GIOPAR_HPC64; /* All 1st HPC's interface at 64bits */
182 tmp |= SGIMC_GIOPAR_ONEBUS; /* Only one physical GIO bus exists */ 183 tmp |= SGIMC_GIOPAR_ONEBUS; /* Only one physical GIO bus exists */
183 184
184 if (ip22_is_fullhouse()) { 185 if (ip22_is_fullhouse()) {
@@ -193,7 +194,6 @@ void __init sgimc_init(void)
193 tmp |= SGIMC_GIOPAR_PLINEEXP0; /* exp[01] pipelined */ 194 tmp |= SGIMC_GIOPAR_PLINEEXP0; /* exp[01] pipelined */
194 tmp |= SGIMC_GIOPAR_PLINEEXP1; 195 tmp |= SGIMC_GIOPAR_PLINEEXP1;
195 tmp |= SGIMC_GIOPAR_MASTEREISA; /* EISA masters */ 196 tmp |= SGIMC_GIOPAR_MASTEREISA; /* EISA masters */
196 tmp |= SGIMC_GIOPAR_GFX64; /* GFX at 64 bits */
197 } 197 }
198 } else { 198 } else {
199 /* Guiness specific settings. */ 199 /* Guiness specific settings. */