diff options
author | Jonathan Herman <hermanjl@cs.unc.edu> | 2013-01-17 16:15:55 -0500 |
---|---|---|
committer | Jonathan Herman <hermanjl@cs.unc.edu> | 2013-01-17 16:15:55 -0500 |
commit | 8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch) | |
tree | a8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /arch/mips/kernel/proc.c | |
parent | 406089d01562f1e2bf9f089fd7637009ebaad589 (diff) |
Patched in Tegra support.
Diffstat (limited to 'arch/mips/kernel/proc.c')
-rw-r--r-- | arch/mips/kernel/proc.c | 47 |
1 files changed, 22 insertions, 25 deletions
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 07dff54f2ce..e309665b6c8 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c | |||
@@ -25,7 +25,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
25 | int i; | 25 | int i; |
26 | 26 | ||
27 | #ifdef CONFIG_SMP | 27 | #ifdef CONFIG_SMP |
28 | if (!cpu_online(n)) | 28 | if (!cpu_isset(n, cpu_online_map)) |
29 | return 0; | 29 | return 0; |
30 | #endif | 30 | #endif |
31 | 31 | ||
@@ -41,48 +41,45 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
41 | 41 | ||
42 | seq_printf(m, "processor\t\t: %ld\n", n); | 42 | seq_printf(m, "processor\t\t: %ld\n", n); |
43 | sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", | 43 | sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", |
44 | cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : ""); | 44 | cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : ""); |
45 | seq_printf(m, fmt, __cpu_name[n], | 45 | seq_printf(m, fmt, __cpu_name[n], |
46 | (version >> 4) & 0x0f, version & 0x0f, | 46 | (version >> 4) & 0x0f, version & 0x0f, |
47 | (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); | 47 | (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); |
48 | seq_printf(m, "BogoMIPS\t\t: %u.%02u\n", | 48 | seq_printf(m, "BogoMIPS\t\t: %u.%02u\n", |
49 | cpu_data[n].udelay_val / (500000/HZ), | 49 | cpu_data[n].udelay_val / (500000/HZ), |
50 | (cpu_data[n].udelay_val / (5000/HZ)) % 100); | 50 | (cpu_data[n].udelay_val / (5000/HZ)) % 100); |
51 | seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); | 51 | seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); |
52 | seq_printf(m, "microsecond timers\t: %s\n", | 52 | seq_printf(m, "microsecond timers\t: %s\n", |
53 | cpu_has_counter ? "yes" : "no"); | 53 | cpu_has_counter ? "yes" : "no"); |
54 | seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize); | 54 | seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize); |
55 | seq_printf(m, "extra interrupt vector\t: %s\n", | 55 | seq_printf(m, "extra interrupt vector\t: %s\n", |
56 | cpu_has_divec ? "yes" : "no"); | 56 | cpu_has_divec ? "yes" : "no"); |
57 | seq_printf(m, "hardware watchpoint\t: %s", | 57 | seq_printf(m, "hardware watchpoint\t: %s", |
58 | cpu_has_watch ? "yes, " : "no\n"); | 58 | cpu_has_watch ? "yes, " : "no\n"); |
59 | if (cpu_has_watch) { | 59 | if (cpu_has_watch) { |
60 | seq_printf(m, "count: %d, address/irw mask: [", | 60 | seq_printf(m, "count: %d, address/irw mask: [", |
61 | cpu_data[n].watch_reg_count); | 61 | cpu_data[n].watch_reg_count); |
62 | for (i = 0; i < cpu_data[n].watch_reg_count; i++) | 62 | for (i = 0; i < cpu_data[n].watch_reg_count; i++) |
63 | seq_printf(m, "%s0x%04x", i ? ", " : "" , | 63 | seq_printf(m, "%s0x%04x", i ? ", " : "" , |
64 | cpu_data[n].watch_reg_masks[i]); | 64 | cpu_data[n].watch_reg_masks[i]); |
65 | seq_printf(m, "]\n"); | 65 | seq_printf(m, "]\n"); |
66 | } | 66 | } |
67 | 67 | seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n", | |
68 | seq_printf(m, "ASEs implemented\t:"); | 68 | cpu_has_mips16 ? " mips16" : "", |
69 | if (cpu_has_mips16) seq_printf(m, "%s", " mips16"); | 69 | cpu_has_mdmx ? " mdmx" : "", |
70 | if (cpu_has_mdmx) seq_printf(m, "%s", " mdmx"); | 70 | cpu_has_mips3d ? " mips3d" : "", |
71 | if (cpu_has_mips3d) seq_printf(m, "%s", " mips3d"); | 71 | cpu_has_smartmips ? " smartmips" : "", |
72 | if (cpu_has_smartmips) seq_printf(m, "%s", " smartmips"); | 72 | cpu_has_dsp ? " dsp" : "", |
73 | if (cpu_has_dsp) seq_printf(m, "%s", " dsp"); | 73 | cpu_has_mipsmt ? " mt" : "" |
74 | if (cpu_has_dsp2) seq_printf(m, "%s", " dsp2"); | 74 | ); |
75 | if (cpu_has_mipsmt) seq_printf(m, "%s", " mt"); | ||
76 | seq_printf(m, "\n"); | ||
77 | |||
78 | seq_printf(m, "shadow register sets\t: %d\n", | 75 | seq_printf(m, "shadow register sets\t: %d\n", |
79 | cpu_data[n].srsets); | 76 | cpu_data[n].srsets); |
80 | seq_printf(m, "kscratch registers\t: %d\n", | 77 | seq_printf(m, "kscratch registers\t: %d\n", |
81 | hweight8(cpu_data[n].kscratch_mask)); | 78 | hweight8(cpu_data[n].kscratch_mask)); |
82 | seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core); | 79 | seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core); |
83 | 80 | ||
84 | sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", | 81 | sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", |
85 | cpu_has_vce ? "%u" : "not available"); | 82 | cpu_has_vce ? "%u" : "not available"); |
86 | seq_printf(m, fmt, 'D', vced_count); | 83 | seq_printf(m, fmt, 'D', vced_count); |
87 | seq_printf(m, fmt, 'I', vcei_count); | 84 | seq_printf(m, fmt, 'I', vcei_count); |
88 | seq_printf(m, "\n"); | 85 | seq_printf(m, "\n"); |