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authors-paulraj@ti.com <s-paulraj@ti.com>2008-09-18 15:35:00 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2009-04-27 12:49:44 -0400
commitf9337405b21bafb1c1a24316b3e43b3d3d697925 (patch)
treed193761a55923a070721dc94bbfe0337132d4e0a /arch/arm/mach-davinci
parent9e16469c83167d6869ad6cbe83312027ec529c64 (diff)
davinci: DM355 IRQ Definitions
Adding IRQ defintions for DaVinci DM355 and default interrupt priorities for DM355 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci')
-rw-r--r--arch/arm/mach-davinci/include/mach/irqs.h51
-rw-r--r--arch/arm/mach-davinci/irq.c67
2 files changed, 118 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
index 9b0e412ebc2..18066074c99 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -152,4 +152,55 @@
152#define IRQ_DM646X_DDRINT 59 152#define IRQ_DM646X_DDRINT 59
153#define IRQ_DM646X_AEMIFINT 60 153#define IRQ_DM646X_AEMIFINT 60
154 154
155/* DaVinci DM355-specific Interrupts */
156#define IRQ_DM355_CCDC_VDINT0 0
157#define IRQ_DM355_CCDC_VDINT1 1
158#define IRQ_DM355_CCDC_VDINT2 2
159#define IRQ_DM355_IPIPE_HST 3
160#define IRQ_DM355_H3AINT 4
161#define IRQ_DM355_IPIPE_SDR 5
162#define IRQ_DM355_IPIPEIFINT 6
163#define IRQ_DM355_OSDINT 7
164#define IRQ_DM355_VENCINT 8
165#define IRQ_DM355_IMCOPINT 11
166#define IRQ_DM355_RTOINT 13
167#define IRQ_DM355_TINT4 13
168#define IRQ_DM355_TINT2_TINT12 13
169#define IRQ_DM355_UARTINT2 14
170#define IRQ_DM355_TINT5 14
171#define IRQ_DM355_TINT2_TINT34 14
172#define IRQ_DM355_TINT6 15
173#define IRQ_DM355_TINT3_TINT12 15
174#define IRQ_DM355_SPINT1_0 17
175#define IRQ_DM355_SPINT1_1 18
176#define IRQ_DM355_SPINT2_0 19
177#define IRQ_DM355_SPINT2_1 21
178#define IRQ_DM355_TINT7 22
179#define IRQ_DM355_TINT3_TINT34 22
180#define IRQ_DM355_SDIOINT0 23
181#define IRQ_DM355_MMCINT0 26
182#define IRQ_DM355_MSINT 26
183#define IRQ_DM355_MMCINT1 27
184#define IRQ_DM355_PWMINT3 28
185#define IRQ_DM355_SDIOINT1 31
186#define IRQ_DM355_SPINT0_0 42
187#define IRQ_DM355_SPINT0_1 43
188#define IRQ_DM355_GPIO0 44
189#define IRQ_DM355_GPIO1 45
190#define IRQ_DM355_GPIO2 46
191#define IRQ_DM355_GPIO3 47
192#define IRQ_DM355_GPIO4 48
193#define IRQ_DM355_GPIO5 49
194#define IRQ_DM355_GPIO6 50
195#define IRQ_DM355_GPIO7 51
196#define IRQ_DM355_GPIO8 52
197#define IRQ_DM355_GPIO9 53
198#define IRQ_DM355_GPIOBNK0 54
199#define IRQ_DM355_GPIOBNK1 55
200#define IRQ_DM355_GPIOBNK2 56
201#define IRQ_DM355_GPIOBNK3 57
202#define IRQ_DM355_GPIOBNK4 58
203#define IRQ_DM355_GPIOBNK5 59
204#define IRQ_DM355_GPIOBNK6 60
205
155#endif /* __ASM_ARCH_IRQS_H */ 206#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index cf08ef2945e..5a324c90e29 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -248,6 +248,71 @@ static const u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = {
248 [IRQ_EMUINT] = 7, 248 [IRQ_EMUINT] = 7,
249}; 249};
250 250
251static const u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = {
252 [IRQ_DM355_CCDC_VDINT0] = 2,
253 [IRQ_DM355_CCDC_VDINT1] = 6,
254 [IRQ_DM355_CCDC_VDINT2] = 6,
255 [IRQ_DM355_IPIPE_HST] = 6,
256 [IRQ_DM355_H3AINT] = 6,
257 [IRQ_DM355_IPIPE_SDR] = 6,
258 [IRQ_DM355_IPIPEIFINT] = 6,
259 [IRQ_DM355_OSDINT] = 7,
260 [IRQ_DM355_VENCINT] = 6,
261 [IRQ_ASQINT] = 6,
262 [IRQ_IMXINT] = 6,
263 [IRQ_USBINT] = 4,
264 [IRQ_DM355_RTOINT] = 4,
265 [IRQ_DM355_UARTINT2] = 7,
266 [IRQ_DM355_TINT6] = 7,
267 [IRQ_CCINT0] = 5, /* dma */
268 [IRQ_CCERRINT] = 5, /* dma */
269 [IRQ_TCERRINT0] = 5, /* dma */
270 [IRQ_TCERRINT] = 5, /* dma */
271 [IRQ_DM355_SPINT2_1] = 7,
272 [IRQ_DM355_TINT7] = 4,
273 [IRQ_DM355_SDIOINT0] = 7,
274 [IRQ_MBXINT] = 7,
275 [IRQ_MBRINT] = 7,
276 [IRQ_MMCINT] = 7,
277 [IRQ_DM355_MMCINT1] = 7,
278 [IRQ_DM355_PWMINT3] = 7,
279 [IRQ_DDRINT] = 7,
280 [IRQ_AEMIFINT] = 7,
281 [IRQ_DM355_SDIOINT1] = 4,
282 [IRQ_TINT0_TINT12] = 2, /* clockevent */
283 [IRQ_TINT0_TINT34] = 2, /* clocksource */
284 [IRQ_TINT1_TINT12] = 7, /* DSP timer */
285 [IRQ_TINT1_TINT34] = 7, /* system tick */
286 [IRQ_PWMINT0] = 7,
287 [IRQ_PWMINT1] = 7,
288 [IRQ_PWMINT2] = 7,
289 [IRQ_I2C] = 3,
290 [IRQ_UARTINT0] = 3,
291 [IRQ_UARTINT1] = 3,
292 [IRQ_DM355_SPINT0_0] = 3,
293 [IRQ_DM355_SPINT0_1] = 3,
294 [IRQ_DM355_GPIO0] = 3,
295 [IRQ_DM355_GPIO1] = 7,
296 [IRQ_DM355_GPIO2] = 4,
297 [IRQ_DM355_GPIO3] = 4,
298 [IRQ_DM355_GPIO4] = 7,
299 [IRQ_DM355_GPIO5] = 7,
300 [IRQ_DM355_GPIO6] = 7,
301 [IRQ_DM355_GPIO7] = 7,
302 [IRQ_DM355_GPIO8] = 7,
303 [IRQ_DM355_GPIO9] = 7,
304 [IRQ_DM355_GPIOBNK0] = 7,
305 [IRQ_DM355_GPIOBNK1] = 7,
306 [IRQ_DM355_GPIOBNK2] = 7,
307 [IRQ_DM355_GPIOBNK3] = 7,
308 [IRQ_DM355_GPIOBNK4] = 7,
309 [IRQ_DM355_GPIOBNK5] = 7,
310 [IRQ_DM355_GPIOBNK6] = 7,
311 [IRQ_COMMTX] = 7,
312 [IRQ_COMMRX] = 7,
313 [IRQ_EMUINT] = 7,
314};
315
251/* ARM Interrupt Controller Initialization */ 316/* ARM Interrupt Controller Initialization */
252void __init davinci_irq_init(void) 317void __init davinci_irq_init(void)
253{ 318{
@@ -257,6 +322,8 @@ void __init davinci_irq_init(void)
257 davinci_def_priorities = dm644x_default_priorities; 322 davinci_def_priorities = dm644x_default_priorities;
258 else if (cpu_is_davinci_dm646x()) 323 else if (cpu_is_davinci_dm646x())
259 davinci_def_priorities = dm646x_default_priorities; 324 davinci_def_priorities = dm646x_default_priorities;
325 else if (cpu_is_davinci_dm355())
326 davinci_def_priorities = dm355_default_priorities;
260 327
261 /* Clear all interrupt requests */ 328 /* Clear all interrupt requests */
262 davinci_irq_writel(~0x0, FIQ_REG0_OFFSET); 329 davinci_irq_writel(~0x0, FIQ_REG0_OFFSET);