#ifndef __INTEL_SST_COMMON_H__
#define __INTEL_SST_COMMON_H__
/*
 *  intel_sst_common.h - Intel SST Driver for audio engine
 *
 *  Copyright (C) 2008-10 Intel Corporation
 *  Authors:	Vinod Koul <vinod.koul@intel.com>
 *		Harsha Priya <priya.harsha@intel.com>
 *		Dharageswari R <dharageswari.r@intel.com>
 *		KP Jeeja <jeeja.kp@intel.com>
 *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; version 2 of the License.
 *
 *  This program is distributed in the hope that it will be useful, but
 *  WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 *  General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
 *
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *
 *  Common private declarations for SST
 */

#define SST_DRIVER_VERSION "1.2.09"
#define SST_VERSION_NUM 0x1209

/* driver names */
#define SST_DRV_NAME "intel_sst_driver"
#define SST_MRST_PCI_ID 0x080A
#define SST_MFLD_PCI_ID 0x082F
#define PCI_ID_LENGTH 4
#define SST_SUSPEND_DELAY 2000

enum sst_states {
	SST_FW_LOADED = 1,
	SST_FW_RUNNING,
	SST_UN_INIT,
	SST_ERROR,
	SST_SUSPENDED
};

#define MAX_ACTIVE_STREAM	3
#define MAX_ENC_STREAM		1
#define MAX_AM_HANDLES		1
#define ALLOC_TIMEOUT		5000
/* SST numbers */
#define SST_BLOCK_TIMEOUT	5000
#define TARGET_DEV_BLOCK_TIMEOUT	5000

#define BLOCK_UNINIT		-1
#define RX_TIMESLOT_UNINIT	-1

/* SST register map */
#define SST_CSR			0x00
#define SST_PISR		0x08
#define SST_PIMR		0x10
#define SST_ISRX		0x18
#define SST_IMRX		0x28
#define SST_IPCX		0x38 /* IPC IA-SST */
#define SST_IPCD		0x40 /* IPC SST-IA */
#define SST_ISRD		0x20 /* dummy register for shim workaround */
#define SST_SHIM_SIZE		0X44

#define SPI_MODE_ENABLE_BASE_ADDR 0xffae4000
#define FW_SIGNATURE_SIZE	4

/* PMIC and SST hardware states */
enum sst_mad_states {
	SND_MAD_UN_INIT = 0,
	SND_MAD_INIT_DONE,
};

/* stream states */
enum sst_stream_states {
	STREAM_UN_INIT	= 0,	/* Freed/Not used stream */
	STREAM_RUNNING	= 1,	/* Running */
	STREAM_PAUSED	= 2,	/* Paused stream */
	STREAM_DECODE	= 3,	/* stream is in decoding only state */
	STREAM_INIT	= 4,	/* stream init, waiting for data */
};


enum sst_ram_type {
	SST_IRAM	= 1,
	SST_DRAM	= 2,
};
/* SST shim registers to structure mapping  */
union config_status_reg {
	struct {
		u32 rsvd0:1;
		u32 sst_reset:1;
		u32 hw_rsvd:3;
		u32 sst_clk:2;
		u32 bypass:3;
		u32 run_stall:1;
		u32 rsvd1:2;
		u32 strb_cntr_rst:1;
		u32 rsvd:18;
	} part;
	u32 full;
};

union interrupt_reg {
	struct {
		u32 done_interrupt:1;
		u32 busy_interrupt:1;
		u32 rsvd:30;
	} part;
	u32 full;
};

union sst_pisr_reg {
	struct {
		u32 pssp0:1;
		u32 pssp1:1;
		u32 rsvd0:3;
		u32 dmac:1;
		u32 rsvd1:26;
	} part;
	u32 full;
};

union sst_pimr_reg {
	struct {
		u32 ssp0:1;
		u32 ssp1:1;
		u32 rsvd0:3;
		u32 dmac:1;
		u32 rsvd1:10;
		u32 ssp0_sc:1;
		u32 ssp1_sc:1;
		u32 rsvd2:3;
		u32 dmac_sc:1;
		u32 rsvd3:10;
	} part;
	u32 full;
};


struct sst_stream_bufs {
	struct list_head	node;
	u32			size;
	const char		*addr;
	u32			data_copied;
	bool			in_use;
	u32			offset;
};

struct snd_sst_user_cap_list {
	unsigned int iov_index; /* index of iov */
	unsigned long iov_offset; /* offset in iov */
	unsigned long offset; /* offset in kmem */
	unsigned long size; /* size copied */
	struct list_head node;
};
/*
This structure is used to block a user/fw data call to another
fw/user call
*/
struct sst_block {
	bool	condition; /* condition for blocking check */
	int	ret_code; /* ret code when block is released */
	void	*data; /* data to be appsed for block if any */
	bool	on;
};

enum snd_sst_buf_type {
	SST_BUF_USER_STATIC = 1,
	SST_BUF_USER_DYNAMIC,
	SST_BUF_MMAP_STATIC,
	SST_BUF_MMAP_DYNAMIC,
};

enum snd_src {
	SST_DRV = 1,
	MAD_DRV = 2
};

/**
 * struct stream_info - structure that holds the stream information
 *
 * @status : stream current state
 * @prev : stream prev state
 * @codec : stream codec
 * @sst_id : stream id
 * @ops : stream operation pb/cp/drm...
 * @bufs: stream buffer list
 * @lock : stream mutex for protecting state