19 files changed, 467 insertions, 219 deletions
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index fba8051fb29..6fce2fc2d12 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -131,22 +131,6 @@ extern int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity);
 */
 void acpi_unregister_gsi (u32 gsi);
-struct acpi_prt_entry {
-        struct list_head        node;
-        struct acpi_pci_id      id;
-        u8                      pin;
-        struct {
-                acpi_handle             handle;
-                u32                     index;
-        }                       link;
-        u32                     irq;
-};
-struct acpi_prt_list {
-        int                     count;
-        struct list_head        entries;
-};
 struct pci_dev;
 int acpi_pci_irq_enable (struct pci_dev *dev);
@@ -270,6 +254,7 @@ int acpi_check_mem_region(resource_size_t start, resource_size_t n,
 #ifdef CONFIG_PM_SLEEP
 void __init acpi_no_s4_hw_signature(void);
 void __init acpi_old_suspend_ordering(void);
+void __init acpi_s4_no_nvs(void);
 #endif /* CONFIG_PM_SLEEP */
 #else   /* CONFIG_ACPI */
diff --git a/include/linux/async_tx.h b/include/linux/async_tx.h
index 0f50d4cc436..45f6297821b 100644
--- a/include/linux/async_tx.h
+++ b/include/linux/async_tx.h
@@ -59,9 +59,7 @@ enum async_tx_flags {
 };
 #ifdef CONFIG_DMA_ENGINE
-void async_tx_issue_pending_all(void);
+#define async_tx_issue_pending_all dma_issue_pending_all
-enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx);
-void async_tx_run_dependencies(struct dma_async_tx_descriptor *tx);
 #ifdef CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL
 #include <asm/async_tx.h>
 #else
@@ -77,19 +75,6 @@ static inline void async_tx_issue_pending_all(void)
        do { } while (0);
 }
-static inline enum dma_status
-dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
-{
-        return DMA_SUCCESS;
-}
-static inline void
-async_tx_run_dependencies(struct dma_async_tx_descriptor *tx,
-        struct dma_chan *host_chan)
-{
-        do { } while (0);
-}
 static inline struct dma_chan *
 async_tx_find_channel(struct dma_async_tx_descriptor *depend_tx,
        enum dma_transaction_type tx_type, struct page **dst, int dst_count,
diff --git a/include/linux/atmel-mci.h b/include/linux/atmel-mci.h
index 2a2213eefd8..2f1f95737ac 100644
--- a/include/linux/atmel-mci.h
+++ b/include/linux/atmel-mci.h
@@ -3,7 +3,7 @@
 #define ATMEL_MCI_MAX_NR_SLOTS  2
-struct dma_slave;
+#include <linux/dw_dmac.h>
 /**
 * struct mci_slot_pdata - board-specific per-slot configuration
@@ -28,11 +28,11 @@ struct mci_slot_pdata {
 /**
 * struct mci_platform_data - board-specific MMC/SDcard configuration
- * @dma_slave: DMA slave interface to use in data transfers, or NULL.
+ * @dma_slave: DMA slave interface to use in data transfers.
 * @slot: Per-slot configuration data.
 */
 struct mci_platform_data {
-        struct dma_slave        *dma_slave;
+        struct dw_dma_slave     dma_slave;
        struct mci_slot_pdata   slot[ATMEL_MCI_MAX_NR_SLOTS];
 };
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index adb0b084eb5..64dea2ab326 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -29,32 +29,6 @@
 #include <linux/dma-mapping.h>
 /**
- * enum dma_state - resource PNP/power management state
- * @DMA_RESOURCE_SUSPEND: DMA device going into low power state
- * @DMA_RESOURCE_RESUME: DMA device returning to full power
- * @DMA_RESOURCE_AVAILABLE: DMA device available to the system
- * @DMA_RESOURCE_REMOVED: DMA device removed from the system
- */
-enum dma_state {
-        DMA_RESOURCE_SUSPEND,
-        DMA_RESOURCE_RESUME,
-        DMA_RESOURCE_AVAILABLE,
-        DMA_RESOURCE_REMOVED,
-};
-/**
- * enum dma_state_client - state of the channel in the client
- * @DMA_ACK: client would like to use, or was using this channel
- * @DMA_DUP: client has already seen this channel, or is not using this channel
- * @DMA_NAK: client does not want to see any more channels
- */
-enum dma_state_client {
-        DMA_ACK,
-        DMA_DUP,
-        DMA_NAK,
-};
-/**
 * typedef dma_cookie_t - an opaque DMA cookie
 *
 * if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code
@@ -89,23 +63,13 @@ enum dma_transaction_type {
        DMA_MEMSET,
        DMA_MEMCPY_CRC32C,
        DMA_INTERRUPT,
+        DMA_PRIVATE,
        DMA_SLAVE,
 };
 /* last transaction type for creation of the capabilities mask */
 #define DMA_TX_TYPE_END (DMA_SLAVE + 1)
-/**
- * enum dma_slave_width - DMA slave register access width.
- * @DMA_SLAVE_WIDTH_8BIT: Do 8-bit slave register accesses
- * @DMA_SLAVE_WIDTH_16BIT: Do 16-bit slave register accesses
- * @DMA_SLAVE_WIDTH_32BIT: Do 32-bit slave register accesses
- */
-enum dma_slave_width {
-        DMA_SLAVE_WIDTH_8BIT,
-        DMA_SLAVE_WIDTH_16BIT,
-        DMA_SLAVE_WIDTH_32BIT,
-};
 /**
 * enum dma_ctrl_flags - DMA flags to augment operation preparation,
@@ -132,32 +96,6 @@ enum dma_ctrl_flags {
 typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t;
 /**
- * struct dma_slave - Information about a DMA slave
- * @dev: device acting as DMA slave
- * @dma_dev: required DMA master device. If non-NULL, the client can not be
- *      bound to other masters than this.
- * @tx_reg: physical address of data register used for
- *      memory-to-peripheral transfers
- * @rx_reg: physical address of data register used for
- *      peripheral-to-memory transfers
- * @reg_width: peripheral register width
- *
- * If dma_dev is non-NULL, the client can not be bound to other DMA
- * masters than the one corresponding to this device. The DMA master
- * driver may use this to determine if there is controller-specific
- * data wrapped around this struct. Drivers of platform code that sets
- * the dma_dev field must therefore make sure to use an appropriate
- * controller-specific dma slave structure wrapping this struct.
- */
-struct dma_slave {
-        struct device           *dev;
-        struct device           *dma_dev;
-        dma_addr_t              tx_reg;
-        dma_addr_t              rx_reg;
-        enum dma_slave_width    reg_width;
-};
-/**
 * struct dma_chan_percpu - the per-CPU part of struct dma_chan
 * @refcount: local_t used for open-coded "bigref" counting
 * @memcpy_count: transaction counter
@@ -165,7 +103,6 @@ struct dma_slave {
 */
 struct dma_chan_percpu {
-        local_t refcount;
        /* stats */
        unsigned long memcpy_count;
        unsigned long bytes_transferred;
@@ -176,13 +113,14 @@ struct dma_chan_percpu {
 * @device: ptr to the dma device who supplies this channel, always !%NULL
 * @cookie: last cookie value returned to client
 * @chan_id: channel ID for sysfs
- * @class_dev: class device for sysfs
+ * @dev: class device for sysfs
 * @refcount: kref, used in "bigref" slow-mode
 * @slow_ref: indicates that the DMA channel is free
 * @rcu: the DMA channel's RCU head
 * @device_node: used to add this to the device chan list
 * @local: per-cpu pointer to a struct dma_chan_percpu
 * @client-count: how many clients are using this channel
+ * @table_count: number of appearances in the mem-to-mem allocation table
 */
 struct dma_chan {
        struct dma_device *device;
@@ -190,73 +128,47 @@ struct dma_chan {
        /* sysfs */
        int chan_id;
-        struct device dev;
+        struct dma_chan_dev *dev;
-        struct kref refcount;
-        int slow_ref;
-        struct rcu_head rcu;
        struct list_head device_node;
        struct dma_chan_percpu *local;
        int client_count;
+        int table_count;
 };
-#define to_dma_chan(p) container_of(p, struct dma_chan, dev)
+/**
+ * struct dma_chan_dev - relate sysfs device node to backing channel device
-void dma_chan_cleanup(struct kref *kref);
+ * @chan - driver channel device
+ * @device - sysfs device
-static inline void dma_chan_get(struct dma_chan *chan)
+ * @dev_id - parent dma_device dev_id
-{
+ * @idr_ref - reference count to gate release of dma_device dev_id
-        if (unlikely(chan->slow_ref))
+ */
-                kref_get(&chan->refcount);
+struct dma_chan_dev {
-        else {
+        struct dma_chan *chan;
-                local_inc(&(per_cpu_ptr(chan->local, get_cpu())->refcount));
+        struct device device;
-                put_cpu();
+        int dev_id;
-        }
+        atomic_t *idr_ref;
-}
+};
-static inline void dma_chan_put(struct dma_chan *chan)
+static inline const char *dma_chan_name(struct dma_chan *chan)
 {
-        if (unlikely(chan->slow_ref))
+        return dev_name(&chan->dev->device);
-                kref_put(&chan->refcount, dma_chan_cleanup);
-        else {
-                local_dec(&(per_cpu_ptr(chan->local, get_cpu())->refcount));
-                put_cpu();
-        }
 }
-/*
+void dma_chan_cleanup(struct kref *kref);
- * typedef dma_event_callback - function pointer to a DMA event callback
- * For each channel added to the system this routine is called for each client.
- * If the client would like to use the channel it returns '1' to signal (ack)
- * the dmaengine core to take out a reference on the channel and its
- * corresponding device.  A client must not 'ack' an available channel more
- * than once.  When a channel is removed all clients are notified.  If a client
- * is using the channel it must 'ack' the removal.  A client must not 'ack' a
- * removed channel more than once.
- * @client - 'this' pointer for the client context
- * @chan - channel to be acted upon
- * @state - available or removed
- */
-struct dma_client;
-typedef enum dma_state_client (*dma_event_callback) (struct dma_client *client,
-                struct dma_chan *chan, enum dma_state state);
 /**
- * struct dma_client - info on the entity making use of DMA services
+ * typedef dma_filter_fn - callback filter for dma_request_channel
- * @event_callback: func ptr to call when something happens
+ * @chan: channel to be reviewed
- * @cap_mask: only return channels that satisfy the requested capabilities
+ * @filter_param: opaque parameter passed through dma_request_channel
- *  a value of zero corresponds to any capability
+ *
- * @slave: data for preparing slave transfer. Must be non-NULL iff the
+ * When this optional parameter is specified in a call to dma_request_channel a
- *  DMA_SLAVE capability is requested.
+ * suitable channel is passed to this routine for further dispositioning before
- * @global_node: list_head for global dma_client_list
+ * being returned.  Where 'suitable' indicates a non-busy channel that
+ * satisfies the given capability mask.  It returns 'true' to indicate that the
+ * channel is suitable.
 */
-struct dma_client {
+typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);
-        dma_event_callback      event_callback;
-        dma_cap_mask_t          cap_mask;
-        struct dma_slave        *slave;
-        struct list_head        global_node;
-};
 typedef void (*dma_async_tx_callback)(void *dma_async_param);
 /**
@@ -323,14 +235,10 @@ struct dma_device {
        dma_cap_mask_t  cap_mask;
        int max_xor;
-        struct kref refcount;
-        struct completion done;
        int dev_id;
        struct device *dev;
-        int (*device_alloc_chan_resources)(struct dma_chan *chan,
+        int (*device_alloc_chan_resources)(struct dma_chan *chan);
-                        struct dma_client *client);
        void (*device_free_chan_resources)(struct dma_chan *chan);
        struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)(
@@ -362,9 +270,8 @@ struct dma_device {
 /* --- public DMA engine API --- */
-void dma_async_client_register(struct dma_client *client);
+void dmaengine_get(void);
-void dma_async_client_unregister(struct dma_client *client);
+void dmaengine_put(void);
-void dma_async_client_chan_request(struct dma_client *client);
 dma_cookie_t dma_async_memcpy_buf_to_buf(struct dma_chan *chan,
        void *dest, void *src, size_t len);
 dma_cookie_t dma_async_memcpy_buf_to_pg(struct dma_chan *chan,
@@ -406,6 +313,12 @@ __dma_cap_set(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp)
        set_bit(tx_type, dstp->bits);
 }
+#define dma_cap_zero(mask) __dma_cap_zero(&(mask))
+static inline void __dma_cap_zero(dma_cap_mask_t *dstp)
+{
+        bitmap_zero(dstp->bits, DMA_TX_TYPE_END);
+}
 #define dma_has_cap(tx, mask) __dma_has_cap((tx), &(mask))
 static inline int
 __dma_has_cap(enum dma_transaction_type tx_type, dma_cap_mask_t *srcp)
@@ -475,11 +388,25 @@ static inline enum dma_status dma_async_is_complete(dma_cookie_t cookie,
 }
 enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie);
+#ifdef CONFIG_DMA_ENGINE
+enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx);
+#else
+static inline enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
+{
+        return DMA_SUCCESS;
+}
+#endif
 /* --- DMA device --- */
 int dma_async_device_register(struct dma_device *device);
 void dma_async_device_unregister(struct dma_device *device);
+void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
+struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type);
+void dma_issue_pending_all(void);
+#define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y)
+struct dma_chan *__dma_request_channel(dma_cap_mask_t *mask, dma_filter_fn fn, void *fn_param);
+void dma_release_channel(struct dma_chan *chan);
 /* --- Helper iov-locking functions --- */
diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h
index 04d217b442b..d797dde247f 100644
--- a/include/linux/dw_dmac.h
+++ b/include/linux/dw_dmac.h
@@ -22,14 +22,34 @@ struct dw_dma_platform_data {
 };
 /**
+ * enum dw_dma_slave_width - DMA slave register access width.
+ * @DMA_SLAVE_WIDTH_8BIT: Do 8-bit slave register accesses
+ * @DMA_SLAVE_WIDTH_16BIT: Do 16-bit slave register accesses
+ * @DMA_SLAVE_WIDTH_32BIT: Do 32-bit slave register accesses
+ */
+enum dw_dma_slave_width {
+        DW_DMA_SLAVE_WIDTH_8BIT,
+        DW_DMA_SLAVE_WIDTH_16BIT,
+        DW_DMA_SLAVE_WIDTH_32BIT,
+};
+/**
 * struct dw_dma_slave - Controller-specific information about a slave
- * @slave: Generic information about the slave
+ *
- * @ctl_lo: Platform-specific initializer for the CTL_LO register
+ * @dma_dev: required DMA master device
+ * @tx_reg: physical address of data register used for
+ *      memory-to-peripheral transfers
+ * @rx_reg: physical address of data register used for
+ *      peripheral-to-memory transfers
+ * @reg_width: peripheral register width
 * @cfg_hi: Platform-specific initializer for the CFG_HI register
 * @cfg_lo: Platform-specific initializer for the CFG_LO register
 */
 struct dw_dma_slave {
-        struct dma_slave        slave;
+        struct device           *dma_dev;
+        dma_addr_t              tx_reg;
+        dma_addr_t              rx_reg;
+        enum dw_dma_slave_width reg_width;
        u32                     cfg_hi;
        u32                     cfg_lo;
 };
@@ -54,9 +74,4 @@ struct dw_dma_slave {
 #define DWC_CFGL_HS_DST_POL     (1 << 18)       /* dst handshake active low */
 #define DWC_CFGL_HS_SRC_POL     (1 << 19)       /* src handshake active low */
-static inline struct dw_dma_slave *to_dw_dma_slave(struct dma_slave *slave)
-{
-        return container_of(slave, struct dw_dma_slave, slave);
-}
 #endif /* DW_DMAC_H */
diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
index 00e2b575021..88d3d8fbf9f 100644
--- a/include/linux/mtd/cfi.h
+++ b/include/linux/mtd/cfi.h
@@ -520,6 +520,7 @@ struct cfi_fixup {
 #define CFI_MFR_AMD 0x0001
 #define CFI_MFR_ATMEL 0x001F
+#define CFI_MFR_SAMSUNG 0x00EC
 #define CFI_MFR_ST  0x0020      /* STMicroelectronics */
 void cfi_fixup(struct mtd_info *mtd, struct cfi_fixup* fixups);
diff --git a/include/linux/mtd/ftl.h b/include/linux/mtd/ftl.h
index 0be442f881d..0555f7a0b9e 100644
--- a/include/linux/mtd/ftl.h
+++ b/include/linux/mtd/ftl.h
@@ -32,25 +32,25 @@
 #define _LINUX_FTL_H
 typedef struct erase_unit_header_t {
-    u_int8_t    LinkTargetTuple[5];
+    uint8_t     LinkTargetTuple[5];
-    u_int8_t    DataOrgTuple[10];
+    uint8_t     DataOrgTuple[10];
-    u_int8_t    NumTransferUnits;
+    uint8_t     NumTransferUnits;
-    u_int32_t   EraseCount;
+    uint32_t    EraseCount;
-    u_int16_t   LogicalEUN;
+    uint16_t    LogicalEUN;
-    u_int8_t    BlockSize;
+    uint8_t     BlockSize;
-    u_int8_t    EraseUnitSize;
+    uint8_t     EraseUnitSize;
-    u_int16_t   FirstPhysicalEUN;
+    uint16_t    FirstPhysicalEUN;
-    u_int16_t   NumEraseUnits;
+    uint16_t    NumEraseUnits;
-    u_int32_t   FormattedSize;
+    uint32_t    FormattedSize;
-    u_int32_t   FirstVMAddress;
+    uint32_t    FirstVMAddress;
-    u_int16_t   NumVMPages;
+    uint16_t    NumVMPages;
-    u_int8_t    Flags;
+    uint8_t     Flags;
-    u_int8_t    Code;
+    uint8_t     Code;
-    u_int32_t   SerialNumber;
+    uint32_t    SerialNumber;
-    u_int32_t   AltEUHOffset;
+    uint32_t    AltEUHOffset;
-    u_int32_t   BAMOffset;
+    uint32_t    BAMOffset;
-    u_int8_t    Reserved[12];
+    uint8_t     Reserved[12];
-    u_int8_t    EndTuple[2];
+    uint8_t     EndTuple[2];
 } erase_unit_header_t;
 /* Flags in erase_unit_header_t */
diff --git a/include/linux/mtd/map.h b/include/linux/mtd/map.h
index aa30244492c..b981b877221 100644
--- a/include/linux/mtd/map.h
+++ b/include/linux/mtd/map.h
@@ -223,6 +223,7 @@ struct map_info {
           must leave it enabled. */
        void (*set_vpp)(struct map_info *, int);
+        unsigned long pfow_base;
        unsigned long map_priv_1;
        unsigned long map_priv_2;
        void *fldrv_priv;
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 64433eb411d..3aa5d77c2cd 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -15,6 +15,8 @@
 #include <linux/mtd/compatmac.h>
 #include <mtd/mtd-abi.h>
+#include <asm/div64.h>
 #define MTD_CHAR_MAJOR 90
 #define MTD_BLOCK_MAJOR 31
 #define MAX_MTD_DEVICES 32
@@ -25,20 +27,20 @@
 #define MTD_ERASE_DONE          0x08
 #define MTD_ERASE_FAILED        0x10
-#define MTD_FAIL_ADDR_UNKNOWN 0xffffffff
+#define MTD_FAIL_ADDR_UNKNOWN -1LL
 /* If the erase fails, fail_addr might indicate exactly which block failed.  If
   fail_addr = MTD_FAIL_ADDR_UNKNOWN, the failure was not at the device level or was not
   specific to any particular block. */
 struct erase_info {
        struct mtd_info *mtd;
-        u_int32_t addr;
+        uint64_t addr;
-        u_int32_t len;
+        uint64_t len;
-        u_int32_t fail_addr;
+        uint64_t fail_addr;
        u_long time;
        u_long retries;
-        u_int dev;
+        unsigned dev;
-        u_int cell;
+        unsigned cell;
        void (*callback) (struct erase_info *self);
        u_long priv;
        u_char state;
@@ -46,9 +48,9 @@ struct erase_info {
 };
 struct mtd_erase_region_info {
-        u_int32_t offset;                       /* At which this region starts, from the beginning of the MTD */
+        uint64_t offset;                        /* At which this region starts, from the beginning of the MTD */
-        u_int32_t erasesize;            /* For this region */
+        uint32_t erasesize;             /* For this region */
-        u_int32_t numblocks;            /* Number of blocks of erasesize in this region */
+        uint32_t numblocks;             /* Number of blocks of erasesize in this region */
        unsigned long *lockmap;         /* If keeping bitmap of locks */
 };
@@ -100,14 +102,14 @@ struct mtd_oob_ops {
 struct mtd_info {
        u_char type;
-        u_int32_t flags;
+        uint32_t flags;
-        u_int32_t size;  // Total size of the MTD
+        uint64_t size;   // Total size of the MTD
        /* "Major" erase size for the device. Naïve users may take this
         * to be the only erase size available, or may use the more detailed
         * information below if they desire
         */
-        u_int32_t erasesize;
+        uint32_t erasesize;
        /* Minimal writable flash unit size. In case of NOR flash it is 1 (even
         * though individual bits can be cleared), in case of NAND flash it is
         * one NAND page (or half, or one-fourths of it), in case of ECC-ed NOR
@@ -115,10 +117,20 @@ struct mtd_info {
         * Any driver registering a struct mtd_info must ensure a writesize of
         * 1 or larger.
         */
-        u_int32_t writesize;
+        uint32_t writesize;
+        uint32_t oobsize;   // Amount of OOB data per block (e.g. 16)
+        uint32_t oobavail;  // Available OOB bytes per block
-        u_int32_t oobsize;   // Amount of OOB data per block (e.g. 16)
+        /*
-        u_int32_t oobavail;  // Available OOB bytes per block
+         * If erasesize is a power of 2 then the shift is stored in
+         * erasesize_shift otherwise erasesize_shift is zero. Ditto writesize.
+         */
+        unsigned int erasesize_shift;
+        unsigned int writesize_shift;
+        /* Masks based on erasesize_shift and writesize_shift */
+        unsigned int erasesize_mask;
+        unsigned int writesize_mask;
        // Kernel-only stuff starts here.
        const char *name;
@@ -190,8 +202,8 @@ struct mtd_info {
        void (*sync) (struct mtd_info *mtd);
        /* Chip-supported device locking */
-        int (*lock) (struct mtd_info *mtd, loff_t ofs, size_t len);
+        int (*lock) (struct mtd_info *mtd, loff_t ofs, uint64_t len);
-        int (*unlock) (struct mtd_info *mtd, loff_t ofs, size_t len);
+        int (*unlock) (struct mtd_info *mtd, loff_t ofs, uint64_t len);
        /* Power Management functions */
        int (*suspend) (struct mtd_info *mtd);
@@ -221,6 +233,35 @@ struct mtd_info {
        void (*put_device) (struct mtd_info *mtd);
 };
+static inline uint32_t mtd_div_by_eb(uint64_t sz, struct mtd_info *mtd)
+{
+        if (mtd->erasesize_shift)
+                return sz >> mtd->erasesize_shift;
+        do_div(sz, mtd->erasesize);
+        return sz;
+}
+static inline uint32_t mtd_mod_by_eb(uint64_t sz, struct mtd_info *mtd)
+{
+        if (mtd->erasesize_shift)
+                return sz & mtd->erasesize_mask;
+        return do_div(sz, mtd->erasesize);
+}
+static inline uint32_t mtd_div_by_ws(uint64_t sz, struct mtd_info *mtd)
+{
+        if (mtd->writesize_shift)
+                return sz >> mtd->writesize_shift;
+        do_div(sz, mtd->writesize);
+        return sz;
+}
+static inline uint32_t mtd_mod_by_ws(uint64_t sz, struct mtd_info *mtd)
+{
+        if (mtd->writesize_shift)
+                return sz & mtd->writesize_mask;
+        return do_div(sz, mtd->writesize);
+}
        /* Kernel-side ioctl definitions */
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 733d3f3b4eb..db5b63da2a7 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -335,17 +335,12 @@ struct nand_buffers {
 * @erase_cmd:          [INTERN] erase command write function, selectable due to AND support
 * @scan_bbt:           [REPLACEABLE] function to scan bad block table
 * @chip_delay:         [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
- * @wq:                 [INTERN] wait queue to sleep on if a NAND operation is in progress
 * @state:              [INTERN] the current state of the NAND device
 * @oob_poi:            poison value buffer
 * @page_shift:         [INTERN] number of address bits in a page (column address bits)
 * @phys_erase_shift:   [INTERN] number of address bits in a physical eraseblock
 * @bbt_erase_shift:    [INTERN] number of address bits in a bbt entry
 * @chip_shift:         [INTERN] number of address bits in one chip
- * @datbuf:             [INTERN] internal buffer for one page + oob
- * @oobbuf:             [INTERN] oob buffer for one eraseblock
- * @oobdirty:           [INTERN] indicates that oob_buf must be reinitialized
- * @data_poi:           [INTERN] pointer to a data buffer
 * @options:            [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about
 *                      special functionality. See the defines for further explanation
 * @badblockpos:        [INTERN] position of the bad block marker in the oob area
@@ -399,7 +394,7 @@ struct nand_chip {
        int             bbt_erase_shift;
        int             chip_shift;
        int             numchips;
-        unsigned long   chipsize;
+        uint64_t        chipsize;
        int             pagemask;
        int             pagebuf;
        int             subpagesize;
diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h
index c92b4d43960..a45dd831b3f 100644
--- a/include/linux/mtd/partitions.h
+++ b/include/linux/mtd/partitions.h
@@ -36,9 +36,9 @@
 struct mtd_partition {
        char *name;                     /* identifier string */
-        u_int32_t size;                 /* partition size */
+        uint64_t size;                  /* partition size */
-        u_int32_t offset;               /* offset within the master MTD space */
+        uint64_t offset;                /* offset within the master MTD space */
-        u_int32_t mask_flags;           /* master MTD flags to mask out for this partition */
+        uint32_t mask_flags;            /* master MTD flags to mask out for this partition */
        struct nand_ecclayout *ecclayout;       /* out of band layout for this partition (NAND only)*/
        struct mtd_info **mtdp;         /* pointer to store the MTD object */
 };
diff --git a/include/linux/mtd/pfow.h b/include/linux/mtd/pfow.h
new file mode 100644
index 00000000000..b730d4f8465
--- /dev/null
+++ b/include/linux/mtd/pfow.h
@@ -0,0 +1,159 @@
+/* Primary function overlay window definitions
+ * and service functions used by LPDDR chips
+ */
+#ifndef __LINUX_MTD_PFOW_H
+#define __LINUX_MTD_PFOW_H
+#include <linux/mtd/qinfo.h>
+/* PFOW registers addressing */
+/* Address of symbol "P" */
+#define PFOW_QUERY_STRING_P                     0x0000
+/* Address of symbol "F" */
+#define PFOW_QUERY_STRING_F                     0x0002
+/* Address of symbol "O" */
+#define PFOW_QUERY_STRING_O                     0x0004
+/* Address of symbol "W" */
+#define PFOW_QUERY_STRING_W                     0x0006
+/* Identification info for LPDDR chip */
+#define PFOW_MANUFACTURER_ID                    0x0020
+#define PFOW_DEVICE_ID                          0x0022
+/* Address in PFOW where prog buffer can can be found */
+#define PFOW_PROGRAM_BUFFER_OFFSET              0x0040
+/* Size of program buffer in words */
+#define PFOW_PROGRAM_BUFFER_SIZE                0x0042
+/* Address command code register */
+#define PFOW_COMMAND_CODE                       0x0080
+/* command data register */
+#define PFOW_COMMAND_DATA                       0x0084
+/* command address register lower address bits */
+#define PFOW_COMMAND_ADDRESS_L                  0x0088
+/* command address register upper address bits */
+#define PFOW_COMMAND_ADDRESS_H                  0x008a
+/* number of bytes to be proggrammed lower address bits */
+#define PFOW_DATA_COUNT_L                       0x0090
+/* number of bytes to be proggrammed higher address bits */
+#define PFOW_DATA_COUNT_H                       0x0092
+/* command execution register, the only possible value is 0x01 */
+#define PFOW_COMMAND_EXECUTE                    0x00c0
+/* 0x01 should be written at this address to clear buffer */
+#define PFOW_CLEAR_PROGRAM_BUFFER               0x00c4
+/* device program/erase suspend register */
+#define PFOW_PROGRAM_ERASE_SUSPEND              0x00c8
+/* device status register */
+#define PFOW_DSR                                0x00cc
+/* LPDDR memory device command codes */
+/* They are possible values of PFOW command code register */
+#define LPDDR_WORD_PROGRAM              0x0041
+#define LPDDR_BUFF_PROGRAM              0x00E9
+#define LPDDR_BLOCK_ERASE               0x0020
+#define LPDDR_LOCK_BLOCK                0x0061
+#define LPDDR_UNLOCK_BLOCK              0x0062
+#define LPDDR_READ_BLOCK_LOCK_STATUS    0x0065
+#define LPDDR_INFO_QUERY                0x0098
+#define LPDDR_READ_OTP                  0x0097
+#define LPDDR_PROG_OTP                  0x00C0
+#define LPDDR_RESUME                    0x00D0
+/* Defines possible value of PFOW command execution register */
+#define LPDDR_START_EXECUTION                   0x0001
+/* Defines possible value of PFOW program/erase suspend register */
+#define LPDDR_SUSPEND                           0x0001
+/* Possible values of PFOW device status register */
+/* access R - read; RC read & clearable */
+#define DSR_DPS                 (1<<1) /* RC; device protect status
+                                        * 0 - not protected 1 - locked */
+#define DSR_PSS                 (1<<2) /* R; program suspend status;
+                                        * 0-prog in progress/completed,
+                                        * 1- prog suspended */
+#define DSR_VPPS                (1<<3) /* RC; 0-Vpp OK, * 1-Vpp low */
+#define DSR_PROGRAM_STATUS      (1<<4) /* RC; 0-successful, 1-error */
+#define DSR_ERASE_STATUS        (1<<5) /* RC; erase or blank check status;
+                                        * 0-success erase/blank check,
+                                        * 1 blank check error */
+#define DSR_ESS                 (1<<6) /* R; erase suspend status;
+                                        * 0-erase in progress/complete,
+                                        * 1 erase suspended */
+#define DSR_READY_STATUS        (1<<7) /* R; Device status
+                                        * 0-busy,
+                                        * 1-ready */
+#define DSR_RPS                 (0x3<<8) /* RC;  region program status
+                                        * 00 - Success,
+                                        * 01-re-program attempt in region with
+                                        * object mode data,
+                                        * 10-object mode program w attempt in
+                                        * region with control mode data
+                                        * 11-attempt to program invalid half
+                                        * with 0x41 command */
+#define DSR_AOS                 (1<<12) /* RC; 1- AO related failure */
+#define DSR_AVAILABLE           (1<<15) /* R; Device availbility
+                                        * 1 - Device available
+                                        * 0 - not available */
+/* The superset of all possible error bits in DSR */
+#define DSR_ERR                 0x133A
+static inline void send_pfow_command(struct map_info *map,
+                                unsigned long cmd_code, unsigned long adr,
+                                unsigned long len, map_word *datum)
+{
+        int bits_per_chip = map_bankwidth(map) * 8;
+        int chipnum;
+        struct lpddr_private *lpddr = map->fldrv_priv;
+        chipnum = adr >> lpddr->chipshift;
+        map_write(map, CMD(cmd_code), map->pfow_base + PFOW_COMMAND_CODE);
+        map_write(map, CMD(adr & ((1<<bits_per_chip) - 1)),
+                                map->pfow_base + PFOW_COMMAND_ADDRESS_L);
+        map_write(map, CMD(adr>>bits_per_chip),
+                                map->pfow_base + PFOW_COMMAND_ADDRESS_H);
+        if (len) {
+                map_write(map, CMD(len & ((1<<bits_per_chip) - 1)),
+                                        map->pfow_base + PFOW_DATA_COUNT_L);
+                map_write(map, CMD(len>>bits_per_chip),
+                                        map->pfow_base + PFOW_DATA_COUNT_H);
+        }
+        if (datum)
+                map_write(map, *datum, map->pfow_base + PFOW_COMMAND_DATA);
+        /* Command execution start */
+        map_write(map, CMD(LPDDR_START_EXECUTION),
+                        map->pfow_base + PFOW_COMMAND_EXECUTE);
+}
+static inline void print_drs_error(unsigned dsr)
+{
+        int prog_status = (dsr & DSR_RPS) >> 8;
+        if (!(dsr & DSR_AVAILABLE))
+                printk(KERN_NOTICE"DSR.15: (0) Device not Available\n");
+        if (prog_status & 0x03)
+                printk(KERN_NOTICE"DSR.9,8: (11) Attempt to program invalid "
+                                                "half with 41h command\n");
+        else if (prog_status & 0x02)
+                printk(KERN_NOTICE"DSR.9,8: (10) Object Mode Program attempt "
+                                        "in region with Control Mode data\n");
+        else if (prog_status &  0x01)
+                printk(KERN_NOTICE"DSR.9,8: (01) Program attempt in region "
+                                                "with Object Mode data\n");
+        if (!(dsr & DSR_READY_STATUS))
+                printk(KERN_NOTICE"DSR.7: (0) Device is Busy\n");
+        if (dsr & DSR_ESS)
+                printk(KERN_NOTICE"DSR.6: (1) Erase Suspended\n");
+        if (dsr & DSR_ERASE_STATUS)
+                printk(KERN_NOTICE"DSR.5: (1) Erase/Blank check error\n");
+        if (dsr & DSR_PROGRAM_STATUS)
+                printk(KERN_NOTICE"DSR.4: (1) Program Error\n");
+        if (dsr & DSR_VPPS)
+                printk(KERN_NOTICE"DSR.3: (1) Vpp low detect, operation "
+                                        "aborted\n");
+        if (dsr & DSR_PSS)
+                printk(KERN_NOTICE"DSR.2: (1) Program suspended\n");
+        if (dsr & DSR_DPS)
+                printk(KERN_NOTICE"DSR.1: (1) Aborted Erase/Program attempt "
+                                        "on locked block\n");
+}
+#endif /* __LINUX_MTD_PFOW_H */
diff --git a/include/linux/mtd/physmap.h b/include/linux/mtd/physmap.h
index c8e63a5ee72..76f7cabf07d 100644
--- a/include/linux/mtd/physmap.h
+++ b/include/linux/mtd/physmap.h
@@ -24,6 +24,7 @@ struct physmap_flash_data {
        unsigned int            width;
        void                    (*set_vpp)(struct map_info *, int);
        unsigned int            nr_parts;
+        unsigned int            pfow_base;
        struct mtd_partition    *parts;
 };
diff --git a/include/linux/mtd/qinfo.h b/include/linux/mtd/qinfo.h
new file mode 100644
index 00000000000..7b3d487d8b3
--- /dev/null
+++ b/include/linux/mtd/qinfo.h
@@ -0,0 +1,91 @@
+#ifndef __LINUX_MTD_QINFO_H
+#define __LINUX_MTD_QINFO_H
+#include <linux/mtd/map.h>
+#include <linux/wait.h>
+#include <linux/spinlock.h>
+#include <linux/delay.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/flashchip.h>
+#include <linux/mtd/partitions.h>
+/* lpddr_private describes lpddr flash chip in memory map
+ * @ManufactId - Chip Manufacture ID
+ * @DevId - Chip Device ID
+ * @qinfo - pointer to qinfo records describing the chip
+ * @numchips - number of chips including virual RWW partitions
+ * @chipshift - Chip/partiton size 2^chipshift
+ * @chips - per-chip data structure
+ */
+struct lpddr_private {
+        uint16_t ManufactId;
+        uint16_t DevId;
+        struct qinfo_chip *qinfo;
+        int numchips;
+        unsigned long chipshift;
+        struct flchip chips[0];
+};
+/* qinfo_query_info structure contains request information for
+ * each qinfo record
+ * @major - major number of qinfo record
+ * @major - minor number of qinfo record
+ * @id_str - descriptive string to access the record
+ * @desc - detailed description for the qinfo record
+ */
+struct qinfo_query_info {
+        uint8_t major;
+        uint8_t minor;
+        char *id_str;
+        char *desc;
+};
+/*
+ * qinfo_chip structure contains necessary qinfo records data
+ * @DevSizeShift - Device size 2^n bytes
+ * @BufSizeShift - Program buffer size 2^n bytes
+ * @TotalBlocksNum - Total number of blocks
+ * @UniformBlockSizeShift - Uniform block size 2^UniformBlockSizeShift bytes
+ * @HWPartsNum - Number of hardware partitions
+ * @SuspEraseSupp - Suspend erase supported
+ * @SingleWordProgTime - Single word program 2^SingleWordProgTime u-sec
+ * @ProgBufferTime - Program buffer write 2^ProgBufferTime u-sec
+ * @BlockEraseTime - Block erase 2^BlockEraseTime m-sec
+ */
+struct qinfo_chip {
+        /* General device info */
+        uint16_t DevSizeShift;
+        uint16_t BufSizeShift;
+        /* Erase block information */
+        uint16_t TotalBlocksNum;
+        uint16_t UniformBlockSizeShift;
+        /* Partition information */
+        uint16_t HWPartsNum;
+        /* Optional features */
+        uint16_t SuspEraseSupp;
+        /* Operation typical time */
+        uint16_t SingleWordProgTime;
+        uint16_t ProgBufferTime;
+        uint16_t BlockEraseTime;
+};
+/* defines for fixup usage */
+#define LPDDR_MFR_ANY           0xffff
+#define LPDDR_ID_ANY            0xffff
+#define NUMONYX_MFGR_ID         0x0089
+#define R18_DEVICE_ID_1G        0x893c
+static inline map_word lpddr_build_cmd(u_long cmd, struct map_info *map)
+{
+        map_word val = { {0} };
+        val.x[0] = cmd;
+        return val;
+}
+#define CMD(x) lpddr_build_cmd(x, map)
+#define CMDVAL(cmd) cmd.x[0]
+struct mtd_info *lpddr_cmdset(struct map_info *);
+#endif
diff --git a/include/linux/mtd/sharpsl.h b/include/linux/mtd/sharpsl.h
new file mode 100644
index 00000000000..25f4d2a845c
--- /dev/null
+++ b/include/linux/mtd/sharpsl.h
@@ -0,0 +1,20 @@
+/*
+ * SharpSL NAND support
+ *
+ * Copyright (C) 2008 Dmitry Baryshkov
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_ecc.h>
+#include <linux/mtd/partitions.h>
+struct sharpsl_nand_platform_data {
+        struct nand_bbt_descr   *badblock_pattern;
+        struct nand_ecclayout   *ecc_layout;
+        struct mtd_partition    *partitions;
+        unsigned int            nr_partitions;
+};
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 114091be887..f2455681337 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -1125,9 +1125,6 @@ struct softnet_data
        struct sk_buff          *completion_queue;
        struct napi_struct      backlog;
-#ifdef CONFIG_NET_DMA
-        struct dma_chan         *net_dma;
-#endif
 };
 DECLARE_PER_CPU(struct softnet_data,softnet_data);
diff --git a/include/linux/oprofile.h b/include/linux/oprofile.h
index 1ce9fe572e5..1d9518bc4c5 100644
--- a/include/linux/oprofile.h
+++ b/include/linux/oprofile.h
@@ -164,4 +164,22 @@ void oprofile_put_buff(unsigned long *buf, unsigned int start,
 unsigned long oprofile_get_cpu_buffer_size(void);
 void oprofile_cpu_buffer_inc_smpl_lost(void);
 
+/* cpu buffer functions */
+struct op_sample;
+struct op_entry {
+        struct ring_buffer_event *event;
+        struct op_sample *sample;
+        unsigned long irq_flags;
+        unsigned long size;
+        unsigned long *data;
+};
+void oprofile_write_reserve(struct op_entry *entry,
+                            struct pt_regs * const regs,
+                            unsigned long pc, int code, int size);
+int oprofile_add_data(struct op_entry *entry, unsigned long val);
+int oprofile_write_commit(struct op_entry *entry);
 #endif /* OPROFILE_H */
diff --git a/include/linux/pci_hotplug.h b/include/linux/pci_hotplug.h
index f7cc204fab0..20998746518 100644
--- a/include/linux/pci_hotplug.h
+++ b/include/linux/pci_hotplug.h
@@ -223,7 +223,6 @@ struct hotplug_params {
 #ifdef CONFIG_ACPI
 #include <acpi/acpi.h>
 #include <acpi/acpi_bus.h>
-#include <acpi/actypes.h>
 extern acpi_status acpi_get_hp_params_from_firmware(struct pci_bus *bus,
                                struct hotplug_params *hpp);
 int acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev, u32 flags);
diff --git a/include/linux/suspend.h b/include/linux/suspend.h
index 2ce8207686e..2b409c44db8 100644
--- a/include/linux/suspend.h
+++ b/include/linux/suspend.h
@@ -232,6 +232,11 @@ extern unsigned long get_safe_page(gfp_t gfp_mask);
 extern void hibernation_set_ops(struct platform_hibernation_ops *ops);
 extern int hibernate(void);
+extern int hibernate_nvs_register(unsigned long start, unsigned long size);
+extern int hibernate_nvs_alloc(void);
+extern void hibernate_nvs_free(void);
+extern void hibernate_nvs_save(void);
+extern void hibernate_nvs_restore(void);
 #else /* CONFIG_HIBERNATION */
 static inline int swsusp_page_is_forbidden(struct page *p) { return 0; }
 static inline void swsusp_set_page_free(struct page *p) {}
@@ -239,6 +244,14 @@ static inline void swsusp_unset_page_free(struct page *p) {}
 static inline void hibernation_set_ops(struct platform_hibernation_ops *ops) {}
 static inline int hibernate(void) { return -ENOSYS; }
+static inline int hibernate_nvs_register(unsigned long a, unsigned long b)
+{
+        return 0;
+}
+static inline int hibernate_nvs_alloc(void) { return 0; }
+static inline void hibernate_nvs_free(void) {}
+static inline void hibernate_nvs_save(void) {}
+static inline void hibernate_nvs_restore(void) {}
 #endif /* CONFIG_HIBERNATION */
 #ifdef CONFIG_PM_SLEEP