diff options
Diffstat (limited to 'drivers/video/via/lcd.c')
| -rw-r--r-- | drivers/video/via/lcd.c | 640 |
1 files changed, 24 insertions, 616 deletions
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c index 09353e2b92f..1b1ccdc2d83 100644 --- a/drivers/video/via/lcd.c +++ b/drivers/video/via/lcd.c | |||
| @@ -22,25 +22,7 @@ | |||
| 22 | #include "global.h" | 22 | #include "global.h" |
| 23 | #include "lcdtbl.h" | 23 | #include "lcdtbl.h" |
| 24 | 24 | ||
| 25 | static struct iga2_shadow_crtc_timing iga2_shadow_crtc_reg = { | 25 | #define viafb_compact_res(x, y) (((x)<<16)|(y)) |
| 26 | /* IGA2 Shadow Horizontal Total */ | ||
| 27 | {IGA2_SHADOW_HOR_TOTAL_REG_NUM, {{CR6D, 0, 7}, {CR71, 3, 3} } }, | ||
| 28 | /* IGA2 Shadow Horizontal Blank End */ | ||
| 29 | {IGA2_SHADOW_HOR_BLANK_END_REG_NUM, {{CR6E, 0, 7} } }, | ||
| 30 | /* IGA2 Shadow Vertical Total */ | ||
| 31 | {IGA2_SHADOW_VER_TOTAL_REG_NUM, {{CR6F, 0, 7}, {CR71, 0, 2} } }, | ||
| 32 | /* IGA2 Shadow Vertical Addressable Video */ | ||
| 33 | {IGA2_SHADOW_VER_ADDR_REG_NUM, {{CR70, 0, 7}, {CR71, 4, 6} } }, | ||
| 34 | /* IGA2 Shadow Vertical Blank Start */ | ||
| 35 | {IGA2_SHADOW_VER_BLANK_START_REG_NUM, | ||
| 36 | {{CR72, 0, 7}, {CR74, 4, 6} } }, | ||
| 37 | /* IGA2 Shadow Vertical Blank End */ | ||
| 38 | {IGA2_SHADOW_VER_BLANK_END_REG_NUM, {{CR73, 0, 7}, {CR74, 0, 2} } }, | ||
| 39 | /* IGA2 Shadow Vertical Sync Start */ | ||
| 40 | {IGA2_SHADOW_VER_SYNC_START_REG_NUM, {{CR75, 0, 7}, {CR76, 4, 6} } }, | ||
| 41 | /* IGA2 Shadow Vertical Sync End */ | ||
| 42 | {IGA2_SHADOW_VER_SYNC_END_REG_NUM, {{CR76, 0, 3} } } | ||
| 43 | }; | ||
| 44 | 26 | ||
| 45 | static struct _lcd_scaling_factor lcd_scaling_factor = { | 27 | static struct _lcd_scaling_factor lcd_scaling_factor = { |
| 46 | /* LCD Horizontal Scaling Factor Register */ | 28 | /* LCD Horizontal Scaling Factor Register */ |
| @@ -59,16 +41,10 @@ static struct _lcd_scaling_factor lcd_scaling_factor_CLE = { | |||
| 59 | 41 | ||
| 60 | static int check_lvds_chip(int device_id_subaddr, int device_id); | 42 | static int check_lvds_chip(int device_id_subaddr, int device_id); |
| 61 | static bool lvds_identify_integratedlvds(void); | 43 | static bool lvds_identify_integratedlvds(void); |
| 62 | static int fp_id_to_vindex(int panel_id); | 44 | static void fp_id_to_vindex(int panel_id); |
| 63 | static int lvds_register_read(int index); | 45 | static int lvds_register_read(int index); |
| 64 | static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres, | 46 | static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres, |
| 65 | int panel_vres); | 47 | int panel_vres); |
| 66 | static void load_lcd_k400_patch_tbl(int set_hres, int set_vres, | ||
| 67 | int panel_id); | ||
| 68 | static void load_lcd_p880_patch_tbl(int set_hres, int set_vres, | ||
| 69 | int panel_id); | ||
| 70 | static void load_lcd_patch_regs(int set_hres, int set_vres, | ||
| 71 | int panel_id, int set_iga); | ||
| 72 | static void via_pitch_alignment_patch_lcd( | 48 | static void via_pitch_alignment_patch_lcd( |
| 73 | struct lvds_setting_information *plvds_setting_info, | 49 | struct lvds_setting_information *plvds_setting_info, |
| 74 | struct lvds_chip_information | 50 | struct lvds_chip_information |
| @@ -98,8 +74,6 @@ static void check_diport_of_integrated_lvds( | |||
| 98 | static struct display_timing lcd_centering_timging(struct display_timing | 74 | static struct display_timing lcd_centering_timging(struct display_timing |
| 99 | mode_crt_reg, | 75 | mode_crt_reg, |
| 100 | struct display_timing panel_crt_reg); | 76 | struct display_timing panel_crt_reg); |
| 101 | static void load_crtc_shadow_timing(struct display_timing mode_timing, | ||
| 102 | struct display_timing panel_timing); | ||
| 103 | static void viafb_load_scaling_factor_for_p4m900(int set_hres, | 77 | static void viafb_load_scaling_factor_for_p4m900(int set_hres, |
| 104 | int set_vres, int panel_hres, int panel_vres); | 78 | int set_vres, int panel_hres, int panel_vres); |
| 105 | 79 | ||
| @@ -125,33 +99,24 @@ void viafb_init_lcd_size(void) | |||
| 125 | break; | 99 | break; |
| 126 | case GET_LCD_SIZE_BY_VGA_BIOS: | 100 | case GET_LCD_SIZE_BY_VGA_BIOS: |
| 127 | DEBUG_MSG(KERN_INFO "Get LCD Size method by VGA BIOS !!\n"); | 101 | DEBUG_MSG(KERN_INFO "Get LCD Size method by VGA BIOS !!\n"); |
| 128 | viaparinfo->lvds_setting_info->lcd_panel_size = | 102 | fp_id_to_vindex(viafb_lcd_panel_id); |
| 129 | fp_id_to_vindex(viafb_lcd_panel_id); | ||
| 130 | DEBUG_MSG(KERN_INFO "LCD Panel_ID = %d\n", | 103 | DEBUG_MSG(KERN_INFO "LCD Panel_ID = %d\n", |
| 131 | viaparinfo->lvds_setting_info->lcd_panel_id); | 104 | viaparinfo->lvds_setting_info->lcd_panel_id); |
| 132 | DEBUG_MSG(KERN_INFO "LCD Panel Size = %d\n", | ||
| 133 | viaparinfo->lvds_setting_info->lcd_panel_size); | ||
| 134 | break; | 105 | break; |
| 135 | case GET_LCD_SIZE_BY_USER_SETTING: | 106 | case GET_LCD_SIZE_BY_USER_SETTING: |
| 136 | DEBUG_MSG(KERN_INFO "Get LCD Size method by user setting !!\n"); | 107 | DEBUG_MSG(KERN_INFO "Get LCD Size method by user setting !!\n"); |
| 137 | viaparinfo->lvds_setting_info->lcd_panel_size = | 108 | fp_id_to_vindex(viafb_lcd_panel_id); |
| 138 | fp_id_to_vindex(viafb_lcd_panel_id); | ||
| 139 | DEBUG_MSG(KERN_INFO "LCD Panel_ID = %d\n", | 109 | DEBUG_MSG(KERN_INFO "LCD Panel_ID = %d\n", |
| 140 | viaparinfo->lvds_setting_info->lcd_panel_id); | 110 | viaparinfo->lvds_setting_info->lcd_panel_id); |
| 141 | DEBUG_MSG(KERN_INFO "LCD Panel Size = %d\n", | ||
| 142 | viaparinfo->lvds_setting_info->lcd_panel_size); | ||
| 143 | break; | 111 | break; |
| 144 | default: | 112 | default: |
| 145 | DEBUG_MSG(KERN_INFO "viafb_init_lcd_size fail\n"); | 113 | DEBUG_MSG(KERN_INFO "viafb_init_lcd_size fail\n"); |
| 146 | viaparinfo->lvds_setting_info->lcd_panel_id = | 114 | viaparinfo->lvds_setting_info->lcd_panel_id = |
| 147 | LCD_PANEL_ID1_800X600; | 115 | LCD_PANEL_ID1_800X600; |
| 148 | viaparinfo->lvds_setting_info->lcd_panel_size = | 116 | fp_id_to_vindex(LCD_PANEL_ID1_800X600); |
| 149 | fp_id_to_vindex(LCD_PANEL_ID1_800X600); | ||
| 150 | } | 117 | } |
| 151 | viaparinfo->lvds_setting_info2->lcd_panel_id = | 118 | viaparinfo->lvds_setting_info2->lcd_panel_id = |
| 152 | viaparinfo->lvds_setting_info->lcd_panel_id; | 119 | viaparinfo->lvds_setting_info->lcd_panel_id; |
| 153 | viaparinfo->lvds_setting_info2->lcd_panel_size = | ||
| 154 | viaparinfo->lvds_setting_info->lcd_panel_size; | ||
| 155 | viaparinfo->lvds_setting_info2->lcd_panel_hres = | 120 | viaparinfo->lvds_setting_info2->lcd_panel_hres = |
| 156 | viaparinfo->lvds_setting_info->lcd_panel_hres; | 121 | viaparinfo->lvds_setting_info->lcd_panel_hres; |
| 157 | viaparinfo->lvds_setting_info2->lcd_panel_vres = | 122 | viaparinfo->lvds_setting_info2->lcd_panel_vres = |
| @@ -171,13 +136,13 @@ static bool lvds_identify_integratedlvds(void) | |||
| 171 | if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) { | 136 | if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) { |
| 172 | viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name = | 137 | viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name = |
| 173 | INTEGRATED_LVDS; | 138 | INTEGRATED_LVDS; |
| 174 | DEBUG_MSG(KERN_INFO "Support two dual channel LVDS!\ | 139 | DEBUG_MSG(KERN_INFO "Support two dual channel LVDS! " |
| 175 | (Internal LVDS + External LVDS)\n"); | 140 | "(Internal LVDS + External LVDS)\n"); |
| 176 | } else { | 141 | } else { |
| 177 | viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = | 142 | viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = |
| 178 | INTEGRATED_LVDS; | 143 | INTEGRATED_LVDS; |
| 179 | DEBUG_MSG(KERN_INFO "Not found external LVDS,\ | 144 | DEBUG_MSG(KERN_INFO "Not found external LVDS, " |
| 180 | so can't support two dual channel LVDS!\n"); | 145 | "so can't support two dual channel LVDS!\n"); |
| 181 | } | 146 | } |
| 182 | } else if (viafb_display_hardware_layout == HW_LAYOUT_LCD1_LCD2) { | 147 | } else if (viafb_display_hardware_layout == HW_LAYOUT_LCD1_LCD2) { |
| 183 | /* Two single channel LCD (Internal LVDS + Internal LVDS): */ | 148 | /* Two single channel LCD (Internal LVDS + Internal LVDS): */ |
| @@ -185,8 +150,8 @@ static bool lvds_identify_integratedlvds(void) | |||
| 185 | INTEGRATED_LVDS; | 150 | INTEGRATED_LVDS; |
| 186 | viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name = | 151 | viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name = |
| 187 | INTEGRATED_LVDS; | 152 | INTEGRATED_LVDS; |
| 188 | DEBUG_MSG(KERN_INFO "Support two single channel LVDS!\ | 153 | DEBUG_MSG(KERN_INFO "Support two single channel LVDS! " |
| 189 | (Internal LVDS + Internal LVDS)\n"); | 154 | "(Internal LVDS + Internal LVDS)\n"); |
| 190 | } else if (viafb_display_hardware_layout != HW_LAYOUT_DVI_ONLY) { | 155 | } else if (viafb_display_hardware_layout != HW_LAYOUT_DVI_ONLY) { |
| 191 | /* If we have found external LVDS, just use it, | 156 | /* If we have found external LVDS, just use it, |
| 192 | otherwise, we will use internal LVDS as default. */ | 157 | otherwise, we will use internal LVDS as default. */ |
| @@ -248,7 +213,7 @@ int viafb_lvds_trasmitter_identify(void) | |||
| 248 | return FAIL; | 213 | return FAIL; |
| 249 | } | 214 | } |
| 250 | 215 | ||
| 251 | static int fp_id_to_vindex(int panel_id) | 216 | static void fp_id_to_vindex(int panel_id) |
| 252 | { | 217 | { |
| 253 | DEBUG_MSG(KERN_INFO "fp_get_panel_id()\n"); | 218 | DEBUG_MSG(KERN_INFO "fp_get_panel_id()\n"); |
| 254 | 219 | ||
| @@ -264,7 +229,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 264 | LCD_PANEL_ID0_640X480; | 229 | LCD_PANEL_ID0_640X480; |
| 265 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; | 230 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; |
| 266 | viaparinfo->lvds_setting_info->LCDDithering = 1; | 231 | viaparinfo->lvds_setting_info->LCDDithering = 1; |
| 267 | return VIA_RES_640X480; | ||
| 268 | break; | 232 | break; |
| 269 | case 0x1: | 233 | case 0x1: |
| 270 | viaparinfo->lvds_setting_info->lcd_panel_hres = 800; | 234 | viaparinfo->lvds_setting_info->lcd_panel_hres = 800; |
| @@ -273,7 +237,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 273 | LCD_PANEL_ID1_800X600; | 237 | LCD_PANEL_ID1_800X600; |
| 274 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; | 238 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; |
| 275 | viaparinfo->lvds_setting_info->LCDDithering = 1; | 239 | viaparinfo->lvds_setting_info->LCDDithering = 1; |
| 276 | return VIA_RES_800X600; | ||
| 277 | break; | 240 | break; |
| 278 | case 0x2: | 241 | case 0x2: |
| 279 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; | 242 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; |
| @@ -282,7 +245,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 282 | LCD_PANEL_ID2_1024X768; | 245 | LCD_PANEL_ID2_1024X768; |
| 283 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; | 246 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; |
| 284 | viaparinfo->lvds_setting_info->LCDDithering = 1; | 247 | viaparinfo->lvds_setting_info->LCDDithering = 1; |
| 285 | return VIA_RES_1024X768; | ||
| 286 | break; | 248 | break; |
| 287 | case 0x3: | 249 | case 0x3: |
| 288 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; | 250 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; |
| @@ -291,7 +253,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 291 | LCD_PANEL_ID3_1280X768; | 253 | LCD_PANEL_ID3_1280X768; |
| 292 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; | 254 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; |
| 293 | viaparinfo->lvds_setting_info->LCDDithering = 1; | 255 | viaparinfo->lvds_setting_info->LCDDithering = 1; |
| 294 | return VIA_RES_1280X768; | ||
| 295 | break; | 256 | break; |
| 296 | case 0x4: | 257 | case 0x4: |
| 297 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; | 258 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; |
| @@ -300,7 +261,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 300 | LCD_PANEL_ID4_1280X1024; | 261 | LCD_PANEL_ID4_1280X1024; |
| 301 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; | 262 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; |
| 302 | viaparinfo->lvds_setting_info->LCDDithering = 1; | 263 | viaparinfo->lvds_setting_info->LCDDithering = 1; |
| 303 | return VIA_RES_1280X1024; | ||
| 304 | break; | 264 | break; |
| 305 | case 0x5: | 265 | case 0x5: |
| 306 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1400; | 266 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1400; |
| @@ -309,7 +269,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 309 | LCD_PANEL_ID5_1400X1050; | 269 | LCD_PANEL_ID5_1400X1050; |
| 310 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; | 270 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; |
| 311 | viaparinfo->lvds_setting_info->LCDDithering = 1; | 271 | viaparinfo->lvds_setting_info->LCDDithering = 1; |
| 312 | return VIA_RES_1400X1050; | ||
| 313 | break; | 272 | break; |
| 314 | case 0x6: | 273 | case 0x6: |
| 315 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1600; | 274 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1600; |
| @@ -318,7 +277,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 318 | LCD_PANEL_ID6_1600X1200; | 277 | LCD_PANEL_ID6_1600X1200; |
| 319 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; | 278 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; |
| 320 | viaparinfo->lvds_setting_info->LCDDithering = 1; | 279 | viaparinfo->lvds_setting_info->LCDDithering = 1; |
| 321 | return VIA_RES_1600X1200; | ||
| 322 | break; | 280 | break; |
| 323 | case 0x8: | 281 | case 0x8: |
| 324 | viaparinfo->lvds_setting_info->lcd_panel_hres = 800; | 282 | viaparinfo->lvds_setting_info->lcd_panel_hres = 800; |
| @@ -327,7 +285,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 327 | LCD_PANEL_IDA_800X480; | 285 | LCD_PANEL_IDA_800X480; |
| 328 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; | 286 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; |
| 329 | viaparinfo->lvds_setting_info->LCDDithering = 1; | 287 | viaparinfo->lvds_setting_info->LCDDithering = 1; |
| 330 | return VIA_RES_800X480; | ||
| 331 | break; | 288 | break; |
| 332 | case 0x9: | 289 | case 0x9: |
| 333 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; | 290 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; |
| @@ -336,7 +293,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 336 | LCD_PANEL_ID2_1024X768; | 293 | LCD_PANEL_ID2_1024X768; |
| 337 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; | 294 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; |
| 338 | viaparinfo->lvds_setting_info->LCDDithering = 1; | 295 | viaparinfo->lvds_setting_info->LCDDithering = 1; |
| 339 | return VIA_RES_1024X768; | ||
| 340 | break; | 296 | break; |
| 341 | case 0xA: | 297 | case 0xA: |
| 342 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; | 298 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; |
| @@ -345,7 +301,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 345 | LCD_PANEL_ID2_1024X768; | 301 | LCD_PANEL_ID2_1024X768; |
| 346 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; | 302 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; |
| 347 | viaparinfo->lvds_setting_info->LCDDithering = 0; | 303 | viaparinfo->lvds_setting_info->LCDDithering = 0; |
| 348 | return VIA_RES_1024X768; | ||
| 349 | break; | 304 | break; |
| 350 | case 0xB: | 305 | case 0xB: |
| 351 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; | 306 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; |
| @@ -354,7 +309,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 354 | LCD_PANEL_ID2_1024X768; | 309 | LCD_PANEL_ID2_1024X768; |
| 355 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; | 310 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; |
| 356 | viaparinfo->lvds_setting_info->LCDDithering = 0; | 311 | viaparinfo->lvds_setting_info->LCDDithering = 0; |
| 357 | return VIA_RES_1024X768; | ||
| 358 | break; | 312 | break; |
| 359 | case 0xC: | 313 | case 0xC: |
| 360 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; | 314 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; |
| @@ -363,7 +317,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 363 | LCD_PANEL_ID3_1280X768; | 317 | LCD_PANEL_ID3_1280X768; |
| 364 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; | 318 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; |
| 365 | viaparinfo->lvds_setting_info->LCDDithering = 0; | 319 | viaparinfo->lvds_setting_info->LCDDithering = 0; |
| 366 | return VIA_RES_1280X768; | ||
| 367 | break; | 320 | break; |
| 368 | case 0xD: | 321 | case 0xD: |
| 369 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; | 322 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; |
| @@ -372,7 +325,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 372 | LCD_PANEL_ID4_1280X1024; | 325 | LCD_PANEL_ID4_1280X1024; |
| 373 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; | 326 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; |
| 374 | viaparinfo->lvds_setting_info->LCDDithering = 0; | 327 | viaparinfo->lvds_setting_info->LCDDithering = 0; |
| 375 | return VIA_RES_1280X1024; | ||
| 376 | break; | 328 | break; |
| 377 | case 0xE: | 329 | case 0xE: |
| 378 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1400; | 330 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1400; |
| @@ -381,7 +333,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 381 | LCD_PANEL_ID5_1400X1050; | 333 | LCD_PANEL_ID5_1400X1050; |
| 382 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; | 334 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; |
| 383 | viaparinfo->lvds_setting_info->LCDDithering = 0; | 335 | viaparinfo->lvds_setting_info->LCDDithering = 0; |
| 384 | return VIA_RES_1400X1050; | ||
| 385 | break; | 336 | break; |
| 386 | case 0xF: | 337 | case 0xF: |
| 387 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1600; | 338 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1600; |
| @@ -390,7 +341,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 390 | LCD_PANEL_ID6_1600X1200; | 341 | LCD_PANEL_ID6_1600X1200; |
| 391 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; | 342 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; |
| 392 | viaparinfo->lvds_setting_info->LCDDithering = 0; | 343 | viaparinfo->lvds_setting_info->LCDDithering = 0; |
| 393 | return VIA_RES_1600X1200; | ||
| 394 | break; | 344 | break; |
| 395 | case 0x10: | 345 | case 0x10: |
| 396 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1366; | 346 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1366; |
| @@ -399,7 +349,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 399 | LCD_PANEL_ID7_1366X768; | 349 | LCD_PANEL_ID7_1366X768; |
| 400 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; | 350 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; |
| 401 | viaparinfo->lvds_setting_info->LCDDithering = 0; | 351 | viaparinfo->lvds_setting_info->LCDDithering = 0; |
| 402 | return VIA_RES_1368X768; | ||
| 403 | break; | 352 | break; |
| 404 | case 0x11: | 353 | case 0x11: |
| 405 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; | 354 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; |
| @@ -408,7 +357,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 408 | LCD_PANEL_ID8_1024X600; | 357 | LCD_PANEL_ID8_1024X600; |
| 409 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; | 358 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; |
| 410 | viaparinfo->lvds_setting_info->LCDDithering = 1; | 359 | viaparinfo->lvds_setting_info->LCDDithering = 1; |
| 411 | return VIA_RES_1024X600; | ||
| 412 | break; | 360 | break; |
| 413 | case 0x12: | 361 | case 0x12: |
| 414 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; | 362 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; |
| @@ -417,7 +365,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 417 | LCD_PANEL_ID3_1280X768; | 365 | LCD_PANEL_ID3_1280X768; |
| 418 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; | 366 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; |
| 419 | viaparinfo->lvds_setting_info->LCDDithering = 1; | 367 | viaparinfo->lvds_setting_info->LCDDithering = 1; |
| 420 | return VIA_RES_1280X768; | ||
| 421 | break; | 368 | break; |
| 422 | case 0x13: | 369 | case 0x13: |
| 423 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; | 370 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; |
| @@ -426,7 +373,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 426 | LCD_PANEL_ID9_1280X800; | 373 | LCD_PANEL_ID9_1280X800; |
| 427 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; | 374 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; |
| 428 | viaparinfo->lvds_setting_info->LCDDithering = 1; | 375 | viaparinfo->lvds_setting_info->LCDDithering = 1; |
| 429 | return VIA_RES_1280X800; | ||
| 430 | break; | 376 | break; |
| 431 | case 0x14: | 377 | case 0x14: |
| 432 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1360; | 378 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1360; |
| @@ -435,7 +381,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 435 | LCD_PANEL_IDB_1360X768; | 381 | LCD_PANEL_IDB_1360X768; |
| 436 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; | 382 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; |
| 437 | viaparinfo->lvds_setting_info->LCDDithering = 0; | 383 | viaparinfo->lvds_setting_info->LCDDithering = 0; |
| 438 | return VIA_RES_1360X768; | ||
| 439 | break; | 384 | break; |
| 440 | case 0x15: | 385 | case 0x15: |
| 441 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; | 386 | viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; |
| @@ -444,7 +389,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 444 | LCD_PANEL_ID3_1280X768; | 389 | LCD_PANEL_ID3_1280X768; |
| 445 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; | 390 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; |
| 446 | viaparinfo->lvds_setting_info->LCDDithering = 0; | 391 | viaparinfo->lvds_setting_info->LCDDithering = 0; |
| 447 | return VIA_RES_1280X768; | ||
| 448 | break; | 392 | break; |
| 449 | case 0x16: | 393 | case 0x16: |
| 450 | viaparinfo->lvds_setting_info->lcd_panel_hres = 480; | 394 | viaparinfo->lvds_setting_info->lcd_panel_hres = 480; |
| @@ -453,7 +397,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 453 | LCD_PANEL_IDC_480X640; | 397 | LCD_PANEL_IDC_480X640; |
| 454 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; | 398 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; |
| 455 | viaparinfo->lvds_setting_info->LCDDithering = 1; | 399 | viaparinfo->lvds_setting_info->LCDDithering = 1; |
| 456 | return VIA_RES_480X640; | ||
| 457 | break; | 400 | break; |
| 458 | default: | 401 | default: |
| 459 | viaparinfo->lvds_setting_info->lcd_panel_hres = 800; | 402 | viaparinfo->lvds_setting_info->lcd_panel_hres = 800; |
| @@ -462,7 +405,6 @@ static int fp_id_to_vindex(int panel_id) | |||
| 462 | LCD_PANEL_ID1_800X600; | 405 | LCD_PANEL_ID1_800X600; |
| 463 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; | 406 | viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; |
| 464 | viaparinfo->lvds_setting_info->LCDDithering = 1; | 407 | viaparinfo->lvds_setting_info->LCDDithering = 1; |
| 465 | return VIA_RES_800X600; | ||
| 466 | } | 408 | } |
| 467 | } | 409 | } |
| 468 | 410 | ||
| @@ -573,284 +515,6 @@ static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres, | |||
| 573 | } | 515 | } |
| 574 | } | 516 | } |
| 575 | 517 | ||
| 576 | static void load_lcd_k400_patch_tbl(int set_hres, int set_vres, | ||
| 577 | int panel_id) | ||
| 578 | { | ||
| 579 | int vmode_index; | ||
| 580 | int reg_num = 0; | ||
| 581 | struct io_reg *lcd_patch_reg = NULL; | ||
| 582 | |||
| 583 | vmode_index = viafb_get_mode_index(set_hres, set_vres); | ||
| 584 | switch (panel_id) { | ||
| 585 | /* LCD 800x600 */ | ||
| 586 | case LCD_PANEL_ID1_800X600: | ||
| 587 | switch (vmode_index) { | ||
| 588 | case VIA_RES_640X400: | ||
| 589 | case VIA_RES_640X480: | ||
| 590 | reg_num = NUM_TOTAL_K400_LCD_RES_6X4_8X6; | ||
| 591 | lcd_patch_reg = K400_LCD_RES_6X4_8X6; | ||
| 592 | break; | ||
| 593 | case VIA_RES_720X480: | ||
| 594 | case VIA_RES_720X576: | ||
| 595 | reg_num = NUM_TOTAL_K400_LCD_RES_7X4_8X6; | ||
| 596 | lcd_patch_reg = K400_LCD_RES_7X4_8X6; | ||
| 597 | break; | ||
| 598 | } | ||
| 599 | break; | ||
| 600 | |||
| 601 | /* LCD 1024x768 */ | ||
| 602 | case LCD_PANEL_ID2_1024X768: | ||
| 603 | switch (vmode_index) { | ||
| 604 | case VIA_RES_640X400: | ||
| 605 | case VIA_RES_640X480: | ||
| 606 | reg_num = NUM_TOTAL_K400_LCD_RES_6X4_10X7; | ||
| 607 | lcd_patch_reg = K400_LCD_RES_6X4_10X7; | ||
| 608 | break; | ||
| 609 | case VIA_RES_720X480: | ||
| 610 | case VIA_RES_720X576: | ||
| 611 | reg_num = NUM_TOTAL_K400_LCD_RES_7X4_10X7; | ||
| 612 | lcd_patch_reg = K400_LCD_RES_7X4_10X7; | ||
| 613 | break; | ||
| 614 | case VIA_RES_800X600: | ||
| 615 | reg_num = NUM_TOTAL_K400_LCD_RES_8X6_10X7; | ||
| 616 | lcd_patch_reg = K400_LCD_RES_8X6_10X7; | ||
| 617 | break; | ||
| 618 | } | ||
| 619 | break; | ||
| 620 | |||
| 621 | /* LCD 1280x1024 */ | ||
| 622 | case LCD_PANEL_ID4_1280X1024: | ||
| 623 | switch (vmode_index) { | ||
| 624 | case VIA_RES_640X400: | ||
| 625 | case VIA_RES_640X480: | ||
| 626 | reg_num = NUM_TOTAL_K400_LCD_RES_6X4_12X10; | ||
| 627 | lcd_patch_reg = K400_LCD_RES_6X4_12X10; | ||
| 628 | break; | ||
| 629 | case VIA_RES_720X480: | ||
| 630 | case VIA_RES_720X576: | ||
| 631 | reg_num = NUM_TOTAL_K400_LCD_RES_7X4_12X10; | ||
| 632 | lcd_patch_reg = K400_LCD_RES_7X4_12X10; | ||
| 633 | break; | ||
| 634 | case VIA_RES_800X600: | ||
| 635 | reg_num = NUM_TOTAL_K400_LCD_RES_8X6_12X10; | ||
| 636 | lcd_patch_reg = K400_LCD_RES_8X6_12X10; | ||
| 637 | break; | ||
| 638 | case VIA_RES_1024X768: | ||
| 639 | reg_num = NUM_TOTAL_K400_LCD_RES_10X7_12X10; | ||
| 640 | lcd_patch_reg = K400_LCD_RES_10X7_12X10; | ||
| 641 | break; | ||
| 642 | |||
| 643 | } | ||
| 644 | break; | ||
| 645 | |||
| 646 | /* LCD 1400x1050 */ | ||
| 647 | case LCD_PANEL_ID5_1400X1050: | ||
| 648 | switch (vmode_index) { | ||
| 649 | case VIA_RES_640X480: | ||
| 650 | reg_num = NUM_TOTAL_K400_LCD_RES_6X4_14X10; | ||
| 651 | lcd_patch_reg = K400_LCD_RES_6X4_14X10; | ||
| 652 | break; | ||
| 653 | case VIA_RES_800X600: | ||
| 654 | reg_num = NUM_TOTAL_K400_LCD_RES_8X6_14X10; | ||
| 655 | lcd_patch_reg = K400_LCD_RES_8X6_14X10; | ||
| 656 | break; | ||
| 657 | case VIA_RES_1024X768: | ||
| 658 | reg_num = NUM_TOTAL_K400_LCD_RES_10X7_14X10; | ||
| 659 | lcd_patch_reg = K400_LCD_RES_10X7_14X10; | ||
| 660 | break; | ||
| 661 | case VIA_RES_1280X768: | ||
| 662 | case VIA_RES_1280X800: | ||
| 663 | case VIA_RES_1280X960: | ||
| 664 | case VIA_RES_1280X1024: | ||
| 665 | reg_num = NUM_TOTAL_K400_LCD_RES_12X10_14X10; | ||
| 666 | lcd_patch_reg = K400_LCD_RES_12X10_14X10; | ||
| 667 | break; | ||
| 668 | } | ||
| 669 | break; | ||
| 670 | |||
| 671 | /* LCD 1600x1200 */ | ||
| 672 | case LCD_PANEL_ID6_1600X1200: | ||
| 673 | switch (vmode_index) { | ||
| 674 | case VIA_RES_640X400: | ||
| 675 | case VIA_RES_640X480: | ||
| 676 | reg_num = NUM_TOTAL_K400_LCD_RES_6X4_16X12; | ||
| 677 | lcd_patch_reg = K400_LCD_RES_6X4_16X12; | ||
| 678 | break; | ||
| 679 | case VIA_RES_720X480: | ||
| 680 | case VIA_RES_720X576: | ||
| 681 | reg_num = NUM_TOTAL_K400_LCD_RES_7X4_16X12; | ||
| 682 | lcd_patch_reg = K400_LCD_RES_7X4_16X12; | ||
| 683 | break; | ||
| 684 | case VIA_RES_800X600: | ||
| 685 | reg_num = NUM_TOTAL_K400_LCD_RES_8X6_16X12; | ||
| 686 | lcd_patch_reg = K400_LCD_RES_8X6_16X12; | ||
| 687 | break; | ||
| 688 | case VIA_RES_1024X768: | ||
| 689 | reg_num = NUM_TOTAL_K400_LCD_RES_10X7_16X12; | ||
| 690 | lcd_patch_reg = K400_LCD_RES_10X7_16X12; | ||
| 691 | break; | ||
| 692 | case VIA_RES_1280X768: | ||
| 693 | case VIA_RES_1280X800: | ||
| 694 | case VIA_RES_1280X960: | ||
| 695 | case VIA_RES_1280X1024: | ||
| 696 | reg_num = NUM_TOTAL_K400_LCD_RES_12X10_16X12; | ||
| 697 | lcd_patch_reg = K400_LCD_RES_12X10_16X12; | ||
| 698 | break; | ||
| 699 | } | ||
| 700 | break; | ||
| 701 | |||
| 702 | /* LCD 1366x768 */ | ||
| 703 | case LCD_PANEL_ID7_1366X768: | ||
| 704 | switch (vmode_index) { | ||
| 705 | case VIA_RES_640X480: | ||
| 706 | reg_num = NUM_TOTAL_K400_LCD_RES_6X4_1366X7; | ||
| 707 | lcd_patch_reg = K400_LCD_RES_6X4_1366X7; | ||
| 708 | break; | ||
| 709 | case VIA_RES_720X480: | ||
| 710 | case VIA_RES_720X576: | ||
| 711 | reg_num = NUM_TOTAL_K400_LCD_RES_7X4_1366X7; | ||
| 712 | lcd_patch_reg = K400_LCD_RES_7X4_1366X7; | ||
| 713 | break; | ||
| 714 | case VIA_RES_800X600: | ||
| 715 | reg_num = NUM_TOTAL_K400_LCD_RES_8X6_1366X7; | ||
| 716 | lcd_patch_reg = K400_LCD_RES_8X6_1366X7; | ||
| 717 | break; | ||
| 718 | case VIA_RES_1024X768: | ||
| 719 | reg_num = NUM_TOTAL_K400_LCD_RES_10X7_1366X7; | ||
| 720 | lcd_patch_reg = K400_LCD_RES_10X7_1366X7; | ||
| 721 | break; | ||
| 722 | case VIA_RES_1280X768: | ||
| 723 | case VIA_RES_1280X800: | ||
| 724 | case VIA_RES_1280X960: | ||
| 725 | case VIA_RES_1280X1024: | ||
| 726 | reg_num = NUM_TOTAL_K400_LCD_RES_12X10_1366X7; | ||
| 727 | lcd_patch_reg = K400_LCD_RES_12X10_1366X7; | ||
| 728 | break; | ||
| 729 | } | ||
| 730 | break; | ||
| 731 | |||
| 732 | /* LCD 1360x768 */ | ||
| 733 | case LCD_PANEL_IDB_1360X768: | ||
| 734 | break; | ||
| 735 | } | ||
| 736 | if (reg_num != 0) { | ||
| 737 | /* H.W. Reset : ON */ | ||
| 738 | viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7); | ||
| 739 | |||
| 740 | viafb_write_regx(lcd_patch_reg, reg_num); | ||
| 741 | |||
| 742 | /* H.W. Reset : OFF */ | ||
| 743 | viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7); | ||
| 744 | |||
| 745 | /* Reset PLL */ | ||
| 746 | viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1); | ||
| 747 | viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1); | ||
| 748 | |||
| 749 | /* Fire! */ | ||
| 750 | outb(inb(VIARMisc) | (BIT2 + BIT3), VIAWMisc); | ||
| 751 | } | ||
| 752 | } | ||
| 753 | |||
| 754 | static void load_lcd_p880_patch_tbl(int set_hres, int set_vres, | ||
| 755 | int panel_id) | ||
| 756 | { | ||
| 757 | int vmode_index; | ||
| 758 | int reg_num = 0; | ||
| 759 | struct io_reg *lcd_patch_reg = NULL; | ||
| 760 | |||
| 761 | vmode_index = viafb_get_mode_index(set_hres, set_vres); | ||
| 762 | |||
| 763 | switch (panel_id) { | ||
| 764 | case LCD_PANEL_ID5_1400X1050: | ||
| 765 | switch (vmode_index) { | ||
| 766 | case VIA_RES_640X480: | ||
| 767 | reg_num = NUM_TOTAL_P880_LCD_RES_6X4_14X10; | ||
| 768 | lcd_patch_reg = P880_LCD_RES_6X4_14X10; | ||
| 769 | break; | ||
| 770 | case VIA_RES_800X600: | ||
| 771 | reg_num = NUM_TOTAL_P880_LCD_RES_8X6_14X10; | ||
| 772 | lcd_patch_reg = P880_LCD_RES_8X6_14X10; | ||
| 773 | break; | ||
| 774 | } | ||
| 775 | break; | ||
| 776 | case LCD_PANEL_ID6_1600X1200: | ||
| 777 | switch (vmode_index) { | ||
| 778 | case VIA_RES_640X400: | ||
| 779 | case VIA_RES_640X480: | ||
| 780 | reg_num = NUM_TOTAL_P880_LCD_RES_6X4_16X12; | ||
| 781 | lcd_patch_reg = P880_LCD_RES_6X4_16X12; | ||
| 782 | break; | ||
| 783 | case VIA_RES_720X480: | ||
| 784 | case VIA_RES_720X576: | ||
| 785 | reg_num = NUM_TOTAL_P880_LCD_RES_7X4_16X12; | ||
| 786 | lcd_patch_reg = P880_LCD_RES_7X4_16X12; | ||
| 787 | break; | ||
| 788 | case VIA_RES_800X600: | ||
| 789 | reg_num = NUM_TOTAL_P880_LCD_RES_8X6_16X12; | ||
| 790 | lcd_patch_reg = P880_LCD_RES_8X6_16X12; | ||
| 791 | break; | ||
| 792 | case VIA_RES_1024X768: | ||
| 793 | reg_num = NUM_TOTAL_P880_LCD_RES_10X7_16X12; | ||
| 794 | lcd_patch_reg = P880_LCD_RES_10X7_16X12; | ||
| 795 | break; | ||
| 796 | case VIA_RES_1280X768: | ||
| 797 | case VIA_RES_1280X960: | ||
| 798 | case VIA_RES_1280X1024: | ||
| 799 | reg_num = NUM_TOTAL_P880_LCD_RES_12X10_16X12; | ||
| 800 | lcd_patch_reg = P880_LCD_RES_12X10_16X12; | ||
| 801 | break; | ||
| 802 | } | ||
| 803 | break; | ||
| 804 | |||
| 805 | } | ||
| 806 | if (reg_num != 0) { | ||
| 807 | /* H.W. Reset : ON */ | ||
| 808 | viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7); | ||
| 809 | |||
| 810 | viafb_write_regx(lcd_patch_reg, reg_num); | ||
| 811 | |||
| 812 | /* H.W. Reset : OFF */ | ||
| 813 | viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7); | ||
| 814 | |||
| 815 | /* Reset PLL */ | ||
| 816 | viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1); | ||
| 817 | viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1); | ||
| 818 | |||
| 819 | /* Fire! */ | ||
| 820 | outb(inb(VIARMisc) | (BIT2 + BIT3), VIAWMisc); | ||
| 821 | } | ||
| 822 | } | ||
| 823 | |||
| 824 | static void load_lcd_patch_regs(int set_hres, int set_vres, | ||
| 825 | int panel_id, int set_iga) | ||
| 826 | { | ||
| 827 | int vmode_index; | ||
| 828 | |||
| 829 | vmode_index = viafb_get_mode_index(set_hres, set_vres); | ||
| 830 | |||
| 831 | viafb_unlock_crt(); | ||
| 832 | |||
| 833 | /* Patch for simultaneous & Expansion */ | ||
| 834 | if ((set_iga == IGA1_IGA2) && | ||
| 835 | (viaparinfo->lvds_setting_info->display_method == | ||
| 836 | LCD_EXPANDSION)) { | ||
| 837 | switch (viaparinfo->chip_info->gfx_chip_name) { | ||
| 838 | case UNICHROME_CLE266: | ||
| 839 | case UNICHROME_K400: | ||
| 840 | load_lcd_k400_patch_tbl(set_hres, set_vres, panel_id); | ||
| 841 | break; | ||
| 842 | case UNICHROME_K800: | ||
| 843 | break; | ||
| 844 | case UNICHROME_PM800: | ||
| 845 | case UNICHROME_CN700: | ||
| 846 | case UNICHROME_CX700: | ||
| 847 | load_lcd_p880_patch_tbl(set_hres, set_vres, panel_id); | ||
| 848 | } | ||
| 849 | } | ||
| 850 | |||
| 851 | viafb_lock_crt(); | ||
| 852 | } | ||
| 853 | |||
| 854 | static void via_pitch_alignment_patch_lcd( | 518 | static void via_pitch_alignment_patch_lcd( |
| 855 | struct lvds_setting_information *plvds_setting_info, | 519 | struct lvds_setting_information *plvds_setting_info, |
| 856 | struct lvds_chip_information | 520 | struct lvds_chip_information |
| @@ -949,29 +613,25 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, | |||
| 949 | struct lvds_setting_information *plvds_setting_info, | 613 | struct lvds_setting_information *plvds_setting_info, |
| 950 | struct lvds_chip_information *plvds_chip_info) | 614 | struct lvds_chip_information *plvds_chip_info) |
| 951 | { | 615 | { |
| 952 | int video_index = plvds_setting_info->lcd_panel_size; | ||
| 953 | int set_iga = plvds_setting_info->iga_path; | 616 | int set_iga = plvds_setting_info->iga_path; |
| 954 | int mode_bpp = plvds_setting_info->bpp; | 617 | int mode_bpp = plvds_setting_info->bpp; |
| 955 | int set_hres, set_vres; | 618 | int set_hres = plvds_setting_info->h_active; |
| 956 | int panel_hres, panel_vres; | 619 | int set_vres = plvds_setting_info->v_active; |
| 620 | int panel_hres = plvds_setting_info->lcd_panel_hres; | ||
| 621 | int panel_vres = plvds_setting_info->lcd_panel_vres; | ||
| 957 | u32 pll_D_N; | 622 | u32 pll_D_N; |
| 958 | int offset; | ||
| 959 | struct display_timing mode_crt_reg, panel_crt_reg; | 623 | struct display_timing mode_crt_reg, panel_crt_reg; |
| 960 | struct crt_mode_table *panel_crt_table = NULL; | 624 | struct crt_mode_table *panel_crt_table = NULL; |
| 961 | struct VideoModeTable *vmode_tbl = NULL; | 625 | struct VideoModeTable *vmode_tbl = viafb_get_mode(panel_hres, |
| 626 | panel_vres); | ||
| 962 | 627 | ||
| 963 | DEBUG_MSG(KERN_INFO "viafb_lcd_set_mode!!\n"); | 628 | DEBUG_MSG(KERN_INFO "viafb_lcd_set_mode!!\n"); |
| 964 | /* Get mode table */ | 629 | /* Get mode table */ |
| 965 | mode_crt_reg = mode_crt_table->crtc; | 630 | mode_crt_reg = mode_crt_table->crtc; |
| 966 | /* Get panel table Pointer */ | 631 | /* Get panel table Pointer */ |
| 967 | vmode_tbl = viafb_get_modetbl_pointer(video_index); | ||
| 968 | panel_crt_table = vmode_tbl->crtc; | 632 | panel_crt_table = vmode_tbl->crtc; |
| 969 | panel_crt_reg = panel_crt_table->crtc; | 633 | panel_crt_reg = panel_crt_table->crtc; |
| 970 | DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n"); | 634 | DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n"); |
| 971 | set_hres = plvds_setting_info->h_active; | ||
| 972 | set_vres = plvds_setting_info->v_active; | ||
| 973 | panel_hres = plvds_setting_info->lcd_panel_hres; | ||
| 974 | panel_vres = plvds_setting_info->lcd_panel_vres; | ||
| 975 | if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) | 635 | if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) |
| 976 | viafb_init_lvds_vt1636(plvds_setting_info, plvds_chip_info); | 636 | viafb_init_lvds_vt1636(plvds_setting_info, plvds_chip_info); |
| 977 | plvds_setting_info->vclk = panel_crt_table->clk; | 637 | plvds_setting_info->vclk = panel_crt_table->clk; |
| @@ -1001,54 +661,12 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, | |||
| 1001 | } | 661 | } |
| 1002 | } | 662 | } |
| 1003 | 663 | ||
| 1004 | if (set_iga == IGA1_IGA2) { | 664 | /* Fetch count for IGA2 only */ |
| 1005 | load_crtc_shadow_timing(mode_crt_reg, panel_crt_reg); | 665 | viafb_load_fetch_count_reg(set_hres, mode_bpp / 8, set_iga); |
| 1006 | /* Fill shadow registers */ | ||
| 1007 | |||
| 1008 | switch (plvds_setting_info->lcd_panel_id) { | ||
| 1009 | case LCD_PANEL_ID0_640X480: | ||
| 1010 | offset = 80; | ||
| 1011 | break; | ||
| 1012 | case LCD_PANEL_ID1_800X600: | ||
| 1013 | case LCD_PANEL_IDA_800X480: | ||
| 1014 | offset = 110; | ||
| 1015 | break; | ||
| 1016 | case LCD_PANEL_ID2_1024X768: | ||
| 1017 | offset = 150; | ||
| 1018 | break; | ||
| 1019 | case LCD_PANEL_ID3_1280X768: | ||
| 1020 | case LCD_PANEL_ID4_1280X1024: | ||
| 1021 | case LCD_PANEL_ID5_1400X1050: | ||
| 1022 | case LCD_PANEL_ID9_1280X800: | ||
| 1023 | offset = 190; | ||
| 1024 | break; | ||
| 1025 | case LCD_PANEL_ID6_1600X1200: | ||
| 1026 | offset = 250; | ||
| 1027 | break; | ||
| 1028 | case LCD_PANEL_ID7_1366X768: | ||
| 1029 | case LCD_PANEL_IDB_1360X768: | ||
| 1030 | offset = 212; | ||
| 1031 | break; | ||
| 1032 | default: | ||
| 1033 | offset = 140; | ||
| 1034 | break; | ||
| 1035 | } | ||
| 1036 | |||
| 1037 | /* Offset for simultaneous */ | ||
| 1038 | viafb_set_secondary_pitch(offset << 3); | ||
| 1039 | DEBUG_MSG(KERN_INFO "viafb_load_reg!!\n"); | ||
| 1040 | viafb_load_fetch_count_reg(set_hres, 4, IGA2); | ||
| 1041 | /* Fetch count for simultaneous */ | ||
| 1042 | } else { /* SAMM */ | ||
| 1043 | /* Fetch count for IGA2 only */ | ||
| 1044 | viafb_load_fetch_count_reg(set_hres, mode_bpp / 8, set_iga); | ||
| 1045 | |||
| 1046 | if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) | ||
| 1047 | && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400)) | ||
| 1048 | viafb_load_FIFO_reg(set_iga, set_hres, set_vres); | ||
| 1049 | 666 | ||
| 1050 | viafb_set_color_depth(mode_bpp / 8, set_iga); | 667 | if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) |
| 1051 | } | 668 | && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400)) |
| 669 | viafb_load_FIFO_reg(set_iga, set_hres, set_vres); | ||
| 1052 | 670 | ||
| 1053 | fill_lcd_format(); | 671 | fill_lcd_format(); |
| 1054 | 672 | ||
| @@ -1065,11 +683,6 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, | |||
| 1065 | || (UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name)) | 683 | || (UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name)) |
| 1066 | viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0); | 684 | viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0); |
| 1067 | 685 | ||
| 1068 | load_lcd_patch_regs(set_hres, set_vres, | ||
| 1069 | plvds_setting_info->lcd_panel_id, set_iga); | ||
| 1070 | |||
| 1071 | DEBUG_MSG(KERN_INFO "load_lcd_patch_regs!!\n"); | ||
| 1072 | |||
| 1073 | /* Patch for non 32bit alignment mode */ | 686 | /* Patch for non 32bit alignment mode */ |
| 1074 | via_pitch_alignment_patch_lcd(plvds_setting_info, plvds_chip_info); | 687 | via_pitch_alignment_patch_lcd(plvds_setting_info, plvds_chip_info); |
| 1075 | } | 688 | } |
| @@ -1283,8 +896,7 @@ void viafb_lcd_enable(void) | |||
| 1283 | viafb_write_reg_mask(CR6A, VIACR, 0x48, 0x48); | 896 | viafb_write_reg_mask(CR6A, VIACR, 0x48, 0x48); |
| 1284 | } | 897 | } |
| 1285 | 898 | ||
| 1286 | if ((viaparinfo->lvds_setting_info->iga_path == IGA1) | 899 | if (viaparinfo->lvds_setting_info->iga_path == IGA1) { |
| 1287 | || (viaparinfo->lvds_setting_info->iga_path == IGA1_IGA2)) { | ||
| 1288 | /* CRT path set to IGA2 */ | 900 | /* CRT path set to IGA2 */ |
| 1289 | viafb_write_reg_mask(SR16, VIASR, 0x40, 0x40); | 901 | viafb_write_reg_mask(SR16, VIASR, 0x40, 0x40); |
| 1290 | /* IGA2 path disabled */ | 902 | /* IGA2 path disabled */ |
| @@ -1476,210 +1088,6 @@ static struct display_timing lcd_centering_timging(struct display_timing | |||
| 1476 | return crt_reg; | 1088 | return crt_reg; |
| 1477 | } | 1089 | } |
| 1478 | 1090 | ||
| 1479 | static void load_crtc_shadow_timing(struct display_timing mode_timing, | ||
| 1480 | struct display_timing panel_timing) | ||
| 1481 | { | ||
| 1482 | struct io_register *reg = NULL; | ||
| 1483 | int i; | ||
| 1484 | int viafb_load_reg_Num = 0; | ||
| 1485 | int reg_value = 0; | ||
| 1486 | |||
| 1487 | if (viaparinfo->lvds_setting_info->display_method == LCD_EXPANDSION) { | ||
| 1488 | /* Expansion */ | ||
| 1489 | for (i = 12; i < 20; i++) { | ||
| 1490 | switch (i) { | ||
| 1491 | case H_TOTAL_SHADOW_INDEX: | ||
| 1492 | reg_value = | ||
| 1493 | IGA2_HOR_TOTAL_SHADOW_FORMULA | ||
| 1494 | (panel_timing.hor_total); | ||
| 1495 | viafb_load_reg_Num = | ||
| 1496 | iga2_shadow_crtc_reg.hor_total_shadow. | ||
| 1497 | reg_num; | ||
| 1498 | reg = iga2_shadow_crtc_reg.hor_total_shadow.reg; | ||
| 1499 | break; | ||
| 1500 | case H_BLANK_END_SHADOW_INDEX: | ||
| 1501 | reg_value = | ||
| 1502 | IGA2_HOR_BLANK_END_SHADOW_FORMULA | ||
| 1503 | (panel_timing.hor_blank_start, | ||
| 1504 | panel_timing.hor_blank_end); | ||
| 1505 | viafb_load_reg_Num = | ||
| 1506 | iga2_shadow_crtc_reg. | ||
| 1507 | hor_blank_end_shadow.reg_num; | ||
| 1508 | reg = | ||
| 1509 | iga2_shadow_crtc_reg. | ||
| 1510 | hor_blank_end_shadow.reg; | ||
| 1511 | break; | ||
| 1512 | case V_TOTAL_SHADOW_INDEX: | ||
| 1513 | reg_value = | ||
| 1514 | IGA2_VER_TOTAL_SHADOW_FORMULA | ||
| 1515 | (panel_timing.ver_total); | ||
| 1516 | viafb_load_reg_Num = | ||
| 1517 | iga2_shadow_crtc_reg.ver_total_shadow. | ||
| 1518 | reg_num; | ||
| 1519 | reg = iga2_shadow_crtc_reg.ver_total_shadow.reg; | ||
| 1520 | break; | ||
| 1521 | case V_ADDR_SHADOW_INDEX: | ||
| 1522 | reg_value = | ||
| 1523 | IGA2_VER_ADDR_SHADOW_FORMULA | ||
| 1524 | (panel_timing.ver_addr); | ||
| 1525 | viafb_load_reg_Num = | ||
| 1526 | iga2_shadow_crtc_reg.ver_addr_shadow. | ||
| 1527 | reg_num; | ||
| 1528 | reg = iga2_shadow_crtc_reg.ver_addr_shadow.reg; | ||
| 1529 | break; | ||
| 1530 | case V_BLANK_SATRT_SHADOW_INDEX: | ||
| 1531 | reg_value = | ||
| 1532 | IGA2_VER_BLANK_START_SHADOW_FORMULA | ||
| 1533 | (panel_timing.ver_blank_start); | ||
| 1534 | viafb_load_reg_Num = | ||
| 1535 | iga2_shadow_crtc_reg. | ||
| 1536 | ver_blank_start_shadow.reg_num; | ||
| 1537 | reg = | ||
| 1538 | iga2_shadow_crtc_reg. | ||
| 1539 | ver_blank_start_shadow.reg; | ||
| 1540 | break; | ||
| 1541 | case V_BLANK_END_SHADOW_INDEX: | ||
| 1542 | reg_value = | ||
| 1543 | IGA2_VER_BLANK_END_SHADOW_FORMULA | ||
| 1544 | (panel_timing.ver_blank_start, | ||
| 1545 | panel_timing.ver_blank_end); | ||
| 1546 | viafb_load_reg_Num = | ||
| 1547 | iga2_shadow_crtc_reg. | ||
| 1548 | ver_blank_end_shadow.reg_num; | ||
| 1549 | reg = | ||
| 1550 | iga2_shadow_crtc_reg. | ||
| 1551 | ver_blank_end_shadow.reg; | ||
| 1552 | break; | ||
| 1553 | case V_SYNC_SATRT_SHADOW_INDEX: | ||
| 1554 | reg_value = | ||
| 1555 | IGA2_VER_SYNC_START_SHADOW_FORMULA | ||
| 1556 | (panel_timing.ver_sync_start); | ||
| 1557 | viafb_load_reg_Num = | ||
| 1558 | iga2_shadow_crtc_reg. | ||
| 1559 | ver_sync_start_shadow.reg_num; | ||
| 1560 | reg = | ||
| 1561 | iga2_shadow_crtc_reg. | ||
| 1562 | ver_sync_start_shadow.reg; | ||
| 1563 | break; | ||
| 1564 | case V_SYNC_END_SHADOW_INDEX: | ||
| 1565 | reg_value = | ||
| 1566 | IGA2_VER_SYNC_END_SHADOW_FORMULA | ||
| 1567 | (panel_timing.ver_sync_start, | ||
| 1568 | panel_timing.ver_sync_end); | ||
| 1569 | viafb_load_reg_Num = | ||
| 1570 | iga2_shadow_crtc_reg. | ||
| 1571 | ver_sync_end_shadow.reg_num; | ||
| 1572 | reg = | ||
| 1573 | iga2_shadow_crtc_reg. | ||
| 1574 | ver_sync_end_shadow.reg; | ||
| 1575 | break; | ||
| 1576 | } | ||
| 1577 | viafb_load_reg(reg_value, | ||
| 1578 | viafb_load_reg_Num, reg, VIACR); | ||
| 1579 | } | ||
| 1580 | } else { /* Centering */ | ||
| 1581 | for (i = 12; i < 20; i++) { | ||
| 1582 | switch (i) { | ||
| 1583 | case H_TOTAL_SHADOW_INDEX: | ||
| 1584 | reg_value = | ||
| 1585 | IGA2_HOR_TOTAL_SHADOW_FORMULA | ||
| 1586 | (panel_timing.hor_total); | ||
| 1587 | viafb_load_reg_Num = | ||
| 1588 | iga2_shadow_crtc_reg.hor_total_shadow. | ||
| 1589 | reg_num; | ||
| 1590 | reg = iga2_shadow_crtc_reg.hor_total_shadow.reg; | ||
| 1591 | break; | ||
| 1592 | case H_BLANK_END_SHADOW_INDEX: | ||
| 1593 | reg_value = | ||
| 1594 | IGA2_HOR_BLANK_END_SHADOW_FORMULA | ||
| 1595 | (panel_timing.hor_blank_start, | ||
| 1596 | panel_timing.hor_blank_end); | ||
| 1597 | viafb_load_reg_Num = | ||
| 1598 | iga2_shadow_crtc_reg. | ||
| 1599 | hor_blank_end_shadow.reg_num; | ||
| 1600 | reg = | ||
| 1601 | iga2_shadow_crtc_reg. | ||
| 1602 | hor_blank_end_shadow.reg; | ||
| 1603 | break; | ||
| 1604 | case V_TOTAL_SHADOW_INDEX: | ||
| 1605 | reg_value = | ||
| 1606 | IGA2_VER_TOTAL_SHADOW_FORMULA | ||
| 1607 | (panel_timing.ver_total); | ||
| 1608 | viafb_load_reg_Num = | ||
| 1609 | iga2_shadow_crtc_reg.ver_total_shadow. | ||
| 1610 | reg_num; | ||
| 1611 | reg = iga2_shadow_crtc_reg.ver_total_shadow.reg; | ||
| 1612 | break; | ||
| 1613 | case V_ADDR_SHADOW_INDEX: | ||
| 1614 | reg_value = | ||
| 1615 | IGA2_VER_ADDR_SHADOW_FORMULA | ||
| 1616 | (mode_timing.ver_addr); | ||
| 1617 | viafb_load_reg_Num = | ||
| 1618 | iga2_shadow_crtc_reg.ver_addr_shadow. | ||
| 1619 | reg_num; | ||
| 1620 | reg = iga2_shadow_crtc_reg.ver_addr_shadow.reg; | ||
| 1621 | break; | ||
| 1622 | case V_BLANK_SATRT_SHADOW_INDEX: | ||
| 1623 | reg_value = | ||
| 1624 | IGA2_VER_BLANK_START_SHADOW_FORMULA | ||
| 1625 | (mode_timing.ver_blank_start); | ||
| 1626 | viafb_load_reg_Num = | ||
| 1627 | iga2_shadow_crtc_reg. | ||
| 1628 | ver_blank_start_shadow.reg_num; | ||
| 1629 | reg = | ||
| 1630 | iga2_shadow_crtc_reg. | ||
| 1631 | ver_blank_start_shadow.reg; | ||
| 1632 | break; | ||
| 1633 | case V_BLANK_END_SHADOW_INDEX: | ||
| 1634 | reg_value = | ||
| 1635 | IGA2_VER_BLANK_END_SHADOW_FORMULA | ||
| 1636 | (panel_timing.ver_blank_start, | ||
| 1637 | panel_timing.ver_blank_end); | ||
| 1638 | viafb_load_reg_Num = | ||
| 1639 | iga2_shadow_crtc_reg. | ||
| 1640 | ver_blank_end_shadow.reg_num; | ||
| 1641 | reg = | ||
| 1642 | iga2_shadow_crtc_reg. | ||
| 1643 | ver_blank_end_shadow.reg; | ||
| 1644 | break; | ||
| 1645 | case V_SYNC_SATRT_SHADOW_INDEX: | ||
| 1646 | reg_value = | ||
| 1647 | IGA2_VER_SYNC_START_SHADOW_FORMULA( | ||
| 1648 | (panel_timing.ver_sync_start - | ||
| 1649 | panel_timing.ver_blank_start) + | ||
| 1650 | (panel_timing.ver_addr - | ||
| 1651 | mode_timing.ver_addr) / 2 + | ||
| 1652 | mode_timing.ver_addr); | ||
| 1653 | viafb_load_reg_Num = | ||
| 1654 | iga2_shadow_crtc_reg.ver_sync_start_shadow. | ||
| 1655 | reg_num; | ||
| 1656 | reg = | ||
| 1657 | iga2_shadow_crtc_reg.ver_sync_start_shadow. | ||
| 1658 | reg; | ||
| 1659 | break; | ||
| 1660 | case V_SYNC_END_SHADOW_INDEX: | ||
| 1661 | reg_value = | ||
| 1662 | IGA2_VER_SYNC_END_SHADOW_FORMULA( | ||
| 1663 | (panel_timing.ver_sync_start - | ||
| 1664 | panel_timing.ver_blank_start) + | ||
| 1665 | (panel_timing.ver_addr - | ||
| 1666 | mode_timing.ver_addr) / 2 + | ||
| 1667 | mode_timing.ver_addr, | ||
| 1668 | panel_timing.ver_sync_end); | ||
| 1669 | viafb_load_reg_Num = | ||
| 1670 | iga2_shadow_crtc_reg.ver_sync_end_shadow. | ||
| 1671 | reg_num; | ||
| 1672 | reg = | ||
| 1673 | iga2_shadow_crtc_reg.ver_sync_end_shadow. | ||
| 1674 | reg; | ||
| 1675 | break; | ||
| 1676 | } | ||
| 1677 | viafb_load_reg(reg_value, | ||
| 1678 | viafb_load_reg_Num, reg, VIACR); | ||
| 1679 | } | ||
| 1680 | } | ||
| 1681 | } | ||
| 1682 | |||
| 1683 | bool viafb_lcd_get_mobile_state(bool *mobile) | 1091 | bool viafb_lcd_get_mobile_state(bool *mobile) |
| 1684 | { | 1092 | { |
| 1685 | unsigned char *romptr, *tableptr; | 1093 | unsigned char *romptr, *tableptr; |
