aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/usb/net/asix.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/usb/net/asix.c')
-rw-r--r--drivers/usb/net/asix.c1006
1 files changed, 773 insertions, 233 deletions
diff --git a/drivers/usb/net/asix.c b/drivers/usb/net/asix.c
index 37111acec87..9c0eacf7055 100644
--- a/drivers/usb/net/asix.c
+++ b/drivers/usb/net/asix.c
@@ -1,7 +1,8 @@
1/* 1/*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices 2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com> 3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net> 4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
5 * Copyright (c) 2002-2003 TiVo Inc. 6 * Copyright (c) 2002-2003 TiVo Inc.
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
@@ -22,7 +23,6 @@
22// #define DEBUG // error path messages, extra info 23// #define DEBUG // error path messages, extra info
23// #define VERBOSE // more; success messages 24// #define VERBOSE // more; success messages
24 25
25#include <linux/config.h>
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/kmod.h> 27#include <linux/kmod.h>
28#include <linux/sched.h> 28#include <linux/sched.h>
@@ -37,6 +37,9 @@
37 37
38#include "usbnet.h" 38#include "usbnet.h"
39 39
40#define DRIVER_VERSION "14-Jun-2006"
41static const char driver_name [] = "asix";
42
40/* ASIX AX8817X based USB 2.0 Ethernet Devices */ 43/* ASIX AX8817X based USB 2.0 Ethernet Devices */
41 44
42#define AX_CMD_SET_SW_MII 0x06 45#define AX_CMD_SET_SW_MII 0x06
@@ -47,23 +50,25 @@
47#define AX_CMD_WRITE_EEPROM 0x0c 50#define AX_CMD_WRITE_EEPROM 0x0c
48#define AX_CMD_WRITE_ENABLE 0x0d 51#define AX_CMD_WRITE_ENABLE 0x0d
49#define AX_CMD_WRITE_DISABLE 0x0e 52#define AX_CMD_WRITE_DISABLE 0x0e
53#define AX_CMD_READ_RX_CTL 0x0f
50#define AX_CMD_WRITE_RX_CTL 0x10 54#define AX_CMD_WRITE_RX_CTL 0x10
51#define AX_CMD_READ_IPG012 0x11 55#define AX_CMD_READ_IPG012 0x11
52#define AX_CMD_WRITE_IPG0 0x12 56#define AX_CMD_WRITE_IPG0 0x12
53#define AX_CMD_WRITE_IPG1 0x13 57#define AX_CMD_WRITE_IPG1 0x13
58#define AX_CMD_READ_NODE_ID 0x13
54#define AX_CMD_WRITE_IPG2 0x14 59#define AX_CMD_WRITE_IPG2 0x14
55#define AX_CMD_WRITE_MULTI_FILTER 0x16 60#define AX_CMD_WRITE_MULTI_FILTER 0x16
56#define AX_CMD_READ_NODE_ID 0x17 61#define AX88172_CMD_READ_NODE_ID 0x17
57#define AX_CMD_READ_PHY_ID 0x19 62#define AX_CMD_READ_PHY_ID 0x19
58#define AX_CMD_READ_MEDIUM_STATUS 0x1a 63#define AX_CMD_READ_MEDIUM_STATUS 0x1a
59#define AX_CMD_WRITE_MEDIUM_MODE 0x1b 64#define AX_CMD_WRITE_MEDIUM_MODE 0x1b
60#define AX_CMD_READ_MONITOR_MODE 0x1c 65#define AX_CMD_READ_MONITOR_MODE 0x1c
61#define AX_CMD_WRITE_MONITOR_MODE 0x1d 66#define AX_CMD_WRITE_MONITOR_MODE 0x1d
67#define AX_CMD_READ_GPIOS 0x1e
62#define AX_CMD_WRITE_GPIOS 0x1f 68#define AX_CMD_WRITE_GPIOS 0x1f
63#define AX_CMD_SW_RESET 0x20 69#define AX_CMD_SW_RESET 0x20
64#define AX_CMD_SW_PHY_STATUS 0x21 70#define AX_CMD_SW_PHY_STATUS 0x21
65#define AX_CMD_SW_PHY_SELECT 0x22 71#define AX_CMD_SW_PHY_SELECT 0x22
66#define AX88772_CMD_READ_NODE_ID 0x13
67 72
68#define AX_MONITOR_MODE 0x01 73#define AX_MONITOR_MODE 0x01
69#define AX_MONITOR_LINK 0x02 74#define AX_MONITOR_LINK 0x02
@@ -71,15 +76,15 @@
71#define AX_MONITOR_HSFS 0x10 76#define AX_MONITOR_HSFS 0x10
72 77
73/* AX88172 Medium Status Register values */ 78/* AX88172 Medium Status Register values */
74#define AX_MEDIUM_FULL_DUPLEX 0x02 79#define AX88172_MEDIUM_FD 0x02
75#define AX_MEDIUM_TX_ABORT_ALLOW 0x04 80#define AX88172_MEDIUM_TX 0x04
76#define AX_MEDIUM_FLOW_CONTROL_EN 0x10 81#define AX88172_MEDIUM_FC 0x10
82#define AX88172_MEDIUM_DEFAULT \
83 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
77 84
78#define AX_MCAST_FILTER_SIZE 8 85#define AX_MCAST_FILTER_SIZE 8
79#define AX_MAX_MCAST 64 86#define AX_MAX_MCAST 64
80 87
81#define AX_EEPROM_LEN 0x40
82
83#define AX_SWRESET_CLEAR 0x00 88#define AX_SWRESET_CLEAR 0x00
84#define AX_SWRESET_RR 0x01 89#define AX_SWRESET_RR 0x01
85#define AX_SWRESET_RT 0x02 90#define AX_SWRESET_RT 0x02
@@ -93,23 +98,78 @@
93#define AX88772_IPG1_DEFAULT 0x0c 98#define AX88772_IPG1_DEFAULT 0x0c
94#define AX88772_IPG2_DEFAULT 0x12 99#define AX88772_IPG2_DEFAULT 0x12
95 100
96#define AX88772_MEDIUM_FULL_DUPLEX 0x0002 101/* AX88772 & AX88178 Medium Mode Register */
97#define AX88772_MEDIUM_RESERVED 0x0004 102#define AX_MEDIUM_PF 0x0080
98#define AX88772_MEDIUM_RX_FC_ENABLE 0x0010 103#define AX_MEDIUM_JFE 0x0040
99#define AX88772_MEDIUM_TX_FC_ENABLE 0x0020 104#define AX_MEDIUM_TFC 0x0020
100#define AX88772_MEDIUM_PAUSE_FORMAT 0x0080 105#define AX_MEDIUM_RFC 0x0010
101#define AX88772_MEDIUM_RX_ENABLE 0x0100 106#define AX_MEDIUM_ENCK 0x0008
102#define AX88772_MEDIUM_100MB 0x0200 107#define AX_MEDIUM_AC 0x0004
103#define AX88772_MEDIUM_DEFAULT \ 108#define AX_MEDIUM_FD 0x0002
104 (AX88772_MEDIUM_FULL_DUPLEX | AX88772_MEDIUM_RX_FC_ENABLE | \ 109#define AX_MEDIUM_GM 0x0001
105 AX88772_MEDIUM_TX_FC_ENABLE | AX88772_MEDIUM_100MB | \ 110#define AX_MEDIUM_SM 0x1000
106 AX88772_MEDIUM_RESERVED | AX88772_MEDIUM_RX_ENABLE ) 111#define AX_MEDIUM_SBP 0x0800
112#define AX_MEDIUM_PS 0x0200
113#define AX_MEDIUM_RE 0x0100
114
115#define AX88178_MEDIUM_DEFAULT \
116 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
117 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
118 AX_MEDIUM_RE )
107 119
108#define AX_EEPROM_MAGIC 0xdeadbeef 120#define AX88772_MEDIUM_DEFAULT \
121 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
122 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
123 AX_MEDIUM_AC | AX_MEDIUM_RE )
124
125/* AX88772 & AX88178 RX_CTL values */
126#define AX_RX_CTL_SO 0x0080
127#define AX_RX_CTL_AP 0x0020
128#define AX_RX_CTL_AM 0x0010
129#define AX_RX_CTL_AB 0x0008
130#define AX_RX_CTL_SEP 0x0004
131#define AX_RX_CTL_AMALL 0x0002
132#define AX_RX_CTL_PRO 0x0001
133#define AX_RX_CTL_MFB_2048 0x0000
134#define AX_RX_CTL_MFB_4096 0x0100
135#define AX_RX_CTL_MFB_8192 0x0200
136#define AX_RX_CTL_MFB_16384 0x0300
137
138#define AX_DEFAULT_RX_CTL \
139 (AX_RX_CTL_SO | AX_RX_CTL_AB )
140
141/* GPIO 0 .. 2 toggles */
142#define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
143#define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
144#define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
145#define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
146#define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
147#define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
148#define AX_GPIO_RESERVED 0x40 /* Reserved */
149#define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
150
151#define AX_EEPROM_MAGIC 0xdeadbeef
152#define AX88172_EEPROM_LEN 0x40
153#define AX88772_EEPROM_LEN 0xff
154
155#define PHY_MODE_MARVELL 0x0000
156#define MII_MARVELL_LED_CTRL 0x0018
157#define MII_MARVELL_STATUS 0x001b
158#define MII_MARVELL_CTRL 0x0014
159
160#define MARVELL_LED_MANUAL 0x0019
161
162#define MARVELL_STATUS_HWCFG 0x0004
163
164#define MARVELL_CTRL_TXDELAY 0x0002
165#define MARVELL_CTRL_RXDELAY 0x0080
109 166
110/* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */ 167/* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
111struct asix_data { 168struct asix_data {
112 u8 multi_filter[AX_MCAST_FILTER_SIZE]; 169 u8 multi_filter[AX_MCAST_FILTER_SIZE];
170 u8 phymode;
171 u8 ledmode;
172 u8 eeprom_len;
113}; 173};
114 174
115struct ax88172_int_data { 175struct ax88172_int_data {
@@ -123,6 +183,8 @@ struct ax88172_int_data {
123static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, 183static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
124 u16 size, void *data) 184 u16 size, void *data)
125{ 185{
186 devdbg(dev,"asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
187 cmd, value, index, size);
126 return usb_control_msg( 188 return usb_control_msg(
127 dev->udev, 189 dev->udev,
128 usb_rcvctrlpipe(dev->udev, 0), 190 usb_rcvctrlpipe(dev->udev, 0),
@@ -138,6 +200,8 @@ static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
138static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, 200static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
139 u16 size, void *data) 201 u16 size, void *data)
140{ 202{
203 devdbg(dev,"asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
204 cmd, value, index, size);
141 return usb_control_msg( 205 return usb_control_msg(
142 dev->udev, 206 dev->udev,
143 usb_sndctrlpipe(dev->udev, 0), 207 usb_sndctrlpipe(dev->udev, 0),
@@ -162,12 +226,167 @@ static void asix_async_cmd_callback(struct urb *urb, struct pt_regs *regs)
162 usb_free_urb(urb); 226 usb_free_urb(urb);
163} 227}
164 228
229static void
230asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
231 u16 size, void *data)
232{
233 struct usb_ctrlrequest *req;
234 int status;
235 struct urb *urb;
236
237 devdbg(dev,"asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
238 cmd, value, index, size);
239 if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) {
240 deverr(dev, "Error allocating URB in write_cmd_async!");
241 return;
242 }
243
244 if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) {
245 deverr(dev, "Failed to allocate memory for control request");
246 usb_free_urb(urb);
247 return;
248 }
249
250 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
251 req->bRequest = cmd;
252 req->wValue = value;
253 req->wIndex = index;
254 req->wLength = size;
255
256 usb_fill_control_urb(urb, dev->udev,
257 usb_sndctrlpipe(dev->udev, 0),
258 (void *)req, data, size,
259 asix_async_cmd_callback, req);
260
261 if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
262 deverr(dev, "Error submitting the control message: status=%d",
263 status);
264 kfree(req);
265 usb_free_urb(urb);
266 }
267}
268
269static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
270{
271 u8 *head;
272 u32 header;
273 char *packet;
274 struct sk_buff *ax_skb;
275 u16 size;
276
277 head = (u8 *) skb->data;
278 memcpy(&header, head, sizeof(header));
279 le32_to_cpus(&header);
280 packet = head + sizeof(header);
281
282 skb_pull(skb, 4);
283
284 while (skb->len > 0) {
285 if ((short)(header & 0x0000ffff) !=
286 ~((short)((header & 0xffff0000) >> 16))) {
287 deverr(dev,"asix_rx_fixup() Bad Header Length");
288 }
289 /* get the packet length */
290 size = (u16) (header & 0x0000ffff);
291
292 if ((skb->len) - ((size + 1) & 0xfffe) == 0)
293 return 2;
294 if (size > ETH_FRAME_LEN) {
295 deverr(dev,"asix_rx_fixup() Bad RX Length %d", size);
296 return 0;
297 }
298 ax_skb = skb_clone(skb, GFP_ATOMIC);
299 if (ax_skb) {
300 ax_skb->len = size;
301 ax_skb->data = packet;
302 ax_skb->tail = packet + size;
303 usbnet_skb_return(dev, ax_skb);
304 } else {
305 return 0;
306 }
307
308 skb_pull(skb, (size + 1) & 0xfffe);
309
310 if (skb->len == 0)
311 break;
312
313 head = (u8 *) skb->data;
314 memcpy(&header, head, sizeof(header));
315 le32_to_cpus(&header);
316 packet = head + sizeof(header);
317 skb_pull(skb, 4);
318 }
319
320 if (skb->len < 0) {
321 deverr(dev,"asix_rx_fixup() Bad SKB Length %d", skb->len);
322 return 0;
323 }
324 return 1;
325}
326
327static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
328 gfp_t flags)
329{
330 int padlen;
331 int headroom = skb_headroom(skb);
332 int tailroom = skb_tailroom(skb);
333 u32 packet_len;
334 u32 padbytes = 0xffff0000;
335
336 padlen = ((skb->len + 4) % 512) ? 0 : 4;
337
338 if ((!skb_cloned(skb))
339 && ((headroom + tailroom) >= (4 + padlen))) {
340 if ((headroom < 4) || (tailroom < padlen)) {
341 skb->data = memmove(skb->head + 4, skb->data, skb->len);
342 skb->tail = skb->data + skb->len;
343 }
344 } else {
345 struct sk_buff *skb2;
346 skb2 = skb_copy_expand(skb, 4, padlen, flags);
347 dev_kfree_skb_any(skb);
348 skb = skb2;
349 if (!skb)
350 return NULL;
351 }
352
353 skb_push(skb, 4);
354 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
355 memcpy(skb->data, &packet_len, sizeof(packet_len));
356
357 if ((skb->len % 512) == 0) {
358 memcpy( skb->tail, &padbytes, sizeof(padbytes));
359 skb_put(skb, sizeof(padbytes));
360 }
361 return skb;
362}
363
364static void asix_status(struct usbnet *dev, struct urb *urb)
365{
366 struct ax88172_int_data *event;
367 int link;
368
369 if (urb->actual_length < 8)
370 return;
371
372 event = urb->transfer_buffer;
373 link = event->link & 0x01;
374 if (netif_carrier_ok(dev->net) != link) {
375 if (link) {
376 netif_carrier_on(dev->net);
377 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
378 } else
379 netif_carrier_off(dev->net);
380 devdbg(dev, "Link Status is: %d", link);
381 }
382}
383
165static inline int asix_set_sw_mii(struct usbnet *dev) 384static inline int asix_set_sw_mii(struct usbnet *dev)
166{ 385{
167 int ret; 386 int ret;
168 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL); 387 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
169 if (ret < 0) 388 if (ret < 0)
170 devdbg(dev, "Failed to enable software MII access"); 389 deverr(dev, "Failed to enable software MII access");
171 return ret; 390 return ret;
172} 391}
173 392
@@ -176,24 +395,27 @@ static inline int asix_set_hw_mii(struct usbnet *dev)
176 int ret; 395 int ret;
177 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL); 396 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
178 if (ret < 0) 397 if (ret < 0)
179 devdbg(dev, "Failed to enable hardware MII access"); 398 deverr(dev, "Failed to enable hardware MII access");
180 return ret; 399 return ret;
181} 400}
182 401
183static inline int asix_get_phyid(struct usbnet *dev) 402static inline int asix_get_phy_addr(struct usbnet *dev)
184{ 403{
185 int ret = 0; 404 int ret = 0;
186 void *buf; 405 void *buf;
187 406
407 devdbg(dev, "asix_get_phy_addr()");
408
188 buf = kmalloc(2, GFP_KERNEL); 409 buf = kmalloc(2, GFP_KERNEL);
189 if (!buf) 410 if (!buf)
190 goto out1; 411 goto out1;
191 412
192 if ((ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 413 if ((ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID,
193 0, 0, 2, buf)) < 2) { 414 0, 0, 2, buf)) < 2) {
194 devdbg(dev, "Error reading PHYID register: %02x", ret); 415 deverr(dev, "Error reading PHYID register: %02x", ret);
195 goto out2; 416 goto out2;
196 } 417 }
418 devdbg(dev, "asix_get_phy_addr() returning 0x%04x", *((u16 *)buf));
197 ret = *((u8 *)buf + 1); 419 ret = *((u8 *)buf + 1);
198out2: 420out2:
199 kfree(buf); 421 kfree(buf);
@@ -207,91 +429,109 @@ static int asix_sw_reset(struct usbnet *dev, u8 flags)
207 429
208 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL); 430 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
209 if (ret < 0) 431 if (ret < 0)
210 devdbg(dev,"Failed to send software reset: %02x", ret); 432 deverr(dev,"Failed to send software reset: %02x", ret);
211 433
212 return ret; 434 return ret;
213} 435}
214 436
437static u16 asix_read_rx_ctl(struct usbnet *dev)
438{
439 u16 ret = 0;
440 void *buf;
441
442 buf = kmalloc(2, GFP_KERNEL);
443 if (!buf)
444 goto out1;
445
446 if ((ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL,
447 0, 0, 2, buf)) < 2) {
448 deverr(dev, "Error reading RX_CTL register: %02x", ret);
449 goto out2;
450 }
451 ret = le16_to_cpu(*((u16 *)buf));
452out2:
453 kfree(buf);
454out1:
455 return ret;
456}
457
215static int asix_write_rx_ctl(struct usbnet *dev, u16 mode) 458static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
216{ 459{
217 int ret; 460 int ret;
218 461
462 devdbg(dev,"asix_write_rx_ctl() - mode = 0x%04x", mode);
219 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL); 463 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
220 if (ret < 0) 464 if (ret < 0)
221 devdbg(dev, "Failed to write RX_CTL mode: %02x", ret); 465 deverr(dev, "Failed to write RX_CTL mode to 0x%04x: %02x",
466 mode, ret);
222 467
223 return ret; 468 return ret;
224} 469}
225 470
226static void asix_status(struct usbnet *dev, struct urb *urb) 471static u16 asix_read_medium_status(struct usbnet *dev)
227{ 472{
228 struct ax88172_int_data *event; 473 u16 ret = 0;
229 int link; 474 void *buf;
230 475
231 if (urb->actual_length < 8) 476 buf = kmalloc(2, GFP_KERNEL);
232 return; 477 if (!buf)
478 goto out1;
233 479
234 event = urb->transfer_buffer; 480 if ((ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS,
235 link = event->link & 0x01; 481 0, 0, 2, buf)) < 2) {
236 if (netif_carrier_ok(dev->net) != link) { 482 deverr(dev, "Error reading Medium Status register: %02x", ret);
237 if (link) { 483 goto out2;
238 netif_carrier_on(dev->net);
239 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
240 } else
241 netif_carrier_off(dev->net);
242 devdbg(dev, "Link Status is: %d", link);
243 } 484 }
485 ret = le16_to_cpu(*((u16 *)buf));
486out2:
487 kfree(buf);
488out1:
489 return ret;
244} 490}
245 491
246static void 492static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
247asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
248 u16 size, void *data)
249{ 493{
250 struct usb_ctrlrequest *req; 494 int ret;
251 int status;
252 struct urb *urb;
253 495
254 if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) { 496 devdbg(dev,"asix_write_medium_mode() - mode = 0x%04x", mode);
255 devdbg(dev, "Error allocating URB in write_cmd_async!"); 497 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
256 return; 498 if (ret < 0)
257 } 499 deverr(dev, "Failed to write Medium Mode mode to 0x%04x: %02x",
500 mode, ret);
258 501
259 if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) { 502 return ret;
260 deverr(dev, "Failed to allocate memory for control request"); 503}
261 usb_free_urb(urb);
262 return;
263 }
264 504
265 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE; 505static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
266 req->bRequest = cmd; 506{
267 req->wValue = cpu_to_le16(value); 507 int ret;
268 req->wIndex = cpu_to_le16(index);
269 req->wLength = cpu_to_le16(size);
270 508
271 usb_fill_control_urb(urb, dev->udev, 509 devdbg(dev,"asix_write_gpio() - value = 0x%04x", value);
272 usb_sndctrlpipe(dev->udev, 0), 510 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
273 (void *)req, data, size, 511 if (ret < 0)
274 asix_async_cmd_callback, req); 512 deverr(dev, "Failed to write GPIO value 0x%04x: %02x",
513 value, ret);
275 514
276 if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) { 515 if (sleep)
277 deverr(dev, "Error submitting the control message: status=%d", 516 msleep(sleep);
278 status); 517
279 kfree(req); 518 return ret;
280 usb_free_urb(urb);
281 }
282} 519}
283 520
521/*
522 * AX88772 & AX88178 have a 16-bit RX_CTL value
523 */
284static void asix_set_multicast(struct net_device *net) 524static void asix_set_multicast(struct net_device *net)
285{ 525{
286 struct usbnet *dev = netdev_priv(net); 526 struct usbnet *dev = netdev_priv(net);
287 struct asix_data *data = (struct asix_data *)&dev->data; 527 struct asix_data *data = (struct asix_data *)&dev->data;
288 u8 rx_ctl = 0x8c; 528 u16 rx_ctl = AX_DEFAULT_RX_CTL;
289 529
290 if (net->flags & IFF_PROMISC) { 530 if (net->flags & IFF_PROMISC) {
291 rx_ctl |= 0x01; 531 rx_ctl |= AX_RX_CTL_PRO;
292 } else if (net->flags & IFF_ALLMULTI 532 } else if (net->flags & IFF_ALLMULTI
293 || net->mc_count > AX_MAX_MCAST) { 533 || net->mc_count > AX_MAX_MCAST) {
294 rx_ctl |= 0x02; 534 rx_ctl |= AX_RX_CTL_AMALL;
295 } else if (net->mc_count == 0) { 535 } else if (net->mc_count == 0) {
296 /* just broadcast and directed */ 536 /* just broadcast and directed */
297 } else { 537 } else {
@@ -318,7 +558,7 @@ static void asix_set_multicast(struct net_device *net)
318 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, 558 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
319 AX_MCAST_FILTER_SIZE, data->multi_filter); 559 AX_MCAST_FILTER_SIZE, data->multi_filter);
320 560
321 rx_ctl |= 0x10; 561 rx_ctl |= AX_RX_CTL_AM;
322 } 562 }
323 563
324 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); 564 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
@@ -334,50 +574,43 @@ static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
334 (__u16)loc, 2, (u16 *)&res); 574 (__u16)loc, 2, (u16 *)&res);
335 asix_set_hw_mii(dev); 575 asix_set_hw_mii(dev);
336 576
337 return res & 0xffff; 577 devdbg(dev, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x", phy_id, loc, le16_to_cpu(res & 0xffff));
338}
339 578
340/* same as above, but converts resulting value to cpu byte order */ 579 return le16_to_cpu(res & 0xffff);
341static int asix_mdio_read_le(struct net_device *netdev, int phy_id, int loc)
342{
343 return le16_to_cpu(asix_mdio_read(netdev,phy_id, loc));
344} 580}
345 581
346static void 582static void
347asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val) 583asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
348{ 584{
349 struct usbnet *dev = netdev_priv(netdev); 585 struct usbnet *dev = netdev_priv(netdev);
350 u16 res = val; 586 u16 res = cpu_to_le16(val);
351 587
588 devdbg(dev, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x", phy_id, loc, val);
352 asix_set_sw_mii(dev); 589 asix_set_sw_mii(dev);
353 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, 590 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id,
354 (__u16)loc, 2, (u16 *)&res); 591 (__u16)loc, 2, (u16 *)&res);
355 asix_set_hw_mii(dev); 592 asix_set_hw_mii(dev);
356} 593}
357 594
358/* same as above, but converts new value to le16 byte order before writing */ 595/* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
359static void 596static u32 asix_get_phyid(struct usbnet *dev)
360asix_mdio_write_le(struct net_device *netdev, int phy_id, int loc, int val)
361{ 597{
362 asix_mdio_write( netdev, phy_id, loc, cpu_to_le16(val) ); 598 int phy_reg;
363} 599 u32 phy_id;
364 600
365static int ax88172_link_reset(struct usbnet *dev) 601 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
366{ 602 if (phy_reg < 0)
367 u16 lpa; 603 return 0;
368 u16 adv;
369 u16 res;
370 u8 mode;
371 604
372 mode = AX_MEDIUM_TX_ABORT_ALLOW | AX_MEDIUM_FLOW_CONTROL_EN; 605 phy_id = (phy_reg & 0xffff) << 16;
373 lpa = asix_mdio_read_le(dev->net, dev->mii.phy_id, MII_LPA);
374 adv = asix_mdio_read_le(dev->net, dev->mii.phy_id, MII_ADVERTISE);
375 res = mii_nway_result(lpa|adv);
376 if (res & LPA_DUPLEX)
377 mode |= AX_MEDIUM_FULL_DUPLEX;
378 asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
379 606
380 return 0; 607 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
608 if (phy_reg < 0)
609 return 0;
610
611 phy_id |= (phy_reg & 0xffff);
612
613 return phy_id;
381} 614}
382 615
383static void 616static void
@@ -424,7 +657,10 @@ asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
424 657
425static int asix_get_eeprom_len(struct net_device *net) 658static int asix_get_eeprom_len(struct net_device *net)
426{ 659{
427 return AX_EEPROM_LEN; 660 struct usbnet *dev = netdev_priv(net);
661 struct asix_data *data = (struct asix_data *)&dev->data;
662
663 return data->eeprom_len;
428} 664}
429 665
430static int asix_get_eeprom(struct net_device *net, 666static int asix_get_eeprom(struct net_device *net,
@@ -454,9 +690,14 @@ static int asix_get_eeprom(struct net_device *net,
454static void asix_get_drvinfo (struct net_device *net, 690static void asix_get_drvinfo (struct net_device *net,
455 struct ethtool_drvinfo *info) 691 struct ethtool_drvinfo *info)
456{ 692{
693 struct usbnet *dev = netdev_priv(net);
694 struct asix_data *data = (struct asix_data *)&dev->data;
695
457 /* Inherit standard device info */ 696 /* Inherit standard device info */
458 usbnet_get_drvinfo(net, info); 697 usbnet_get_drvinfo(net, info);
459 info->eedump_len = 0x3e; 698 strncpy (info->driver, driver_name, sizeof info->driver);
699 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
700 info->eedump_len = data->eeprom_len;
460} 701}
461 702
462static int asix_get_settings(struct net_device *net, struct ethtool_cmd *cmd) 703static int asix_get_settings(struct net_device *net, struct ethtool_cmd *cmd)
@@ -469,8 +710,34 @@ static int asix_get_settings(struct net_device *net, struct ethtool_cmd *cmd)
469static int asix_set_settings(struct net_device *net, struct ethtool_cmd *cmd) 710static int asix_set_settings(struct net_device *net, struct ethtool_cmd *cmd)
470{ 711{
471 struct usbnet *dev = netdev_priv(net); 712 struct usbnet *dev = netdev_priv(net);
713 int res = mii_ethtool_sset(&dev->mii,cmd);
714
715 /* link speed/duplex might have changed */
716 if (dev->driver_info->link_reset)
717 dev->driver_info->link_reset(dev);
718
719 return res;
720}
721
722static int asix_nway_reset(struct net_device *net)
723{
724 struct usbnet *dev = netdev_priv(net);
725
726 return mii_nway_restart(&dev->mii);
727}
728
729static u32 asix_get_link(struct net_device *net)
730{
731 struct usbnet *dev = netdev_priv(net);
472 732
473 return mii_ethtool_sset(&dev->mii,cmd); 733 return mii_link_ok(&dev->mii);
734}
735
736static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
737{
738 struct usbnet *dev = netdev_priv(net);
739
740 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
474} 741}
475 742
476/* We need to override some ethtool_ops so we require our 743/* We need to override some ethtool_ops so we require our
@@ -478,7 +745,8 @@ static int asix_set_settings(struct net_device *net, struct ethtool_cmd *cmd)
478 devices that may be connected at the same time. */ 745 devices that may be connected at the same time. */
479static struct ethtool_ops ax88172_ethtool_ops = { 746static struct ethtool_ops ax88172_ethtool_ops = {
480 .get_drvinfo = asix_get_drvinfo, 747 .get_drvinfo = asix_get_drvinfo,
481 .get_link = ethtool_op_get_link, 748 .get_link = asix_get_link,
749 .nway_reset = asix_nway_reset,
482 .get_msglevel = usbnet_get_msglevel, 750 .get_msglevel = usbnet_get_msglevel,
483 .set_msglevel = usbnet_set_msglevel, 751 .set_msglevel = usbnet_set_msglevel,
484 .get_wol = asix_get_wol, 752 .get_wol = asix_get_wol,
@@ -489,11 +757,66 @@ static struct ethtool_ops ax88172_ethtool_ops = {
489 .set_settings = asix_set_settings, 757 .set_settings = asix_set_settings,
490}; 758};
491 759
492static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd) 760static void ax88172_set_multicast(struct net_device *net)
493{ 761{
494 struct usbnet *dev = netdev_priv(net); 762 struct usbnet *dev = netdev_priv(net);
763 struct asix_data *data = (struct asix_data *)&dev->data;
764 u8 rx_ctl = 0x8c;
495 765
496 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); 766 if (net->flags & IFF_PROMISC) {
767 rx_ctl |= 0x01;
768 } else if (net->flags & IFF_ALLMULTI
769 || net->mc_count > AX_MAX_MCAST) {
770 rx_ctl |= 0x02;
771 } else if (net->mc_count == 0) {
772 /* just broadcast and directed */
773 } else {
774 /* We use the 20 byte dev->data
775 * for our 8 byte filter buffer
776 * to avoid allocating memory that
777 * is tricky to free later */
778 struct dev_mc_list *mc_list = net->mc_list;
779 u32 crc_bits;
780 int i;
781
782 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
783
784 /* Build the multicast hash filter. */
785 for (i = 0; i < net->mc_count; i++) {
786 crc_bits =
787 ether_crc(ETH_ALEN,
788 mc_list->dmi_addr) >> 26;
789 data->multi_filter[crc_bits >> 3] |=
790 1 << (crc_bits & 7);
791 mc_list = mc_list->next;
792 }
793
794 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
795 AX_MCAST_FILTER_SIZE, data->multi_filter);
796
797 rx_ctl |= 0x10;
798 }
799
800 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
801}
802
803static int ax88172_link_reset(struct usbnet *dev)
804{
805 u8 mode;
806 struct ethtool_cmd ecmd;
807
808 mii_check_media(&dev->mii, 1, 1);
809 mii_ethtool_gset(&dev->mii, &ecmd);
810 mode = AX88172_MEDIUM_DEFAULT;
811
812 if (ecmd.duplex != DUPLEX_FULL)
813 mode |= ~AX88172_MEDIUM_FD;
814
815 devdbg(dev, "ax88172_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode);
816
817 asix_write_medium_mode(dev, mode);
818
819 return 0;
497} 820}
498 821
499static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf) 822static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
@@ -502,6 +825,9 @@ static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
502 void *buf; 825 void *buf;
503 int i; 826 int i;
504 unsigned long gpio_bits = dev->driver_info->data; 827 unsigned long gpio_bits = dev->driver_info->data;
828 struct asix_data *data = (struct asix_data *)&dev->data;
829
830 data->eeprom_len = AX88172_EEPROM_LEN;
505 831
506 usbnet_get_endpoints(dev,intf); 832 usbnet_get_endpoints(dev,intf);
507 833
@@ -520,12 +846,12 @@ static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
520 msleep(5); 846 msleep(5);
521 } 847 }
522 848
523 if ((ret = asix_write_rx_ctl(dev,0x80)) < 0) 849 if ((ret = asix_write_rx_ctl(dev, 0x80)) < 0)
524 goto out2; 850 goto out2;
525 851
526 /* Get the MAC address */ 852 /* Get the MAC address */
527 memset(buf, 0, ETH_ALEN); 853 memset(buf, 0, ETH_ALEN);
528 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 854 if ((ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
529 0, 0, 6, buf)) < 0) { 855 0, 0, 6, buf)) < 0) {
530 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret); 856 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
531 goto out2; 857 goto out2;
@@ -538,14 +864,14 @@ static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
538 dev->mii.mdio_write = asix_mdio_write; 864 dev->mii.mdio_write = asix_mdio_write;
539 dev->mii.phy_id_mask = 0x3f; 865 dev->mii.phy_id_mask = 0x3f;
540 dev->mii.reg_num_mask = 0x1f; 866 dev->mii.reg_num_mask = 0x1f;
541 dev->mii.phy_id = asix_get_phyid(dev); 867 dev->mii.phy_id = asix_get_phy_addr(dev);
542 dev->net->do_ioctl = asix_ioctl; 868 dev->net->do_ioctl = asix_ioctl;
543 869
544 dev->net->set_multicast_list = asix_set_multicast; 870 dev->net->set_multicast_list = ax88172_set_multicast;
545 dev->net->ethtool_ops = &ax88172_ethtool_ops; 871 dev->net->ethtool_ops = &ax88172_ethtool_ops;
546 872
547 asix_mdio_write_le(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); 873 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
548 asix_mdio_write_le(dev->net, dev->mii.phy_id, MII_ADVERTISE, 874 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
549 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); 875 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
550 mii_nway_restart(&dev->mii); 876 mii_nway_restart(&dev->mii);
551 877
@@ -558,7 +884,8 @@ out1:
558 884
559static struct ethtool_ops ax88772_ethtool_ops = { 885static struct ethtool_ops ax88772_ethtool_ops = {
560 .get_drvinfo = asix_get_drvinfo, 886 .get_drvinfo = asix_get_drvinfo,
561 .get_link = ethtool_op_get_link, 887 .get_link = asix_get_link,
888 .nway_reset = asix_nway_reset,
562 .get_msglevel = usbnet_get_msglevel, 889 .get_msglevel = usbnet_get_msglevel,
563 .set_msglevel = usbnet_set_msglevel, 890 .set_msglevel = usbnet_set_msglevel,
564 .get_wol = asix_get_wol, 891 .get_wol = asix_get_wol,
@@ -569,10 +896,37 @@ static struct ethtool_ops ax88772_ethtool_ops = {
569 .set_settings = asix_set_settings, 896 .set_settings = asix_set_settings,
570}; 897};
571 898
899static int ax88772_link_reset(struct usbnet *dev)
900{
901 u16 mode;
902 struct ethtool_cmd ecmd;
903
904 mii_check_media(&dev->mii, 1, 1);
905 mii_ethtool_gset(&dev->mii, &ecmd);
906 mode = AX88772_MEDIUM_DEFAULT;
907
908 if (ecmd.speed != SPEED_100)
909 mode &= ~AX_MEDIUM_PS;
910
911 if (ecmd.duplex != DUPLEX_FULL)
912 mode &= ~AX_MEDIUM_FD;
913
914 devdbg(dev, "ax88772_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode);
915
916 asix_write_medium_mode(dev, mode);
917
918 return 0;
919}
920
572static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) 921static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
573{ 922{
574 int ret; 923 int ret;
575 void *buf; 924 void *buf;
925 u16 rx_ctl;
926 struct asix_data *data = (struct asix_data *)&dev->data;
927 u32 phyid;
928
929 data->eeprom_len = AX88772_EEPROM_LEN;
576 930
577 usbnet_get_endpoints(dev,intf); 931 usbnet_get_endpoints(dev,intf);
578 932
@@ -583,13 +937,12 @@ static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
583 goto out1; 937 goto out1;
584 } 938 }
585 939
586 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, 940 if ((ret = asix_write_gpio(dev,
587 0x00B0, 0, 0, buf)) < 0) 941 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5)) < 0)
588 goto out2; 942 goto out2;
589 943
590 msleep(5);
591 if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 944 if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
592 0x0001, 0, 0, buf)) < 0) { 945 0x0000, 0, 0, buf)) < 0) {
593 dbg("Select PHY #1 failed: %d", ret); 946 dbg("Select PHY #1 failed: %d", ret);
594 goto out2; 947 goto out2;
595 } 948 }
@@ -606,36 +959,34 @@ static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
606 goto out2; 959 goto out2;
607 960
608 msleep(150); 961 msleep(150);
609 if ((ret = asix_write_rx_ctl(dev, 0x00)) < 0) 962 rx_ctl = asix_read_rx_ctl(dev);
963 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
964 if ((ret = asix_write_rx_ctl(dev, 0x0000)) < 0)
610 goto out2; 965 goto out2;
611 966
967 rx_ctl = asix_read_rx_ctl(dev);
968 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
969
612 /* Get the MAC address */ 970 /* Get the MAC address */
613 memset(buf, 0, ETH_ALEN); 971 memset(buf, 0, ETH_ALEN);
614 if ((ret = asix_read_cmd(dev, AX88772_CMD_READ_NODE_ID, 972 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
615 0, 0, ETH_ALEN, buf)) < 0) { 973 0, 0, ETH_ALEN, buf)) < 0) {
616 dbg("Failed to read MAC address: %d", ret); 974 dbg("Failed to read MAC address: %d", ret);
617 goto out2; 975 goto out2;
618 } 976 }
619 memcpy(dev->net->dev_addr, buf, ETH_ALEN); 977 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
620 978
621 if ((ret = asix_set_sw_mii(dev)) < 0)
622 goto out2;
623
624 if (((ret = asix_read_cmd(dev, AX_CMD_READ_MII_REG,
625 0x0010, 2, 2, buf)) < 0)
626 || (*((u16 *)buf) != 0x003b)) {
627 dbg("Read PHY register 2 must be 0x3b00: %d", ret);
628 goto out2;
629 }
630
631 /* Initialize MII structure */ 979 /* Initialize MII structure */
632 dev->mii.dev = dev->net; 980 dev->mii.dev = dev->net;
633 dev->mii.mdio_read = asix_mdio_read; 981 dev->mii.mdio_read = asix_mdio_read;
634 dev->mii.mdio_write = asix_mdio_write; 982 dev->mii.mdio_write = asix_mdio_write;
635 dev->mii.phy_id_mask = 0xff; 983 dev->mii.phy_id_mask = 0x1f;
636 dev->mii.reg_num_mask = 0xff; 984 dev->mii.reg_num_mask = 0x1f;
637 dev->net->do_ioctl = asix_ioctl; 985 dev->net->do_ioctl = asix_ioctl;
638 dev->mii.phy_id = asix_get_phyid(dev); 986 dev->mii.phy_id = asix_get_phy_addr(dev);
987
988 phyid = asix_get_phyid(dev);
989 dbg("PHYID=0x%08x", phyid);
639 990
640 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0) 991 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0)
641 goto out2; 992 goto out2;
@@ -650,16 +1001,13 @@ static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
650 dev->net->set_multicast_list = asix_set_multicast; 1001 dev->net->set_multicast_list = asix_set_multicast;
651 dev->net->ethtool_ops = &ax88772_ethtool_ops; 1002 dev->net->ethtool_ops = &ax88772_ethtool_ops;
652 1003
653 asix_mdio_write_le(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); 1004 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
654 asix_mdio_write_le(dev->net, dev->mii.phy_id, MII_ADVERTISE, 1005 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
655 ADVERTISE_ALL | ADVERTISE_CSMA); 1006 ADVERTISE_ALL | ADVERTISE_CSMA);
656 mii_nway_restart(&dev->mii); 1007 mii_nway_restart(&dev->mii);
657 1008
658 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, 1009 if ((ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT)) < 0)
659 AX88772_MEDIUM_DEFAULT, 0, 0, buf)) < 0) {
660 dbg("Write medium mode register: %d", ret);
661 goto out2; 1010 goto out2;
662 }
663 1011
664 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0, 1012 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
665 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT, 1013 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
@@ -667,13 +1015,17 @@ static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
667 dbg("Write IPG,IPG1,IPG2 failed: %d", ret); 1015 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
668 goto out2; 1016 goto out2;
669 } 1017 }
670 if ((ret = asix_set_hw_mii(dev)) < 0)
671 goto out2;
672 1018
673 /* Set RX_CTL to default values with 2k buffer, and enable cactus */ 1019 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
674 if ((ret = asix_write_rx_ctl(dev, 0x0088)) < 0) 1020 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
675 goto out2; 1021 goto out2;
676 1022
1023 rx_ctl = asix_read_rx_ctl(dev);
1024 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1025
1026 rx_ctl = asix_read_medium_status(dev);
1027 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1028
677 kfree(buf); 1029 kfree(buf);
678 1030
679 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ 1031 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
@@ -691,120 +1043,285 @@ out1:
691 return ret; 1043 return ret;
692} 1044}
693 1045
694static int ax88772_rx_fixup(struct usbnet *dev, struct sk_buff *skb) 1046static struct ethtool_ops ax88178_ethtool_ops = {
1047 .get_drvinfo = asix_get_drvinfo,
1048 .get_link = asix_get_link,
1049 .nway_reset = asix_nway_reset,
1050 .get_msglevel = usbnet_get_msglevel,
1051 .set_msglevel = usbnet_set_msglevel,
1052 .get_wol = asix_get_wol,
1053 .set_wol = asix_set_wol,
1054 .get_eeprom_len = asix_get_eeprom_len,
1055 .get_eeprom = asix_get_eeprom,
1056 .get_settings = asix_get_settings,
1057 .set_settings = asix_set_settings,
1058};
1059
1060static int marvell_phy_init(struct usbnet *dev)
695{ 1061{
696 u8 *head; 1062 struct asix_data *data = (struct asix_data *)&dev->data;
697 u32 header; 1063 u16 reg;
698 char *packet;
699 struct sk_buff *ax_skb;
700 u16 size;
701 1064
702 head = (u8 *) skb->data; 1065 devdbg(dev,"marvell_phy_init()");
703 memcpy(&header, head, sizeof(header));
704 le32_to_cpus(&header);
705 packet = head + sizeof(header);
706 1066
707 skb_pull(skb, 4); 1067 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1068 devdbg(dev,"MII_MARVELL_STATUS = 0x%04x", reg);
708 1069
709 while (skb->len > 0) { 1070 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
710 if ((short)(header & 0x0000ffff) != 1071 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
711 ~((short)((header & 0xffff0000) >> 16))) {
712 devdbg(dev,"header length data is error");
713 }
714 /* get the packet length */
715 size = (u16) (header & 0x0000ffff);
716 1072
717 if ((skb->len) - ((size + 1) & 0xfffe) == 0) 1073 if (data->ledmode) {
718 return 2; 1074 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
719 if (size > ETH_FRAME_LEN) { 1075 MII_MARVELL_LED_CTRL);
720 devdbg(dev,"invalid rx length %d", size); 1076 devdbg(dev,"MII_MARVELL_LED_CTRL (1) = 0x%04x", reg);
721 return 0;
722 }
723 ax_skb = skb_clone(skb, GFP_ATOMIC);
724 if (ax_skb) {
725 ax_skb->len = size;
726 ax_skb->data = packet;
727 ax_skb->tail = packet + size;
728 usbnet_skb_return(dev, ax_skb);
729 } else {
730 return 0;
731 }
732 1077
733 skb_pull(skb, (size + 1) & 0xfffe); 1078 reg &= 0xf8ff;
1079 reg |= (1 + 0x0100);
1080 asix_mdio_write(dev->net, dev->mii.phy_id,
1081 MII_MARVELL_LED_CTRL, reg);
734 1082
735 if (skb->len == 0) 1083 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
736 break; 1084 MII_MARVELL_LED_CTRL);
1085 devdbg(dev,"MII_MARVELL_LED_CTRL (2) = 0x%04x", reg);
1086 reg &= 0xfc0f;
1087 }
737 1088
738 head = (u8 *) skb->data; 1089 return 0;
739 memcpy(&header, head, sizeof(header)); 1090}
740 le32_to_cpus(&header); 1091
741 packet = head + sizeof(header); 1092static int marvell_led_status(struct usbnet *dev, u16 speed)
742 skb_pull(skb, 4); 1093{
1094 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1095
1096 devdbg(dev, "marvell_led_status() read 0x%04x", reg);
1097
1098 /* Clear out the center LED bits - 0x03F0 */
1099 reg &= 0xfc0f;
1100
1101 switch (speed) {
1102 case SPEED_1000:
1103 reg |= 0x03e0;
1104 break;
1105 case SPEED_100:
1106 reg |= 0x03b0;
1107 break;
1108 default:
1109 reg |= 0x02f0;
743 } 1110 }
744 1111
745 if (skb->len < 0) { 1112 devdbg(dev, "marvell_led_status() writing 0x%04x", reg);
746 devdbg(dev,"invalid rx length %d", skb->len); 1113 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
747 return 0; 1114
1115 return 0;
1116}
1117
1118static int ax88178_link_reset(struct usbnet *dev)
1119{
1120 u16 mode;
1121 struct ethtool_cmd ecmd;
1122 struct asix_data *data = (struct asix_data *)&dev->data;
1123
1124 devdbg(dev,"ax88178_link_reset()");
1125
1126 mii_check_media(&dev->mii, 1, 1);
1127 mii_ethtool_gset(&dev->mii, &ecmd);
1128 mode = AX88178_MEDIUM_DEFAULT;
1129
1130 if (ecmd.speed == SPEED_1000)
1131 mode |= AX_MEDIUM_GM | AX_MEDIUM_ENCK;
1132 else if (ecmd.speed == SPEED_100)
1133 mode |= AX_MEDIUM_PS;
1134 else
1135 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1136
1137 if (ecmd.duplex == DUPLEX_FULL)
1138 mode |= AX_MEDIUM_FD;
1139 else
1140 mode &= ~AX_MEDIUM_FD;
1141
1142 devdbg(dev, "ax88178_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode);
1143
1144 asix_write_medium_mode(dev, mode);
1145
1146 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1147 marvell_led_status(dev, ecmd.speed);
1148
1149 return 0;
1150}
1151
1152static void ax88178_set_mfb(struct usbnet *dev)
1153{
1154 u16 mfb = AX_RX_CTL_MFB_16384;
1155 u16 rxctl;
1156 u16 medium;
1157 int old_rx_urb_size = dev->rx_urb_size;
1158
1159 if (dev->hard_mtu < 2048) {
1160 dev->rx_urb_size = 2048;
1161 mfb = AX_RX_CTL_MFB_2048;
1162 } else if (dev->hard_mtu < 4096) {
1163 dev->rx_urb_size = 4096;
1164 mfb = AX_RX_CTL_MFB_4096;
1165 } else if (dev->hard_mtu < 8192) {
1166 dev->rx_urb_size = 8192;
1167 mfb = AX_RX_CTL_MFB_8192;
1168 } else if (dev->hard_mtu < 16384) {
1169 dev->rx_urb_size = 16384;
1170 mfb = AX_RX_CTL_MFB_16384;
748 } 1171 }
749 return 1; 1172
1173 rxctl = asix_read_rx_ctl(dev);
1174 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1175
1176 medium = asix_read_medium_status(dev);
1177 if (dev->net->mtu > 1500)
1178 medium |= AX_MEDIUM_JFE;
1179 else
1180 medium &= ~AX_MEDIUM_JFE;
1181 asix_write_medium_mode(dev, medium);
1182
1183 if (dev->rx_urb_size > old_rx_urb_size)
1184 usbnet_unlink_rx_urbs(dev);
750} 1185}
751 1186
752static struct sk_buff *ax88772_tx_fixup(struct usbnet *dev, struct sk_buff *skb, 1187static int ax88178_change_mtu(struct net_device *net, int new_mtu)
753 gfp_t flags)
754{ 1188{
755 int padlen; 1189 struct usbnet *dev = netdev_priv(net);
756 int headroom = skb_headroom(skb); 1190 int ll_mtu = new_mtu + net->hard_header_len + 4;
757 int tailroom = skb_tailroom(skb);
758 u32 packet_len;
759 u32 padbytes = 0xffff0000;
760 1191
761 padlen = ((skb->len + 4) % 512) ? 0 : 4; 1192 devdbg(dev, "ax88178_change_mtu() new_mtu=%d", new_mtu);
762 1193
763 if ((!skb_cloned(skb)) 1194 if (new_mtu <= 0 || ll_mtu > 16384)
764 && ((headroom + tailroom) >= (4 + padlen))) { 1195 return -EINVAL;
765 if ((headroom < 4) || (tailroom < padlen)) { 1196
766 skb->data = memmove(skb->head + 4, skb->data, skb->len); 1197 if ((ll_mtu % dev->maxpacket) == 0)
767 skb->tail = skb->data + skb->len; 1198 return -EDOM;
768 } 1199
1200 net->mtu = new_mtu;
1201 dev->hard_mtu = net->mtu + net->hard_header_len;
1202 ax88178_set_mfb(dev);
1203
1204 return 0;
1205}
1206
1207static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1208{
1209 struct asix_data *data = (struct asix_data *)&dev->data;
1210 int ret;
1211 void *buf;
1212 u16 eeprom;
1213 int gpio0 = 0;
1214 u32 phyid;
1215
1216 usbnet_get_endpoints(dev,intf);
1217
1218 buf = kmalloc(6, GFP_KERNEL);
1219 if(!buf) {
1220 dbg ("Cannot allocate memory for buffer");
1221 ret = -ENOMEM;
1222 goto out1;
1223 }
1224
1225 eeprom = 0;
1226 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &eeprom);
1227 dbg("GPIO Status: 0x%04x", eeprom);
1228
1229 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1230 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1231 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1232
1233 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1234
1235 if (eeprom == 0xffff) {
1236 data->phymode = PHY_MODE_MARVELL;
1237 data->ledmode = 0;
1238 gpio0 = 1;
769 } else { 1239 } else {
770 struct sk_buff *skb2; 1240 data->phymode = eeprom & 7;
771 skb2 = skb_copy_expand(skb, 4, padlen, flags); 1241 data->ledmode = eeprom >> 8;
772 dev_kfree_skb_any(skb); 1242 gpio0 = (eeprom & 0x80) ? 0 : 1;
773 skb = skb2;
774 if (!skb)
775 return NULL;
776 } 1243 }
1244 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
777 1245
778 skb_push(skb, 4); 1246 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
779 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4); 1247 if ((eeprom >> 8) != 1) {
780 memcpy(skb->data, &packet_len, sizeof(packet_len)); 1248 asix_write_gpio(dev, 0x003c, 30);
1249 asix_write_gpio(dev, 0x001c, 300);
1250 asix_write_gpio(dev, 0x003c, 30);
1251 } else {
1252 dbg("gpio phymode == 1 path");
1253 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1254 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1255 }
781 1256
782 if ((skb->len % 512) == 0) { 1257 asix_sw_reset(dev, 0);
783 memcpy( skb->tail, &padbytes, sizeof(padbytes)); 1258 msleep(150);
784 skb_put(skb, sizeof(padbytes)); 1259
1260 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1261 msleep(150);
1262
1263 asix_write_rx_ctl(dev, 0);
1264
1265 /* Get the MAC address */
1266 memset(buf, 0, ETH_ALEN);
1267 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1268 0, 0, ETH_ALEN, buf)) < 0) {
1269 dbg("Failed to read MAC address: %d", ret);
1270 goto out2;
785 } 1271 }
786 return skb; 1272 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
787}
788 1273
789static int ax88772_link_reset(struct usbnet *dev) 1274 /* Initialize MII structure */
790{ 1275 dev->mii.dev = dev->net;
791 u16 lpa; 1276 dev->mii.mdio_read = asix_mdio_read;
792 u16 adv; 1277 dev->mii.mdio_write = asix_mdio_write;
793 u16 res; 1278 dev->mii.phy_id_mask = 0x1f;
794 u16 mode; 1279 dev->mii.reg_num_mask = 0xff;
1280 dev->mii.supports_gmii = 1;
1281 dev->net->do_ioctl = asix_ioctl;
1282 dev->mii.phy_id = asix_get_phy_addr(dev);
1283 dev->net->set_multicast_list = asix_set_multicast;
1284 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1285 dev->net->change_mtu = &ax88178_change_mtu;
795 1286
796 mode = AX88772_MEDIUM_DEFAULT; 1287 phyid = asix_get_phyid(dev);
797 lpa = asix_mdio_read_le(dev->net, dev->mii.phy_id, MII_LPA); 1288 dbg("PHYID=0x%08x", phyid);
798 adv = asix_mdio_read_le(dev->net, dev->mii.phy_id, MII_ADVERTISE); 1289
799 res = mii_nway_result(lpa|adv); 1290 if (data->phymode == PHY_MODE_MARVELL) {
1291 marvell_phy_init(dev);
1292 msleep(60);
1293 }
1294
1295 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1296 BMCR_RESET | BMCR_ANENABLE);
1297 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1298 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1299 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1300 ADVERTISE_1000FULL);
1301
1302 mii_nway_restart(&dev->mii);
1303
1304 if ((ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT)) < 0)
1305 goto out2;
800 1306
801 if ((res & LPA_DUPLEX) == 0) 1307 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
802 mode &= ~AX88772_MEDIUM_FULL_DUPLEX; 1308 goto out2;
803 if ((res & LPA_100) == 0) 1309
804 mode &= ~AX88772_MEDIUM_100MB; 1310 kfree(buf);
805 asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL); 1311
1312 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1313 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1314 /* hard_mtu is still the default - the device does not support
1315 jumbo eth frames */
1316 dev->rx_urb_size = 2048;
1317 }
806 1318
807 return 0; 1319 return 0;
1320
1321out2:
1322 kfree(buf);
1323out1:
1324 return ret;
808} 1325}
809 1326
810static const struct driver_info ax8817x_info = { 1327static const struct driver_info ax8817x_info = {
@@ -854,8 +1371,19 @@ static const struct driver_info ax88772_info = {
854 .link_reset = ax88772_link_reset, 1371 .link_reset = ax88772_link_reset,
855 .reset = ax88772_link_reset, 1372 .reset = ax88772_link_reset,
856 .flags = FLAG_ETHER | FLAG_FRAMING_AX, 1373 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
857 .rx_fixup = ax88772_rx_fixup, 1374 .rx_fixup = asix_rx_fixup,
858 .tx_fixup = ax88772_tx_fixup, 1375 .tx_fixup = asix_tx_fixup,
1376};
1377
1378static const struct driver_info ax88178_info = {
1379 .description = "ASIX AX88178 USB 2.0 Ethernet",
1380 .bind = ax88178_bind,
1381 .status = asix_status,
1382 .link_reset = ax88178_link_reset,
1383 .reset = ax88178_link_reset,
1384 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1385 .rx_fixup = asix_rx_fixup,
1386 .tx_fixup = asix_tx_fixup,
859}; 1387};
860 1388
861static const struct usb_device_id products [] = { 1389static const struct usb_device_id products [] = {
@@ -914,7 +1442,7 @@ static const struct usb_device_id products [] = {
914}, { 1442}, {
915 // ASIX AX88178 10/100/1000 1443 // ASIX AX88178 10/100/1000
916 USB_DEVICE (0x0b95, 0x1780), 1444 USB_DEVICE (0x0b95, 0x1780),
917 .driver_info = (unsigned long) &ax88772_info, 1445 .driver_info = (unsigned long) &ax88178_info,
918}, { 1446}, {
919 // Linksys USB200M Rev 2 1447 // Linksys USB200M Rev 2
920 USB_DEVICE (0x13b1, 0x0018), 1448 USB_DEVICE (0x13b1, 0x0018),
@@ -923,6 +1451,18 @@ static const struct usb_device_id products [] = {
923 // 0Q0 cable ethernet 1451 // 0Q0 cable ethernet
924 USB_DEVICE (0x1557, 0x7720), 1452 USB_DEVICE (0x1557, 0x7720),
925 .driver_info = (unsigned long) &ax88772_info, 1453 .driver_info = (unsigned long) &ax88772_info,
1454}, {
1455 // DLink DUB-E100 H/W Ver B1
1456 USB_DEVICE (0x07d1, 0x3c05),
1457 .driver_info = (unsigned long) &ax88772_info,
1458}, {
1459 // DLink DUB-E100 H/W Ver B1 Alternate
1460 USB_DEVICE (0x2001, 0x3c05),
1461 .driver_info = (unsigned long) &ax88772_info,
1462}, {
1463 // Linksys USB1000
1464 USB_DEVICE (0x1737, 0x0039),
1465 .driver_info = (unsigned long) &ax88178_info,
926}, 1466},
927 { }, // END 1467 { }, // END
928}; 1468};