diff options
Diffstat (limited to 'drivers/net/r8169.c')
| -rw-r--r-- | drivers/net/r8169.c | 122 |
1 files changed, 2 insertions, 120 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index b3473401c83..43fedb9eced 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
| @@ -81,9 +81,9 @@ static const int multicast_filter_limit = 32; | |||
| 81 | #define RTL8169_TX_TIMEOUT (6*HZ) | 81 | #define RTL8169_TX_TIMEOUT (6*HZ) |
| 82 | #define RTL8169_PHY_TIMEOUT (10*HZ) | 82 | #define RTL8169_PHY_TIMEOUT (10*HZ) |
| 83 | 83 | ||
| 84 | #define RTL_EEPROM_SIG 0x8129 | 84 | #define RTL_EEPROM_SIG cpu_to_le32(0x8129) |
| 85 | #define RTL_EEPROM_SIG_MASK cpu_to_le32(0xffff) | ||
| 85 | #define RTL_EEPROM_SIG_ADDR 0x0000 | 86 | #define RTL_EEPROM_SIG_ADDR 0x0000 |
| 86 | #define RTL_EEPROM_MAC_ADDR 0x0007 | ||
| 87 | 87 | ||
| 88 | /* write/read MMIO register */ | 88 | /* write/read MMIO register */ |
| 89 | #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg)) | 89 | #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg)) |
| @@ -293,11 +293,6 @@ enum rtl_register_content { | |||
| 293 | /* Cfg9346Bits */ | 293 | /* Cfg9346Bits */ |
| 294 | Cfg9346_Lock = 0x00, | 294 | Cfg9346_Lock = 0x00, |
| 295 | Cfg9346_Unlock = 0xc0, | 295 | Cfg9346_Unlock = 0xc0, |
| 296 | Cfg9346_Program = 0x80, /* Programming mode */ | ||
| 297 | Cfg9346_EECS = 0x08, /* Chip select */ | ||
| 298 | Cfg9346_EESK = 0x04, /* Serial data clock */ | ||
| 299 | Cfg9346_EEDI = 0x02, /* Data input */ | ||
| 300 | Cfg9346_EEDO = 0x01, /* Data output */ | ||
| 301 | 296 | ||
| 302 | /* rx_mode_bits */ | 297 | /* rx_mode_bits */ |
| 303 | AcceptErr = 0x20, | 298 | AcceptErr = 0x20, |
| @@ -310,7 +305,6 @@ enum rtl_register_content { | |||
| 310 | /* RxConfigBits */ | 305 | /* RxConfigBits */ |
| 311 | RxCfgFIFOShift = 13, | 306 | RxCfgFIFOShift = 13, |
| 312 | RxCfgDMAShift = 8, | 307 | RxCfgDMAShift = 8, |
| 313 | RxCfg9356SEL = 6, /* EEPROM type: 0 = 9346, 1 = 9356 */ | ||
| 314 | 308 | ||
| 315 | /* TxConfigBits */ | 309 | /* TxConfigBits */ |
| 316 | TxInterFrameGapShift = 24, | 310 | TxInterFrameGapShift = 24, |
| @@ -1969,108 +1963,6 @@ static const struct net_device_ops rtl8169_netdev_ops = { | |||
| 1969 | 1963 | ||
| 1970 | }; | 1964 | }; |
| 1971 | 1965 | ||
| 1972 | /* Delay between EEPROM clock transitions. Force out buffered PCI writes. */ | ||
| 1973 | #define RTL_EEPROM_DELAY() RTL_R8(Cfg9346) | ||
| 1974 | #define RTL_EEPROM_READ_CMD 6 | ||
| 1975 | |||
| 1976 | /* read 16bit word stored in EEPROM. EEPROM is addressed by words. */ | ||
| 1977 | static u16 rtl_eeprom_read(void __iomem *ioaddr, int addr) | ||
| 1978 | { | ||
| 1979 | u16 result = 0; | ||
| 1980 | int cmd, cmd_len, i; | ||
| 1981 | |||
| 1982 | /* check for EEPROM address size (in bits) */ | ||
| 1983 | if (RTL_R32(RxConfig) & (1 << RxCfg9356SEL)) { | ||
| 1984 | /* EEPROM is 93C56 */ | ||
| 1985 | cmd_len = 3 + 8; /* 3 bits for command id and 8 for address */ | ||
| 1986 | cmd = (RTL_EEPROM_READ_CMD << 8) | (addr & 0xff); | ||
| 1987 | } else { | ||
| 1988 | /* EEPROM is 93C46 */ | ||
| 1989 | cmd_len = 3 + 6; /* 3 bits for command id and 6 for address */ | ||
| 1990 | cmd = (RTL_EEPROM_READ_CMD << 6) | (addr & 0x3f); | ||
| 1991 | } | ||
| 1992 | |||
| 1993 | /* enter programming mode */ | ||
| 1994 | RTL_W8(Cfg9346, Cfg9346_Program | Cfg9346_EECS); | ||
| 1995 | RTL_EEPROM_DELAY(); | ||
| 1996 | |||
| 1997 | /* write command and requested address */ | ||
| 1998 | while (cmd_len--) { | ||
| 1999 | u8 x = Cfg9346_Program | Cfg9346_EECS; | ||
| 2000 | |||
| 2001 | x |= (cmd & (1 << cmd_len)) ? Cfg9346_EEDI : 0; | ||
| 2002 | |||
| 2003 | /* write a bit */ | ||
| 2004 | RTL_W8(Cfg9346, x); | ||
| 2005 | RTL_EEPROM_DELAY(); | ||
| 2006 | |||
| 2007 | /* raise clock */ | ||
| 2008 | RTL_W8(Cfg9346, x | Cfg9346_EESK); | ||
| 2009 | RTL_EEPROM_DELAY(); | ||
| 2010 | } | ||
| 2011 | |||
| 2012 | /* lower clock */ | ||
| 2013 | RTL_W8(Cfg9346, Cfg9346_Program | Cfg9346_EECS); | ||
| 2014 | RTL_EEPROM_DELAY(); | ||
| 2015 | |||
| 2016 | /* read back 16bit value */ | ||
| 2017 | for (i = 16; i > 0; i--) { | ||
| 2018 | /* raise clock */ | ||
| 2019 | RTL_W8(Cfg9346, Cfg9346_Program | Cfg9346_EECS | Cfg9346_EESK); | ||
| 2020 | RTL_EEPROM_DELAY(); | ||
| 2021 | |||
| 2022 | result <<= 1; | ||
| 2023 | result |= (RTL_R8(Cfg9346) & Cfg9346_EEDO) ? 1 : 0; | ||
| 2024 | |||
| 2025 | /* lower clock */ | ||
| 2026 | RTL_W8(Cfg9346, Cfg9346_Program | Cfg9346_EECS); | ||
| 2027 | RTL_EEPROM_DELAY(); | ||
| 2028 | } | ||
| 2029 | |||
| 2030 | RTL_W8(Cfg9346, Cfg9346_Program); | ||
| 2031 | /* leave programming mode */ | ||
| 2032 | RTL_W8(Cfg9346, Cfg9346_Lock); | ||
| 2033 | |||
| 2034 | return result; | ||
| 2035 | } | ||
| 2036 | |||
| 2037 | static void rtl_init_mac_address(struct rtl8169_private *tp, | ||
| 2038 | void __iomem *ioaddr) | ||
| 2039 | { | ||
| 2040 | struct pci_dev *pdev = tp->pci_dev; | ||
| 2041 | u16 x; | ||
| 2042 | u8 mac[8]; | ||
| 2043 | |||
| 2044 | /* read EEPROM signature */ | ||
| 2045 | x = rtl_eeprom_read(ioaddr, RTL_EEPROM_SIG_ADDR); | ||
| 2046 | |||
| 2047 | if (x != RTL_EEPROM_SIG) { | ||
| 2048 | dev_info(&pdev->dev, "Missing EEPROM signature: %04x\n", x); | ||
| 2049 | return; | ||
| 2050 | } | ||
| 2051 | |||
| 2052 | /* read MAC address */ | ||
| 2053 | x = rtl_eeprom_read(ioaddr, RTL_EEPROM_MAC_ADDR); | ||
| 2054 | mac[0] = x & 0xff; | ||
| 2055 | mac[1] = x >> 8; | ||
| 2056 | x = rtl_eeprom_read(ioaddr, RTL_EEPROM_MAC_ADDR + 1); | ||
| 2057 | mac[2] = x & 0xff; | ||
| 2058 | mac[3] = x >> 8; | ||
| 2059 | x = rtl_eeprom_read(ioaddr, RTL_EEPROM_MAC_ADDR + 2); | ||
| 2060 | mac[4] = x & 0xff; | ||
| 2061 | mac[5] = x >> 8; | ||
| 2062 | |||
| 2063 | if (netif_msg_probe(tp)) { | ||
| 2064 | DECLARE_MAC_BUF(buf); | ||
| 2065 | |||
| 2066 | dev_info(&pdev->dev, "MAC address found in EEPROM: %s\n", | ||
| 2067 | print_mac(buf, mac)); | ||
| 2068 | } | ||
| 2069 | |||
| 2070 | if (is_valid_ether_addr(mac)) | ||
| 2071 | rtl_rar_set(tp, mac); | ||
| 2072 | } | ||
| 2073 | |||
| 2074 | static int __devinit | 1966 | static int __devinit |
| 2075 | rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | 1967 | rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
| 2076 | { | 1968 | { |
| @@ -2249,8 +2141,6 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
| 2249 | 2141 | ||
| 2250 | tp->mmio_addr = ioaddr; | 2142 | tp->mmio_addr = ioaddr; |
| 2251 | 2143 | ||
| 2252 | rtl_init_mac_address(tp, ioaddr); | ||
| 2253 | |||
| 2254 | /* Get MAC address */ | 2144 | /* Get MAC address */ |
| 2255 | for (i = 0; i < MAC_ADDR_LEN; i++) | 2145 | for (i = 0; i < MAC_ADDR_LEN; i++) |
| 2256 | dev->dev_addr[i] = RTL_R8(MAC0 + i); | 2146 | dev->dev_addr[i] = RTL_R8(MAC0 + i); |
| @@ -3363,13 +3253,6 @@ static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
| 3363 | opts1 |= FirstFrag; | 3253 | opts1 |= FirstFrag; |
| 3364 | } else { | 3254 | } else { |
| 3365 | len = skb->len; | 3255 | len = skb->len; |
| 3366 | |||
| 3367 | if (unlikely(len < ETH_ZLEN)) { | ||
| 3368 | if (skb_padto(skb, ETH_ZLEN)) | ||
| 3369 | goto err_update_stats; | ||
| 3370 | len = ETH_ZLEN; | ||
| 3371 | } | ||
| 3372 | |||
| 3373 | opts1 |= FirstFrag | LastFrag; | 3256 | opts1 |= FirstFrag | LastFrag; |
| 3374 | tp->tx_skb[entry].skb = skb; | 3257 | tp->tx_skb[entry].skb = skb; |
| 3375 | } | 3258 | } |
| @@ -3407,7 +3290,6 @@ out: | |||
| 3407 | err_stop: | 3290 | err_stop: |
| 3408 | netif_stop_queue(dev); | 3291 | netif_stop_queue(dev); |
| 3409 | ret = NETDEV_TX_BUSY; | 3292 | ret = NETDEV_TX_BUSY; |
| 3410 | err_update_stats: | ||
| 3411 | dev->stats.tx_dropped++; | 3293 | dev->stats.tx_dropped++; |
| 3412 | goto out; | 3294 | goto out; |
| 3413 | } | 3295 | } |
