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-rw-r--r--drivers/net/amd8111e.c492
1 files changed, 245 insertions, 247 deletions
diff --git a/drivers/net/amd8111e.c b/drivers/net/amd8111e.c
index d9ba8be72af..28855a01ed7 100644
--- a/drivers/net/amd8111e.c
+++ b/drivers/net/amd8111e.c
@@ -1,8 +1,8 @@
1 1
2/* Advanced Micro Devices Inc. AMD8111E Linux Network Driver 2/* Advanced Micro Devices Inc. AMD8111E Linux Network Driver
3 * Copyright (C) 2004 Advanced Micro Devices 3 * Copyright (C) 2004 Advanced Micro Devices
4 *
4 * 5 *
5 *
6 * Copyright 2001,2002 Jeff Garzik <jgarzik@mandrakesoft.com> [ 8139cp.c,tg3.c ] 6 * Copyright 2001,2002 Jeff Garzik <jgarzik@mandrakesoft.com> [ 8139cp.c,tg3.c ]
7 * Copyright (C) 2001, 2002 David S. Miller (davem@redhat.com)[ tg3.c] 7 * Copyright (C) 2001, 2002 David S. Miller (davem@redhat.com)[ tg3.c]
8 * Copyright 1996-1999 Thomas Bogendoerfer [ pcnet32.c ] 8 * Copyright 1996-1999 Thomas Bogendoerfer [ pcnet32.c ]
@@ -12,7 +12,7 @@
12 * Carsten Langgaard, carstenl@mips.com [ pcnet32.c ] 12 * Carsten Langgaard, carstenl@mips.com [ pcnet32.c ]
13 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. 13 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
14 * 14 *
15 * 15 *
16 * This program is free software; you can redistribute it and/or modify 16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by 17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or 18 * the Free Software Foundation; either version 2 of the License, or
@@ -25,16 +25,16 @@
25 * 25 *
26 * You should have received a copy of the GNU General Public License 26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software 27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
29 * USA 29 * USA
30 30
31Module Name: 31Module Name:
32 32
33 amd8111e.c 33 amd8111e.c
34 34
35Abstract: 35Abstract:
36 36
37 AMD8111 based 10/100 Ethernet Controller Driver. 37 AMD8111 based 10/100 Ethernet Controller Driver.
38 38
39Environment: 39Environment:
40 40
@@ -58,18 +58,17 @@ Revision History:
58 3.0.4 12/09/2003 58 3.0.4 12/09/2003
59 1. Added set_mac_address routine for bonding driver support. 59 1. Added set_mac_address routine for bonding driver support.
60 2. Tested the driver for bonding support 60 2. Tested the driver for bonding support
61 3. Bug fix: Fixed mismach in actual receive buffer lenth and lenth 61 3. Bug fix: Fixed mismach in actual receive buffer lenth and lenth
62 indicated to the h/w. 62 indicated to the h/w.
63 4. Modified amd8111e_rx() routine to receive all the received packets 63 4. Modified amd8111e_rx() routine to receive all the received packets
64 in the first interrupt. 64 in the first interrupt.
65 5. Bug fix: Corrected rx_errors reported in get_stats() function. 65 5. Bug fix: Corrected rx_errors reported in get_stats() function.
66 3.0.5 03/22/2004 66 3.0.5 03/22/2004
67 1. Added NAPI support 67 1. Added NAPI support
68 68
69*/ 69*/
70 70
71 71
72#include <linux/config.h>
73#include <linux/module.h> 72#include <linux/module.h>
74#include <linux/kernel.h> 73#include <linux/kernel.h>
75#include <linux/types.h> 74#include <linux/types.h>
@@ -85,7 +84,7 @@ Revision History:
85#include <linux/ethtool.h> 84#include <linux/ethtool.h>
86#include <linux/mii.h> 85#include <linux/mii.h>
87#include <linux/if_vlan.h> 86#include <linux/if_vlan.h>
88#include <linux/ctype.h> 87#include <linux/ctype.h>
89#include <linux/crc32.h> 88#include <linux/crc32.h>
90#include <linux/dma-mapping.h> 89#include <linux/dma-mapping.h>
91 90
@@ -102,9 +101,9 @@ Revision History:
102 101
103#include "amd8111e.h" 102#include "amd8111e.h"
104#define MODULE_NAME "amd8111e" 103#define MODULE_NAME "amd8111e"
105#define MODULE_VERS "3.0.5" 104#define MODULE_VERS "3.0.6"
106MODULE_AUTHOR("Advanced Micro Devices, Inc."); 105MODULE_AUTHOR("Advanced Micro Devices, Inc.");
107MODULE_DESCRIPTION ("AMD8111 based 10/100 Ethernet Controller. Driver Version 3.0.3"); 106MODULE_DESCRIPTION ("AMD8111 based 10/100 Ethernet Controller. Driver Version 3.0.6");
108MODULE_LICENSE("GPL"); 107MODULE_LICENSE("GPL");
109MODULE_DEVICE_TABLE(pci, amd8111e_pci_tbl); 108MODULE_DEVICE_TABLE(pci, amd8111e_pci_tbl);
110module_param_array(speed_duplex, int, NULL, 0); 109module_param_array(speed_duplex, int, NULL, 0);
@@ -115,13 +114,13 @@ module_param_array(dynamic_ipg, bool, NULL, 0);
115MODULE_PARM_DESC(dynamic_ipg, "Enable or Disable dynamic IPG, 1: Enable, 0: Disable"); 114MODULE_PARM_DESC(dynamic_ipg, "Enable or Disable dynamic IPG, 1: Enable, 0: Disable");
116 115
117static struct pci_device_id amd8111e_pci_tbl[] = { 116static struct pci_device_id amd8111e_pci_tbl[] = {
118 117
119 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD8111E_7462, 118 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD8111E_7462,
120 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 119 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
121 { 0, } 120 { 0, }
122 121
123}; 122};
124/* 123/*
125This function will read the PHY registers. 124This function will read the PHY registers.
126*/ 125*/
127static int amd8111e_read_phy(struct amd8111e_priv* lp, int phy_id, int reg, u32* val) 126static int amd8111e_read_phy(struct amd8111e_priv* lp, int phy_id, int reg, u32* val)
@@ -142,17 +141,17 @@ static int amd8111e_read_phy(struct amd8111e_priv* lp, int phy_id, int reg, u32*
142 } while (--repeat && (reg_val & PHY_CMD_ACTIVE)); 141 } while (--repeat && (reg_val & PHY_CMD_ACTIVE));
143 if(reg_val & PHY_RD_ERR) 142 if(reg_val & PHY_RD_ERR)
144 goto err_phy_read; 143 goto err_phy_read;
145 144
146 *val = reg_val & 0xffff; 145 *val = reg_val & 0xffff;
147 return 0; 146 return 0;
148err_phy_read: 147err_phy_read:
149 *val = 0; 148 *val = 0;
150 return -EINVAL; 149 return -EINVAL;
151 150
152} 151}
153 152
154/* 153/*
155This function will write into PHY registers. 154This function will write into PHY registers.
156*/ 155*/
157static int amd8111e_write_phy(struct amd8111e_priv* lp,int phy_id, int reg, u32 val) 156static int amd8111e_write_phy(struct amd8111e_priv* lp,int phy_id, int reg, u32 val)
158{ 157{
@@ -171,19 +170,19 @@ static int amd8111e_write_phy(struct amd8111e_priv* lp,int phy_id, int reg, u32
171 reg_val = readl(mmio + PHY_ACCESS); 170 reg_val = readl(mmio + PHY_ACCESS);
172 udelay(30); /* It takes 30 us to read/write the data */ 171 udelay(30); /* It takes 30 us to read/write the data */
173 } while (--repeat && (reg_val & PHY_CMD_ACTIVE)); 172 } while (--repeat && (reg_val & PHY_CMD_ACTIVE));
174 173
175 if(reg_val & PHY_RD_ERR) 174 if(reg_val & PHY_RD_ERR)
176 goto err_phy_write; 175 goto err_phy_write;
177 176
178 return 0; 177 return 0;
179 178
180err_phy_write: 179err_phy_write:
181 return -EINVAL; 180 return -EINVAL;
182 181
183} 182}
184/* 183/*
185This is the mii register read function provided to the mii interface. 184This is the mii register read function provided to the mii interface.
186*/ 185*/
187static int amd8111e_mdio_read(struct net_device * dev, int phy_id, int reg_num) 186static int amd8111e_mdio_read(struct net_device * dev, int phy_id, int reg_num)
188{ 187{
189 struct amd8111e_priv* lp = netdev_priv(dev); 188 struct amd8111e_priv* lp = netdev_priv(dev);
@@ -191,12 +190,12 @@ static int amd8111e_mdio_read(struct net_device * dev, int phy_id, int reg_num)
191 190
192 amd8111e_read_phy(lp,phy_id,reg_num,&reg_val); 191 amd8111e_read_phy(lp,phy_id,reg_num,&reg_val);
193 return reg_val; 192 return reg_val;
194 193
195} 194}
196 195
197/* 196/*
198This is the mii register write function provided to the mii interface. 197This is the mii register write function provided to the mii interface.
199*/ 198*/
200static void amd8111e_mdio_write(struct net_device * dev, int phy_id, int reg_num, int val) 199static void amd8111e_mdio_write(struct net_device * dev, int phy_id, int reg_num, int val)
201{ 200{
202 struct amd8111e_priv* lp = netdev_priv(dev); 201 struct amd8111e_priv* lp = netdev_priv(dev);
@@ -211,7 +210,7 @@ static void amd8111e_set_ext_phy(struct net_device *dev)
211{ 210{
212 struct amd8111e_priv *lp = netdev_priv(dev); 211 struct amd8111e_priv *lp = netdev_priv(dev);
213 u32 bmcr,advert,tmp; 212 u32 bmcr,advert,tmp;
214 213
215 /* Determine mii register values to set the speed */ 214 /* Determine mii register values to set the speed */
216 advert = amd8111e_mdio_read(dev, lp->ext_phy_addr, MII_ADVERTISE); 215 advert = amd8111e_mdio_read(dev, lp->ext_phy_addr, MII_ADVERTISE);
217 tmp = advert & ~(ADVERTISE_ALL | ADVERTISE_100BASE4); 216 tmp = advert & ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
@@ -228,7 +227,7 @@ static void amd8111e_set_ext_phy(struct net_device *dev)
228 case SPEED10_FULL: 227 case SPEED10_FULL:
229 tmp |= ADVERTISE_10FULL; 228 tmp |= ADVERTISE_10FULL;
230 break; 229 break;
231 case SPEED100_HALF: 230 case SPEED100_HALF:
232 tmp |= ADVERTISE_100HALF; 231 tmp |= ADVERTISE_100HALF;
233 break; 232 break;
234 case SPEED100_FULL: 233 case SPEED100_FULL:
@@ -245,8 +244,8 @@ static void amd8111e_set_ext_phy(struct net_device *dev)
245 244
246} 245}
247 246
248/* 247/*
249This function will unmap skb->data space and will free 248This function will unmap skb->data space and will free
250all transmit and receive skbuffs. 249all transmit and receive skbuffs.
251*/ 250*/
252static int amd8111e_free_skbs(struct net_device *dev) 251static int amd8111e_free_skbs(struct net_device *dev)
@@ -275,7 +274,7 @@ static int amd8111e_free_skbs(struct net_device *dev)
275 lp->rx_dma_addr[i] = 0; 274 lp->rx_dma_addr[i] = 0;
276 } 275 }
277 } 276 }
278 277
279 return 0; 278 return 0;
280} 279}
281 280
@@ -286,7 +285,7 @@ static inline void amd8111e_set_rx_buff_len(struct net_device* dev)
286{ 285{
287 struct amd8111e_priv* lp = netdev_priv(dev); 286 struct amd8111e_priv* lp = netdev_priv(dev);
288 unsigned int mtu = dev->mtu; 287 unsigned int mtu = dev->mtu;
289 288
290 if (mtu > ETH_DATA_LEN){ 289 if (mtu > ETH_DATA_LEN){
291 /* MTU + ethernet header + FCS 290 /* MTU + ethernet header + FCS
292 + optional VLAN tag + skb reserve space 2 */ 291 + optional VLAN tag + skb reserve space 2 */
@@ -299,7 +298,7 @@ static inline void amd8111e_set_rx_buff_len(struct net_device* dev)
299 } 298 }
300} 299}
301 300
302/* 301/*
303This function will free all the previously allocated buffers, determine new receive buffer length and will allocate new receive buffers. This function also allocates and initializes both the transmitter and receive hardware descriptors. 302This function will free all the previously allocated buffers, determine new receive buffer length and will allocate new receive buffers. This function also allocates and initializes both the transmitter and receive hardware descriptors.
304 */ 303 */
305static int amd8111e_init_ring(struct net_device *dev) 304static int amd8111e_init_ring(struct net_device *dev)
@@ -310,24 +309,24 @@ static int amd8111e_init_ring(struct net_device *dev)
310 lp->rx_idx = lp->tx_idx = 0; 309 lp->rx_idx = lp->tx_idx = 0;
311 lp->tx_complete_idx = 0; 310 lp->tx_complete_idx = 0;
312 lp->tx_ring_idx = 0; 311 lp->tx_ring_idx = 0;
313 312
314 313
315 if(lp->opened) 314 if(lp->opened)
316 /* Free previously allocated transmit and receive skbs */ 315 /* Free previously allocated transmit and receive skbs */
317 amd8111e_free_skbs(dev); 316 amd8111e_free_skbs(dev);
318 317
319 else{ 318 else{
320 /* allocate the tx and rx descriptors */ 319 /* allocate the tx and rx descriptors */
321 if((lp->tx_ring = pci_alloc_consistent(lp->pci_dev, 320 if((lp->tx_ring = pci_alloc_consistent(lp->pci_dev,
322 sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR, 321 sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR,
323 &lp->tx_ring_dma_addr)) == NULL) 322 &lp->tx_ring_dma_addr)) == NULL)
324 323
325 goto err_no_mem; 324 goto err_no_mem;
326 325
327 if((lp->rx_ring = pci_alloc_consistent(lp->pci_dev, 326 if((lp->rx_ring = pci_alloc_consistent(lp->pci_dev,
328 sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR, 327 sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR,
329 &lp->rx_ring_dma_addr)) == NULL) 328 &lp->rx_ring_dma_addr)) == NULL)
330 329
331 goto err_free_tx_ring; 330 goto err_free_tx_ring;
332 331
333 } 332 }
@@ -347,7 +346,7 @@ static int amd8111e_init_ring(struct net_device *dev)
347 } 346 }
348 /* Initilaizing receive descriptors */ 347 /* Initilaizing receive descriptors */
349 for (i = 0; i < NUM_RX_BUFFERS; i++) { 348 for (i = 0; i < NUM_RX_BUFFERS; i++) {
350 lp->rx_dma_addr[i] = pci_map_single(lp->pci_dev, 349 lp->rx_dma_addr[i] = pci_map_single(lp->pci_dev,
351 lp->rx_skbuff[i]->data,lp->rx_buff_len-2, PCI_DMA_FROMDEVICE); 350 lp->rx_skbuff[i]->data,lp->rx_buff_len-2, PCI_DMA_FROMDEVICE);
352 351
353 lp->rx_ring[i].buff_phy_addr = cpu_to_le32(lp->rx_dma_addr[i]); 352 lp->rx_ring[i].buff_phy_addr = cpu_to_le32(lp->rx_dma_addr[i]);
@@ -366,15 +365,15 @@ static int amd8111e_init_ring(struct net_device *dev)
366 return 0; 365 return 0;
367 366
368err_free_rx_ring: 367err_free_rx_ring:
369 368
370 pci_free_consistent(lp->pci_dev, 369 pci_free_consistent(lp->pci_dev,
371 sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR,lp->rx_ring, 370 sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR,lp->rx_ring,
372 lp->rx_ring_dma_addr); 371 lp->rx_ring_dma_addr);
373 372
374err_free_tx_ring: 373err_free_tx_ring:
375 374
376 pci_free_consistent(lp->pci_dev, 375 pci_free_consistent(lp->pci_dev,
377 sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR,lp->tx_ring, 376 sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR,lp->tx_ring,
378 lp->tx_ring_dma_addr); 377 lp->tx_ring_dma_addr);
379 378
380err_no_mem: 379err_no_mem:
@@ -396,11 +395,11 @@ static int amd8111e_set_coalesce(struct net_device * dev, enum coal_mode cmod)
396 case RX_INTR_COAL : 395 case RX_INTR_COAL :
397 timeout = coal_conf->rx_timeout; 396 timeout = coal_conf->rx_timeout;
398 event_count = coal_conf->rx_event_count; 397 event_count = coal_conf->rx_event_count;
399 if( timeout > MAX_TIMEOUT || 398 if( timeout > MAX_TIMEOUT ||
400 event_count > MAX_EVENT_COUNT ) 399 event_count > MAX_EVENT_COUNT )
401 return -EINVAL; 400 return -EINVAL;
402 401
403 timeout = timeout * DELAY_TIMER_CONV; 402 timeout = timeout * DELAY_TIMER_CONV;
404 writel(VAL0|STINTEN, mmio+INTEN0); 403 writel(VAL0|STINTEN, mmio+INTEN0);
405 writel((u32)DLY_INT_A_R0|( event_count<< 16 )|timeout, 404 writel((u32)DLY_INT_A_R0|( event_count<< 16 )|timeout,
406 mmio+DLY_INT_A); 405 mmio+DLY_INT_A);
@@ -409,12 +408,12 @@ static int amd8111e_set_coalesce(struct net_device * dev, enum coal_mode cmod)
409 case TX_INTR_COAL : 408 case TX_INTR_COAL :
410 timeout = coal_conf->tx_timeout; 409 timeout = coal_conf->tx_timeout;
411 event_count = coal_conf->tx_event_count; 410 event_count = coal_conf->tx_event_count;
412 if( timeout > MAX_TIMEOUT || 411 if( timeout > MAX_TIMEOUT ||
413 event_count > MAX_EVENT_COUNT ) 412 event_count > MAX_EVENT_COUNT )
414 return -EINVAL; 413 return -EINVAL;
415 414
416 415
417 timeout = timeout * DELAY_TIMER_CONV; 416 timeout = timeout * DELAY_TIMER_CONV;
418 writel(VAL0|STINTEN,mmio+INTEN0); 417 writel(VAL0|STINTEN,mmio+INTEN0);
419 writel((u32)DLY_INT_B_T0|( event_count<< 16 )|timeout, 418 writel((u32)DLY_INT_B_T0|( event_count<< 16 )|timeout,
420 mmio+DLY_INT_B); 419 mmio+DLY_INT_B);
@@ -426,7 +425,7 @@ static int amd8111e_set_coalesce(struct net_device * dev, enum coal_mode cmod)
426 writel(0, mmio +DLY_INT_B); 425 writel(0, mmio +DLY_INT_B);
427 writel(0, mmio+DLY_INT_A); 426 writel(0, mmio+DLY_INT_A);
428 break; 427 break;
429 case ENABLE_COAL: 428 case ENABLE_COAL:
430 /* Start the timer */ 429 /* Start the timer */
431 writel((u32)SOFT_TIMER_FREQ, mmio+STVAL); /* 0.5 sec */ 430 writel((u32)SOFT_TIMER_FREQ, mmio+STVAL); /* 0.5 sec */
432 writel(VAL0|STINTEN, mmio+INTEN0); 431 writel(VAL0|STINTEN, mmio+INTEN0);
@@ -439,8 +438,8 @@ static int amd8111e_set_coalesce(struct net_device * dev, enum coal_mode cmod)
439 438
440} 439}
441 440
442/* 441/*
443This function initializes the device registers and starts the device. 442This function initializes the device registers and starts the device.
444*/ 443*/
445static int amd8111e_restart(struct net_device *dev) 444static int amd8111e_restart(struct net_device *dev)
446{ 445{
@@ -456,8 +455,8 @@ static int amd8111e_restart(struct net_device *dev)
456 455
457 /* enable the port manager and set auto negotiation always */ 456 /* enable the port manager and set auto negotiation always */
458 writel((u32) VAL1|EN_PMGR, mmio + CMD3 ); 457 writel((u32) VAL1|EN_PMGR, mmio + CMD3 );
459 writel((u32)XPHYANE|XPHYRST , mmio + CTRL2); 458 writel((u32)XPHYANE|XPHYRST , mmio + CTRL2);
460 459
461 amd8111e_set_ext_phy(dev); 460 amd8111e_set_ext_phy(dev);
462 461
463 /* set control registers */ 462 /* set control registers */
@@ -466,7 +465,7 @@ static int amd8111e_restart(struct net_device *dev)
466 writel( reg_val| XMTSP_128 | CACHE_ALIGN, mmio + CTRL1 ); 465 writel( reg_val| XMTSP_128 | CACHE_ALIGN, mmio + CTRL1 );
467 466
468 /* enable interrupt */ 467 /* enable interrupt */
469 writel( APINT5EN | APINT4EN | APINT3EN | APINT2EN | APINT1EN | 468 writel( APINT5EN | APINT4EN | APINT3EN | APINT2EN | APINT1EN |
470 APINT0EN | MIIPDTINTEN | MCCIINTEN | MCCINTEN | MREINTEN | 469 APINT0EN | MIIPDTINTEN | MCCIINTEN | MCCINTEN | MREINTEN |
471 SPNDINTEN | MPINTEN | SINTEN | STINTEN, mmio + INTEN0); 470 SPNDINTEN | MPINTEN | SINTEN | STINTEN, mmio + INTEN0);
472 471
@@ -478,10 +477,10 @@ static int amd8111e_restart(struct net_device *dev)
478 477
479 writew((u32)NUM_TX_RING_DR, mmio + XMT_RING_LEN0); 478 writew((u32)NUM_TX_RING_DR, mmio + XMT_RING_LEN0);
480 writew((u16)NUM_RX_RING_DR, mmio + RCV_RING_LEN0); 479 writew((u16)NUM_RX_RING_DR, mmio + RCV_RING_LEN0);
481 480
482 /* set default IPG to 96 */ 481 /* set default IPG to 96 */
483 writew((u32)DEFAULT_IPG,mmio+IPG); 482 writew((u32)DEFAULT_IPG,mmio+IPG);
484 writew((u32)(DEFAULT_IPG-IFS1_DELTA), mmio + IFS1); 483 writew((u32)(DEFAULT_IPG-IFS1_DELTA), mmio + IFS1);
485 484
486 if(lp->options & OPTION_JUMBO_ENABLE){ 485 if(lp->options & OPTION_JUMBO_ENABLE){
487 writel((u32)VAL2|JUMBO, mmio + CMD3); 486 writel((u32)VAL2|JUMBO, mmio + CMD3);
@@ -498,10 +497,10 @@ static int amd8111e_restart(struct net_device *dev)
498 writel((u32) VAL2|VSIZE|VL_TAG_DEL, mmio + CMD3); 497 writel((u32) VAL2|VSIZE|VL_TAG_DEL, mmio + CMD3);
499#endif 498#endif
500 writel( VAL0 | APAD_XMT | REX_RTRY, mmio + CMD2 ); 499 writel( VAL0 | APAD_XMT | REX_RTRY, mmio + CMD2 );
501 500
502 /* Setting the MAC address to the device */ 501 /* Setting the MAC address to the device */
503 for(i = 0; i < ETH_ADDR_LEN; i++) 502 for(i = 0; i < ETH_ADDR_LEN; i++)
504 writeb( dev->dev_addr[i], mmio + PADR + i ); 503 writeb( dev->dev_addr[i], mmio + PADR + i );
505 504
506 /* Enable interrupt coalesce */ 505 /* Enable interrupt coalesce */
507 if(lp->options & OPTION_INTR_COAL_ENABLE){ 506 if(lp->options & OPTION_INTR_COAL_ENABLE){
@@ -509,18 +508,18 @@ static int amd8111e_restart(struct net_device *dev)
509 dev->name); 508 dev->name);
510 amd8111e_set_coalesce(dev,ENABLE_COAL); 509 amd8111e_set_coalesce(dev,ENABLE_COAL);
511 } 510 }
512 511
513 /* set RUN bit to start the chip */ 512 /* set RUN bit to start the chip */
514 writel(VAL2 | RDMD0, mmio + CMD0); 513 writel(VAL2 | RDMD0, mmio + CMD0);
515 writel(VAL0 | INTREN | RUN, mmio + CMD0); 514 writel(VAL0 | INTREN | RUN, mmio + CMD0);
516 515
517 /* To avoid PCI posting bug */ 516 /* To avoid PCI posting bug */
518 readl(mmio+CMD0); 517 readl(mmio+CMD0);
519 return 0; 518 return 0;
520} 519}
521/* 520/*
522This function clears necessary the device registers. 521This function clears necessary the device registers.
523*/ 522*/
524static void amd8111e_init_hw_default( struct amd8111e_priv* lp) 523static void amd8111e_init_hw_default( struct amd8111e_priv* lp)
525{ 524{
526 unsigned int reg_val; 525 unsigned int reg_val;
@@ -545,7 +544,7 @@ static void amd8111e_init_hw_default( struct amd8111e_priv* lp)
545 544
546 /* Clear CMD0 */ 545 /* Clear CMD0 */
547 writel(CMD0_CLEAR,mmio + CMD0); 546 writel(CMD0_CLEAR,mmio + CMD0);
548 547
549 /* Clear CMD2 */ 548 /* Clear CMD2 */
550 writel(CMD2_CLEAR, mmio +CMD2); 549 writel(CMD2_CLEAR, mmio +CMD2);
551 550
@@ -595,7 +594,7 @@ static void amd8111e_init_hw_default( struct amd8111e_priv* lp)
595 594
596 /* SRAM_SIZE register */ 595 /* SRAM_SIZE register */
597 reg_val = readl(mmio + SRAM_SIZE); 596 reg_val = readl(mmio + SRAM_SIZE);
598 597
599 if(lp->options & OPTION_JUMBO_ENABLE) 598 if(lp->options & OPTION_JUMBO_ENABLE)
600 writel( VAL2|JUMBO, mmio + CMD3); 599 writel( VAL2|JUMBO, mmio + CMD3);
601#if AMD8111E_VLAN_TAG_USED 600#if AMD8111E_VLAN_TAG_USED
@@ -609,56 +608,56 @@ static void amd8111e_init_hw_default( struct amd8111e_priv* lp)
609 608
610} 609}
611 610
612/* 611/*
613This function disables the interrupt and clears all the pending 612This function disables the interrupt and clears all the pending
614interrupts in INT0 613interrupts in INT0
615 */ 614 */
616static void amd8111e_disable_interrupt(struct amd8111e_priv* lp) 615static void amd8111e_disable_interrupt(struct amd8111e_priv* lp)
617{ 616{
618 u32 intr0; 617 u32 intr0;
619 618
620 /* Disable interrupt */ 619 /* Disable interrupt */
621 writel(INTREN, lp->mmio + CMD0); 620 writel(INTREN, lp->mmio + CMD0);
622 621
623 /* Clear INT0 */ 622 /* Clear INT0 */
624 intr0 = readl(lp->mmio + INT0); 623 intr0 = readl(lp->mmio + INT0);
625 writel(intr0, lp->mmio + INT0); 624 writel(intr0, lp->mmio + INT0);
626 625
627 /* To avoid PCI posting bug */ 626 /* To avoid PCI posting bug */
628 readl(lp->mmio + INT0); 627 readl(lp->mmio + INT0);
629 628
630} 629}
631 630
632/* 631/*
633This function stops the chip. 632This function stops the chip.
634*/ 633*/
635static void amd8111e_stop_chip(struct amd8111e_priv* lp) 634static void amd8111e_stop_chip(struct amd8111e_priv* lp)
636{ 635{
637 writel(RUN, lp->mmio + CMD0); 636 writel(RUN, lp->mmio + CMD0);
638 637
639 /* To avoid PCI posting bug */ 638 /* To avoid PCI posting bug */
640 readl(lp->mmio + CMD0); 639 readl(lp->mmio + CMD0);
641} 640}
642 641
643/* 642/*
644This function frees the transmiter and receiver descriptor rings. 643This function frees the transmiter and receiver descriptor rings.
645*/ 644*/
646static void amd8111e_free_ring(struct amd8111e_priv* lp) 645static void amd8111e_free_ring(struct amd8111e_priv* lp)
647{ 646{
648 647
649 /* Free transmit and receive skbs */ 648 /* Free transmit and receive skbs */
650 amd8111e_free_skbs(lp->amd8111e_net_dev); 649 amd8111e_free_skbs(lp->amd8111e_net_dev);
651 650
652 /* Free transmit and receive descriptor rings */ 651 /* Free transmit and receive descriptor rings */
653 if(lp->rx_ring){ 652 if(lp->rx_ring){
654 pci_free_consistent(lp->pci_dev, 653 pci_free_consistent(lp->pci_dev,
655 sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR, 654 sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR,
656 lp->rx_ring, lp->rx_ring_dma_addr); 655 lp->rx_ring, lp->rx_ring_dma_addr);
657 lp->rx_ring = NULL; 656 lp->rx_ring = NULL;
658 } 657 }
659 658
660 if(lp->tx_ring){ 659 if(lp->tx_ring){
661 pci_free_consistent(lp->pci_dev, 660 pci_free_consistent(lp->pci_dev,
662 sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR, 661 sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR,
663 lp->tx_ring, lp->tx_ring_dma_addr); 662 lp->tx_ring, lp->tx_ring_dma_addr);
664 663
@@ -666,10 +665,10 @@ static void amd8111e_free_ring(struct amd8111e_priv* lp)
666 } 665 }
667 666
668} 667}
669#if AMD8111E_VLAN_TAG_USED 668#if AMD8111E_VLAN_TAG_USED
670/* 669/*
671This is the receive indication function for packets with vlan tag. 670This is the receive indication function for packets with vlan tag.
672*/ 671*/
673static int amd8111e_vlan_rx(struct amd8111e_priv *lp, struct sk_buff *skb, u16 vlan_tag) 672static int amd8111e_vlan_rx(struct amd8111e_priv *lp, struct sk_buff *skb, u16 vlan_tag)
674{ 673{
675#ifdef CONFIG_AMD8111E_NAPI 674#ifdef CONFIG_AMD8111E_NAPI
@@ -681,7 +680,7 @@ static int amd8111e_vlan_rx(struct amd8111e_priv *lp, struct sk_buff *skb, u16 v
681#endif 680#endif
682 681
683/* 682/*
684This function will free all the transmit skbs that are actually transmitted by the device. It will check the ownership of the skb before freeing the skb. 683This function will free all the transmit skbs that are actually transmitted by the device. It will check the ownership of the skb before freeing the skb.
685*/ 684*/
686static int amd8111e_tx(struct net_device *dev) 685static int amd8111e_tx(struct net_device *dev)
687{ 686{
@@ -710,7 +709,7 @@ static int amd8111e_tx(struct net_device *dev)
710 lp->tx_complete_idx++; 709 lp->tx_complete_idx++;
711 /*COAL update tx coalescing parameters */ 710 /*COAL update tx coalescing parameters */
712 lp->coal_conf.tx_packets++; 711 lp->coal_conf.tx_packets++;
713 lp->coal_conf.tx_bytes += lp->tx_ring[tx_index].buff_count; 712 lp->coal_conf.tx_bytes += lp->tx_ring[tx_index].buff_count;
714 713
715 if (netif_queue_stopped(dev) && 714 if (netif_queue_stopped(dev) &&
716 lp->tx_complete_idx > lp->tx_idx - NUM_TX_BUFFERS +2){ 715 lp->tx_complete_idx > lp->tx_idx - NUM_TX_BUFFERS +2){
@@ -735,13 +734,13 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget)
735 int num_rx_pkt = 0; 734 int num_rx_pkt = 0;
736 /*int max_rx_pkt = NUM_RX_BUFFERS;*/ 735 /*int max_rx_pkt = NUM_RX_BUFFERS;*/
737 short pkt_len; 736 short pkt_len;
738#if AMD8111E_VLAN_TAG_USED 737#if AMD8111E_VLAN_TAG_USED
739 short vtag; 738 short vtag;
740#endif 739#endif
741 int rx_pkt_limit = dev->quota; 740 int rx_pkt_limit = dev->quota;
742 unsigned long flags; 741 unsigned long flags;
743 742
744 do{ 743 do{
745 /* process receive packets until we use the quota*/ 744 /* process receive packets until we use the quota*/
746 /* If we own the next entry, it's a new packet. Send it up. */ 745 /* If we own the next entry, it's a new packet. Send it up. */
747 while(1) { 746 while(1) {
@@ -749,11 +748,11 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget)
749 if (status & OWN_BIT) 748 if (status & OWN_BIT)
750 break; 749 break;
751 750
752 /* 751 /*
753 * There is a tricky error noted by John Murphy, 752 * There is a tricky error noted by John Murphy,
754 * <murf@perftech.com> to Russ Nelson: Even with 753 * <murf@perftech.com> to Russ Nelson: Even with
755 * full-sized * buffers it's possible for a 754 * full-sized * buffers it's possible for a
756 * jabber packet to use two buffers, with only 755 * jabber packet to use two buffers, with only
757 * the last correctly noting the error. 756 * the last correctly noting the error.
758 */ 757 */
759 758
@@ -770,9 +769,9 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget)
770 } 769 }
771 pkt_len = le16_to_cpu(lp->rx_ring[rx_index].msg_count) - 4; 770 pkt_len = le16_to_cpu(lp->rx_ring[rx_index].msg_count) - 4;
772 771
773#if AMD8111E_VLAN_TAG_USED 772#if AMD8111E_VLAN_TAG_USED
774 vtag = status & TT_MASK; 773 vtag = status & TT_MASK;
775 /*MAC will strip vlan tag*/ 774 /*MAC will strip vlan tag*/
776 if(lp->vlgrp != NULL && vtag !=0) 775 if(lp->vlgrp != NULL && vtag !=0)
777 min_pkt_len =MIN_PKT_LEN - 4; 776 min_pkt_len =MIN_PKT_LEN - 4;
778 else 777 else
@@ -787,13 +786,13 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget)
787 if(--rx_pkt_limit < 0) 786 if(--rx_pkt_limit < 0)
788 goto rx_not_empty; 787 goto rx_not_empty;
789 if(!(new_skb = dev_alloc_skb(lp->rx_buff_len))){ 788 if(!(new_skb = dev_alloc_skb(lp->rx_buff_len))){
790 /* if allocation fail, 789 /* if allocation fail,
791 ignore that pkt and go to next one */ 790 ignore that pkt and go to next one */
792 lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS; 791 lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS;
793 lp->drv_rx_errors++; 792 lp->drv_rx_errors++;
794 goto err_next_pkt; 793 goto err_next_pkt;
795 } 794 }
796 795
797 skb_reserve(new_skb, 2); 796 skb_reserve(new_skb, 2);
798 skb = lp->rx_skbuff[rx_index]; 797 skb = lp->rx_skbuff[rx_index];
799 pci_unmap_single(lp->pci_dev,lp->rx_dma_addr[rx_index], 798 pci_unmap_single(lp->pci_dev,lp->rx_dma_addr[rx_index],
@@ -806,10 +805,10 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget)
806 new_skb->data, 805 new_skb->data,
807 lp->rx_buff_len-2, 806 lp->rx_buff_len-2,
808 PCI_DMA_FROMDEVICE); 807 PCI_DMA_FROMDEVICE);
809 808
810 skb->protocol = eth_type_trans(skb, dev); 809 skb->protocol = eth_type_trans(skb, dev);
811 810
812#if AMD8111E_VLAN_TAG_USED 811#if AMD8111E_VLAN_TAG_USED
813 if(lp->vlgrp != NULL && (vtag == TT_VLAN_TAGGED)){ 812 if(lp->vlgrp != NULL && (vtag == TT_VLAN_TAGGED)){
814 amd8111e_vlan_rx(lp, skb, 813 amd8111e_vlan_rx(lp, skb,
815 le16_to_cpu(lp->rx_ring[rx_index].tag_ctrl_info)); 814 le16_to_cpu(lp->rx_ring[rx_index].tag_ctrl_info));
@@ -818,20 +817,20 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget)
818 netif_receive_skb(skb); 817 netif_receive_skb(skb);
819 /*COAL update rx coalescing parameters*/ 818 /*COAL update rx coalescing parameters*/
820 lp->coal_conf.rx_packets++; 819 lp->coal_conf.rx_packets++;
821 lp->coal_conf.rx_bytes += pkt_len; 820 lp->coal_conf.rx_bytes += pkt_len;
822 num_rx_pkt++; 821 num_rx_pkt++;
823 dev->last_rx = jiffies; 822 dev->last_rx = jiffies;
824 823
825 err_next_pkt: 824 err_next_pkt:
826 lp->rx_ring[rx_index].buff_phy_addr 825 lp->rx_ring[rx_index].buff_phy_addr
827 = cpu_to_le32(lp->rx_dma_addr[rx_index]); 826 = cpu_to_le32(lp->rx_dma_addr[rx_index]);
828 lp->rx_ring[rx_index].buff_count = 827 lp->rx_ring[rx_index].buff_count =
829 cpu_to_le16(lp->rx_buff_len-2); 828 cpu_to_le16(lp->rx_buff_len-2);
830 wmb(); 829 wmb();
831 lp->rx_ring[rx_index].rx_flags |= cpu_to_le16(OWN_BIT); 830 lp->rx_ring[rx_index].rx_flags |= cpu_to_le16(OWN_BIT);
832 rx_index = (++lp->rx_idx) & RX_RING_DR_MOD_MASK; 831 rx_index = (++lp->rx_idx) & RX_RING_DR_MOD_MASK;
833 } 832 }
834 /* Check the interrupt status register for more packets in the 833 /* Check the interrupt status register for more packets in the
835 mean time. Process them since we have not used up our quota.*/ 834 mean time. Process them since we have not used up our quota.*/
836 835
837 intr0 = readl(mmio + INT0); 836 intr0 = readl(mmio + INT0);
@@ -853,13 +852,13 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget)
853 852
854rx_not_empty: 853rx_not_empty:
855 /* Do not call a netif_rx_complete */ 854 /* Do not call a netif_rx_complete */
856 dev->quota -= num_rx_pkt; 855 dev->quota -= num_rx_pkt;
857 *budget -= num_rx_pkt; 856 *budget -= num_rx_pkt;
858 return 1; 857 return 1;
859} 858}
860 859
861#else 860#else
862/* 861/*
863This function will check the ownership of receive buffers and descriptors. It will indicate to kernel up to half the number of maximum receive buffers in the descriptor ring, in a single receive interrupt. It will also replenish the descriptors with new skbs. 862This function will check the ownership of receive buffers and descriptors. It will indicate to kernel up to half the number of maximum receive buffers in the descriptor ring, in a single receive interrupt. It will also replenish the descriptors with new skbs.
864*/ 863*/
865static int amd8111e_rx(struct net_device *dev) 864static int amd8111e_rx(struct net_device *dev)
@@ -871,19 +870,19 @@ static int amd8111e_rx(struct net_device *dev)
871 int num_rx_pkt = 0; 870 int num_rx_pkt = 0;
872 int max_rx_pkt = NUM_RX_BUFFERS; 871 int max_rx_pkt = NUM_RX_BUFFERS;
873 short pkt_len; 872 short pkt_len;
874#if AMD8111E_VLAN_TAG_USED 873#if AMD8111E_VLAN_TAG_USED
875 short vtag; 874 short vtag;
876#endif 875#endif
877 876
878 /* If we own the next entry, it's a new packet. Send it up. */ 877 /* If we own the next entry, it's a new packet. Send it up. */
879 while(++num_rx_pkt <= max_rx_pkt){ 878 while(++num_rx_pkt <= max_rx_pkt){
880 status = le16_to_cpu(lp->rx_ring[rx_index].rx_flags); 879 status = le16_to_cpu(lp->rx_ring[rx_index].rx_flags);
881 if(status & OWN_BIT) 880 if(status & OWN_BIT)
882 return 0; 881 return 0;
883 882
884 /* check if err summary bit is set */ 883 /* check if err summary bit is set */
885 if(status & ERR_BIT){ 884 if(status & ERR_BIT){
886 /* 885 /*
887 * There is a tricky error noted by John Murphy, 886 * There is a tricky error noted by John Murphy,
888 * <murf@perftech.com> to Russ Nelson: Even with full-sized 887 * <murf@perftech.com> to Russ Nelson: Even with full-sized
889 * buffers it's possible for a jabber packet to use two 888 * buffers it's possible for a jabber packet to use two
@@ -900,9 +899,9 @@ static int amd8111e_rx(struct net_device *dev)
900 } 899 }
901 pkt_len = le16_to_cpu(lp->rx_ring[rx_index].msg_count) - 4; 900 pkt_len = le16_to_cpu(lp->rx_ring[rx_index].msg_count) - 4;
902 901
903#if AMD8111E_VLAN_TAG_USED 902#if AMD8111E_VLAN_TAG_USED
904 vtag = status & TT_MASK; 903 vtag = status & TT_MASK;
905 /*MAC will strip vlan tag*/ 904 /*MAC will strip vlan tag*/
906 if(lp->vlgrp != NULL && vtag !=0) 905 if(lp->vlgrp != NULL && vtag !=0)
907 min_pkt_len =MIN_PKT_LEN - 4; 906 min_pkt_len =MIN_PKT_LEN - 4;
908 else 907 else
@@ -915,13 +914,13 @@ static int amd8111e_rx(struct net_device *dev)
915 goto err_next_pkt; 914 goto err_next_pkt;
916 } 915 }
917 if(!(new_skb = dev_alloc_skb(lp->rx_buff_len))){ 916 if(!(new_skb = dev_alloc_skb(lp->rx_buff_len))){
918 /* if allocation fail, 917 /* if allocation fail,
919 ignore that pkt and go to next one */ 918 ignore that pkt and go to next one */
920 lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS; 919 lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS;
921 lp->drv_rx_errors++; 920 lp->drv_rx_errors++;
922 goto err_next_pkt; 921 goto err_next_pkt;
923 } 922 }
924 923
925 skb_reserve(new_skb, 2); 924 skb_reserve(new_skb, 2);
926 skb = lp->rx_skbuff[rx_index]; 925 skb = lp->rx_skbuff[rx_index];
927 pci_unmap_single(lp->pci_dev,lp->rx_dma_addr[rx_index], 926 pci_unmap_single(lp->pci_dev,lp->rx_dma_addr[rx_index],
@@ -932,27 +931,27 @@ static int amd8111e_rx(struct net_device *dev)
932 new_skb->dev = dev; 931 new_skb->dev = dev;
933 lp->rx_dma_addr[rx_index] = pci_map_single(lp->pci_dev, 932 lp->rx_dma_addr[rx_index] = pci_map_single(lp->pci_dev,
934 new_skb->data, lp->rx_buff_len-2,PCI_DMA_FROMDEVICE); 933 new_skb->data, lp->rx_buff_len-2,PCI_DMA_FROMDEVICE);
935 934
936 skb->protocol = eth_type_trans(skb, dev); 935 skb->protocol = eth_type_trans(skb, dev);
937 936
938#if AMD8111E_VLAN_TAG_USED 937#if AMD8111E_VLAN_TAG_USED
939 if(lp->vlgrp != NULL && (vtag == TT_VLAN_TAGGED)){ 938 if(lp->vlgrp != NULL && (vtag == TT_VLAN_TAGGED)){
940 amd8111e_vlan_rx(lp, skb, 939 amd8111e_vlan_rx(lp, skb,
941 le16_to_cpu(lp->rx_ring[rx_index].tag_ctrl_info)); 940 le16_to_cpu(lp->rx_ring[rx_index].tag_ctrl_info));
942 } else 941 } else
943#endif 942#endif
944 943
945 netif_rx (skb); 944 netif_rx (skb);
946 /*COAL update rx coalescing parameters*/ 945 /*COAL update rx coalescing parameters*/
947 lp->coal_conf.rx_packets++; 946 lp->coal_conf.rx_packets++;
948 lp->coal_conf.rx_bytes += pkt_len; 947 lp->coal_conf.rx_bytes += pkt_len;
949 948
950 dev->last_rx = jiffies; 949 dev->last_rx = jiffies;
951 950
952err_next_pkt: 951err_next_pkt:
953 lp->rx_ring[rx_index].buff_phy_addr 952 lp->rx_ring[rx_index].buff_phy_addr
954 = cpu_to_le32(lp->rx_dma_addr[rx_index]); 953 = cpu_to_le32(lp->rx_dma_addr[rx_index]);
955 lp->rx_ring[rx_index].buff_count = 954 lp->rx_ring[rx_index].buff_count =
956 cpu_to_le16(lp->rx_buff_len-2); 955 cpu_to_le16(lp->rx_buff_len-2);
957 wmb(); 956 wmb();
958 lp->rx_ring[rx_index].rx_flags |= cpu_to_le16(OWN_BIT); 957 lp->rx_ring[rx_index].rx_flags |= cpu_to_le16(OWN_BIT);
@@ -962,26 +961,26 @@ err_next_pkt:
962 return 0; 961 return 0;
963} 962}
964#endif /* CONFIG_AMD8111E_NAPI */ 963#endif /* CONFIG_AMD8111E_NAPI */
965/* 964/*
966This function will indicate the link status to the kernel. 965This function will indicate the link status to the kernel.
967*/ 966*/
968static int amd8111e_link_change(struct net_device* dev) 967static int amd8111e_link_change(struct net_device* dev)
969{ 968{
970 struct amd8111e_priv *lp = netdev_priv(dev); 969 struct amd8111e_priv *lp = netdev_priv(dev);
971 int status0,speed; 970 int status0,speed;
972 971
973 /* read the link change */ 972 /* read the link change */
974 status0 = readl(lp->mmio + STAT0); 973 status0 = readl(lp->mmio + STAT0);
975 974
976 if(status0 & LINK_STATS){ 975 if(status0 & LINK_STATS){
977 if(status0 & AUTONEG_COMPLETE) 976 if(status0 & AUTONEG_COMPLETE)
978 lp->link_config.autoneg = AUTONEG_ENABLE; 977 lp->link_config.autoneg = AUTONEG_ENABLE;
979 else 978 else
980 lp->link_config.autoneg = AUTONEG_DISABLE; 979 lp->link_config.autoneg = AUTONEG_DISABLE;
981 980
982 if(status0 & FULL_DPLX) 981 if(status0 & FULL_DPLX)
983 lp->link_config.duplex = DUPLEX_FULL; 982 lp->link_config.duplex = DUPLEX_FULL;
984 else 983 else
985 lp->link_config.duplex = DUPLEX_HALF; 984 lp->link_config.duplex = DUPLEX_HALF;
986 speed = (status0 & SPEED_MASK) >> 7; 985 speed = (status0 & SPEED_MASK) >> 7;
987 if(speed == PHY_SPEED_10) 986 if(speed == PHY_SPEED_10)
@@ -990,22 +989,22 @@ static int amd8111e_link_change(struct net_device* dev)
990 lp->link_config.speed = SPEED_100; 989 lp->link_config.speed = SPEED_100;
991 990
992 printk(KERN_INFO "%s: Link is Up. Speed is %s Mbps %s Duplex\n", dev->name, 991 printk(KERN_INFO "%s: Link is Up. Speed is %s Mbps %s Duplex\n", dev->name,
993 (lp->link_config.speed == SPEED_100) ? "100": "10", 992 (lp->link_config.speed == SPEED_100) ? "100": "10",
994 (lp->link_config.duplex == DUPLEX_FULL)? "Full": "Half"); 993 (lp->link_config.duplex == DUPLEX_FULL)? "Full": "Half");
995 netif_carrier_on(dev); 994 netif_carrier_on(dev);
996 } 995 }
997 else{ 996 else{
998 lp->link_config.speed = SPEED_INVALID; 997 lp->link_config.speed = SPEED_INVALID;
999 lp->link_config.duplex = DUPLEX_INVALID; 998 lp->link_config.duplex = DUPLEX_INVALID;
1000 lp->link_config.autoneg = AUTONEG_INVALID; 999 lp->link_config.autoneg = AUTONEG_INVALID;
1001 printk(KERN_INFO "%s: Link is Down.\n",dev->name); 1000 printk(KERN_INFO "%s: Link is Down.\n",dev->name);
1002 netif_carrier_off(dev); 1001 netif_carrier_off(dev);
1003 } 1002 }
1004 1003
1005 return 0; 1004 return 0;
1006} 1005}
1007/* 1006/*
1008This function reads the mib counters. 1007This function reads the mib counters.
1009*/ 1008*/
1010static int amd8111e_read_mib(void __iomem *mmio, u8 MIB_COUNTER) 1009static int amd8111e_read_mib(void __iomem *mmio, u8 MIB_COUNTER)
1011{ 1010{
@@ -1026,7 +1025,7 @@ static int amd8111e_read_mib(void __iomem *mmio, u8 MIB_COUNTER)
1026 1025
1027/* 1026/*
1028This function reads the mib registers and returns the hardware statistics. It updates previous internal driver statistics with new values. 1027This function reads the mib registers and returns the hardware statistics. It updates previous internal driver statistics with new values.
1029*/ 1028*/
1030static struct net_device_stats *amd8111e_get_stats(struct net_device * dev) 1029static struct net_device_stats *amd8111e_get_stats(struct net_device * dev)
1031{ 1030{
1032 struct amd8111e_priv *lp = netdev_priv(dev); 1031 struct amd8111e_priv *lp = netdev_priv(dev);
@@ -1034,9 +1033,9 @@ static struct net_device_stats *amd8111e_get_stats(struct net_device * dev)
1034 unsigned long flags; 1033 unsigned long flags;
1035 /* struct net_device_stats *prev_stats = &lp->prev_stats; */ 1034 /* struct net_device_stats *prev_stats = &lp->prev_stats; */
1036 struct net_device_stats* new_stats = &lp->stats; 1035 struct net_device_stats* new_stats = &lp->stats;
1037 1036
1038 if(!lp->opened) 1037 if(!lp->opened)
1039 return &lp->stats; 1038 return &lp->stats;
1040 spin_lock_irqsave (&lp->lock, flags); 1039 spin_lock_irqsave (&lp->lock, flags);
1041 1040
1042 /* stats.rx_packets */ 1041 /* stats.rx_packets */
@@ -1079,7 +1078,7 @@ static struct net_device_stats *amd8111e_get_stats(struct net_device * dev)
1079 new_stats->collisions = amd8111e_read_mib(mmio, xmt_collisions); 1078 new_stats->collisions = amd8111e_read_mib(mmio, xmt_collisions);
1080 1079
1081 /* stats.rx_length_errors*/ 1080 /* stats.rx_length_errors*/
1082 new_stats->rx_length_errors = 1081 new_stats->rx_length_errors =
1083 amd8111e_read_mib(mmio, rcv_undersize_pkts)+ 1082 amd8111e_read_mib(mmio, rcv_undersize_pkts)+
1084 amd8111e_read_mib(mmio, rcv_oversize_pkts); 1083 amd8111e_read_mib(mmio, rcv_oversize_pkts);
1085 1084
@@ -1100,11 +1099,11 @@ static struct net_device_stats *amd8111e_get_stats(struct net_device * dev)
1100 new_stats->rx_missed_errors = amd8111e_read_mib(mmio, rcv_miss_pkts); 1099 new_stats->rx_missed_errors = amd8111e_read_mib(mmio, rcv_miss_pkts);
1101 1100
1102 /* stats.tx_aborted_errors*/ 1101 /* stats.tx_aborted_errors*/
1103 new_stats->tx_aborted_errors = 1102 new_stats->tx_aborted_errors =
1104 amd8111e_read_mib(mmio, xmt_excessive_collision); 1103 amd8111e_read_mib(mmio, xmt_excessive_collision);
1105 1104
1106 /* stats.tx_carrier_errors*/ 1105 /* stats.tx_carrier_errors*/
1107 new_stats->tx_carrier_errors = 1106 new_stats->tx_carrier_errors =
1108 amd8111e_read_mib(mmio, xmt_loss_carrier); 1107 amd8111e_read_mib(mmio, xmt_loss_carrier);
1109 1108
1110 /* stats.tx_fifo_errors*/ 1109 /* stats.tx_fifo_errors*/
@@ -1116,12 +1115,12 @@ static struct net_device_stats *amd8111e_get_stats(struct net_device * dev)
1116 1115
1117 /* Reset the mibs for collecting new statistics */ 1116 /* Reset the mibs for collecting new statistics */
1118 /* writew(MIB_CLEAR, mmio + MIB_ADDR);*/ 1117 /* writew(MIB_CLEAR, mmio + MIB_ADDR);*/
1119 1118
1120 spin_unlock_irqrestore (&lp->lock, flags); 1119 spin_unlock_irqrestore (&lp->lock, flags);
1121 1120
1122 return new_stats; 1121 return new_stats;
1123} 1122}
1124/* This function recalculate the interupt coalescing mode on every interrupt 1123/* This function recalculate the interupt coalescing mode on every interrupt
1125according to the datarate and the packet rate. 1124according to the datarate and the packet rate.
1126*/ 1125*/
1127static int amd8111e_calc_coalesce(struct net_device *dev) 1126static int amd8111e_calc_coalesce(struct net_device *dev)
@@ -1137,19 +1136,19 @@ static int amd8111e_calc_coalesce(struct net_device *dev)
1137 1136
1138 tx_pkt_rate = coal_conf->tx_packets - coal_conf->tx_prev_packets; 1137 tx_pkt_rate = coal_conf->tx_packets - coal_conf->tx_prev_packets;
1139 coal_conf->tx_prev_packets = coal_conf->tx_packets; 1138 coal_conf->tx_prev_packets = coal_conf->tx_packets;
1140 1139
1141 tx_data_rate = coal_conf->tx_bytes - coal_conf->tx_prev_bytes; 1140 tx_data_rate = coal_conf->tx_bytes - coal_conf->tx_prev_bytes;
1142 coal_conf->tx_prev_bytes = coal_conf->tx_bytes; 1141 coal_conf->tx_prev_bytes = coal_conf->tx_bytes;
1143 1142
1144 rx_pkt_rate = coal_conf->rx_packets - coal_conf->rx_prev_packets; 1143 rx_pkt_rate = coal_conf->rx_packets - coal_conf->rx_prev_packets;
1145 coal_conf->rx_prev_packets = coal_conf->rx_packets; 1144 coal_conf->rx_prev_packets = coal_conf->rx_packets;
1146 1145
1147 rx_data_rate = coal_conf->rx_bytes - coal_conf->rx_prev_bytes; 1146 rx_data_rate = coal_conf->rx_bytes - coal_conf->rx_prev_bytes;
1148 coal_conf->rx_prev_bytes = coal_conf->rx_bytes; 1147 coal_conf->rx_prev_bytes = coal_conf->rx_bytes;
1149 1148
1150 if(rx_pkt_rate < 800){ 1149 if(rx_pkt_rate < 800){
1151 if(coal_conf->rx_coal_type != NO_COALESCE){ 1150 if(coal_conf->rx_coal_type != NO_COALESCE){
1152 1151
1153 coal_conf->rx_timeout = 0x0; 1152 coal_conf->rx_timeout = 0x0;
1154 coal_conf->rx_event_count = 0; 1153 coal_conf->rx_event_count = 0;
1155 amd8111e_set_coalesce(dev,RX_INTR_COAL); 1154 amd8111e_set_coalesce(dev,RX_INTR_COAL);
@@ -1157,11 +1156,11 @@ static int amd8111e_calc_coalesce(struct net_device *dev)
1157 } 1156 }
1158 } 1157 }
1159 else{ 1158 else{
1160 1159
1161 rx_pkt_size = rx_data_rate/rx_pkt_rate; 1160 rx_pkt_size = rx_data_rate/rx_pkt_rate;
1162 if (rx_pkt_size < 128){ 1161 if (rx_pkt_size < 128){
1163 if(coal_conf->rx_coal_type != NO_COALESCE){ 1162 if(coal_conf->rx_coal_type != NO_COALESCE){
1164 1163
1165 coal_conf->rx_timeout = 0; 1164 coal_conf->rx_timeout = 0;
1166 coal_conf->rx_event_count = 0; 1165 coal_conf->rx_event_count = 0;
1167 amd8111e_set_coalesce(dev,RX_INTR_COAL); 1166 amd8111e_set_coalesce(dev,RX_INTR_COAL);
@@ -1170,7 +1169,7 @@ static int amd8111e_calc_coalesce(struct net_device *dev)
1170 1169
1171 } 1170 }
1172 else if ( (rx_pkt_size >= 128) && (rx_pkt_size < 512) ){ 1171 else if ( (rx_pkt_size >= 128) && (rx_pkt_size < 512) ){
1173 1172
1174 if(coal_conf->rx_coal_type != LOW_COALESCE){ 1173 if(coal_conf->rx_coal_type != LOW_COALESCE){
1175 coal_conf->rx_timeout = 1; 1174 coal_conf->rx_timeout = 1;
1176 coal_conf->rx_event_count = 4; 1175 coal_conf->rx_event_count = 4;
@@ -1179,14 +1178,14 @@ static int amd8111e_calc_coalesce(struct net_device *dev)
1179 } 1178 }
1180 } 1179 }
1181 else if ((rx_pkt_size >= 512) && (rx_pkt_size < 1024)){ 1180 else if ((rx_pkt_size >= 512) && (rx_pkt_size < 1024)){
1182 1181
1183 if(coal_conf->rx_coal_type != MEDIUM_COALESCE){ 1182 if(coal_conf->rx_coal_type != MEDIUM_COALESCE){
1184 coal_conf->rx_timeout = 1; 1183 coal_conf->rx_timeout = 1;
1185 coal_conf->rx_event_count = 4; 1184 coal_conf->rx_event_count = 4;
1186 amd8111e_set_coalesce(dev,RX_INTR_COAL); 1185 amd8111e_set_coalesce(dev,RX_INTR_COAL);
1187 coal_conf->rx_coal_type = MEDIUM_COALESCE; 1186 coal_conf->rx_coal_type = MEDIUM_COALESCE;
1188 } 1187 }
1189 1188
1190 } 1189 }
1191 else if(rx_pkt_size >= 1024){ 1190 else if(rx_pkt_size >= 1024){
1192 if(coal_conf->rx_coal_type != HIGH_COALESCE){ 1191 if(coal_conf->rx_coal_type != HIGH_COALESCE){
@@ -1194,13 +1193,13 @@ static int amd8111e_calc_coalesce(struct net_device *dev)
1194 coal_conf->rx_event_count = 3; 1193 coal_conf->rx_event_count = 3;
1195 amd8111e_set_coalesce(dev,RX_INTR_COAL); 1194 amd8111e_set_coalesce(dev,RX_INTR_COAL);
1196 coal_conf->rx_coal_type = HIGH_COALESCE; 1195 coal_conf->rx_coal_type = HIGH_COALESCE;
1197 } 1196 }
1198 } 1197 }
1199 } 1198 }
1200 /* NOW FOR TX INTR COALESC */ 1199 /* NOW FOR TX INTR COALESC */
1201 if(tx_pkt_rate < 800){ 1200 if(tx_pkt_rate < 800){
1202 if(coal_conf->tx_coal_type != NO_COALESCE){ 1201 if(coal_conf->tx_coal_type != NO_COALESCE){
1203 1202
1204 coal_conf->tx_timeout = 0x0; 1203 coal_conf->tx_timeout = 0x0;
1205 coal_conf->tx_event_count = 0; 1204 coal_conf->tx_event_count = 0;
1206 amd8111e_set_coalesce(dev,TX_INTR_COAL); 1205 amd8111e_set_coalesce(dev,TX_INTR_COAL);
@@ -1208,12 +1207,12 @@ static int amd8111e_calc_coalesce(struct net_device *dev)
1208 } 1207 }
1209 } 1208 }
1210 else{ 1209 else{
1211 1210
1212 tx_pkt_size = tx_data_rate/tx_pkt_rate; 1211 tx_pkt_size = tx_data_rate/tx_pkt_rate;
1213 if (tx_pkt_size < 128){ 1212 if (tx_pkt_size < 128){
1214 1213
1215 if(coal_conf->tx_coal_type != NO_COALESCE){ 1214 if(coal_conf->tx_coal_type != NO_COALESCE){
1216 1215
1217 coal_conf->tx_timeout = 0; 1216 coal_conf->tx_timeout = 0;
1218 coal_conf->tx_event_count = 0; 1217 coal_conf->tx_event_count = 0;
1219 amd8111e_set_coalesce(dev,TX_INTR_COAL); 1218 amd8111e_set_coalesce(dev,TX_INTR_COAL);
@@ -1222,7 +1221,7 @@ static int amd8111e_calc_coalesce(struct net_device *dev)
1222 1221
1223 } 1222 }
1224 else if ( (tx_pkt_size >= 128) && (tx_pkt_size < 512) ){ 1223 else if ( (tx_pkt_size >= 128) && (tx_pkt_size < 512) ){
1225 1224
1226 if(coal_conf->tx_coal_type != LOW_COALESCE){ 1225 if(coal_conf->tx_coal_type != LOW_COALESCE){
1227 coal_conf->tx_timeout = 1; 1226 coal_conf->tx_timeout = 1;
1228 coal_conf->tx_event_count = 2; 1227 coal_conf->tx_event_count = 2;
@@ -1232,14 +1231,14 @@ static int amd8111e_calc_coalesce(struct net_device *dev)
1232 } 1231 }
1233 } 1232 }
1234 else if ((tx_pkt_size >= 512) && (tx_pkt_size < 1024)){ 1233 else if ((tx_pkt_size >= 512) && (tx_pkt_size < 1024)){
1235 1234
1236 if(coal_conf->tx_coal_type != MEDIUM_COALESCE){ 1235 if(coal_conf->tx_coal_type != MEDIUM_COALESCE){
1237 coal_conf->tx_timeout = 2; 1236 coal_conf->tx_timeout = 2;
1238 coal_conf->tx_event_count = 5; 1237 coal_conf->tx_event_count = 5;
1239 amd8111e_set_coalesce(dev,TX_INTR_COAL); 1238 amd8111e_set_coalesce(dev,TX_INTR_COAL);
1240 coal_conf->tx_coal_type = MEDIUM_COALESCE; 1239 coal_conf->tx_coal_type = MEDIUM_COALESCE;
1241 } 1240 }
1242 1241
1243 } 1242 }
1244 else if(tx_pkt_size >= 1024){ 1243 else if(tx_pkt_size >= 1024){
1245 if (tx_pkt_size >= 1024){ 1244 if (tx_pkt_size >= 1024){
@@ -1248,7 +1247,7 @@ static int amd8111e_calc_coalesce(struct net_device *dev)
1248 coal_conf->tx_event_count = 8; 1247 coal_conf->tx_event_count = 8;
1249 amd8111e_set_coalesce(dev,TX_INTR_COAL); 1248 amd8111e_set_coalesce(dev,TX_INTR_COAL);
1250 coal_conf->tx_coal_type = HIGH_COALESCE; 1249 coal_conf->tx_coal_type = HIGH_COALESCE;
1251 } 1250 }
1252 } 1251 }
1253 } 1252 }
1254 } 1253 }
@@ -1285,7 +1284,7 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id, struct pt_regs *reg
1285 handled = 0; 1284 handled = 0;
1286 goto err_no_interrupt; 1285 goto err_no_interrupt;
1287 } 1286 }
1288 1287
1289 /* Current driver processes 4 interrupts : RINT,TINT,LCINT,STINT */ 1288 /* Current driver processes 4 interrupts : RINT,TINT,LCINT,STINT */
1290 writel(intr0, mmio + INT0); 1289 writel(intr0, mmio + INT0);
1291 1290
@@ -1314,7 +1313,7 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id, struct pt_regs *reg
1314 /* Check if Transmit Interrupt has occurred. */ 1313 /* Check if Transmit Interrupt has occurred. */
1315 if(intr0 & TINT0) 1314 if(intr0 & TINT0)
1316 amd8111e_tx(dev); 1315 amd8111e_tx(dev);
1317 1316
1318 /* Check if Link Change Interrupt has occurred. */ 1317 /* Check if Link Change Interrupt has occurred. */
1319 if (intr0 & LCINT) 1318 if (intr0 & LCINT)
1320 amd8111e_link_change(dev); 1319 amd8111e_link_change(dev);
@@ -1325,21 +1324,21 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id, struct pt_regs *reg
1325 1324
1326err_no_interrupt: 1325err_no_interrupt:
1327 writel( VAL0 | INTREN,mmio + CMD0); 1326 writel( VAL0 | INTREN,mmio + CMD0);
1328 1327
1329 spin_unlock(&lp->lock); 1328 spin_unlock(&lp->lock);
1330 1329
1331 return IRQ_RETVAL(handled); 1330 return IRQ_RETVAL(handled);
1332} 1331}
1333 1332
1334#ifdef CONFIG_NET_POLL_CONTROLLER 1333#ifdef CONFIG_NET_POLL_CONTROLLER
1335static void amd8111e_poll(struct net_device *dev) 1334static void amd8111e_poll(struct net_device *dev)
1336{ 1335{
1337 unsigned long flags; 1336 unsigned long flags;
1338 local_save_flags(flags); 1337 local_save_flags(flags);
1339 local_irq_disable(); 1338 local_irq_disable();
1340 amd8111e_interrupt(0, dev, NULL); 1339 amd8111e_interrupt(0, dev, NULL);
1341 local_irq_restore(flags); 1340 local_irq_restore(flags);
1342} 1341}
1343#endif 1342#endif
1344 1343
1345 1344
@@ -1350,35 +1349,35 @@ static int amd8111e_close(struct net_device * dev)
1350{ 1349{
1351 struct amd8111e_priv *lp = netdev_priv(dev); 1350 struct amd8111e_priv *lp = netdev_priv(dev);
1352 netif_stop_queue(dev); 1351 netif_stop_queue(dev);
1353 1352
1354 spin_lock_irq(&lp->lock); 1353 spin_lock_irq(&lp->lock);
1355 1354
1356 amd8111e_disable_interrupt(lp); 1355 amd8111e_disable_interrupt(lp);
1357 amd8111e_stop_chip(lp); 1356 amd8111e_stop_chip(lp);
1358 amd8111e_free_ring(lp); 1357 amd8111e_free_ring(lp);
1359 1358
1360 netif_carrier_off(lp->amd8111e_net_dev); 1359 netif_carrier_off(lp->amd8111e_net_dev);
1361 1360
1362 /* Delete ipg timer */ 1361 /* Delete ipg timer */
1363 if(lp->options & OPTION_DYN_IPG_ENABLE) 1362 if(lp->options & OPTION_DYN_IPG_ENABLE)
1364 del_timer_sync(&lp->ipg_data.ipg_timer); 1363 del_timer_sync(&lp->ipg_data.ipg_timer);
1365 1364
1366 spin_unlock_irq(&lp->lock); 1365 spin_unlock_irq(&lp->lock);
1367 free_irq(dev->irq, dev); 1366 free_irq(dev->irq, dev);
1368 1367
1369 /* Update the statistics before closing */ 1368 /* Update the statistics before closing */
1370 amd8111e_get_stats(dev); 1369 amd8111e_get_stats(dev);
1371 lp->opened = 0; 1370 lp->opened = 0;
1372 return 0; 1371 return 0;
1373} 1372}
1374/* This function opens new interface.It requests irq for the device, initializes the device,buffers and descriptors, and starts the device. 1373/* This function opens new interface.It requests irq for the device, initializes the device,buffers and descriptors, and starts the device.
1375*/ 1374*/
1376static int amd8111e_open(struct net_device * dev ) 1375static int amd8111e_open(struct net_device * dev )
1377{ 1376{
1378 struct amd8111e_priv *lp = netdev_priv(dev); 1377 struct amd8111e_priv *lp = netdev_priv(dev);
1379 1378
1380 if(dev->irq ==0 || request_irq(dev->irq, amd8111e_interrupt, SA_SHIRQ, 1379 if(dev->irq ==0 || request_irq(dev->irq, amd8111e_interrupt, IRQF_SHARED,
1381 dev->name, dev)) 1380 dev->name, dev))
1382 return -EAGAIN; 1381 return -EAGAIN;
1383 1382
1384 spin_lock_irq(&lp->lock); 1383 spin_lock_irq(&lp->lock);
@@ -1392,7 +1391,7 @@ static int amd8111e_open(struct net_device * dev )
1392 return -ENOMEM; 1391 return -ENOMEM;
1393 } 1392 }
1394 /* Start ipg timer */ 1393 /* Start ipg timer */
1395 if(lp->options & OPTION_DYN_IPG_ENABLE){ 1394 if(lp->options & OPTION_DYN_IPG_ENABLE){
1396 add_timer(&lp->ipg_data.ipg_timer); 1395 add_timer(&lp->ipg_data.ipg_timer);
1397 printk(KERN_INFO "%s: Dynamic IPG Enabled.\n",dev->name); 1396 printk(KERN_INFO "%s: Dynamic IPG Enabled.\n",dev->name);
1398 } 1397 }
@@ -1403,21 +1402,21 @@ static int amd8111e_open(struct net_device * dev )
1403 1402
1404 netif_start_queue(dev); 1403 netif_start_queue(dev);
1405 1404
1406 return 0; 1405 return 0;
1407} 1406}
1408/* 1407/*
1409This function checks if there is any transmit descriptors available to queue more packet. 1408This function checks if there is any transmit descriptors available to queue more packet.
1410*/ 1409*/
1411static int amd8111e_tx_queue_avail(struct amd8111e_priv* lp ) 1410static int amd8111e_tx_queue_avail(struct amd8111e_priv* lp )
1412{ 1411{
1413 int tx_index = lp->tx_idx & TX_BUFF_MOD_MASK; 1412 int tx_index = lp->tx_idx & TX_BUFF_MOD_MASK;
1414 if(lp->tx_skbuff[tx_index] != 0) 1413 if(lp->tx_skbuff[tx_index] != 0)
1415 return -1; 1414 return -1;
1416 else 1415 else
1417 return 0; 1416 return 0;
1418 1417
1419} 1418}
1420/* 1419/*
1421This function will queue the transmit packets to the descriptors and will trigger the send operation. It also initializes the transmit descriptors with buffer physical address, byte count, ownership to hardware etc. 1420This function will queue the transmit packets to the descriptors and will trigger the send operation. It also initializes the transmit descriptors with buffer physical address, byte count, ownership to hardware etc.
1422*/ 1421*/
1423 1422
@@ -1438,9 +1437,9 @@ static int amd8111e_start_xmit(struct sk_buff *skb, struct net_device * dev)
1438 1437
1439#if AMD8111E_VLAN_TAG_USED 1438#if AMD8111E_VLAN_TAG_USED
1440 if((lp->vlgrp != NULL) && vlan_tx_tag_present(skb)){ 1439 if((lp->vlgrp != NULL) && vlan_tx_tag_present(skb)){
1441 lp->tx_ring[tx_index].tag_ctrl_cmd |= 1440 lp->tx_ring[tx_index].tag_ctrl_cmd |=
1442 cpu_to_le16(TCC_VLAN_INSERT); 1441 cpu_to_le16(TCC_VLAN_INSERT);
1443 lp->tx_ring[tx_index].tag_ctrl_info = 1442 lp->tx_ring[tx_index].tag_ctrl_info =
1444 cpu_to_le16(vlan_tx_tag_get(skb)); 1443 cpu_to_le16(vlan_tx_tag_get(skb));
1445 1444
1446 } 1445 }
@@ -1511,14 +1510,14 @@ static int amd8111e_ether_crc(int len, char* mac_addr)
1511 } 1510 }
1512 else 1511 else
1513 crc >>= 1; 1512 crc >>= 1;
1514 1513
1515 octet >>= 1; 1514 octet >>= 1;
1516 } 1515 }
1517 } 1516 }
1518 return crc; 1517 return crc;
1519} 1518}
1520/* 1519/*
1521This function sets promiscuos mode, all-multi mode or the multicast address 1520This function sets promiscuos mode, all-multi mode or the multicast address
1522list to the device. 1521list to the device.
1523*/ 1522*/
1524static void amd8111e_set_multicast_list(struct net_device *dev) 1523static void amd8111e_set_multicast_list(struct net_device *dev)
@@ -1528,7 +1527,6 @@ static void amd8111e_set_multicast_list(struct net_device *dev)
1528 u32 mc_filter[2] ; 1527 u32 mc_filter[2] ;
1529 int i,bit_num; 1528 int i,bit_num;
1530 if(dev->flags & IFF_PROMISC){ 1529 if(dev->flags & IFF_PROMISC){
1531 printk(KERN_INFO "%s: Setting promiscuous mode.\n",dev->name);
1532 writel( VAL2 | PROM, lp->mmio + CMD2); 1530 writel( VAL2 | PROM, lp->mmio + CMD2);
1533 return; 1531 return;
1534 } 1532 }
@@ -1560,7 +1558,7 @@ static void amd8111e_set_multicast_list(struct net_device *dev)
1560 i++, mc_ptr = mc_ptr->next) { 1558 i++, mc_ptr = mc_ptr->next) {
1561 bit_num = ( amd8111e_ether_crc(ETH_ALEN,mc_ptr->dmi_addr) >> 26 ) & 0x3f; 1559 bit_num = ( amd8111e_ether_crc(ETH_ALEN,mc_ptr->dmi_addr) >> 26 ) & 0x3f;
1562 mc_filter[bit_num >> 5] |= 1 << (bit_num & 31); 1560 mc_filter[bit_num >> 5] |= 1 << (bit_num & 31);
1563 } 1561 }
1564 amd8111e_writeq(*(u64*)mc_filter,lp->mmio+ LADRF); 1562 amd8111e_writeq(*(u64*)mc_filter,lp->mmio+ LADRF);
1565 1563
1566 /* To eliminate PCI posting bug */ 1564 /* To eliminate PCI posting bug */
@@ -1636,18 +1634,18 @@ static int amd8111e_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol_
1636 return -EINVAL; 1634 return -EINVAL;
1637 spin_lock_irq(&lp->lock); 1635 spin_lock_irq(&lp->lock);
1638 if (wol_info->wolopts & WAKE_MAGIC) 1636 if (wol_info->wolopts & WAKE_MAGIC)
1639 lp->options |= 1637 lp->options |=
1640 (OPTION_WOL_ENABLE | OPTION_WAKE_MAGIC_ENABLE); 1638 (OPTION_WOL_ENABLE | OPTION_WAKE_MAGIC_ENABLE);
1641 else if(wol_info->wolopts & WAKE_PHY) 1639 else if(wol_info->wolopts & WAKE_PHY)
1642 lp->options |= 1640 lp->options |=
1643 (OPTION_WOL_ENABLE | OPTION_WAKE_PHY_ENABLE); 1641 (OPTION_WOL_ENABLE | OPTION_WAKE_PHY_ENABLE);
1644 else 1642 else
1645 lp->options &= ~OPTION_WOL_ENABLE; 1643 lp->options &= ~OPTION_WOL_ENABLE;
1646 spin_unlock_irq(&lp->lock); 1644 spin_unlock_irq(&lp->lock);
1647 return 0; 1645 return 0;
1648} 1646}
1649 1647
1650static struct ethtool_ops ops = { 1648static const struct ethtool_ops ops = {
1651 .get_drvinfo = amd8111e_get_drvinfo, 1649 .get_drvinfo = amd8111e_get_drvinfo,
1652 .get_regs_len = amd8111e_get_regs_len, 1650 .get_regs_len = amd8111e_get_regs_len,
1653 .get_regs = amd8111e_get_regs, 1651 .get_regs = amd8111e_get_regs,
@@ -1660,9 +1658,9 @@ static struct ethtool_ops ops = {
1660}; 1658};
1661 1659
1662/* 1660/*
1663This function handles all the ethtool ioctls. It gives driver info, gets/sets driver speed, gets memory mapped register values, forces auto negotiation, sets/gets WOL options for ethtool application. 1661This function handles all the ethtool ioctls. It gives driver info, gets/sets driver speed, gets memory mapped register values, forces auto negotiation, sets/gets WOL options for ethtool application.
1664*/ 1662*/
1665 1663
1666static int amd8111e_ioctl(struct net_device * dev , struct ifreq *ifr, int cmd) 1664static int amd8111e_ioctl(struct net_device * dev , struct ifreq *ifr, int cmd)
1667{ 1665{
1668 struct mii_ioctl_data *data = if_mii(ifr); 1666 struct mii_ioctl_data *data = if_mii(ifr);
@@ -1678,7 +1676,7 @@ static int amd8111e_ioctl(struct net_device * dev , struct ifreq *ifr, int cmd)
1678 data->phy_id = lp->ext_phy_addr; 1676 data->phy_id = lp->ext_phy_addr;
1679 1677
1680 /* fallthru */ 1678 /* fallthru */
1681 case SIOCGMIIREG: 1679 case SIOCGMIIREG:
1682 1680
1683 spin_lock_irq(&lp->lock); 1681 spin_lock_irq(&lp->lock);
1684 err = amd8111e_read_phy(lp, data->phy_id, 1682 err = amd8111e_read_phy(lp, data->phy_id,
@@ -1713,16 +1711,16 @@ static int amd8111e_set_mac_address(struct net_device *dev, void *p)
1713 spin_lock_irq(&lp->lock); 1711 spin_lock_irq(&lp->lock);
1714 /* Setting the MAC address to the device */ 1712 /* Setting the MAC address to the device */
1715 for(i = 0; i < ETH_ADDR_LEN; i++) 1713 for(i = 0; i < ETH_ADDR_LEN; i++)
1716 writeb( dev->dev_addr[i], lp->mmio + PADR + i ); 1714 writeb( dev->dev_addr[i], lp->mmio + PADR + i );
1717 1715
1718 spin_unlock_irq(&lp->lock); 1716 spin_unlock_irq(&lp->lock);
1719 1717
1720 return 0; 1718 return 0;
1721} 1719}
1722 1720
1723/* 1721/*
1724This function changes the mtu of the device. It restarts the device to initialize the descriptor with new receive buffers. 1722This function changes the mtu of the device. It restarts the device to initialize the descriptor with new receive buffers.
1725*/ 1723*/
1726static int amd8111e_change_mtu(struct net_device *dev, int new_mtu) 1724static int amd8111e_change_mtu(struct net_device *dev, int new_mtu)
1727{ 1725{
1728 struct amd8111e_priv *lp = netdev_priv(dev); 1726 struct amd8111e_priv *lp = netdev_priv(dev);
@@ -1733,7 +1731,7 @@ static int amd8111e_change_mtu(struct net_device *dev, int new_mtu)
1733 1731
1734 if (!netif_running(dev)) { 1732 if (!netif_running(dev)) {
1735 /* new_mtu will be used 1733 /* new_mtu will be used
1736 when device starts netxt time */ 1734 when device starts netxt time */
1737 dev->mtu = new_mtu; 1735 dev->mtu = new_mtu;
1738 return 0; 1736 return 0;
1739 } 1737 }
@@ -1760,7 +1758,7 @@ static void amd8111e_vlan_rx_register(struct net_device *dev, struct vlan_group
1760 lp->vlgrp = grp; 1758 lp->vlgrp = grp;
1761 spin_unlock_irq(&lp->lock); 1759 spin_unlock_irq(&lp->lock);
1762} 1760}
1763 1761
1764static void amd8111e_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) 1762static void amd8111e_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
1765{ 1763{
1766 struct amd8111e_priv *lp = netdev_priv(dev); 1764 struct amd8111e_priv *lp = netdev_priv(dev);
@@ -1785,11 +1783,11 @@ static int amd8111e_enable_link_change(struct amd8111e_priv* lp)
1785 1783
1786 /* Adapter is already stoped/suspended/interrupt-disabled */ 1784 /* Adapter is already stoped/suspended/interrupt-disabled */
1787 writel(VAL0|LCMODE_SW,lp->mmio + CMD7); 1785 writel(VAL0|LCMODE_SW,lp->mmio + CMD7);
1788 1786
1789 /* To eliminate PCI posting bug */ 1787 /* To eliminate PCI posting bug */
1790 readl(lp->mmio + CMD7); 1788 readl(lp->mmio + CMD7);
1791 return 0; 1789 return 0;
1792} 1790}
1793/* This function is called when a packet transmission fails to complete within a resonable period, on the assumption that an interrupts have been failed or the interface is locked up. This function will reinitialize the hardware */ 1791/* This function is called when a packet transmission fails to complete within a resonable period, on the assumption that an interrupts have been failed or the interface is locked up. This function will reinitialize the hardware */
1794 1792
1795static void amd8111e_tx_timeout(struct net_device *dev) 1793static void amd8111e_tx_timeout(struct net_device *dev)
@@ -1806,10 +1804,10 @@ static void amd8111e_tx_timeout(struct net_device *dev)
1806 netif_wake_queue(dev); 1804 netif_wake_queue(dev);
1807} 1805}
1808static int amd8111e_suspend(struct pci_dev *pci_dev, pm_message_t state) 1806static int amd8111e_suspend(struct pci_dev *pci_dev, pm_message_t state)
1809{ 1807{
1810 struct net_device *dev = pci_get_drvdata(pci_dev); 1808 struct net_device *dev = pci_get_drvdata(pci_dev);
1811 struct amd8111e_priv *lp = netdev_priv(dev); 1809 struct amd8111e_priv *lp = netdev_priv(dev);
1812 1810
1813 if (!netif_running(dev)) 1811 if (!netif_running(dev))
1814 return 0; 1812 return 0;
1815 1813
@@ -1819,10 +1817,10 @@ static int amd8111e_suspend(struct pci_dev *pci_dev, pm_message_t state)
1819 spin_unlock_irq(&lp->lock); 1817 spin_unlock_irq(&lp->lock);
1820 1818
1821 netif_device_detach(dev); 1819 netif_device_detach(dev);
1822 1820
1823 /* stop chip */ 1821 /* stop chip */
1824 spin_lock_irq(&lp->lock); 1822 spin_lock_irq(&lp->lock);
1825 if(lp->options & OPTION_DYN_IPG_ENABLE) 1823 if(lp->options & OPTION_DYN_IPG_ENABLE)
1826 del_timer_sync(&lp->ipg_data.ipg_timer); 1824 del_timer_sync(&lp->ipg_data.ipg_timer);
1827 amd8111e_stop_chip(lp); 1825 amd8111e_stop_chip(lp);
1828 spin_unlock_irq(&lp->lock); 1826 spin_unlock_irq(&lp->lock);
@@ -1830,19 +1828,19 @@ static int amd8111e_suspend(struct pci_dev *pci_dev, pm_message_t state)
1830 if(lp->options & OPTION_WOL_ENABLE){ 1828 if(lp->options & OPTION_WOL_ENABLE){
1831 /* enable wol */ 1829 /* enable wol */
1832 if(lp->options & OPTION_WAKE_MAGIC_ENABLE) 1830 if(lp->options & OPTION_WAKE_MAGIC_ENABLE)
1833 amd8111e_enable_magicpkt(lp); 1831 amd8111e_enable_magicpkt(lp);
1834 if(lp->options & OPTION_WAKE_PHY_ENABLE) 1832 if(lp->options & OPTION_WAKE_PHY_ENABLE)
1835 amd8111e_enable_link_change(lp); 1833 amd8111e_enable_link_change(lp);
1836 1834
1837 pci_enable_wake(pci_dev, PCI_D3hot, 1); 1835 pci_enable_wake(pci_dev, PCI_D3hot, 1);
1838 pci_enable_wake(pci_dev, PCI_D3cold, 1); 1836 pci_enable_wake(pci_dev, PCI_D3cold, 1);
1839 1837
1840 } 1838 }
1841 else{ 1839 else{
1842 pci_enable_wake(pci_dev, PCI_D3hot, 0); 1840 pci_enable_wake(pci_dev, PCI_D3hot, 0);
1843 pci_enable_wake(pci_dev, PCI_D3cold, 0); 1841 pci_enable_wake(pci_dev, PCI_D3cold, 0);
1844 } 1842 }
1845 1843
1846 pci_save_state(pci_dev); 1844 pci_save_state(pci_dev);
1847 pci_set_power_state(pci_dev, PCI_D3hot); 1845 pci_set_power_state(pci_dev, PCI_D3hot);
1848 1846
@@ -1852,7 +1850,7 @@ static int amd8111e_resume(struct pci_dev *pci_dev)
1852{ 1850{
1853 struct net_device *dev = pci_get_drvdata(pci_dev); 1851 struct net_device *dev = pci_get_drvdata(pci_dev);
1854 struct amd8111e_priv *lp = netdev_priv(dev); 1852 struct amd8111e_priv *lp = netdev_priv(dev);
1855 1853
1856 if (!netif_running(dev)) 1854 if (!netif_running(dev))
1857 return 0; 1855 return 0;
1858 1856
@@ -1867,8 +1865,8 @@ static int amd8111e_resume(struct pci_dev *pci_dev)
1867 spin_lock_irq(&lp->lock); 1865 spin_lock_irq(&lp->lock);
1868 amd8111e_restart(dev); 1866 amd8111e_restart(dev);
1869 /* Restart ipg timer */ 1867 /* Restart ipg timer */
1870 if(lp->options & OPTION_DYN_IPG_ENABLE) 1868 if(lp->options & OPTION_DYN_IPG_ENABLE)
1871 mod_timer(&lp->ipg_data.ipg_timer, 1869 mod_timer(&lp->ipg_data.ipg_timer,
1872 jiffies + IPG_CONVERGE_JIFFIES); 1870 jiffies + IPG_CONVERGE_JIFFIES);
1873 spin_unlock_irq(&lp->lock); 1871 spin_unlock_irq(&lp->lock);
1874 1872
@@ -1896,16 +1894,16 @@ static void amd8111e_config_ipg(struct net_device* dev)
1896 unsigned int prev_col_cnt = ipg_data->col_cnt; 1894 unsigned int prev_col_cnt = ipg_data->col_cnt;
1897 unsigned int total_col_cnt; 1895 unsigned int total_col_cnt;
1898 unsigned int tmp_ipg; 1896 unsigned int tmp_ipg;
1899 1897
1900 if(lp->link_config.duplex == DUPLEX_FULL){ 1898 if(lp->link_config.duplex == DUPLEX_FULL){
1901 ipg_data->ipg = DEFAULT_IPG; 1899 ipg_data->ipg = DEFAULT_IPG;
1902 return; 1900 return;
1903 } 1901 }
1904 1902
1905 if(ipg_data->ipg_state == SSTATE){ 1903 if(ipg_data->ipg_state == SSTATE){
1906 1904
1907 if(ipg_data->timer_tick == IPG_STABLE_TIME){ 1905 if(ipg_data->timer_tick == IPG_STABLE_TIME){
1908 1906
1909 ipg_data->timer_tick = 0; 1907 ipg_data->timer_tick = 0;
1910 ipg_data->ipg = MIN_IPG - IPG_STEP; 1908 ipg_data->ipg = MIN_IPG - IPG_STEP;
1911 ipg_data->current_ipg = MIN_IPG; 1909 ipg_data->current_ipg = MIN_IPG;
@@ -1917,15 +1915,15 @@ static void amd8111e_config_ipg(struct net_device* dev)
1917 } 1915 }
1918 1916
1919 if(ipg_data->ipg_state == CSTATE){ 1917 if(ipg_data->ipg_state == CSTATE){
1920 1918
1921 /* Get the current collision count */ 1919 /* Get the current collision count */
1922 1920
1923 total_col_cnt = ipg_data->col_cnt = 1921 total_col_cnt = ipg_data->col_cnt =
1924 amd8111e_read_mib(mmio, xmt_collisions); 1922 amd8111e_read_mib(mmio, xmt_collisions);
1925 1923
1926 if ((total_col_cnt - prev_col_cnt) < 1924 if ((total_col_cnt - prev_col_cnt) <
1927 (ipg_data->diff_col_cnt)){ 1925 (ipg_data->diff_col_cnt)){
1928 1926
1929 ipg_data->diff_col_cnt = 1927 ipg_data->diff_col_cnt =
1930 total_col_cnt - prev_col_cnt ; 1928 total_col_cnt - prev_col_cnt ;
1931 1929
@@ -1940,8 +1938,8 @@ static void amd8111e_config_ipg(struct net_device* dev)
1940 tmp_ipg = ipg_data->ipg; 1938 tmp_ipg = ipg_data->ipg;
1941 ipg_data->ipg_state = SSTATE; 1939 ipg_data->ipg_state = SSTATE;
1942 } 1940 }
1943 writew((u32)tmp_ipg, mmio + IPG); 1941 writew((u32)tmp_ipg, mmio + IPG);
1944 writew((u32)(tmp_ipg - IFS1_DELTA), mmio + IFS1); 1942 writew((u32)(tmp_ipg - IFS1_DELTA), mmio + IFS1);
1945 } 1943 }
1946 mod_timer(&lp->ipg_data.ipg_timer, jiffies + IPG_CONVERGE_JIFFIES); 1944 mod_timer(&lp->ipg_data.ipg_timer, jiffies + IPG_CONVERGE_JIFFIES);
1947 return; 1945 return;
@@ -2012,7 +2010,7 @@ static int __devinit amd8111e_probe_one(struct pci_dev *pdev,
2012 "exiting.\n"); 2010 "exiting.\n");
2013 goto err_free_reg; 2011 goto err_free_reg;
2014 } 2012 }
2015 2013
2016 reg_addr = pci_resource_start(pdev, 0); 2014 reg_addr = pci_resource_start(pdev, 0);
2017 reg_len = pci_resource_len(pdev, 0); 2015 reg_len = pci_resource_len(pdev, 0);
2018 2016
@@ -2030,8 +2028,8 @@ static int __devinit amd8111e_probe_one(struct pci_dev *pdev,
2030 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX ; 2028 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX ;
2031 dev->vlan_rx_register =amd8111e_vlan_rx_register; 2029 dev->vlan_rx_register =amd8111e_vlan_rx_register;
2032 dev->vlan_rx_kill_vid = amd8111e_vlan_rx_kill_vid; 2030 dev->vlan_rx_kill_vid = amd8111e_vlan_rx_kill_vid;
2033#endif 2031#endif
2034 2032
2035 lp = netdev_priv(dev); 2033 lp = netdev_priv(dev);
2036 lp->pci_dev = pdev; 2034 lp->pci_dev = pdev;
2037 lp->amd8111e_net_dev = dev; 2035 lp->amd8111e_net_dev = dev;
@@ -2046,17 +2044,17 @@ static int __devinit amd8111e_probe_one(struct pci_dev *pdev,
2046 err = -ENOMEM; 2044 err = -ENOMEM;
2047 goto err_free_dev; 2045 goto err_free_dev;
2048 } 2046 }
2049 2047
2050 /* Initializing MAC address */ 2048 /* Initializing MAC address */
2051 for(i = 0; i < ETH_ADDR_LEN; i++) 2049 for(i = 0; i < ETH_ADDR_LEN; i++)
2052 dev->dev_addr[i] =readb(lp->mmio + PADR + i); 2050 dev->dev_addr[i] =readb(lp->mmio + PADR + i);
2053 2051
2054 /* Setting user defined parametrs */ 2052 /* Setting user defined parametrs */
2055 lp->ext_phy_option = speed_duplex[card_idx]; 2053 lp->ext_phy_option = speed_duplex[card_idx];
2056 if(coalesce[card_idx]) 2054 if(coalesce[card_idx])
2057 lp->options |= OPTION_INTR_COAL_ENABLE; 2055 lp->options |= OPTION_INTR_COAL_ENABLE;
2058 if(dynamic_ipg[card_idx++]) 2056 if(dynamic_ipg[card_idx++])
2059 lp->options |= OPTION_DYN_IPG_ENABLE; 2057 lp->options |= OPTION_DYN_IPG_ENABLE;
2060 2058
2061 /* Initialize driver entry points */ 2059 /* Initialize driver entry points */
2062 dev->open = amd8111e_open; 2060 dev->open = amd8111e_open;
@@ -2069,21 +2067,21 @@ static int __devinit amd8111e_probe_one(struct pci_dev *pdev,
2069 dev->change_mtu = amd8111e_change_mtu; 2067 dev->change_mtu = amd8111e_change_mtu;
2070 SET_ETHTOOL_OPS(dev, &ops); 2068 SET_ETHTOOL_OPS(dev, &ops);
2071 dev->irq =pdev->irq; 2069 dev->irq =pdev->irq;
2072 dev->tx_timeout = amd8111e_tx_timeout; 2070 dev->tx_timeout = amd8111e_tx_timeout;
2073 dev->watchdog_timeo = AMD8111E_TX_TIMEOUT; 2071 dev->watchdog_timeo = AMD8111E_TX_TIMEOUT;
2074#ifdef CONFIG_AMD8111E_NAPI 2072#ifdef CONFIG_AMD8111E_NAPI
2075 dev->poll = amd8111e_rx_poll; 2073 dev->poll = amd8111e_rx_poll;
2076 dev->weight = 32; 2074 dev->weight = 32;
2077#endif 2075#endif
2078#ifdef CONFIG_NET_POLL_CONTROLLER 2076#ifdef CONFIG_NET_POLL_CONTROLLER
2079 dev->poll_controller = amd8111e_poll; 2077 dev->poll_controller = amd8111e_poll;
2080#endif 2078#endif
2081 2079
2082#if AMD8111E_VLAN_TAG_USED 2080#if AMD8111E_VLAN_TAG_USED
2083 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; 2081 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
2084 dev->vlan_rx_register =amd8111e_vlan_rx_register; 2082 dev->vlan_rx_register =amd8111e_vlan_rx_register;
2085 dev->vlan_rx_kill_vid = amd8111e_vlan_rx_kill_vid; 2083 dev->vlan_rx_kill_vid = amd8111e_vlan_rx_kill_vid;
2086#endif 2084#endif
2087 /* Probe the external PHY */ 2085 /* Probe the external PHY */
2088 amd8111e_probe_ext_phy(dev); 2086 amd8111e_probe_ext_phy(dev);
2089 2087
@@ -2105,13 +2103,13 @@ static int __devinit amd8111e_probe_one(struct pci_dev *pdev,
2105 } 2103 }
2106 2104
2107 pci_set_drvdata(pdev, dev); 2105 pci_set_drvdata(pdev, dev);
2108 2106
2109 /* Initialize software ipg timer */ 2107 /* Initialize software ipg timer */
2110 if(lp->options & OPTION_DYN_IPG_ENABLE){ 2108 if(lp->options & OPTION_DYN_IPG_ENABLE){
2111 init_timer(&lp->ipg_data.ipg_timer); 2109 init_timer(&lp->ipg_data.ipg_timer);
2112 lp->ipg_data.ipg_timer.data = (unsigned long) dev; 2110 lp->ipg_data.ipg_timer.data = (unsigned long) dev;
2113 lp->ipg_data.ipg_timer.function = (void *)&amd8111e_config_ipg; 2111 lp->ipg_data.ipg_timer.function = (void *)&amd8111e_config_ipg;
2114 lp->ipg_data.ipg_timer.expires = jiffies + 2112 lp->ipg_data.ipg_timer.expires = jiffies +
2115 IPG_CONVERGE_JIFFIES; 2113 IPG_CONVERGE_JIFFIES;
2116 lp->ipg_data.ipg = DEFAULT_IPG; 2114 lp->ipg_data.ipg = DEFAULT_IPG;
2117 lp->ipg_data.ipg_state = CSTATE; 2115 lp->ipg_data.ipg_state = CSTATE;
@@ -2124,7 +2122,7 @@ static int __devinit amd8111e_probe_one(struct pci_dev *pdev,
2124 printk(KERN_INFO "%s: [ Rev %x ] PCI 10/100BaseT Ethernet ", dev->name, chip_version); 2122 printk(KERN_INFO "%s: [ Rev %x ] PCI 10/100BaseT Ethernet ", dev->name, chip_version);
2125 for (i = 0; i < 6; i++) 2123 for (i = 0; i < 6; i++)
2126 printk("%2.2x%c",dev->dev_addr[i],i == 5 ? ' ' : ':'); 2124 printk("%2.2x%c",dev->dev_addr[i],i == 5 ? ' ' : ':');
2127 printk( "\n"); 2125 printk( "\n");
2128 if (lp->ext_phy_id) 2126 if (lp->ext_phy_id)
2129 printk(KERN_INFO "%s: Found MII PHY ID 0x%08x at address 0x%02x\n", 2127 printk(KERN_INFO "%s: Found MII PHY ID 0x%08x at address 0x%02x\n",
2130 dev->name, lp->ext_phy_id, lp->ext_phy_addr); 2128 dev->name, lp->ext_phy_id, lp->ext_phy_addr);
@@ -2159,7 +2157,7 @@ static struct pci_driver amd8111e_driver = {
2159 2157
2160static int __init amd8111e_init(void) 2158static int __init amd8111e_init(void)
2161{ 2159{
2162 return pci_module_init(&amd8111e_driver); 2160 return pci_register_driver(&amd8111e_driver);
2163} 2161}
2164 2162
2165static void __exit amd8111e_cleanup(void) 2163static void __exit amd8111e_cleanup(void)