diff options
Diffstat (limited to 'drivers/gpu/pvr/omap4/sysconfig.c')
-rw-r--r-- | drivers/gpu/pvr/omap4/sysconfig.c | 978 |
1 files changed, 978 insertions, 0 deletions
diff --git a/drivers/gpu/pvr/omap4/sysconfig.c b/drivers/gpu/pvr/omap4/sysconfig.c new file mode 100644 index 00000000000..3b4955445b7 --- /dev/null +++ b/drivers/gpu/pvr/omap4/sysconfig.c | |||
@@ -0,0 +1,978 @@ | |||
1 | /********************************************************************** | ||
2 | * | ||
3 | * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms and conditions of the GNU General Public License, | ||
7 | * version 2, as published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope it will be useful but, except | ||
10 | * as otherwise stated in writing, without any warranty; without even the | ||
11 | * implied warranty of merchantability or fitness for a particular purpose. | ||
12 | * See the GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License along with | ||
15 | * this program; if not, write to the Free Software Foundation, Inc., | ||
16 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
17 | * | ||
18 | * The full GNU General Public License is included in this distribution in | ||
19 | * the file called "COPYING". | ||
20 | * | ||
21 | * Contact Information: | ||
22 | * Imagination Technologies Ltd. <gpl-support@imgtec.com> | ||
23 | * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK | ||
24 | * | ||
25 | ******************************************************************************/ | ||
26 | |||
27 | #include "services_headers.h" | ||
28 | #include "kerneldisplay.h" | ||
29 | #include "oemfuncs.h" | ||
30 | #include "sgxinfo.h" | ||
31 | #include "sgxinfokm.h" | ||
32 | #include "syslocal.h" | ||
33 | #include "sysconfig.h" | ||
34 | |||
35 | #include "ocpdefs.h" | ||
36 | |||
37 | #if !defined(NO_HARDWARE) && \ | ||
38 | defined(SYS_USING_INTERRUPTS) && \ | ||
39 | defined(SGX540) | ||
40 | #define SGX_OCP_REGS_ENABLED | ||
41 | #endif | ||
42 | |||
43 | SYS_DATA* gpsSysData = (SYS_DATA*)IMG_NULL; | ||
44 | SYS_DATA gsSysData; | ||
45 | |||
46 | static SYS_SPECIFIC_DATA gsSysSpecificData; | ||
47 | SYS_SPECIFIC_DATA *gpsSysSpecificData; | ||
48 | |||
49 | static IMG_UINT32 gui32SGXDeviceID; | ||
50 | static SGX_DEVICE_MAP gsSGXDeviceMap; | ||
51 | static PVRSRV_DEVICE_NODE *gpsSGXDevNode; | ||
52 | |||
53 | #define DEVICE_SGX_INTERRUPT (1 << 0) | ||
54 | |||
55 | #if defined(NO_HARDWARE) | ||
56 | static IMG_CPU_VIRTADDR gsSGXRegsCPUVAddr; | ||
57 | #endif | ||
58 | |||
59 | IMG_UINT32 PVRSRV_BridgeDispatchKM(IMG_UINT32 Ioctl, | ||
60 | IMG_BYTE *pInBuf, | ||
61 | IMG_UINT32 InBufLen, | ||
62 | IMG_BYTE *pOutBuf, | ||
63 | IMG_UINT32 OutBufLen, | ||
64 | IMG_UINT32 *pdwBytesTransferred); | ||
65 | |||
66 | #if defined(DEBUG) && defined(DUMP_OMAP34xx_CLOCKS) && defined(__linux__) | ||
67 | |||
68 | #pragma GCC diagnostic ignored "-Wstrict-prototypes" | ||
69 | #include <mach/clock.h> | ||
70 | |||
71 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)) | ||
72 | #include <../mach-omap2/clock_34xx.h> | ||
73 | #define ONCHIP_CLKS onchip_clks | ||
74 | #else | ||
75 | #include <../mach-omap2/clock34xx.h> | ||
76 | #define ONCHIP_CLKS onchip_34xx_clks | ||
77 | #endif | ||
78 | |||
79 | static void omap3_clk_recalc(struct clk *clk) {} | ||
80 | static void omap3_followparent_recalc(struct clk *clk) {} | ||
81 | static void omap3_propagate_rate(struct clk *clk) {} | ||
82 | static void omap3_table_recalc(struct clk *clk) {} | ||
83 | static long omap3_round_to_table_rate(struct clk *clk, unsigned long rate) { return 0; } | ||
84 | static int omap3_select_table_rate(struct clk *clk, unsigned long rate) { return 0; } | ||
85 | |||
86 | #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)) | ||
87 | static void omap3_dpll_recalc(struct clk *clk, unsigned long parent_rate, | ||
88 | u8 rate_storage) {} | ||
89 | static void omap3_clkoutx2_recalc(struct clk *clk, unsigned long parent_rate, | ||
90 | u8 rate_storage) {} | ||
91 | static void omap3_dpll_allow_idle(struct clk *clk) {} | ||
92 | static void omap3_dpll_deny_idle(struct clk *clk) {} | ||
93 | static u32 omap3_dpll_autoidle_read(struct clk *clk) { return 0; } | ||
94 | static int omap3_noncore_dpll_enable(struct clk *clk) { return 0; } | ||
95 | static void omap3_noncore_dpll_disable(struct clk *clk) {} | ||
96 | static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) { return 0; } | ||
97 | static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) { return 0; } | ||
98 | void followparent_recalc(struct clk *clk, unsigned long new_parent_rate, | ||
99 | u8 rate_storage) {} | ||
100 | long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate) { return 0; } | ||
101 | void omap2_clksel_recalc(struct clk *clk, unsigned long new_parent_rate, | ||
102 | u8 rate_storage) {} | ||
103 | long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate) { return 0; } | ||
104 | int omap2_clksel_set_rate(struct clk *clk, unsigned long rate) { return 0; } | ||
105 | void omap2_fixed_divisor_recalc(struct clk *clk, unsigned long new_parent_rate, | ||
106 | u8 rate_storage) {} | ||
107 | void omap2_init_clksel_parent(struct clk *clk) {} | ||
108 | #endif | ||
109 | |||
110 | static void dump_omap34xx_clocks(void) | ||
111 | { | ||
112 | struct clk **c; | ||
113 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)) | ||
114 | struct vdd_prcm_config *t1 = vdd1_rate_table; | ||
115 | struct vdd_prcm_config *t2 = vdd2_rate_table; | ||
116 | |||
117 | t1 = t1; | ||
118 | t2 = t2; | ||
119 | #else | ||
120 | |||
121 | omap3_dpll_allow_idle(0); | ||
122 | omap3_dpll_deny_idle(0); | ||
123 | omap3_dpll_autoidle_read(0); | ||
124 | omap3_clk_recalc(0); | ||
125 | omap3_followparent_recalc(0); | ||
126 | omap3_propagate_rate(0); | ||
127 | omap3_table_recalc(0); | ||
128 | omap3_round_to_table_rate(0, 0); | ||
129 | omap3_select_table_rate(0, 0); | ||
130 | #endif | ||
131 | |||
132 | for(c = ONCHIP_CLKS; c < ONCHIP_CLKS + ARRAY_SIZE(ONCHIP_CLKS); c++) | ||
133 | { | ||
134 | struct clk *cp = *c, *copy; | ||
135 | unsigned long rate; | ||
136 | copy = clk_get(NULL, cp->name); | ||
137 | if(!copy) | ||
138 | continue; | ||
139 | rate = clk_get_rate(copy); | ||
140 | if (rate < 1000000) | ||
141 | { | ||
142 | PVR_DPF((PVR_DBG_ERROR, "%s: clock %s is %lu KHz (%lu Hz)", __func__, cp->name, rate/1000, rate)); | ||
143 | } | ||
144 | else | ||
145 | { | ||
146 | PVR_DPF((PVR_DBG_ERROR, "%s: clock %s is %lu MHz (%lu Hz)", __func__, cp->name, rate/1000000, rate)); | ||
147 | } | ||
148 | } | ||
149 | } | ||
150 | |||
151 | #else | ||
152 | |||
153 | static INLINE void dump_omap34xx_clocks(void) {} | ||
154 | |||
155 | #endif | ||
156 | |||
157 | #if defined(SGX_OCP_REGS_ENABLED) | ||
158 | |||
159 | #define SYS_OMAP4430_OCP_REGS_SYS_PHYS_BASE (SYS_OMAP4430_SGX_REGS_SYS_PHYS_BASE + EUR_CR_OCP_REVISION) | ||
160 | #define SYS_OMAP4430_OCP_REGS_SIZE 0x110 | ||
161 | |||
162 | static IMG_CPU_VIRTADDR gpvOCPRegsLinAddr; | ||
163 | |||
164 | static PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData) | ||
165 | { | ||
166 | PVRSRV_ERROR eError = EnableSGXClocks(psSysData); | ||
167 | |||
168 | if(eError == PVRSRV_OK) | ||
169 | { | ||
170 | OSWriteHWReg(gpvOCPRegsLinAddr, | ||
171 | EUR_CR_OCP_DEBUG_CONFIG - EUR_CR_OCP_REVISION, | ||
172 | EUR_CR_OCP_DEBUG_CONFIG_THALIA_INT_BYPASS_MASK); | ||
173 | } | ||
174 | |||
175 | return eError; | ||
176 | } | ||
177 | |||
178 | #else | ||
179 | |||
180 | static INLINE PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData) | ||
181 | { | ||
182 | return EnableSGXClocks(psSysData); | ||
183 | } | ||
184 | |||
185 | #endif | ||
186 | |||
187 | static INLINE PVRSRV_ERROR EnableSystemClocksWrap(SYS_DATA *psSysData) | ||
188 | { | ||
189 | PVRSRV_ERROR eError = EnableSystemClocks(psSysData); | ||
190 | |||
191 | #if !defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) | ||
192 | if(eError == PVRSRV_OK) | ||
193 | { | ||
194 | |||
195 | EnableSGXClocksWrap(psSysData); | ||
196 | } | ||
197 | #endif | ||
198 | |||
199 | return eError; | ||
200 | } | ||
201 | |||
202 | static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData) | ||
203 | { | ||
204 | #if defined(NO_HARDWARE) | ||
205 | PVRSRV_ERROR eError; | ||
206 | IMG_CPU_PHYADDR sCpuPAddr; | ||
207 | #endif | ||
208 | |||
209 | PVR_UNREFERENCED_PARAMETER(psSysData); | ||
210 | |||
211 | |||
212 | gsSGXDeviceMap.ui32Flags = 0x0; | ||
213 | |||
214 | #if defined(NO_HARDWARE) | ||
215 | |||
216 | |||
217 | eError = OSBaseAllocContigMemory(SYS_OMAP4430_SGX_REGS_SIZE, | ||
218 | &gsSGXRegsCPUVAddr, | ||
219 | &sCpuPAddr); | ||
220 | if(eError != PVRSRV_OK) | ||
221 | { | ||
222 | return eError; | ||
223 | } | ||
224 | gsSGXDeviceMap.sRegsCpuPBase = sCpuPAddr; | ||
225 | gsSGXDeviceMap.sRegsSysPBase = SysCpuPAddrToSysPAddr(gsSGXDeviceMap.sRegsCpuPBase); | ||
226 | gsSGXDeviceMap.ui32RegsSize = SYS_OMAP4430_SGX_REGS_SIZE; | ||
227 | #if defined(__linux__) | ||
228 | |||
229 | gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr; | ||
230 | #else | ||
231 | |||
232 | gsSGXDeviceMap.pvRegsCpuVBase = IMG_NULL; | ||
233 | #endif | ||
234 | |||
235 | OSMemSet(gsSGXRegsCPUVAddr, 0, SYS_OMAP4430_SGX_REGS_SIZE); | ||
236 | |||
237 | |||
238 | |||
239 | |||
240 | gsSGXDeviceMap.ui32IRQ = 0; | ||
241 | |||
242 | #else | ||
243 | |||
244 | gsSGXDeviceMap.sRegsSysPBase.uiAddr = SYS_OMAP4430_SGX_REGS_SYS_PHYS_BASE; | ||
245 | gsSGXDeviceMap.sRegsCpuPBase = SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase); | ||
246 | gsSGXDeviceMap.ui32RegsSize = SYS_OMAP4430_SGX_REGS_SIZE; | ||
247 | |||
248 | gsSGXDeviceMap.ui32IRQ = SYS_OMAP4430_SGX_IRQ; | ||
249 | |||
250 | #endif | ||
251 | |||
252 | #if defined(PDUMP) | ||
253 | { | ||
254 | |||
255 | static IMG_CHAR pszPDumpDevName[] = "SGXMEM"; | ||
256 | gsSGXDeviceMap.pszPDumpDevName = pszPDumpDevName; | ||
257 | } | ||
258 | #endif | ||
259 | |||
260 | |||
261 | |||
262 | |||
263 | |||
264 | return PVRSRV_OK; | ||
265 | } | ||
266 | |||
267 | |||
268 | IMG_CHAR *SysCreateVersionString(IMG_CPU_PHYADDR sRegRegion) | ||
269 | { | ||
270 | static IMG_CHAR aszVersionString[100]; | ||
271 | SYS_DATA *psSysData; | ||
272 | IMG_UINT32 ui32SGXRevision; | ||
273 | IMG_INT32 i32Count; | ||
274 | #if !defined(NO_HARDWARE) | ||
275 | IMG_VOID *pvRegsLinAddr; | ||
276 | |||
277 | pvRegsLinAddr = OSMapPhysToLin(sRegRegion, | ||
278 | SYS_OMAP4430_SGX_REGS_SIZE, | ||
279 | PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY, | ||
280 | IMG_NULL); | ||
281 | if(!pvRegsLinAddr) | ||
282 | { | ||
283 | return IMG_NULL; | ||
284 | } | ||
285 | |||
286 | ui32SGXRevision = OSReadHWReg((IMG_PVOID)((IMG_PBYTE)pvRegsLinAddr), | ||
287 | EUR_CR_CORE_REVISION); | ||
288 | #else | ||
289 | ui32SGXRevision = 0; | ||
290 | #endif | ||
291 | |||
292 | SysAcquireData(&psSysData); | ||
293 | |||
294 | i32Count = OSSNPrintf(aszVersionString, 100, | ||
295 | "SGX revision = %u.%u.%u", | ||
296 | (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MAJOR_MASK) | ||
297 | >> EUR_CR_CORE_REVISION_MAJOR_SHIFT), | ||
298 | (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MINOR_MASK) | ||
299 | >> EUR_CR_CORE_REVISION_MINOR_SHIFT), | ||
300 | (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MAINTENANCE_MASK) | ||
301 | >> EUR_CR_CORE_REVISION_MAINTENANCE_SHIFT) | ||
302 | ); | ||
303 | |||
304 | #if !defined(NO_HARDWARE) | ||
305 | OSUnMapPhysToLin(pvRegsLinAddr, | ||
306 | SYS_OMAP4430_SGX_REGS_SIZE, | ||
307 | PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY, | ||
308 | IMG_NULL); | ||
309 | #endif | ||
310 | |||
311 | if(i32Count == -1) | ||
312 | { | ||
313 | return IMG_NULL; | ||
314 | } | ||
315 | |||
316 | return aszVersionString; | ||
317 | } | ||
318 | |||
319 | |||
320 | PVRSRV_ERROR SysInitialise(IMG_VOID) | ||
321 | { | ||
322 | IMG_UINT32 i; | ||
323 | PVRSRV_ERROR eError; | ||
324 | PVRSRV_DEVICE_NODE *psDeviceNode; | ||
325 | #if !defined(NO_OMAP_TIMER) | ||
326 | IMG_CPU_PHYADDR TimerRegPhysBase; | ||
327 | #endif | ||
328 | #if !defined(SGX_DYNAMIC_TIMING_INFO) | ||
329 | SGX_TIMING_INFORMATION* psTimingInfo; | ||
330 | #endif | ||
331 | gpsSysData = &gsSysData; | ||
332 | OSMemSet(gpsSysData, 0, sizeof(SYS_DATA)); | ||
333 | |||
334 | gpsSysSpecificData = &gsSysSpecificData; | ||
335 | OSMemSet(gpsSysSpecificData, 0, sizeof(SYS_SPECIFIC_DATA)); | ||
336 | |||
337 | gpsSysData->pvSysSpecificData = gpsSysSpecificData; | ||
338 | |||
339 | eError = OSInitEnvData(&gpsSysData->pvEnvSpecificData); | ||
340 | if (eError != PVRSRV_OK) | ||
341 | { | ||
342 | PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to setup env structure")); | ||
343 | (IMG_VOID)SysDeinitialise(gpsSysData); | ||
344 | gpsSysData = IMG_NULL; | ||
345 | return eError; | ||
346 | } | ||
347 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_ENVDATA); | ||
348 | |||
349 | gpsSysData->ui32NumDevices = SYS_DEVICE_COUNT; | ||
350 | |||
351 | |||
352 | for(i=0; i<SYS_DEVICE_COUNT; i++) | ||
353 | { | ||
354 | gpsSysData->sDeviceID[i].uiID = i; | ||
355 | gpsSysData->sDeviceID[i].bInUse = IMG_FALSE; | ||
356 | } | ||
357 | |||
358 | gpsSysData->psDeviceNodeList = IMG_NULL; | ||
359 | gpsSysData->psQueueList = IMG_NULL; | ||
360 | |||
361 | eError = SysInitialiseCommon(gpsSysData); | ||
362 | if (eError != PVRSRV_OK) | ||
363 | { | ||
364 | PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed in SysInitialiseCommon")); | ||
365 | (IMG_VOID)SysDeinitialise(gpsSysData); | ||
366 | gpsSysData = IMG_NULL; | ||
367 | return eError; | ||
368 | } | ||
369 | |||
370 | #if !defined(NO_OMAP_TIMER) | ||
371 | TimerRegPhysBase.uiAddr = SYS_OMAP3430_GP11TIMER_REGS_SYS_PHYS_BASE; | ||
372 | gpsSysData->pvSOCTimerRegisterKM = IMG_NULL; | ||
373 | gpsSysData->hSOCTimerRegisterOSMemHandle = 0; | ||
374 | OSReservePhys(TimerRegPhysBase, | ||
375 | 4, | ||
376 | PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED, | ||
377 | (IMG_VOID **)&gpsSysData->pvSOCTimerRegisterKM, | ||
378 | &gpsSysData->hSOCTimerRegisterOSMemHandle); | ||
379 | #endif | ||
380 | |||
381 | #if !defined(SGX_DYNAMIC_TIMING_INFO) | ||
382 | |||
383 | psTimingInfo = &gsSGXDeviceMap.sTimingInfo; | ||
384 | psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED; | ||
385 | psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ; | ||
386 | #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) | ||
387 | psTimingInfo->bEnableActivePM = IMG_TRUE; | ||
388 | #else | ||
389 | psTimingInfo->bEnableActivePM = IMG_FALSE; | ||
390 | #endif | ||
391 | psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS; | ||
392 | psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ; | ||
393 | #endif | ||
394 | |||
395 | |||
396 | |||
397 | gpsSysSpecificData->ui32SrcClockDiv = 3; | ||
398 | |||
399 | |||
400 | |||
401 | |||
402 | |||
403 | eError = SysLocateDevices(gpsSysData); | ||
404 | if (eError != PVRSRV_OK) | ||
405 | { | ||
406 | PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to locate devices")); | ||
407 | (IMG_VOID)SysDeinitialise(gpsSysData); | ||
408 | gpsSysData = IMG_NULL; | ||
409 | return eError; | ||
410 | } | ||
411 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV); | ||
412 | |||
413 | #if defined(SGX_OCP_REGS_ENABLED) | ||
414 | { | ||
415 | IMG_SYS_PHYADDR sOCPRegsSysPBase; | ||
416 | IMG_CPU_PHYADDR sOCPRegsCpuPBase; | ||
417 | |||
418 | sOCPRegsSysPBase.uiAddr = SYS_OMAP4430_OCP_REGS_SYS_PHYS_BASE; | ||
419 | sOCPRegsCpuPBase = SysSysPAddrToCpuPAddr(sOCPRegsSysPBase); | ||
420 | |||
421 | gpvOCPRegsLinAddr = OSMapPhysToLin(sOCPRegsCpuPBase, | ||
422 | SYS_OMAP4430_OCP_REGS_SIZE, | ||
423 | PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY, | ||
424 | IMG_NULL); | ||
425 | |||
426 | if (gpvOCPRegsLinAddr == IMG_NULL) | ||
427 | { | ||
428 | PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to map OCP registers")); | ||
429 | return PVRSRV_ERROR_BAD_MAPPING; | ||
430 | } | ||
431 | } | ||
432 | #endif | ||
433 | |||
434 | |||
435 | |||
436 | |||
437 | eError = PVRSRVRegisterDevice(gpsSysData, SGXRegisterDevice, | ||
438 | DEVICE_SGX_INTERRUPT, &gui32SGXDeviceID); | ||
439 | if (eError != PVRSRV_OK) | ||
440 | { | ||
441 | PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to register device!")); | ||
442 | (IMG_VOID)SysDeinitialise(gpsSysData); | ||
443 | gpsSysData = IMG_NULL; | ||
444 | return eError; | ||
445 | } | ||
446 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_REGDEV); | ||
447 | |||
448 | |||
449 | |||
450 | |||
451 | psDeviceNode = gpsSysData->psDeviceNodeList; | ||
452 | while(psDeviceNode) | ||
453 | { | ||
454 | |||
455 | switch(psDeviceNode->sDevId.eDeviceType) | ||
456 | { | ||
457 | case PVRSRV_DEVICE_TYPE_SGX: | ||
458 | { | ||
459 | DEVICE_MEMORY_INFO *psDevMemoryInfo; | ||
460 | DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap; | ||
461 | |||
462 | |||
463 | |||
464 | |||
465 | psDeviceNode->psLocalDevMemArena = IMG_NULL; | ||
466 | |||
467 | |||
468 | psDevMemoryInfo = &psDeviceNode->sDevMemoryInfo; | ||
469 | psDeviceMemoryHeap = psDevMemoryInfo->psDeviceMemoryHeap; | ||
470 | |||
471 | |||
472 | for(i=0; i<psDevMemoryInfo->ui32HeapCount; i++) | ||
473 | { | ||
474 | psDeviceMemoryHeap[i].ui32Attribs |= PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG; | ||
475 | } | ||
476 | |||
477 | gpsSGXDevNode = psDeviceNode; | ||
478 | gsSysSpecificData.psSGXDevNode = psDeviceNode; | ||
479 | |||
480 | break; | ||
481 | } | ||
482 | default: | ||
483 | PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to find SGX device node!")); | ||
484 | return PVRSRV_ERROR_INIT_FAILURE; | ||
485 | } | ||
486 | |||
487 | |||
488 | psDeviceNode = psDeviceNode->psNext; | ||
489 | } | ||
490 | |||
491 | eError = EnableSystemClocksWrap(gpsSysData); | ||
492 | if (eError != PVRSRV_OK) | ||
493 | { | ||
494 | PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to Enable system clocks (%d)", eError)); | ||
495 | (IMG_VOID)SysDeinitialise(gpsSysData); | ||
496 | gpsSysData = IMG_NULL; | ||
497 | return eError; | ||
498 | } | ||
499 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS); | ||
500 | #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) | ||
501 | eError = EnableSGXClocksWrap(gpsSysData); | ||
502 | if (eError != PVRSRV_OK) | ||
503 | { | ||
504 | PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to Enable SGX clocks (%d)", eError)); | ||
505 | (IMG_VOID)SysDeinitialise(gpsSysData); | ||
506 | gpsSysData = IMG_NULL; | ||
507 | return eError; | ||
508 | } | ||
509 | #endif | ||
510 | |||
511 | dump_omap34xx_clocks(); | ||
512 | |||
513 | eError = PVRSRVInitialiseDevice(gui32SGXDeviceID); | ||
514 | if (eError != PVRSRV_OK) | ||
515 | { | ||
516 | PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to initialise device!")); | ||
517 | (IMG_VOID)SysDeinitialise(gpsSysData); | ||
518 | gpsSysData = IMG_NULL; | ||
519 | return eError; | ||
520 | } | ||
521 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_INITDEV); | ||
522 | |||
523 | #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) | ||
524 | |||
525 | DisableSGXClocks(gpsSysData); | ||
526 | #endif | ||
527 | |||
528 | return PVRSRV_OK; | ||
529 | } | ||
530 | |||
531 | |||
532 | PVRSRV_ERROR SysFinalise(IMG_VOID) | ||
533 | { | ||
534 | PVRSRV_ERROR eError = PVRSRV_OK; | ||
535 | |||
536 | #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) | ||
537 | eError = EnableSGXClocksWrap(gpsSysData); | ||
538 | if (eError != PVRSRV_OK) | ||
539 | { | ||
540 | PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to Enable SGX clocks (%d)", eError)); | ||
541 | (IMG_VOID)SysDeinitialise(gpsSysData); | ||
542 | gpsSysData = IMG_NULL; | ||
543 | return eError; | ||
544 | } | ||
545 | #endif | ||
546 | |||
547 | #if defined(SYS_USING_INTERRUPTS) | ||
548 | |||
549 | eError = OSInstallMISR(gpsSysData); | ||
550 | if (eError != PVRSRV_OK) | ||
551 | { | ||
552 | PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to install MISR")); | ||
553 | (IMG_VOID)SysDeinitialise(gpsSysData); | ||
554 | gpsSysData = IMG_NULL; | ||
555 | return eError; | ||
556 | } | ||
557 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR); | ||
558 | |||
559 | |||
560 | eError = OSInstallDeviceLISR(gpsSysData, gsSGXDeviceMap.ui32IRQ, "SGX ISR", gpsSGXDevNode); | ||
561 | if (eError != PVRSRV_OK) | ||
562 | { | ||
563 | PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to install ISR")); | ||
564 | (IMG_VOID)SysDeinitialise(gpsSysData); | ||
565 | gpsSysData = IMG_NULL; | ||
566 | return eError; | ||
567 | } | ||
568 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR); | ||
569 | #endif | ||
570 | |||
571 | |||
572 | gpsSysData->pszVersionString = SysCreateVersionString(gsSGXDeviceMap.sRegsCpuPBase); | ||
573 | if (!gpsSysData->pszVersionString) | ||
574 | { | ||
575 | PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to create a system version string")); | ||
576 | } | ||
577 | else | ||
578 | { | ||
579 | PVR_DPF((PVR_DBG_WARNING, "SysFinalise: Version string: %s", gpsSysData->pszVersionString)); | ||
580 | } | ||
581 | |||
582 | #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) | ||
583 | |||
584 | DisableSGXClocks(gpsSysData); | ||
585 | #endif | ||
586 | |||
587 | gpsSysSpecificData->bSGXInitComplete = IMG_TRUE; | ||
588 | |||
589 | return eError; | ||
590 | } | ||
591 | |||
592 | |||
593 | PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData) | ||
594 | { | ||
595 | PVRSRV_ERROR eError; | ||
596 | |||
597 | #if defined(SYS_USING_INTERRUPTS) | ||
598 | if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR)) | ||
599 | { | ||
600 | eError = OSUninstallDeviceLISR(psSysData); | ||
601 | if (eError != PVRSRV_OK) | ||
602 | { | ||
603 | PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: OSUninstallDeviceLISR failed")); | ||
604 | return eError; | ||
605 | } | ||
606 | } | ||
607 | |||
608 | if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR)) | ||
609 | { | ||
610 | eError = OSUninstallMISR(psSysData); | ||
611 | if (eError != PVRSRV_OK) | ||
612 | { | ||
613 | PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: OSUninstallMISR failed")); | ||
614 | return eError; | ||
615 | } | ||
616 | } | ||
617 | #else | ||
618 | PVR_UNREFERENCED_PARAMETER(psSysData); | ||
619 | #endif | ||
620 | |||
621 | if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_INITDEV)) | ||
622 | { | ||
623 | #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) | ||
624 | PVR_ASSERT(SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS)); | ||
625 | |||
626 | eError = EnableSGXClocksWrap(gpsSysData); | ||
627 | if (eError != PVRSRV_OK) | ||
628 | { | ||
629 | PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: EnableSGXClocks failed")); | ||
630 | return eError; | ||
631 | } | ||
632 | #endif | ||
633 | |||
634 | |||
635 | eError = PVRSRVDeinitialiseDevice (gui32SGXDeviceID); | ||
636 | if (eError != PVRSRV_OK) | ||
637 | { | ||
638 | PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: failed to de-init the device")); | ||
639 | return eError; | ||
640 | } | ||
641 | } | ||
642 | |||
643 | #if defined(SGX_OCP_REGS_ENABLED) | ||
644 | OSUnMapPhysToLin(gpvOCPRegsLinAddr, | ||
645 | SYS_OMAP4430_OCP_REGS_SIZE, | ||
646 | PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY, | ||
647 | IMG_NULL); | ||
648 | #endif | ||
649 | |||
650 | |||
651 | |||
652 | if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS)) | ||
653 | { | ||
654 | DisableSystemClocks(gpsSysData); | ||
655 | } | ||
656 | |||
657 | if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_ENVDATA)) | ||
658 | { | ||
659 | eError = OSDeInitEnvData(gpsSysData->pvEnvSpecificData); | ||
660 | if (eError != PVRSRV_OK) | ||
661 | { | ||
662 | PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: failed to de-init env structure")); | ||
663 | return eError; | ||
664 | } | ||
665 | } | ||
666 | |||
667 | #if !defined(NO_OMAP_TIMER) | ||
668 | if(gpsSysData->pvSOCTimerRegisterKM) | ||
669 | { | ||
670 | OSUnReservePhys(gpsSysData->pvSOCTimerRegisterKM, | ||
671 | 4, | ||
672 | PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED, | ||
673 | gpsSysData->hSOCTimerRegisterOSMemHandle); | ||
674 | } | ||
675 | #endif | ||
676 | |||
677 | SysDeinitialiseCommon(gpsSysData); | ||
678 | |||
679 | #if defined(NO_HARDWARE) | ||
680 | if(SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV)) | ||
681 | { | ||
682 | |||
683 | OSBaseFreeContigMemory(SYS_OMAP4430_SGX_REGS_SIZE, gsSGXRegsCPUVAddr, gsSGXDeviceMap.sRegsCpuPBase); | ||
684 | } | ||
685 | #endif | ||
686 | |||
687 | gpsSysSpecificData->ui32SysSpecificData = 0; | ||
688 | gpsSysSpecificData->bSGXInitComplete = IMG_FALSE; | ||
689 | |||
690 | gpsSysData = IMG_NULL; | ||
691 | |||
692 | return PVRSRV_OK; | ||
693 | } | ||
694 | |||
695 | |||
696 | PVRSRV_ERROR SysGetDeviceMemoryMap(PVRSRV_DEVICE_TYPE eDeviceType, | ||
697 | IMG_VOID **ppvDeviceMap) | ||
698 | { | ||
699 | |||
700 | switch(eDeviceType) | ||
701 | { | ||
702 | case PVRSRV_DEVICE_TYPE_SGX: | ||
703 | { | ||
704 | |||
705 | *ppvDeviceMap = (IMG_VOID*)&gsSGXDeviceMap; | ||
706 | |||
707 | break; | ||
708 | } | ||
709 | default: | ||
710 | { | ||
711 | PVR_DPF((PVR_DBG_ERROR,"SysGetDeviceMemoryMap: unsupported device type")); | ||
712 | } | ||
713 | } | ||
714 | return PVRSRV_OK; | ||
715 | } | ||
716 | |||
717 | |||
718 | IMG_DEV_PHYADDR SysCpuPAddrToDevPAddr(PVRSRV_DEVICE_TYPE eDeviceType, | ||
719 | IMG_CPU_PHYADDR CpuPAddr) | ||
720 | { | ||
721 | IMG_DEV_PHYADDR DevPAddr; | ||
722 | |||
723 | PVR_UNREFERENCED_PARAMETER(eDeviceType); | ||
724 | |||
725 | |||
726 | DevPAddr.uiAddr = CpuPAddr.uiAddr; | ||
727 | |||
728 | return DevPAddr; | ||
729 | } | ||
730 | |||
731 | IMG_CPU_PHYADDR SysSysPAddrToCpuPAddr (IMG_SYS_PHYADDR sys_paddr) | ||
732 | { | ||
733 | IMG_CPU_PHYADDR cpu_paddr; | ||
734 | |||
735 | |||
736 | cpu_paddr.uiAddr = sys_paddr.uiAddr; | ||
737 | return cpu_paddr; | ||
738 | } | ||
739 | |||
740 | IMG_SYS_PHYADDR SysCpuPAddrToSysPAddr (IMG_CPU_PHYADDR cpu_paddr) | ||
741 | { | ||
742 | IMG_SYS_PHYADDR sys_paddr; | ||
743 | |||
744 | |||
745 | sys_paddr.uiAddr = cpu_paddr.uiAddr; | ||
746 | return sys_paddr; | ||
747 | } | ||
748 | |||
749 | |||
750 | IMG_DEV_PHYADDR SysSysPAddrToDevPAddr(PVRSRV_DEVICE_TYPE eDeviceType, IMG_SYS_PHYADDR SysPAddr) | ||
751 | { | ||
752 | IMG_DEV_PHYADDR DevPAddr; | ||
753 | |||
754 | PVR_UNREFERENCED_PARAMETER(eDeviceType); | ||
755 | |||
756 | |||
757 | DevPAddr.uiAddr = SysPAddr.uiAddr; | ||
758 | |||
759 | return DevPAddr; | ||
760 | } | ||
761 | |||
762 | |||
763 | IMG_SYS_PHYADDR SysDevPAddrToSysPAddr(PVRSRV_DEVICE_TYPE eDeviceType, IMG_DEV_PHYADDR DevPAddr) | ||
764 | { | ||
765 | IMG_SYS_PHYADDR SysPAddr; | ||
766 | |||
767 | PVR_UNREFERENCED_PARAMETER(eDeviceType); | ||
768 | |||
769 | |||
770 | SysPAddr.uiAddr = DevPAddr.uiAddr; | ||
771 | |||
772 | return SysPAddr; | ||
773 | } | ||
774 | |||
775 | |||
776 | IMG_VOID SysRegisterExternalDevice(PVRSRV_DEVICE_NODE *psDeviceNode) | ||
777 | { | ||
778 | PVR_UNREFERENCED_PARAMETER(psDeviceNode); | ||
779 | } | ||
780 | |||
781 | |||
782 | IMG_VOID SysRemoveExternalDevice(PVRSRV_DEVICE_NODE *psDeviceNode) | ||
783 | { | ||
784 | PVR_UNREFERENCED_PARAMETER(psDeviceNode); | ||
785 | } | ||
786 | |||
787 | |||
788 | IMG_UINT32 SysGetInterruptSource(SYS_DATA *psSysData, | ||
789 | PVRSRV_DEVICE_NODE *psDeviceNode) | ||
790 | { | ||
791 | PVR_UNREFERENCED_PARAMETER(psSysData); | ||
792 | #if defined(NO_HARDWARE) | ||
793 | |||
794 | return 0xFFFFFFFF; | ||
795 | #else | ||
796 | |||
797 | return psDeviceNode->ui32SOCInterruptBit; | ||
798 | #endif | ||
799 | } | ||
800 | |||
801 | |||
802 | IMG_VOID SysClearInterrupts(SYS_DATA* psSysData, IMG_UINT32 ui32ClearBits) | ||
803 | { | ||
804 | PVR_UNREFERENCED_PARAMETER(psSysData); | ||
805 | PVR_UNREFERENCED_PARAMETER(ui32ClearBits); | ||
806 | |||
807 | |||
808 | OSReadHWReg(((PVRSRV_SGXDEV_INFO *)gpsSGXDevNode->pvDevice)->pvRegsBaseKM, | ||
809 | EUR_CR_EVENT_HOST_CLEAR); | ||
810 | } | ||
811 | |||
812 | |||
813 | PVRSRV_ERROR SysSystemPrePowerState(PVRSRV_SYS_POWER_STATE eNewPowerState) | ||
814 | { | ||
815 | PVRSRV_ERROR eError = PVRSRV_OK; | ||
816 | |||
817 | if (eNewPowerState == PVRSRV_SYS_POWER_STATE_D3) | ||
818 | { | ||
819 | PVR_TRACE(("SysSystemPrePowerState: Entering state D3")); | ||
820 | |||
821 | #if defined(SYS_USING_INTERRUPTS) | ||
822 | if (SYS_SPECIFIC_DATA_TEST(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR)) | ||
823 | { | ||
824 | #if defined(SYS_CUSTOM_POWERLOCK_WRAP) | ||
825 | IMG_BOOL bWrapped = WrapSystemPowerChange(&gsSysSpecificData); | ||
826 | #endif | ||
827 | eError = OSUninstallDeviceLISR(gpsSysData); | ||
828 | #if defined(SYS_CUSTOM_POWERLOCK_WRAP) | ||
829 | if (bWrapped) | ||
830 | { | ||
831 | UnwrapSystemPowerChange(&gsSysSpecificData); | ||
832 | } | ||
833 | #endif | ||
834 | if (eError != PVRSRV_OK) | ||
835 | { | ||
836 | PVR_DPF((PVR_DBG_ERROR,"SysSystemPrePowerState: OSUninstallDeviceLISR failed (%d)", eError)); | ||
837 | return eError; | ||
838 | } | ||
839 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_PM_UNINSTALL_LISR); | ||
840 | SYS_SPECIFIC_DATA_CLEAR(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR); | ||
841 | } | ||
842 | #endif | ||
843 | |||
844 | if (SYS_SPECIFIC_DATA_TEST(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS)) | ||
845 | { | ||
846 | DisableSystemClocks(gpsSysData); | ||
847 | |||
848 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_PM_DISABLE_SYSCLOCKS); | ||
849 | SYS_SPECIFIC_DATA_CLEAR(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS); | ||
850 | } | ||
851 | } | ||
852 | |||
853 | return eError; | ||
854 | } | ||
855 | |||
856 | |||
857 | PVRSRV_ERROR SysSystemPostPowerState(PVRSRV_SYS_POWER_STATE eNewPowerState) | ||
858 | { | ||
859 | PVRSRV_ERROR eError = PVRSRV_OK; | ||
860 | |||
861 | if (eNewPowerState == PVRSRV_SYS_POWER_STATE_D0) | ||
862 | { | ||
863 | PVR_TRACE(("SysSystemPostPowerState: Entering state D0")); | ||
864 | |||
865 | if (SYS_SPECIFIC_DATA_TEST(&gsSysSpecificData, SYS_SPECIFIC_DATA_PM_DISABLE_SYSCLOCKS)) | ||
866 | { | ||
867 | eError = EnableSystemClocksWrap(gpsSysData); | ||
868 | if (eError != PVRSRV_OK) | ||
869 | { | ||
870 | PVR_DPF((PVR_DBG_ERROR,"SysSystemPostPowerState: EnableSystemClocksWrap failed (%d)", eError)); | ||
871 | return eError; | ||
872 | } | ||
873 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS); | ||
874 | SYS_SPECIFIC_DATA_CLEAR(&gsSysSpecificData, SYS_SPECIFIC_DATA_PM_DISABLE_SYSCLOCKS); | ||
875 | } | ||
876 | |||
877 | #if defined(SYS_USING_INTERRUPTS) | ||
878 | if (SYS_SPECIFIC_DATA_TEST(&gsSysSpecificData, SYS_SPECIFIC_DATA_PM_UNINSTALL_LISR)) | ||
879 | { | ||
880 | #if defined(SYS_CUSTOM_POWERLOCK_WRAP) | ||
881 | IMG_BOOL bWrapped = WrapSystemPowerChange(&gsSysSpecificData); | ||
882 | #endif | ||
883 | |||
884 | eError = OSInstallDeviceLISR(gpsSysData, gsSGXDeviceMap.ui32IRQ, "SGX ISR", gpsSGXDevNode); | ||
885 | #if defined(SYS_CUSTOM_POWERLOCK_WRAP) | ||
886 | if (bWrapped) | ||
887 | { | ||
888 | UnwrapSystemPowerChange(&gsSysSpecificData); | ||
889 | } | ||
890 | #endif | ||
891 | if (eError != PVRSRV_OK) | ||
892 | { | ||
893 | PVR_DPF((PVR_DBG_ERROR,"SysSystemPostPowerState: OSInstallDeviceLISR failed to install ISR (%d)", eError)); | ||
894 | return eError; | ||
895 | } | ||
896 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR); | ||
897 | SYS_SPECIFIC_DATA_CLEAR(&gsSysSpecificData, SYS_SPECIFIC_DATA_PM_UNINSTALL_LISR); | ||
898 | } | ||
899 | #endif | ||
900 | } | ||
901 | return eError; | ||
902 | } | ||
903 | |||
904 | |||
905 | PVRSRV_ERROR SysDevicePrePowerState(IMG_UINT32 ui32DeviceIndex, | ||
906 | PVRSRV_DEV_POWER_STATE eNewPowerState, | ||
907 | PVRSRV_DEV_POWER_STATE eCurrentPowerState) | ||
908 | { | ||
909 | PVR_UNREFERENCED_PARAMETER(eCurrentPowerState); | ||
910 | |||
911 | if (ui32DeviceIndex != gui32SGXDeviceID) | ||
912 | { | ||
913 | return PVRSRV_OK; | ||
914 | } | ||
915 | |||
916 | #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) | ||
917 | if (eNewPowerState == PVRSRV_DEV_POWER_STATE_OFF) | ||
918 | { | ||
919 | PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePrePowerState: SGX Entering state D3")); | ||
920 | DisableSGXClocks(gpsSysData); | ||
921 | } | ||
922 | #else | ||
923 | PVR_UNREFERENCED_PARAMETER(eNewPowerState ); | ||
924 | #endif | ||
925 | return PVRSRV_OK; | ||
926 | } | ||
927 | |||
928 | |||
929 | PVRSRV_ERROR SysDevicePostPowerState(IMG_UINT32 ui32DeviceIndex, | ||
930 | PVRSRV_DEV_POWER_STATE eNewPowerState, | ||
931 | PVRSRV_DEV_POWER_STATE eCurrentPowerState) | ||
932 | { | ||
933 | PVRSRV_ERROR eError = PVRSRV_OK; | ||
934 | |||
935 | PVR_UNREFERENCED_PARAMETER(eNewPowerState); | ||
936 | |||
937 | if (ui32DeviceIndex != gui32SGXDeviceID) | ||
938 | { | ||
939 | return eError; | ||
940 | } | ||
941 | |||
942 | #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) | ||
943 | if (eCurrentPowerState == PVRSRV_DEV_POWER_STATE_OFF) | ||
944 | { | ||
945 | PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePostPowerState: SGX Leaving state D3")); | ||
946 | eError = EnableSGXClocksWrap(gpsSysData); | ||
947 | } | ||
948 | #else | ||
949 | PVR_UNREFERENCED_PARAMETER(eCurrentPowerState); | ||
950 | #endif | ||
951 | |||
952 | return eError; | ||
953 | } | ||
954 | |||
955 | |||
956 | PVRSRV_ERROR SysOEMFunction ( IMG_UINT32 ui32ID, | ||
957 | IMG_VOID *pvIn, | ||
958 | IMG_UINT32 ulInSize, | ||
959 | IMG_VOID *pvOut, | ||
960 | IMG_UINT32 ulOutSize) | ||
961 | { | ||
962 | PVR_UNREFERENCED_PARAMETER(ui32ID); | ||
963 | PVR_UNREFERENCED_PARAMETER(pvIn); | ||
964 | PVR_UNREFERENCED_PARAMETER(ulInSize); | ||
965 | PVR_UNREFERENCED_PARAMETER(pvOut); | ||
966 | PVR_UNREFERENCED_PARAMETER(ulOutSize); | ||
967 | |||
968 | if ((ui32ID == OEM_GET_EXT_FUNCS) && | ||
969 | (ulOutSize == sizeof(PVRSRV_DC_OEM_JTABLE))) | ||
970 | { | ||
971 | |||
972 | PVRSRV_DC_OEM_JTABLE *psOEMJTable = (PVRSRV_DC_OEM_JTABLE*) pvOut; | ||
973 | psOEMJTable->pfnOEMBridgeDispatch = &PVRSRV_BridgeDispatchKM; | ||
974 | return PVRSRV_OK; | ||
975 | } | ||
976 | |||
977 | return PVRSRV_ERROR_INVALID_PARAMS; | ||
978 | } | ||